Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:09:35.860736 lava-dispatcher, installed at version: 2024.01
2 00:09:35.861503 start: 0 validate
3 00:09:35.861976 Start time: 2024-11-08 00:09:35.861947+00:00 (UTC)
4 00:09:35.862506 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:09:35.863039 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:09:35.901930 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:09:35.902482 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-63-g2e9baed573ee%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 00:09:35.932238 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:09:35.932840 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-63-g2e9baed573ee%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 00:09:35.959217 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:09:35.959696 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:09:35.990094 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:09:35.990562 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-63-g2e9baed573ee%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 00:09:36.030710 validate duration: 0.17
16 00:09:36.031520 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:09:36.031847 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:09:36.032190 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:09:36.032766 Not decompressing ramdisk as can be used compressed.
20 00:09:36.033204 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:09:36.033480 saving as /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/ramdisk/initrd.cpio.gz
22 00:09:36.033744 total size: 5628169 (5 MB)
23 00:09:36.072195 progress 0 % (0 MB)
24 00:09:36.078257 progress 5 % (0 MB)
25 00:09:36.085975 progress 10 % (0 MB)
26 00:09:36.092908 progress 15 % (0 MB)
27 00:09:36.100360 progress 20 % (1 MB)
28 00:09:36.103918 progress 25 % (1 MB)
29 00:09:36.107855 progress 30 % (1 MB)
30 00:09:36.111770 progress 35 % (1 MB)
31 00:09:36.115375 progress 40 % (2 MB)
32 00:09:36.119302 progress 45 % (2 MB)
33 00:09:36.122794 progress 50 % (2 MB)
34 00:09:36.126733 progress 55 % (2 MB)
35 00:09:36.130699 progress 60 % (3 MB)
36 00:09:36.134173 progress 65 % (3 MB)
37 00:09:36.138125 progress 70 % (3 MB)
38 00:09:36.141674 progress 75 % (4 MB)
39 00:09:36.145580 progress 80 % (4 MB)
40 00:09:36.149128 progress 85 % (4 MB)
41 00:09:36.153006 progress 90 % (4 MB)
42 00:09:36.156752 progress 95 % (5 MB)
43 00:09:36.159962 progress 100 % (5 MB)
44 00:09:36.160621 5 MB downloaded in 0.13 s (42.31 MB/s)
45 00:09:36.161155 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:09:36.162054 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:09:36.162355 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:09:36.162634 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:09:36.163108 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-63-g2e9baed573ee/arm64/defconfig/gcc-12/kernel/Image
51 00:09:36.163352 saving as /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/kernel/Image
52 00:09:36.163568 total size: 45713920 (43 MB)
53 00:09:36.163781 No compression specified
54 00:09:36.202974 progress 0 % (0 MB)
55 00:09:36.230893 progress 5 % (2 MB)
56 00:09:36.258658 progress 10 % (4 MB)
57 00:09:36.286360 progress 15 % (6 MB)
58 00:09:36.314300 progress 20 % (8 MB)
59 00:09:36.341741 progress 25 % (10 MB)
60 00:09:36.369628 progress 30 % (13 MB)
61 00:09:36.397502 progress 35 % (15 MB)
62 00:09:36.425292 progress 40 % (17 MB)
63 00:09:36.452845 progress 45 % (19 MB)
64 00:09:36.480670 progress 50 % (21 MB)
65 00:09:36.508680 progress 55 % (24 MB)
66 00:09:36.536637 progress 60 % (26 MB)
67 00:09:36.564146 progress 65 % (28 MB)
68 00:09:36.592126 progress 70 % (30 MB)
69 00:09:36.619808 progress 75 % (32 MB)
70 00:09:36.647657 progress 80 % (34 MB)
71 00:09:36.674868 progress 85 % (37 MB)
72 00:09:36.702820 progress 90 % (39 MB)
73 00:09:36.730509 progress 95 % (41 MB)
74 00:09:36.757936 progress 100 % (43 MB)
75 00:09:36.758446 43 MB downloaded in 0.59 s (73.29 MB/s)
76 00:09:36.758938 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:09:36.759784 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:09:36.760102 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:09:36.760382 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:09:36.760858 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-63-g2e9baed573ee/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 00:09:36.761128 saving as /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/dtb/meson-g12b-a311d-libretech-cc.dtb
83 00:09:36.761342 total size: 54703 (0 MB)
84 00:09:36.761557 No compression specified
85 00:09:36.802533 progress 59 % (0 MB)
86 00:09:36.803376 progress 100 % (0 MB)
87 00:09:36.803946 0 MB downloaded in 0.04 s (1.22 MB/s)
88 00:09:36.804457 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:09:36.805291 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:09:36.805564 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:09:36.805840 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:09:36.806301 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:09:36.806549 saving as /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/nfsrootfs/full.rootfs.tar
95 00:09:36.806762 total size: 120894716 (115 MB)
96 00:09:36.806982 Using unxz to decompress xz
97 00:09:36.846066 progress 0 % (0 MB)
98 00:09:37.632057 progress 5 % (5 MB)
99 00:09:38.466620 progress 10 % (11 MB)
100 00:09:39.261487 progress 15 % (17 MB)
101 00:09:39.997537 progress 20 % (23 MB)
102 00:09:40.592649 progress 25 % (28 MB)
103 00:09:41.423585 progress 30 % (34 MB)
104 00:09:42.219827 progress 35 % (40 MB)
105 00:09:42.574769 progress 40 % (46 MB)
106 00:09:42.965082 progress 45 % (51 MB)
107 00:09:43.691013 progress 50 % (57 MB)
108 00:09:44.571087 progress 55 % (63 MB)
109 00:09:45.368121 progress 60 % (69 MB)
110 00:09:46.131758 progress 65 % (74 MB)
111 00:09:46.915500 progress 70 % (80 MB)
112 00:09:47.750130 progress 75 % (86 MB)
113 00:09:48.539320 progress 80 % (92 MB)
114 00:09:49.323589 progress 85 % (98 MB)
115 00:09:50.181758 progress 90 % (103 MB)
116 00:09:50.968893 progress 95 % (109 MB)
117 00:09:51.799804 progress 100 % (115 MB)
118 00:09:51.812256 115 MB downloaded in 15.01 s (7.68 MB/s)
119 00:09:51.812804 end: 1.4.1 http-download (duration 00:00:15) [common]
121 00:09:51.813610 end: 1.4 download-retry (duration 00:00:15) [common]
122 00:09:51.813871 start: 1.5 download-retry (timeout 00:09:44) [common]
123 00:09:51.814127 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 00:09:51.814761 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-63-g2e9baed573ee/arm64/defconfig/gcc-12/modules.tar.xz
125 00:09:51.815020 saving as /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/modules/modules.tar
126 00:09:51.815224 total size: 11603932 (11 MB)
127 00:09:51.815434 Using unxz to decompress xz
128 00:09:51.851925 progress 0 % (0 MB)
129 00:09:51.918648 progress 5 % (0 MB)
130 00:09:51.994036 progress 10 % (1 MB)
131 00:09:52.092022 progress 15 % (1 MB)
132 00:09:52.183747 progress 20 % (2 MB)
133 00:09:52.262313 progress 25 % (2 MB)
134 00:09:52.338211 progress 30 % (3 MB)
135 00:09:52.411953 progress 35 % (3 MB)
136 00:09:52.488961 progress 40 % (4 MB)
137 00:09:52.565819 progress 45 % (5 MB)
138 00:09:52.649548 progress 50 % (5 MB)
139 00:09:52.726321 progress 55 % (6 MB)
140 00:09:52.810954 progress 60 % (6 MB)
141 00:09:52.891247 progress 65 % (7 MB)
142 00:09:52.967570 progress 70 % (7 MB)
143 00:09:53.050105 progress 75 % (8 MB)
144 00:09:53.133429 progress 80 % (8 MB)
145 00:09:53.213285 progress 85 % (9 MB)
146 00:09:53.291539 progress 90 % (9 MB)
147 00:09:53.368776 progress 95 % (10 MB)
148 00:09:53.446137 progress 100 % (11 MB)
149 00:09:53.457232 11 MB downloaded in 1.64 s (6.74 MB/s)
150 00:09:53.458135 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:09:53.459158 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:09:53.459484 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 00:09:53.459800 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 00:10:12.655478 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/955856/extract-nfsrootfs-uwrg9kcq
156 00:10:12.656122 end: 1.6.1 extract-nfsrootfs (duration 00:00:19) [common]
157 00:10:12.656456 start: 1.6.2 lava-overlay (timeout 00:09:23) [common]
158 00:10:12.657134 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0
159 00:10:12.657670 makedir: /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin
160 00:10:12.658119 makedir: /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/tests
161 00:10:12.658548 makedir: /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/results
162 00:10:12.658964 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-add-keys
163 00:10:12.659600 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-add-sources
164 00:10:12.660234 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-background-process-start
165 00:10:12.660753 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-background-process-stop
166 00:10:12.661285 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-common-functions
167 00:10:12.661842 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-echo-ipv4
168 00:10:12.662375 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-install-packages
169 00:10:12.662878 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-installed-packages
170 00:10:12.663379 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-os-build
171 00:10:12.663891 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-probe-channel
172 00:10:12.664405 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-probe-ip
173 00:10:12.664922 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-target-ip
174 00:10:12.665405 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-target-mac
175 00:10:12.665881 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-target-storage
176 00:10:12.666364 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-test-case
177 00:10:12.666872 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-test-event
178 00:10:12.667384 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-test-feedback
179 00:10:12.667899 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-test-raise
180 00:10:12.668423 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-test-reference
181 00:10:12.668982 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-test-runner
182 00:10:12.669525 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-test-set
183 00:10:12.670013 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-test-shell
184 00:10:12.670500 Updating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-add-keys (debian)
185 00:10:12.671050 Updating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-add-sources (debian)
186 00:10:12.671583 Updating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-install-packages (debian)
187 00:10:12.672136 Updating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-installed-packages (debian)
188 00:10:12.672653 Updating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/bin/lava-os-build (debian)
189 00:10:12.673127 Creating /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/environment
190 00:10:12.673537 LAVA metadata
191 00:10:12.673803 - LAVA_JOB_ID=955856
192 00:10:12.674015 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:10:12.674373 start: 1.6.2.1 ssh-authorize (timeout 00:09:23) [common]
194 00:10:12.675334 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:10:12.675642 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:23) [common]
196 00:10:12.675845 skipped lava-vland-overlay
197 00:10:12.676108 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:10:12.676362 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:23) [common]
199 00:10:12.676578 skipped lava-multinode-overlay
200 00:10:12.676816 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:10:12.677064 start: 1.6.2.4 test-definition (timeout 00:09:23) [common]
202 00:10:12.677308 Loading test definitions
203 00:10:12.677576 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:23) [common]
204 00:10:12.677792 Using /lava-955856 at stage 0
205 00:10:12.678930 uuid=955856_1.6.2.4.1 testdef=None
206 00:10:12.679228 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:10:12.679486 start: 1.6.2.4.2 test-overlay (timeout 00:09:23) [common]
208 00:10:12.681211 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:10:12.681987 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:23) [common]
211 00:10:12.683948 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:10:12.684825 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:23) [common]
214 00:10:12.686746 runner path: /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/0/tests/0_timesync-off test_uuid 955856_1.6.2.4.1
215 00:10:12.687329 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:10:12.688160 start: 1.6.2.4.5 git-repo-action (timeout 00:09:23) [common]
218 00:10:12.688383 Using /lava-955856 at stage 0
219 00:10:12.688761 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:10:12.689053 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/0/tests/1_kselftest-alsa'
221 00:10:16.564487 Running '/usr/bin/git checkout kernelci.org
222 00:10:16.939450 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 00:10:16.940907 uuid=955856_1.6.2.4.5 testdef=None
224 00:10:16.941259 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 00:10:16.942018 start: 1.6.2.4.6 test-overlay (timeout 00:09:19) [common]
227 00:10:16.944916 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:10:16.946476 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:19) [common]
230 00:10:16.954395 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:10:16.956258 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:19) [common]
233 00:10:16.964076 runner path: /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/0/tests/1_kselftest-alsa test_uuid 955856_1.6.2.4.5
234 00:10:16.964669 BOARD='meson-g12b-a311d-libretech-cc'
235 00:10:16.965131 BRANCH='broonie-spi'
236 00:10:16.965571 SKIPFILE='/dev/null'
237 00:10:16.966009 SKIP_INSTALL='True'
238 00:10:16.966445 TESTPROG_URL='http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-63-g2e9baed573ee/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 00:10:16.966930 TST_CASENAME=''
240 00:10:16.967369 TST_CMDFILES='alsa'
241 00:10:16.968508 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:10:16.970212 Creating lava-test-runner.conf files
244 00:10:16.970660 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/955856/lava-overlay-hrjsthv0/lava-955856/0 for stage 0
245 00:10:16.971421 - 0_timesync-off
246 00:10:16.971935 - 1_kselftest-alsa
247 00:10:16.972715 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 00:10:16.973326 start: 1.6.2.5 compress-overlay (timeout 00:09:19) [common]
249 00:10:40.454692 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 00:10:40.455223 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:56) [common]
251 00:10:40.455565 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:10:40.455918 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 00:10:40.456330 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:56) [common]
254 00:10:41.066219 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:10:41.066778 start: 1.6.4 extract-modules (timeout 00:08:55) [common]
256 00:10:41.067085 extracting modules file /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955856/extract-nfsrootfs-uwrg9kcq
257 00:10:42.776173 extracting modules file /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955856/extract-overlay-ramdisk-e_awo3es/ramdisk
258 00:10:44.186387 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:10:44.186851 start: 1.6.5 apply-overlay-tftp (timeout 00:08:52) [common]
260 00:10:44.187128 [common] Applying overlay to NFS
261 00:10:44.187342 [common] Applying overlay /var/lib/lava/dispatcher/tmp/955856/compress-overlay-whz1ghoe/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/955856/extract-nfsrootfs-uwrg9kcq
262 00:10:46.977680 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:10:46.978179 start: 1.6.6 prepare-kernel (timeout 00:08:49) [common]
264 00:10:46.978452 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:49) [common]
265 00:10:46.978685 Converting downloaded kernel to a uImage
266 00:10:46.979003 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/kernel/Image /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/kernel/uImage
267 00:10:47.448271 output: Image Name:
268 00:10:47.448716 output: Created: Fri Nov 8 00:10:46 2024
269 00:10:47.448927 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:10:47.449133 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 00:10:47.449333 output: Load Address: 01080000
272 00:10:47.449532 output: Entry Point: 01080000
273 00:10:47.449728 output:
274 00:10:47.450065 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 00:10:47.450380 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 00:10:47.450671 start: 1.6.7 configure-preseed-file (timeout 00:08:49) [common]
277 00:10:47.450925 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:10:47.451181 start: 1.6.8 compress-ramdisk (timeout 00:08:49) [common]
279 00:10:47.451446 Building ramdisk /var/lib/lava/dispatcher/tmp/955856/extract-overlay-ramdisk-e_awo3es/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/955856/extract-overlay-ramdisk-e_awo3es/ramdisk
280 00:10:49.626313 >> 166774 blocks
281 00:10:58.139880 Adding RAMdisk u-boot header.
282 00:10:58.140637 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/955856/extract-overlay-ramdisk-e_awo3es/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/955856/extract-overlay-ramdisk-e_awo3es/ramdisk.cpio.gz.uboot
283 00:10:58.387193 output: Image Name:
284 00:10:58.387612 output: Created: Fri Nov 8 00:10:58 2024
285 00:10:58.387822 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:10:58.388318 output: Data Size: 23426119 Bytes = 22877.07 KiB = 22.34 MiB
287 00:10:58.388803 output: Load Address: 00000000
288 00:10:58.389274 output: Entry Point: 00000000
289 00:10:58.389718 output:
290 00:10:58.390813 rename /var/lib/lava/dispatcher/tmp/955856/extract-overlay-ramdisk-e_awo3es/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/ramdisk/ramdisk.cpio.gz.uboot
291 00:10:58.391575 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
292 00:10:58.392202 end: 1.6 prepare-tftp-overlay (duration 00:01:05) [common]
293 00:10:58.392782 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:38) [common]
294 00:10:58.393277 No LXC device requested
295 00:10:58.393825 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:10:58.394382 start: 1.8 deploy-device-env (timeout 00:08:38) [common]
297 00:10:58.394923 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:10:58.395371 Checking files for TFTP limit of 4294967296 bytes.
299 00:10:58.398307 end: 1 tftp-deploy (duration 00:01:22) [common]
300 00:10:58.398945 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:10:58.399520 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:10:58.400100 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:10:58.400665 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:10:58.401250 Using kernel file from prepare-kernel: 955856/tftp-deploy-vinqdq00/kernel/uImage
305 00:10:58.401937 substitutions:
306 00:10:58.402387 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:10:58.402830 - {DTB_ADDR}: 0x01070000
308 00:10:58.403270 - {DTB}: 955856/tftp-deploy-vinqdq00/dtb/meson-g12b-a311d-libretech-cc.dtb
309 00:10:58.403715 - {INITRD}: 955856/tftp-deploy-vinqdq00/ramdisk/ramdisk.cpio.gz.uboot
310 00:10:58.404200 - {KERNEL_ADDR}: 0x01080000
311 00:10:58.404639 - {KERNEL}: 955856/tftp-deploy-vinqdq00/kernel/uImage
312 00:10:58.405074 - {LAVA_MAC}: None
313 00:10:58.405547 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/955856/extract-nfsrootfs-uwrg9kcq
314 00:10:58.405987 - {NFS_SERVER_IP}: 192.168.6.2
315 00:10:58.406414 - {PRESEED_CONFIG}: None
316 00:10:58.406842 - {PRESEED_LOCAL}: None
317 00:10:58.407272 - {RAMDISK_ADDR}: 0x08000000
318 00:10:58.407700 - {RAMDISK}: 955856/tftp-deploy-vinqdq00/ramdisk/ramdisk.cpio.gz.uboot
319 00:10:58.408164 - {ROOT_PART}: None
320 00:10:58.408597 - {ROOT}: None
321 00:10:58.409026 - {SERVER_IP}: 192.168.6.2
322 00:10:58.409455 - {TEE_ADDR}: 0x83000000
323 00:10:58.409878 - {TEE}: None
324 00:10:58.410306 Parsed boot commands:
325 00:10:58.410721 - setenv autoload no
326 00:10:58.411146 - setenv initrd_high 0xffffffff
327 00:10:58.411574 - setenv fdt_high 0xffffffff
328 00:10:58.412029 - dhcp
329 00:10:58.412460 - setenv serverip 192.168.6.2
330 00:10:58.412891 - tftpboot 0x01080000 955856/tftp-deploy-vinqdq00/kernel/uImage
331 00:10:58.413354 - tftpboot 0x08000000 955856/tftp-deploy-vinqdq00/ramdisk/ramdisk.cpio.gz.uboot
332 00:10:58.413841 - tftpboot 0x01070000 955856/tftp-deploy-vinqdq00/dtb/meson-g12b-a311d-libretech-cc.dtb
333 00:10:58.414305 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/955856/extract-nfsrootfs-uwrg9kcq,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:10:58.414795 - bootm 0x01080000 0x08000000 0x01070000
335 00:10:58.415437 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:10:58.417252 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:10:58.417725 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 00:10:58.433061 Setting prompt string to ['lava-test: # ']
340 00:10:58.434711 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:10:58.435384 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:10:58.436080 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:10:58.436770 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:10:58.438091 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 00:10:58.478189 >> OK - accepted request
346 00:10:58.480251 Returned 0 in 0 seconds
347 00:10:58.581491 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:10:58.583297 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:10:58.583897 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:10:58.584509 Setting prompt string to ['Hit any key to stop autoboot']
352 00:10:58.584998 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:10:58.586736 Trying 192.168.56.21...
354 00:10:58.587260 Connected to conserv1.
355 00:10:58.587713 Escape character is '^]'.
356 00:10:58.588203
357 00:10:58.588657 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 00:10:58.589122
359 00:11:09.867239 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 00:11:09.867852 bl2_stage_init 0x01
361 00:11:09.868332 bl2_stage_init 0x81
362 00:11:09.872821 hw id: 0x0000 - pwm id 0x01
363 00:11:09.873352 bl2_stage_init 0xc1
364 00:11:09.873763 bl2_stage_init 0x02
365 00:11:09.874162
366 00:11:09.878469 L0:00000000
367 00:11:09.878927 L1:20000703
368 00:11:09.879326 L2:00008067
369 00:11:09.879720 L3:14000000
370 00:11:09.883906 B2:00402000
371 00:11:09.884370 B1:e0f83180
372 00:11:09.884766
373 00:11:09.885152 TE: 58167
374 00:11:09.885539
375 00:11:09.889406 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 00:11:09.889826
377 00:11:09.890214 Board ID = 1
378 00:11:09.895018 Set A53 clk to 24M
379 00:11:09.895436 Set A73 clk to 24M
380 00:11:09.895821 Set clk81 to 24M
381 00:11:09.900658 A53 clk: 1200 MHz
382 00:11:09.901078 A73 clk: 1200 MHz
383 00:11:09.901461 CLK81: 166.6M
384 00:11:09.901839 smccc: 00012abe
385 00:11:09.906288 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 00:11:09.911775 board id: 1
387 00:11:09.917760 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:11:09.928429 fw parse done
389 00:11:09.933760 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:11:09.976919 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:11:09.987761 PIEI prepare done
392 00:11:09.988240 fastboot data load
393 00:11:09.988631 fastboot data verify
394 00:11:09.993505 verify result: 266
395 00:11:09.999015 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 00:11:09.999438 LPDDR4 probe
397 00:11:09.999829 ddr clk to 1584MHz
398 00:11:10.006968 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:11:10.044329
400 00:11:10.044934 dmc_version 0001
401 00:11:10.050137 Check phy result
402 00:11:10.056744 INFO : End of CA training
403 00:11:10.057191 INFO : End of initialization
404 00:11:10.062327 INFO : Training has run successfully!
405 00:11:10.062753 Check phy result
406 00:11:10.067929 INFO : End of initialization
407 00:11:10.068386 INFO : End of read enable training
408 00:11:10.073535 INFO : End of fine write leveling
409 00:11:10.079247 INFO : End of Write leveling coarse delay
410 00:11:10.079671 INFO : Training has run successfully!
411 00:11:10.080094 Check phy result
412 00:11:10.084760 INFO : End of initialization
413 00:11:10.085182 INFO : End of read dq deskew training
414 00:11:10.090369 INFO : End of MPR read delay center optimization
415 00:11:10.095920 INFO : End of write delay center optimization
416 00:11:10.101540 INFO : End of read delay center optimization
417 00:11:10.101974 INFO : End of max read latency training
418 00:11:10.107243 INFO : Training has run successfully!
419 00:11:10.107676 1D training succeed
420 00:11:10.116127 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:11:10.164024 Check phy result
422 00:11:10.164580 INFO : End of initialization
423 00:11:10.186442 INFO : End of 2D read delay Voltage center optimization
424 00:11:10.206543 INFO : End of 2D read delay Voltage center optimization
425 00:11:10.258538 INFO : End of 2D write delay Voltage center optimization
426 00:11:10.307712 INFO : End of 2D write delay Voltage center optimization
427 00:11:10.313344 INFO : Training has run successfully!
428 00:11:10.313841
429 00:11:10.314264 channel==0
430 00:11:10.318848 RxClkDly_Margin_A0==88 ps 9
431 00:11:10.319287 TxDqDly_Margin_A0==98 ps 10
432 00:11:10.324404 RxClkDly_Margin_A1==88 ps 9
433 00:11:10.324854 TxDqDly_Margin_A1==98 ps 10
434 00:11:10.325263 TrainedVREFDQ_A0==74
435 00:11:10.329994 TrainedVREFDQ_A1==74
436 00:11:10.330434 VrefDac_Margin_A0==25
437 00:11:10.330841 DeviceVref_Margin_A0==40
438 00:11:10.335634 VrefDac_Margin_A1==25
439 00:11:10.336093 DeviceVref_Margin_A1==40
440 00:11:10.336500
441 00:11:10.336896
442 00:11:10.341283 channel==1
443 00:11:10.341709 RxClkDly_Margin_A0==98 ps 10
444 00:11:10.342111 TxDqDly_Margin_A0==98 ps 10
445 00:11:10.346805 RxClkDly_Margin_A1==88 ps 9
446 00:11:10.347238 TxDqDly_Margin_A1==88 ps 9
447 00:11:10.352437 TrainedVREFDQ_A0==77
448 00:11:10.352932 TrainedVREFDQ_A1==77
449 00:11:10.353348 VrefDac_Margin_A0==22
450 00:11:10.357969 DeviceVref_Margin_A0==37
451 00:11:10.358405 VrefDac_Margin_A1==24
452 00:11:10.363570 DeviceVref_Margin_A1==37
453 00:11:10.364028
454 00:11:10.364443 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:11:10.364839
456 00:11:10.397313 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000017 00000016 00000018 00000016 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 00:11:10.397887 2D training succeed
458 00:11:10.402821 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:11:10.408702 auto size-- 65535DDR cs0 size: 2048MB
460 00:11:10.409162 DDR cs1 size: 2048MB
461 00:11:10.414126 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:11:10.414584 cs0 DataBus test pass
463 00:11:10.419600 cs1 DataBus test pass
464 00:11:10.420087 cs0 AddrBus test pass
465 00:11:10.420523 cs1 AddrBus test pass
466 00:11:10.420921
467 00:11:10.425364 100bdlr_step_size ps== 420
468 00:11:10.425849 result report
469 00:11:10.430813 boot times 0Enable ddr reg access
470 00:11:10.436230 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:11:10.449648 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 00:11:11.021754 0.0;M3 CHK:0;cm4_sp_mode 0
473 00:11:11.022414 MVN_1=0x00000000
474 00:11:11.027348 MVN_2=0x00000000
475 00:11:11.033016 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 00:11:11.033556 OPS=0x10
477 00:11:11.033985 ring efuse init
478 00:11:11.034400 chipver efuse init
479 00:11:11.038566 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 00:11:11.044187 [0.018960 Inits done]
481 00:11:11.044675 secure task start!
482 00:11:11.045089 high task start!
483 00:11:11.048758 low task start!
484 00:11:11.049227 run into bl31
485 00:11:11.055507 NOTICE: BL31: v1.3(release):4fc40b1
486 00:11:11.063205 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 00:11:11.063741 NOTICE: BL31: G12A normal boot!
488 00:11:11.088583 NOTICE: BL31: BL33 decompress pass
489 00:11:11.094336 ERROR: Error initializing runtime service opteed_fast
490 00:11:12.327107
491 00:11:12.327531
492 00:11:12.335354 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 00:11:12.335656
494 00:11:12.335871 Model: Libre Computer AML-A311D-CC Alta
495 00:11:12.543970 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 00:11:12.567362 DRAM: 2 GiB (effective 3.8 GiB)
497 00:11:12.710366 Core: 408 devices, 31 uclasses, devicetree: separate
498 00:11:12.716139 WDT: Not starting watchdog@f0d0
499 00:11:12.748497 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 00:11:12.760952 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 00:11:12.765821 ** Bad device specification mmc 0 **
502 00:11:12.776301 Card did not respond to voltage select! : -110
503 00:11:12.783813 ** Bad device specification mmc 0 **
504 00:11:12.784137 Couldn't find partition mmc 0
505 00:11:12.792250 Card did not respond to voltage select! : -110
506 00:11:12.797667 ** Bad device specification mmc 0 **
507 00:11:12.797940 Couldn't find partition mmc 0
508 00:11:12.801756 Error: could not access storage.
509 00:11:14.067351 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 00:11:14.067974 bl2_stage_init 0x01
511 00:11:14.068492 bl2_stage_init 0x81
512 00:11:14.072918 hw id: 0x0000 - pwm id 0x01
513 00:11:14.073382 bl2_stage_init 0xc1
514 00:11:14.073796 bl2_stage_init 0x02
515 00:11:14.074193
516 00:11:14.078517 L0:00000000
517 00:11:14.078969 L1:20000703
518 00:11:14.079374 L2:00008067
519 00:11:14.079770 L3:14000000
520 00:11:14.084179 B2:00402000
521 00:11:14.084663 B1:e0f83180
522 00:11:14.085067
523 00:11:14.085467 TE: 58159
524 00:11:14.085862
525 00:11:14.089733 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 00:11:14.090176
527 00:11:14.090580 Board ID = 1
528 00:11:14.095277 Set A53 clk to 24M
529 00:11:14.095719 Set A73 clk to 24M
530 00:11:14.096167 Set clk81 to 24M
531 00:11:14.100895 A53 clk: 1200 MHz
532 00:11:14.101341 A73 clk: 1200 MHz
533 00:11:14.101746 CLK81: 166.6M
534 00:11:14.102142 smccc: 00012ab4
535 00:11:14.106499 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 00:11:14.112103 board id: 1
537 00:11:14.117972 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 00:11:14.128619 fw parse done
539 00:11:14.134584 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 00:11:14.177308 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 00:11:14.188168 PIEI prepare done
542 00:11:14.188639 fastboot data load
543 00:11:14.189049 fastboot data verify
544 00:11:14.194047 verify result: 266
545 00:11:14.199433 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 00:11:14.199911 LPDDR4 probe
547 00:11:14.200369 ddr clk to 1584MHz
548 00:11:14.207490 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 00:11:14.244747
550 00:11:14.245272 dmc_version 0001
551 00:11:14.251360 Check phy result
552 00:11:14.257229 INFO : End of CA training
553 00:11:14.257696 INFO : End of initialization
554 00:11:14.262830 INFO : Training has run successfully!
555 00:11:14.263297 Check phy result
556 00:11:14.268416 INFO : End of initialization
557 00:11:14.268882 INFO : End of read enable training
558 00:11:14.274052 INFO : End of fine write leveling
559 00:11:14.279666 INFO : End of Write leveling coarse delay
560 00:11:14.280168 INFO : Training has run successfully!
561 00:11:14.280576 Check phy result
562 00:11:14.285248 INFO : End of initialization
563 00:11:14.285720 INFO : End of read dq deskew training
564 00:11:14.290911 INFO : End of MPR read delay center optimization
565 00:11:14.296444 INFO : End of write delay center optimization
566 00:11:14.302045 INFO : End of read delay center optimization
567 00:11:14.302516 INFO : End of max read latency training
568 00:11:14.307610 INFO : Training has run successfully!
569 00:11:14.308119 1D training succeed
570 00:11:14.315818 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 00:11:14.364434 Check phy result
572 00:11:14.364967 INFO : End of initialization
573 00:11:14.387140 INFO : End of 2D read delay Voltage center optimization
574 00:11:14.407248 INFO : End of 2D read delay Voltage center optimization
575 00:11:14.459320 INFO : End of 2D write delay Voltage center optimization
576 00:11:14.508730 INFO : End of 2D write delay Voltage center optimization
577 00:11:14.514233 INFO : Training has run successfully!
578 00:11:14.514709
579 00:11:14.515119 channel==0
580 00:11:14.520335 RxClkDly_Margin_A0==88 ps 9
581 00:11:14.520791 TxDqDly_Margin_A0==98 ps 10
582 00:11:14.525342 RxClkDly_Margin_A1==88 ps 9
583 00:11:14.525780 TxDqDly_Margin_A1==98 ps 10
584 00:11:14.526190 TrainedVREFDQ_A0==74
585 00:11:14.531000 TrainedVREFDQ_A1==74
586 00:11:14.531443 VrefDac_Margin_A0==24
587 00:11:14.531844 DeviceVref_Margin_A0==40
588 00:11:14.536558 VrefDac_Margin_A1==24
589 00:11:14.537001 DeviceVref_Margin_A1==40
590 00:11:14.537408
591 00:11:14.537806
592 00:11:14.542074 channel==1
593 00:11:14.542524 RxClkDly_Margin_A0==98 ps 10
594 00:11:14.542930 TxDqDly_Margin_A0==98 ps 10
595 00:11:14.547699 RxClkDly_Margin_A1==88 ps 9
596 00:11:14.548178 TxDqDly_Margin_A1==88 ps 9
597 00:11:14.553262 TrainedVREFDQ_A0==77
598 00:11:14.553700 TrainedVREFDQ_A1==77
599 00:11:14.554104 VrefDac_Margin_A0==22
600 00:11:14.558912 DeviceVref_Margin_A0==37
601 00:11:14.559344 VrefDac_Margin_A1==24
602 00:11:14.564535 DeviceVref_Margin_A1==37
603 00:11:14.564979
604 00:11:14.565379 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 00:11:14.565778
606 00:11:14.598089 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 00:11:14.598613 2D training succeed
608 00:11:14.603778 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 00:11:14.609280 auto size-- 65535DDR cs0 size: 2048MB
610 00:11:14.609721 DDR cs1 size: 2048MB
611 00:11:14.614940 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 00:11:14.615384 cs0 DataBus test pass
613 00:11:14.620447 cs1 DataBus test pass
614 00:11:14.620901 cs0 AddrBus test pass
615 00:11:14.621303 cs1 AddrBus test pass
616 00:11:14.621698
617 00:11:14.626068 100bdlr_step_size ps== 420
618 00:11:14.626519 result report
619 00:11:14.631653 boot times 0Enable ddr reg access
620 00:11:14.637033 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 00:11:14.650525 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 00:11:15.224285 0.0;M3 CHK:0;cm4_sp_mode 0
623 00:11:15.224898 MVN_1=0x00000000
624 00:11:15.229767 MVN_2=0x00000000
625 00:11:15.235746 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 00:11:15.236069 OPS=0x10
627 00:11:15.236296 ring efuse init
628 00:11:15.236507 chipver efuse init
629 00:11:15.243743 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 00:11:15.244054 [0.018961 Inits done]
631 00:11:15.251366 secure task start!
632 00:11:15.251660 high task start!
633 00:11:15.251878 low task start!
634 00:11:15.252154 run into bl31
635 00:11:15.258024 NOTICE: BL31: v1.3(release):4fc40b1
636 00:11:15.266014 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 00:11:15.266764 NOTICE: BL31: G12A normal boot!
638 00:11:15.291296 NOTICE: BL31: BL33 decompress pass
639 00:11:15.295959 ERROR: Error initializing runtime service opteed_fast
640 00:11:16.529625
641 00:11:16.530040
642 00:11:16.538097 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 00:11:16.538429
644 00:11:16.538656 Model: Libre Computer AML-A311D-CC Alta
645 00:11:16.746496 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 00:11:16.769884 DRAM: 2 GiB (effective 3.8 GiB)
647 00:11:16.912829 Core: 408 devices, 31 uclasses, devicetree: separate
648 00:11:16.918731 WDT: Not starting watchdog@f0d0
649 00:11:16.950982 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 00:11:16.963529 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 00:11:16.968155 ** Bad device specification mmc 0 **
652 00:11:16.978815 Card did not respond to voltage select! : -110
653 00:11:16.985976 ** Bad device specification mmc 0 **
654 00:11:16.986288 Couldn't find partition mmc 0
655 00:11:16.994842 Card did not respond to voltage select! : -110
656 00:11:17.000317 ** Bad device specification mmc 0 **
657 00:11:17.000644 Couldn't find partition mmc 0
658 00:11:17.005395 Error: could not access storage.
659 00:11:17.347876 Net: eth0: ethernet@ff3f0000
660 00:11:17.348337 starting USB...
661 00:11:17.599682 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 00:11:17.600163 Starting the controller
663 00:11:17.606449 USB XHCI 1.10
664 00:11:19.319056 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 00:11:19.319454 bl2_stage_init 0x01
666 00:11:19.319673 bl2_stage_init 0x81
667 00:11:19.324577 hw id: 0x0000 - pwm id 0x01
668 00:11:19.324983 bl2_stage_init 0xc1
669 00:11:19.325307 bl2_stage_init 0x02
670 00:11:19.325614
671 00:11:19.330175 L0:00000000
672 00:11:19.330460 L1:20000703
673 00:11:19.330671 L2:00008067
674 00:11:19.330870 L3:14000000
675 00:11:19.335759 B2:00402000
676 00:11:19.336082 B1:e0f83180
677 00:11:19.336304
678 00:11:19.336522 TE: 58167
679 00:11:19.336727
680 00:11:19.341358 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 00:11:19.341653
682 00:11:19.341864 Board ID = 1
683 00:11:19.346933 Set A53 clk to 24M
684 00:11:19.347223 Set A73 clk to 24M
685 00:11:19.347430 Set clk81 to 24M
686 00:11:19.352608 A53 clk: 1200 MHz
687 00:11:19.353030 A73 clk: 1200 MHz
688 00:11:19.353364 CLK81: 166.6M
689 00:11:19.353688 smccc: 00012abd
690 00:11:19.358123 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 00:11:19.363746 board id: 1
692 00:11:19.369642 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 00:11:19.380408 fw parse done
694 00:11:19.386290 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 00:11:19.428902 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 00:11:19.439876 PIEI prepare done
697 00:11:19.440451 fastboot data load
698 00:11:19.440885 fastboot data verify
699 00:11:19.445645 verify result: 266
700 00:11:19.451089 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 00:11:19.451630 LPDDR4 probe
702 00:11:19.452092 ddr clk to 1584MHz
703 00:11:19.459148 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 00:11:19.496397
705 00:11:19.496946 dmc_version 0001
706 00:11:19.502150 Check phy result
707 00:11:19.508889 INFO : End of CA training
708 00:11:19.509343 INFO : End of initialization
709 00:11:19.514451 INFO : Training has run successfully!
710 00:11:19.514904 Check phy result
711 00:11:19.520067 INFO : End of initialization
712 00:11:19.520517 INFO : End of read enable training
713 00:11:19.525688 INFO : End of fine write leveling
714 00:11:19.531274 INFO : End of Write leveling coarse delay
715 00:11:19.531760 INFO : Training has run successfully!
716 00:11:19.532193 Check phy result
717 00:11:19.536848 INFO : End of initialization
718 00:11:19.537344 INFO : End of read dq deskew training
719 00:11:19.542428 INFO : End of MPR read delay center optimization
720 00:11:19.548071 INFO : End of write delay center optimization
721 00:11:19.553657 INFO : End of read delay center optimization
722 00:11:19.554099 INFO : End of max read latency training
723 00:11:19.559257 INFO : Training has run successfully!
724 00:11:19.559699 1D training succeed
725 00:11:19.568449 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 00:11:19.616118 Check phy result
727 00:11:19.616702 INFO : End of initialization
728 00:11:19.637965 INFO : End of 2D read delay Voltage center optimization
729 00:11:19.658011 INFO : End of 2D read delay Voltage center optimization
730 00:11:19.710034 INFO : End of 2D write delay Voltage center optimization
731 00:11:19.759415 INFO : End of 2D write delay Voltage center optimization
732 00:11:19.764990 INFO : Training has run successfully!
733 00:11:19.765325
734 00:11:19.765553 channel==0
735 00:11:19.770666 RxClkDly_Margin_A0==88 ps 9
736 00:11:19.771004 TxDqDly_Margin_A0==98 ps 10
737 00:11:19.776219 RxClkDly_Margin_A1==88 ps 9
738 00:11:19.776571 TxDqDly_Margin_A1==98 ps 10
739 00:11:19.776812 TrainedVREFDQ_A0==74
740 00:11:19.781766 TrainedVREFDQ_A1==74
741 00:11:19.782111 VrefDac_Margin_A0==25
742 00:11:19.782333 DeviceVref_Margin_A0==40
743 00:11:19.787352 VrefDac_Margin_A1==25
744 00:11:19.787687 DeviceVref_Margin_A1==40
745 00:11:19.787910
746 00:11:19.788154
747 00:11:19.792960 channel==1
748 00:11:19.793296 RxClkDly_Margin_A0==98 ps 10
749 00:11:19.793520 TxDqDly_Margin_A0==98 ps 10
750 00:11:19.798684 RxClkDly_Margin_A1==88 ps 9
751 00:11:19.799019 TxDqDly_Margin_A1==88 ps 9
752 00:11:19.804203 TrainedVREFDQ_A0==77
753 00:11:19.804552 TrainedVREFDQ_A1==77
754 00:11:19.804772 VrefDac_Margin_A0==22
755 00:11:19.809770 DeviceVref_Margin_A0==37
756 00:11:19.810111 VrefDac_Margin_A1==24
757 00:11:19.815394 DeviceVref_Margin_A1==37
758 00:11:19.815756
759 00:11:19.816008 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 00:11:19.816242
761 00:11:19.849046 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
762 00:11:19.849499 2D training succeed
763 00:11:19.854783 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 00:11:19.860296 auto size-- 65535DDR cs0 size: 2048MB
765 00:11:19.860872 DDR cs1 size: 2048MB
766 00:11:19.865843 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 00:11:19.866265 cs0 DataBus test pass
768 00:11:19.871483 cs1 DataBus test pass
769 00:11:19.871897 cs0 AddrBus test pass
770 00:11:19.872199 cs1 AddrBus test pass
771 00:11:19.872435
772 00:11:19.876989 100bdlr_step_size ps== 420
773 00:11:19.877347 result report
774 00:11:19.882700 boot times 0Enable ddr reg access
775 00:11:19.887915 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 00:11:19.901384 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 00:11:20.475092 0.0;M3 CHK:0;cm4_sp_mode 0
778 00:11:20.475507 MVN_1=0x00000000
779 00:11:20.480698 MVN_2=0x00000000
780 00:11:20.486437 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 00:11:20.486927 OPS=0x10
782 00:11:20.487372 ring efuse init
783 00:11:20.487800 chipver efuse init
784 00:11:20.494667 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 00:11:20.495179 [0.018961 Inits done]
786 00:11:20.502203 secure task start!
787 00:11:20.502691 high task start!
788 00:11:20.503126 low task start!
789 00:11:20.503554 run into bl31
790 00:11:20.508935 NOTICE: BL31: v1.3(release):4fc40b1
791 00:11:20.516682 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 00:11:20.517167 NOTICE: BL31: G12A normal boot!
793 00:11:20.542139 NOTICE: BL31: BL33 decompress pass
794 00:11:20.546803 ERROR: Error initializing runtime service opteed_fast
795 00:11:21.780406
796 00:11:21.781016
797 00:11:21.788816 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 00:11:21.789307
799 00:11:21.789744 Model: Libre Computer AML-A311D-CC Alta
800 00:11:21.996328 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 00:11:22.020259 DRAM: 2 GiB (effective 3.8 GiB)
802 00:11:22.163672 Core: 408 devices, 31 uclasses, devicetree: separate
803 00:11:22.169482 WDT: Not starting watchdog@f0d0
804 00:11:22.201772 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 00:11:22.214246 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 00:11:22.218372 ** Bad device specification mmc 0 **
807 00:11:22.229681 Card did not respond to voltage select! : -110
808 00:11:22.237251 ** Bad device specification mmc 0 **
809 00:11:22.237830 Couldn't find partition mmc 0
810 00:11:22.245612 Card did not respond to voltage select! : -110
811 00:11:22.251048 ** Bad device specification mmc 0 **
812 00:11:22.251588 Couldn't find partition mmc 0
813 00:11:22.255137 Error: could not access storage.
814 00:11:22.598653 Net: eth0: ethernet@ff3f0000
815 00:11:22.599269 starting USB...
816 00:11:22.850460 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 00:11:22.851118 Starting the controller
818 00:11:22.857357 USB XHCI 1.10
819 00:11:25.017506 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 00:11:25.017926 bl2_stage_init 0x01
821 00:11:25.018184 bl2_stage_init 0x81
822 00:11:25.023020 hw id: 0x0000 - pwm id 0x01
823 00:11:25.023524 bl2_stage_init 0xc1
824 00:11:25.023926 bl2_stage_init 0x02
825 00:11:25.024346
826 00:11:25.028586 L0:00000000
827 00:11:25.028938 L1:20000703
828 00:11:25.029331 L2:00008067
829 00:11:25.029591 L3:14000000
830 00:11:25.034309 B2:00402000
831 00:11:25.034652 B1:e0f83180
832 00:11:25.034892
833 00:11:25.035126 TE: 58124
834 00:11:25.035376
835 00:11:25.039779 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 00:11:25.040213
837 00:11:25.040560 Board ID = 1
838 00:11:25.045433 Set A53 clk to 24M
839 00:11:25.045803 Set A73 clk to 24M
840 00:11:25.046051 Set clk81 to 24M
841 00:11:25.051006 A53 clk: 1200 MHz
842 00:11:25.051341 A73 clk: 1200 MHz
843 00:11:25.051561 CLK81: 166.6M
844 00:11:25.051769 smccc: 00012a92
845 00:11:25.056626 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 00:11:25.062332 board id: 1
847 00:11:25.067184 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 00:11:25.078777 fw parse done
849 00:11:25.083863 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 00:11:25.127381 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 00:11:25.138495 PIEI prepare done
852 00:11:25.138852 fastboot data load
853 00:11:25.139088 fastboot data verify
854 00:11:25.143886 verify result: 266
855 00:11:25.149499 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 00:11:25.149974 LPDDR4 probe
857 00:11:25.150243 ddr clk to 1584MHz
858 00:11:25.157526 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 00:11:25.193843
860 00:11:25.194215 dmc_version 0001
861 00:11:25.200737 Check phy result
862 00:11:25.207416 INFO : End of CA training
863 00:11:25.207775 INFO : End of initialization
864 00:11:25.212914 INFO : Training has run successfully!
865 00:11:25.213388 Check phy result
866 00:11:25.218507 INFO : End of initialization
867 00:11:25.219125 INFO : End of read enable training
868 00:11:25.224197 INFO : End of fine write leveling
869 00:11:25.229706 INFO : End of Write leveling coarse delay
870 00:11:25.230244 INFO : Training has run successfully!
871 00:11:25.230685 Check phy result
872 00:11:25.235383 INFO : End of initialization
873 00:11:25.235855 INFO : End of read dq deskew training
874 00:11:25.240860 INFO : End of MPR read delay center optimization
875 00:11:25.246478 INFO : End of write delay center optimization
876 00:11:25.252132 INFO : End of read delay center optimization
877 00:11:25.252624 INFO : End of max read latency training
878 00:11:25.257649 INFO : Training has run successfully!
879 00:11:25.258117 1D training succeed
880 00:11:25.266027 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 00:11:25.313583 Check phy result
882 00:11:25.314082 INFO : End of initialization
883 00:11:25.335253 INFO : End of 2D read delay Voltage center optimization
884 00:11:25.356511 INFO : End of 2D read delay Voltage center optimization
885 00:11:25.409056 INFO : End of 2D write delay Voltage center optimization
886 00:11:25.457905 INFO : End of 2D write delay Voltage center optimization
887 00:11:25.463436 INFO : Training has run successfully!
888 00:11:25.463933
889 00:11:25.464409 channel==0
890 00:11:25.469041 RxClkDly_Margin_A0==88 ps 9
891 00:11:25.469514 TxDqDly_Margin_A0==98 ps 10
892 00:11:25.472473 RxClkDly_Margin_A1==88 ps 9
893 00:11:25.472942 TxDqDly_Margin_A1==88 ps 9
894 00:11:25.477999 TrainedVREFDQ_A0==74
895 00:11:25.478465 TrainedVREFDQ_A1==74
896 00:11:25.478909 VrefDac_Margin_A0==25
897 00:11:25.483706 DeviceVref_Margin_A0==40
898 00:11:25.484308 VrefDac_Margin_A1==25
899 00:11:25.489272 DeviceVref_Margin_A1==40
900 00:11:25.489811
901 00:11:25.490205
902 00:11:25.490589 channel==1
903 00:11:25.490971 RxClkDly_Margin_A0==98 ps 10
904 00:11:25.492536 TxDqDly_Margin_A0==88 ps 9
905 00:11:25.498067 RxClkDly_Margin_A1==88 ps 9
906 00:11:25.498529 TxDqDly_Margin_A1==98 ps 10
907 00:11:25.498919 TrainedVREFDQ_A0==74
908 00:11:25.503688 TrainedVREFDQ_A1==77
909 00:11:25.504170 VrefDac_Margin_A0==22
910 00:11:25.509254 DeviceVref_Margin_A0==40
911 00:11:25.509694 VrefDac_Margin_A1==24
912 00:11:25.510078 DeviceVref_Margin_A1==37
913 00:11:25.510462
914 00:11:25.518395 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 00:11:25.518837
916 00:11:25.546510 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
917 00:11:25.547112 2D training succeed
918 00:11:25.557482 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 00:11:25.557940 auto size-- 65535DDR cs0 size: 2048MB
920 00:11:25.558341 DDR cs1 size: 2048MB
921 00:11:25.563168 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 00:11:25.563622 cs0 DataBus test pass
923 00:11:25.568886 cs1 DataBus test pass
924 00:11:25.569331 cs0 AddrBus test pass
925 00:11:25.574334 cs1 AddrBus test pass
926 00:11:25.574781
927 00:11:25.575174 100bdlr_step_size ps== 420
928 00:11:25.575569 result report
929 00:11:25.580013 boot times 0Enable ddr reg access
930 00:11:25.586369 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 00:11:25.599858 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 00:11:26.173393 0.0;M3 CHK:0;cm4_sp_mode 0
933 00:11:26.174020 MVN_1=0x00000000
934 00:11:26.178855 MVN_2=0x00000000
935 00:11:26.184630 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 00:11:26.185108 OPS=0x10
937 00:11:26.185529 ring efuse init
938 00:11:26.185931 chipver efuse init
939 00:11:26.192829 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 00:11:26.193312 [0.018961 Inits done]
941 00:11:26.199587 secure task start!
942 00:11:26.200084 high task start!
943 00:11:26.200502 low task start!
944 00:11:26.200905 run into bl31
945 00:11:26.207078 NOTICE: BL31: v1.3(release):4fc40b1
946 00:11:26.214815 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 00:11:26.215281 NOTICE: BL31: G12A normal boot!
948 00:11:26.240293 NOTICE: BL31: BL33 decompress pass
949 00:11:26.244927 ERROR: Error initializing runtime service opteed_fast
950 00:11:27.478838
951 00:11:27.479275
952 00:11:27.486258 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 00:11:27.486667
954 00:11:27.486935 Model: Libre Computer AML-A311D-CC Alta
955 00:11:27.695739 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 00:11:27.718082 DRAM: 2 GiB (effective 3.8 GiB)
957 00:11:27.861966 Core: 408 devices, 31 uclasses, devicetree: separate
958 00:11:27.867869 WDT: Not starting watchdog@f0d0
959 00:11:27.900114 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 00:11:27.912555 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 00:11:27.917510 ** Bad device specification mmc 0 **
962 00:11:27.927867 Card did not respond to voltage select! : -110
963 00:11:27.935497 ** Bad device specification mmc 0 **
964 00:11:27.935807 Couldn't find partition mmc 0
965 00:11:27.943863 Card did not respond to voltage select! : -110
966 00:11:27.949345 ** Bad device specification mmc 0 **
967 00:11:27.949651 Couldn't find partition mmc 0
968 00:11:27.953538 Error: could not access storage.
969 00:11:28.296067 Net: eth0: ethernet@ff3f0000
970 00:11:28.296666 starting USB...
971 00:11:28.548721 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 00:11:28.549255 Starting the controller
973 00:11:28.555724 USB XHCI 1.10
974 00:11:30.109841 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 00:11:30.118199 scanning usb for storage devices... 0 Storage Device(s) found
977 00:11:30.169894 Hit any key to stop autoboot: 1
978 00:11:30.170905 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 00:11:30.171555 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 00:11:30.172097 Setting prompt string to ['=>']
981 00:11:30.172616 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 00:11:30.185765 0
983 00:11:30.186801 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 00:11:30.187352 Sending with 10 millisecond of delay
986 00:11:31.323629 => setenv autoload no
987 00:11:31.334871 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 00:11:31.341479 setenv autoload no
989 00:11:31.342487 Sending with 10 millisecond of delay
991 00:11:33.140911 => setenv initrd_high 0xffffffff
992 00:11:33.151760 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 00:11:33.152796 setenv initrd_high 0xffffffff
994 00:11:33.153587 Sending with 10 millisecond of delay
996 00:11:34.770633 => setenv fdt_high 0xffffffff
997 00:11:34.781507 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
998 00:11:34.782464 setenv fdt_high 0xffffffff
999 00:11:34.783226 Sending with 10 millisecond of delay
1001 00:11:35.075336 => dhcp
1002 00:11:35.086253 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 00:11:35.087205 dhcp
1004 00:11:35.087681 Speed: 1000, full duplex
1005 00:11:35.088166 BOOTP broadcast 1
1006 00:11:35.290047 DHCP client bound to address 192.168.6.27 (204 ms)
1007 00:11:35.290971 Sending with 10 millisecond of delay
1009 00:11:36.967901 => setenv serverip 192.168.6.2
1010 00:11:36.979250 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 00:11:36.979899 setenv serverip 192.168.6.2
1012 00:11:36.980915 Sending with 10 millisecond of delay
1014 00:11:40.706231 => tftpboot 0x01080000 955856/tftp-deploy-vinqdq00/kernel/uImage
1015 00:11:40.717121 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 00:11:40.718109 tftpboot 0x01080000 955856/tftp-deploy-vinqdq00/kernel/uImage
1017 00:11:40.718602 Speed: 1000, full duplex
1018 00:11:40.719061 Using ethernet@ff3f0000 device
1019 00:11:40.719594 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 00:11:40.725029 Filename '955856/tftp-deploy-vinqdq00/kernel/uImage'.
1021 00:11:40.728902 Load address: 0x1080000
1022 00:11:43.684295 Loading: *################################################## 43.6 MiB
1023 00:11:43.684704 14.7 MiB/s
1024 00:11:43.684918 done
1025 00:11:43.688594 Bytes transferred = 45713984 (2b98a40 hex)
1026 00:11:43.689096 Sending with 10 millisecond of delay
1028 00:11:48.376642 => tftpboot 0x08000000 955856/tftp-deploy-vinqdq00/ramdisk/ramdisk.cpio.gz.uboot
1029 00:11:48.387252 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 00:11:48.387861 tftpboot 0x08000000 955856/tftp-deploy-vinqdq00/ramdisk/ramdisk.cpio.gz.uboot
1031 00:11:48.388143 Speed: 1000, full duplex
1032 00:11:48.388362 Using ethernet@ff3f0000 device
1033 00:11:48.389978 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 00:11:48.401880 Filename '955856/tftp-deploy-vinqdq00/ramdisk/ramdisk.cpio.gz.uboot'.
1035 00:11:48.402235 Load address: 0x8000000
1036 00:11:55.404617 Loading: *#####################T ############################ UDP wrong checksum 00000005 00009c96
1037 00:12:00.405821 T UDP wrong checksum 00000005 00009c96
1038 00:12:10.408873 T T UDP wrong checksum 00000005 00009c96
1039 00:12:30.412954 T T T T UDP wrong checksum 00000005 00009c96
1040 00:12:44.225472 T T UDP wrong checksum 000000ff 0000ea8d
1041 00:12:44.236219 UDP wrong checksum 000000ff 00007f80
1042 00:12:45.417071
1043 00:12:45.417696 Retry count exceeded; starting again
1045 00:12:45.419083 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1048 00:12:45.420946 end: 2.4 uboot-commands (duration 00:01:47) [common]
1050 00:12:45.422295 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1052 00:12:45.423336 end: 2 uboot-action (duration 00:01:47) [common]
1054 00:12:45.424899 Cleaning after the job
1055 00:12:45.425458 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/ramdisk
1056 00:12:45.426757 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/kernel
1057 00:12:45.471119 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/dtb
1058 00:12:45.471939 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/nfsrootfs
1059 00:12:45.638532 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955856/tftp-deploy-vinqdq00/modules
1060 00:12:45.660098 start: 4.1 power-off (timeout 00:00:30) [common]
1061 00:12:45.660786 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1062 00:12:45.695954 >> OK - accepted request
1063 00:12:45.697982 Returned 0 in 0 seconds
1064 00:12:45.798904 end: 4.1 power-off (duration 00:00:00) [common]
1066 00:12:45.799952 start: 4.2 read-feedback (timeout 00:10:00) [common]
1067 00:12:45.800683 Listened to connection for namespace 'common' for up to 1s
1068 00:12:46.801620 Finalising connection for namespace 'common'
1069 00:12:46.802095 Disconnecting from shell: Finalise
1070 00:12:46.802377 =>
1071 00:12:46.903118 end: 4.2 read-feedback (duration 00:00:01) [common]
1072 00:12:46.903566 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/955856
1073 00:12:49.922358 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/955856
1074 00:12:49.923047 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.