Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:51:35.138324 lava-dispatcher, installed at version: 2024.01
2 23:51:35.139079 start: 0 validate
3 23:51:35.139551 Start time: 2024-11-07 23:51:35.139521+00:00 (UTC)
4 23:51:35.140116 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:51:35.140664 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:51:35.182050 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:51:35.182602 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-63-g2e9baed573ee%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:51:35.210570 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:51:35.211169 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-63-g2e9baed573ee%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 23:51:35.243840 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:51:35.244343 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:51:35.273209 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:51:35.273689 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc5-63-g2e9baed573ee%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:51:35.306093 validate duration: 0.17
16 23:51:35.306934 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:51:35.307256 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:51:35.307572 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:51:35.308166 Not decompressing ramdisk as can be used compressed.
20 23:51:35.308567 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 23:51:35.308843 saving as /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/ramdisk/initrd.cpio.gz
22 23:51:35.309106 total size: 5628140 (5 MB)
23 23:51:35.348900 progress 0 % (0 MB)
24 23:51:35.353313 progress 5 % (0 MB)
25 23:51:35.357745 progress 10 % (0 MB)
26 23:51:35.361759 progress 15 % (0 MB)
27 23:51:35.366075 progress 20 % (1 MB)
28 23:51:35.369932 progress 25 % (1 MB)
29 23:51:35.374375 progress 30 % (1 MB)
30 23:51:35.378754 progress 35 % (1 MB)
31 23:51:35.382757 progress 40 % (2 MB)
32 23:51:35.387066 progress 45 % (2 MB)
33 23:51:35.390907 progress 50 % (2 MB)
34 23:51:35.394940 progress 55 % (2 MB)
35 23:51:35.399076 progress 60 % (3 MB)
36 23:51:35.402805 progress 65 % (3 MB)
37 23:51:35.406817 progress 70 % (3 MB)
38 23:51:35.410537 progress 75 % (4 MB)
39 23:51:35.414988 progress 80 % (4 MB)
40 23:51:35.418885 progress 85 % (4 MB)
41 23:51:35.423011 progress 90 % (4 MB)
42 23:51:35.426973 progress 95 % (5 MB)
43 23:51:35.430300 progress 100 % (5 MB)
44 23:51:35.430944 5 MB downloaded in 0.12 s (44.06 MB/s)
45 23:51:35.431499 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:51:35.432411 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:51:35.432706 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:51:35.432976 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:51:35.433452 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-63-g2e9baed573ee/arm64/defconfig/gcc-12/kernel/Image
51 23:51:35.433698 saving as /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/kernel/Image
52 23:51:35.433906 total size: 45713920 (43 MB)
53 23:51:35.434115 No compression specified
54 23:51:35.474910 progress 0 % (0 MB)
55 23:51:35.503279 progress 5 % (2 MB)
56 23:51:35.532188 progress 10 % (4 MB)
57 23:51:35.560257 progress 15 % (6 MB)
58 23:51:35.587652 progress 20 % (8 MB)
59 23:51:35.614705 progress 25 % (10 MB)
60 23:51:35.642012 progress 30 % (13 MB)
61 23:51:35.669457 progress 35 % (15 MB)
62 23:51:35.697201 progress 40 % (17 MB)
63 23:51:35.724503 progress 45 % (19 MB)
64 23:51:35.751873 progress 50 % (21 MB)
65 23:51:35.779239 progress 55 % (24 MB)
66 23:51:35.806739 progress 60 % (26 MB)
67 23:51:35.833988 progress 65 % (28 MB)
68 23:51:35.861442 progress 70 % (30 MB)
69 23:51:35.889207 progress 75 % (32 MB)
70 23:51:35.916786 progress 80 % (34 MB)
71 23:51:35.943812 progress 85 % (37 MB)
72 23:51:35.971559 progress 90 % (39 MB)
73 23:51:35.999128 progress 95 % (41 MB)
74 23:51:36.026613 progress 100 % (43 MB)
75 23:51:36.027159 43 MB downloaded in 0.59 s (73.49 MB/s)
76 23:51:36.027635 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:51:36.028491 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:51:36.028769 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:51:36.029034 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:51:36.029493 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-63-g2e9baed573ee/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 23:51:36.029757 saving as /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/dtb/meson-g12b-a311d-libretech-cc.dtb
83 23:51:36.029964 total size: 54703 (0 MB)
84 23:51:36.030171 No compression specified
85 23:51:36.061260 progress 59 % (0 MB)
86 23:51:36.062102 progress 100 % (0 MB)
87 23:51:36.062645 0 MB downloaded in 0.03 s (1.60 MB/s)
88 23:51:36.063094 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:51:36.063900 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:51:36.064203 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:51:36.064471 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:51:36.064921 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 23:51:36.065161 saving as /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/nfsrootfs/full.rootfs.tar
95 23:51:36.065362 total size: 474398908 (452 MB)
96 23:51:36.065570 Using unxz to decompress xz
97 23:51:36.096210 progress 0 % (0 MB)
98 23:51:37.195344 progress 5 % (22 MB)
99 23:51:38.639719 progress 10 % (45 MB)
100 23:51:39.099464 progress 15 % (67 MB)
101 23:51:39.961883 progress 20 % (90 MB)
102 23:51:40.513941 progress 25 % (113 MB)
103 23:51:40.888042 progress 30 % (135 MB)
104 23:51:41.506824 progress 35 % (158 MB)
105 23:51:42.459162 progress 40 % (181 MB)
106 23:51:43.188962 progress 45 % (203 MB)
107 23:51:43.748314 progress 50 % (226 MB)
108 23:51:44.404962 progress 55 % (248 MB)
109 23:51:45.672109 progress 60 % (271 MB)
110 23:51:47.151309 progress 65 % (294 MB)
111 23:51:48.882739 progress 70 % (316 MB)
112 23:51:52.303959 progress 75 % (339 MB)
113 23:51:54.740360 progress 80 % (361 MB)
114 23:51:57.836235 progress 85 % (384 MB)
115 23:52:00.974269 progress 90 % (407 MB)
116 23:52:04.138156 progress 95 % (429 MB)
117 23:52:07.255755 progress 100 % (452 MB)
118 23:52:07.268608 452 MB downloaded in 31.20 s (14.50 MB/s)
119 23:52:07.269163 end: 1.4.1 http-download (duration 00:00:31) [common]
121 23:52:07.269979 end: 1.4 download-retry (duration 00:00:31) [common]
122 23:52:07.270243 start: 1.5 download-retry (timeout 00:09:28) [common]
123 23:52:07.270504 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 23:52:07.271065 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc5-63-g2e9baed573ee/arm64/defconfig/gcc-12/modules.tar.xz
125 23:52:07.271321 saving as /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/modules/modules.tar
126 23:52:07.271525 total size: 11603932 (11 MB)
127 23:52:07.271737 Using unxz to decompress xz
128 23:52:07.316713 progress 0 % (0 MB)
129 23:52:07.382961 progress 5 % (0 MB)
130 23:52:07.456391 progress 10 % (1 MB)
131 23:52:07.551520 progress 15 % (1 MB)
132 23:52:07.648317 progress 20 % (2 MB)
133 23:52:07.735875 progress 25 % (2 MB)
134 23:52:07.813804 progress 30 % (3 MB)
135 23:52:07.890064 progress 35 % (3 MB)
136 23:52:07.974663 progress 40 % (4 MB)
137 23:52:08.049981 progress 45 % (5 MB)
138 23:52:08.134297 progress 50 % (5 MB)
139 23:52:08.210437 progress 55 % (6 MB)
140 23:52:08.294049 progress 60 % (6 MB)
141 23:52:08.373271 progress 65 % (7 MB)
142 23:52:08.448901 progress 70 % (7 MB)
143 23:52:08.530741 progress 75 % (8 MB)
144 23:52:08.613261 progress 80 % (8 MB)
145 23:52:08.692736 progress 85 % (9 MB)
146 23:52:08.770439 progress 90 % (9 MB)
147 23:52:08.846936 progress 95 % (10 MB)
148 23:52:08.923012 progress 100 % (11 MB)
149 23:52:08.933405 11 MB downloaded in 1.66 s (6.66 MB/s)
150 23:52:08.934253 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:52:08.935875 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:52:08.936438 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 23:52:08.936949 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 23:52:24.290042 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/955825/extract-nfsrootfs-21zgba4c
156 23:52:24.290651 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 23:52:24.290939 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 23:52:24.291656 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7
159 23:52:24.292149 makedir: /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin
160 23:52:24.292505 makedir: /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/tests
161 23:52:24.292821 makedir: /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/results
162 23:52:24.293145 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-add-keys
163 23:52:24.293667 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-add-sources
164 23:52:24.294187 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-background-process-start
165 23:52:24.294681 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-background-process-stop
166 23:52:24.295196 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-common-functions
167 23:52:24.295680 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-echo-ipv4
168 23:52:24.296206 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-install-packages
169 23:52:24.296767 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-installed-packages
170 23:52:24.297244 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-os-build
171 23:52:24.297721 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-probe-channel
172 23:52:24.298190 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-probe-ip
173 23:52:24.298649 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-target-ip
174 23:52:24.299173 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-target-mac
175 23:52:24.299647 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-target-storage
176 23:52:24.300174 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-test-case
177 23:52:24.300700 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-test-event
178 23:52:24.301166 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-test-feedback
179 23:52:24.301631 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-test-raise
180 23:52:24.302088 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-test-reference
181 23:52:24.302547 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-test-runner
182 23:52:24.303019 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-test-set
183 23:52:24.303481 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-test-shell
184 23:52:24.303999 Updating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-install-packages (oe)
185 23:52:24.304580 Updating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/bin/lava-installed-packages (oe)
186 23:52:24.305013 Creating /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/environment
187 23:52:24.305370 LAVA metadata
188 23:52:24.305626 - LAVA_JOB_ID=955825
189 23:52:24.305837 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:52:24.306190 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 23:52:24.307127 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:52:24.307431 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 23:52:24.307637 skipped lava-vland-overlay
194 23:52:24.307876 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:52:24.308157 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 23:52:24.308377 skipped lava-multinode-overlay
197 23:52:24.308616 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:52:24.308864 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 23:52:24.309105 Loading test definitions
200 23:52:24.309376 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 23:52:24.309594 Using /lava-955825 at stage 0
202 23:52:24.310715 uuid=955825_1.6.2.4.1 testdef=None
203 23:52:24.311014 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:52:24.311272 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 23:52:24.313018 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:52:24.313844 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 23:52:24.316028 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:52:24.316858 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 23:52:24.318888 runner path: /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 955825_1.6.2.4.1
212 23:52:24.319461 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:52:24.320286 Creating lava-test-runner.conf files
215 23:52:24.320488 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/955825/lava-overlay-hdli8oi7/lava-955825/0 for stage 0
216 23:52:24.320823 - 0_v4l2-decoder-conformance-vp9
217 23:52:24.321161 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:52:24.321428 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 23:52:24.342481 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:52:24.342832 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 23:52:24.343084 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:52:24.343344 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:52:24.343599 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 23:52:24.994715 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:52:24.995185 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 23:52:24.995432 extracting modules file /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955825/extract-nfsrootfs-21zgba4c
227 23:52:26.351839 extracting modules file /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955825/extract-overlay-ramdisk-6ilvuosi/ramdisk
228 23:52:27.733856 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:52:27.734322 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 23:52:27.734601 [common] Applying overlay to NFS
231 23:52:27.734813 [common] Applying overlay /var/lib/lava/dispatcher/tmp/955825/compress-overlay-shy9t351/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/955825/extract-nfsrootfs-21zgba4c
232 23:52:27.763745 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:52:27.764129 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 23:52:27.764403 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 23:52:27.764632 Converting downloaded kernel to a uImage
236 23:52:27.764935 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/kernel/Image /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/kernel/uImage
237 23:52:28.246844 output: Image Name:
238 23:52:28.247253 output: Created: Thu Nov 7 23:52:27 2024
239 23:52:28.247463 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:52:28.247667 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 23:52:28.247867 output: Load Address: 01080000
242 23:52:28.248107 output: Entry Point: 01080000
243 23:52:28.248311 output:
244 23:52:28.248648 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:52:28.248914 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:52:28.249181 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 23:52:28.249434 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:52:28.249687 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 23:52:28.249941 Building ramdisk /var/lib/lava/dispatcher/tmp/955825/extract-overlay-ramdisk-6ilvuosi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/955825/extract-overlay-ramdisk-6ilvuosi/ramdisk
250 23:52:30.387059 >> 166774 blocks
251 23:52:38.135927 Adding RAMdisk u-boot header.
252 23:52:38.136640 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/955825/extract-overlay-ramdisk-6ilvuosi/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/955825/extract-overlay-ramdisk-6ilvuosi/ramdisk.cpio.gz.uboot
253 23:52:38.389204 output: Image Name:
254 23:52:38.389640 output: Created: Thu Nov 7 23:52:38 2024
255 23:52:38.389853 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:52:38.390060 output: Data Size: 23428063 Bytes = 22878.97 KiB = 22.34 MiB
257 23:52:38.390263 output: Load Address: 00000000
258 23:52:38.390464 output: Entry Point: 00000000
259 23:52:38.390660 output:
260 23:52:38.391297 rename /var/lib/lava/dispatcher/tmp/955825/extract-overlay-ramdisk-6ilvuosi/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/ramdisk/ramdisk.cpio.gz.uboot
261 23:52:38.391748 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 23:52:38.392133 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 23:52:38.392688 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 23:52:38.393151 No LXC device requested
265 23:52:38.393657 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:52:38.394166 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 23:52:38.394658 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:52:38.395069 Checking files for TFTP limit of 4294967296 bytes.
269 23:52:38.397843 end: 1 tftp-deploy (duration 00:01:03) [common]
270 23:52:38.398469 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:52:38.398994 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:52:38.399493 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:52:38.400019 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:52:38.400562 Using kernel file from prepare-kernel: 955825/tftp-deploy-vyf9qrft/kernel/uImage
275 23:52:38.401198 substitutions:
276 23:52:38.401604 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:52:38.402002 - {DTB_ADDR}: 0x01070000
278 23:52:38.402395 - {DTB}: 955825/tftp-deploy-vyf9qrft/dtb/meson-g12b-a311d-libretech-cc.dtb
279 23:52:38.402790 - {INITRD}: 955825/tftp-deploy-vyf9qrft/ramdisk/ramdisk.cpio.gz.uboot
280 23:52:38.403180 - {KERNEL_ADDR}: 0x01080000
281 23:52:38.403567 - {KERNEL}: 955825/tftp-deploy-vyf9qrft/kernel/uImage
282 23:52:38.403958 - {LAVA_MAC}: None
283 23:52:38.404429 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/955825/extract-nfsrootfs-21zgba4c
284 23:52:38.404825 - {NFS_SERVER_IP}: 192.168.6.2
285 23:52:38.405211 - {PRESEED_CONFIG}: None
286 23:52:38.405598 - {PRESEED_LOCAL}: None
287 23:52:38.405983 - {RAMDISK_ADDR}: 0x08000000
288 23:52:38.406367 - {RAMDISK}: 955825/tftp-deploy-vyf9qrft/ramdisk/ramdisk.cpio.gz.uboot
289 23:52:38.406753 - {ROOT_PART}: None
290 23:52:38.407135 - {ROOT}: None
291 23:52:38.407517 - {SERVER_IP}: 192.168.6.2
292 23:52:38.407901 - {TEE_ADDR}: 0x83000000
293 23:52:38.408317 - {TEE}: None
294 23:52:38.408704 Parsed boot commands:
295 23:52:38.409080 - setenv autoload no
296 23:52:38.409597 - setenv initrd_high 0xffffffff
297 23:52:38.409993 - setenv fdt_high 0xffffffff
298 23:52:38.410383 - dhcp
299 23:52:38.410771 - setenv serverip 192.168.6.2
300 23:52:38.411155 - tftpboot 0x01080000 955825/tftp-deploy-vyf9qrft/kernel/uImage
301 23:52:38.411544 - tftpboot 0x08000000 955825/tftp-deploy-vyf9qrft/ramdisk/ramdisk.cpio.gz.uboot
302 23:52:38.411930 - tftpboot 0x01070000 955825/tftp-deploy-vyf9qrft/dtb/meson-g12b-a311d-libretech-cc.dtb
303 23:52:38.412347 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/955825/extract-nfsrootfs-21zgba4c,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:52:38.412748 - bootm 0x01080000 0x08000000 0x01070000
305 23:52:38.413268 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:52:38.414769 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:52:38.415189 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 23:52:38.429475 Setting prompt string to ['lava-test: # ']
310 23:52:38.431109 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:52:38.431713 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:52:38.432294 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:52:38.432821 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:52:38.433982 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 23:52:38.470379 >> OK - accepted request
316 23:52:38.472697 Returned 0 in 0 seconds
317 23:52:38.573825 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:52:38.575409 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:52:38.576028 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:52:38.576574 Setting prompt string to ['Hit any key to stop autoboot']
322 23:52:38.577049 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:52:38.578690 Trying 192.168.56.21...
324 23:52:38.579189 Connected to conserv1.
325 23:52:38.579606 Escape character is '^]'.
326 23:52:38.580057
327 23:52:38.580486 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 23:52:38.580899
329 23:52:50.432331 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 23:52:50.433009 bl2_stage_init 0x01
331 23:52:50.433425 bl2_stage_init 0x81
332 23:52:50.437780 hw id: 0x0000 - pwm id 0x01
333 23:52:50.438257 bl2_stage_init 0xc1
334 23:52:50.438673 bl2_stage_init 0x02
335 23:52:50.439068
336 23:52:50.443461 L0:00000000
337 23:52:50.444201 L1:20000703
338 23:52:50.444639 L2:00008067
339 23:52:50.445035 L3:14000000
340 23:52:50.448938 B2:00402000
341 23:52:50.449509 B1:e0f83180
342 23:52:50.449926
343 23:52:50.450320 TE: 58159
344 23:52:50.450711
345 23:52:50.454557 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 23:52:50.455060
347 23:52:50.455453 Board ID = 1
348 23:52:50.460079 Set A53 clk to 24M
349 23:52:50.460538 Set A73 clk to 24M
350 23:52:50.460925 Set clk81 to 24M
351 23:52:50.465891 A53 clk: 1200 MHz
352 23:52:50.466337 A73 clk: 1200 MHz
353 23:52:50.466724 CLK81: 166.6M
354 23:52:50.467106 smccc: 00012ab5
355 23:52:50.471357 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 23:52:50.476889 board id: 1
357 23:52:50.482834 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:52:50.493430 fw parse done
359 23:52:50.499404 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:52:50.541990 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:52:50.553067 PIEI prepare done
362 23:52:50.553506 fastboot data load
363 23:52:50.553727 fastboot data verify
364 23:52:50.558548 verify result: 266
365 23:52:50.564120 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 23:52:50.564752 LPDDR4 probe
367 23:52:50.565329 ddr clk to 1584MHz
368 23:52:50.572181 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:52:50.609375
370 23:52:50.610037 dmc_version 0001
371 23:52:50.615961 Check phy result
372 23:52:50.621874 INFO : End of CA training
373 23:52:50.622272 INFO : End of initialization
374 23:52:50.627492 INFO : Training has run successfully!
375 23:52:50.627816 Check phy result
376 23:52:50.633013 INFO : End of initialization
377 23:52:50.633346 INFO : End of read enable training
378 23:52:50.638744 INFO : End of fine write leveling
379 23:52:50.644265 INFO : End of Write leveling coarse delay
380 23:52:50.644637 INFO : Training has run successfully!
381 23:52:50.644870 Check phy result
382 23:52:50.649886 INFO : End of initialization
383 23:52:50.650296 INFO : End of read dq deskew training
384 23:52:50.655477 INFO : End of MPR read delay center optimization
385 23:52:50.661062 INFO : End of write delay center optimization
386 23:52:50.666812 INFO : End of read delay center optimization
387 23:52:50.667233 INFO : End of max read latency training
388 23:52:50.672316 INFO : Training has run successfully!
389 23:52:50.672698 1D training succeed
390 23:52:50.681448 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:52:50.729066 Check phy result
392 23:52:50.729673 INFO : End of initialization
393 23:52:50.751311 INFO : End of 2D read delay Voltage center optimization
394 23:52:50.771156 INFO : End of 2D read delay Voltage center optimization
395 23:52:50.823115 INFO : End of 2D write delay Voltage center optimization
396 23:52:50.872477 INFO : End of 2D write delay Voltage center optimization
397 23:52:50.878008 INFO : Training has run successfully!
398 23:52:50.878586
399 23:52:50.879016 channel==0
400 23:52:50.883556 RxClkDly_Margin_A0==88 ps 9
401 23:52:50.884139 TxDqDly_Margin_A0==98 ps 10
402 23:52:50.889177 RxClkDly_Margin_A1==88 ps 9
403 23:52:50.889735 TxDqDly_Margin_A1==98 ps 10
404 23:52:50.890163 TrainedVREFDQ_A0==74
405 23:52:50.894762 TrainedVREFDQ_A1==74
406 23:52:50.895296 VrefDac_Margin_A0==25
407 23:52:50.895715 DeviceVref_Margin_A0==40
408 23:52:50.900353 VrefDac_Margin_A1==25
409 23:52:50.900810 DeviceVref_Margin_A1==40
410 23:52:50.901223
411 23:52:50.901685
412 23:52:50.905978 channel==1
413 23:52:50.906478 RxClkDly_Margin_A0==98 ps 10
414 23:52:50.906897 TxDqDly_Margin_A0==98 ps 10
415 23:52:50.911543 RxClkDly_Margin_A1==88 ps 9
416 23:52:50.912076 TxDqDly_Margin_A1==88 ps 9
417 23:52:50.917201 TrainedVREFDQ_A0==77
418 23:52:50.917740 TrainedVREFDQ_A1==77
419 23:52:50.918160 VrefDac_Margin_A0==22
420 23:52:50.922793 DeviceVref_Margin_A0==37
421 23:52:50.923311 VrefDac_Margin_A1==24
422 23:52:50.928357 DeviceVref_Margin_A1==37
423 23:52:50.928840
424 23:52:50.929340 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:52:50.929823
426 23:52:50.962006 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 23:52:50.962707 2D training succeed
428 23:52:50.967569 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:52:50.973135 auto size-- 65535DDR cs0 size: 2048MB
430 23:52:50.973613 DDR cs1 size: 2048MB
431 23:52:50.978757 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:52:50.979220 cs0 DataBus test pass
433 23:52:50.984393 cs1 DataBus test pass
434 23:52:50.984986 cs0 AddrBus test pass
435 23:52:50.985691 cs1 AddrBus test pass
436 23:52:50.986138
437 23:52:50.989979 100bdlr_step_size ps== 420
438 23:52:50.990507 result report
439 23:52:50.995555 boot times 0Enable ddr reg access
440 23:52:51.000944 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:52:51.014399 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 23:52:51.587561 0.0;M3 CHK:0;cm4_sp_mode 0
443 23:52:51.588056 MVN_1=0x00000000
444 23:52:51.593095 MVN_2=0x00000000
445 23:52:51.598958 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 23:52:51.599369 OPS=0x10
447 23:52:51.599592 ring efuse init
448 23:52:51.599806 chipver efuse init
449 23:52:51.607058 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 23:52:51.607476 [0.018961 Inits done]
451 23:52:51.614720 secure task start!
452 23:52:51.615123 high task start!
453 23:52:51.615330 low task start!
454 23:52:51.615532 run into bl31
455 23:52:51.621296 NOTICE: BL31: v1.3(release):4fc40b1
456 23:52:51.629044 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 23:52:51.629420 NOTICE: BL31: G12A normal boot!
458 23:52:51.655004 NOTICE: BL31: BL33 decompress pass
459 23:52:51.660161 ERROR: Error initializing runtime service opteed_fast
460 23:52:52.893085
461 23:52:52.893746
462 23:52:52.901482 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 23:52:52.902004
464 23:52:52.902450 Model: Libre Computer AML-A311D-CC Alta
465 23:52:53.109951 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 23:52:53.133322 DRAM: 2 GiB (effective 3.8 GiB)
467 23:52:53.276362 Core: 408 devices, 31 uclasses, devicetree: separate
468 23:52:53.282294 WDT: Not starting watchdog@f0d0
469 23:52:53.314450 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 23:52:53.326919 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 23:52:53.331917 ** Bad device specification mmc 0 **
472 23:52:53.342204 Card did not respond to voltage select! : -110
473 23:52:53.350142 ** Bad device specification mmc 0 **
474 23:52:53.350673 Couldn't find partition mmc 0
475 23:52:53.358226 Card did not respond to voltage select! : -110
476 23:52:53.363786 ** Bad device specification mmc 0 **
477 23:52:53.364375 Couldn't find partition mmc 0
478 23:52:53.368793 Error: could not access storage.
479 23:52:54.632764 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 23:52:54.633416 bl2_stage_init 0x01
481 23:52:54.633885 bl2_stage_init 0x81
482 23:52:54.638411 hw id: 0x0000 - pwm id 0x01
483 23:52:54.638932 bl2_stage_init 0xc1
484 23:52:54.639386 bl2_stage_init 0x02
485 23:52:54.639830
486 23:52:54.644010 L0:00000000
487 23:52:54.644544 L1:20000703
488 23:52:54.644996 L2:00008067
489 23:52:54.645440 L3:14000000
490 23:52:54.649578 B2:00402000
491 23:52:54.650114 B1:e0f83180
492 23:52:54.650563
493 23:52:54.651005 TE: 58167
494 23:52:54.651444
495 23:52:54.655139 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 23:52:54.655665
497 23:52:54.656162 Board ID = 1
498 23:52:54.660797 Set A53 clk to 24M
499 23:52:54.661317 Set A73 clk to 24M
500 23:52:54.661768 Set clk81 to 24M
501 23:52:54.666425 A53 clk: 1200 MHz
502 23:52:54.667015 A73 clk: 1200 MHz
503 23:52:54.667480 CLK81: 166.6M
504 23:52:54.667919 smccc: 00012abe
505 23:52:54.672068 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 23:52:54.677584 board id: 1
507 23:52:54.683472 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 23:52:54.694170 fw parse done
509 23:52:54.700080 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 23:52:54.742700 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 23:52:54.753631 PIEI prepare done
512 23:52:54.754188 fastboot data load
513 23:52:54.754641 fastboot data verify
514 23:52:54.759226 verify result: 266
515 23:52:54.764817 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 23:52:54.765342 LPDDR4 probe
517 23:52:54.765792 ddr clk to 1584MHz
518 23:52:54.772826 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 23:52:54.810029
520 23:52:54.810592 dmc_version 0001
521 23:52:54.816696 Check phy result
522 23:52:54.822622 INFO : End of CA training
523 23:52:54.823178 INFO : End of initialization
524 23:52:54.828277 INFO : Training has run successfully!
525 23:52:54.828868 Check phy result
526 23:52:54.833809 INFO : End of initialization
527 23:52:54.834331 INFO : End of read enable training
528 23:52:54.839446 INFO : End of fine write leveling
529 23:52:54.844988 INFO : End of Write leveling coarse delay
530 23:52:54.845528 INFO : Training has run successfully!
531 23:52:54.845978 Check phy result
532 23:52:54.850557 INFO : End of initialization
533 23:52:54.851092 INFO : End of read dq deskew training
534 23:52:54.856236 INFO : End of MPR read delay center optimization
535 23:52:54.861775 INFO : End of write delay center optimization
536 23:52:54.867431 INFO : End of read delay center optimization
537 23:52:54.867944 INFO : End of max read latency training
538 23:52:54.873028 INFO : Training has run successfully!
539 23:52:54.873574 1D training succeed
540 23:52:54.882209 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 23:52:54.929784 Check phy result
542 23:52:54.930340 INFO : End of initialization
543 23:52:54.952240 INFO : End of 2D read delay Voltage center optimization
544 23:52:54.972377 INFO : End of 2D read delay Voltage center optimization
545 23:52:55.024357 INFO : End of 2D write delay Voltage center optimization
546 23:52:55.073565 INFO : End of 2D write delay Voltage center optimization
547 23:52:55.078997 INFO : Training has run successfully!
548 23:52:55.079551
549 23:52:55.080083 channel==0
550 23:52:55.084604 RxClkDly_Margin_A0==88 ps 9
551 23:52:55.085147 TxDqDly_Margin_A0==98 ps 10
552 23:52:55.087852 RxClkDly_Margin_A1==88 ps 9
553 23:52:55.088409 TxDqDly_Margin_A1==98 ps 10
554 23:52:55.093492 TrainedVREFDQ_A0==74
555 23:52:55.094028 TrainedVREFDQ_A1==76
556 23:52:55.099028 VrefDac_Margin_A0==24
557 23:52:55.099549 DeviceVref_Margin_A0==40
558 23:52:55.100025 VrefDac_Margin_A1==24
559 23:52:55.104632 DeviceVref_Margin_A1==38
560 23:52:55.105143
561 23:52:55.105596
562 23:52:55.106037 channel==1
563 23:52:55.106472 RxClkDly_Margin_A0==98 ps 10
564 23:52:55.110195 TxDqDly_Margin_A0==88 ps 9
565 23:52:55.110713 RxClkDly_Margin_A1==88 ps 9
566 23:52:55.115833 TxDqDly_Margin_A1==88 ps 9
567 23:52:55.116393 TrainedVREFDQ_A0==77
568 23:52:55.116846 TrainedVREFDQ_A1==77
569 23:52:55.121469 VrefDac_Margin_A0==22
570 23:52:55.121977 DeviceVref_Margin_A0==37
571 23:52:55.127019 VrefDac_Margin_A1==24
572 23:52:55.127537 DeviceVref_Margin_A1==37
573 23:52:55.128014
574 23:52:55.132610 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 23:52:55.133122
576 23:52:55.160545 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
577 23:52:55.166203 2D training succeed
578 23:52:55.171884 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 23:52:55.172474 auto size-- 65535DDR cs0 size: 2048MB
580 23:52:55.177485 DDR cs1 size: 2048MB
581 23:52:55.178007 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 23:52:55.183002 cs0 DataBus test pass
583 23:52:55.183514 cs1 DataBus test pass
584 23:52:55.183961 cs0 AddrBus test pass
585 23:52:55.188612 cs1 AddrBus test pass
586 23:52:55.189121
587 23:52:55.189569 100bdlr_step_size ps== 420
588 23:52:55.190022 result report
589 23:52:55.194236 boot times 0Enable ddr reg access
590 23:52:55.201888 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 23:52:55.215274 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 23:52:55.787514 0.0;M3 CHK:0;cm4_sp_mode 0
593 23:52:55.788226 MVN_1=0x00000000
594 23:52:55.792973 MVN_2=0x00000000
595 23:52:55.798684 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 23:52:55.799228 OPS=0x10
597 23:52:55.799709 ring efuse init
598 23:52:55.800366 chipver efuse init
599 23:52:55.804415 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 23:52:55.809796 [0.018961 Inits done]
601 23:52:55.810235 secure task start!
602 23:52:55.810629 high task start!
603 23:52:55.814384 low task start!
604 23:52:55.814805 run into bl31
605 23:52:55.820920 NOTICE: BL31: v1.3(release):4fc40b1
606 23:52:55.828769 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 23:52:55.829219 NOTICE: BL31: G12A normal boot!
608 23:52:55.854190 NOTICE: BL31: BL33 decompress pass
609 23:52:55.859820 ERROR: Error initializing runtime service opteed_fast
610 23:52:57.092830
611 23:52:57.093469
612 23:52:57.101089 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 23:52:57.101546
614 23:52:57.101965 Model: Libre Computer AML-A311D-CC Alta
615 23:52:57.309723 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 23:52:57.332907 DRAM: 2 GiB (effective 3.8 GiB)
617 23:52:57.476044 Core: 408 devices, 31 uclasses, devicetree: separate
618 23:52:57.481520 WDT: Not starting watchdog@f0d0
619 23:52:57.514146 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 23:52:57.526516 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 23:52:57.531514 ** Bad device specification mmc 0 **
622 23:52:57.541768 Card did not respond to voltage select! : -110
623 23:52:57.549514 ** Bad device specification mmc 0 **
624 23:52:57.549874 Couldn't find partition mmc 0
625 23:52:57.557735 Card did not respond to voltage select! : -110
626 23:52:57.563277 ** Bad device specification mmc 0 **
627 23:52:57.563703 Couldn't find partition mmc 0
628 23:52:57.568405 Error: could not access storage.
629 23:52:57.912085 Net: eth0: ethernet@ff3f0000
630 23:52:57.912752 starting USB...
631 23:52:58.163705 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 23:52:58.164377 Starting the controller
633 23:52:58.170789 USB XHCI 1.10
634 23:52:59.881146 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 23:52:59.881822 bl2_stage_init 0x01
636 23:52:59.882290 bl2_stage_init 0x81
637 23:52:59.886721 hw id: 0x0000 - pwm id 0x01
638 23:52:59.887220 bl2_stage_init 0xc1
639 23:52:59.887667 bl2_stage_init 0x02
640 23:52:59.888162
641 23:52:59.892367 L0:00000000
642 23:52:59.892850 L1:20000703
643 23:52:59.893294 L2:00008067
644 23:52:59.893732 L3:14000000
645 23:52:59.895466 B2:00402000
646 23:52:59.895938 B1:e0f83180
647 23:52:59.896421
648 23:52:59.896865 TE: 58159
649 23:52:59.897302
650 23:52:59.906420 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 23:52:59.906913
652 23:52:59.907365 Board ID = 1
653 23:52:59.907804 Set A53 clk to 24M
654 23:52:59.908281 Set A73 clk to 24M
655 23:52:59.912196 Set clk81 to 24M
656 23:52:59.912670 A53 clk: 1200 MHz
657 23:52:59.913111 A73 clk: 1200 MHz
658 23:52:59.915648 CLK81: 166.6M
659 23:52:59.916150 smccc: 00012ab5
660 23:52:59.921337 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 23:52:59.926892 board id: 1
662 23:52:59.932024 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 23:52:59.942439 fw parse done
664 23:52:59.948441 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 23:52:59.991132 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 23:53:00.002150 PIEI prepare done
667 23:53:00.002643 fastboot data load
668 23:53:00.003094 fastboot data verify
669 23:53:00.007552 verify result: 266
670 23:53:00.013153 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 23:53:00.013639 LPDDR4 probe
672 23:53:00.014093 ddr clk to 1584MHz
673 23:53:00.021278 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 23:53:00.058551
675 23:53:00.059055 dmc_version 0001
676 23:53:00.064492 Check phy result
677 23:53:00.070957 INFO : End of CA training
678 23:53:00.071426 INFO : End of initialization
679 23:53:00.076594 INFO : Training has run successfully!
680 23:53:00.077071 Check phy result
681 23:53:00.082148 INFO : End of initialization
682 23:53:00.082621 INFO : End of read enable training
683 23:53:00.085448 INFO : End of fine write leveling
684 23:53:00.091071 INFO : End of Write leveling coarse delay
685 23:53:00.096760 INFO : Training has run successfully!
686 23:53:00.097233 Check phy result
687 23:53:00.097680 INFO : End of initialization
688 23:53:00.102297 INFO : End of read dq deskew training
689 23:53:00.107970 INFO : End of MPR read delay center optimization
690 23:53:00.108483 INFO : End of write delay center optimization
691 23:53:00.113471 INFO : End of read delay center optimization
692 23:53:00.119132 INFO : End of max read latency training
693 23:53:00.119603 INFO : Training has run successfully!
694 23:53:00.124656 1D training succeed
695 23:53:00.129827 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 23:53:00.178255 Check phy result
697 23:53:00.178745 INFO : End of initialization
698 23:53:00.199920 INFO : End of 2D read delay Voltage center optimization
699 23:53:00.220307 INFO : End of 2D read delay Voltage center optimization
700 23:53:00.271263 INFO : End of 2D write delay Voltage center optimization
701 23:53:00.321568 INFO : End of 2D write delay Voltage center optimization
702 23:53:00.327212 INFO : Training has run successfully!
703 23:53:00.327684
704 23:53:00.328165 channel==0
705 23:53:00.332727 RxClkDly_Margin_A0==88 ps 9
706 23:53:00.333223 TxDqDly_Margin_A0==98 ps 10
707 23:53:00.338337 RxClkDly_Margin_A1==88 ps 9
708 23:53:00.338811 TxDqDly_Margin_A1==98 ps 10
709 23:53:00.339261 TrainedVREFDQ_A0==74
710 23:53:00.343852 TrainedVREFDQ_A1==74
711 23:53:00.344352 VrefDac_Margin_A0==25
712 23:53:00.344799 DeviceVref_Margin_A0==40
713 23:53:00.349449 VrefDac_Margin_A1==25
714 23:53:00.349921 DeviceVref_Margin_A1==40
715 23:53:00.350358
716 23:53:00.350793
717 23:53:00.355139 channel==1
718 23:53:00.355606 RxClkDly_Margin_A0==98 ps 10
719 23:53:00.356078 TxDqDly_Margin_A0==88 ps 9
720 23:53:00.361250 RxClkDly_Margin_A1==98 ps 10
721 23:53:00.361721 TxDqDly_Margin_A1==98 ps 10
722 23:53:00.366217 TrainedVREFDQ_A0==77
723 23:53:00.366690 TrainedVREFDQ_A1==78
724 23:53:00.367136 VrefDac_Margin_A0==22
725 23:53:00.371861 DeviceVref_Margin_A0==37
726 23:53:00.372431 VrefDac_Margin_A1==24
727 23:53:00.377452 DeviceVref_Margin_A1==36
728 23:53:00.378176
729 23:53:00.378849 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 23:53:00.383183
731 23:53:00.411168 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 23:53:00.411764 2D training succeed
733 23:53:00.416720 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 23:53:00.422305 auto size-- 65535DDR cs0 size: 2048MB
735 23:53:00.422783 DDR cs1 size: 2048MB
736 23:53:00.427848 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 23:53:00.428359 cs0 DataBus test pass
738 23:53:00.433455 cs1 DataBus test pass
739 23:53:00.433925 cs0 AddrBus test pass
740 23:53:00.434366 cs1 AddrBus test pass
741 23:53:00.434801
742 23:53:00.439071 100bdlr_step_size ps== 420
743 23:53:00.439557 result report
744 23:53:00.444665 boot times 0Enable ddr reg access
745 23:53:00.449221 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 23:53:00.463690 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 23:53:01.036725 0.0;M3 CHK:0;cm4_sp_mode 0
748 23:53:01.037336 MVN_1=0x00000000
749 23:53:01.042170 MVN_2=0x00000000
750 23:53:01.047940 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 23:53:01.048514 OPS=0x10
752 23:53:01.048949 ring efuse init
753 23:53:01.049374 chipver efuse init
754 23:53:01.053566 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 23:53:01.059211 [0.018961 Inits done]
756 23:53:01.059670 secure task start!
757 23:53:01.060138 high task start!
758 23:53:01.063691 low task start!
759 23:53:01.064170 run into bl31
760 23:53:01.070330 NOTICE: BL31: v1.3(release):4fc40b1
761 23:53:01.078238 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 23:53:01.078703 NOTICE: BL31: G12A normal boot!
763 23:53:01.103588 NOTICE: BL31: BL33 decompress pass
764 23:53:01.109336 ERROR: Error initializing runtime service opteed_fast
765 23:53:02.342016
766 23:53:02.342655
767 23:53:02.350402 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 23:53:02.350894
769 23:53:02.351348 Model: Libre Computer AML-A311D-CC Alta
770 23:53:02.558879 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 23:53:02.581403 DRAM: 2 GiB (effective 3.8 GiB)
772 23:53:02.725394 Core: 408 devices, 31 uclasses, devicetree: separate
773 23:53:02.731128 WDT: Not starting watchdog@f0d0
774 23:53:02.763518 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 23:53:02.775966 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 23:53:02.780881 ** Bad device specification mmc 0 **
777 23:53:02.791210 Card did not respond to voltage select! : -110
778 23:53:02.798852 ** Bad device specification mmc 0 **
779 23:53:02.799333 Couldn't find partition mmc 0
780 23:53:02.807246 Card did not respond to voltage select! : -110
781 23:53:02.812750 ** Bad device specification mmc 0 **
782 23:53:02.813295 Couldn't find partition mmc 0
783 23:53:02.817790 Error: could not access storage.
784 23:53:03.161336 Net: eth0: ethernet@ff3f0000
785 23:53:03.161987 starting USB...
786 23:53:03.413182 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 23:53:03.413823 Starting the controller
788 23:53:03.420151 USB XHCI 1.10
789 23:53:05.582183 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 23:53:05.582822 bl2_stage_init 0x01
791 23:53:05.583292 bl2_stage_init 0x81
792 23:53:05.587575 hw id: 0x0000 - pwm id 0x01
793 23:53:05.588081 bl2_stage_init 0xc1
794 23:53:05.588540 bl2_stage_init 0x02
795 23:53:05.588984
796 23:53:05.593199 L0:00000000
797 23:53:05.593672 L1:20000703
798 23:53:05.594115 L2:00008067
799 23:53:05.594551 L3:14000000
800 23:53:05.596092 B2:00402000
801 23:53:05.596558 B1:e0f83180
802 23:53:05.597000
803 23:53:05.597440 TE: 58124
804 23:53:05.597875
805 23:53:05.607228 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 23:53:05.607702
807 23:53:05.608184 Board ID = 1
808 23:53:05.608626 Set A53 clk to 24M
809 23:53:05.609059 Set A73 clk to 24M
810 23:53:05.612856 Set clk81 to 24M
811 23:53:05.613319 A53 clk: 1200 MHz
812 23:53:05.613758 A73 clk: 1200 MHz
813 23:53:05.618429 CLK81: 166.6M
814 23:53:05.618884 smccc: 00012a92
815 23:53:05.624062 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 23:53:05.624528 board id: 1
817 23:53:05.629631 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 23:53:05.643416 fw parse done
819 23:53:05.649400 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 23:53:05.691975 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 23:53:05.702876 PIEI prepare done
822 23:53:05.703348 fastboot data load
823 23:53:05.703797 fastboot data verify
824 23:53:05.708464 verify result: 266
825 23:53:05.714050 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 23:53:05.714529 LPDDR4 probe
827 23:53:05.714973 ddr clk to 1584MHz
828 23:53:05.722029 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 23:53:05.758568
830 23:53:05.759056 dmc_version 0001
831 23:53:05.765998 Check phy result
832 23:53:05.771895 INFO : End of CA training
833 23:53:05.772404 INFO : End of initialization
834 23:53:05.777497 INFO : Training has run successfully!
835 23:53:05.777966 Check phy result
836 23:53:05.783108 INFO : End of initialization
837 23:53:05.783576 INFO : End of read enable training
838 23:53:05.788645 INFO : End of fine write leveling
839 23:53:05.794235 INFO : End of Write leveling coarse delay
840 23:53:05.794706 INFO : Training has run successfully!
841 23:53:05.795148 Check phy result
842 23:53:05.799936 INFO : End of initialization
843 23:53:05.800440 INFO : End of read dq deskew training
844 23:53:05.805458 INFO : End of MPR read delay center optimization
845 23:53:05.810964 INFO : End of write delay center optimization
846 23:53:05.816599 INFO : End of read delay center optimization
847 23:53:05.817078 INFO : End of max read latency training
848 23:53:05.822202 INFO : Training has run successfully!
849 23:53:05.822670 1D training succeed
850 23:53:05.831446 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 23:53:05.878206 Check phy result
852 23:53:05.878832 INFO : End of initialization
853 23:53:05.899936 INFO : End of 2D read delay Voltage center optimization
854 23:53:05.920568 INFO : End of 2D read delay Voltage center optimization
855 23:53:05.973194 INFO : End of 2D write delay Voltage center optimization
856 23:53:06.022580 INFO : End of 2D write delay Voltage center optimization
857 23:53:06.028087 INFO : Training has run successfully!
858 23:53:06.028609
859 23:53:06.029071 channel==0
860 23:53:06.033648 RxClkDly_Margin_A0==88 ps 9
861 23:53:06.034184 TxDqDly_Margin_A0==98 ps 10
862 23:53:06.036845 RxClkDly_Margin_A1==88 ps 9
863 23:53:06.037343 TxDqDly_Margin_A1==98 ps 10
864 23:53:06.042450 TrainedVREFDQ_A0==74
865 23:53:06.043056 TrainedVREFDQ_A1==74
866 23:53:06.043518 VrefDac_Margin_A0==25
867 23:53:06.048093 DeviceVref_Margin_A0==40
868 23:53:06.048689 VrefDac_Margin_A1==25
869 23:53:06.053755 DeviceVref_Margin_A1==40
870 23:53:06.054243
871 23:53:06.054671
872 23:53:06.055096 channel==1
873 23:53:06.055521 RxClkDly_Margin_A0==98 ps 10
874 23:53:06.057066 TxDqDly_Margin_A0==98 ps 10
875 23:53:06.062608 RxClkDly_Margin_A1==88 ps 9
876 23:53:06.063097 TxDqDly_Margin_A1==88 ps 9
877 23:53:06.063538 TrainedVREFDQ_A0==77
878 23:53:06.068286 TrainedVREFDQ_A1==77
879 23:53:06.068846 VrefDac_Margin_A0==22
880 23:53:06.073682 DeviceVref_Margin_A0==37
881 23:53:06.074234 VrefDac_Margin_A1==24
882 23:53:06.074688 DeviceVref_Margin_A1==37
883 23:53:06.075113
884 23:53:06.079422 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 23:53:06.079899
886 23:53:06.113013 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
887 23:53:06.113558 2D training succeed
888 23:53:06.118527 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 23:53:06.124791 auto size-- 65535DDR cs0 size: 2048MB
890 23:53:06.125281 DDR cs1 size: 2048MB
891 23:53:06.129784 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 23:53:06.130275 cs0 DataBus test pass
893 23:53:06.130706 cs1 DataBus test pass
894 23:53:06.135362 cs0 AddrBus test pass
895 23:53:06.135854 cs1 AddrBus test pass
896 23:53:06.136338
897 23:53:06.140978 100bdlr_step_size ps== 420
898 23:53:06.141468 result report
899 23:53:06.141913 boot times 0Enable ddr reg access
900 23:53:06.150975 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 23:53:06.164348 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 23:53:06.737616 0.0;M3 CHK:0;cm4_sp_mode 0
903 23:53:06.738268 MVN_1=0x00000000
904 23:53:06.743023 MVN_2=0x00000000
905 23:53:06.748765 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 23:53:06.749251 OPS=0x10
907 23:53:06.749733 ring efuse init
908 23:53:06.750188 chipver efuse init
909 23:53:06.754394 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 23:53:06.760089 [0.018961 Inits done]
911 23:53:06.760702 secure task start!
912 23:53:06.761265 high task start!
913 23:53:06.764587 low task start!
914 23:53:06.765132 run into bl31
915 23:53:06.771186 NOTICE: BL31: v1.3(release):4fc40b1
916 23:53:06.778082 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 23:53:06.778613 NOTICE: BL31: G12A normal boot!
918 23:53:06.804390 NOTICE: BL31: BL33 decompress pass
919 23:53:06.810075 ERROR: Error initializing runtime service opteed_fast
920 23:53:08.042830
921 23:53:08.043231
922 23:53:08.051215 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 23:53:08.051522
924 23:53:08.051765 Model: Libre Computer AML-A311D-CC Alta
925 23:53:08.258861 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 23:53:08.283114 DRAM: 2 GiB (effective 3.8 GiB)
927 23:53:08.426094 Core: 408 devices, 31 uclasses, devicetree: separate
928 23:53:08.431915 WDT: Not starting watchdog@f0d0
929 23:53:08.464230 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 23:53:08.476646 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 23:53:08.481621 ** Bad device specification mmc 0 **
932 23:53:08.491993 Card did not respond to voltage select! : -110
933 23:53:08.499607 ** Bad device specification mmc 0 **
934 23:53:08.499916 Couldn't find partition mmc 0
935 23:53:08.507940 Card did not respond to voltage select! : -110
936 23:53:08.513500 ** Bad device specification mmc 0 **
937 23:53:08.513878 Couldn't find partition mmc 0
938 23:53:08.518592 Error: could not access storage.
939 23:53:08.861041 Net: eth0: ethernet@ff3f0000
940 23:53:08.861477 starting USB...
941 23:53:09.112812 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 23:53:09.113411 Starting the controller
943 23:53:09.119708 USB XHCI 1.10
944 23:53:10.981227 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
945 23:53:10.981893 bl2_stage_init 0x01
946 23:53:10.982364 bl2_stage_init 0x81
947 23:53:10.986716 hw id: 0x0000 - pwm id 0x01
948 23:53:10.987203 bl2_stage_init 0xc1
949 23:53:10.987656 bl2_stage_init 0x02
950 23:53:10.988153
951 23:53:10.992379 L0:00000000
952 23:53:10.992855 L1:20000703
953 23:53:10.993302 L2:00008067
954 23:53:10.993740 L3:14000000
955 23:53:10.997967 B2:00402000
956 23:53:10.998436 B1:e0f83180
957 23:53:10.998882
958 23:53:10.999325 TE: 58124
959 23:53:10.999769
960 23:53:11.003640 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
961 23:53:11.004163
962 23:53:11.004622 Board ID = 1
963 23:53:11.009085 Set A53 clk to 24M
964 23:53:11.009560 Set A73 clk to 24M
965 23:53:11.010001 Set clk81 to 24M
966 23:53:11.014775 A53 clk: 1200 MHz
967 23:53:11.015249 A73 clk: 1200 MHz
968 23:53:11.015690 CLK81: 166.6M
969 23:53:11.016160 smccc: 00012a91
970 23:53:11.020415 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
971 23:53:11.025913 board id: 1
972 23:53:11.031886 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
973 23:53:11.042477 fw parse done
974 23:53:11.048612 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
975 23:53:11.091085 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
976 23:53:11.101912 PIEI prepare done
977 23:53:11.102382 fastboot data load
978 23:53:11.102813 fastboot data verify
979 23:53:11.107605 verify result: 266
980 23:53:11.113105 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
981 23:53:11.113567 LPDDR4 probe
982 23:53:11.113990 ddr clk to 1584MHz
983 23:53:11.120232 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
984 23:53:11.158468
985 23:53:11.159028 dmc_version 0001
986 23:53:11.165130 Check phy result
987 23:53:11.170967 INFO : End of CA training
988 23:53:11.171430 INFO : End of initialization
989 23:53:11.176646 INFO : Training has run successfully!
990 23:53:11.177105 Check phy result
991 23:53:11.182159 INFO : End of initialization
992 23:53:11.182620 INFO : End of read enable training
993 23:53:11.187740 INFO : End of fine write leveling
994 23:53:11.193381 INFO : End of Write leveling coarse delay
995 23:53:11.193851 INFO : Training has run successfully!
996 23:53:11.194280 Check phy result
997 23:53:11.198954 INFO : End of initialization
998 23:53:11.199412 INFO : End of read dq deskew training
999 23:53:11.204649 INFO : End of MPR read delay center optimization
1000 23:53:11.210147 INFO : End of write delay center optimization
1001 23:53:11.215745 INFO : End of read delay center optimization
1002 23:53:11.216251 INFO : End of max read latency training
1003 23:53:11.221364 INFO : Training has run successfully!
1004 23:53:11.221826 1D training succeed
1005 23:53:11.230529 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1006 23:53:11.278162 Check phy result
1007 23:53:11.278731 INFO : End of initialization
1008 23:53:11.299932 INFO : End of 2D read delay Voltage center optimization
1009 23:53:11.320222 INFO : End of 2D read delay Voltage center optimization
1010 23:53:11.372317 INFO : End of 2D write delay Voltage center optimization
1011 23:53:11.421696 INFO : End of 2D write delay Voltage center optimization
1012 23:53:11.427233 INFO : Training has run successfully!
1013 23:53:11.427728
1014 23:53:11.428256 channel==0
1015 23:53:11.432717 RxClkDly_Margin_A0==88 ps 9
1016 23:53:11.433214 TxDqDly_Margin_A0==98 ps 10
1017 23:53:11.436079 RxClkDly_Margin_A1==78 ps 8
1018 23:53:11.436562 TxDqDly_Margin_A1==98 ps 10
1019 23:53:11.441700 TrainedVREFDQ_A0==74
1020 23:53:11.442176 TrainedVREFDQ_A1==74
1021 23:53:11.447187 VrefDac_Margin_A0==25
1022 23:53:11.447671 DeviceVref_Margin_A0==40
1023 23:53:11.448159 VrefDac_Margin_A1==25
1024 23:53:11.452832 DeviceVref_Margin_A1==40
1025 23:53:11.453368
1026 23:53:11.453852
1027 23:53:11.454288 channel==1
1028 23:53:11.454714 RxClkDly_Margin_A0==88 ps 9
1029 23:53:11.458415 TxDqDly_Margin_A0==88 ps 9
1030 23:53:11.458889 RxClkDly_Margin_A1==98 ps 10
1031 23:53:11.463926 TxDqDly_Margin_A1==88 ps 9
1032 23:53:11.464430 TrainedVREFDQ_A0==77
1033 23:53:11.464872 TrainedVREFDQ_A1==77
1034 23:53:11.469742 VrefDac_Margin_A0==22
1035 23:53:11.470206 DeviceVref_Margin_A0==37
1036 23:53:11.475155 VrefDac_Margin_A1==22
1037 23:53:11.475618 DeviceVref_Margin_A1==37
1038 23:53:11.476080
1039 23:53:11.480735 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1040 23:53:11.481198
1041 23:53:11.508714 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000019 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
1042 23:53:11.514268 2D training succeed
1043 23:53:11.519972 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1044 23:53:11.520475 auto size-- 65535DDR cs0 size: 2048MB
1045 23:53:11.525614 DDR cs1 size: 2048MB
1046 23:53:11.526086 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1047 23:53:11.531061 cs0 DataBus test pass
1048 23:53:11.531524 cs1 DataBus test pass
1049 23:53:11.531955 cs0 AddrBus test pass
1050 23:53:11.536691 cs1 AddrBus test pass
1051 23:53:11.537158
1052 23:53:11.537590 100bdlr_step_size ps== 420
1053 23:53:11.538029 result report
1054 23:53:11.542268 boot times 0Enable ddr reg access
1055 23:53:11.549902 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1056 23:53:11.563408 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1057 23:53:12.136627 0.0;M3 CHK:0;cm4_sp_mode 0
1058 23:53:12.137314 MVN_1=0x00000000
1059 23:53:12.142009 MVN_2=0x00000000
1060 23:53:12.147791 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1061 23:53:12.148366 OPS=0x10
1062 23:53:12.148829 ring efuse init
1063 23:53:12.149273 chipver efuse init
1064 23:53:12.156047 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1065 23:53:12.156647 [0.018961 Inits done]
1066 23:53:12.163565 secure task start!
1067 23:53:12.164148 high task start!
1068 23:53:12.164608 low task start!
1069 23:53:12.165048 run into bl31
1070 23:53:12.170199 NOTICE: BL31: v1.3(release):4fc40b1
1071 23:53:12.177986 NOTICE: BL31: Built : 15:58:17, May 22 2019
1072 23:53:12.178485 NOTICE: BL31: G12A normal boot!
1073 23:53:12.203404 NOTICE: BL31: BL33 decompress pass
1074 23:53:12.208142 ERROR: Error initializing runtime service opteed_fast
1075 23:53:13.442097
1076 23:53:13.442740
1077 23:53:13.450313 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1078 23:53:13.450815
1079 23:53:13.451272 Model: Libre Computer AML-A311D-CC Alta
1080 23:53:13.657895 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1081 23:53:13.681515 DRAM: 2 GiB (effective 3.8 GiB)
1082 23:53:13.825259 Core: 408 devices, 31 uclasses, devicetree: separate
1083 23:53:13.831007 WDT: Not starting watchdog@f0d0
1084 23:53:13.863286 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1085 23:53:13.875780 Loading Environment from FAT... Card did not respond to voltage select! : -110
1086 23:53:13.880771 ** Bad device specification mmc 0 **
1087 23:53:13.891039 Card did not respond to voltage select! : -110
1088 23:53:13.898677 ** Bad device specification mmc 0 **
1089 23:53:13.899159 Couldn't find partition mmc 0
1090 23:53:13.907005 Card did not respond to voltage select! : -110
1091 23:53:13.912569 ** Bad device specification mmc 0 **
1092 23:53:13.913050 Couldn't find partition mmc 0
1093 23:53:13.917597 Error: could not access storage.
1094 23:53:14.261140 Net: eth0: ethernet@ff3f0000
1095 23:53:14.261792 starting USB...
1096 23:53:14.512982 Bus usb@ff500000: Register 3000140 NbrPorts 3
1097 23:53:14.513643 Starting the controller
1098 23:53:14.519922 USB XHCI 1.10
1099 23:53:16.073877 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1100 23:53:16.082200 scanning usb for storage devices... 0 Storage Device(s) found
1102 23:53:16.133918 Hit any key to stop autoboot: 1
1103 23:53:16.134753 end: 2.4.2 bootloader-interrupt (duration 00:00:38) [common]
1104 23:53:16.135387 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1105 23:53:16.135886 Setting prompt string to ['=>']
1106 23:53:16.136463 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1107 23:53:16.149680 0
1108 23:53:16.150759 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1109 23:53:16.151400 Sending with 10 millisecond of delay
1111 23:53:17.287174 => setenv autoload no
1112 23:53:17.298124 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1113 23:53:17.303696 setenv autoload no
1114 23:53:17.304658 Sending with 10 millisecond of delay
1116 23:53:19.104845 => setenv initrd_high 0xffffffff
1117 23:53:19.115628 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1118 23:53:19.116511 setenv initrd_high 0xffffffff
1119 23:53:19.117254 Sending with 10 millisecond of delay
1121 23:53:20.734127 => setenv fdt_high 0xffffffff
1122 23:53:20.744923 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1123 23:53:20.745810 setenv fdt_high 0xffffffff
1124 23:53:20.746521 Sending with 10 millisecond of delay
1126 23:53:21.038311 => dhcp
1127 23:53:21.049052 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1128 23:53:21.049893 dhcp
1129 23:53:21.050330 Speed: 1000, full duplex
1130 23:53:21.050739 BOOTP broadcast 1
1131 23:53:21.234705 DHCP client bound to address 192.168.6.27 (186 ms)
1132 23:53:21.235552 Sending with 10 millisecond of delay
1134 23:53:22.912481 => setenv serverip 192.168.6.2
1135 23:53:22.923248 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:15)
1136 23:53:22.924131 setenv serverip 192.168.6.2
1137 23:53:22.924830 Sending with 10 millisecond of delay
1139 23:53:26.650349 => tftpboot 0x01080000 955825/tftp-deploy-vyf9qrft/kernel/uImage
1140 23:53:26.661214 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1141 23:53:26.662188 tftpboot 0x01080000 955825/tftp-deploy-vyf9qrft/kernel/uImage
1142 23:53:26.662725 Speed: 1000, full duplex
1143 23:53:26.663195 Using ethernet@ff3f0000 device
1144 23:53:26.663725 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1145 23:53:26.669231 Filename '955825/tftp-deploy-vyf9qrft/kernel/uImage'.
1146 23:53:26.673114 Load address: 0x1080000
1147 23:53:29.782024 Loading: *################################################## 43.6 MiB
1148 23:53:29.782694 14 MiB/s
1149 23:53:29.783144 done
1150 23:53:29.786425 Bytes transferred = 45713984 (2b98a40 hex)
1151 23:53:29.787178 Sending with 10 millisecond of delay
1153 23:53:34.474640 => tftpboot 0x08000000 955825/tftp-deploy-vyf9qrft/ramdisk/ramdisk.cpio.gz.uboot
1154 23:53:34.485434 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:04)
1155 23:53:34.486310 tftpboot 0x08000000 955825/tftp-deploy-vyf9qrft/ramdisk/ramdisk.cpio.gz.uboot
1156 23:53:34.486735 Speed: 1000, full duplex
1157 23:53:34.487127 Using ethernet@ff3f0000 device
1158 23:53:34.488063 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1159 23:53:34.499044 Filename '955825/tftp-deploy-vyf9qrft/ramdisk/ramdisk.cpio.gz.uboot'.
1160 23:53:34.499653 Load address: 0x8000000
1161 23:53:41.227475 Loading: *##############T ################################### UDP wrong checksum 00000005 00004842
1162 23:53:46.227685 T UDP wrong checksum 00000005 00004842
1163 23:53:56.230750 T T UDP wrong checksum 00000005 00004842
1164 23:53:57.657967 UDP wrong checksum 000000ff 00006ca1
1165 23:53:57.666487 UDP wrong checksum 000000ff 0000c51d
1166 23:54:14.522946 T T T UDP wrong checksum 000000ff 0000b7e1
1167 23:54:14.565248 UDP wrong checksum 000000ff 00004ad4
1168 23:54:16.233582 T UDP wrong checksum 00000005 00004842
1169 23:54:31.238971 T T
1170 23:54:31.239661 Retry count exceeded; starting again
1172 23:54:31.241390 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1175 23:54:31.243540 end: 2.4 uboot-commands (duration 00:01:53) [common]
1177 23:54:31.245156 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1179 23:54:31.246396 end: 2 uboot-action (duration 00:01:53) [common]
1181 23:54:31.248109 Cleaning after the job
1182 23:54:31.248744 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/ramdisk
1183 23:54:31.250159 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/kernel
1184 23:54:31.298683 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/dtb
1185 23:54:31.299602 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/nfsrootfs
1186 23:54:31.597847 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955825/tftp-deploy-vyf9qrft/modules
1187 23:54:31.621814 start: 4.1 power-off (timeout 00:00:30) [common]
1188 23:54:31.622685 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1189 23:54:31.654571 >> OK - accepted request
1190 23:54:31.656577 Returned 0 in 0 seconds
1191 23:54:31.757665 end: 4.1 power-off (duration 00:00:00) [common]
1193 23:54:31.759091 start: 4.2 read-feedback (timeout 00:10:00) [common]
1194 23:54:31.760136 Listened to connection for namespace 'common' for up to 1s
1195 23:54:32.760211 Finalising connection for namespace 'common'
1196 23:54:32.760889 Disconnecting from shell: Finalise
1197 23:54:32.761274 =>
1198 23:54:32.862480 end: 4.2 read-feedback (duration 00:00:01) [common]
1199 23:54:32.863077 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/955825
1200 23:54:35.591235 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/955825
1201 23:54:35.591837 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.