Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 18:17:23.929963 lava-dispatcher, installed at version: 2024.01
2 18:17:23.930755 start: 0 validate
3 18:17:23.931228 Start time: 2024-11-11 18:17:23.931198+00:00 (UTC)
4 18:17:23.931775 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 18:17:23.932350 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 18:17:23.976729 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 18:17:23.977290 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc6-63-g38408d27f529%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 18:17:24.008761 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 18:17:24.009404 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc6-63-g38408d27f529%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 18:17:24.040523 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 18:17:24.041003 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 18:17:24.072758 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 18:17:24.073237 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-spi%2Ffor-next%2Fspi-fix-v6.12-rc6-63-g38408d27f529%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 18:17:24.111805 validate duration: 0.18
16 18:17:24.113345 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 18:17:24.113969 start: 1.1 download-retry (timeout 00:10:00) [common]
18 18:17:24.114544 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 18:17:24.115528 Not decompressing ramdisk as can be used compressed.
20 18:17:24.116275 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 18:17:24.116782 saving as /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/ramdisk/initrd.cpio.gz
22 18:17:24.117289 total size: 5628140 (5 MB)
23 18:17:24.160227 progress 0 % (0 MB)
24 18:17:24.167913 progress 5 % (0 MB)
25 18:17:24.175509 progress 10 % (0 MB)
26 18:17:24.182181 progress 15 % (0 MB)
27 18:17:24.189677 progress 20 % (1 MB)
28 18:17:24.194342 progress 25 % (1 MB)
29 18:17:24.198249 progress 30 % (1 MB)
30 18:17:24.202183 progress 35 % (1 MB)
31 18:17:24.205787 progress 40 % (2 MB)
32 18:17:24.209718 progress 45 % (2 MB)
33 18:17:24.213293 progress 50 % (2 MB)
34 18:17:24.217209 progress 55 % (2 MB)
35 18:17:24.221113 progress 60 % (3 MB)
36 18:17:24.224609 progress 65 % (3 MB)
37 18:17:24.228470 progress 70 % (3 MB)
38 18:17:24.231942 progress 75 % (4 MB)
39 18:17:24.235815 progress 80 % (4 MB)
40 18:17:24.239132 progress 85 % (4 MB)
41 18:17:24.242682 progress 90 % (4 MB)
42 18:17:24.246196 progress 95 % (5 MB)
43 18:17:24.249389 progress 100 % (5 MB)
44 18:17:24.250029 5 MB downloaded in 0.13 s (40.44 MB/s)
45 18:17:24.250572 end: 1.1.1 http-download (duration 00:00:00) [common]
47 18:17:24.251440 end: 1.1 download-retry (duration 00:00:00) [common]
48 18:17:24.251728 start: 1.2 download-retry (timeout 00:10:00) [common]
49 18:17:24.252012 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 18:17:24.252493 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc6-63-g38408d27f529/arm64/defconfig/gcc-12/kernel/Image
51 18:17:24.252740 saving as /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/kernel/Image
52 18:17:24.252946 total size: 45713920 (43 MB)
53 18:17:24.253154 No compression specified
54 18:17:24.291318 progress 0 % (0 MB)
55 18:17:24.320920 progress 5 % (2 MB)
56 18:17:24.353050 progress 10 % (4 MB)
57 18:17:24.382215 progress 15 % (6 MB)
58 18:17:24.410846 progress 20 % (8 MB)
59 18:17:24.438991 progress 25 % (10 MB)
60 18:17:24.467486 progress 30 % (13 MB)
61 18:17:24.496234 progress 35 % (15 MB)
62 18:17:24.524597 progress 40 % (17 MB)
63 18:17:24.552753 progress 45 % (19 MB)
64 18:17:24.581312 progress 50 % (21 MB)
65 18:17:24.610023 progress 55 % (24 MB)
66 18:17:24.638688 progress 60 % (26 MB)
67 18:17:24.666759 progress 65 % (28 MB)
68 18:17:24.695287 progress 70 % (30 MB)
69 18:17:24.724288 progress 75 % (32 MB)
70 18:17:24.752809 progress 80 % (34 MB)
71 18:17:24.781034 progress 85 % (37 MB)
72 18:17:24.809614 progress 90 % (39 MB)
73 18:17:24.838276 progress 95 % (41 MB)
74 18:17:24.865735 progress 100 % (43 MB)
75 18:17:24.866265 43 MB downloaded in 0.61 s (71.08 MB/s)
76 18:17:24.866738 end: 1.2.1 http-download (duration 00:00:01) [common]
78 18:17:24.867543 end: 1.2 download-retry (duration 00:00:01) [common]
79 18:17:24.867817 start: 1.3 download-retry (timeout 00:09:59) [common]
80 18:17:24.868104 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 18:17:24.868574 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc6-63-g38408d27f529/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 18:17:24.868845 saving as /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 18:17:24.869051 total size: 53209 (0 MB)
84 18:17:24.869256 No compression specified
85 18:17:24.910648 progress 61 % (0 MB)
86 18:17:24.911490 progress 100 % (0 MB)
87 18:17:24.912049 0 MB downloaded in 0.04 s (1.18 MB/s)
88 18:17:24.912521 end: 1.3.1 http-download (duration 00:00:00) [common]
90 18:17:24.913320 end: 1.3 download-retry (duration 00:00:00) [common]
91 18:17:24.913581 start: 1.4 download-retry (timeout 00:09:59) [common]
92 18:17:24.913841 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 18:17:24.914366 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 18:17:24.914619 saving as /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/nfsrootfs/full.rootfs.tar
95 18:17:24.914821 total size: 474398908 (452 MB)
96 18:17:24.915027 Using unxz to decompress xz
97 18:17:24.948028 progress 0 % (0 MB)
98 18:17:26.041139 progress 5 % (22 MB)
99 18:17:27.486510 progress 10 % (45 MB)
100 18:17:27.936419 progress 15 % (67 MB)
101 18:17:28.752510 progress 20 % (90 MB)
102 18:17:29.281505 progress 25 % (113 MB)
103 18:17:29.634985 progress 30 % (135 MB)
104 18:17:30.234353 progress 35 % (158 MB)
105 18:17:31.143295 progress 40 % (181 MB)
106 18:17:31.984312 progress 45 % (203 MB)
107 18:17:32.617715 progress 50 % (226 MB)
108 18:17:33.254694 progress 55 % (248 MB)
109 18:17:34.476175 progress 60 % (271 MB)
110 18:17:35.891889 progress 65 % (294 MB)
111 18:17:37.520375 progress 70 % (316 MB)
112 18:17:40.625393 progress 75 % (339 MB)
113 18:17:43.056557 progress 80 % (361 MB)
114 18:17:46.011382 progress 85 % (384 MB)
115 18:17:49.199434 progress 90 % (407 MB)
116 18:17:52.425369 progress 95 % (429 MB)
117 18:17:55.605018 progress 100 % (452 MB)
118 18:17:55.618005 452 MB downloaded in 30.70 s (14.74 MB/s)
119 18:17:55.618954 end: 1.4.1 http-download (duration 00:00:31) [common]
121 18:17:55.620749 end: 1.4 download-retry (duration 00:00:31) [common]
122 18:17:55.621315 start: 1.5 download-retry (timeout 00:09:28) [common]
123 18:17:55.621873 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 18:17:55.623090 downloading http://storage.kernelci.org/broonie-spi/for-next/spi-fix-v6.12-rc6-63-g38408d27f529/arm64/defconfig/gcc-12/modules.tar.xz
125 18:17:55.623612 saving as /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/modules/modules.tar
126 18:17:55.624093 total size: 11600216 (11 MB)
127 18:17:55.624555 Using unxz to decompress xz
128 18:17:55.670003 progress 0 % (0 MB)
129 18:17:55.739426 progress 5 % (0 MB)
130 18:17:55.815583 progress 10 % (1 MB)
131 18:17:55.914756 progress 15 % (1 MB)
132 18:17:56.007968 progress 20 % (2 MB)
133 18:17:56.087657 progress 25 % (2 MB)
134 18:17:56.164280 progress 30 % (3 MB)
135 18:17:56.239016 progress 35 % (3 MB)
136 18:17:56.316382 progress 40 % (4 MB)
137 18:17:56.393986 progress 45 % (5 MB)
138 18:17:56.481266 progress 50 % (5 MB)
139 18:17:56.560133 progress 55 % (6 MB)
140 18:17:56.645772 progress 60 % (6 MB)
141 18:17:56.726747 progress 65 % (7 MB)
142 18:17:56.803122 progress 70 % (7 MB)
143 18:17:56.885331 progress 75 % (8 MB)
144 18:17:56.968799 progress 80 % (8 MB)
145 18:17:57.044976 progress 85 % (9 MB)
146 18:17:57.127664 progress 90 % (9 MB)
147 18:17:57.205298 progress 95 % (10 MB)
148 18:17:57.282267 progress 100 % (11 MB)
149 18:17:57.293292 11 MB downloaded in 1.67 s (6.63 MB/s)
150 18:17:57.294210 end: 1.5.1 http-download (duration 00:00:02) [common]
152 18:17:57.295962 end: 1.5 download-retry (duration 00:00:02) [common]
153 18:17:57.296574 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 18:17:57.297143 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 18:18:13.940052 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/976266/extract-nfsrootfs-ur2bgz9q
156 18:18:13.940671 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 18:18:13.940969 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 18:18:13.941588 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc
159 18:18:13.942225 makedir: /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin
160 18:18:13.942635 makedir: /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/tests
161 18:18:13.942967 makedir: /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/results
162 18:18:13.943309 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-add-keys
163 18:18:13.943870 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-add-sources
164 18:18:13.944459 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-background-process-start
165 18:18:13.945008 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-background-process-stop
166 18:18:13.945580 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-common-functions
167 18:18:13.946125 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-echo-ipv4
168 18:18:13.946659 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-install-packages
169 18:18:13.947221 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-installed-packages
170 18:18:13.947750 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-os-build
171 18:18:13.948305 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-probe-channel
172 18:18:13.948972 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-probe-ip
173 18:18:13.949501 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-target-ip
174 18:18:13.950007 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-target-mac
175 18:18:13.950500 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-target-storage
176 18:18:13.951005 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-test-case
177 18:18:13.951524 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-test-event
178 18:18:13.952050 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-test-feedback
179 18:18:13.952569 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-test-raise
180 18:18:13.953068 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-test-reference
181 18:18:13.953583 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-test-runner
182 18:18:13.954115 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-test-set
183 18:18:13.954646 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-test-shell
184 18:18:13.955245 Updating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-install-packages (oe)
185 18:18:13.955875 Updating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/bin/lava-installed-packages (oe)
186 18:18:13.956407 Creating /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/environment
187 18:18:13.956813 LAVA metadata
188 18:18:13.957084 - LAVA_JOB_ID=976266
189 18:18:13.957303 - LAVA_DISPATCHER_IP=192.168.6.2
190 18:18:13.957694 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 18:18:13.958767 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 18:18:13.959125 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 18:18:13.959338 skipped lava-vland-overlay
194 18:18:13.959583 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 18:18:13.959843 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 18:18:13.960102 skipped lava-multinode-overlay
197 18:18:13.960356 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 18:18:13.960609 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 18:18:13.960871 Loading test definitions
200 18:18:13.961162 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 18:18:13.961384 Using /lava-976266 at stage 0
202 18:18:13.962896 uuid=976266_1.6.2.4.1 testdef=None
203 18:18:13.963269 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 18:18:13.963545 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 18:18:13.965459 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 18:18:13.966343 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 18:18:13.968848 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 18:18:13.969800 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 18:18:13.972186 runner path: /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 976266_1.6.2.4.1
212 18:18:13.972870 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 18:18:13.973663 Creating lava-test-runner.conf files
215 18:18:13.973867 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/976266/lava-overlay-3lkfr6oc/lava-976266/0 for stage 0
216 18:18:13.974227 - 0_v4l2-decoder-conformance-h265
217 18:18:13.974594 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 18:18:13.974877 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 18:18:13.997943 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 18:18:13.998416 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 18:18:13.998682 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 18:18:13.998951 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 18:18:13.999218 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 18:18:14.639393 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 18:18:14.639864 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 18:18:14.640154 extracting modules file /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/976266/extract-nfsrootfs-ur2bgz9q
227 18:18:16.216814 extracting modules file /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/976266/extract-overlay-ramdisk-h1lj3pkl/ramdisk
228 18:18:17.634524 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 18:18:17.634984 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 18:18:17.635259 [common] Applying overlay to NFS
231 18:18:17.635475 [common] Applying overlay /var/lib/lava/dispatcher/tmp/976266/compress-overlay-bybrcmeb/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/976266/extract-nfsrootfs-ur2bgz9q
232 18:18:17.665434 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 18:18:17.665874 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 18:18:17.666171 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 18:18:17.666416 Converting downloaded kernel to a uImage
236 18:18:17.666736 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/kernel/Image /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/kernel/uImage
237 18:18:18.123574 output: Image Name:
238 18:18:18.124109 output: Created: Mon Nov 11 18:18:17 2024
239 18:18:18.124382 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 18:18:18.124631 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 18:18:18.124878 output: Load Address: 01080000
242 18:18:18.125112 output: Entry Point: 01080000
243 18:18:18.125418 output:
244 18:18:18.125839 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 18:18:18.126163 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 18:18:18.126482 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 18:18:18.126794 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 18:18:18.127099 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 18:18:18.127482 Building ramdisk /var/lib/lava/dispatcher/tmp/976266/extract-overlay-ramdisk-h1lj3pkl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/976266/extract-overlay-ramdisk-h1lj3pkl/ramdisk
250 18:18:20.731155 >> 166774 blocks
251 18:18:28.514842 Adding RAMdisk u-boot header.
252 18:18:28.515289 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/976266/extract-overlay-ramdisk-h1lj3pkl/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/976266/extract-overlay-ramdisk-h1lj3pkl/ramdisk.cpio.gz.uboot
253 18:18:28.763449 output: Image Name:
254 18:18:28.763875 output: Created: Mon Nov 11 18:18:28 2024
255 18:18:28.764225 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 18:18:28.764637 output: Data Size: 23429097 Bytes = 22879.98 KiB = 22.34 MiB
257 18:18:28.765036 output: Load Address: 00000000
258 18:18:28.765431 output: Entry Point: 00000000
259 18:18:28.765821 output:
260 18:18:28.766776 rename /var/lib/lava/dispatcher/tmp/976266/extract-overlay-ramdisk-h1lj3pkl/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/ramdisk/ramdisk.cpio.gz.uboot
261 18:18:28.767486 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 18:18:28.768054 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 18:18:28.768585 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:55) [common]
264 18:18:28.769039 No LXC device requested
265 18:18:28.769531 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 18:18:28.770030 start: 1.8 deploy-device-env (timeout 00:08:55) [common]
267 18:18:28.770515 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 18:18:28.770924 Checking files for TFTP limit of 4294967296 bytes.
269 18:18:28.773610 end: 1 tftp-deploy (duration 00:01:05) [common]
270 18:18:28.774180 start: 2 uboot-action (timeout 00:05:00) [common]
271 18:18:28.774730 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 18:18:28.775221 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 18:18:28.775718 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 18:18:28.776337 Using kernel file from prepare-kernel: 976266/tftp-deploy-dl996dg_/kernel/uImage
275 18:18:28.776976 substitutions:
276 18:18:28.777379 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 18:18:28.777777 - {DTB_ADDR}: 0x01070000
278 18:18:28.778169 - {DTB}: 976266/tftp-deploy-dl996dg_/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 18:18:28.778561 - {INITRD}: 976266/tftp-deploy-dl996dg_/ramdisk/ramdisk.cpio.gz.uboot
280 18:18:28.778948 - {KERNEL_ADDR}: 0x01080000
281 18:18:28.779336 - {KERNEL}: 976266/tftp-deploy-dl996dg_/kernel/uImage
282 18:18:28.779722 - {LAVA_MAC}: None
283 18:18:28.780173 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/976266/extract-nfsrootfs-ur2bgz9q
284 18:18:28.780566 - {NFS_SERVER_IP}: 192.168.6.2
285 18:18:28.780952 - {PRESEED_CONFIG}: None
286 18:18:28.781336 - {PRESEED_LOCAL}: None
287 18:18:28.781719 - {RAMDISK_ADDR}: 0x08000000
288 18:18:28.782099 - {RAMDISK}: 976266/tftp-deploy-dl996dg_/ramdisk/ramdisk.cpio.gz.uboot
289 18:18:28.782482 - {ROOT_PART}: None
290 18:18:28.782864 - {ROOT}: None
291 18:18:28.783244 - {SERVER_IP}: 192.168.6.2
292 18:18:28.783627 - {TEE_ADDR}: 0x83000000
293 18:18:28.784030 - {TEE}: None
294 18:18:28.784420 Parsed boot commands:
295 18:18:28.784795 - setenv autoload no
296 18:18:28.785174 - setenv initrd_high 0xffffffff
297 18:18:28.785556 - setenv fdt_high 0xffffffff
298 18:18:28.785933 - dhcp
299 18:18:28.786311 - setenv serverip 192.168.6.2
300 18:18:28.786689 - tftpboot 0x01080000 976266/tftp-deploy-dl996dg_/kernel/uImage
301 18:18:28.787070 - tftpboot 0x08000000 976266/tftp-deploy-dl996dg_/ramdisk/ramdisk.cpio.gz.uboot
302 18:18:28.787448 - tftpboot 0x01070000 976266/tftp-deploy-dl996dg_/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 18:18:28.787828 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/976266/extract-nfsrootfs-ur2bgz9q,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 18:18:28.788248 - bootm 0x01080000 0x08000000 0x01070000
305 18:18:28.788741 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 18:18:28.790200 start: 2.3 connect-device (timeout 00:05:00) [common]
308 18:18:28.790614 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 18:18:28.805426 Setting prompt string to ['lava-test: # ']
310 18:18:28.806869 end: 2.3 connect-device (duration 00:00:00) [common]
311 18:18:28.807443 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 18:18:28.807968 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 18:18:28.808522 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 18:18:28.809655 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 18:18:28.848656 >> OK - accepted request
316 18:18:28.850925 Returned 0 in 0 seconds
317 18:18:28.952125 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 18:18:28.953749 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 18:18:28.954314 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 18:18:28.954813 Setting prompt string to ['Hit any key to stop autoboot']
322 18:18:28.955262 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 18:18:28.956842 Trying 192.168.56.21...
324 18:18:28.957312 Connected to conserv1.
325 18:18:28.957725 Escape character is '^]'.
326 18:18:28.958134
327 18:18:28.958542 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 18:18:28.958959
329 18:18:35.996112 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 18:18:35.996517 bl2_stage_init 0x01
331 18:18:35.996754 bl2_stage_init 0x81
332 18:18:36.001653 hw id: 0x0000 - pwm id 0x01
333 18:18:36.001943 bl2_stage_init 0xc1
334 18:18:36.007234 bl2_stage_init 0x02
335 18:18:36.007504
336 18:18:36.007724 L0:00000000
337 18:18:36.007944 L1:00000703
338 18:18:36.008171 L2:00008067
339 18:18:36.008381 L3:15000000
340 18:18:36.012782 S1:00000000
341 18:18:36.013063 B2:20282000
342 18:18:36.013297 B1:a0f83180
343 18:18:36.013514
344 18:18:36.013717 TE: 67149
345 18:18:36.013918
346 18:18:36.018431 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 18:18:36.018913
348 18:18:36.024036 Board ID = 1
349 18:18:36.024474 Set cpu clk to 24M
350 18:18:36.024869 Set clk81 to 24M
351 18:18:36.029615 Use GP1_pll as DSU clk.
352 18:18:36.030097 DSU clk: 1200 Mhz
353 18:18:36.030497 CPU clk: 1200 MHz
354 18:18:36.035236 Set clk81 to 166.6M
355 18:18:36.040764 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 18:18:36.041210 board id: 1
357 18:18:36.048620 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 18:18:36.058730 fw parse done
359 18:18:36.064956 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 18:18:36.107267 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 18:18:36.118166 PIEI prepare done
362 18:18:36.118595 fastboot data load
363 18:18:36.118988 fastboot data verify
364 18:18:36.123744 verify result: 266
365 18:18:36.129397 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 18:18:36.129889 LPDDR4 probe
367 18:18:36.130281 ddr clk to 1584MHz
368 18:18:36.137594 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 18:18:36.174736
370 18:18:36.175181 dmc_version 0001
371 18:18:36.181212 Check phy result
372 18:18:36.187120 INFO : End of CA training
373 18:18:36.187539 INFO : End of initialization
374 18:18:36.192704 INFO : Training has run successfully!
375 18:18:36.193123 Check phy result
376 18:18:36.198314 INFO : End of initialization
377 18:18:36.198736 INFO : End of read enable training
378 18:18:36.203928 INFO : End of fine write leveling
379 18:18:36.209551 INFO : End of Write leveling coarse delay
380 18:18:36.209968 INFO : Training has run successfully!
381 18:18:36.210359 Check phy result
382 18:18:36.215181 INFO : End of initialization
383 18:18:36.215599 INFO : End of read dq deskew training
384 18:18:36.220709 INFO : End of MPR read delay center optimization
385 18:18:36.226340 INFO : End of write delay center optimization
386 18:18:36.231946 INFO : End of read delay center optimization
387 18:18:36.232417 INFO : End of max read latency training
388 18:18:36.237565 INFO : Training has run successfully!
389 18:18:36.238002 1D training succeed
390 18:18:36.246728 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 18:18:36.294349 Check phy result
392 18:18:36.294810 INFO : End of initialization
393 18:18:36.316758 INFO : End of 2D read delay Voltage center optimization
394 18:18:36.335896 INFO : End of 2D read delay Voltage center optimization
395 18:18:36.387844 INFO : End of 2D write delay Voltage center optimization
396 18:18:36.437018 INFO : End of 2D write delay Voltage center optimization
397 18:18:36.442510 INFO : Training has run successfully!
398 18:18:36.442942
399 18:18:36.443339 channel==0
400 18:18:36.448327 RxClkDly_Margin_A0==78 ps 8
401 18:18:36.448593 TxDqDly_Margin_A0==98 ps 10
402 18:18:36.453831 RxClkDly_Margin_A1==69 ps 7
403 18:18:36.454313 TxDqDly_Margin_A1==88 ps 9
404 18:18:36.454731 TrainedVREFDQ_A0==74
405 18:18:36.459417 TrainedVREFDQ_A1==74
406 18:18:36.459701 VrefDac_Margin_A0==24
407 18:18:36.459901 DeviceVref_Margin_A0==40
408 18:18:36.465055 VrefDac_Margin_A1==23
409 18:18:36.465523 DeviceVref_Margin_A1==40
410 18:18:36.465916
411 18:18:36.466304
412 18:18:36.466691 channel==1
413 18:18:36.470608 RxClkDly_Margin_A0==78 ps 8
414 18:18:36.471075 TxDqDly_Margin_A0==98 ps 10
415 18:18:36.477397 RxClkDly_Margin_A1==78 ps 8
416 18:18:36.480418 TxDqDly_Margin_A1==88 ps 9
417 18:18:36.480888 TrainedVREFDQ_A0==78
418 18:18:36.481279 TrainedVREFDQ_A1==75
419 18:18:36.486022 VrefDac_Margin_A0==22
420 18:18:36.486480 DeviceVref_Margin_A0==36
421 18:18:36.486870 VrefDac_Margin_A1==22
422 18:18:36.491539 DeviceVref_Margin_A1==39
423 18:18:36.492021
424 18:18:36.497199 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 18:18:36.497655
426 18:18:36.525263 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
427 18:18:36.525859 2D training succeed
428 18:18:36.536253 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 18:18:36.536772 auto size-- 65535DDR cs0 size: 2048MB
430 18:18:36.537168 DDR cs1 size: 2048MB
431 18:18:36.541865 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 18:18:36.542321 cs0 DataBus test pass
433 18:18:36.547494 cs1 DataBus test pass
434 18:18:36.547954 cs0 AddrBus test pass
435 18:18:36.553091 cs1 AddrBus test pass
436 18:18:36.553551
437 18:18:36.553942 100bdlr_step_size ps== 464
438 18:18:36.554335 result report
439 18:18:36.558649 boot times 0Enable ddr reg access
440 18:18:36.565260 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 18:18:36.579022 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 18:18:37.234497 bl2z: ptr: 05129330, size: 00001e40
443 18:18:37.241790 0.0;M3 CHK:0;cm4_sp_mode 0
444 18:18:37.242279 MVN_1=0x00000000
445 18:18:37.242688 MVN_2=0x00000000
446 18:18:37.253340 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 18:18:37.253952 OPS=0x04
448 18:18:37.254385 ring efuse init
449 18:18:37.258903 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 18:18:37.259428 [0.017319 Inits done]
451 18:18:37.259848 secure task start!
452 18:18:37.265220 high task start!
453 18:18:37.265680 low task start!
454 18:18:37.266087 run into bl31
455 18:18:37.274873 NOTICE: BL31: v1.3(release):4fc40b1
456 18:18:37.281722 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 18:18:37.282184 NOTICE: BL31: G12A normal boot!
458 18:18:37.298054 NOTICE: BL31: BL33 decompress pass
459 18:18:37.302824 ERROR: Error initializing runtime service opteed_fast
460 18:18:40.050243 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 18:18:40.050699 bl2_stage_init 0x01
462 18:18:40.050914 bl2_stage_init 0x81
463 18:18:40.055772 hw id: 0x0000 - pwm id 0x01
464 18:18:40.056129 bl2_stage_init 0xc1
465 18:18:40.061304 bl2_stage_init 0x02
466 18:18:40.061618
467 18:18:40.061827 L0:00000000
468 18:18:40.062029 L1:00000703
469 18:18:40.062231 L2:00008067
470 18:18:40.062430 L3:15000000
471 18:18:40.067147 S1:00000000
472 18:18:40.067458 B2:20282000
473 18:18:40.067661 B1:a0f83180
474 18:18:40.067856
475 18:18:40.068084 TE: 70109
476 18:18:40.068285
477 18:18:40.072637 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 18:18:40.072962
479 18:18:40.078216 Board ID = 1
480 18:18:40.078537 Set cpu clk to 24M
481 18:18:40.078740 Set clk81 to 24M
482 18:18:40.083790 Use GP1_pll as DSU clk.
483 18:18:40.084126 DSU clk: 1200 Mhz
484 18:18:40.084362 CPU clk: 1200 MHz
485 18:18:40.089387 Set clk81 to 166.6M
486 18:18:40.095017 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 18:18:40.095298 board id: 1
488 18:18:40.102163 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 18:18:40.113097 fw parse done
490 18:18:40.119098 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 18:18:40.162212 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 18:18:40.173308 PIEI prepare done
493 18:18:40.173649 fastboot data load
494 18:18:40.173855 fastboot data verify
495 18:18:40.178859 verify result: 266
496 18:18:40.184475 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 18:18:40.184784 LPDDR4 probe
498 18:18:40.184985 ddr clk to 1584MHz
499 18:18:40.192469 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 18:18:40.230173
501 18:18:40.230564 dmc_version 0001
502 18:18:40.237222 Check phy result
503 18:18:40.243200 INFO : End of CA training
504 18:18:40.243498 INFO : End of initialization
505 18:18:40.248895 INFO : Training has run successfully!
506 18:18:40.249225 Check phy result
507 18:18:40.254420 INFO : End of initialization
508 18:18:40.254720 INFO : End of read enable training
509 18:18:40.257707 INFO : End of fine write leveling
510 18:18:40.263322 INFO : End of Write leveling coarse delay
511 18:18:40.269114 INFO : Training has run successfully!
512 18:18:40.269439 Check phy result
513 18:18:40.269643 INFO : End of initialization
514 18:18:40.274568 INFO : End of read dq deskew training
515 18:18:40.277868 INFO : End of MPR read delay center optimization
516 18:18:40.283508 INFO : End of write delay center optimization
517 18:18:40.289087 INFO : End of read delay center optimization
518 18:18:40.289526 INFO : End of max read latency training
519 18:18:40.294661 INFO : Training has run successfully!
520 18:18:40.294982 1D training succeed
521 18:18:40.302811 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 18:18:40.351389 Check phy result
523 18:18:40.351810 INFO : End of initialization
524 18:18:40.378630 INFO : End of 2D read delay Voltage center optimization
525 18:18:40.402661 INFO : End of 2D read delay Voltage center optimization
526 18:18:40.458437 INFO : End of 2D write delay Voltage center optimization
527 18:18:40.513371 INFO : End of 2D write delay Voltage center optimization
528 18:18:40.518770 INFO : Training has run successfully!
529 18:18:40.519150
530 18:18:40.519418 channel==0
531 18:18:40.524322 RxClkDly_Margin_A0==88 ps 9
532 18:18:40.524652 TxDqDly_Margin_A0==98 ps 10
533 18:18:40.529932 RxClkDly_Margin_A1==69 ps 7
534 18:18:40.530236 TxDqDly_Margin_A1==88 ps 9
535 18:18:40.530467 TrainedVREFDQ_A0==74
536 18:18:40.535585 TrainedVREFDQ_A1==75
537 18:18:40.535877 VrefDac_Margin_A0==24
538 18:18:40.536149 DeviceVref_Margin_A0==40
539 18:18:40.541139 VrefDac_Margin_A1==23
540 18:18:40.541430 DeviceVref_Margin_A1==39
541 18:18:40.541658
542 18:18:40.541886
543 18:18:40.542105 channel==1
544 18:18:40.546806 RxClkDly_Margin_A0==88 ps 9
545 18:18:40.547102 TxDqDly_Margin_A0==88 ps 9
546 18:18:40.552374 RxClkDly_Margin_A1==78 ps 8
547 18:18:40.552677 TxDqDly_Margin_A1==88 ps 9
548 18:18:40.557928 TrainedVREFDQ_A0==75
549 18:18:40.558247 TrainedVREFDQ_A1==77
550 18:18:40.558457 VrefDac_Margin_A0==23
551 18:18:40.563704 DeviceVref_Margin_A0==39
552 18:18:40.564257 VrefDac_Margin_A1==22
553 18:18:40.564660 DeviceVref_Margin_A1==37
554 18:18:40.569153
555 18:18:40.569581 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 18:18:40.569973
557 18:18:40.602755 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 18:18:40.603267 2D training succeed
559 18:18:40.608335 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 18:18:40.613912 auto size-- 65535DDR cs0 size: 2048MB
561 18:18:40.614338 DDR cs1 size: 2048MB
562 18:18:40.619600 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 18:18:40.620048 cs0 DataBus test pass
564 18:18:40.625131 cs1 DataBus test pass
565 18:18:40.625550 cs0 AddrBus test pass
566 18:18:40.625938 cs1 AddrBus test pass
567 18:18:40.626321
568 18:18:40.630730 100bdlr_step_size ps== 478
569 18:18:40.631160 result report
570 18:18:40.636358 boot times 0Enable ddr reg access
571 18:18:40.641260 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 18:18:40.655288 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 18:18:41.313791 bl2z: ptr: 05129330, size: 00001e40
574 18:18:41.322959 0.0;M3 CHK:0;cm4_sp_mode 0
575 18:18:41.323474 MVN_1=0x00000000
576 18:18:41.323892 MVN_2=0x00000000
577 18:18:41.334317 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 18:18:41.334797 OPS=0x04
579 18:18:41.335214 ring efuse init
580 18:18:41.339955 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 18:18:41.340474 [0.017354 Inits done]
582 18:18:41.340890 secure task start!
583 18:18:41.347826 high task start!
584 18:18:41.348422 low task start!
585 18:18:41.348850 run into bl31
586 18:18:41.356473 NOTICE: BL31: v1.3(release):4fc40b1
587 18:18:41.363343 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 18:18:41.363835 NOTICE: BL31: G12A normal boot!
589 18:18:41.379937 NOTICE: BL31: BL33 decompress pass
590 18:18:41.384587 ERROR: Error initializing runtime service opteed_fast
591 18:18:42.746485 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 18:18:42.746923 bl2_stage_init 0x01
593 18:18:42.747170 bl2_stage_init 0x81
594 18:18:42.751963 hw id: 0x0000 - pwm id 0x01
595 18:18:42.752285 bl2_stage_init 0xc1
596 18:18:42.757624 bl2_stage_init 0x02
597 18:18:42.757931
598 18:18:42.758180 L0:00000000
599 18:18:42.758399 L1:00000703
600 18:18:42.758613 L2:00008067
601 18:18:42.758822 L3:15000000
602 18:18:42.763323 S1:00000000
603 18:18:42.763614 B2:20282000
604 18:18:42.763852 B1:a0f83180
605 18:18:42.764093
606 18:18:42.764306 TE: 67634
607 18:18:42.764516
608 18:18:42.768806 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 18:18:42.769095
610 18:18:42.774396 Board ID = 1
611 18:18:42.774682 Set cpu clk to 24M
612 18:18:42.774907 Set clk81 to 24M
613 18:18:42.780018 Use GP1_pll as DSU clk.
614 18:18:42.780300 DSU clk: 1200 Mhz
615 18:18:42.780535 CPU clk: 1200 MHz
616 18:18:42.785591 Set clk81 to 166.6M
617 18:18:42.791326 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 18:18:42.791622 board id: 1
619 18:18:42.798406 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 18:18:42.809075 fw parse done
621 18:18:42.815054 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 18:18:42.857669 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 18:18:42.868547 PIEI prepare done
624 18:18:42.868858 fastboot data load
625 18:18:42.869079 fastboot data verify
626 18:18:42.874166 verify result: 266
627 18:18:42.879770 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 18:18:42.880088 LPDDR4 probe
629 18:18:42.880316 ddr clk to 1584MHz
630 18:18:42.887743 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 18:18:42.925030
632 18:18:42.925397 dmc_version 0001
633 18:18:42.931768 Check phy result
634 18:18:42.937593 INFO : End of CA training
635 18:18:42.937903 INFO : End of initialization
636 18:18:42.943195 INFO : Training has run successfully!
637 18:18:42.943496 Check phy result
638 18:18:42.948848 INFO : End of initialization
639 18:18:42.949143 INFO : End of read enable training
640 18:18:42.954426 INFO : End of fine write leveling
641 18:18:42.960053 INFO : End of Write leveling coarse delay
642 18:18:42.960362 INFO : Training has run successfully!
643 18:18:42.960585 Check phy result
644 18:18:42.965592 INFO : End of initialization
645 18:18:42.965882 INFO : End of read dq deskew training
646 18:18:42.971175 INFO : End of MPR read delay center optimization
647 18:18:42.976843 INFO : End of write delay center optimization
648 18:18:42.982390 INFO : End of read delay center optimization
649 18:18:42.982693 INFO : End of max read latency training
650 18:18:42.988018 INFO : Training has run successfully!
651 18:18:42.988324 1D training succeed
652 18:18:42.997211 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 18:18:43.044821 Check phy result
654 18:18:43.045234 INFO : End of initialization
655 18:18:43.067156 INFO : End of 2D read delay Voltage center optimization
656 18:18:43.086292 INFO : End of 2D read delay Voltage center optimization
657 18:18:43.138153 INFO : End of 2D write delay Voltage center optimization
658 18:18:43.187499 INFO : End of 2D write delay Voltage center optimization
659 18:18:43.192911 INFO : Training has run successfully!
660 18:18:43.193332
661 18:18:43.193580 channel==0
662 18:18:43.198470 RxClkDly_Margin_A0==78 ps 8
663 18:18:43.198896 TxDqDly_Margin_A0==98 ps 10
664 18:18:43.204066 RxClkDly_Margin_A1==69 ps 7
665 18:18:43.204361 TxDqDly_Margin_A1==88 ps 9
666 18:18:43.204593 TrainedVREFDQ_A0==77
667 18:18:43.209681 TrainedVREFDQ_A1==75
668 18:18:43.209964 VrefDac_Margin_A0==23
669 18:18:43.210189 DeviceVref_Margin_A0==37
670 18:18:43.215414 VrefDac_Margin_A1==22
671 18:18:43.215709 DeviceVref_Margin_A1==39
672 18:18:43.215949
673 18:18:43.216199
674 18:18:43.216412 channel==1
675 18:18:43.220896 RxClkDly_Margin_A0==78 ps 8
676 18:18:43.221182 TxDqDly_Margin_A0==98 ps 10
677 18:18:43.226481 RxClkDly_Margin_A1==88 ps 9
678 18:18:43.226778 TxDqDly_Margin_A1==88 ps 9
679 18:18:43.232049 TrainedVREFDQ_A0==78
680 18:18:43.232353 TrainedVREFDQ_A1==75
681 18:18:43.232566 VrefDac_Margin_A0==22
682 18:18:43.237653 DeviceVref_Margin_A0==36
683 18:18:43.237936 VrefDac_Margin_A1==22
684 18:18:43.243398 DeviceVref_Margin_A1==39
685 18:18:43.243693
686 18:18:43.243915 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 18:18:43.244161
688 18:18:43.276922 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000017 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
689 18:18:43.277314 2D training succeed
690 18:18:43.282503 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 18:18:43.288091 auto size-- 65535DDR cs0 size: 2048MB
692 18:18:43.288382 DDR cs1 size: 2048MB
693 18:18:43.293691 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 18:18:43.293978 cs0 DataBus test pass
695 18:18:43.299312 cs1 DataBus test pass
696 18:18:43.299599 cs0 AddrBus test pass
697 18:18:43.299819 cs1 AddrBus test pass
698 18:18:43.300280
699 18:18:43.304944 100bdlr_step_size ps== 478
700 18:18:43.305262 result report
701 18:18:43.310502 boot times 0Enable ddr reg access
702 18:18:43.315667 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 18:18:43.329482 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 18:18:43.985067 bl2z: ptr: 05129330, size: 00001e40
705 18:18:43.992481 0.0;M3 CHK:0;cm4_sp_mode 0
706 18:18:43.992886 MVN_1=0x00000000
707 18:18:43.993127 MVN_2=0x00000000
708 18:18:44.004040 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 18:18:44.004369 OPS=0x04
710 18:18:44.004583 ring efuse init
711 18:18:44.009652 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 18:18:44.010087 [0.017319 Inits done]
713 18:18:44.010426 secure task start!
714 18:18:44.016829 high task start!
715 18:18:44.017250 low task start!
716 18:18:44.017491 run into bl31
717 18:18:44.026352 NOTICE: BL31: v1.3(release):4fc40b1
718 18:18:44.034100 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 18:18:44.034419 NOTICE: BL31: G12A normal boot!
720 18:18:44.049639 NOTICE: BL31: BL33 decompress pass
721 18:18:44.055301 ERROR: Error initializing runtime service opteed_fast
722 18:18:44.850813
723 18:18:44.851206
724 18:18:44.856016 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 18:18:44.856327
726 18:18:44.858570 Model: Libre Computer AML-S905D3-CC Solitude
727 18:18:45.006633 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 18:18:45.021962 DRAM: 2 GiB (effective 3.8 GiB)
729 18:18:45.122958 Core: 406 devices, 33 uclasses, devicetree: separate
730 18:18:45.128899 WDT: Not starting watchdog@f0d0
731 18:18:45.153939 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 18:18:45.166157 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 18:18:45.171132 ** Bad device specification mmc 0 **
734 18:18:45.181232 Card did not respond to voltage select! : -110
735 18:18:45.188899 ** Bad device specification mmc 0 **
736 18:18:45.189380 Couldn't find partition mmc 0
737 18:18:45.197238 Card did not respond to voltage select! : -110
738 18:18:45.202726 ** Bad device specification mmc 0 **
739 18:18:45.203185 Couldn't find partition mmc 0
740 18:18:45.207814 Error: could not access storage.
741 18:18:45.504244 Net: eth0: ethernet@ff3f0000
742 18:18:45.504835 starting USB...
743 18:18:45.748837 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 18:18:45.749422 Starting the controller
745 18:18:45.755935 USB XHCI 1.10
746 18:18:47.309100 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 18:18:47.317466 scanning usb for storage devices... 0 Storage Device(s) found
749 18:18:47.368611 Hit any key to stop autoboot: 1
750 18:18:47.369640 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
751 18:18:47.370282 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 18:18:47.370706 Setting prompt string to ['=>']
753 18:18:47.370979 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 18:18:47.383568 0
755 18:18:47.384637 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 18:18:47.486033 => setenv autoload no
758 18:18:47.487146 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 18:18:47.491213 setenv autoload no
761 18:18:47.592357 => setenv initrd_high 0xffffffff
762 18:18:47.592919 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 18:18:47.597812 setenv initrd_high 0xffffffff
765 18:18:47.698838 => setenv fdt_high 0xffffffff
766 18:18:47.699624 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 18:18:47.703077 setenv fdt_high 0xffffffff
769 18:18:47.804622 => dhcp
770 18:18:47.805339 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 18:18:47.808689 dhcp
772 18:18:48.815261 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 18:18:48.815850 Speed: 1000, full duplex
774 18:18:48.816306 BOOTP broadcast 1
775 18:18:49.063731 BOOTP broadcast 2
776 18:18:49.075420 DHCP client bound to address 192.168.6.21 (259 ms)
778 18:18:49.176826 => setenv serverip 192.168.6.2
779 18:18:49.177482 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
780 18:18:49.181887 setenv serverip 192.168.6.2
782 18:18:49.283272 => tftpboot 0x01080000 976266/tftp-deploy-dl996dg_/kernel/uImage
783 18:18:49.283966 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
784 18:18:49.290552 tftpboot 0x01080000 976266/tftp-deploy-dl996dg_/kernel/uImage
785 18:18:49.291038 Speed: 1000, full duplex
786 18:18:49.291436 Using ethernet@ff3f0000 device
787 18:18:49.296026 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 18:18:49.301534 Filename '976266/tftp-deploy-dl996dg_/kernel/uImage'.
789 18:18:49.305410 Load address: 0x1080000
790 18:18:52.551614 Loading: *################################################## 43.6 MiB
791 18:18:52.552231 13.4 MiB/s
792 18:18:52.552639 done
793 18:18:52.556061 Bytes transferred = 45713984 (2b98a40 hex)
795 18:18:52.657593 => tftpboot 0x08000000 976266/tftp-deploy-dl996dg_/ramdisk/ramdisk.cpio.gz.uboot
796 18:18:52.658254 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
797 18:18:52.665225 tftpboot 0x08000000 976266/tftp-deploy-dl996dg_/ramdisk/ramdisk.cpio.gz.uboot
798 18:18:52.665686 Speed: 1000, full duplex
799 18:18:52.666100 Using ethernet@ff3f0000 device
800 18:18:52.670638 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
801 18:18:52.679553 Filename '976266/tftp-deploy-dl996dg_/ramdisk/ramdisk.cpio.gz.uboot'.
802 18:18:52.680056 Load address: 0x8000000
803 18:18:54.184243 Loading: *################################################# UDP wrong checksum 00000005 000097a1
804 18:18:59.184747 T UDP wrong checksum 00000005 000097a1
805 18:19:02.845871 UDP wrong checksum 000000ff 0000e427
806 18:19:02.887944 UDP wrong checksum 000000ff 0000771a
807 18:19:09.186766 T T UDP wrong checksum 00000005 000097a1
808 18:19:10.247415 UDP wrong checksum 000000ff 00004ab1
809 18:19:10.269850 UDP wrong checksum 000000ff 0000d3a3
810 18:19:26.778882 T T T UDP wrong checksum 000000ff 000040b3
811 18:19:26.815545 UDP wrong checksum 000000ff 0000992b
812 18:19:29.189247 UDP wrong checksum 00000005 000097a1
813 18:19:49.194623 T T T T
814 18:19:49.195033 Retry count exceeded; starting again
816 18:19:49.197152 end: 2.4.3 bootloader-commands (duration 00:01:02) [common]
819 18:19:49.199496 end: 2.4 uboot-commands (duration 00:01:20) [common]
821 18:19:49.201351 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
823 18:19:49.202631 end: 2 uboot-action (duration 00:01:20) [common]
825 18:19:49.204876 Cleaning after the job
826 18:19:49.205714 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/ramdisk
827 18:19:49.207311 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/kernel
828 18:19:49.251007 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/dtb
829 18:19:49.251873 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/nfsrootfs
830 18:19:49.536897 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/976266/tftp-deploy-dl996dg_/modules
831 18:19:49.558196 start: 4.1 power-off (timeout 00:00:30) [common]
832 18:19:49.558862 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
833 18:19:49.595822 >> OK - accepted request
834 18:19:49.597966 Returned 0 in 0 seconds
835 18:19:49.698775 end: 4.1 power-off (duration 00:00:00) [common]
837 18:19:49.699808 start: 4.2 read-feedback (timeout 00:10:00) [common]
838 18:19:49.700562 Listened to connection for namespace 'common' for up to 1s
839 18:19:50.701473 Finalising connection for namespace 'common'
840 18:19:50.701948 Disconnecting from shell: Finalise
841 18:19:50.702209 =>
842 18:19:50.802852 end: 4.2 read-feedback (duration 00:00:01) [common]
843 18:19:50.803243 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/976266
844 18:19:53.743291 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/976266
845 18:19:53.743878 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.