Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 09:22:21.725038 lava-dispatcher, installed at version: 2022.10
2 09:22:21.725304 start: 0 validate
3 09:22:21.725465 Start time: 2022-11-23 09:22:21.725457+00:00 (UTC)
4 09:22:21.725601 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:22:21.725734 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221107.1%2Fx86%2Frootfs.cpio.gz exists
6 09:22:22.017268 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:22:22.017485 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.265-cip85-36-gf1ffb3de9576%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:22:34.053165 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:22:34.053327 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.265-cip85-36-gf1ffb3de9576%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 09:22:34.056186 validate duration: 12.33
12 09:22:34.056420 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:22:34.056520 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:22:34.056608 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:22:34.056707 Not decompressing ramdisk as can be used compressed.
16 09:22:34.056786 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221107.1/x86/rootfs.cpio.gz
17 09:22:34.056849 saving as /var/lib/lava/dispatcher/tmp/8093904/tftp-deploy-chfrea9_/ramdisk/rootfs.cpio.gz
18 09:22:34.056909 total size: 8415749 (8MB)
19 09:22:34.349697 progress 0% (0MB)
20 09:22:34.360368 progress 5% (0MB)
21 09:22:34.371154 progress 10% (0MB)
22 09:22:34.385142 progress 15% (1MB)
23 09:22:34.399570 progress 20% (1MB)
24 09:22:34.414484 progress 25% (2MB)
25 09:22:34.428944 progress 30% (2MB)
26 09:22:34.441963 progress 35% (2MB)
27 09:22:34.456447 progress 40% (3MB)
28 09:22:34.471918 progress 45% (3MB)
29 09:22:34.485418 progress 50% (4MB)
30 09:22:34.501710 progress 55% (4MB)
31 09:22:34.515727 progress 60% (4MB)
32 09:22:34.528354 progress 65% (5MB)
33 09:22:34.542405 progress 70% (5MB)
34 09:22:34.558313 progress 75% (6MB)
35 09:22:34.571387 progress 80% (6MB)
36 09:22:34.587116 progress 85% (6MB)
37 09:22:34.601102 progress 90% (7MB)
38 09:22:34.622356 progress 95% (7MB)
39 09:22:34.652569 progress 100% (8MB)
40 09:22:34.652862 8MB downloaded in 0.60s (13.47MB/s)
41 09:22:34.653056 end: 1.1.1 http-download (duration 00:00:01) [common]
43 09:22:34.653306 end: 1.1 download-retry (duration 00:00:01) [common]
44 09:22:34.653395 start: 1.2 download-retry (timeout 00:09:59) [common]
45 09:22:34.653522 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 09:22:34.653628 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.265-cip85-36-gf1ffb3de9576/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 09:22:34.653697 saving as /var/lib/lava/dispatcher/tmp/8093904/tftp-deploy-chfrea9_/kernel/bzImage
48 09:22:34.653758 total size: 9273344 (8MB)
49 09:22:34.653819 No compression specified
50 09:22:34.682198 progress 0% (0MB)
51 09:22:34.755867 progress 5% (0MB)
52 09:22:34.823642 progress 10% (0MB)
53 09:22:34.870354 progress 15% (1MB)
54 09:22:34.927040 progress 20% (1MB)
55 09:22:34.984434 progress 25% (2MB)
56 09:22:35.045803 progress 30% (2MB)
57 09:22:35.125357 progress 35% (3MB)
58 09:22:35.203804 progress 40% (3MB)
59 09:22:35.282767 progress 45% (4MB)
60 09:22:35.379317 progress 50% (4MB)
61 09:22:35.468973 progress 55% (4MB)
62 09:22:35.567836 progress 60% (5MB)
63 09:22:35.689951 progress 65% (5MB)
64 09:22:35.832015 progress 70% (6MB)
65 09:22:35.932177 progress 75% (6MB)
66 09:22:36.038447 progress 80% (7MB)
67 09:22:36.118521 progress 85% (7MB)
68 09:22:36.196321 progress 90% (7MB)
69 09:22:36.272589 progress 95% (8MB)
70 09:22:36.349541 progress 100% (8MB)
71 09:22:36.349883 8MB downloaded in 1.70s (5.21MB/s)
72 09:22:36.350039 end: 1.2.1 http-download (duration 00:00:02) [common]
74 09:22:36.350280 end: 1.2 download-retry (duration 00:00:02) [common]
75 09:22:36.350368 start: 1.3 download-retry (timeout 00:09:58) [common]
76 09:22:36.350454 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 09:22:36.350557 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.265-cip85-36-gf1ffb3de9576/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 09:22:36.350624 saving as /var/lib/lava/dispatcher/tmp/8093904/tftp-deploy-chfrea9_/modules/modules.tar
79 09:22:36.350685 total size: 64732 (0MB)
80 09:22:36.350749 Using unxz to decompress xz
81 09:22:36.461572 progress 50% (0MB)
82 09:22:36.482324 progress 100% (0MB)
83 09:22:36.484703 0MB downloaded in 0.13s (0.46MB/s)
84 09:22:36.484936 end: 1.3.1 http-download (duration 00:00:00) [common]
86 09:22:36.485198 end: 1.3 download-retry (duration 00:00:00) [common]
87 09:22:36.485302 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 09:22:36.485438 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 09:22:36.485540 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 09:22:36.485628 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 09:22:36.485804 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o
92 09:22:36.485913 makedir: /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin
93 09:22:36.485998 makedir: /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/tests
94 09:22:36.486078 makedir: /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/results
95 09:22:36.486186 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-add-keys
96 09:22:36.486329 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-add-sources
97 09:22:36.486469 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-background-process-start
98 09:22:36.486608 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-background-process-stop
99 09:22:36.486723 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-common-functions
100 09:22:36.486852 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-echo-ipv4
101 09:22:36.486967 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-install-packages
102 09:22:36.487080 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-installed-packages
103 09:22:36.487190 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-os-build
104 09:22:36.487300 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-probe-channel
105 09:22:36.487416 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-probe-ip
106 09:22:36.487543 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-target-ip
107 09:22:36.487656 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-target-mac
108 09:22:36.487766 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-target-storage
109 09:22:36.487897 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-test-case
110 09:22:36.488012 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-test-event
111 09:22:36.488125 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-test-feedback
112 09:22:36.488234 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-test-raise
113 09:22:36.488348 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-test-reference
114 09:22:36.488458 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-test-runner
115 09:22:36.488567 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-test-set
116 09:22:36.488675 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-test-shell
117 09:22:36.488836 Updating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-install-packages (oe)
118 09:22:36.488981 Updating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/bin/lava-installed-packages (oe)
119 09:22:36.489150 Creating /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/environment
120 09:22:36.489256 LAVA metadata
121 09:22:36.489332 - LAVA_JOB_ID=8093904
122 09:22:36.489401 - LAVA_DISPATCHER_IP=192.168.201.1
123 09:22:36.489544 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 09:22:36.489613 skipped lava-vland-overlay
125 09:22:36.489693 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 09:22:36.489779 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 09:22:36.489881 skipped lava-multinode-overlay
128 09:22:36.489958 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 09:22:36.490043 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 09:22:36.490184 Loading test definitions
131 09:22:36.490302 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 09:22:36.490382 Using /lava-8093904 at stage 0
133 09:22:36.490650 uuid=8093904_1.4.2.3.1 testdef=None
134 09:22:36.490741 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 09:22:36.490829 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 09:22:36.491336 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 09:22:36.491564 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 09:22:36.492136 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 09:22:36.492379 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 09:22:36.492916 runner path: /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/0/tests/0_dmesg test_uuid 8093904_1.4.2.3.1
143 09:22:36.493063 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 09:22:36.493303 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 09:22:36.493406 Using /lava-8093904 at stage 1
147 09:22:36.493694 uuid=8093904_1.4.2.3.5 testdef=None
148 09:22:36.493786 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 09:22:36.493875 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 09:22:36.494310 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 09:22:36.494534 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 09:22:36.495100 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 09:22:36.495338 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 09:22:36.495892 runner path: /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/1/tests/1_bootrr test_uuid 8093904_1.4.2.3.5
157 09:22:36.496034 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 09:22:36.496245 Creating lava-test-runner.conf files
160 09:22:36.496309 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/0 for stage 0
161 09:22:36.496391 - 0_dmesg
162 09:22:36.496465 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8093904/lava-overlay-nlht824o/lava-8093904/1 for stage 1
163 09:22:36.496547 - 1_bootrr
164 09:22:36.496637 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 09:22:36.496725 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 09:22:36.502906 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 09:22:36.503015 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 09:22:36.503105 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 09:22:36.503192 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 09:22:36.503278 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 09:22:36.685978 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 09:22:36.686340 start: 1.4.4 extract-modules (timeout 00:09:57) [common]
173 09:22:36.686451 extracting modules file /var/lib/lava/dispatcher/tmp/8093904/tftp-deploy-chfrea9_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8093904/extract-overlay-ramdisk-yl5w5t18/ramdisk
174 09:22:36.690551 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 09:22:36.690668 start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
176 09:22:36.690754 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8093904/compress-overlay-l7jma1rk/overlay-1.4.2.4.tar.gz to ramdisk
177 09:22:36.690828 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8093904/compress-overlay-l7jma1rk/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8093904/extract-overlay-ramdisk-yl5w5t18/ramdisk
178 09:22:36.694632 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 09:22:36.694745 start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
180 09:22:36.694838 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 09:22:36.694929 start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
182 09:22:36.695006 Building ramdisk /var/lib/lava/dispatcher/tmp/8093904/extract-overlay-ramdisk-yl5w5t18/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8093904/extract-overlay-ramdisk-yl5w5t18/ramdisk
183 09:22:36.758323 >> 48236 blocks
184 09:22:37.508651 rename /var/lib/lava/dispatcher/tmp/8093904/extract-overlay-ramdisk-yl5w5t18/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8093904/tftp-deploy-chfrea9_/ramdisk/ramdisk.cpio.gz
185 09:22:37.509170 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 09:22:37.509359 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 09:22:37.509534 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 09:22:37.509682 No mkimage arch provided, not using FIT.
189 09:22:37.509826 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 09:22:37.509971 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 09:22:37.510132 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 09:22:37.510290 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 09:22:37.510421 No LXC device requested
194 09:22:37.510564 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 09:22:37.510715 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 09:22:37.510864 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 09:22:37.510989 Checking files for TFTP limit of 4294967296 bytes.
198 09:22:37.511590 end: 1 tftp-deploy (duration 00:00:03) [common]
199 09:22:37.511754 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 09:22:37.511911 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 09:22:37.512109 substitutions:
202 09:22:37.512230 - {DTB}: None
203 09:22:37.512348 - {INITRD}: 8093904/tftp-deploy-chfrea9_/ramdisk/ramdisk.cpio.gz
204 09:22:37.512459 - {KERNEL}: 8093904/tftp-deploy-chfrea9_/kernel/bzImage
205 09:22:37.512565 - {LAVA_MAC}: None
206 09:22:37.512675 - {PRESEED_CONFIG}: None
207 09:22:37.512779 - {PRESEED_LOCAL}: None
208 09:22:37.512891 - {RAMDISK}: 8093904/tftp-deploy-chfrea9_/ramdisk/ramdisk.cpio.gz
209 09:22:37.513001 - {ROOT_PART}: None
210 09:22:37.513107 - {ROOT}: None
211 09:22:37.513216 - {SERVER_IP}: 192.168.201.1
212 09:22:37.513322 - {TEE}: None
213 09:22:37.513432 Parsed boot commands:
214 09:22:37.513538 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 09:22:37.513783 Parsed boot commands: tftpboot 192.168.201.1 8093904/tftp-deploy-chfrea9_/kernel/bzImage 8093904/tftp-deploy-chfrea9_/kernel/cmdline 8093904/tftp-deploy-chfrea9_/ramdisk/ramdisk.cpio.gz
216 09:22:37.513940 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 09:22:37.514101 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 09:22:37.514270 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 09:22:37.514425 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 09:22:37.514547 Not connected, no need to disconnect.
221 09:22:37.514682 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 09:22:37.514837 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 09:22:37.514960 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-0'
224 09:22:37.517939 Setting prompt string to ['lava-test: # ']
225 09:22:37.518315 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 09:22:37.518480 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 09:22:37.518645 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 09:22:37.518789 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 09:22:37.519076 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
230 09:22:37.538509 >> Command sent successfully.
231 09:22:37.540355 Returned 0 in 0 seconds
232 09:22:37.641187 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 09:22:37.641993 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 09:22:37.642154 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 09:22:37.642292 Setting prompt string to 'Starting depthcharge on Voema...'
237 09:22:37.642407 Changing prompt to 'Starting depthcharge on Voema...'
238 09:22:37.642527 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 09:22:37.642913 [Enter `^Ec?' for help]
240 09:22:45.702703
241 09:22:45.702896
242 09:22:45.712344 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 09:22:45.715674 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 09:22:45.718989
245 09:22:45.722777 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
246 09:22:45.725952 CPU: AES supported, TXT NOT supported, VT supported
247 09:22:45.732420 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
248 09:22:45.738734 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
249 09:22:45.742249 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
250 09:22:45.745972 VBOOT: Loading verstage.
251 09:22:45.752707 FMAP: Found "FLASH" version 1.1 at 0x1804000.
252 09:22:45.755862 FMAP: base = 0x0 size = 0x2000000 #areas = 32
253 09:22:45.759020 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
254 09:22:45.769791 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
255 09:22:45.776394 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 09:22:45.776484
257 09:22:45.776553
258 09:22:45.789349 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 09:22:45.803090 Probing TPM: . done!
260 09:22:45.806371 TPM ready after 0 ms
261 09:22:45.810424 Connected to device vid:did:rid of 1ae0:0028:00
262 09:22:45.821785 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
263 09:22:45.827809 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 09:22:45.831113 Initialized TPM device CR50 revision 0
265 09:22:45.915662 tlcl_send_startup: Startup return code is 0
266 09:22:45.915782 TPM: setup succeeded
267 09:22:45.929918 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 09:22:45.944762 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 09:22:45.956932 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 09:22:45.966908 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 09:22:45.970826 Chrome EC: UHEPI supported
272 09:22:45.973890 Phase 1
273 09:22:45.977546 FMAP: area GBB found @ 1805000 (458752 bytes)
274 09:22:45.984216 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 09:22:45.987224
276 09:22:45.993656 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
277 09:22:46.000507 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
278 09:22:46.006954 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
279 09:22:46.010167 Recovery requested (1009000e)
280 09:22:46.013650 TPM: Extending digest for VBOOT: boot mode into PCR 0
281 09:22:46.025506 tlcl_extend: response is 0
282 09:22:46.031727 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
283 09:22:46.041643 tlcl_extend: response is 0
284 09:22:46.048336 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 09:22:46.055106 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
286 09:22:46.061580 BS: verstage times (exec / console): total (unknown) / 142 ms
287 09:22:46.061682
288 09:22:46.061781
289 09:22:46.074579 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
290 09:22:46.081606 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
291 09:22:46.084521 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
292 09:22:46.087727 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
293 09:22:46.094465 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
294 09:22:46.098450 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
295 09:22:46.101740 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
296 09:22:46.104531 TCO_STS: 0000 0000
297 09:22:46.108137 GEN_PMCON: d0015038 00002200
298 09:22:46.111433 GBLRST_CAUSE: 00000000 00000000
299 09:22:46.111511 HPR_CAUSE0: 00000000
300 09:22:46.114570
301 09:22:46.114656 prev_sleep_state 5
302 09:22:46.117779 Boot Count incremented to 12790
303 09:22:46.124811 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
304 09:22:46.131532 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
305 09:22:46.141297 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
306 09:22:46.145091 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
307 09:22:46.154001 Chrome EC: UHEPI supported
308 09:22:46.159884 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
309 09:22:46.173180 Probing TPM: done!
310 09:22:46.179457 Connected to device vid:did:rid of 1ae0:0028:00
311 09:22:46.189509 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
312 09:22:46.193587 Initialized TPM device CR50 revision 0
313 09:22:46.207228 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
314 09:22:46.213648 MRC: Hash idx 0x100b comparison successful.
315 09:22:46.216821 MRC cache found, size faa8
316 09:22:46.216908 bootmode is set to: 2
317 09:22:46.220643 SPD index = 0
318 09:22:46.226585 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
319 09:22:46.230165 SPD: module type is LPDDR4X
320 09:22:46.233278 SPD: module part number is MT53E512M64D4NW-046
321 09:22:46.240355 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
322 09:22:46.243506 SPD: device width 16 bits, bus width 16 bits
323 09:22:46.246526
324 09:22:46.249952 SPD: module size is 1024 MB (per channel)
325 09:22:46.683412 CBMEM:
326 09:22:46.686693 IMD: root @ 0x76fff000 254 entries.
327 09:22:46.690052 IMD: root @ 0x76ffec00 62 entries.
328 09:22:46.693039 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
329 09:22:46.699814 FMAP: area RW_VPD found @ f35000 (8192 bytes)
330 09:22:46.703343 External stage cache:
331 09:22:46.706420 IMD: root @ 0x7b3ff000 254 entries.
332 09:22:46.709800 IMD: root @ 0x7b3fec00 62 entries.
333 09:22:46.726062 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
334 09:22:46.732270 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
335 09:22:46.739303 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
336 09:22:46.752050 MRC: 'RECOVERY_MRC_CACHE' does not need update.
337 09:22:46.758591 cse_lite: Skip switching to RW in the recovery path
338 09:22:46.758684 8 DIMMs found
339 09:22:46.758755 SMM Memory Map
340 09:22:46.762255
341 09:22:46.765320 SMRAM : 0x7b000000 0x800000
342 09:22:46.768946 Subregion 0: 0x7b000000 0x200000
343 09:22:46.771782 Subregion 1: 0x7b200000 0x200000
344 09:22:46.775201 Subregion 2: 0x7b400000 0x400000
345 09:22:46.775279 top_of_ram = 0x77000000
346 09:22:46.782096 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
347 09:22:46.788679 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
348 09:22:46.791889 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
349 09:22:46.798789 MTRR Range: Start=ff000000 End=0 (Size 1000000)
350 09:22:46.804967 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
351 09:22:46.811371 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
352 09:22:46.822597 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
353 09:22:46.825789 Processing 211 relocs. Offset value of 0x74c0b000
354 09:22:46.828348
355 09:22:46.834961 BS: romstage times (exec / console): total (unknown) / 277 ms
356 09:22:46.841137
357 09:22:46.841225
358 09:22:46.851180 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 09:22:46.854724 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 09:22:46.864493 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 09:22:46.871072 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 09:22:46.877419 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 09:22:46.884099 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 09:22:46.931028 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 09:22:46.937405 Processing 5008 relocs. Offset value of 0x75d98000
366 09:22:46.941043 BS: postcar times (exec / console): total (unknown) / 59 ms
367 09:22:46.944338
368 09:22:46.944448
369 09:22:46.944548
370 09:22:46.954173 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
371 09:22:46.954261 Normal boot
372 09:22:46.957554 FW_CONFIG value is 0x804c02
373 09:22:46.960776 PCI: 00:07.0 disabled by fw_config
374 09:22:46.963982 PCI: 00:07.1 disabled by fw_config
375 09:22:46.970456 PCI: 00:0d.2 disabled by fw_config
376 09:22:46.973902 PCI: 00:1c.7 disabled by fw_config
377 09:22:46.977044 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 09:22:46.984119 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 09:22:46.990309 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
380 09:22:46.993709 GENERIC: 0.0 disabled by fw_config
381 09:22:46.997093 GENERIC: 1.0 disabled by fw_config
382 09:22:47.000193 fw_config match found: DB_USB=USB3_ACTIVE
383 09:22:47.003889 fw_config match found: DB_USB=USB3_ACTIVE
384 09:22:47.007031 fw_config match found: DB_USB=USB3_ACTIVE
385 09:22:47.010401
386 09:22:47.013511 fw_config match found: DB_USB=USB3_ACTIVE
387 09:22:47.017046 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
388 09:22:47.027098 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
389 09:22:47.033420 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
390 09:22:47.040347 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
391 09:22:47.046586 microcode: sig=0x806c1 pf=0x80 revision=0x86
392 09:22:47.049715 microcode: Update skipped, already up-to-date
393 09:22:47.056733 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
394 09:22:47.085121 Detected 4 core, 8 thread CPU.
395 09:22:47.088469 Setting up SMI for CPU
396 09:22:47.091551 IED base = 0x7b400000
397 09:22:47.091636 IED size = 0x00400000
398 09:22:47.094847 Will perform SMM setup.
399 09:22:47.101667 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
400 09:22:47.108132 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
401 09:22:47.114836 Processing 16 relocs. Offset value of 0x00030000
402 09:22:47.117998 Attempting to start 7 APs
403 09:22:47.121354 Waiting for 10ms after sending INIT.
404 09:22:47.136785 Waiting for 1st SIPI to complete...done.
405 09:22:47.136873 AP: slot 1 apic_id 1.
406 09:22:47.143708 Waiting for 2nd SIPI to complete...done.
407 09:22:47.143795 AP: slot 5 apic_id 5.
408 09:22:47.147332 AP: slot 4 apic_id 4.
409 09:22:47.150177 AP: slot 2 apic_id 3.
410 09:22:47.150263 AP: slot 6 apic_id 2.
411 09:22:47.153358 AP: slot 3 apic_id 6.
412 09:22:47.156772 AP: slot 7 apic_id 7.
413 09:22:47.163403 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
414 09:22:47.169764 Processing 13 relocs. Offset value of 0x00038000
415 09:22:47.169855 Unable to locate Global NVS
416 09:22:47.173109
417 09:22:47.179855 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
418 09:22:47.183258 Installing permanent SMM handler to 0x7b000000
419 09:22:47.193045 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
420 09:22:47.196772 Processing 794 relocs. Offset value of 0x7b010000
421 09:22:47.206886 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
422 09:22:47.210408 Processing 13 relocs. Offset value of 0x7b008000
423 09:22:47.216463 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
424 09:22:47.223323 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
425 09:22:47.226731 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
426 09:22:47.233534 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
427 09:22:47.239534 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
428 09:22:47.246298 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
429 09:22:47.252935 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
430 09:22:47.253023 Unable to locate Global NVS
431 09:22:47.263276 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
432 09:22:47.266556 Clearing SMI status registers
433 09:22:47.266648 SMI_STS: PM1
434 09:22:47.269259 PM1_STS: PWRBTN
435 09:22:47.275936 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
436 09:22:47.279259 In relocation handler: CPU 0
437 09:22:47.282926 New SMBASE=0x7b000000 IEDBASE=0x7b400000
438 09:22:47.289337 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 09:22:47.289434 Relocation complete.
440 09:22:47.299329 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
441 09:22:47.299424 In relocation handler: CPU 1
442 09:22:47.302398
443 09:22:47.305809 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
444 09:22:47.305901 Relocation complete.
445 09:22:47.315807 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
446 09:22:47.315893 In relocation handler: CPU 4
447 09:22:47.322890 New SMBASE=0x7afff000 IEDBASE=0x7b400000
448 09:22:47.325549 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 09:22:47.329306 Relocation complete.
450 09:22:47.335918 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
451 09:22:47.339345 In relocation handler: CPU 5
452 09:22:47.342369 New SMBASE=0x7affec00 IEDBASE=0x7b400000
453 09:22:47.345839 Relocation complete.
454 09:22:47.352195 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
455 09:22:47.355438 In relocation handler: CPU 6
456 09:22:47.358759 New SMBASE=0x7affe800 IEDBASE=0x7b400000
457 09:22:47.365975 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 09:22:47.366071 Relocation complete.
459 09:22:47.372320 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
460 09:22:47.375405 In relocation handler: CPU 2
461 09:22:47.381821 New SMBASE=0x7afff800 IEDBASE=0x7b400000
462 09:22:47.381910 Relocation complete.
463 09:22:47.389446 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
464 09:22:47.393340 In relocation handler: CPU 3
465 09:22:47.396568 New SMBASE=0x7afff400 IEDBASE=0x7b400000
466 09:22:47.403583 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 09:22:47.403674 Relocation complete.
468 09:22:47.410054 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
469 09:22:47.413360 In relocation handler: CPU 7
470 09:22:47.420217 New SMBASE=0x7affe400 IEDBASE=0x7b400000
471 09:22:47.420308 Relocation complete.
472 09:22:47.423475 Initializing CPU #0
473 09:22:47.427005 CPU: vendor Intel device 806c1
474 09:22:47.430183 CPU: family 06, model 8c, stepping 01
475 09:22:47.433409 Clearing out pending MCEs
476 09:22:47.436273 Setting up local APIC...
477 09:22:47.436359 apic_id: 0x00 done.
478 09:22:47.439990 Turbo is available but hidden
479 09:22:47.443260 Turbo is available and visible
480 09:22:47.449792 microcode: Update skipped, already up-to-date
481 09:22:47.449877 CPU #0 initialized
482 09:22:47.453380 Initializing CPU #2
483 09:22:47.453487 Initializing CPU #4
484 09:22:47.456373 Initializing CPU #5
485 09:22:47.459556 Initializing CPU #6
486 09:22:47.463275 CPU: vendor Intel device 806c1
487 09:22:47.466320 CPU: family 06, model 8c, stepping 01
488 09:22:47.469685 CPU: vendor Intel device 806c1
489 09:22:47.473084 CPU: family 06, model 8c, stepping 01
490 09:22:47.476264 Clearing out pending MCEs
491 09:22:47.476350 Initializing CPU #7
492 09:22:47.479641 Initializing CPU #3
493 09:22:47.483416 CPU: vendor Intel device 806c1
494 09:22:47.485967 CPU: family 06, model 8c, stepping 01
495 09:22:47.489775 CPU: vendor Intel device 806c1
496 09:22:47.493292 CPU: family 06, model 8c, stepping 01
497 09:22:47.495998 Clearing out pending MCEs
498 09:22:47.499630 Clearing out pending MCEs
499 09:22:47.499714 Setting up local APIC...
500 09:22:47.502915 Clearing out pending MCEs
501 09:22:47.506104 CPU: vendor Intel device 806c1
502 09:22:47.509294 CPU: family 06, model 8c, stepping 01
503 09:22:47.513138 CPU: vendor Intel device 806c1
504 09:22:47.516266 CPU: family 06, model 8c, stepping 01
505 09:22:47.519877 Clearing out pending MCEs
506 09:22:47.522824 Clearing out pending MCEs
507 09:22:47.526000 Setting up local APIC...
508 09:22:47.526085 Setting up local APIC...
509 09:22:47.529364
510 09:22:47.529472 Initializing CPU #1
511 09:22:47.532801 apic_id: 0x07 done.
512 09:22:47.532886 apic_id: 0x06 done.
513 09:22:47.540037 microcode: Update skipped, already up-to-date
514 09:22:47.542786 microcode: Update skipped, already up-to-date
515 09:22:47.546541 CPU #7 initialized
516 09:22:47.546637 CPU #3 initialized
517 09:22:47.549306 Setting up local APIC...
518 09:22:47.552999 Setting up local APIC...
519 09:22:47.555884 CPU: vendor Intel device 806c1
520 09:22:47.559048 CPU: family 06, model 8c, stepping 01
521 09:22:47.562843 Setting up local APIC...
522 09:22:47.565658 Clearing out pending MCEs
523 09:22:47.565779 apic_id: 0x02 done.
524 09:22:47.569287 apic_id: 0x03 done.
525 09:22:47.572365 microcode: Update skipped, already up-to-date
526 09:22:47.579696 microcode: Update skipped, already up-to-date
527 09:22:47.579802 CPU #6 initialized
528 09:22:47.582192 CPU #2 initialized
529 09:22:47.585920 Setting up local APIC...
530 09:22:47.586013 apic_id: 0x04 done.
531 09:22:47.589114 apic_id: 0x05 done.
532 09:22:47.592422 microcode: Update skipped, already up-to-date
533 09:22:47.599521 microcode: Update skipped, already up-to-date
534 09:22:47.599607 CPU #4 initialized
535 09:22:47.602458 CPU #5 initialized
536 09:22:47.602545 apic_id: 0x01 done.
537 09:22:47.608868 microcode: Update skipped, already up-to-date
538 09:22:47.608956 CPU #1 initialized
539 09:22:47.615877 bsp_do_flight_plan done after 468 msecs.
540 09:22:47.618816 CPU: frequency set to 4000 MHz
541 09:22:47.618903 Enabling SMIs.
542 09:22:47.625984 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
543 09:22:47.641833 SATAXPCIE1 indicates PCIe NVMe is present
544 09:22:47.645271 Probing TPM: done!
545 09:22:47.648663 Connected to device vid:did:rid of 1ae0:0028:00
546 09:22:47.659105 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
547 09:22:47.662759 Initialized TPM device CR50 revision 0
548 09:22:47.665846 Enabling S0i3.4
549 09:22:47.672332 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
550 09:22:47.675762 Found a VBT of 8704 bytes after decompression
551 09:22:47.682543 cse_lite: CSE RO boot. HybridStorageMode disabled
552 09:22:47.688772 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
553 09:22:47.765294 FSPS returned 0
554 09:22:47.768386 Executing Phase 1 of FspMultiPhaseSiInit
555 09:22:47.778137 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
556 09:22:47.781597 port C0 DISC req: usage 1 usb3 1 usb2 5
557 09:22:47.785234 Raw Buffer output 0 00000511
558 09:22:47.788132 Raw Buffer output 1 00000000
559 09:22:47.791930 pmc_send_ipc_cmd succeeded
560 09:22:47.795309 port C1 DISC req: usage 1 usb3 2 usb2 3
561 09:22:47.798806
562 09:22:47.798893 Raw Buffer output 0 00000321
563 09:22:47.802043 Raw Buffer output 1 00000000
564 09:22:47.806854 pmc_send_ipc_cmd succeeded
565 09:22:47.811260 Detected 4 core, 8 thread CPU.
566 09:22:47.814787 Detected 4 core, 8 thread CPU.
567 09:22:48.048337 Display FSP Version Info HOB
568 09:22:48.051684 Reference Code - CPU = a.0.4c.31
569 09:22:48.055075 uCode Version = 0.0.0.86
570 09:22:48.058348 TXT ACM version = ff.ff.ff.ffff
571 09:22:48.061810 Reference Code - ME = a.0.4c.31
572 09:22:48.065109 MEBx version = 0.0.0.0
573 09:22:48.068660 ME Firmware Version = Consumer SKU
574 09:22:48.071772 Reference Code - PCH = a.0.4c.31
575 09:22:48.075252 PCH-CRID Status = Disabled
576 09:22:48.078505 PCH-CRID Original Value = ff.ff.ff.ffff
577 09:22:48.081682 PCH-CRID New Value = ff.ff.ff.ffff
578 09:22:48.085531 OPROM - RST - RAID = ff.ff.ff.ffff
579 09:22:48.088279 PCH Hsio Version = 4.0.0.0
580 09:22:48.092082 Reference Code - SA - System Agent = a.0.4c.31
581 09:22:48.094712 Reference Code - MRC = 2.0.0.1
582 09:22:48.098097 SA - PCIe Version = a.0.4c.31
583 09:22:48.102026 SA-CRID Status = Disabled
584 09:22:48.104566 SA-CRID Original Value = 0.0.0.1
585 09:22:48.108032 SA-CRID New Value = 0.0.0.1
586 09:22:48.111897 OPROM - VBIOS = ff.ff.ff.ffff
587 09:22:48.115172 IO Manageability Engine FW Version = 11.1.4.0
588 09:22:48.118158 PHY Build Version = 0.0.0.e0
589 09:22:48.121132 Thunderbolt(TM) FW Version = 0.0.0.0
590 09:22:48.127714 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
591 09:22:48.131383 ITSS IRQ Polarities Before:
592 09:22:48.131501 IPC0: 0xffffffff
593 09:22:48.134590 IPC1: 0xffffffff
594 09:22:48.134673 IPC2: 0xffffffff
595 09:22:48.138433 IPC3: 0xffffffff
596 09:22:48.141351 ITSS IRQ Polarities After:
597 09:22:48.141457 IPC0: 0xffffffff
598 09:22:48.144672 IPC1: 0xffffffff
599 09:22:48.144763 IPC2: 0xffffffff
600 09:22:48.147588 IPC3: 0xffffffff
601 09:22:48.151401 Found PCIe Root Port #9 at PCI: 00:1d.0.
602 09:22:48.164621 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
603 09:22:48.173997 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
604 09:22:48.187359 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
605 09:22:48.194487 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
606 09:22:48.197283 Enumerating buses...
607 09:22:48.200808 Show all devs... Before device enumeration.
608 09:22:48.203924 Root Device: enabled 1
609 09:22:48.204008 DOMAIN: 0000: enabled 1
610 09:22:48.207581 CPU_CLUSTER: 0: enabled 1
611 09:22:48.210643 PCI: 00:00.0: enabled 1
612 09:22:48.214229 PCI: 00:02.0: enabled 1
613 09:22:48.214313 PCI: 00:04.0: enabled 1
614 09:22:48.217296 PCI: 00:05.0: enabled 1
615 09:22:48.220953 PCI: 00:06.0: enabled 0
616 09:22:48.223966 PCI: 00:07.0: enabled 0
617 09:22:48.224050 PCI: 00:07.1: enabled 0
618 09:22:48.227546 PCI: 00:07.2: enabled 0
619 09:22:48.230487 PCI: 00:07.3: enabled 0
620 09:22:48.234131 PCI: 00:08.0: enabled 1
621 09:22:48.234217 PCI: 00:09.0: enabled 0
622 09:22:48.237638 PCI: 00:0a.0: enabled 0
623 09:22:48.240566 PCI: 00:0d.0: enabled 1
624 09:22:48.240651 PCI: 00:0d.1: enabled 0
625 09:22:48.244364
626 09:22:48.244449 PCI: 00:0d.2: enabled 0
627 09:22:48.247605 PCI: 00:0d.3: enabled 0
628 09:22:48.250766 PCI: 00:0e.0: enabled 0
629 09:22:48.250865 PCI: 00:10.2: enabled 1
630 09:22:48.253694 PCI: 00:10.6: enabled 0
631 09:22:48.257293 PCI: 00:10.7: enabled 0
632 09:22:48.260510 PCI: 00:12.0: enabled 0
633 09:22:48.260589 PCI: 00:12.6: enabled 0
634 09:22:48.263774 PCI: 00:13.0: enabled 0
635 09:22:48.267010 PCI: 00:14.0: enabled 1
636 09:22:48.270630 PCI: 00:14.1: enabled 0
637 09:22:48.270715 PCI: 00:14.2: enabled 1
638 09:22:48.273687 PCI: 00:14.3: enabled 1
639 09:22:48.277091 PCI: 00:15.0: enabled 1
640 09:22:48.280657 PCI: 00:15.1: enabled 1
641 09:22:48.280788 PCI: 00:15.2: enabled 1
642 09:22:48.283960 PCI: 00:15.3: enabled 1
643 09:22:48.287091 PCI: 00:16.0: enabled 1
644 09:22:48.287176 PCI: 00:16.1: enabled 0
645 09:22:48.290315
646 09:22:48.290401 PCI: 00:16.2: enabled 0
647 09:22:48.294145 PCI: 00:16.3: enabled 0
648 09:22:48.297128 PCI: 00:16.4: enabled 0
649 09:22:48.297212 PCI: 00:16.5: enabled 0
650 09:22:48.300458 PCI: 00:17.0: enabled 1
651 09:22:48.304394 PCI: 00:19.0: enabled 0
652 09:22:48.307031 PCI: 00:19.1: enabled 1
653 09:22:48.307116 PCI: 00:19.2: enabled 0
654 09:22:48.310822 PCI: 00:1c.0: enabled 1
655 09:22:48.313910 PCI: 00:1c.1: enabled 0
656 09:22:48.317205 PCI: 00:1c.2: enabled 0
657 09:22:48.317290 PCI: 00:1c.3: enabled 0
658 09:22:48.320434 PCI: 00:1c.4: enabled 0
659 09:22:48.323807 PCI: 00:1c.5: enabled 0
660 09:22:48.326868 PCI: 00:1c.6: enabled 1
661 09:22:48.326954 PCI: 00:1c.7: enabled 0
662 09:22:48.330384 PCI: 00:1d.0: enabled 1
663 09:22:48.333666 PCI: 00:1d.1: enabled 0
664 09:22:48.333752 PCI: 00:1d.2: enabled 1
665 09:22:48.337700 PCI: 00:1d.3: enabled 0
666 09:22:48.339998 PCI: 00:1e.0: enabled 1
667 09:22:48.343406 PCI: 00:1e.1: enabled 0
668 09:22:48.343492 PCI: 00:1e.2: enabled 1
669 09:22:48.346623 PCI: 00:1e.3: enabled 1
670 09:22:48.350144 PCI: 00:1f.0: enabled 1
671 09:22:48.353329 PCI: 00:1f.1: enabled 0
672 09:22:48.353422 PCI: 00:1f.2: enabled 1
673 09:22:48.356577 PCI: 00:1f.3: enabled 1
674 09:22:48.360122 PCI: 00:1f.4: enabled 0
675 09:22:48.364012 PCI: 00:1f.5: enabled 1
676 09:22:48.364097 PCI: 00:1f.6: enabled 0
677 09:22:48.366594 PCI: 00:1f.7: enabled 0
678 09:22:48.370392 APIC: 00: enabled 1
679 09:22:48.370493 GENERIC: 0.0: enabled 1
680 09:22:48.373555 GENERIC: 0.0: enabled 1
681 09:22:48.376561 GENERIC: 1.0: enabled 1
682 09:22:48.379978 GENERIC: 0.0: enabled 1
683 09:22:48.380066 GENERIC: 1.0: enabled 1
684 09:22:48.383321 USB0 port 0: enabled 1
685 09:22:48.386738 GENERIC: 0.0: enabled 1
686 09:22:48.386823 USB0 port 0: enabled 1
687 09:22:48.390267
688 09:22:48.390352 GENERIC: 0.0: enabled 1
689 09:22:48.393662 I2C: 00:1a: enabled 1
690 09:22:48.397719 I2C: 00:31: enabled 1
691 09:22:48.397804 I2C: 00:32: enabled 1
692 09:22:48.399787 I2C: 00:10: enabled 1
693 09:22:48.403113 I2C: 00:15: enabled 1
694 09:22:48.403199 GENERIC: 0.0: enabled 0
695 09:22:48.406736 GENERIC: 1.0: enabled 0
696 09:22:48.410016 GENERIC: 0.0: enabled 1
697 09:22:48.410101 SPI: 00: enabled 1
698 09:22:48.413282 SPI: 00: enabled 1
699 09:22:48.416888 PNP: 0c09.0: enabled 1
700 09:22:48.416974 GENERIC: 0.0: enabled 1
701 09:22:48.420072 USB3 port 0: enabled 1
702 09:22:48.423405 USB3 port 1: enabled 1
703 09:22:48.426857 USB3 port 2: enabled 0
704 09:22:48.426942 USB3 port 3: enabled 0
705 09:22:48.430005 USB2 port 0: enabled 0
706 09:22:48.433342 USB2 port 1: enabled 1
707 09:22:48.433448 USB2 port 2: enabled 1
708 09:22:48.436809 USB2 port 3: enabled 0
709 09:22:48.439976 USB2 port 4: enabled 1
710 09:22:48.440061 USB2 port 5: enabled 0
711 09:22:48.443537
712 09:22:48.443623 USB2 port 6: enabled 0
713 09:22:48.446224 USB2 port 7: enabled 0
714 09:22:48.449598 USB2 port 8: enabled 0
715 09:22:48.449684 USB2 port 9: enabled 0
716 09:22:48.453324 USB3 port 0: enabled 0
717 09:22:48.456959 USB3 port 1: enabled 1
718 09:22:48.457046 USB3 port 2: enabled 0
719 09:22:48.459435 USB3 port 3: enabled 0
720 09:22:48.462964 GENERIC: 0.0: enabled 1
721 09:22:48.466541 GENERIC: 1.0: enabled 1
722 09:22:48.466714 APIC: 01: enabled 1
723 09:22:48.469468 APIC: 03: enabled 1
724 09:22:48.469604 APIC: 06: enabled 1
725 09:22:48.473096 APIC: 04: enabled 1
726 09:22:48.477107 APIC: 05: enabled 1
727 09:22:48.477194 APIC: 02: enabled 1
728 09:22:48.480118 APIC: 07: enabled 1
729 09:22:48.482746 Compare with tree...
730 09:22:48.482831 Root Device: enabled 1
731 09:22:48.486544 DOMAIN: 0000: enabled 1
732 09:22:48.489449 PCI: 00:00.0: enabled 1
733 09:22:48.492912 PCI: 00:02.0: enabled 1
734 09:22:48.493036 PCI: 00:04.0: enabled 1
735 09:22:48.496592 GENERIC: 0.0: enabled 1
736 09:22:48.499789 PCI: 00:05.0: enabled 1
737 09:22:48.503382 PCI: 00:06.0: enabled 0
738 09:22:48.506556 PCI: 00:07.0: enabled 0
739 09:22:48.506677 GENERIC: 0.0: enabled 1
740 09:22:48.509761 PCI: 00:07.1: enabled 0
741 09:22:48.513163 GENERIC: 1.0: enabled 1
742 09:22:48.516012 PCI: 00:07.2: enabled 0
743 09:22:48.519420 GENERIC: 0.0: enabled 1
744 09:22:48.519544 PCI: 00:07.3: enabled 0
745 09:22:48.522837
746 09:22:48.522914 GENERIC: 1.0: enabled 1
747 09:22:48.526176 PCI: 00:08.0: enabled 1
748 09:22:48.529261 PCI: 00:09.0: enabled 0
749 09:22:48.532971 PCI: 00:0a.0: enabled 0
750 09:22:48.533051 PCI: 00:0d.0: enabled 1
751 09:22:48.536230
752 09:22:48.536317 USB0 port 0: enabled 1
753 09:22:48.539589 USB3 port 0: enabled 1
754 09:22:48.542668 USB3 port 1: enabled 1
755 09:22:48.546038 USB3 port 2: enabled 0
756 09:22:48.549142 USB3 port 3: enabled 0
757 09:22:48.549217 PCI: 00:0d.1: enabled 0
758 09:22:48.552822 PCI: 00:0d.2: enabled 0
759 09:22:48.555985 GENERIC: 0.0: enabled 1
760 09:22:48.559789 PCI: 00:0d.3: enabled 0
761 09:22:48.562678 PCI: 00:0e.0: enabled 0
762 09:22:48.562765 PCI: 00:10.2: enabled 1
763 09:22:48.565797 PCI: 00:10.6: enabled 0
764 09:22:48.569376 PCI: 00:10.7: enabled 0
765 09:22:48.572393 PCI: 00:12.0: enabled 0
766 09:22:48.575686 PCI: 00:12.6: enabled 0
767 09:22:48.575765 PCI: 00:13.0: enabled 0
768 09:22:48.579099 PCI: 00:14.0: enabled 1
769 09:22:48.582248 USB0 port 0: enabled 1
770 09:22:48.585924 USB2 port 0: enabled 0
771 09:22:48.588838 USB2 port 1: enabled 1
772 09:22:48.588912 USB2 port 2: enabled 1
773 09:22:48.592339 USB2 port 3: enabled 0
774 09:22:48.595780 USB2 port 4: enabled 1
775 09:22:48.598751 USB2 port 5: enabled 0
776 09:22:48.602612 USB2 port 6: enabled 0
777 09:22:48.605772 USB2 port 7: enabled 0
778 09:22:48.605848 USB2 port 8: enabled 0
779 09:22:48.608968 USB2 port 9: enabled 0
780 09:22:48.612679 USB3 port 0: enabled 0
781 09:22:48.616077 USB3 port 1: enabled 1
782 09:22:48.619174 USB3 port 2: enabled 0
783 09:22:48.622576 USB3 port 3: enabled 0
784 09:22:48.622652 PCI: 00:14.1: enabled 0
785 09:22:48.625712 PCI: 00:14.2: enabled 1
786 09:22:48.628555 PCI: 00:14.3: enabled 1
787 09:22:48.632321 GENERIC: 0.0: enabled 1
788 09:22:48.632443 PCI: 00:15.0: enabled 1
789 09:22:48.635987
790 09:22:48.636108 I2C: 00:1a: enabled 1
791 09:22:48.639390 I2C: 00:31: enabled 1
792 09:22:48.643284 I2C: 00:32: enabled 1
793 09:22:48.643370 PCI: 00:15.1: enabled 1
794 09:22:48.646586 I2C: 00:10: enabled 1
795 09:22:48.649671 PCI: 00:15.2: enabled 1
796 09:22:48.652935 PCI: 00:15.3: enabled 1
797 09:22:48.703005 PCI: 00:16.0: enabled 1
798 09:22:48.703109 PCI: 00:16.1: enabled 0
799 09:22:48.703178 PCI: 00:16.2: enabled 0
800 09:22:48.703431 PCI: 00:16.3: enabled 0
801 09:22:48.703499 PCI: 00:16.4: enabled 0
802 09:22:48.703753 PCI: 00:16.5: enabled 0
803 09:22:48.703823 PCI: 00:17.0: enabled 1
804 09:22:48.703884 PCI: 00:19.0: enabled 0
805 09:22:48.704130
806 09:22:48.704197 PCI: 00:19.1: enabled 1
807 09:22:48.704256 I2C: 00:15: enabled 1
808 09:22:48.704500 PCI: 00:19.2: enabled 0
809 09:22:48.704563 PCI: 00:1d.0: enabled 1
810 09:22:48.704808 GENERIC: 0.0: enabled 1
811 09:22:48.704873 PCI: 00:1e.0: enabled 1
812 09:22:48.704932 PCI: 00:1e.1: enabled 0
813 09:22:48.705463 PCI: 00:1e.2: enabled 1
814 09:22:48.705549 SPI: 00: enabled 1
815 09:22:48.705969 PCI: 00:1e.3: enabled 1
816 09:22:48.706054 SPI: 00: enabled 1
817 09:22:48.706122 PCI: 00:1f.0: enabled 1
818 09:22:48.752767 PNP: 0c09.0: enabled 1
819 09:22:48.752866 PCI: 00:1f.1: enabled 0
820 09:22:48.753126 PCI: 00:1f.2: enabled 1
821 09:22:48.753197 GENERIC: 0.0: enabled 1
822 09:22:48.753731 GENERIC: 0.0: enabled 1
823 09:22:48.753804 GENERIC: 1.0: enabled 1
824 09:22:48.753875 PCI: 00:1f.3: enabled 1
825 09:22:48.754120 PCI: 00:1f.4: enabled 0
826 09:22:48.754187 PCI: 00:1f.5: enabled 1
827 09:22:48.754434 PCI: 00:1f.6: enabled 0
828 09:22:48.754501 PCI: 00:1f.7: enabled 0
829 09:22:48.754752 CPU_CLUSTER: 0: enabled 1
830 09:22:48.754825 APIC: 00: enabled 1
831 09:22:48.754887 APIC: 01: enabled 1
832 09:22:48.755130 APIC: 03: enabled 1
833 09:22:48.755194 APIC: 06: enabled 1
834 09:22:48.755252 APIC: 04: enabled 1
835 09:22:48.755879 APIC: 05: enabled 1
836 09:22:48.755947 APIC: 02: enabled 1
837 09:22:48.756005 APIC: 07: enabled 1
838 09:22:48.781087 Root Device scanning...
839 09:22:48.781202 scan_static_bus for Root Device
840 09:22:48.781485 DOMAIN: 0000 enabled
841 09:22:48.781567 CPU_CLUSTER: 0 enabled
842 09:22:48.781633 DOMAIN: 0000 scanning...
843 09:22:48.782275
844 09:22:48.782369 PCI: pci_scan_bus for bus 00
845 09:22:48.782476 PCI: 00:00.0 [8086/0000] ops
846 09:22:48.782747 PCI: 00:00.0 [8086/9a12] enabled
847 09:22:48.782817 PCI: 00:02.0 [8086/0000] bus ops
848 09:22:48.785043
849 09:22:48.785145 PCI: 00:02.0 [8086/9a40] enabled
850 09:22:48.788682 PCI: 00:04.0 [8086/0000] bus ops
851 09:22:48.791765 PCI: 00:04.0 [8086/9a03] enabled
852 09:22:48.794805 PCI: 00:05.0 [8086/9a19] enabled
853 09:22:48.798207 PCI: 00:07.0 [0000/0000] hidden
854 09:22:48.801617 PCI: 00:08.0 [8086/9a11] enabled
855 09:22:48.804923 PCI: 00:0a.0 [8086/9a0d] disabled
856 09:22:48.808432 PCI: 00:0d.0 [8086/0000] bus ops
857 09:22:48.811769 PCI: 00:0d.0 [8086/9a13] enabled
858 09:22:48.814729 PCI: 00:14.0 [8086/0000] bus ops
859 09:22:48.818083 PCI: 00:14.0 [8086/a0ed] enabled
860 09:22:48.821627 PCI: 00:14.2 [8086/a0ef] enabled
861 09:22:48.824646 PCI: 00:14.3 [8086/0000] bus ops
862 09:22:48.827712 PCI: 00:14.3 [8086/a0f0] enabled
863 09:22:48.831304 PCI: 00:15.0 [8086/0000] bus ops
864 09:22:48.834262 PCI: 00:15.0 [8086/a0e8] enabled
865 09:22:48.838198 PCI: 00:15.1 [8086/0000] bus ops
866 09:22:48.841245 PCI: 00:15.1 [8086/a0e9] enabled
867 09:22:48.844370 PCI: 00:15.2 [8086/0000] bus ops
868 09:22:48.847422 PCI: 00:15.2 [8086/a0ea] enabled
869 09:22:48.850821 PCI: 00:15.3 [8086/0000] bus ops
870 09:22:48.854330 PCI: 00:15.3 [8086/a0eb] enabled
871 09:22:48.857192 PCI: 00:16.0 [8086/0000] ops
872 09:22:48.861136 PCI: 00:16.0 [8086/a0e0] enabled
873 09:22:48.867145 PCI: Static device PCI: 00:17.0 not found, disabling it.
874 09:22:48.870703 PCI: 00:19.0 [8086/0000] bus ops
875 09:22:48.874159 PCI: 00:19.0 [8086/a0c5] disabled
876 09:22:48.877500 PCI: 00:19.1 [8086/0000] bus ops
877 09:22:48.880432 PCI: 00:19.1 [8086/a0c6] enabled
878 09:22:48.883872 PCI: 00:1d.0 [8086/0000] bus ops
879 09:22:48.887396 PCI: 00:1d.0 [8086/a0b0] enabled
880 09:22:48.890601 PCI: 00:1e.0 [8086/0000] ops
881 09:22:48.893965 PCI: 00:1e.0 [8086/a0a8] enabled
882 09:22:48.896994 PCI: 00:1e.2 [8086/0000] bus ops
883 09:22:48.900376 PCI: 00:1e.2 [8086/a0aa] enabled
884 09:22:48.904140 PCI: 00:1e.3 [8086/0000] bus ops
885 09:22:48.907202 PCI: 00:1e.3 [8086/a0ab] enabled
886 09:22:48.910574 PCI: 00:1f.0 [8086/0000] bus ops
887 09:22:48.913670 PCI: 00:1f.0 [8086/a087] enabled
888 09:22:48.913755 RTC Init
889 09:22:48.916807 Set power on after power failure.
890 09:22:48.920026 Disabling Deep S3
891 09:22:48.920111 Disabling Deep S3
892 09:22:48.923504 Disabling Deep S4
893 09:22:48.926745 Disabling Deep S4
894 09:22:48.926867 Disabling Deep S5
895 09:22:48.930589 Disabling Deep S5
896 09:22:48.933827 PCI: 00:1f.2 [0000/0000] hidden
897 09:22:48.936616 PCI: 00:1f.3 [8086/0000] bus ops
898 09:22:48.940038 PCI: 00:1f.3 [8086/a0c8] enabled
899 09:22:48.943409 PCI: 00:1f.5 [8086/0000] bus ops
900 09:22:48.946524 PCI: 00:1f.5 [8086/a0a4] enabled
901 09:22:48.950030 PCI: Leftover static devices:
902 09:22:48.950115 PCI: 00:10.2
903 09:22:48.952925 PCI: 00:10.6
904 09:22:48.953026 PCI: 00:10.7
905 09:22:48.953124 PCI: 00:06.0
906 09:22:48.956254 PCI: 00:07.1
907 09:22:48.956339 PCI: 00:07.2
908 09:22:48.959770 PCI: 00:07.3
909 09:22:48.959855 PCI: 00:09.0
910 09:22:48.959922 PCI: 00:0d.1
911 09:22:48.962969 PCI: 00:0d.2
912 09:22:48.963057 PCI: 00:0d.3
913 09:22:48.966318 PCI: 00:0e.0
914 09:22:48.966417 PCI: 00:12.0
915 09:22:48.969565 PCI: 00:12.6
916 09:22:48.969687 PCI: 00:13.0
917 09:22:48.969770 PCI: 00:14.1
918 09:22:48.972779 PCI: 00:16.1
919 09:22:48.972865 PCI: 00:16.2
920 09:22:48.975952 PCI: 00:16.3
921 09:22:48.976038 PCI: 00:16.4
922 09:22:48.976105 PCI: 00:16.5
923 09:22:48.979406 PCI: 00:17.0
924 09:22:48.979493 PCI: 00:19.2
925 09:22:48.983070 PCI: 00:1e.1
926 09:22:48.983194 PCI: 00:1f.1
927 09:22:48.986066 PCI: 00:1f.4
928 09:22:48.986189 PCI: 00:1f.6
929 09:22:48.986301 PCI: 00:1f.7
930 09:22:48.989231 PCI: Check your devicetree.cb.
931 09:22:48.992493 PCI: 00:02.0 scanning...
932 09:22:48.995986 scan_generic_bus for PCI: 00:02.0
933 09:22:48.999605 scan_generic_bus for PCI: 00:02.0 done
934 09:22:49.005992 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
935 09:22:49.009460 PCI: 00:04.0 scanning...
936 09:22:49.012354 scan_generic_bus for PCI: 00:04.0
937 09:22:49.012431 GENERIC: 0.0 enabled
938 09:22:49.018816 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
939 09:22:49.025961 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
940 09:22:49.026047 PCI: 00:0d.0 scanning...
941 09:22:49.028726 scan_static_bus for PCI: 00:0d.0
942 09:22:49.032759 USB0 port 0 enabled
943 09:22:49.035515 USB0 port 0 scanning...
944 09:22:49.039069 scan_static_bus for USB0 port 0
945 09:22:49.039155 USB3 port 0 enabled
946 09:22:49.042473
947 09:22:49.042561 USB3 port 1 enabled
948 09:22:49.045873 USB3 port 2 disabled
949 09:22:49.045959 USB3 port 3 disabled
950 09:22:49.048781 USB3 port 0 scanning...
951 09:22:49.052713 scan_static_bus for USB3 port 0
952 09:22:49.055621 scan_static_bus for USB3 port 0 done
953 09:22:49.062071 scan_bus: bus USB3 port 0 finished in 6 msecs
954 09:22:49.062157 USB3 port 1 scanning...
955 09:22:49.065847 scan_static_bus for USB3 port 1
956 09:22:49.072092 scan_static_bus for USB3 port 1 done
957 09:22:49.075827 scan_bus: bus USB3 port 1 finished in 6 msecs
958 09:22:49.078776 scan_static_bus for USB0 port 0 done
959 09:22:49.081988 scan_bus: bus USB0 port 0 finished in 43 msecs
960 09:22:49.085616
961 09:22:49.088643 scan_static_bus for PCI: 00:0d.0 done
962 09:22:49.091915 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
963 09:22:49.095657 PCI: 00:14.0 scanning...
964 09:22:49.099218 scan_static_bus for PCI: 00:14.0
965 09:22:49.102414 USB0 port 0 enabled
966 09:22:49.102501 USB0 port 0 scanning...
967 09:22:49.104962 scan_static_bus for USB0 port 0
968 09:22:49.108874 USB2 port 0 disabled
969 09:22:49.111532 USB2 port 1 enabled
970 09:22:49.111624 USB2 port 2 enabled
971 09:22:49.115070 USB2 port 3 disabled
972 09:22:49.118224 USB2 port 4 enabled
973 09:22:49.118314 USB2 port 5 disabled
974 09:22:49.121676 USB2 port 6 disabled
975 09:22:49.121762 USB2 port 7 disabled
976 09:22:49.125317 USB2 port 8 disabled
977 09:22:49.128567 USB2 port 9 disabled
978 09:22:49.128653 USB3 port 0 disabled
979 09:22:49.131690 USB3 port 1 enabled
980 09:22:49.135212 USB3 port 2 disabled
981 09:22:49.135298 USB3 port 3 disabled
982 09:22:49.138324 USB2 port 1 scanning...
983 09:22:49.141452 scan_static_bus for USB2 port 1
984 09:22:49.144796 scan_static_bus for USB2 port 1 done
985 09:22:49.151254 scan_bus: bus USB2 port 1 finished in 6 msecs
986 09:22:49.151343 USB2 port 2 scanning...
987 09:22:49.155040 scan_static_bus for USB2 port 2
988 09:22:49.161356 scan_static_bus for USB2 port 2 done
989 09:22:49.164986 scan_bus: bus USB2 port 2 finished in 6 msecs
990 09:22:49.168355 USB2 port 4 scanning...
991 09:22:49.170993 scan_static_bus for USB2 port 4
992 09:22:49.174383 scan_static_bus for USB2 port 4 done
993 09:22:49.177607 scan_bus: bus USB2 port 4 finished in 6 msecs
994 09:22:49.180998 USB3 port 1 scanning...
995 09:22:49.184232 scan_static_bus for USB3 port 1
996 09:22:49.187684 scan_static_bus for USB3 port 1 done
997 09:22:49.194239 scan_bus: bus USB3 port 1 finished in 6 msecs
998 09:22:49.197807 scan_static_bus for USB0 port 0 done
999 09:22:49.201282 scan_bus: bus USB0 port 0 finished in 93 msecs
1000 09:22:49.204353 scan_static_bus for PCI: 00:14.0 done
1001 09:22:49.210860 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1002 09:22:49.214770 PCI: 00:14.3 scanning...
1003 09:22:49.214899 scan_static_bus for PCI: 00:14.3
1004 09:22:49.217801
1005 09:22:49.217924 GENERIC: 0.0 enabled
1006 09:22:49.221295 scan_static_bus for PCI: 00:14.3 done
1007 09:22:49.227798 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1008 09:22:49.227936 PCI: 00:15.0 scanning...
1009 09:22:49.231237 scan_static_bus for PCI: 00:15.0
1010 09:22:49.234527 I2C: 00:1a enabled
1011 09:22:49.237924 I2C: 00:31 enabled
1012 09:22:49.238048 I2C: 00:32 enabled
1013 09:22:49.241343 scan_static_bus for PCI: 00:15.0 done
1014 09:22:49.247906 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1015 09:22:49.251078 PCI: 00:15.1 scanning...
1016 09:22:49.254365 scan_static_bus for PCI: 00:15.1
1017 09:22:49.254492 I2C: 00:10 enabled
1018 09:22:49.257594 scan_static_bus for PCI: 00:15.1 done
1019 09:22:49.264318 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1020 09:22:49.267882 PCI: 00:15.2 scanning...
1021 09:22:49.270847 scan_static_bus for PCI: 00:15.2
1022 09:22:49.274728 scan_static_bus for PCI: 00:15.2 done
1023 09:22:49.277591 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1024 09:22:49.281249 PCI: 00:15.3 scanning...
1025 09:22:49.284310 scan_static_bus for PCI: 00:15.3
1026 09:22:49.287503 scan_static_bus for PCI: 00:15.3 done
1027 09:22:49.293857 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1028 09:22:49.293953 PCI: 00:19.1 scanning...
1029 09:22:49.297342 scan_static_bus for PCI: 00:19.1
1030 09:22:49.300616 I2C: 00:15 enabled
1031 09:22:49.303931 scan_static_bus for PCI: 00:19.1 done
1032 09:22:49.310566 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1033 09:22:49.310653 PCI: 00:1d.0 scanning...
1034 09:22:49.317305 do_pci_scan_bridge for PCI: 00:1d.0
1035 09:22:49.317393 PCI: pci_scan_bus for bus 01
1036 09:22:49.321095 PCI: 01:00.0 [1c5c/174a] enabled
1037 09:22:49.324456 GENERIC: 0.0 enabled
1038 09:22:49.327452 Enabling Common Clock Configuration
1039 09:22:49.334283 L1 Sub-State supported from root port 29
1040 09:22:49.334370 L1 Sub-State Support = 0xf
1041 09:22:49.337451 CommonModeRestoreTime = 0x28
1042 09:22:49.343965 Power On Value = 0x16, Power On Scale = 0x0
1043 09:22:49.344063 ASPM: Enabled L1
1044 09:22:49.347211 PCIe: Max_Payload_Size adjusted to 128
1045 09:22:49.354134 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1046 09:22:49.354221 PCI: 00:1e.2 scanning...
1047 09:22:49.357233
1048 09:22:49.360533 scan_generic_bus for PCI: 00:1e.2
1049 09:22:49.360636 SPI: 00 enabled
1050 09:22:49.367169 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1051 09:22:49.370451 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1052 09:22:49.373827 PCI: 00:1e.3 scanning...
1053 09:22:49.377251 scan_generic_bus for PCI: 00:1e.3
1054 09:22:49.380713 SPI: 00 enabled
1055 09:22:49.387074 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1056 09:22:49.390440 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1057 09:22:49.394132 PCI: 00:1f.0 scanning...
1058 09:22:49.397120 scan_static_bus for PCI: 00:1f.0
1059 09:22:49.397206 PNP: 0c09.0 enabled
1060 09:22:49.400163 PNP: 0c09.0 scanning...
1061 09:22:49.403338 scan_static_bus for PNP: 0c09.0
1062 09:22:49.407216 scan_static_bus for PNP: 0c09.0 done
1063 09:22:49.413506 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1064 09:22:49.416913 scan_static_bus for PCI: 00:1f.0 done
1065 09:22:49.420533 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1066 09:22:49.423381 PCI: 00:1f.2 scanning...
1067 09:22:49.426674 scan_static_bus for PCI: 00:1f.2
1068 09:22:49.429792 GENERIC: 0.0 enabled
1069 09:22:49.433207 GENERIC: 0.0 scanning...
1070 09:22:49.436930 scan_static_bus for GENERIC: 0.0
1071 09:22:49.437010 GENERIC: 0.0 enabled
1072 09:22:49.440364 GENERIC: 1.0 enabled
1073 09:22:49.443391 scan_static_bus for GENERIC: 0.0 done
1074 09:22:49.450044 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1075 09:22:49.453164 scan_static_bus for PCI: 00:1f.2 done
1076 09:22:49.456618 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1077 09:22:49.460105 PCI: 00:1f.3 scanning...
1078 09:22:49.463517 scan_static_bus for PCI: 00:1f.3
1079 09:22:49.466657 scan_static_bus for PCI: 00:1f.3 done
1080 09:22:49.473172 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1081 09:22:49.473264 PCI: 00:1f.5 scanning...
1082 09:22:49.476739 scan_generic_bus for PCI: 00:1f.5
1083 09:22:49.483140 scan_generic_bus for PCI: 00:1f.5 done
1084 09:22:49.486499 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1085 09:22:49.493332 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1086 09:22:49.496306 scan_static_bus for Root Device done
1087 09:22:49.499901 scan_bus: bus Root Device finished in 736 msecs
1088 09:22:49.499982 done
1089 09:22:49.506580 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1090 09:22:49.509895 Chrome EC: UHEPI supported
1091 09:22:49.516065 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1092 09:22:49.522986 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1093 09:22:49.526160 SPI flash protection: WPSW=0 SRP0=0
1094 09:22:49.529580 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1095 09:22:49.536127 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1096 09:22:49.539957 found VGA at PCI: 00:02.0
1097 09:22:49.542904 Setting up VGA for PCI: 00:02.0
1098 09:22:49.549377 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1099 09:22:49.552650 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1100 09:22:49.556047 Allocating resources...
1101 09:22:49.556129 Reading resources...
1102 09:22:49.563150 Root Device read_resources bus 0 link: 0
1103 09:22:49.566292 DOMAIN: 0000 read_resources bus 0 link: 0
1104 09:22:49.572314 PCI: 00:04.0 read_resources bus 1 link: 0
1105 09:22:49.576013 PCI: 00:04.0 read_resources bus 1 link: 0 done
1106 09:22:49.582302 PCI: 00:0d.0 read_resources bus 0 link: 0
1107 09:22:49.585657 USB0 port 0 read_resources bus 0 link: 0
1108 09:22:49.592536 USB0 port 0 read_resources bus 0 link: 0 done
1109 09:22:49.595563 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1110 09:22:49.599019 PCI: 00:14.0 read_resources bus 0 link: 0
1111 09:22:49.606266 USB0 port 0 read_resources bus 0 link: 0
1112 09:22:49.609313 USB0 port 0 read_resources bus 0 link: 0 done
1113 09:22:49.616184 PCI: 00:14.0 read_resources bus 0 link: 0 done
1114 09:22:49.619522 PCI: 00:14.3 read_resources bus 0 link: 0
1115 09:22:49.626148 PCI: 00:14.3 read_resources bus 0 link: 0 done
1116 09:22:49.629705 PCI: 00:15.0 read_resources bus 0 link: 0
1117 09:22:49.636180 PCI: 00:15.0 read_resources bus 0 link: 0 done
1118 09:22:49.639245 PCI: 00:15.1 read_resources bus 0 link: 0
1119 09:22:49.645776 PCI: 00:15.1 read_resources bus 0 link: 0 done
1120 09:22:49.652455 PCI: 00:19.1 read_resources bus 0 link: 0
1121 09:22:49.655872 PCI: 00:19.1 read_resources bus 0 link: 0 done
1122 09:22:49.658936 PCI: 00:1d.0 read_resources bus 1 link: 0
1123 09:22:49.666367 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1124 09:22:49.669644 PCI: 00:1e.2 read_resources bus 2 link: 0
1125 09:22:49.676363 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1126 09:22:49.679813 PCI: 00:1e.3 read_resources bus 3 link: 0
1127 09:22:49.686627 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1128 09:22:49.689669 PCI: 00:1f.0 read_resources bus 0 link: 0
1129 09:22:49.696075 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1130 09:22:49.699369 PCI: 00:1f.2 read_resources bus 0 link: 0
1131 09:22:49.702977 GENERIC: 0.0 read_resources bus 0 link: 0
1132 09:22:49.709974 GENERIC: 0.0 read_resources bus 0 link: 0 done
1133 09:22:49.713305 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1134 09:22:49.720874 DOMAIN: 0000 read_resources bus 0 link: 0 done
1135 09:22:49.723784 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1136 09:22:49.730578 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1137 09:22:49.733631 Root Device read_resources bus 0 link: 0 done
1138 09:22:49.737000 Done reading resources.
1139 09:22:49.744043 Show resources in subtree (Root Device)...After reading.
1140 09:22:49.747099 Root Device child on link 0 DOMAIN: 0000
1141 09:22:49.750127 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1142 09:22:49.760238 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1143 09:22:49.770135 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1144 09:22:49.773421 PCI: 00:00.0
1145 09:22:49.783442 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1146 09:22:49.790114 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1147 09:22:49.800029 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1148 09:22:49.810221 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1149 09:22:49.820223 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1150 09:22:49.830200 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1151 09:22:49.840088 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1152 09:22:49.846650 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1153 09:22:49.856157 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1154 09:22:49.866309 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1155 09:22:49.876311 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1156 09:22:49.886062 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1157 09:22:49.892901 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1158 09:22:49.902572 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1159 09:22:49.912683 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1160 09:22:49.922729 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1161 09:22:49.932345 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1162 09:22:49.942260 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1163 09:22:49.952784 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1164 09:22:49.958937 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1165 09:22:49.962845 PCI: 00:02.0
1166 09:22:49.972269 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1167 09:22:49.982150 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1168 09:22:49.992191 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1169 09:22:49.995450 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1170 09:22:50.005638 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1171 09:22:50.009033 GENERIC: 0.0
1172 09:22:50.009120 PCI: 00:05.0
1173 09:22:50.018421 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1174 09:22:50.025364 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1175 09:22:50.025490 GENERIC: 0.0
1176 09:22:50.028779 PCI: 00:08.0
1177 09:22:50.038269 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 09:22:50.038358 PCI: 00:0a.0
1179 09:22:50.045247 PCI: 00:0d.0 child on link 0 USB0 port 0
1180 09:22:50.055163 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1181 09:22:50.058444 USB0 port 0 child on link 0 USB3 port 0
1182 09:22:50.058531 USB3 port 0
1183 09:22:50.061711 USB3 port 1
1184 09:22:50.064759 USB3 port 2
1185 09:22:50.064850 USB3 port 3
1186 09:22:50.068234 PCI: 00:14.0 child on link 0 USB0 port 0
1187 09:22:50.078531 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1188 09:22:50.084684 USB0 port 0 child on link 0 USB2 port 0
1189 09:22:50.084776 USB2 port 0
1190 09:22:50.088413 USB2 port 1
1191 09:22:50.088504 USB2 port 2
1192 09:22:50.091406 USB2 port 3
1193 09:22:50.091492 USB2 port 4
1194 09:22:50.094703 USB2 port 5
1195 09:22:50.094788 USB2 port 6
1196 09:22:50.097895
1197 09:22:50.097981 USB2 port 7
1198 09:22:50.101198 USB2 port 8
1199 09:22:50.101284 USB2 port 9
1200 09:22:50.104774 USB3 port 0
1201 09:22:50.104899 USB3 port 1
1202 09:22:50.108081 USB3 port 2
1203 09:22:50.108237 USB3 port 3
1204 09:22:50.111139 PCI: 00:14.2
1205 09:22:50.120925 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1206 09:22:50.130888 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1207 09:22:50.134129 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1208 09:22:50.144296 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1209 09:22:50.147939 GENERIC: 0.0
1210 09:22:50.151007 PCI: 00:15.0 child on link 0 I2C: 00:1a
1211 09:22:50.160699 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 09:22:50.160788 I2C: 00:1a
1213 09:22:50.163995 I2C: 00:31
1214 09:22:50.164085 I2C: 00:32
1215 09:22:50.170807 PCI: 00:15.1 child on link 0 I2C: 00:10
1216 09:22:50.180440 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 09:22:50.180525 I2C: 00:10
1218 09:22:50.183848 PCI: 00:15.2
1219 09:22:50.193971 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 09:22:50.194061 PCI: 00:15.3
1221 09:22:50.203871 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 09:22:50.207105 PCI: 00:16.0
1223 09:22:50.217115 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 09:22:50.217203 PCI: 00:19.0
1225 09:22:50.220299 PCI: 00:19.1 child on link 0 I2C: 00:15
1226 09:22:50.223506
1227 09:22:50.230598 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 09:22:50.233378
1229 09:22:50.233503 I2C: 00:15
1230 09:22:50.237091 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1231 09:22:50.246623 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1232 09:22:50.257049 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1233 09:22:50.266590 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1234 09:22:50.266676 GENERIC: 0.0
1235 09:22:50.269969 PCI: 01:00.0
1236 09:22:50.280219 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1237 09:22:50.289767 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1238 09:22:50.296475 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1239 09:22:50.299522 PCI: 00:1e.0
1240 09:22:50.309760 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1241 09:22:50.313287 PCI: 00:1e.2 child on link 0 SPI: 00
1242 09:22:50.323125 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 09:22:50.326524 SPI: 00
1244 09:22:50.329542 PCI: 00:1e.3 child on link 0 SPI: 00
1245 09:22:50.339609 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 09:22:50.339695 SPI: 00
1247 09:22:50.346262 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1248 09:22:50.352748 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1249 09:22:50.355979 PNP: 0c09.0
1250 09:22:50.365847 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1251 09:22:50.369045 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1252 09:22:50.379383 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1253 09:22:50.389094 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1254 09:22:50.392790 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1255 09:22:50.395785 GENERIC: 0.0
1256 09:22:50.395912 GENERIC: 1.0
1257 09:22:50.398780 PCI: 00:1f.3
1258 09:22:50.408624 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 09:22:50.418909 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1260 09:22:50.419036 PCI: 00:1f.5
1261 09:22:50.428932 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1262 09:22:50.431781 CPU_CLUSTER: 0 child on link 0 APIC: 00
1263 09:22:50.435054 APIC: 00
1264 09:22:50.435140 APIC: 01
1265 09:22:50.435206 APIC: 03
1266 09:22:50.438629 APIC: 06
1267 09:22:50.438714 APIC: 04
1268 09:22:50.441562 APIC: 05
1269 09:22:50.441647 APIC: 02
1270 09:22:50.441713 APIC: 07
1271 09:22:50.451813 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1272 09:22:50.454887 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1273 09:22:50.461656 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1274 09:22:50.468278 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1275 09:22:50.471298 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1276 09:22:50.478555 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1277 09:22:50.481652 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1278 09:22:50.488044 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1279 09:22:50.494981 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1280 09:22:50.504519 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1281 09:22:50.511547 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1282 09:22:50.518173 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1283 09:22:50.524402 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1284 09:22:50.531010 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1285 09:22:50.541717 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1286 09:22:50.544164 DOMAIN: 0000: Resource ranges:
1287 09:22:50.547383 * Base: 1000, Size: 800, Tag: 100
1288 09:22:50.551164 * Base: 1900, Size: e700, Tag: 100
1289 09:22:50.554384 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1290 09:22:50.561062 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1291 09:22:50.567235 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1292 09:22:50.577086 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1293 09:22:50.583891 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1294 09:22:50.590606 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1295 09:22:50.600512 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1296 09:22:50.607047 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1297 09:22:50.613625 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1298 09:22:50.623531 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1299 09:22:50.629978 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1300 09:22:50.636701 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1301 09:22:50.646661 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1302 09:22:50.653368 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1303 09:22:50.660109 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1304 09:22:50.669842 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1305 09:22:50.676689 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1306 09:22:50.683151 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1307 09:22:50.692936 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1308 09:22:50.699692 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1309 09:22:50.706123 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1310 09:22:50.716283 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1311 09:22:50.723067 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1312 09:22:50.729532 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1313 09:22:50.739339 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1314 09:22:50.742800 DOMAIN: 0000: Resource ranges:
1315 09:22:50.746070 * Base: 7fc00000, Size: 40400000, Tag: 200
1316 09:22:50.749378 * Base: d0000000, Size: 28000000, Tag: 200
1317 09:22:50.755824 * Base: fa000000, Size: 1000000, Tag: 200
1318 09:22:50.759387 * Base: fb001000, Size: 2fff000, Tag: 200
1319 09:22:50.762818 * Base: fe010000, Size: 2e000, Tag: 200
1320 09:22:50.765825 * Base: fe03f000, Size: d41000, Tag: 200
1321 09:22:50.772444 * Base: fed88000, Size: 8000, Tag: 200
1322 09:22:50.775881 * Base: fed93000, Size: d000, Tag: 200
1323 09:22:50.779204 * Base: feda2000, Size: 1e000, Tag: 200
1324 09:22:50.782705 * Base: fede0000, Size: 1220000, Tag: 200
1325 09:22:50.789119 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1326 09:22:50.795635 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1327 09:22:50.802306 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1328 09:22:50.808938 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1329 09:22:50.815675 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1330 09:22:50.822277 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1331 09:22:50.828788 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1332 09:22:50.835337 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1333 09:22:50.842165 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1334 09:22:50.848608 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1335 09:22:50.855422 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1336 09:22:50.861963 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1337 09:22:50.868285 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1338 09:22:50.875171 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1339 09:22:50.881961 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1340 09:22:50.888195 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1341 09:22:50.894919 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1342 09:22:50.901583 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1343 09:22:50.908252 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1344 09:22:50.914805 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1345 09:22:50.921040 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1346 09:22:50.927768 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1347 09:22:50.934847 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1348 09:22:50.941104 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1349 09:22:50.951427 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1350 09:22:50.954367 PCI: 00:1d.0: Resource ranges:
1351 09:22:50.957996 * Base: 7fc00000, Size: 100000, Tag: 200
1352 09:22:50.964207 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1353 09:22:50.970751 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1354 09:22:50.977502 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1355 09:22:50.987840 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1356 09:22:50.994390 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1357 09:22:50.997400 Root Device assign_resources, bus 0 link: 0
1358 09:22:51.001102 DOMAIN: 0000 assign_resources, bus 0 link: 0
1359 09:22:51.011276 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1360 09:22:51.017960 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1361 09:22:51.028035 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1362 09:22:51.034131 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1363 09:22:51.040852 PCI: 00:04.0 assign_resources, bus 1 link: 0
1364 09:22:51.043987 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 09:22:51.054075 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1366 09:22:51.060487 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1367 09:22:51.070298 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1368 09:22:51.073694 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1369 09:22:51.077046 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 09:22:51.087161 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1371 09:22:51.090217 PCI: 00:14.0 assign_resources, bus 0 link: 0
1372 09:22:51.096471 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 09:22:51.103370 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1374 09:22:51.113299 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1375 09:22:51.119940 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1376 09:22:51.123047 PCI: 00:14.3 assign_resources, bus 0 link: 0
1377 09:22:51.126441
1378 09:22:51.129816 PCI: 00:14.3 assign_resources, bus 0 link: 0
1379 09:22:51.136301 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1380 09:22:51.142651 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 09:22:51.146078 PCI: 00:15.0 assign_resources, bus 0 link: 0
1382 09:22:51.156223 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1383 09:22:51.159265 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 09:22:51.165561 PCI: 00:15.1 assign_resources, bus 0 link: 0
1385 09:22:51.172201 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1386 09:22:51.182422 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1387 09:22:51.188719 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1388 09:22:51.198970 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1389 09:22:51.201963 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 09:22:51.205379 PCI: 00:19.1 assign_resources, bus 0 link: 0
1391 09:22:51.214993 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1392 09:22:51.224995 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1393 09:22:51.235040 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1394 09:22:51.238304 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1395 09:22:51.245297 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1396 09:22:51.255165 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1397 09:22:51.261364 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1398 09:22:51.267880 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1399 09:22:51.274715 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1400 09:22:51.281061 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 09:22:51.284438 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1402 09:22:51.291492 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1403 09:22:51.294822
1404 09:22:51.298005 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1405 09:22:51.301022 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1406 09:22:51.307462 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1407 09:22:51.311035 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1408 09:22:51.317672 LPC: Trying to open IO window from 800 size 1ff
1409 09:22:51.324423 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1410 09:22:51.334772 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1411 09:22:51.340782 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1412 09:22:51.347085 DOMAIN: 0000 assign_resources, bus 0 link: 0
1413 09:22:51.350847 Root Device assign_resources, bus 0 link: 0
1414 09:22:51.354230 Done setting resources.
1415 09:22:51.360912 Show resources in subtree (Root Device)...After assigning values.
1416 09:22:51.363844 Root Device child on link 0 DOMAIN: 0000
1417 09:22:51.367063 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1418 09:22:51.376995 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1419 09:22:51.386806 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1420 09:22:51.389955 PCI: 00:00.0
1421 09:22:51.400269 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1422 09:22:51.406537 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1423 09:22:51.417300 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1424 09:22:51.426530 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1425 09:22:51.436229 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1426 09:22:51.446655 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1427 09:22:51.456056 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1428 09:22:51.463192 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1429 09:22:51.472957 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1430 09:22:51.482593 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1431 09:22:51.492685 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1432 09:22:51.502526 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1433 09:22:51.512231 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1434 09:22:51.519381 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1435 09:22:51.528902 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1436 09:22:51.539005 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1437 09:22:51.548779 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1438 09:22:51.558683 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1439 09:22:51.568648 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1440 09:22:51.578333 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1441 09:22:51.578468 PCI: 00:02.0
1442 09:22:51.588651 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1443 09:22:51.601648 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1444 09:22:51.607968 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1445 09:22:51.614651 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1446 09:22:51.624988 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1447 09:22:51.625114 GENERIC: 0.0
1448 09:22:51.627814 PCI: 00:05.0
1449 09:22:51.638763 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1450 09:22:51.644566 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1451 09:22:51.644653 GENERIC: 0.0
1452 09:22:51.647902 PCI: 00:08.0
1453 09:22:51.657845 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1454 09:22:51.657934 PCI: 00:0a.0
1455 09:22:51.664097 PCI: 00:0d.0 child on link 0 USB0 port 0
1456 09:22:51.674191 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1457 09:22:51.677558 USB0 port 0 child on link 0 USB3 port 0
1458 09:22:51.680834 USB3 port 0
1459 09:22:51.680921 USB3 port 1
1460 09:22:51.683886 USB3 port 2
1461 09:22:51.683973 USB3 port 3
1462 09:22:51.690788 PCI: 00:14.0 child on link 0 USB0 port 0
1463 09:22:51.700677 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1464 09:22:51.703837 USB0 port 0 child on link 0 USB2 port 0
1465 09:22:51.707834 USB2 port 0
1466 09:22:51.707920 USB2 port 1
1467 09:22:51.710634 USB2 port 2
1468 09:22:51.710720 USB2 port 3
1469 09:22:51.713632 USB2 port 4
1470 09:22:51.713718 USB2 port 5
1471 09:22:51.717078 USB2 port 6
1472 09:22:51.717164 USB2 port 7
1473 09:22:51.720305 USB2 port 8
1474 09:22:51.720420 USB2 port 9
1475 09:22:51.723424 USB3 port 0
1476 09:22:51.723510 USB3 port 1
1477 09:22:51.727184 USB3 port 2
1478 09:22:51.727269 USB3 port 3
1479 09:22:51.730274
1480 09:22:51.730402 PCI: 00:14.2
1481 09:22:51.739981 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1482 09:22:51.750406 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1483 09:22:51.756551 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1484 09:22:51.766529 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1485 09:22:51.766640 GENERIC: 0.0
1486 09:22:51.773276 PCI: 00:15.0 child on link 0 I2C: 00:1a
1487 09:22:51.782963 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1488 09:22:51.783102 I2C: 00:1a
1489 09:22:51.786479 I2C: 00:31
1490 09:22:51.786607 I2C: 00:32
1491 09:22:51.789918 PCI: 00:15.1 child on link 0 I2C: 00:10
1492 09:22:51.802968 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1493 09:22:51.803111 I2C: 00:10
1494 09:22:51.806223 PCI: 00:15.2
1495 09:22:51.816629 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1496 09:22:51.816767 PCI: 00:15.3
1497 09:22:51.826536 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1498 09:22:51.829727 PCI: 00:16.0
1499 09:22:51.839496 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1500 09:22:51.839638 PCI: 00:19.0
1501 09:22:51.846579 PCI: 00:19.1 child on link 0 I2C: 00:15
1502 09:22:51.856020 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1503 09:22:51.856110 I2C: 00:15
1504 09:22:51.862748 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1505 09:22:51.869335 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1506 09:22:51.882624 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1507 09:22:51.892667 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1508 09:22:51.895796 GENERIC: 0.0
1509 09:22:51.895878 PCI: 01:00.0
1510 09:22:51.905981 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1511 09:22:51.916191 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1512 09:22:51.929274 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1513 09:22:51.929361 PCI: 00:1e.0
1514 09:22:51.938765 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1515 09:22:51.945407 PCI: 00:1e.2 child on link 0 SPI: 00
1516 09:22:51.955661 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1517 09:22:51.955755 SPI: 00
1518 09:22:51.958839 PCI: 00:1e.3 child on link 0 SPI: 00
1519 09:22:51.971905 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1520 09:22:51.972033 SPI: 00
1521 09:22:51.975132 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1522 09:22:51.985335 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1523 09:22:51.985484 PNP: 0c09.0
1524 09:22:51.995130 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1525 09:22:51.998654 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1526 09:22:52.008960 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1527 09:22:52.018130 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1528 09:22:52.021381 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1529 09:22:52.024761 GENERIC: 0.0
1530 09:22:52.024840 GENERIC: 1.0
1531 09:22:52.028424
1532 09:22:52.028497 PCI: 00:1f.3
1533 09:22:52.038345 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1534 09:22:52.048424 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1535 09:22:52.051756 PCI: 00:1f.5
1536 09:22:52.061183 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1537 09:22:52.064575 CPU_CLUSTER: 0 child on link 0 APIC: 00
1538 09:22:52.067938 APIC: 00
1539 09:22:52.068050 APIC: 01
1540 09:22:52.068120 APIC: 03
1541 09:22:52.071249 APIC: 06
1542 09:22:52.071406 APIC: 04
1543 09:22:52.074474 APIC: 05
1544 09:22:52.074593 APIC: 02
1545 09:22:52.074737 APIC: 07
1546 09:22:52.078128 Done allocating resources.
1547 09:22:52.084280 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1548 09:22:52.091223 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1549 09:22:52.094312 Configure GPIOs for I2S audio on UP4.
1550 09:22:52.101265 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1551 09:22:52.104184 Enabling resources...
1552 09:22:52.107778 PCI: 00:00.0 subsystem <- 8086/9a12
1553 09:22:52.111132 PCI: 00:00.0 cmd <- 06
1554 09:22:52.114101 PCI: 00:02.0 subsystem <- 8086/9a40
1555 09:22:52.117972 PCI: 00:02.0 cmd <- 03
1556 09:22:52.121017 PCI: 00:04.0 subsystem <- 8086/9a03
1557 09:22:52.121105 PCI: 00:04.0 cmd <- 02
1558 09:22:52.127775 PCI: 00:05.0 subsystem <- 8086/9a19
1559 09:22:52.127856 PCI: 00:05.0 cmd <- 02
1560 09:22:52.130916 PCI: 00:08.0 subsystem <- 8086/9a11
1561 09:22:52.134217 PCI: 00:08.0 cmd <- 06
1562 09:22:52.137672 PCI: 00:0d.0 subsystem <- 8086/9a13
1563 09:22:52.141060 PCI: 00:0d.0 cmd <- 02
1564 09:22:52.144128 PCI: 00:14.0 subsystem <- 8086/a0ed
1565 09:22:52.147706 PCI: 00:14.0 cmd <- 02
1566 09:22:52.150838 PCI: 00:14.2 subsystem <- 8086/a0ef
1567 09:22:52.154123 PCI: 00:14.2 cmd <- 02
1568 09:22:52.157295 PCI: 00:14.3 subsystem <- 8086/a0f0
1569 09:22:52.160510 PCI: 00:14.3 cmd <- 02
1570 09:22:52.164341 PCI: 00:15.0 subsystem <- 8086/a0e8
1571 09:22:52.167236 PCI: 00:15.0 cmd <- 02
1572 09:22:52.170682 PCI: 00:15.1 subsystem <- 8086/a0e9
1573 09:22:52.170768 PCI: 00:15.1 cmd <- 02
1574 09:22:52.177385 PCI: 00:15.2 subsystem <- 8086/a0ea
1575 09:22:52.177539 PCI: 00:15.2 cmd <- 02
1576 09:22:52.180644 PCI: 00:15.3 subsystem <- 8086/a0eb
1577 09:22:52.184038 PCI: 00:15.3 cmd <- 02
1578 09:22:52.187352 PCI: 00:16.0 subsystem <- 8086/a0e0
1579 09:22:52.190751 PCI: 00:16.0 cmd <- 02
1580 09:22:52.193791 PCI: 00:19.1 subsystem <- 8086/a0c6
1581 09:22:52.197225 PCI: 00:19.1 cmd <- 02
1582 09:22:52.200710 PCI: 00:1d.0 bridge ctrl <- 0013
1583 09:22:52.203881 PCI: 00:1d.0 subsystem <- 8086/a0b0
1584 09:22:52.207371 PCI: 00:1d.0 cmd <- 06
1585 09:22:52.210768 PCI: 00:1e.0 subsystem <- 8086/a0a8
1586 09:22:52.214142 PCI: 00:1e.0 cmd <- 06
1587 09:22:52.217362 PCI: 00:1e.2 subsystem <- 8086/a0aa
1588 09:22:52.220484 PCI: 00:1e.2 cmd <- 06
1589 09:22:52.223890 PCI: 00:1e.3 subsystem <- 8086/a0ab
1590 09:22:52.224001 PCI: 00:1e.3 cmd <- 02
1591 09:22:52.230323 PCI: 00:1f.0 subsystem <- 8086/a087
1592 09:22:52.230447 PCI: 00:1f.0 cmd <- 407
1593 09:22:52.234207 PCI: 00:1f.3 subsystem <- 8086/a0c8
1594 09:22:52.237038 PCI: 00:1f.3 cmd <- 02
1595 09:22:52.240126 PCI: 00:1f.5 subsystem <- 8086/a0a4
1596 09:22:52.243691 PCI: 00:1f.5 cmd <- 406
1597 09:22:52.248060 PCI: 01:00.0 cmd <- 02
1598 09:22:52.252874 done.
1599 09:22:52.256739 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1600 09:22:52.259137 Initializing devices...
1601 09:22:52.262712 Root Device init
1602 09:22:52.265848 Chrome EC: Set SMI mask to 0x0000000000000000
1603 09:22:52.272622 Chrome EC: clear events_b mask to 0x0000000000000000
1604 09:22:52.279370 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1605 09:22:52.285873 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1606 09:22:52.292258 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1607 09:22:52.295752 Chrome EC: Set WAKE mask to 0x0000000000000000
1608 09:22:52.303310 fw_config match found: DB_USB=USB3_ACTIVE
1609 09:22:52.306697 Configure Right Type-C port orientation for retimer
1610 09:22:52.309333 Root Device init finished in 45 msecs
1611 09:22:52.314025 PCI: 00:00.0 init
1612 09:22:52.317170 CPU TDP = 9 Watts
1613 09:22:52.317255 CPU PL1 = 9 Watts
1614 09:22:52.320343 CPU PL2 = 40 Watts
1615 09:22:52.323783 CPU PL4 = 83 Watts
1616 09:22:52.327257 PCI: 00:00.0 init finished in 8 msecs
1617 09:22:52.327343 PCI: 00:02.0 init
1618 09:22:52.330404 GMA: Found VBT in CBFS
1619 09:22:52.333734 GMA: Found valid VBT in CBFS
1620 09:22:52.340072 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1621 09:22:52.346759 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1622 09:22:52.350497 PCI: 00:02.0 init finished in 18 msecs
1623 09:22:52.353604 PCI: 00:05.0 init
1624 09:22:52.357005 PCI: 00:05.0 init finished in 0 msecs
1625 09:22:52.360132 PCI: 00:08.0 init
1626 09:22:52.363097 PCI: 00:08.0 init finished in 0 msecs
1627 09:22:52.366663 PCI: 00:14.0 init
1628 09:22:52.369590 PCI: 00:14.0 init finished in 0 msecs
1629 09:22:52.373316 PCI: 00:14.2 init
1630 09:22:52.376892 PCI: 00:14.2 init finished in 0 msecs
1631 09:22:52.380120 PCI: 00:15.0 init
1632 09:22:52.383085 I2C bus 0 version 0x3230302a
1633 09:22:52.386073 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1634 09:22:52.389844 PCI: 00:15.0 init finished in 6 msecs
1635 09:22:52.389931 PCI: 00:15.1 init
1636 09:22:52.392963
1637 09:22:52.393049 I2C bus 1 version 0x3230302a
1638 09:22:52.396083 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1639 09:22:52.399661
1640 09:22:52.402798 PCI: 00:15.1 init finished in 6 msecs
1641 09:22:52.402885 PCI: 00:15.2 init
1642 09:22:52.406473 I2C bus 2 version 0x3230302a
1643 09:22:52.409796 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1644 09:22:52.412869 PCI: 00:15.2 init finished in 6 msecs
1645 09:22:52.416778 PCI: 00:15.3 init
1646 09:22:52.420490 I2C bus 3 version 0x3230302a
1647 09:22:52.423155 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1648 09:22:52.426423 PCI: 00:15.3 init finished in 6 msecs
1649 09:22:52.429588 PCI: 00:16.0 init
1650 09:22:52.432953 PCI: 00:16.0 init finished in 0 msecs
1651 09:22:52.436140 PCI: 00:19.1 init
1652 09:22:52.439575 I2C bus 5 version 0x3230302a
1653 09:22:52.442844 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1654 09:22:52.445884 PCI: 00:19.1 init finished in 6 msecs
1655 09:22:52.449386 PCI: 00:1d.0 init
1656 09:22:52.449506 Initializing PCH PCIe bridge.
1657 09:22:52.452869
1658 09:22:52.456306 PCI: 00:1d.0 init finished in 3 msecs
1659 09:22:52.459074 PCI: 00:1f.0 init
1660 09:22:52.462765 IOAPIC: Initializing IOAPIC at 0xfec00000
1661 09:22:52.466139 IOAPIC: Bootstrap Processor Local APIC = 0x00
1662 09:22:52.469251 IOAPIC: ID = 0x02
1663 09:22:52.472603 IOAPIC: Dumping registers
1664 09:22:52.472723 reg 0x0000: 0x02000000
1665 09:22:52.475533 reg 0x0001: 0x00770020
1666 09:22:52.478833 reg 0x0002: 0x00000000
1667 09:22:52.482836 PCI: 00:1f.0 init finished in 21 msecs
1668 09:22:52.485576 PCI: 00:1f.2 init
1669 09:22:52.489076 Disabling ACPI via APMC.
1670 09:22:52.489159 APMC done.
1671 09:22:52.492674
1672 09:22:52.495434 PCI: 00:1f.2 init finished in 5 msecs
1673 09:22:52.506393 PCI: 01:00.0 init
1674 09:22:52.509782 PCI: 01:00.0 init finished in 0 msecs
1675 09:22:52.513192 PNP: 0c09.0 init
1676 09:22:52.516360 Google Chrome EC uptime: 8.469 seconds
1677 09:22:52.523410 Google Chrome AP resets since EC boot: 1
1678 09:22:52.526923 Google Chrome most recent AP reset causes:
1679 09:22:52.529974 0.379: 32775 shutdown: entering G3
1680 09:22:52.536052 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 09:22:52.539311 PNP: 0c09.0 init finished in 22 msecs
1682 09:22:52.545647 Devices initialized
1683 09:22:52.548813 Show all devs... After init.
1684 09:22:52.552137 Root Device: enabled 1
1685 09:22:52.552224 DOMAIN: 0000: enabled 1
1686 09:22:52.555191 CPU_CLUSTER: 0: enabled 1
1687 09:22:52.558939 PCI: 00:00.0: enabled 1
1688 09:22:52.561699 PCI: 00:02.0: enabled 1
1689 09:22:52.561786 PCI: 00:04.0: enabled 1
1690 09:22:52.565237 PCI: 00:05.0: enabled 1
1691 09:22:52.568451 PCI: 00:06.0: enabled 0
1692 09:22:52.571974 PCI: 00:07.0: enabled 0
1693 09:22:52.572062 PCI: 00:07.1: enabled 0
1694 09:22:52.575466 PCI: 00:07.2: enabled 0
1695 09:22:52.578566 PCI: 00:07.3: enabled 0
1696 09:22:52.581678 PCI: 00:08.0: enabled 1
1697 09:22:52.581801 PCI: 00:09.0: enabled 0
1698 09:22:52.585150 PCI: 00:0a.0: enabled 0
1699 09:22:52.588835 PCI: 00:0d.0: enabled 1
1700 09:22:52.591817 PCI: 00:0d.1: enabled 0
1701 09:22:52.591939 PCI: 00:0d.2: enabled 0
1702 09:22:52.595176 PCI: 00:0d.3: enabled 0
1703 09:22:52.598212 PCI: 00:0e.0: enabled 0
1704 09:22:52.598332 PCI: 00:10.2: enabled 1
1705 09:22:52.601729
1706 09:22:52.601850 PCI: 00:10.6: enabled 0
1707 09:22:52.604904 PCI: 00:10.7: enabled 0
1708 09:22:52.608083 PCI: 00:12.0: enabled 0
1709 09:22:52.608206 PCI: 00:12.6: enabled 0
1710 09:22:52.611700 PCI: 00:13.0: enabled 0
1711 09:22:52.614841 PCI: 00:14.0: enabled 1
1712 09:22:52.618010 PCI: 00:14.1: enabled 0
1713 09:22:52.618131 PCI: 00:14.2: enabled 1
1714 09:22:52.621448 PCI: 00:14.3: enabled 1
1715 09:22:52.624719 PCI: 00:15.0: enabled 1
1716 09:22:52.627984 PCI: 00:15.1: enabled 1
1717 09:22:52.628106 PCI: 00:15.2: enabled 1
1718 09:22:52.631436 PCI: 00:15.3: enabled 1
1719 09:22:52.635143 PCI: 00:16.0: enabled 1
1720 09:22:52.638477 PCI: 00:16.1: enabled 0
1721 09:22:52.638600 PCI: 00:16.2: enabled 0
1722 09:22:52.641665 PCI: 00:16.3: enabled 0
1723 09:22:52.645085 PCI: 00:16.4: enabled 0
1724 09:22:52.645208 PCI: 00:16.5: enabled 0
1725 09:22:52.647728
1726 09:22:52.647848 PCI: 00:17.0: enabled 0
1727 09:22:52.651062 PCI: 00:19.0: enabled 0
1728 09:22:52.654388 PCI: 00:19.1: enabled 1
1729 09:22:52.654508 PCI: 00:19.2: enabled 0
1730 09:22:52.658135 PCI: 00:1c.0: enabled 1
1731 09:22:52.661335 PCI: 00:1c.1: enabled 0
1732 09:22:52.664653 PCI: 00:1c.2: enabled 0
1733 09:22:52.664774 PCI: 00:1c.3: enabled 0
1734 09:22:52.667893 PCI: 00:1c.4: enabled 0
1735 09:22:52.671594 PCI: 00:1c.5: enabled 0
1736 09:22:52.674225 PCI: 00:1c.6: enabled 1
1737 09:22:52.674343 PCI: 00:1c.7: enabled 0
1738 09:22:52.677568 PCI: 00:1d.0: enabled 1
1739 09:22:52.681011 PCI: 00:1d.1: enabled 0
1740 09:22:52.684595 PCI: 00:1d.2: enabled 1
1741 09:22:52.684715 PCI: 00:1d.3: enabled 0
1742 09:22:52.687535 PCI: 00:1e.0: enabled 1
1743 09:22:52.691183 PCI: 00:1e.1: enabled 0
1744 09:22:52.691302 PCI: 00:1e.2: enabled 1
1745 09:22:52.694499 PCI: 00:1e.3: enabled 1
1746 09:22:52.697760 PCI: 00:1f.0: enabled 1
1747 09:22:52.701231 PCI: 00:1f.1: enabled 0
1748 09:22:52.701353 PCI: 00:1f.2: enabled 1
1749 09:22:52.704301 PCI: 00:1f.3: enabled 1
1750 09:22:52.707993 PCI: 00:1f.4: enabled 0
1751 09:22:52.711103 PCI: 00:1f.5: enabled 1
1752 09:22:52.711223 PCI: 00:1f.6: enabled 0
1753 09:22:52.714343 PCI: 00:1f.7: enabled 0
1754 09:22:52.717342 APIC: 00: enabled 1
1755 09:22:52.717495 GENERIC: 0.0: enabled 1
1756 09:22:52.721366 GENERIC: 0.0: enabled 1
1757 09:22:52.724131 GENERIC: 1.0: enabled 1
1758 09:22:52.727341 GENERIC: 0.0: enabled 1
1759 09:22:52.727418 GENERIC: 1.0: enabled 1
1760 09:22:52.730988 USB0 port 0: enabled 1
1761 09:22:52.734245 GENERIC: 0.0: enabled 1
1762 09:22:52.737560 USB0 port 0: enabled 1
1763 09:22:52.737646 GENERIC: 0.0: enabled 1
1764 09:22:52.740851 I2C: 00:1a: enabled 1
1765 09:22:52.744065 I2C: 00:31: enabled 1
1766 09:22:52.744151 I2C: 00:32: enabled 1
1767 09:22:52.747557 I2C: 00:10: enabled 1
1768 09:22:52.750897 I2C: 00:15: enabled 1
1769 09:22:52.750982 GENERIC: 0.0: enabled 0
1770 09:22:52.754017 GENERIC: 1.0: enabled 0
1771 09:22:52.757438 GENERIC: 0.0: enabled 1
1772 09:22:52.757553 SPI: 00: enabled 1
1773 09:22:52.760687 SPI: 00: enabled 1
1774 09:22:52.764075 PNP: 0c09.0: enabled 1
1775 09:22:52.764162 GENERIC: 0.0: enabled 1
1776 09:22:52.767762 USB3 port 0: enabled 1
1777 09:22:52.770592 USB3 port 1: enabled 1
1778 09:22:52.774240 USB3 port 2: enabled 0
1779 09:22:52.774344 USB3 port 3: enabled 0
1780 09:22:52.777166 USB2 port 0: enabled 0
1781 09:22:52.780592 USB2 port 1: enabled 1
1782 09:22:52.780708 USB2 port 2: enabled 1
1783 09:22:52.783883 USB2 port 3: enabled 0
1784 09:22:52.787103 USB2 port 4: enabled 1
1785 09:22:52.791021 USB2 port 5: enabled 0
1786 09:22:52.791109 USB2 port 6: enabled 0
1787 09:22:52.794128 USB2 port 7: enabled 0
1788 09:22:52.797441 USB2 port 8: enabled 0
1789 09:22:52.797531 USB2 port 9: enabled 0
1790 09:22:52.800936 USB3 port 0: enabled 0
1791 09:22:52.803772 USB3 port 1: enabled 1
1792 09:22:52.803859 USB3 port 2: enabled 0
1793 09:22:52.807313
1794 09:22:52.807401 USB3 port 3: enabled 0
1795 09:22:52.810602 GENERIC: 0.0: enabled 1
1796 09:22:52.813762 GENERIC: 1.0: enabled 1
1797 09:22:52.813875 APIC: 01: enabled 1
1798 09:22:52.816985 APIC: 03: enabled 1
1799 09:22:52.820374 APIC: 06: enabled 1
1800 09:22:52.820460 APIC: 04: enabled 1
1801 09:22:52.823602 APIC: 05: enabled 1
1802 09:22:52.823688 APIC: 02: enabled 1
1803 09:22:52.827303 APIC: 07: enabled 1
1804 09:22:52.830403 PCI: 01:00.0: enabled 1
1805 09:22:52.833713 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1806 09:22:52.840552 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1807 09:22:52.843418 ELOG: NV offset 0xf30000 size 0x1000
1808 09:22:52.850410 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1809 09:22:52.857173 ELOG: Event(17) added with size 13 at 2022-11-23 09:22:51 UTC
1810 09:22:52.864077 ELOG: Event(92) added with size 9 at 2022-11-23 09:22:51 UTC
1811 09:22:52.870426 ELOG: Event(93) added with size 9 at 2022-11-23 09:22:51 UTC
1812 09:22:52.877036 ELOG: Event(9E) added with size 10 at 2022-11-23 09:22:51 UTC
1813 09:22:52.883793 ELOG: Event(9F) added with size 14 at 2022-11-23 09:22:51 UTC
1814 09:22:52.889787 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1815 09:22:52.896846 ELOG: Event(A1) added with size 10 at 2022-11-23 09:22:51 UTC
1816 09:22:52.900690 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1817 09:22:52.906671 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1818 09:22:52.909604 Finalize devices...
1819 09:22:52.909715 Devices finalized
1820 09:22:52.916748 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1821 09:22:52.922959 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1822 09:22:52.926086 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1823 09:22:52.932902 ME: HFSTS1 : 0x80030055
1824 09:22:52.936200 ME: HFSTS2 : 0x30280116
1825 09:22:52.939308 ME: HFSTS3 : 0x00000050
1826 09:22:52.942728
1827 09:22:52.945976 ME: HFSTS4 : 0x00004000
1828 09:22:52.949657 ME: HFSTS5 : 0x00000000
1829 09:22:52.956249 ME: HFSTS6 : 0x00400006
1830 09:22:52.959517 ME: Manufacturing Mode : YES
1831 09:22:52.962571 ME: SPI Protection Mode Enabled : NO
1832 09:22:52.966084 ME: FW Partition Table : OK
1833 09:22:52.969372 ME: Bringup Loader Failure : NO
1834 09:22:52.972574 ME: Firmware Init Complete : NO
1835 09:22:52.976227 ME: Boot Options Present : NO
1836 09:22:52.978990 ME: Update In Progress : NO
1837 09:22:52.985725 ME: D0i3 Support : YES
1838 09:22:52.989214 ME: Low Power State Enabled : NO
1839 09:22:52.992202 ME: CPU Replaced : YES
1840 09:22:52.995678 ME: CPU Replacement Valid : YES
1841 09:22:52.998850 ME: Current Working State : 5
1842 09:22:53.002182 ME: Current Operation State : 1
1843 09:22:53.006021 ME: Current Operation Mode : 3
1844 09:22:53.008752 ME: Error Code : 0
1845 09:22:53.015241 ME: Enhanced Debug Mode : NO
1846 09:22:53.018770 ME: CPU Debug Disabled : YES
1847 09:22:53.022097 ME: TXT Support : NO
1848 09:22:53.028819 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1849 09:22:53.035251 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1850 09:22:53.038240 CBFS: 'fallback/slic' not found.
1851 09:22:53.042126 ACPI: Writing ACPI tables at 76b01000.
1852 09:22:53.045552 ACPI: * FACS
1853 09:22:53.045693 ACPI: * DSDT
1854 09:22:53.048389 Ramoops buffer: 0x100000@0x76a00000.
1855 09:22:53.055416 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1856 09:22:53.058175 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1857 09:22:53.061978 Google Chrome EC: version:
1858 09:22:53.065280 ro: voema_v2.0.7540-147f8d37d1
1859 09:22:53.068986 rw: voema_v2.0.7540-147f8d37d1
1860 09:22:53.072293 running image: 2
1861 09:22:53.078626 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1862 09:22:53.081762 ACPI: * FADT
1863 09:22:53.081844 SCI is IRQ9
1864 09:22:53.085266 ACPI: added table 1/32, length now 40
1865 09:22:53.089063 ACPI: * SSDT
1866 09:22:53.091948 Found 1 CPU(s) with 8 core(s) each.
1867 09:22:53.095279 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1868 09:22:53.101936 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1869 09:22:53.104969 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1870 09:22:53.108514 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1871 09:22:53.115252 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1872 09:22:53.121736 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1873 09:22:53.125098 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1874 09:22:53.132139 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1875 09:22:53.138541 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1876 09:22:53.141354 \_SB.PCI0.RP09: Added StorageD3Enable property
1877 09:22:53.144902 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1878 09:22:53.151630 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1879 09:22:53.158188 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1880 09:22:53.161540 PS2K: Passing 80 keymaps to kernel
1881 09:22:53.168460 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1882 09:22:53.174628 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1883 09:22:53.181381 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1884 09:22:53.188193 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1885 09:22:53.194741 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1886 09:22:53.201132 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1887 09:22:53.207765 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1888 09:22:53.214576 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1889 09:22:53.217871 ACPI: added table 2/32, length now 44
1890 09:22:53.217949 ACPI: * MCFG
1891 09:22:53.221028 ACPI: added table 3/32, length now 48
1892 09:22:53.224733 ACPI: * TPM2
1893 09:22:53.227493 TPM2 log created at 0x769f0000
1894 09:22:53.231307 ACPI: added table 4/32, length now 52
1895 09:22:53.231383 ACPI: * MADT
1896 09:22:53.234124 SCI is IRQ9
1897 09:22:53.237897 ACPI: added table 5/32, length now 56
1898 09:22:53.240886 current = 76b09850
1899 09:22:53.240968 ACPI: * DMAR
1900 09:22:53.244190 ACPI: added table 6/32, length now 60
1901 09:22:53.247988 ACPI: added table 7/32, length now 64
1902 09:22:53.251178 ACPI: * HPET
1903 09:22:53.254645 ACPI: added table 8/32, length now 68
1904 09:22:53.254723 ACPI: done.
1905 09:22:53.257920 ACPI tables: 35216 bytes.
1906 09:22:53.261075 smbios_write_tables: 769ef000
1907 09:22:53.264034 EC returned error result code 3
1908 09:22:53.267546 Couldn't obtain OEM name from CBI
1909 09:22:53.271110 Create SMBIOS type 16
1910 09:22:53.274018 Create SMBIOS type 17
1911 09:22:53.277163 GENERIC: 0.0 (WIFI Device)
1912 09:22:53.277245 SMBIOS tables: 1750 bytes.
1913 09:22:53.284049 Writing table forward entry at 0x00000500
1914 09:22:53.287650 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1915 09:22:53.290661
1916 09:22:53.293813 Writing coreboot table at 0x76b25000
1917 09:22:53.297584 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1918 09:22:53.304205 1. 0000000000001000-000000000009ffff: RAM
1919 09:22:53.307220 2. 00000000000a0000-00000000000fffff: RESERVED
1920 09:22:53.310490 3. 0000000000100000-00000000769eefff: RAM
1921 09:22:53.317290 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1922 09:22:53.323929 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1923 09:22:53.327016 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1924 09:22:53.333612 7. 0000000077000000-000000007fbfffff: RESERVED
1925 09:22:53.337005 8. 00000000c0000000-00000000cfffffff: RESERVED
1926 09:22:53.343819 9. 00000000f8000000-00000000f9ffffff: RESERVED
1927 09:22:53.347555 10. 00000000fb000000-00000000fb000fff: RESERVED
1928 09:22:53.353646 11. 00000000fe000000-00000000fe00ffff: RESERVED
1929 09:22:53.356958 12. 00000000fed80000-00000000fed87fff: RESERVED
1930 09:22:53.363673 13. 00000000fed90000-00000000fed92fff: RESERVED
1931 09:22:53.367301 14. 00000000feda0000-00000000feda1fff: RESERVED
1932 09:22:53.370334 15. 00000000fedc0000-00000000feddffff: RESERVED
1933 09:22:53.377328 16. 0000000100000000-00000002803fffff: RAM
1934 09:22:53.380437 Passing 4 GPIOs to payload:
1935 09:22:53.383661 NAME | PORT | POLARITY | VALUE
1936 09:22:53.390313 lid | undefined | high | high
1937 09:22:53.394249 power | undefined | high | low
1938 09:22:53.400202 oprom | undefined | high | low
1939 09:22:53.407048 EC in RW | 0x000000e5 | high | high
1940 09:22:53.410098 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum aa28
1941 09:22:53.413545 coreboot table: 1576 bytes.
1942 09:22:53.416885 IMD ROOT 0. 0x76fff000 0x00001000
1943 09:22:53.423184 IMD SMALL 1. 0x76ffe000 0x00001000
1944 09:22:53.426450 FSP MEMORY 2. 0x76c4e000 0x003b0000
1945 09:22:53.430048 VPD 3. 0x76c4d000 0x00000367
1946 09:22:53.433370 RO MCACHE 4. 0x76c4c000 0x00000fdc
1947 09:22:53.436537 CONSOLE 5. 0x76c2c000 0x00020000
1948 09:22:53.440273 FMAP 6. 0x76c2b000 0x00000578
1949 09:22:53.443035 TIME STAMP 7. 0x76c2a000 0x00000910
1950 09:22:53.446563 VBOOT WORK 8. 0x76c16000 0x00014000
1951 09:22:53.453258 ROMSTG STCK 9. 0x76c15000 0x00001000
1952 09:22:53.456541 AFTER CAR 10. 0x76c0a000 0x0000b000
1953 09:22:53.459922 RAMSTAGE 11. 0x76b97000 0x00073000
1954 09:22:53.462894 REFCODE 12. 0x76b42000 0x00055000
1955 09:22:53.466363 SMM BACKUP 13. 0x76b32000 0x00010000
1956 09:22:53.469788 4f444749 14. 0x76b30000 0x00002000
1957 09:22:53.473477 EXT VBT15. 0x76b2d000 0x0000219f
1958 09:22:53.476107 COREBOOT 16. 0x76b25000 0x00008000
1959 09:22:53.479632 ACPI 17. 0x76b01000 0x00024000
1960 09:22:53.482772
1961 09:22:53.485887 ACPI GNVS 18. 0x76b00000 0x00001000
1962 09:22:53.489912 RAMOOPS 19. 0x76a00000 0x00100000
1963 09:22:53.492687 TPM2 TCGLOG20. 0x769f0000 0x00010000
1964 09:22:53.496151 SMBIOS 21. 0x769ef000 0x00000800
1965 09:22:53.499671 IMD small region:
1966 09:22:53.503325 IMD ROOT 0. 0x76ffec00 0x00000400
1967 09:22:53.506367 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1968 09:22:53.509358 POWER STATE 2. 0x76ffeb80 0x00000044
1969 09:22:53.512820 ROMSTAGE 3. 0x76ffeb60 0x00000004
1970 09:22:53.515804 MEM INFO 4. 0x76ffe980 0x000001e0
1971 09:22:53.522557 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1972 09:22:53.526212 MTRR: Physical address space:
1973 09:22:53.532386 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1974 09:22:53.539419 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1975 09:22:53.546210 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1976 09:22:53.552175 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1977 09:22:53.559484 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1978 09:22:53.562303 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1979 09:22:53.569041 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1980 09:22:53.575409 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 09:22:53.580046 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 09:22:53.582572 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 09:22:53.586037 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 09:22:53.592529 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 09:22:53.595744 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 09:22:53.598921 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 09:22:53.602257 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 09:22:53.605595 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 09:22:53.608805
1990 09:22:53.612223 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 09:22:53.615346 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 09:22:53.618544 call enable_fixed_mtrr()
1993 09:22:53.622250 CPU physical address size: 39 bits
1994 09:22:53.625250 MTRR: default type WB/UC MTRR counts: 6/6.
1995 09:22:53.628507
1996 09:22:53.631801 MTRR: UC selected as default type.
1997 09:22:53.635016 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1998 09:22:53.642347 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1999 09:22:53.648894 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2000 09:22:53.654939 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2001 09:22:53.661570 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2002 09:22:53.668453 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2003 09:22:53.668554
2004 09:22:53.671493 MTRR check
2005 09:22:53.671578 Fixed MTRRs : Enabled
2006 09:22:53.674708 Variable MTRRs: Enabled
2007 09:22:53.674795
2008 09:22:53.678410 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 09:22:53.682019
2010 09:22:53.684748 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 09:22:53.687950 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 09:22:53.691540 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 09:22:53.694538 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 09:22:53.701357 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 09:22:53.704643 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 09:22:53.707782 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 09:22:53.711211 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 09:22:53.718159 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 09:22:53.721146 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 09:22:53.727792 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2021 09:22:53.731280 call enable_fixed_mtrr()
2022 09:22:53.734748 Checking cr50 for pending updates
2023 09:22:53.739208 CPU physical address size: 39 bits
2024 09:22:53.742378 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 09:22:53.745282 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 09:22:53.749007 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 09:22:53.752409 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 09:22:53.758909 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 09:22:53.762345 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 09:22:53.765252 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 09:22:53.769130 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 09:22:53.775379 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 09:22:53.778804 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 09:22:53.782148 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 09:22:53.785315 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 09:22:53.792865 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 09:22:53.792958 call enable_fixed_mtrr()
2038 09:22:53.799191 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 09:22:53.802710 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 09:22:53.805949 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 09:22:53.809204 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 09:22:53.815727 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 09:22:53.819578 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 09:22:53.822687 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 09:22:53.825786 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 09:22:53.832713 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 09:22:53.835841 CPU physical address size: 39 bits
2048 09:22:53.838940 call enable_fixed_mtrr()
2049 09:22:53.842500 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 09:22:53.845809 MTRR: Fixed MSR 0x250 0x0606060606060606
2051 09:22:53.849388
2052 09:22:53.852684 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 09:22:53.855616 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 09:22:53.859183 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 09:22:53.862825 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 09:22:53.868972 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 09:22:53.872564 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 09:22:53.875871 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 09:22:53.879144 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 09:22:53.885581 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 09:22:53.888887 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 09:22:53.891910 MTRR: Fixed MSR 0x258 0x0606060606060606
2063 09:22:53.895445 call enable_fixed_mtrr()
2064 09:22:53.898907 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 09:22:53.905233 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 09:22:53.909307 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 09:22:53.912059 MTRR: Fixed MSR 0x26a 0x0606060606060606
2068 09:22:53.915473 MTRR: Fixed MSR 0x26b 0x0606060606060606
2069 09:22:53.922061 MTRR: Fixed MSR 0x26c 0x0606060606060606
2070 09:22:53.925471 MTRR: Fixed MSR 0x26d 0x0606060606060606
2071 09:22:53.928525 MTRR: Fixed MSR 0x26e 0x0606060606060606
2072 09:22:53.932023 MTRR: Fixed MSR 0x26f 0x0606060606060606
2073 09:22:53.936272 CPU physical address size: 39 bits
2074 09:22:53.943379 call enable_fixed_mtrr()
2075 09:22:53.943466 Reading cr50 TPM mode
2076 09:22:53.947265 CPU physical address size: 39 bits
2077 09:22:53.950693 MTRR: Fixed MSR 0x250 0x0606060606060606
2078 09:22:53.954067 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 09:22:53.960417 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 09:22:53.963982 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 09:22:53.967288 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 09:22:53.970460 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 09:22:53.977251 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 09:22:53.980565 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 09:22:53.983662 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 09:22:53.987087 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 09:22:53.990103 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 09:22:53.996975 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 09:22:54.000291 MTRR: Fixed MSR 0x258 0x0606060606060606
2090 09:22:54.003378 MTRR: Fixed MSR 0x259 0x0000000000000000
2091 09:22:54.006805
2092 09:22:54.010280 MTRR: Fixed MSR 0x268 0x0606060606060606
2093 09:22:54.013184 MTRR: Fixed MSR 0x269 0x0606060606060606
2094 09:22:54.017023 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 09:22:54.020341 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 09:22:54.026869 MTRR: Fixed MSR 0x26c 0x0606060606060606
2097 09:22:54.029860 MTRR: Fixed MSR 0x26d 0x0606060606060606
2098 09:22:54.033370 MTRR: Fixed MSR 0x26e 0x0606060606060606
2099 09:22:54.036524 MTRR: Fixed MSR 0x26f 0x0606060606060606
2100 09:22:54.041454 call enable_fixed_mtrr()
2101 09:22:54.044361 call enable_fixed_mtrr()
2102 09:22:54.050669 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2103 09:22:54.054055 CPU physical address size: 39 bits
2104 09:22:54.060731 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2105 09:22:54.063822 CPU physical address size: 39 bits
2106 09:22:54.067611 CPU physical address size: 39 bits
2107 09:22:54.074340 Checking segment from ROM address 0xffc02b38
2108 09:22:54.077679 Checking segment from ROM address 0xffc02b54
2109 09:22:54.084026 Loading segment from ROM address 0xffc02b38
2110 09:22:54.084113 code (compression=0)
2111 09:22:54.093917 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2112 09:22:54.100814 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2113 09:22:54.103769
2114 09:22:54.103856 it's not compressed!
2115 09:22:54.243528 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2116 09:22:54.250621 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2117 09:22:54.256969 Loading segment from ROM address 0xffc02b54
2118 09:22:54.257057 Entry Point 0x30000000
2119 09:22:54.259983 Loaded segments
2120 09:22:54.266463 BS: BS_PAYLOAD_LOAD run times (exec / console): 147 / 63 ms
2121 09:22:54.309779 Finalizing chipset.
2122 09:22:54.312819 Finalizing SMM.
2123 09:22:54.312908 APMC done.
2124 09:22:54.319460 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2125 09:22:54.322873 mp_park_aps done after 0 msecs.
2126 09:22:54.325977 Jumping to boot code at 0x30000000(0x76b25000)
2127 09:22:54.335557 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2128 09:22:54.335647
2129 09:22:54.335716
2130 09:22:54.335779
2131 09:22:54.339149 Starting depthcharge on Voema...
2132 09:22:54.339237
2133 09:22:54.339612 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2134 09:22:54.339726 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2135 09:22:54.339811 Setting prompt string to ['volteer:']
2136 09:22:54.339890 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2137 09:22:54.348939 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2138 09:22:54.349027
2139 09:22:54.356303 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2140 09:22:54.356389
2141 09:22:54.362399 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2142 09:22:54.362487
2143 09:22:54.365699 Failed to find eMMC card reader
2144 09:22:54.365801
2145 09:22:54.365899 Wipe memory regions:
2146 09:22:54.365976
2147 09:22:54.372371 [0x00000000001000, 0x000000000a0000)
2148 09:22:54.372458
2149 09:22:54.375317 [0x00000000100000, 0x00000030000000)
2150 09:22:54.375420
2151 09:22:54.403948 [0x00000032662db0, 0x000000769ef000)
2152 09:22:54.404091
2153 09:22:54.442631 [0x00000100000000, 0x00000280400000)
2154 09:22:54.442734
2155 09:22:54.644397 ec_init: CrosEC protocol v3 supported (256, 256)
2156 09:22:54.644525
2157 09:22:54.651149 update_port_state: port C0 state: usb enable 1 mux conn 0
2158 09:22:54.651242
2159 09:22:54.660706 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2160 09:22:54.660793
2161 09:22:54.667123 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2162 09:22:54.667209
2163 09:22:54.670982 send_conn_disc_msg: pmc_send_cmd succeeded
2164 09:22:54.671069
2165 09:22:55.101992 R8152: Initializing
2166 09:22:55.102186
2167 09:22:55.104555 Version 6 (ocp_data = 5c30)
2168 09:22:55.104640
2169 09:22:55.108140 R8152: Done initializing
2170 09:22:55.108226
2171 09:22:55.111347 Adding net device
2172 09:22:55.111433
2173 09:22:55.415544 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2174 09:22:55.415681
2175 09:22:55.415750
2176 09:22:55.415813
2177 09:22:55.419164 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2179 09:22:55.519942 volteer: tftpboot 192.168.201.1 8093904/tftp-deploy-chfrea9_/kernel/bzImage 8093904/tftp-deploy-chfrea9_/kernel/cmdline 8093904/tftp-deploy-chfrea9_/ramdisk/ramdisk.cpio.gz
2180 09:22:55.520104 Setting prompt string to 'Starting kernel'
2181 09:22:55.520213 Setting prompt string to ['Starting kernel']
2182 09:22:55.520285 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2183 09:22:55.520372 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2184 09:22:55.524790 tftpboot 192.168.201.1 8093904/tftp-deploy-chfrea9_/kernel/bzImaoy-chfrea9_/kernel/cmdline 8093904/tftp-deploy-chfrea9_/ramdisk/ramdisk.cpio.gz
2185 09:22:55.524884
2186 09:22:55.524971 Waiting for link
2187 09:22:55.525057
2188 09:22:55.727338 done.
2189 09:22:55.727478
2190 09:22:55.727574 MAC: 00:24:32:30:7b:ec
2191 09:22:55.727662
2192 09:22:55.731079 Sending DHCP discover... done.
2193 09:22:55.731161
2194 09:22:55.733885 Waiting for reply... done.
2195 09:22:55.733967
2196 09:22:55.737241 Sending DHCP request... done.
2197 09:22:55.737339
2198 09:22:55.740335 Waiting for reply... done.
2199 09:22:55.740433
2200 09:22:55.743893 My ip is 192.168.201.11
2201 09:22:55.743972
2202 09:22:55.747179 The DHCP server ip is 192.168.201.1
2203 09:22:55.747305
2204 09:22:55.754210 TFTP server IP predefined by user: 192.168.201.1
2205 09:22:55.754295
2206 09:22:55.760809 Bootfile predefined by user: 8093904/tftp-deploy-chfrea9_/kernel/bzImage
2207 09:22:55.760898
2208 09:22:55.763787 Sending tftp read request... done.
2209 09:22:55.763895
2210 09:22:55.766916 Waiting for the transfer...
2211 09:22:55.767001
2212 09:22:56.306727 00000000 ################################################################
2213 09:22:56.306926
2214 09:22:56.850289 00080000 ################################################################
2215 09:22:56.850436
2216 09:22:57.387186 00100000 ################################################################
2217 09:22:57.387338
2218 09:22:57.909065 00180000 ################################################################
2219 09:22:57.909212
2220 09:22:58.429526 00200000 ################################################################
2221 09:22:58.429676
2222 09:22:58.966465 00280000 ################################################################
2223 09:22:58.966663
2224 09:22:59.522484 00300000 ################################################################
2225 09:22:59.522626
2226 09:23:00.054155 00380000 ################################################################
2227 09:23:00.054306
2228 09:23:00.586169 00400000 ################################################################
2229 09:23:00.586309
2230 09:23:01.144037 00480000 ################################################################
2231 09:23:01.144184
2232 09:23:01.704338 00500000 ################################################################
2233 09:23:01.704479
2234 09:23:02.256419 00580000 ################################################################
2235 09:23:02.256563
2236 09:23:02.814838 00600000 ################################################################
2237 09:23:02.814982
2238 09:23:03.371230 00680000 ################################################################
2239 09:23:03.371379
2240 09:23:03.912761 00700000 ################################################################
2241 09:23:03.912971
2242 09:23:04.473591 00780000 ################################################################
2243 09:23:04.473732
2244 09:23:05.031702 00800000 ################################################################
2245 09:23:05.031897
2246 09:23:05.407201 00880000 ############################################# done.
2247 09:23:05.407352
2248 09:23:05.410462 The bootfile was 9273344 bytes long.
2249 09:23:05.410549
2250 09:23:05.413900 Sending tftp read request... done.
2251 09:23:05.413993
2252 09:23:05.416763 Waiting for the transfer...
2253 09:23:05.416844
2254 09:23:05.951227 00000000 ################################################################
2255 09:23:05.951424
2256 09:23:06.483942 00080000 ################################################################
2257 09:23:06.484083
2258 09:23:07.030286 00100000 ################################################################
2259 09:23:07.030430
2260 09:23:07.576470 00180000 ################################################################
2261 09:23:07.576615
2262 09:23:08.128796 00200000 ################################################################
2263 09:23:08.128998
2264 09:23:08.688941 00280000 ################################################################
2265 09:23:08.689079
2266 09:23:09.251967 00300000 ################################################################
2267 09:23:09.252173
2268 09:23:09.801095 00380000 ################################################################
2269 09:23:09.801251
2270 09:23:10.351213 00400000 ################################################################
2271 09:23:10.351358
2272 09:23:10.903006 00480000 ################################################################
2273 09:23:10.903149
2274 09:23:11.463003 00500000 ################################################################
2275 09:23:11.463216
2276 09:23:12.037540 00580000 ################################################################
2277 09:23:12.037725
2278 09:23:12.585895 00600000 ################################################################
2279 09:23:12.586038
2280 09:23:13.166079 00680000 ################################################################
2281 09:23:13.166279
2282 09:23:13.729234 00700000 ################################################################
2283 09:23:13.729375
2284 09:23:14.301052 00780000 ################################################################
2285 09:23:14.301252
2286 09:23:14.498633 00800000 ####################### done.
2287 09:23:14.498779
2288 09:23:14.501345 Sending tftp read request... done.
2289 09:23:14.501470
2290 09:23:14.505158 Waiting for the transfer...
2291 09:23:14.505260
2292 09:23:14.505328 00000000 # done.
2293 09:23:14.505393
2294 09:23:14.514977 Command line loaded dynamically from TFTP file: 8093904/tftp-deploy-chfrea9_/kernel/cmdline
2295 09:23:14.515066
2296 09:23:14.527875 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2297 09:23:14.527965
2298 09:23:14.535229 Shutting down all USB controllers.
2299 09:23:14.535318
2300 09:23:14.535405 Removing current net device
2301 09:23:14.535487
2302 09:23:14.538357 Finalizing coreboot
2303 09:23:14.538446
2304 09:23:14.544970 Exiting depthcharge with code 4 at timestamp: 28881833
2305 09:23:14.545059
2306 09:23:14.545145
2307 09:23:14.545228 Starting kernel ...
2308 09:23:14.545309
2309 09:23:14.545399
2310 09:23:14.545517
2311 09:23:14.545915 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2312 09:23:14.546029 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2313 09:23:14.546114 Setting prompt string to ['Linux version [0-9]']
2314 09:23:14.546200 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2315 09:23:14.546286 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2317 09:27:37.546308 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2319 09:27:37.546628 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2321 09:27:37.546881 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2324 09:27:37.547261 end: 2 depthcharge-action (duration 00:05:00) [common]
2326 09:27:37.547492 Cleaning after the job
2327 09:27:37.547585 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8093904/tftp-deploy-chfrea9_/ramdisk
2328 09:27:37.548248 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8093904/tftp-deploy-chfrea9_/kernel
2329 09:27:37.548881 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8093904/tftp-deploy-chfrea9_/modules
2330 09:27:37.549077 start: 5.1 power-off (timeout 00:00:30) [common]
2331 09:27:37.549270 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2332 09:27:37.568542 >> Command sent successfully.
2333 09:27:37.570529 Returned 0 in 0 seconds
2334 09:27:37.671305 end: 5.1 power-off (duration 00:00:00) [common]
2336 09:27:37.671623 start: 5.2 read-feedback (timeout 00:10:00) [common]
2337 09:27:37.671859 Listened to connection for namespace 'common' for up to 1s
2338 09:27:38.673547 Finalising connection for namespace 'common'
2339 09:27:38.673735 Disconnecting from shell: Finalise
2340 09:27:38.774469 end: 5.2 read-feedback (duration 00:00:01) [common]
2341 09:27:38.774607 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8093904
2342 09:27:38.779489 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8093904
2343 09:27:38.779616 JobError: Your job cannot terminate cleanly.