Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 09:48:02.252888 lava-dispatcher, installed at version: 2022.11
2 09:48:02.253089 start: 0 validate
3 09:48:02.253225 Start time: 2023-01-19 09:48:02.253216+00:00 (UTC)
4 09:48:02.253361 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:48:02.253495 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230114.0%2Fx86%2Frootfs.cpio.gz exists
6 09:48:02.554863 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:48:02.555069 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.269-cip88-479-g3f9e11225caa5%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:48:02.854018 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:48:02.854189 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.269-cip88-479-g3f9e11225caa5%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 09:48:03.169006 validate duration: 0.92
12 09:48:03.169278 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:48:03.169382 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:48:03.169480 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:48:03.169598 Not decompressing ramdisk as can be used compressed.
16 09:48:03.169686 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230114.0/x86/rootfs.cpio.gz
17 09:48:03.169752 saving as /var/lib/lava/dispatcher/tmp/8794211/tftp-deploy-y61ao7ev/ramdisk/rootfs.cpio.gz
18 09:48:03.169815 total size: 8423555 (8MB)
19 09:48:03.217919 progress 0% (0MB)
20 09:48:03.270576 progress 5% (0MB)
21 09:48:03.311630 progress 10% (0MB)
22 09:48:03.366653 progress 15% (1MB)
23 09:48:03.412423 progress 20% (1MB)
24 09:48:03.464606 progress 25% (2MB)
25 09:48:03.510808 progress 30% (2MB)
26 09:48:03.564156 progress 35% (2MB)
27 09:48:03.622010 progress 40% (3MB)
28 09:48:03.668392 progress 45% (3MB)
29 09:48:03.728359 progress 50% (4MB)
30 09:48:03.785948 progress 55% (4MB)
31 09:48:03.844483 progress 60% (4MB)
32 09:48:03.907290 progress 65% (5MB)
33 09:48:03.959303 progress 70% (5MB)
34 09:48:04.008506 progress 75% (6MB)
35 09:48:04.080635 progress 80% (6MB)
36 09:48:04.153313 progress 85% (6MB)
37 09:48:04.203835 progress 90% (7MB)
38 09:48:04.266337 progress 95% (7MB)
39 09:48:04.322170 progress 100% (8MB)
40 09:48:04.322397 8MB downloaded in 1.15s (6.97MB/s)
41 09:48:04.322595 end: 1.1.1 http-download (duration 00:00:01) [common]
43 09:48:04.322890 end: 1.1 download-retry (duration 00:00:01) [common]
44 09:48:04.322980 start: 1.2 download-retry (timeout 00:09:59) [common]
45 09:48:04.323072 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 09:48:04.323290 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.269-cip88-479-g3f9e11225caa5/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 09:48:04.323362 saving as /var/lib/lava/dispatcher/tmp/8794211/tftp-deploy-y61ao7ev/kernel/bzImage
48 09:48:04.323498 total size: 9711616 (9MB)
49 09:48:04.323565 No compression specified
50 09:48:04.390233 progress 0% (0MB)
51 09:48:04.719390 progress 5% (0MB)
52 09:48:04.947727 progress 10% (0MB)
53 09:48:05.130694 progress 15% (1MB)
54 09:48:05.423398 progress 20% (1MB)
55 09:48:05.683618 progress 25% (2MB)
56 09:48:05.944815 progress 30% (2MB)
57 09:48:06.244490 progress 35% (3MB)
58 09:48:06.578339 progress 40% (3MB)
59 09:48:06.857139 progress 45% (4MB)
60 09:48:07.082173 progress 50% (4MB)
61 09:48:07.273588 progress 55% (5MB)
62 09:48:07.486821 progress 60% (5MB)
63 09:48:07.590924 progress 65% (6MB)
64 09:48:07.734614 progress 70% (6MB)
65 09:48:07.869771 progress 75% (6MB)
66 09:48:07.986839 progress 80% (7MB)
67 09:48:08.123633 progress 85% (7MB)
68 09:48:08.270206 progress 90% (8MB)
69 09:48:08.397301 progress 95% (8MB)
70 09:48:08.536876 progress 100% (9MB)
71 09:48:08.537212 9MB downloaded in 4.21s (2.20MB/s)
72 09:48:08.537371 end: 1.2.1 http-download (duration 00:00:04) [common]
74 09:48:08.537622 end: 1.2 download-retry (duration 00:00:04) [common]
75 09:48:08.537716 start: 1.3 download-retry (timeout 00:09:55) [common]
76 09:48:08.537808 start: 1.3.1 http-download (timeout 00:09:55) [common]
77 09:48:08.537931 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.269-cip88-479-g3f9e11225caa5/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 09:48:08.538005 saving as /var/lib/lava/dispatcher/tmp/8794211/tftp-deploy-y61ao7ev/modules/modules.tar
79 09:48:08.538095 total size: 64676 (0MB)
80 09:48:08.538161 Using unxz to decompress xz
81 09:48:08.599048 progress 50% (0MB)
82 09:48:08.614773 progress 100% (0MB)
83 09:48:08.617301 0MB downloaded in 0.08s (0.78MB/s)
84 09:48:08.617593 end: 1.3.1 http-download (duration 00:00:00) [common]
86 09:48:08.617898 end: 1.3 download-retry (duration 00:00:00) [common]
87 09:48:08.618016 start: 1.4 prepare-tftp-overlay (timeout 00:09:55) [common]
88 09:48:08.618131 start: 1.4.1 extract-nfsrootfs (timeout 00:09:55) [common]
89 09:48:08.618222 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 09:48:08.618313 start: 1.4.2 lava-overlay (timeout 00:09:55) [common]
91 09:48:08.618494 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0
92 09:48:08.618609 makedir: /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin
93 09:48:08.618697 makedir: /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/tests
94 09:48:08.618780 makedir: /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/results
95 09:48:08.618892 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-add-keys
96 09:48:08.619030 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-add-sources
97 09:48:08.619149 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-background-process-start
98 09:48:08.619266 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-background-process-stop
99 09:48:08.619381 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-common-functions
100 09:48:08.619494 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-echo-ipv4
101 09:48:08.619610 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-install-packages
102 09:48:08.619727 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-installed-packages
103 09:48:08.619840 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-os-build
104 09:48:08.619952 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-probe-channel
105 09:48:08.620067 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-probe-ip
106 09:48:08.620181 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-target-ip
107 09:48:08.620292 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-target-mac
108 09:48:08.620403 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-target-storage
109 09:48:08.620520 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-test-case
110 09:48:08.620633 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-test-event
111 09:48:08.620748 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-test-feedback
112 09:48:08.620860 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-test-raise
113 09:48:08.620973 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-test-reference
114 09:48:08.621085 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-test-runner
115 09:48:08.621196 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-test-set
116 09:48:08.621306 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-test-shell
117 09:48:08.621420 Updating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-install-packages (oe)
118 09:48:08.621536 Updating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/bin/lava-installed-packages (oe)
119 09:48:08.621636 Creating /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/environment
120 09:48:08.621725 LAVA metadata
121 09:48:08.621801 - LAVA_JOB_ID=8794211
122 09:48:08.621876 - LAVA_DISPATCHER_IP=192.168.201.1
123 09:48:08.621990 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:55) [common]
124 09:48:08.622085 skipped lava-vland-overlay
125 09:48:08.622174 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 09:48:08.622269 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
127 09:48:08.622339 skipped lava-multinode-overlay
128 09:48:08.622418 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 09:48:08.622504 start: 1.4.2.3 test-definition (timeout 00:09:55) [common]
130 09:48:08.622584 Loading test definitions
131 09:48:08.622682 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:55) [common]
132 09:48:08.622770 Using /lava-8794211 at stage 0
133 09:48:08.623053 uuid=8794211_1.4.2.3.1 testdef=None
134 09:48:08.623147 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 09:48:08.623240 start: 1.4.2.3.2 test-overlay (timeout 00:09:55) [common]
136 09:48:08.623742 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 09:48:08.623980 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:55) [common]
139 09:48:08.624561 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 09:48:08.624812 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
142 09:48:08.625381 runner path: /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/0/tests/0_dmesg test_uuid 8794211_1.4.2.3.1
143 09:48:08.625532 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 09:48:08.625774 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:55) [common]
146 09:48:08.625852 Using /lava-8794211 at stage 1
147 09:48:08.626112 uuid=8794211_1.4.2.3.5 testdef=None
148 09:48:08.626207 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 09:48:08.626298 start: 1.4.2.3.6 test-overlay (timeout 00:09:55) [common]
150 09:48:08.626754 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 09:48:08.626988 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:55) [common]
153 09:48:08.627568 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 09:48:08.627811 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:55) [common]
156 09:48:08.628470 runner path: /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/1/tests/1_bootrr test_uuid 8794211_1.4.2.3.5
157 09:48:08.628635 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 09:48:08.628881 Creating lava-test-runner.conf files
160 09:48:08.628961 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/0 for stage 0
161 09:48:08.629056 - 0_dmesg
162 09:48:08.629151 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8794211/lava-overlay-y0otm4p0/lava-8794211/1 for stage 1
163 09:48:08.629253 - 1_bootrr
164 09:48:08.629366 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 09:48:08.629470 start: 1.4.2.4 compress-overlay (timeout 00:09:55) [common]
166 09:48:08.635721 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 09:48:08.635845 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
168 09:48:08.635955 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 09:48:08.636061 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 09:48:08.636155 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
171 09:48:08.822718 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 09:48:08.823097 start: 1.4.4 extract-modules (timeout 00:09:54) [common]
173 09:48:08.823224 extracting modules file /var/lib/lava/dispatcher/tmp/8794211/tftp-deploy-y61ao7ev/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8794211/extract-overlay-ramdisk-4r_is0dc/ramdisk
174 09:48:08.827641 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 09:48:08.827783 start: 1.4.5 apply-overlay-tftp (timeout 00:09:54) [common]
176 09:48:08.827880 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8794211/compress-overlay-2jy_w01_/overlay-1.4.2.4.tar.gz to ramdisk
177 09:48:08.827956 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8794211/compress-overlay-2jy_w01_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8794211/extract-overlay-ramdisk-4r_is0dc/ramdisk
178 09:48:08.831949 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 09:48:08.832078 start: 1.4.6 configure-preseed-file (timeout 00:09:54) [common]
180 09:48:08.832177 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 09:48:08.832281 start: 1.4.7 compress-ramdisk (timeout 00:09:54) [common]
182 09:48:08.832389 Building ramdisk /var/lib/lava/dispatcher/tmp/8794211/extract-overlay-ramdisk-4r_is0dc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8794211/extract-overlay-ramdisk-4r_is0dc/ramdisk
183 09:48:08.900830 >> 48350 blocks
184 09:48:09.674615 rename /var/lib/lava/dispatcher/tmp/8794211/extract-overlay-ramdisk-4r_is0dc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8794211/tftp-deploy-y61ao7ev/ramdisk/ramdisk.cpio.gz
185 09:48:09.675015 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 09:48:09.675147 start: 1.4.8 prepare-kernel (timeout 00:09:53) [common]
187 09:48:09.675252 start: 1.4.8.1 prepare-fit (timeout 00:09:53) [common]
188 09:48:09.675348 No mkimage arch provided, not using FIT.
189 09:48:09.675447 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 09:48:09.675539 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 09:48:09.675643 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 09:48:09.675782 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:53) [common]
193 09:48:09.675899 No LXC device requested
194 09:48:09.675987 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 09:48:09.676084 start: 1.6 deploy-device-env (timeout 00:09:53) [common]
196 09:48:09.676180 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 09:48:09.676263 Checking files for TFTP limit of 4294967296 bytes.
198 09:48:09.676673 end: 1 tftp-deploy (duration 00:00:07) [common]
199 09:48:09.676786 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 09:48:09.676890 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 09:48:09.677026 substitutions:
202 09:48:09.677098 - {DTB}: None
203 09:48:09.677167 - {INITRD}: 8794211/tftp-deploy-y61ao7ev/ramdisk/ramdisk.cpio.gz
204 09:48:09.677230 - {KERNEL}: 8794211/tftp-deploy-y61ao7ev/kernel/bzImage
205 09:48:09.677292 - {LAVA_MAC}: None
206 09:48:09.677353 - {PRESEED_CONFIG}: None
207 09:48:09.677413 - {PRESEED_LOCAL}: None
208 09:48:09.677471 - {RAMDISK}: 8794211/tftp-deploy-y61ao7ev/ramdisk/ramdisk.cpio.gz
209 09:48:09.677528 - {ROOT_PART}: None
210 09:48:09.677585 - {ROOT}: None
211 09:48:09.677660 - {SERVER_IP}: 192.168.201.1
212 09:48:09.677718 - {TEE}: None
213 09:48:09.677777 Parsed boot commands:
214 09:48:09.677834 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 09:48:09.677992 Parsed boot commands: tftpboot 192.168.201.1 8794211/tftp-deploy-y61ao7ev/kernel/bzImage 8794211/tftp-deploy-y61ao7ev/kernel/cmdline 8794211/tftp-deploy-y61ao7ev/ramdisk/ramdisk.cpio.gz
216 09:48:09.678129 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 09:48:09.678257 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 09:48:09.678401 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 09:48:09.678519 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 09:48:09.678591 Not connected, no need to disconnect.
221 09:48:09.678671 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 09:48:09.678757 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 09:48:09.678828 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
224 09:48:09.681470 Setting prompt string to ['lava-test: # ']
225 09:48:09.681757 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 09:48:09.681865 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 09:48:09.681968 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 09:48:09.682100 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 09:48:09.682283 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
230 09:48:09.702065 >> Command sent successfully.
231 09:48:09.704087 Returned 0 in 0 seconds
232 09:48:09.805132 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 09:48:09.807448 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 09:48:09.807947 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 09:48:09.808349 Setting prompt string to 'Starting depthcharge on Helios...'
237 09:48:09.808674 Changing prompt to 'Starting depthcharge on Helios...'
238 09:48:09.809004 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 09:48:09.810121 [Enter `^Ec?' for help]
240 09:48:16.684912
241 09:48:16.685069
242 09:48:16.694324 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 09:48:16.697771 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 09:48:16.704203 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 09:48:16.707742 CPU: AES supported, TXT NOT supported, VT supported
246 09:48:16.714647 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 09:48:16.717558 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 09:48:16.723988 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 09:48:16.727489 VBOOT: Loading verstage.
250 09:48:16.730833 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 09:48:16.737307 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 09:48:16.743679 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 09:48:16.743800 CBFS @ c08000 size 3f8000
254 09:48:16.750698 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 09:48:16.753619 CBFS: Locating 'fallback/verstage'
256 09:48:16.757202 CBFS: Found @ offset 10fb80 size 1072c
257 09:48:16.761481
258 09:48:16.761570
259 09:48:16.771332 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 09:48:16.785773 Probing TPM: . done!
261 09:48:16.788873 TPM ready after 0 ms
262 09:48:16.791967 Connected to device vid:did:rid of 1ae0:0028:00
263 09:48:16.802304 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 09:48:16.805757 Initialized TPM device CR50 revision 0
265 09:48:16.848327 tlcl_send_startup: Startup return code is 0
266 09:48:16.848475 TPM: setup succeeded
267 09:48:16.861027 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 09:48:16.864468 Chrome EC: UHEPI supported
269 09:48:16.867981 Phase 1
270 09:48:16.870829 FMAP: area GBB found @ c05000 (12288 bytes)
271 09:48:16.877486 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 09:48:16.881087 Phase 2
273 09:48:16.881225 Phase 3
274 09:48:16.884047 FMAP: area GBB found @ c05000 (12288 bytes)
275 09:48:16.890888 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 09:48:16.897339 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 09:48:16.900284 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 09:48:16.907320 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 09:48:16.923491 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 09:48:16.926241 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 09:48:16.933218 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 09:48:16.937264 Phase 4
283 09:48:16.940833 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 09:48:16.947082 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 09:48:17.127226 VB2:vb2_rsa_verify_digest() Digest check failed!
286 09:48:17.130103 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 09:48:17.133777
288 09:48:17.133886 Saving nvdata
289 09:48:17.136788 Reboot requested (10020007)
290 09:48:17.139761 board_reset() called!
291 09:48:17.139848 full_reset() called!
292 09:48:21.651479
293 09:48:21.651626
294 09:48:21.661427 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
295 09:48:21.664912 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
296 09:48:21.671408 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
297 09:48:21.674263 CPU: AES supported, TXT NOT supported, VT supported
298 09:48:21.680828 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
299 09:48:21.684265 PCH: device id 0284 (rev 00) is Cometlake-U Premium
300 09:48:21.690663 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
301 09:48:21.694109 VBOOT: Loading verstage.
302 09:48:21.697681 FMAP: Found "FLASH" version 1.1 at 0xc04000.
303 09:48:21.703905 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
304 09:48:21.710797 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
305 09:48:21.710886 CBFS @ c08000 size 3f8000
306 09:48:21.717385 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
307 09:48:21.720769 CBFS: Locating 'fallback/verstage'
308 09:48:21.723598 CBFS: Found @ offset 10fb80 size 1072c
309 09:48:21.728207
310 09:48:21.728299
311 09:48:21.737690 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
312 09:48:21.752454 Probing TPM: . done!
313 09:48:21.755903 TPM ready after 0 ms
314 09:48:21.758757 Connected to device vid:did:rid of 1ae0:0028:00
315 09:48:21.769044 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
316 09:48:21.772576 Initialized TPM device CR50 revision 0
317 09:48:21.815158 tlcl_send_startup: Startup return code is 0
318 09:48:21.815299 TPM: setup succeeded
319 09:48:21.827424 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
320 09:48:21.831672 Chrome EC: UHEPI supported
321 09:48:21.834484 Phase 1
322 09:48:21.838007 FMAP: area GBB found @ c05000 (12288 bytes)
323 09:48:21.844484 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
324 09:48:21.851001 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
325 09:48:21.854444 Recovery requested (1009000e)
326 09:48:21.860136 Saving nvdata
327 09:48:21.866621 tlcl_extend: response is 0
328 09:48:21.875351 tlcl_extend: response is 0
329 09:48:21.882515 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
330 09:48:21.885461 CBFS @ c08000 size 3f8000
331 09:48:21.891958 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
332 09:48:21.895254 CBFS: Locating 'fallback/romstage'
333 09:48:21.898725 CBFS: Found @ offset 80 size 145fc
334 09:48:21.902159 Accumulated console time in verstage 98 ms
335 09:48:21.902242
336 09:48:21.902310
337 09:48:21.915053 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
338 09:48:21.921505 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 09:48:21.925066 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 09:48:21.927811 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
341 09:48:21.934864 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
342 09:48:21.937690 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
343 09:48:21.941307 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
344 09:48:21.944614 TCO_STS: 0000 0000
345 09:48:21.947568 GEN_PMCON: e0015238 00000200
346 09:48:21.951164 GBLRST_CAUSE: 00000000 00000000
347 09:48:21.951291 prev_sleep_state 5
348 09:48:21.955172 Boot Count incremented to 44022
349 09:48:21.961645 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
350 09:48:21.965061 CBFS @ c08000 size 3f8000
351 09:48:21.971519 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
352 09:48:21.971686 CBFS: Locating 'fspm.bin'
353 09:48:21.974973 CBFS: Found @ offset 5ffc0 size 71000
354 09:48:21.977919
355 09:48:21.981474 Chrome EC: UHEPI supported
356 09:48:21.988110 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
357 09:48:21.991700 Probing TPM: done!
358 09:48:21.997860 Connected to device vid:did:rid of 1ae0:0028:00
359 09:48:22.008143 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
360 09:48:22.014013 Initialized TPM device CR50 revision 0
361 09:48:22.023097 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
362 09:48:22.029412 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
363 09:48:22.032830
364 09:48:22.032925 MRC cache found, size 1948
365 09:48:22.035950 bootmode is set to: 2
366 09:48:22.039305 PRMRR disabled by config.
367 09:48:22.042955 SPD INDEX = 1
368 09:48:22.045878 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
369 09:48:22.049222 CBFS @ c08000 size 3f8000
370 09:48:22.055728 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
371 09:48:22.055818 CBFS: Locating 'spd.bin'
372 09:48:22.059211 CBFS: Found @ offset 5fb80 size 400
373 09:48:22.062662
374 09:48:22.062752 SPD: module type is LPDDR3
375 09:48:22.065695 SPD: module part is
376 09:48:22.072031 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
377 09:48:22.075509 SPD: device width 4 bits, bus width 8 bits
378 09:48:22.078421 SPD: module size is 4096 MB (per channel)
379 09:48:22.081824 memory slot: 0 configuration done.
380 09:48:22.085390
381 09:48:22.088450 memory slot: 2 configuration done.
382 09:48:22.137931 CBMEM:
383 09:48:22.140810 IMD: root @ 99fff000 254 entries.
384 09:48:22.144350 IMD: root @ 99ffec00 62 entries.
385 09:48:22.147453 External stage cache:
386 09:48:22.150870 IMD: root @ 9abff000 254 entries.
387 09:48:22.153885 IMD: root @ 9abfec00 62 entries.
388 09:48:22.160930 Chrome EC: clear events_b mask to 0x0000000020004000
389 09:48:22.173861 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 09:48:22.183798 tlcl_write: response is 0
391 09:48:22.195865 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
392 09:48:22.202384 MRC: TPM MRC hash updated successfully.
393 09:48:22.202512 2 DIMMs found
394 09:48:22.205744 SMM Memory Map
395 09:48:22.209266 SMRAM : 0x9a000000 0x1000000
396 09:48:22.212041 Subregion 0: 0x9a000000 0xa00000
397 09:48:22.215500 Subregion 1: 0x9aa00000 0x200000
398 09:48:22.219037 Subregion 2: 0x9ac00000 0x400000
399 09:48:22.222462 top_of_ram = 0x9a000000
400 09:48:22.225439 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
401 09:48:22.232161 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
402 09:48:22.235376 MTRR Range: Start=ff000000 End=0 (Size 1000000)
403 09:48:22.242012 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
404 09:48:22.245447 CBFS @ c08000 size 3f8000
405 09:48:22.248301 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
406 09:48:22.251709 CBFS: Locating 'fallback/postcar'
407 09:48:22.258297 CBFS: Found @ offset 107000 size 4b44
408 09:48:22.261941 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
409 09:48:22.265015
410 09:48:22.274580 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 09:48:22.277983 Processing 180 relocs. Offset value of 0x97c0c000
412 09:48:22.286264 Accumulated console time in romstage 285 ms
413 09:48:22.286352
414 09:48:22.286423
415 09:48:22.296494 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 09:48:22.302484 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 09:48:22.305836 CBFS @ c08000 size 3f8000
418 09:48:22.312791 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 09:48:22.315732 CBFS: Locating 'fallback/ramstage'
420 09:48:22.319245 CBFS: Found @ offset 43380 size 1b9e8
421 09:48:22.325516 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 09:48:22.358163 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 09:48:22.361087 Processing 3976 relocs. Offset value of 0x98db0000
424 09:48:22.364594
425 09:48:22.367514 Accumulated console time in postcar 52 ms
426 09:48:22.367602
427 09:48:22.367681
428 09:48:22.377670 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
429 09:48:22.384053 FMAP: area RO_VPD found @ c00000 (16384 bytes)
430 09:48:22.387617 WARNING: RO_VPD is uninitialized or empty.
431 09:48:22.390555 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 09:48:22.397086 FMAP: area RW_VPD found @ af8000 (8192 bytes)
433 09:48:22.397180 Normal boot.
434 09:48:22.403547 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
435 09:48:22.406976 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 09:48:22.410653 CBFS @ c08000 size 3f8000
437 09:48:22.416680 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 09:48:22.420062 CBFS: Locating 'cpu_microcode_blob.bin'
439 09:48:22.423838 CBFS: Found @ offset 14700 size 2ec00
440 09:48:22.429881 microcode: sig=0x806ec pf=0x4 revision=0xc9
441 09:48:22.429964 Skip microcode update
442 09:48:22.436836 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
443 09:48:22.439735 CBFS @ c08000 size 3f8000
444 09:48:22.443391 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
445 09:48:22.446313 CBFS: Locating 'fsps.bin'
446 09:48:22.449863 CBFS: Found @ offset d1fc0 size 35000
447 09:48:22.476261 Detected 4 core, 8 thread CPU.
448 09:48:22.479175 Setting up SMI for CPU
449 09:48:22.482569 IED base = 0x9ac00000
450 09:48:22.485707 IED size = 0x00400000
451 09:48:22.485794 Will perform SMM setup.
452 09:48:22.492628 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
453 09:48:22.499219 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
454 09:48:22.505569 Processing 16 relocs. Offset value of 0x00030000
455 09:48:22.508367 Attempting to start 7 APs
456 09:48:22.512015 Waiting for 10ms after sending INIT.
457 09:48:22.525644 Waiting for 1st SIPI to complete...done.
458 09:48:22.525765 AP: slot 4 apic_id 3.
459 09:48:22.528880 AP: slot 1 apic_id 2.
460 09:48:22.532325 AP: slot 6 apic_id 7.
461 09:48:22.532419 AP: slot 7 apic_id 6.
462 09:48:22.535353 AP: slot 5 apic_id 5.
463 09:48:22.538774 AP: slot 2 apic_id 4.
464 09:48:22.538863 AP: slot 3 apic_id 1.
465 09:48:22.545689 Waiting for 2nd SIPI to complete...done.
466 09:48:22.552351 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
467 09:48:22.558741 Processing 13 relocs. Offset value of 0x00038000
468 09:48:22.562305 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
469 09:48:22.565428
470 09:48:22.568639 Installing SMM handler to 0x9a000000
471 09:48:22.575026 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
472 09:48:22.581533 Processing 658 relocs. Offset value of 0x9a010000
473 09:48:22.588520 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
474 09:48:22.591412 Processing 13 relocs. Offset value of 0x9a008000
475 09:48:22.597894 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
476 09:48:22.604577 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
477 09:48:22.611085 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
478 09:48:22.614706 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
479 09:48:22.620962 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
480 09:48:22.627678 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
481 09:48:22.634176 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
482 09:48:22.641067 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
483 09:48:22.643968 Clearing SMI status registers
484 09:48:22.644054 SMI_STS: PM1
485 09:48:22.647499 PM1_STS: PWRBTN
486 09:48:22.647580 TCO_STS: SECOND_TO
487 09:48:22.650882 New SMBASE 0x9a000000
488 09:48:22.653884 In relocation handler: CPU 0
489 09:48:22.657366 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
490 09:48:22.663750 Writing SMRR. base = 0x9a000006, mask=0xff000800
491 09:48:22.663838 Relocation complete.
492 09:48:22.667326 New SMBASE 0x99fff400
493 09:48:22.670346 In relocation handler: CPU 3
494 09:48:22.673679 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
495 09:48:22.680181 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 09:48:22.680268 Relocation complete.
497 09:48:22.683725 New SMBASE 0x99ffec00
498 09:48:22.686726 In relocation handler: CPU 5
499 09:48:22.690256 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
500 09:48:22.696601 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 09:48:22.696693 Relocation complete.
502 09:48:22.700175 New SMBASE 0x99fff800
503 09:48:22.703204 In relocation handler: CPU 2
504 09:48:22.706751 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
505 09:48:22.709793 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 09:48:22.713073
507 09:48:22.713160 Relocation complete.
508 09:48:22.716538 New SMBASE 0x99fff000
509 09:48:22.719962 In relocation handler: CPU 4
510 09:48:22.722894 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
511 09:48:22.726238 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 09:48:22.729448 Relocation complete.
513 09:48:22.732871 New SMBASE 0x99fffc00
514 09:48:22.736355 In relocation handler: CPU 1
515 09:48:22.739722 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
516 09:48:22.742511 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 09:48:22.745812 Relocation complete.
518 09:48:22.749403 New SMBASE 0x99ffe800
519 09:48:22.752871 In relocation handler: CPU 6
520 09:48:22.755987 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
521 09:48:22.759435 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 09:48:22.762383 Relocation complete.
523 09:48:22.765392 New SMBASE 0x99ffe400
524 09:48:22.768799 In relocation handler: CPU 7
525 09:48:22.772287 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
526 09:48:22.775596 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 09:48:22.778751 Relocation complete.
528 09:48:22.781694 Initializing CPU #0
529 09:48:22.785401 CPU: vendor Intel device 806ec
530 09:48:22.788407 CPU: family 06, model 8e, stepping 0c
531 09:48:22.791890 Clearing out pending MCEs
532 09:48:22.791970 Setting up local APIC...
533 09:48:22.795344 apic_id: 0x00 done.
534 09:48:22.798398 Turbo is available but hidden
535 09:48:22.801908 Turbo is available and visible
536 09:48:22.805373 VMX status: enabled
537 09:48:22.808248 IA32_FEATURE_CONTROL status: locked
538 09:48:22.808333 Skip microcode update
539 09:48:22.811702 CPU #0 initialized
540 09:48:22.814689 Initializing CPU #3
541 09:48:22.814778 Initializing CPU #5
542 09:48:22.818065 Initializing CPU #2
543 09:48:22.821397 CPU: vendor Intel device 806ec
544 09:48:22.824852 CPU: family 06, model 8e, stepping 0c
545 09:48:22.827807 CPU: vendor Intel device 806ec
546 09:48:22.831244 CPU: family 06, model 8e, stepping 0c
547 09:48:22.834651 Clearing out pending MCEs
548 09:48:22.837509 Clearing out pending MCEs
549 09:48:22.837591 Setting up local APIC...
550 09:48:22.841064 Initializing CPU #6
551 09:48:22.844427 Initializing CPU #7
552 09:48:22.847928 CPU: vendor Intel device 806ec
553 09:48:22.851044 CPU: family 06, model 8e, stepping 0c
554 09:48:22.854496 CPU: vendor Intel device 806ec
555 09:48:22.857951 CPU: family 06, model 8e, stepping 0c
556 09:48:22.861000 Clearing out pending MCEs
557 09:48:22.861082 Clearing out pending MCEs
558 09:48:22.863928 Setting up local APIC...
559 09:48:22.867530 apic_id: 0x05 done.
560 09:48:22.871071 apic_id: 0x07 done.
561 09:48:22.871166 Setting up local APIC...
562 09:48:22.873882 Initializing CPU #1
563 09:48:22.877412 Initializing CPU #4
564 09:48:22.880364 CPU: vendor Intel device 806ec
565 09:48:22.883807 CPU: family 06, model 8e, stepping 0c
566 09:48:22.887160 CPU: vendor Intel device 806ec
567 09:48:22.890056 CPU: family 06, model 8e, stepping 0c
568 09:48:22.893638 Clearing out pending MCEs
569 09:48:22.893732 Clearing out pending MCEs
570 09:48:22.896621 Setting up local APIC...
571 09:48:22.900165 CPU: vendor Intel device 806ec
572 09:48:22.903655 CPU: family 06, model 8e, stepping 0c
573 09:48:22.906618 Clearing out pending MCEs
574 09:48:22.910225 apic_id: 0x03 done.
575 09:48:22.910310 Setting up local APIC...
576 09:48:22.913095
577 09:48:22.913206 VMX status: enabled
578 09:48:22.916513 apic_id: 0x06 done.
579 09:48:22.920083 IA32_FEATURE_CONTROL status: locked
580 09:48:22.920169 VMX status: enabled
581 09:48:22.923203
582 09:48:22.923289 Skip microcode update
583 09:48:22.926357 IA32_FEATURE_CONTROL status: locked
584 09:48:22.929848 CPU #6 initialized
585 09:48:22.933167 Skip microcode update
586 09:48:22.933254 Setting up local APIC...
587 09:48:22.936875 apic_id: 0x02 done.
588 09:48:22.940071 VMX status: enabled
589 09:48:22.940158 VMX status: enabled
590 09:48:22.942889 IA32_FEATURE_CONTROL status: locked
591 09:48:22.946400 IA32_FEATURE_CONTROL status: locked
592 09:48:22.949770 Skip microcode update
593 09:48:22.952758 Skip microcode update
594 09:48:22.952846 CPU #4 initialized
595 09:48:22.956303 CPU #1 initialized
596 09:48:22.959787 Setting up local APIC...
597 09:48:22.959874 CPU #7 initialized
598 09:48:22.962560 apic_id: 0x01 done.
599 09:48:22.966207 apic_id: 0x04 done.
600 09:48:22.966289 VMX status: enabled
601 09:48:22.969107 VMX status: enabled
602 09:48:22.972698 IA32_FEATURE_CONTROL status: locked
603 09:48:22.976116 IA32_FEATURE_CONTROL status: locked
604 09:48:22.978959 Skip microcode update
605 09:48:22.979040 Skip microcode update
606 09:48:22.982587 CPU #5 initialized
607 09:48:22.985341 CPU #2 initialized
608 09:48:22.985427 VMX status: enabled
609 09:48:22.988843 IA32_FEATURE_CONTROL status: locked
610 09:48:22.992492 Skip microcode update
611 09:48:22.995681 CPU #3 initialized
612 09:48:22.998735 bsp_do_flight_plan done after 452 msecs.
613 09:48:23.002418 CPU: frequency set to 4200 MHz
614 09:48:23.002509 Enabling SMIs.
615 09:48:23.005223 Locking SMM.
616 09:48:23.019326 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
617 09:48:23.022819 CBFS @ c08000 size 3f8000
618 09:48:23.029160 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
619 09:48:23.029256 CBFS: Locating 'vbt.bin'
620 09:48:23.032604 CBFS: Found @ offset 5f5c0 size 499
621 09:48:23.039378 Found a VBT of 4608 bytes after decompression
622 09:48:23.220980 Display FSP Version Info HOB
623 09:48:23.224512 Reference Code - CPU = 9.0.1e.30
624 09:48:23.227424 uCode Version = 0.0.0.ca
625 09:48:23.230692 TXT ACM version = ff.ff.ff.ffff
626 09:48:23.234294 Display FSP Version Info HOB
627 09:48:23.237478 Reference Code - ME = 9.0.1e.30
628 09:48:23.240505 MEBx version = 0.0.0.0
629 09:48:23.243802 ME Firmware Version = Consumer SKU
630 09:48:23.247404 Display FSP Version Info HOB
631 09:48:23.250319 Reference Code - CML PCH = 9.0.1e.30
632 09:48:23.253682 PCH-CRID Status = Disabled
633 09:48:23.257012 PCH-CRID Original Value = ff.ff.ff.ffff
634 09:48:23.260133 PCH-CRID New Value = ff.ff.ff.ffff
635 09:48:23.263445 OPROM - RST - RAID = ff.ff.ff.ffff
636 09:48:23.266361 ChipsetInit Base Version = ff.ff.ff.ffff
637 09:48:23.272738 ChipsetInit Oem Version = ff.ff.ff.ffff
638 09:48:23.272838 Display FSP Version Info HOB
639 09:48:23.279710 Reference Code - SA - System Agent = 9.0.1e.30
640 09:48:23.282720 Reference Code - MRC = 0.7.1.6c
641 09:48:23.286170 SA - PCIe Version = 9.0.1e.30
642 09:48:23.289264 SA-CRID Status = Disabled
643 09:48:23.292527 SA-CRID Original Value = 0.0.0.c
644 09:48:23.292614 SA-CRID New Value = 0.0.0.c
645 09:48:23.295528
646 09:48:23.295609 OPROM - VBIOS = ff.ff.ff.ffff
647 09:48:23.299519 RTC Init
648 09:48:23.303127 Set power on after power failure.
649 09:48:23.303212 Disabling Deep S3
650 09:48:23.306117
651 09:48:23.306195 Disabling Deep S3
652 09:48:23.309451 Disabling Deep S4
653 09:48:23.309530 Disabling Deep S4
654 09:48:23.313035 Disabling Deep S5
655 09:48:23.313116 Disabling Deep S5
656 09:48:23.319467 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
657 09:48:23.322467 Enumerating buses...
658 09:48:23.325798 Show all devs... Before device enumeration.
659 09:48:23.329361 Root Device: enabled 1
660 09:48:23.332165 CPU_CLUSTER: 0: enabled 1
661 09:48:23.332245 DOMAIN: 0000: enabled 1
662 09:48:23.335694 APIC: 00: enabled 1
663 09:48:23.338910 PCI: 00:00.0: enabled 1
664 09:48:23.338999 PCI: 00:02.0: enabled 1
665 09:48:23.342417
666 09:48:23.342506 PCI: 00:04.0: enabled 0
667 09:48:23.345535 PCI: 00:05.0: enabled 0
668 09:48:23.348473 PCI: 00:12.0: enabled 1
669 09:48:23.348563 PCI: 00:12.5: enabled 0
670 09:48:23.352058 PCI: 00:12.6: enabled 0
671 09:48:23.355458 PCI: 00:14.0: enabled 1
672 09:48:23.358243 PCI: 00:14.1: enabled 0
673 09:48:23.358335 PCI: 00:14.3: enabled 1
674 09:48:23.361819 PCI: 00:14.5: enabled 0
675 09:48:23.364761 PCI: 00:15.0: enabled 1
676 09:48:23.367790 PCI: 00:15.1: enabled 1
677 09:48:23.367873 PCI: 00:15.2: enabled 0
678 09:48:23.371264 PCI: 00:15.3: enabled 0
679 09:48:23.374373 PCI: 00:16.0: enabled 1
680 09:48:23.377688 PCI: 00:16.1: enabled 0
681 09:48:23.377781 PCI: 00:16.2: enabled 0
682 09:48:23.381148 PCI: 00:16.3: enabled 0
683 09:48:23.384787 PCI: 00:16.4: enabled 0
684 09:48:23.387612 PCI: 00:16.5: enabled 0
685 09:48:23.387698 PCI: 00:17.0: enabled 1
686 09:48:23.391138 PCI: 00:19.0: enabled 1
687 09:48:23.393857 PCI: 00:19.1: enabled 0
688 09:48:23.397451 PCI: 00:19.2: enabled 0
689 09:48:23.397543 PCI: 00:1a.0: enabled 0
690 09:48:23.401027 PCI: 00:1c.0: enabled 0
691 09:48:23.403837 PCI: 00:1c.1: enabled 0
692 09:48:23.407335 PCI: 00:1c.2: enabled 0
693 09:48:23.407419 PCI: 00:1c.3: enabled 0
694 09:48:23.410336 PCI: 00:1c.4: enabled 0
695 09:48:23.413973 PCI: 00:1c.5: enabled 0
696 09:48:23.417001 PCI: 00:1c.6: enabled 0
697 09:48:23.417117 PCI: 00:1c.7: enabled 0
698 09:48:23.420536 PCI: 00:1d.0: enabled 1
699 09:48:23.423503 PCI: 00:1d.1: enabled 0
700 09:48:23.426922 PCI: 00:1d.2: enabled 0
701 09:48:23.427012 PCI: 00:1d.3: enabled 0
702 09:48:23.430297 PCI: 00:1d.4: enabled 0
703 09:48:23.433331 PCI: 00:1d.5: enabled 1
704 09:48:23.436802 PCI: 00:1e.0: enabled 1
705 09:48:23.436891 PCI: 00:1e.1: enabled 0
706 09:48:23.439937 PCI: 00:1e.2: enabled 1
707 09:48:23.443522 PCI: 00:1e.3: enabled 1
708 09:48:23.446159 PCI: 00:1f.0: enabled 1
709 09:48:23.446244 PCI: 00:1f.1: enabled 1
710 09:48:23.449709 PCI: 00:1f.2: enabled 1
711 09:48:23.453077 PCI: 00:1f.3: enabled 1
712 09:48:23.455910 PCI: 00:1f.4: enabled 1
713 09:48:23.456001 PCI: 00:1f.5: enabled 1
714 09:48:23.459406 PCI: 00:1f.6: enabled 0
715 09:48:23.462934 USB0 port 0: enabled 1
716 09:48:23.463016 I2C: 00:15: enabled 1
717 09:48:23.465823 I2C: 00:5d: enabled 1
718 09:48:23.469326 GENERIC: 0.0: enabled 1
719 09:48:23.472258 I2C: 00:1a: enabled 1
720 09:48:23.472340 I2C: 00:38: enabled 1
721 09:48:23.475951 I2C: 00:39: enabled 1
722 09:48:23.478881 I2C: 00:3a: enabled 1
723 09:48:23.478966 I2C: 00:3b: enabled 1
724 09:48:23.482755 PCI: 00:00.0: enabled 1
725 09:48:23.485320 SPI: 00: enabled 1
726 09:48:23.485419 SPI: 01: enabled 1
727 09:48:23.488823 PNP: 0c09.0: enabled 1
728 09:48:23.492260 USB2 port 0: enabled 1
729 09:48:23.492348 USB2 port 1: enabled 1
730 09:48:23.495251 USB2 port 2: enabled 0
731 09:48:23.498605 USB2 port 3: enabled 0
732 09:48:23.501448 USB2 port 5: enabled 0
733 09:48:23.501552 USB2 port 6: enabled 1
734 09:48:23.505090 USB2 port 9: enabled 1
735 09:48:23.508438 USB3 port 0: enabled 1
736 09:48:23.508523 USB3 port 1: enabled 1
737 09:48:23.511408 USB3 port 2: enabled 1
738 09:48:23.514941 USB3 port 3: enabled 1
739 09:48:23.518251 USB3 port 4: enabled 0
740 09:48:23.518334 APIC: 02: enabled 1
741 09:48:23.521423 APIC: 04: enabled 1
742 09:48:23.521504 APIC: 01: enabled 1
743 09:48:23.524360 APIC: 03: enabled 1
744 09:48:23.527978 APIC: 05: enabled 1
745 09:48:23.528060 APIC: 07: enabled 1
746 09:48:23.531366 APIC: 06: enabled 1
747 09:48:23.534279 Compare with tree...
748 09:48:23.534369 Root Device: enabled 1
749 09:48:23.537690 CPU_CLUSTER: 0: enabled 1
750 09:48:23.541109 APIC: 00: enabled 1
751 09:48:23.544041 APIC: 02: enabled 1
752 09:48:23.544130 APIC: 04: enabled 1
753 09:48:23.547359 APIC: 01: enabled 1
754 09:48:23.550655 APIC: 03: enabled 1
755 09:48:23.550745 APIC: 05: enabled 1
756 09:48:23.553649 APIC: 07: enabled 1
757 09:48:23.557044 APIC: 06: enabled 1
758 09:48:23.557133 DOMAIN: 0000: enabled 1
759 09:48:23.560488 PCI: 00:00.0: enabled 1
760 09:48:23.564363 PCI: 00:02.0: enabled 1
761 09:48:23.567006 PCI: 00:04.0: enabled 0
762 09:48:23.570483 PCI: 00:05.0: enabled 0
763 09:48:23.570572 PCI: 00:12.0: enabled 1
764 09:48:23.573430 PCI: 00:12.5: enabled 0
765 09:48:23.576920 PCI: 00:12.6: enabled 0
766 09:48:23.579949 PCI: 00:14.0: enabled 1
767 09:48:23.583376 USB0 port 0: enabled 1
768 09:48:23.583470 USB2 port 0: enabled 1
769 09:48:23.586441 USB2 port 1: enabled 1
770 09:48:23.589911 USB2 port 2: enabled 0
771 09:48:23.593484 USB2 port 3: enabled 0
772 09:48:23.596334 USB2 port 5: enabled 0
773 09:48:23.599905 USB2 port 6: enabled 1
774 09:48:23.600000 USB2 port 9: enabled 1
775 09:48:23.602709
776 09:48:23.602799 USB3 port 0: enabled 1
777 09:48:23.606217 USB3 port 1: enabled 1
778 09:48:23.609194 USB3 port 2: enabled 1
779 09:48:23.612561 USB3 port 3: enabled 1
780 09:48:23.616143 USB3 port 4: enabled 0
781 09:48:23.616232 PCI: 00:14.1: enabled 0
782 09:48:23.619020 PCI: 00:14.3: enabled 1
783 09:48:23.622515 PCI: 00:14.5: enabled 0
784 09:48:23.625605 PCI: 00:15.0: enabled 1
785 09:48:23.629044 I2C: 00:15: enabled 1
786 09:48:23.629133 PCI: 00:15.1: enabled 1
787 09:48:23.632311
788 09:48:23.632408 I2C: 00:5d: enabled 1
789 09:48:23.635350 GENERIC: 0.0: enabled 1
790 09:48:23.638697 PCI: 00:15.2: enabled 0
791 09:48:23.642080 PCI: 00:15.3: enabled 0
792 09:48:23.642170 PCI: 00:16.0: enabled 1
793 09:48:23.644993
794 09:48:23.645084 PCI: 00:16.1: enabled 0
795 09:48:23.648481 PCI: 00:16.2: enabled 0
796 09:48:23.651773 PCI: 00:16.3: enabled 0
797 09:48:23.655050 PCI: 00:16.4: enabled 0
798 09:48:23.658111 PCI: 00:16.5: enabled 0
799 09:48:23.658207 PCI: 00:17.0: enabled 1
800 09:48:23.661497 PCI: 00:19.0: enabled 1
801 09:48:23.665137 I2C: 00:1a: enabled 1
802 09:48:23.668027 I2C: 00:38: enabled 1
803 09:48:23.668117 I2C: 00:39: enabled 1
804 09:48:23.671673 I2C: 00:3a: enabled 1
805 09:48:23.674462 I2C: 00:3b: enabled 1
806 09:48:23.677864 PCI: 00:19.1: enabled 0
807 09:48:23.680864 PCI: 00:19.2: enabled 0
808 09:48:23.680962 PCI: 00:1a.0: enabled 0
809 09:48:23.684361 PCI: 00:1c.0: enabled 0
810 09:48:23.687319 PCI: 00:1c.1: enabled 0
811 09:48:23.690840 PCI: 00:1c.2: enabled 0
812 09:48:23.693893 PCI: 00:1c.3: enabled 0
813 09:48:23.693983 PCI: 00:1c.4: enabled 0
814 09:48:23.697675 PCI: 00:1c.5: enabled 0
815 09:48:23.700645 PCI: 00:1c.6: enabled 0
816 09:48:23.704051 PCI: 00:1c.7: enabled 0
817 09:48:23.707080 PCI: 00:1d.0: enabled 1
818 09:48:23.707168 PCI: 00:1d.1: enabled 0
819 09:48:23.710538 PCI: 00:1d.2: enabled 0
820 09:48:23.713575 PCI: 00:1d.3: enabled 0
821 09:48:23.717131 PCI: 00:1d.4: enabled 0
822 09:48:23.720616 PCI: 00:1d.5: enabled 1
823 09:48:23.723745 PCI: 00:00.0: enabled 1
824 09:48:23.723834 PCI: 00:1e.0: enabled 1
825 09:48:23.726574 PCI: 00:1e.1: enabled 0
826 09:48:23.730199 PCI: 00:1e.2: enabled 1
827 09:48:23.733579 SPI: 00: enabled 1
828 09:48:23.733668 PCI: 00:1e.3: enabled 1
829 09:48:23.736365 SPI: 01: enabled 1
830 09:48:23.739840 PCI: 00:1f.0: enabled 1
831 09:48:23.743365 PNP: 0c09.0: enabled 1
832 09:48:23.746658 PCI: 00:1f.1: enabled 1
833 09:48:23.746750 PCI: 00:1f.2: enabled 1
834 09:48:23.749490 PCI: 00:1f.3: enabled 1
835 09:48:23.753049 PCI: 00:1f.4: enabled 1
836 09:48:23.756431 PCI: 00:1f.5: enabled 1
837 09:48:23.759313 PCI: 00:1f.6: enabled 0
838 09:48:23.759399 Root Device scanning...
839 09:48:23.762721 scan_static_bus for Root Device
840 09:48:23.766120 CPU_CLUSTER: 0 enabled
841 09:48:23.769179 DOMAIN: 0000 enabled
842 09:48:23.772700 DOMAIN: 0000 scanning...
843 09:48:23.775734 PCI: pci_scan_bus for bus 00
844 09:48:23.775830 PCI: 00:00.0 [8086/0000] ops
845 09:48:23.779145 PCI: 00:00.0 [8086/9b61] enabled
846 09:48:23.782157 PCI: 00:02.0 [8086/0000] bus ops
847 09:48:23.785762 PCI: 00:02.0 [8086/9b41] enabled
848 09:48:23.792049 PCI: 00:04.0 [8086/1903] disabled
849 09:48:23.795083 PCI: 00:08.0 [8086/1911] enabled
850 09:48:23.798525 PCI: 00:12.0 [8086/02f9] enabled
851 09:48:23.801957 PCI: 00:14.0 [8086/0000] bus ops
852 09:48:23.804957 PCI: 00:14.0 [8086/02ed] enabled
853 09:48:23.808462 PCI: 00:14.2 [8086/02ef] enabled
854 09:48:23.811423 PCI: 00:14.3 [8086/02f0] enabled
855 09:48:23.814917 PCI: 00:15.0 [8086/0000] bus ops
856 09:48:23.818386 PCI: 00:15.0 [8086/02e8] enabled
857 09:48:23.821241 PCI: 00:15.1 [8086/0000] bus ops
858 09:48:23.824836 PCI: 00:15.1 [8086/02e9] enabled
859 09:48:23.827886 PCI: 00:16.0 [8086/0000] ops
860 09:48:23.831341 PCI: 00:16.0 [8086/02e0] enabled
861 09:48:23.834268 PCI: 00:17.0 [8086/0000] ops
862 09:48:23.837670 PCI: 00:17.0 [8086/02d3] enabled
863 09:48:23.840992 PCI: 00:19.0 [8086/0000] bus ops
864 09:48:23.844366 PCI: 00:19.0 [8086/02c5] enabled
865 09:48:23.847589 PCI: 00:1d.0 [8086/0000] bus ops
866 09:48:23.850506 PCI: 00:1d.0 [8086/02b0] enabled
867 09:48:23.853934 PCI: Static device PCI: 00:1d.5 not found, disabling it.
868 09:48:23.857291 PCI: 00:1e.0 [8086/0000] ops
869 09:48:23.860691 PCI: 00:1e.0 [8086/02a8] enabled
870 09:48:23.864115 PCI: 00:1e.2 [8086/0000] bus ops
871 09:48:23.867444 PCI: 00:1e.2 [8086/02aa] enabled
872 09:48:23.870496 PCI: 00:1e.3 [8086/0000] bus ops
873 09:48:23.873563 PCI: 00:1e.3 [8086/02ab] enabled
874 09:48:23.877019 PCI: 00:1f.0 [8086/0000] bus ops
875 09:48:23.880500 PCI: 00:1f.0 [8086/0284] enabled
876 09:48:23.887050 PCI: Static device PCI: 00:1f.1 not found, disabling it.
877 09:48:23.893542 PCI: Static device PCI: 00:1f.2 not found, disabling it.
878 09:48:23.896429 PCI: 00:1f.3 [8086/0000] bus ops
879 09:48:23.899995 PCI: 00:1f.3 [8086/02c8] enabled
880 09:48:23.903039 PCI: 00:1f.4 [8086/0000] bus ops
881 09:48:23.906848 PCI: 00:1f.4 [8086/02a3] enabled
882 09:48:23.909747 PCI: 00:1f.5 [8086/0000] bus ops
883 09:48:23.913142 PCI: 00:1f.5 [8086/02a4] enabled
884 09:48:23.916102 PCI: Leftover static devices:
885 09:48:23.916200 PCI: 00:05.0
886 09:48:23.919656 PCI: 00:12.5
887 09:48:23.919737 PCI: 00:12.6
888 09:48:23.919805 PCI: 00:14.1
889 09:48:23.922576
890 09:48:23.922672 PCI: 00:14.5
891 09:48:23.922740 PCI: 00:15.2
892 09:48:23.926219 PCI: 00:15.3
893 09:48:23.926300 PCI: 00:16.1
894 09:48:23.929179 PCI: 00:16.2
895 09:48:23.929263 PCI: 00:16.3
896 09:48:23.929341 PCI: 00:16.4
897 09:48:23.932852 PCI: 00:16.5
898 09:48:23.932938 PCI: 00:19.1
899 09:48:23.935744 PCI: 00:19.2
900 09:48:23.935833 PCI: 00:1a.0
901 09:48:23.935904 PCI: 00:1c.0
902 09:48:23.939119 PCI: 00:1c.1
903 09:48:23.939210 PCI: 00:1c.2
904 09:48:23.942740 PCI: 00:1c.3
905 09:48:23.942827 PCI: 00:1c.4
906 09:48:23.945638 PCI: 00:1c.5
907 09:48:23.945725 PCI: 00:1c.6
908 09:48:23.945792 PCI: 00:1c.7
909 09:48:23.949130 PCI: 00:1d.1
910 09:48:23.949222 PCI: 00:1d.2
911 09:48:23.952324 PCI: 00:1d.3
912 09:48:23.952410 PCI: 00:1d.4
913 09:48:23.952478 PCI: 00:1d.5
914 09:48:23.955847
915 09:48:23.955942 PCI: 00:1e.1
916 09:48:23.956024 PCI: 00:1f.1
917 09:48:23.958702 PCI: 00:1f.2
918 09:48:23.958790 PCI: 00:1f.6
919 09:48:23.962074 PCI: Check your devicetree.cb.
920 09:48:23.965522 PCI: 00:02.0 scanning...
921 09:48:23.968482 scan_generic_bus for PCI: 00:02.0
922 09:48:23.971928 scan_generic_bus for PCI: 00:02.0 done
923 09:48:23.978373 scan_bus: scanning of bus PCI: 00:02.0 took 10172 usecs
924 09:48:23.981398 PCI: 00:14.0 scanning...
925 09:48:23.984746 scan_static_bus for PCI: 00:14.0
926 09:48:23.984836 USB0 port 0 enabled
927 09:48:23.988415 USB0 port 0 scanning...
928 09:48:23.991297 scan_static_bus for USB0 port 0
929 09:48:23.994838 USB2 port 0 enabled
930 09:48:23.994924 USB2 port 1 enabled
931 09:48:23.998353
932 09:48:23.998447 USB2 port 2 disabled
933 09:48:24.001128 USB2 port 3 disabled
934 09:48:24.001216 USB2 port 5 disabled
935 09:48:24.004555 USB2 port 6 enabled
936 09:48:24.007542 USB2 port 9 enabled
937 09:48:24.007628 USB3 port 0 enabled
938 09:48:24.010869 USB3 port 1 enabled
939 09:48:24.014331 USB3 port 2 enabled
940 09:48:24.014420 USB3 port 3 enabled
941 09:48:24.017384 USB3 port 4 disabled
942 09:48:24.020917 USB2 port 0 scanning...
943 09:48:24.024481 scan_static_bus for USB2 port 0
944 09:48:24.027415 scan_static_bus for USB2 port 0 done
945 09:48:24.030499 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
946 09:48:24.034087 USB2 port 1 scanning...
947 09:48:24.037502 scan_static_bus for USB2 port 1
948 09:48:24.040757 scan_static_bus for USB2 port 1 done
949 09:48:24.047037 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
950 09:48:24.050369 USB2 port 6 scanning...
951 09:48:24.053386 scan_static_bus for USB2 port 6
952 09:48:24.056592 scan_static_bus for USB2 port 6 done
953 09:48:24.063470 scan_bus: scanning of bus USB2 port 6 took 9693 usecs
954 09:48:24.063561 USB2 port 9 scanning...
955 09:48:24.066322 scan_static_bus for USB2 port 9
956 09:48:24.073331 scan_static_bus for USB2 port 9 done
957 09:48:24.076188 scan_bus: scanning of bus USB2 port 9 took 9684 usecs
958 09:48:24.079767 USB3 port 0 scanning...
959 09:48:24.082683 scan_static_bus for USB3 port 0
960 09:48:24.086145 scan_static_bus for USB3 port 0 done
961 09:48:24.092723 scan_bus: scanning of bus USB3 port 0 took 9693 usecs
962 09:48:24.095716 USB3 port 1 scanning...
963 09:48:24.099366 scan_static_bus for USB3 port 1
964 09:48:24.102337 scan_static_bus for USB3 port 1 done
965 09:48:24.105849 scan_bus: scanning of bus USB3 port 1 took 9700 usecs
966 09:48:24.109198 USB3 port 2 scanning...
967 09:48:24.112185 scan_static_bus for USB3 port 2
968 09:48:24.115567 scan_static_bus for USB3 port 2 done
969 09:48:24.121994 scan_bus: scanning of bus USB3 port 2 took 9685 usecs
970 09:48:24.125565 USB3 port 3 scanning...
971 09:48:24.128547 scan_static_bus for USB3 port 3
972 09:48:24.132170 scan_static_bus for USB3 port 3 done
973 09:48:24.138767 scan_bus: scanning of bus USB3 port 3 took 9691 usecs
974 09:48:24.141527 scan_static_bus for USB0 port 0 done
975 09:48:24.145096 scan_bus: scanning of bus USB0 port 0 took 155214 usecs
976 09:48:24.151541 scan_static_bus for PCI: 00:14.0 done
977 09:48:24.154910 scan_bus: scanning of bus PCI: 00:14.0 took 172834 usecs
978 09:48:24.157688 PCI: 00:15.0 scanning...
979 09:48:24.161131 scan_generic_bus for PCI: 00:15.0
980 09:48:24.164596 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
981 09:48:24.170967 scan_generic_bus for PCI: 00:15.0 done
982 09:48:24.174419 scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs
983 09:48:24.177443 PCI: 00:15.1 scanning...
984 09:48:24.181020 scan_generic_bus for PCI: 00:15.1
985 09:48:24.187505 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
986 09:48:24.190416 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
987 09:48:24.193876 scan_generic_bus for PCI: 00:15.1 done
988 09:48:24.200479 scan_bus: scanning of bus PCI: 00:15.1 took 18593 usecs
989 09:48:24.200570 PCI: 00:19.0 scanning...
990 09:48:24.203353
991 09:48:24.206936 scan_generic_bus for PCI: 00:19.0
992 09:48:24.210158 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
993 09:48:24.213680 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
994 09:48:24.216478 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
995 09:48:24.222962 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
996 09:48:24.226608 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
997 09:48:24.229497 scan_generic_bus for PCI: 00:19.0 done
998 09:48:24.235999 scan_bus: scanning of bus PCI: 00:19.0 took 30701 usecs
999 09:48:24.239542 PCI: 00:1d.0 scanning...
1000 09:48:24.242705 do_pci_scan_bridge for PCI: 00:1d.0
1001 09:48:24.245915 PCI: pci_scan_bus for bus 01
1002 09:48:24.249295 PCI: 01:00.0 [1c5c/1327] enabled
1003 09:48:24.252237 Enabling Common Clock Configuration
1004 09:48:24.255664 L1 Sub-State supported from root port 29
1005 09:48:24.259128 L1 Sub-State Support = 0xf
1006 09:48:24.262482 CommonModeRestoreTime = 0x28
1007 09:48:24.265355 Power On Value = 0x16, Power On Scale = 0x0
1008 09:48:24.268773 ASPM: Enabled L1
1009 09:48:24.272106 scan_bus: scanning of bus PCI: 00:1d.0 took 32770 usecs
1010 09:48:24.275678 PCI: 00:1e.2 scanning...
1011 09:48:24.278453 scan_generic_bus for PCI: 00:1e.2
1012 09:48:24.284994 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1013 09:48:24.288598 scan_generic_bus for PCI: 00:1e.2 done
1014 09:48:24.291792 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
1015 09:48:24.295077 PCI: 00:1e.3 scanning...
1016 09:48:24.298503 scan_generic_bus for PCI: 00:1e.3
1017 09:48:24.304656 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1018 09:48:24.308382 scan_generic_bus for PCI: 00:1e.3 done
1019 09:48:24.311304 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1020 09:48:24.314801 PCI: 00:1f.0 scanning...
1021 09:48:24.317669 scan_static_bus for PCI: 00:1f.0
1022 09:48:24.321118 PNP: 0c09.0 enabled
1023 09:48:24.324625 scan_static_bus for PCI: 00:1f.0 done
1024 09:48:24.331041 scan_bus: scanning of bus PCI: 00:1f.0 took 12037 usecs
1025 09:48:24.334167 PCI: 00:1f.3 scanning...
1026 09:48:24.337646 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
1027 09:48:24.340597 PCI: 00:1f.4 scanning...
1028 09:48:24.344093 scan_generic_bus for PCI: 00:1f.4
1029 09:48:24.347502 scan_generic_bus for PCI: 00:1f.4 done
1030 09:48:24.353819 scan_bus: scanning of bus PCI: 00:1f.4 took 10179 usecs
1031 09:48:24.356991 PCI: 00:1f.5 scanning...
1032 09:48:24.360825 scan_generic_bus for PCI: 00:1f.5
1033 09:48:24.363509 scan_generic_bus for PCI: 00:1f.5 done
1034 09:48:24.370316 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1035 09:48:24.376618 scan_bus: scanning of bus DOMAIN: 0000 took 604621 usecs
1036 09:48:24.380216 scan_static_bus for Root Device done
1037 09:48:24.383064 scan_bus: scanning of bus Root Device took 624482 usecs
1038 09:48:24.386550
1039 09:48:24.386649 done
1040 09:48:24.389499 Chrome EC: UHEPI supported
1041 09:48:24.396463 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1042 09:48:24.399502 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1043 09:48:24.405900 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1044 09:48:24.412684 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1045 09:48:24.416170 SPI flash protection: WPSW=0 SRP0=0
1046 09:48:24.422637 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1047 09:48:24.426020 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1048 09:48:24.429515 found VGA at PCI: 00:02.0
1049 09:48:24.432331 Setting up VGA for PCI: 00:02.0
1050 09:48:24.438854 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1051 09:48:24.442521 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1052 09:48:24.445414 Allocating resources...
1053 09:48:24.448828 Reading resources...
1054 09:48:24.452477 Root Device read_resources bus 0 link: 0
1055 09:48:24.455364 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1056 09:48:24.462241 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1057 09:48:24.465126 DOMAIN: 0000 read_resources bus 0 link: 0
1058 09:48:24.473105 PCI: 00:14.0 read_resources bus 0 link: 0
1059 09:48:24.476518 USB0 port 0 read_resources bus 0 link: 0
1060 09:48:24.484639 USB0 port 0 read_resources bus 0 link: 0 done
1061 09:48:24.487546 PCI: 00:14.0 read_resources bus 0 link: 0 done
1062 09:48:24.495205 PCI: 00:15.0 read_resources bus 1 link: 0
1063 09:48:24.498690 PCI: 00:15.0 read_resources bus 1 link: 0 done
1064 09:48:24.505105 PCI: 00:15.1 read_resources bus 2 link: 0
1065 09:48:24.508063 PCI: 00:15.1 read_resources bus 2 link: 0 done
1066 09:48:24.515661 PCI: 00:19.0 read_resources bus 3 link: 0
1067 09:48:24.522727 PCI: 00:19.0 read_resources bus 3 link: 0 done
1068 09:48:24.525505 PCI: 00:1d.0 read_resources bus 1 link: 0
1069 09:48:24.532034 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1070 09:48:24.535510 PCI: 00:1e.2 read_resources bus 4 link: 0
1071 09:48:24.542270 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1072 09:48:24.545552 PCI: 00:1e.3 read_resources bus 5 link: 0
1073 09:48:24.551772 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1074 09:48:24.555357 PCI: 00:1f.0 read_resources bus 0 link: 0
1075 09:48:24.561546 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1076 09:48:24.568339 DOMAIN: 0000 read_resources bus 0 link: 0 done
1077 09:48:24.571578 Root Device read_resources bus 0 link: 0 done
1078 09:48:24.574573 Done reading resources.
1079 09:48:24.581520 Show resources in subtree (Root Device)...After reading.
1080 09:48:24.584317 Root Device child on link 0 CPU_CLUSTER: 0
1081 09:48:24.587724 CPU_CLUSTER: 0 child on link 0 APIC: 00
1082 09:48:24.591176 APIC: 00
1083 09:48:24.591269 APIC: 02
1084 09:48:24.594150 APIC: 04
1085 09:48:24.594247 APIC: 01
1086 09:48:24.594318 APIC: 03
1087 09:48:24.597650 APIC: 05
1088 09:48:24.597738 APIC: 07
1089 09:48:24.597808 APIC: 06
1090 09:48:24.600712
1091 09:48:24.604142 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1092 09:48:24.653703 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1093 09:48:24.653828 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1094 09:48:24.653904 PCI: 00:00.0
1095 09:48:24.654178 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1096 09:48:24.654437 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1097 09:48:24.654510 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1098 09:48:24.703478 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1099 09:48:24.703614 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1100 09:48:24.703876 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1101 09:48:24.703952 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1102 09:48:24.704216 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1103 09:48:24.753393 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1104 09:48:24.753718 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1105 09:48:24.753984 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1106 09:48:24.754065 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1107 09:48:24.754327
1108 09:48:24.754402 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1109 09:48:24.763876 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1110 09:48:24.766824 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1111 09:48:24.772994 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1112 09:48:24.776358 PCI: 00:02.0
1113 09:48:24.786134 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1114 09:48:24.796293 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1115 09:48:24.805523 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1116 09:48:24.805620 PCI: 00:04.0
1117 09:48:24.809102 PCI: 00:08.0
1118 09:48:24.819039 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 09:48:24.819138 PCI: 00:12.0
1120 09:48:24.828429 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1121 09:48:24.834988 PCI: 00:14.0 child on link 0 USB0 port 0
1122 09:48:24.845058 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1123 09:48:24.848023 USB0 port 0 child on link 0 USB2 port 0
1124 09:48:24.851478 USB2 port 0
1125 09:48:24.851567 USB2 port 1
1126 09:48:24.854437 USB2 port 2
1127 09:48:24.854526 USB2 port 3
1128 09:48:24.857797 USB2 port 5
1129 09:48:24.857883 USB2 port 6
1130 09:48:24.861457 USB2 port 9
1131 09:48:24.861535 USB3 port 0
1132 09:48:24.864277 USB3 port 1
1133 09:48:24.864380 USB3 port 2
1134 09:48:24.867640 USB3 port 3
1135 09:48:24.867741 USB3 port 4
1136 09:48:24.871055 PCI: 00:14.2
1137 09:48:24.880610 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1138 09:48:24.890383 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1139 09:48:24.893966 PCI: 00:14.3
1140 09:48:24.903383 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1141 09:48:24.906883 PCI: 00:15.0 child on link 0 I2C: 01:15
1142 09:48:24.916739 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1143 09:48:24.916833 I2C: 01:15
1144 09:48:24.923098 PCI: 00:15.1 child on link 0 I2C: 02:5d
1145 09:48:24.932865 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1146 09:48:24.932962 I2C: 02:5d
1147 09:48:24.936305 GENERIC: 0.0
1148 09:48:24.936393 PCI: 00:16.0
1149 09:48:24.946321 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1150 09:48:24.949256 PCI: 00:17.0
1151 09:48:24.959052 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1152 09:48:24.965922 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1153 09:48:24.975480 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1154 09:48:24.982302 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1155 09:48:24.991434 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1156 09:48:25.001644 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1157 09:48:25.004982 PCI: 00:19.0 child on link 0 I2C: 03:1a
1158 09:48:25.014361 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 09:48:25.017953 I2C: 03:1a
1160 09:48:25.018112 I2C: 03:38
1161 09:48:25.018218 I2C: 03:39
1162 09:48:25.021404
1163 09:48:25.021523 I2C: 03:3a
1164 09:48:25.021622 I2C: 03:3b
1165 09:48:25.027713 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1166 09:48:25.034030 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1167 09:48:25.043938 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1168 09:48:25.047516
1169 09:48:25.053561 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1170 09:48:25.056990 PCI: 01:00.0
1171 09:48:25.066995 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 09:48:25.067115 PCI: 00:1e.0
1173 09:48:25.079914 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1174 09:48:25.089340 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1175 09:48:25.092662 PCI: 00:1e.2 child on link 0 SPI: 00
1176 09:48:25.102394 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 09:48:25.102530 SPI: 00
1178 09:48:25.109551 PCI: 00:1e.3 child on link 0 SPI: 01
1179 09:48:25.118908 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 09:48:25.119032 SPI: 01
1181 09:48:25.122325 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1182 09:48:25.132162 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1183 09:48:25.142037 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1184 09:48:25.142176 PNP: 0c09.0
1185 09:48:25.151493 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1186 09:48:25.155004 PCI: 00:1f.3
1187 09:48:25.164361 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 09:48:25.174110 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1189 09:48:25.174232 PCI: 00:1f.4
1190 09:48:25.184230 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1191 09:48:25.194004 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1192 09:48:25.194141 PCI: 00:1f.5
1193 09:48:25.197415
1194 09:48:25.203852 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1195 09:48:25.210319 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1196 09:48:25.216817 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1197 09:48:25.223229 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1198 09:48:25.226882 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1199 09:48:25.229701 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1200 09:48:25.236493 PCI: 00:17.0 18 * [0x60 - 0x67] io
1201 09:48:25.239385 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1202 09:48:25.245868 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1203 09:48:25.252806 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1204 09:48:25.258730 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1205 09:48:25.268659 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1206 09:48:25.275483 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1207 09:48:25.278443 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1208 09:48:25.288579 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1209 09:48:25.291530 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1210 09:48:25.295005 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1211 09:48:25.301461 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1212 09:48:25.304440 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1213 09:48:25.311021 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1214 09:48:25.314449 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1215 09:48:25.320962 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1216 09:48:25.324559 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1217 09:48:25.330455 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1218 09:48:25.333881 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1219 09:48:25.340429 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1220 09:48:25.343733 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1221 09:48:25.350177 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1222 09:48:25.353160 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1223 09:48:25.359745 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1224 09:48:25.363321 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1225 09:48:25.369546 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1226 09:48:25.372922 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1227 09:48:25.379469 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1228 09:48:25.382832 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1229 09:48:25.389548 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1230 09:48:25.392489 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1231 09:48:25.398929 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1232 09:48:25.405420 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1233 09:48:25.408792 avoid_fixed_resources: DOMAIN: 0000
1234 09:48:25.415237 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1235 09:48:25.421592 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1236 09:48:25.428215 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1237 09:48:25.438103 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1238 09:48:25.444516 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1239 09:48:25.453922 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1240 09:48:25.460727 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1241 09:48:25.467174 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1242 09:48:25.476886 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1243 09:48:25.483870 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1244 09:48:25.490003 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1245 09:48:25.496852 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1246 09:48:25.499632 Setting resources...
1247 09:48:25.506600 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1248 09:48:25.509557 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1249 09:48:25.512991 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1250 09:48:25.519620 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1251 09:48:25.522520 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1252 09:48:25.528961 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1253 09:48:25.535644 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1254 09:48:25.541883 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1255 09:48:25.548453 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1256 09:48:25.555008 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1257 09:48:25.558569 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1258 09:48:25.565104 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1259 09:48:25.568047 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1260 09:48:25.574965 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1261 09:48:25.577919 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1262 09:48:25.581463 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1263 09:48:25.584782
1264 09:48:25.587759 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1265 09:48:25.591092 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1266 09:48:25.597413 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1267 09:48:25.600910 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1268 09:48:25.607683 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1269 09:48:25.610495 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1270 09:48:25.617438 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1271 09:48:25.620476 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1272 09:48:25.626733 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1273 09:48:25.630430 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1274 09:48:25.636948 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1275 09:48:25.640318 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1276 09:48:25.646386 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1277 09:48:25.649859 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1278 09:48:25.656144 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1279 09:48:25.659695 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1280 09:48:25.669282 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1281 09:48:25.675987 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1282 09:48:25.682402 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1283 09:48:25.688748 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1284 09:48:25.695414 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1285 09:48:25.702381 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1286 09:48:25.705089 Root Device assign_resources, bus 0 link: 0
1287 09:48:25.712142 DOMAIN: 0000 assign_resources, bus 0 link: 0
1288 09:48:25.718707 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1289 09:48:25.728763 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1290 09:48:25.735318 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1291 09:48:25.744432 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1292 09:48:25.750899 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1293 09:48:25.761512 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1294 09:48:25.764497 PCI: 00:14.0 assign_resources, bus 0 link: 0
1295 09:48:25.771148 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 09:48:25.778057 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1297 09:48:25.787244 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1298 09:48:25.793899 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1299 09:48:25.803671 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1300 09:48:25.807250 PCI: 00:15.0 assign_resources, bus 1 link: 0
1301 09:48:25.813762 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 09:48:25.820151 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1303 09:48:25.823715 PCI: 00:15.1 assign_resources, bus 2 link: 0
1304 09:48:25.826572
1305 09:48:25.829970 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 09:48:25.836566 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 09:48:25.839520
1308 09:48:25.846555 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 09:48:25.852838 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 09:48:25.862368 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 09:48:25.868939 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 09:48:25.875986 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 09:48:25.885457 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 09:48:25.892132 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 09:48:25.898540 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 09:48:25.901520 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 09:48:25.911547 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 09:48:25.921362 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 09:48:25.927719 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 09:48:25.931333 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 09:48:25.934260
1322 09:48:25.940843 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1323 09:48:25.946987 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1324 09:48:25.953992 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1325 09:48:25.963359 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1326 09:48:25.967016 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 09:48:25.969923 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1328 09:48:25.973521
1329 09:48:25.979995 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1330 09:48:25.983002 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1331 09:48:25.989883 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1332 09:48:25.992821 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1333 09:48:25.999494 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1334 09:48:26.002741 LPC: Trying to open IO window from 800 size 1ff
1335 09:48:26.012363 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1336 09:48:26.019448 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1337 09:48:26.028869 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1338 09:48:26.035573 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1339 09:48:26.041900 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 09:48:26.045562 Root Device assign_resources, bus 0 link: 0
1341 09:48:26.048211 Done setting resources.
1342 09:48:26.055299 Show resources in subtree (Root Device)...After assigning values.
1343 09:48:26.058156 Root Device child on link 0 CPU_CLUSTER: 0
1344 09:48:26.064699 CPU_CLUSTER: 0 child on link 0 APIC: 00
1345 09:48:26.064805 APIC: 00
1346 09:48:26.064904 APIC: 02
1347 09:48:26.068155 APIC: 04
1348 09:48:26.068244 APIC: 01
1349 09:48:26.071118 APIC: 03
1350 09:48:26.071205 APIC: 05
1351 09:48:26.071272 APIC: 07
1352 09:48:26.074672 APIC: 06
1353 09:48:26.077686 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1354 09:48:26.087452 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1355 09:48:26.097226 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1356 09:48:26.100671 PCI: 00:00.0
1357 09:48:26.110450 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1358 09:48:26.120505 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1359 09:48:26.130138 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1360 09:48:26.136238 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1361 09:48:26.146290 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1362 09:48:26.156180 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1363 09:48:26.165556 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1364 09:48:26.175764 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1365 09:48:26.185865 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1366 09:48:26.191869 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1367 09:48:26.201862 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1368 09:48:26.211522 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1369 09:48:26.221378 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1370 09:48:26.231415 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1371 09:48:26.241286 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1372 09:48:26.250794 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1373 09:48:26.250883 PCI: 00:02.0
1374 09:48:26.264290 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1375 09:48:26.273784 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1376 09:48:26.283392 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1377 09:48:26.283482 PCI: 00:04.0
1378 09:48:26.286855 PCI: 00:08.0
1379 09:48:26.296723 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1380 09:48:26.296846 PCI: 00:12.0
1381 09:48:26.306310 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1382 09:48:26.313182 PCI: 00:14.0 child on link 0 USB0 port 0
1383 09:48:26.322442 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1384 09:48:26.325903 USB0 port 0 child on link 0 USB2 port 0
1385 09:48:26.329449 USB2 port 0
1386 09:48:26.329540 USB2 port 1
1387 09:48:26.332324 USB2 port 2
1388 09:48:26.332410 USB2 port 3
1389 09:48:26.335708 USB2 port 5
1390 09:48:26.338717 USB2 port 6
1391 09:48:26.338798 USB2 port 9
1392 09:48:26.342165 USB3 port 0
1393 09:48:26.342245 USB3 port 1
1394 09:48:26.345636 USB3 port 2
1395 09:48:26.345714 USB3 port 3
1396 09:48:26.348625 USB3 port 4
1397 09:48:26.348720 PCI: 00:14.2
1398 09:48:26.358476 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1399 09:48:26.371627 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1400 09:48:26.371716 PCI: 00:14.3
1401 09:48:26.380987 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1402 09:48:26.388090 PCI: 00:15.0 child on link 0 I2C: 01:15
1403 09:48:26.397850 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1404 09:48:26.397945 I2C: 01:15
1405 09:48:26.404054 PCI: 00:15.1 child on link 0 I2C: 02:5d
1406 09:48:26.413668 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1407 09:48:26.413762 I2C: 02:5d
1408 09:48:26.417146 GENERIC: 0.0
1409 09:48:26.417235 PCI: 00:16.0
1410 09:48:26.427107 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1411 09:48:26.429974 PCI: 00:17.0
1412 09:48:26.440013 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1413 09:48:26.449973 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1414 09:48:26.459716 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1415 09:48:26.469356 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1416 09:48:26.479111 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1417 09:48:26.488932 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1418 09:48:26.491856 PCI: 00:19.0 child on link 0 I2C: 03:1a
1419 09:48:26.501612 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1420 09:48:26.505015 I2C: 03:1a
1421 09:48:26.505142 I2C: 03:38
1422 09:48:26.508476 I2C: 03:39
1423 09:48:26.508601 I2C: 03:3a
1424 09:48:26.511841 I2C: 03:3b
1425 09:48:26.514770 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1426 09:48:26.524470 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1427 09:48:26.534371 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1428 09:48:26.544316 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1429 09:48:26.547779 PCI: 01:00.0
1430 09:48:26.557337 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1431 09:48:26.557432 PCI: 00:1e.0
1432 09:48:26.570554 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1433 09:48:26.580039 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1434 09:48:26.583690 PCI: 00:1e.2 child on link 0 SPI: 00
1435 09:48:26.593150 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1436 09:48:26.596645 SPI: 00
1437 09:48:26.599582 PCI: 00:1e.3 child on link 0 SPI: 01
1438 09:48:26.609286 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1439 09:48:26.609377 SPI: 01
1440 09:48:26.616176 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1441 09:48:26.622541 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1442 09:48:26.632344 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1443 09:48:26.635374 PNP: 0c09.0
1444 09:48:26.641848 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1445 09:48:26.645477 PCI: 00:1f.3
1446 09:48:26.655152 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1447 09:48:26.664967 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1448 09:48:26.667891 PCI: 00:1f.4
1449 09:48:26.674415 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1450 09:48:26.677983
1451 09:48:26.687378 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1452 09:48:26.687504 PCI: 00:1f.5
1453 09:48:26.697404 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1454 09:48:26.700682 Done allocating resources.
1455 09:48:26.707109 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1456 09:48:26.710410 Enabling resources...
1457 09:48:26.713823 PCI: 00:00.0 subsystem <- 8086/9b61
1458 09:48:26.716723 PCI: 00:00.0 cmd <- 06
1459 09:48:26.720134 PCI: 00:02.0 subsystem <- 8086/9b41
1460 09:48:26.723461 PCI: 00:02.0 cmd <- 03
1461 09:48:26.723549 PCI: 00:08.0 cmd <- 06
1462 09:48:26.726841
1463 09:48:26.729868 PCI: 00:12.0 subsystem <- 8086/02f9
1464 09:48:26.729951 PCI: 00:12.0 cmd <- 02
1465 09:48:26.736389 PCI: 00:14.0 subsystem <- 8086/02ed
1466 09:48:26.736477 PCI: 00:14.0 cmd <- 02
1467 09:48:26.739736 PCI: 00:14.2 cmd <- 02
1468 09:48:26.743341 PCI: 00:14.3 subsystem <- 8086/02f0
1469 09:48:26.746280 PCI: 00:14.3 cmd <- 02
1470 09:48:26.749687 PCI: 00:15.0 subsystem <- 8086/02e8
1471 09:48:26.753089 PCI: 00:15.0 cmd <- 02
1472 09:48:26.755836 PCI: 00:15.1 subsystem <- 8086/02e9
1473 09:48:26.759249 PCI: 00:15.1 cmd <- 02
1474 09:48:26.762639 PCI: 00:16.0 subsystem <- 8086/02e0
1475 09:48:26.765551 PCI: 00:16.0 cmd <- 02
1476 09:48:26.769077 PCI: 00:17.0 subsystem <- 8086/02d3
1477 09:48:26.772476 PCI: 00:17.0 cmd <- 03
1478 09:48:26.775501 PCI: 00:19.0 subsystem <- 8086/02c5
1479 09:48:26.779143 PCI: 00:19.0 cmd <- 02
1480 09:48:26.782204 PCI: 00:1d.0 bridge ctrl <- 0013
1481 09:48:26.785728 PCI: 00:1d.0 subsystem <- 8086/02b0
1482 09:48:26.788630 PCI: 00:1d.0 cmd <- 06
1483 09:48:26.791774 PCI: 00:1e.0 subsystem <- 8086/02a8
1484 09:48:26.795071 PCI: 00:1e.0 cmd <- 06
1485 09:48:26.798498 PCI: 00:1e.2 subsystem <- 8086/02aa
1486 09:48:26.798584 PCI: 00:1e.2 cmd <- 06
1487 09:48:26.805011 PCI: 00:1e.3 subsystem <- 8086/02ab
1488 09:48:26.805139 PCI: 00:1e.3 cmd <- 02
1489 09:48:26.808553 PCI: 00:1f.0 subsystem <- 8086/0284
1490 09:48:26.811704
1491 09:48:26.811789 PCI: 00:1f.0 cmd <- 407
1492 09:48:26.815249 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 09:48:26.817990 PCI: 00:1f.3 cmd <- 02
1494 09:48:26.821567 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 09:48:26.824650 PCI: 00:1f.4 cmd <- 03
1496 09:48:26.828213 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 09:48:26.831008 PCI: 00:1f.5 cmd <- 406
1498 09:48:26.840464 PCI: 01:00.0 cmd <- 02
1499 09:48:26.845287 done.
1500 09:48:26.854762 ME: Version: 14.0.39.1367
1501 09:48:26.861619 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1502 09:48:26.865072 Initializing devices...
1503 09:48:26.865173 Root Device init ...
1504 09:48:26.871361 Chrome EC: Set SMI mask to 0x0000000000000000
1505 09:48:26.874376 Chrome EC: clear events_b mask to 0x0000000000000000
1506 09:48:26.877840
1507 09:48:26.881352 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1508 09:48:26.887253 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1509 09:48:26.893707 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1510 09:48:26.897298 Chrome EC: Set WAKE mask to 0x0000000000000000
1511 09:48:26.903571 Root Device init finished in 35167 usecs
1512 09:48:26.907329 CPU_CLUSTER: 0 init ...
1513 09:48:26.910488 CPU_CLUSTER: 0 init finished in 2448 usecs
1514 09:48:26.915592 PCI: 00:00.0 init ...
1515 09:48:26.919021 CPU TDP: 15 Watts
1516 09:48:26.921825 CPU PL2 = 64 Watts
1517 09:48:26.925381 PCI: 00:00.0 init finished in 7083 usecs
1518 09:48:26.928722 PCI: 00:02.0 init ...
1519 09:48:26.931582 PCI: 00:02.0 init finished in 2255 usecs
1520 09:48:26.935218 PCI: 00:08.0 init ...
1521 09:48:26.938184 PCI: 00:08.0 init finished in 2254 usecs
1522 09:48:26.941651 PCI: 00:12.0 init ...
1523 09:48:26.944682 PCI: 00:12.0 init finished in 2244 usecs
1524 09:48:26.948194 PCI: 00:14.0 init ...
1525 09:48:26.951854 PCI: 00:14.0 init finished in 2253 usecs
1526 09:48:26.954647 PCI: 00:14.2 init ...
1527 09:48:26.958177 PCI: 00:14.2 init finished in 2254 usecs
1528 09:48:26.961248 PCI: 00:14.3 init ...
1529 09:48:26.964508 PCI: 00:14.3 init finished in 2269 usecs
1530 09:48:26.968035 PCI: 00:15.0 init ...
1531 09:48:26.971038 DW I2C bus 0 at 0xd121f000 (400 KHz)
1532 09:48:26.977487 PCI: 00:15.0 init finished in 5978 usecs
1533 09:48:26.977574 PCI: 00:15.1 init ...
1534 09:48:26.983930 DW I2C bus 1 at 0xd1220000 (400 KHz)
1535 09:48:26.987527 PCI: 00:15.1 init finished in 5977 usecs
1536 09:48:26.990696 PCI: 00:16.0 init ...
1537 09:48:26.994138 PCI: 00:16.0 init finished in 2244 usecs
1538 09:48:26.997118 PCI: 00:19.0 init ...
1539 09:48:27.000659 DW I2C bus 4 at 0xd1222000 (400 KHz)
1540 09:48:27.004068 PCI: 00:19.0 init finished in 5977 usecs
1541 09:48:27.007101 PCI: 00:1d.0 init ...
1542 09:48:27.010765 Initializing PCH PCIe bridge.
1543 09:48:27.013506 PCI: 00:1d.0 init finished in 5278 usecs
1544 09:48:27.017272 PCI: 00:1f.0 init ...
1545 09:48:27.020763 IOAPIC: Initializing IOAPIC at 0xfec00000
1546 09:48:27.026877 IOAPIC: Bootstrap Processor Local APIC = 0x00
1547 09:48:27.026968 IOAPIC: ID = 0x02
1548 09:48:27.030398 IOAPIC: Dumping registers
1549 09:48:27.033820 reg 0x0000: 0x02000000
1550 09:48:27.036692 reg 0x0001: 0x00770020
1551 09:48:27.040275 reg 0x0002: 0x00000000
1552 09:48:27.043373 PCI: 00:1f.0 init finished in 23532 usecs
1553 09:48:27.046901 PCI: 00:1f.4 init ...
1554 09:48:27.049792 PCI: 00:1f.4 init finished in 2264 usecs
1555 09:48:27.062028 PCI: 01:00.0 init ...
1556 09:48:27.064982 PCI: 01:00.0 init finished in 2252 usecs
1557 09:48:27.068976 PNP: 0c09.0 init ...
1558 09:48:27.072455 Google Chrome EC uptime: 11.142 seconds
1559 09:48:27.079030 Google Chrome AP resets since EC boot: 0
1560 09:48:27.082331 Google Chrome most recent AP reset causes:
1561 09:48:27.088819 Google Chrome EC reset flags at last EC boot: reset-pin
1562 09:48:27.091807 PNP: 0c09.0 init finished in 20563 usecs
1563 09:48:27.095467 Devices initialized
1564 09:48:27.098411 Show all devs... After init.
1565 09:48:27.098491 Root Device: enabled 1
1566 09:48:27.101762 CPU_CLUSTER: 0: enabled 1
1567 09:48:27.105385 DOMAIN: 0000: enabled 1
1568 09:48:27.108324 APIC: 00: enabled 1
1569 09:48:27.108399 PCI: 00:00.0: enabled 1
1570 09:48:27.111755 PCI: 00:02.0: enabled 1
1571 09:48:27.114772 PCI: 00:04.0: enabled 0
1572 09:48:27.114848 PCI: 00:05.0: enabled 0
1573 09:48:27.117934
1574 09:48:27.118016 PCI: 00:12.0: enabled 1
1575 09:48:27.121641 PCI: 00:12.5: enabled 0
1576 09:48:27.124886 PCI: 00:12.6: enabled 0
1577 09:48:27.124962 PCI: 00:14.0: enabled 1
1578 09:48:27.127756
1579 09:48:27.127832 PCI: 00:14.1: enabled 0
1580 09:48:27.131268 PCI: 00:14.3: enabled 1
1581 09:48:27.134438 PCI: 00:14.5: enabled 0
1582 09:48:27.134523 PCI: 00:15.0: enabled 1
1583 09:48:27.137985 PCI: 00:15.1: enabled 1
1584 09:48:27.140865 PCI: 00:15.2: enabled 0
1585 09:48:27.144455 PCI: 00:15.3: enabled 0
1586 09:48:27.144533 PCI: 00:16.0: enabled 1
1587 09:48:27.147457 PCI: 00:16.1: enabled 0
1588 09:48:27.150379 PCI: 00:16.2: enabled 0
1589 09:48:27.154012 PCI: 00:16.3: enabled 0
1590 09:48:27.154104 PCI: 00:16.4: enabled 0
1591 09:48:27.156860 PCI: 00:16.5: enabled 0
1592 09:48:27.160352 PCI: 00:17.0: enabled 1
1593 09:48:27.163913 PCI: 00:19.0: enabled 1
1594 09:48:27.163997 PCI: 00:19.1: enabled 0
1595 09:48:27.166769 PCI: 00:19.2: enabled 0
1596 09:48:27.170240 PCI: 00:1a.0: enabled 0
1597 09:48:27.173216 PCI: 00:1c.0: enabled 0
1598 09:48:27.173296 PCI: 00:1c.1: enabled 0
1599 09:48:27.176741 PCI: 00:1c.2: enabled 0
1600 09:48:27.180095 PCI: 00:1c.3: enabled 0
1601 09:48:27.183059 PCI: 00:1c.4: enabled 0
1602 09:48:27.183137 PCI: 00:1c.5: enabled 0
1603 09:48:27.186454 PCI: 00:1c.6: enabled 0
1604 09:48:27.190022 PCI: 00:1c.7: enabled 0
1605 09:48:27.192982 PCI: 00:1d.0: enabled 1
1606 09:48:27.193066 PCI: 00:1d.1: enabled 0
1607 09:48:27.196038 PCI: 00:1d.2: enabled 0
1608 09:48:27.199565 PCI: 00:1d.3: enabled 0
1609 09:48:27.202444 PCI: 00:1d.4: enabled 0
1610 09:48:27.202528 PCI: 00:1d.5: enabled 0
1611 09:48:27.205801 PCI: 00:1e.0: enabled 1
1612 09:48:27.209329 PCI: 00:1e.1: enabled 0
1613 09:48:27.212237 PCI: 00:1e.2: enabled 1
1614 09:48:27.212315 PCI: 00:1e.3: enabled 1
1615 09:48:27.215918 PCI: 00:1f.0: enabled 1
1616 09:48:27.219064 PCI: 00:1f.1: enabled 0
1617 09:48:27.222018 PCI: 00:1f.2: enabled 0
1618 09:48:27.222120 PCI: 00:1f.3: enabled 1
1619 09:48:27.225364 PCI: 00:1f.4: enabled 1
1620 09:48:27.228657 PCI: 00:1f.5: enabled 1
1621 09:48:27.232127 PCI: 00:1f.6: enabled 0
1622 09:48:27.232207 USB0 port 0: enabled 1
1623 09:48:27.235550 I2C: 01:15: enabled 1
1624 09:48:27.238421 I2C: 02:5d: enabled 1
1625 09:48:27.238508 GENERIC: 0.0: enabled 1
1626 09:48:27.241955 I2C: 03:1a: enabled 1
1627 09:48:27.244991 I2C: 03:38: enabled 1
1628 09:48:27.248416 I2C: 03:39: enabled 1
1629 09:48:27.248503 I2C: 03:3a: enabled 1
1630 09:48:27.251400 I2C: 03:3b: enabled 1
1631 09:48:27.255063 PCI: 00:00.0: enabled 1
1632 09:48:27.255144 SPI: 00: enabled 1
1633 09:48:27.257943 SPI: 01: enabled 1
1634 09:48:27.261494 PNP: 0c09.0: enabled 1
1635 09:48:27.261576 USB2 port 0: enabled 1
1636 09:48:27.265034 USB2 port 1: enabled 1
1637 09:48:27.267867 USB2 port 2: enabled 0
1638 09:48:27.267950 USB2 port 3: enabled 0
1639 09:48:27.271060 USB2 port 5: enabled 0
1640 09:48:27.274148 USB2 port 6: enabled 1
1641 09:48:27.277558 USB2 port 9: enabled 1
1642 09:48:27.277641 USB3 port 0: enabled 1
1643 09:48:27.281106 USB3 port 1: enabled 1
1644 09:48:27.283937 USB3 port 2: enabled 1
1645 09:48:27.284018 USB3 port 3: enabled 1
1646 09:48:27.287651 USB3 port 4: enabled 0
1647 09:48:27.290619 APIC: 02: enabled 1
1648 09:48:27.290709 APIC: 04: enabled 1
1649 09:48:27.294274 APIC: 01: enabled 1
1650 09:48:27.297210 APIC: 03: enabled 1
1651 09:48:27.297289 APIC: 05: enabled 1
1652 09:48:27.300214 APIC: 07: enabled 1
1653 09:48:27.303690 APIC: 06: enabled 1
1654 09:48:27.303781 PCI: 00:08.0: enabled 1
1655 09:48:27.307147 PCI: 00:14.2: enabled 1
1656 09:48:27.309978 PCI: 01:00.0: enabled 1
1657 09:48:27.313490 Disabling ACPI via APMC:
1658 09:48:27.316847 done.
1659 09:48:27.319822 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1660 09:48:27.323521 ELOG: NV offset 0xaf0000 size 0x4000
1661 09:48:27.330821 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1662 09:48:27.337191 ELOG: Event(17) added with size 13 at 2023-01-19 09:48:27 UTC
1663 09:48:27.343697 ELOG: Event(92) added with size 9 at 2023-01-19 09:48:27 UTC
1664 09:48:27.350243 ELOG: Event(93) added with size 9 at 2023-01-19 09:48:27 UTC
1665 09:48:27.357245 ELOG: Event(9A) added with size 9 at 2023-01-19 09:48:27 UTC
1666 09:48:27.363661 ELOG: Event(9E) added with size 10 at 2023-01-19 09:48:27 UTC
1667 09:48:27.370146 ELOG: Event(9F) added with size 14 at 2023-01-19 09:48:27 UTC
1668 09:48:27.376602 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1669 09:48:27.382976 ELOG: Event(A1) added with size 10 at 2023-01-19 09:48:27 UTC
1670 09:48:27.389517 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1671 09:48:27.395976 ELOG: Event(A0) added with size 9 at 2023-01-19 09:48:27 UTC
1672 09:48:27.399555 elog_add_boot_reason: Logged dev mode boot
1673 09:48:27.402496 Finalize devices...
1674 09:48:27.406210 PCI: 00:17.0 final
1675 09:48:27.406312 Devices finalized
1676 09:48:27.412377 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1677 09:48:27.415419 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1678 09:48:27.422310 ME: HFSTS1 : 0x90000245
1679 09:48:27.425169 ME: HFSTS2 : 0x3B850126
1680 09:48:27.428493 ME: HFSTS3 : 0x00000020
1681 09:48:27.431782 ME: HFSTS4 : 0x00004800
1682 09:48:27.438321 ME: HFSTS5 : 0x00000000
1683 09:48:27.441873 ME: HFSTS6 : 0x40400006
1684 09:48:27.445219 ME: Manufacturing Mode : NO
1685 09:48:27.448100 ME: FW Partition Table : OK
1686 09:48:27.451664 ME: Bringup Loader Failure : NO
1687 09:48:27.454647 ME: Firmware Init Complete : YES
1688 09:48:27.458302 ME: Boot Options Present : NO
1689 09:48:27.461173 ME: Update In Progress : NO
1690 09:48:27.464564 ME: D0i3 Support : YES
1691 09:48:27.468041 ME: Low Power State Enabled : NO
1692 09:48:27.470905 ME: CPU Replaced : NO
1693 09:48:27.474388 ME: CPU Replacement Valid : YES
1694 09:48:27.477347 ME: Current Working State : 5
1695 09:48:27.480785 ME: Current Operation State : 1
1696 09:48:27.484413 ME: Current Operation Mode : 0
1697 09:48:27.487297 ME: Error Code : 0
1698 09:48:27.490658 ME: CPU Debug Disabled : YES
1699 09:48:27.493774 ME: TXT Support : NO
1700 09:48:27.500167 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1701 09:48:27.503735 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1702 09:48:27.506860 CBFS @ c08000 size 3f8000
1703 09:48:27.513229 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1704 09:48:27.516836 CBFS: Locating 'fallback/dsdt.aml'
1705 09:48:27.519768 CBFS: Found @ offset 10bb80 size 3fa5
1706 09:48:27.526238 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 09:48:27.529831 CBFS @ c08000 size 3f8000
1708 09:48:27.536170 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 09:48:27.536257 CBFS: Locating 'fallback/slic'
1710 09:48:27.541743 CBFS: 'fallback/slic' not found.
1711 09:48:27.544633
1712 09:48:27.548076 ACPI: Writing ACPI tables at 99b3e000.
1713 09:48:27.548162 ACPI: * FACS
1714 09:48:27.551606 ACPI: * DSDT
1715 09:48:27.554433 Ramoops buffer: 0x100000@0x99a3d000.
1716 09:48:27.557970 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1717 09:48:27.564009 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1718 09:48:27.567587 Google Chrome EC: version:
1719 09:48:27.571100 ro: helios_v2.0.2659-56403530b
1720 09:48:27.573818 rw: helios_v2.0.2849-c41de27e7d
1721 09:48:27.573894 running image: 1
1722 09:48:27.578598 ACPI: * FADT
1723 09:48:27.578676 SCI is IRQ9
1724 09:48:27.585178 ACPI: added table 1/32, length now 40
1725 09:48:27.585257 ACPI: * SSDT
1726 09:48:27.588593 Found 1 CPU(s) with 8 core(s) each.
1727 09:48:27.592066 Error: Could not locate 'wifi_sar' in VPD.
1728 09:48:27.598692 Checking CBFS for default SAR values
1729 09:48:27.601780 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1730 09:48:27.605134 CBFS @ c08000 size 3f8000
1731 09:48:27.611722 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1732 09:48:27.615168 CBFS: Locating 'wifi_sar_defaults.hex'
1733 09:48:27.618009 CBFS: Found @ offset 5fac0 size 77
1734 09:48:27.621611 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1735 09:48:27.628004 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1736 09:48:27.630883 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1737 09:48:27.637578 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1738 09:48:27.640935 failed to find key in VPD: dsm_calib_r0_0
1739 09:48:27.650836 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1740 09:48:27.653752 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1741 09:48:27.657216
1742 09:48:27.660820 failed to find key in VPD: dsm_calib_r0_1
1743 09:48:27.667231 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1744 09:48:27.673622 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1745 09:48:27.677166 failed to find key in VPD: dsm_calib_r0_2
1746 09:48:27.686356 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1747 09:48:27.693492 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1748 09:48:27.696545 failed to find key in VPD: dsm_calib_r0_3
1749 09:48:27.705928 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1750 09:48:27.709480 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1751 09:48:27.715769 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1752 09:48:27.719424 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1753 09:48:27.722877 EC returned error result code 1
1754 09:48:27.726382 EC returned error result code 1
1755 09:48:27.729292 EC returned error result code 1
1756 09:48:27.736085 PS2K: Bad resp from EC. Vivaldi disabled!
1757 09:48:27.739585 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1758 09:48:27.745836 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1759 09:48:27.752767 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1760 09:48:27.755681 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1761 09:48:27.761921 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1762 09:48:27.768598 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1763 09:48:27.775298 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1764 09:48:27.778415 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1765 09:48:27.784993 ACPI: added table 2/32, length now 44
1766 09:48:27.785082 ACPI: * MCFG
1767 09:48:27.788379 ACPI: added table 3/32, length now 48
1768 09:48:27.791656 ACPI: * TPM2
1769 09:48:27.794844 TPM2 log created at 99a2d000
1770 09:48:27.798517 ACPI: added table 4/32, length now 52
1771 09:48:27.798605 ACPI: * MADT
1772 09:48:27.801380 SCI is IRQ9
1773 09:48:27.805069 ACPI: added table 5/32, length now 56
1774 09:48:27.805157 current = 99b43ac0
1775 09:48:27.807978
1776 09:48:27.808065 ACPI: * DMAR
1777 09:48:27.810986 ACPI: added table 6/32, length now 60
1778 09:48:27.814585 ACPI: * IGD OpRegion
1779 09:48:27.817586 GMA: Found VBT in CBFS
1780 09:48:27.817673 GMA: Found valid VBT in CBFS
1781 09:48:27.820843
1782 09:48:27.824384 ACPI: added table 7/32, length now 64
1783 09:48:27.824464 ACPI: * HPET
1784 09:48:27.827534 ACPI: added table 8/32, length now 68
1785 09:48:27.830760 ACPI: done.
1786 09:48:27.834117 ACPI tables: 31744 bytes.
1787 09:48:27.834198 smbios_write_tables: 99a2c000
1788 09:48:27.838038 EC returned error result code 3
1789 09:48:27.840991 Couldn't obtain OEM name from CBI
1790 09:48:27.845092 Create SMBIOS type 17
1791 09:48:27.848032 PCI: 00:00.0 (Intel Cannonlake)
1792 09:48:27.851337 PCI: 00:14.3 (Intel WiFi)
1793 09:48:27.854742 SMBIOS tables: 939 bytes.
1794 09:48:27.858232 Writing table forward entry at 0x00000500
1795 09:48:27.864736 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1796 09:48:27.867804 Writing coreboot table at 0x99b62000
1797 09:48:27.874221 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1798 09:48:27.877723 1. 0000000000001000-000000000009ffff: RAM
1799 09:48:27.884052 2. 00000000000a0000-00000000000fffff: RESERVED
1800 09:48:27.887478 3. 0000000000100000-0000000099a2bfff: RAM
1801 09:48:27.893789 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1802 09:48:27.897331 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1803 09:48:27.903964 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1804 09:48:27.906842 7. 000000009a000000-000000009f7fffff: RESERVED
1805 09:48:27.913894 8. 00000000e0000000-00000000efffffff: RESERVED
1806 09:48:27.916926 9. 00000000fc000000-00000000fc000fff: RESERVED
1807 09:48:27.923332 10. 00000000fe000000-00000000fe00ffff: RESERVED
1808 09:48:27.926397 11. 00000000fed10000-00000000fed17fff: RESERVED
1809 09:48:27.933108 12. 00000000fed80000-00000000fed83fff: RESERVED
1810 09:48:27.936562 13. 00000000fed90000-00000000fed91fff: RESERVED
1811 09:48:27.942814 14. 00000000feda0000-00000000feda1fff: RESERVED
1812 09:48:27.946088 15. 0000000100000000-000000045e7fffff: RAM
1813 09:48:27.949492 Graphics framebuffer located at 0xc0000000
1814 09:48:27.952451 Passing 5 GPIOs to payload:
1815 09:48:27.959271 NAME | PORT | POLARITY | VALUE
1816 09:48:27.962723 write protect | undefined | high | low
1817 09:48:27.968743 lid | undefined | high | high
1818 09:48:27.975178 power | undefined | high | low
1819 09:48:27.978642 oprom | undefined | high | low
1820 09:48:27.985403 EC in RW | 0x000000cb | high | low
1821 09:48:27.985487 Board ID: 4
1822 09:48:27.991654 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1823 09:48:27.995156 CBFS @ c08000 size 3f8000
1824 09:48:27.998024 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1825 09:48:28.004959 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56
1826 09:48:28.008005 coreboot table: 1492 bytes.
1827 09:48:28.011624 IMD ROOT 0. 99fff000 00001000
1828 09:48:28.014630 IMD SMALL 1. 99ffe000 00001000
1829 09:48:28.017570 FSP MEMORY 2. 99c4e000 003b0000
1830 09:48:28.020823 CONSOLE 3. 99c2e000 00020000
1831 09:48:28.024256 FMAP 4. 99c2d000 0000054e
1832 09:48:28.027812 TIME STAMP 5. 99c2c000 00000910
1833 09:48:28.030621 VBOOT WORK 6. 99c18000 00014000
1834 09:48:28.034257 MRC DATA 7. 99c16000 00001958
1835 09:48:28.037162 ROMSTG STCK 8. 99c15000 00001000
1836 09:48:28.040574 AFTER CAR 9. 99c0b000 0000a000
1837 09:48:28.044047 RAMSTAGE 10. 99baf000 0005c000
1838 09:48:28.047621 REFCODE 11. 99b7a000 00035000
1839 09:48:28.050394 SMM BACKUP 12. 99b6a000 00010000
1840 09:48:28.053672 COREBOOT 13. 99b62000 00008000
1841 09:48:28.056783 ACPI 14. 99b3e000 00024000
1842 09:48:28.060089 ACPI GNVS 15. 99b3d000 00001000
1843 09:48:28.063509 RAMOOPS 16. 99a3d000 00100000
1844 09:48:28.066885 TPM2 TCGLOG17. 99a2d000 00010000
1845 09:48:28.069810
1846 09:48:28.073342 SMBIOS 18. 99a2c000 00000800
1847 09:48:28.073424 IMD small region:
1848 09:48:28.076314 IMD ROOT 0. 99ffec00 00000400
1849 09:48:28.079849 FSP RUNTIME 1. 99ffebe0 00000004
1850 09:48:28.083158 EC HOSTEVENT 2. 99ffebc0 00000008
1851 09:48:28.086135 POWER STATE 3. 99ffeb80 00000040
1852 09:48:28.093102 ROMSTAGE 4. 99ffeb60 00000004
1853 09:48:28.096140 MEM INFO 5. 99ffe9a0 000001b9
1854 09:48:28.099579 VPD 6. 99ffe920 0000006c
1855 09:48:28.102553 MTRR: Physical address space:
1856 09:48:28.106120 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 09:48:28.109039
1858 09:48:28.112620 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1859 09:48:28.119148 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1860 09:48:28.125390 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1861 09:48:28.131804 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1862 09:48:28.138693 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1863 09:48:28.144909 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1864 09:48:28.148481 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 09:48:28.151343 MTRR: Fixed MSR 0x258 0x0606060606060606
1866 09:48:28.154655
1867 09:48:28.157966 MTRR: Fixed MSR 0x259 0x0000000000000000
1868 09:48:28.161455 MTRR: Fixed MSR 0x268 0x0606060606060606
1869 09:48:28.164842 MTRR: Fixed MSR 0x269 0x0606060606060606
1870 09:48:28.171330 MTRR: Fixed MSR 0x26a 0x0606060606060606
1871 09:48:28.174237 MTRR: Fixed MSR 0x26b 0x0606060606060606
1872 09:48:28.177735 MTRR: Fixed MSR 0x26c 0x0606060606060606
1873 09:48:28.180751 MTRR: Fixed MSR 0x26d 0x0606060606060606
1874 09:48:28.187157 MTRR: Fixed MSR 0x26e 0x0606060606060606
1875 09:48:28.190725 MTRR: Fixed MSR 0x26f 0x0606060606060606
1876 09:48:28.194193 call enable_fixed_mtrr()
1877 09:48:28.196987 CPU physical address size: 39 bits
1878 09:48:28.200413 MTRR: default type WB/UC MTRR counts: 6/8.
1879 09:48:28.203834 MTRR: WB selected as default type.
1880 09:48:28.210439 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1881 09:48:28.216399 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1882 09:48:28.223463 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1883 09:48:28.229857 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1884 09:48:28.236243 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1885 09:48:28.243060 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1886 09:48:28.246205 MTRR: Fixed MSR 0x250 0x0606060606060606
1887 09:48:28.252582 MTRR: Fixed MSR 0x258 0x0606060606060606
1888 09:48:28.255634 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 09:48:28.258856 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 09:48:28.262263 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 09:48:28.268605 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 09:48:28.272209 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 09:48:28.275131 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 09:48:28.278547 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 09:48:28.285034 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 09:48:28.288554 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 09:48:28.288646
1898 09:48:28.288734 MTRR check
1899 09:48:28.291556 Fixed MTRRs : Enabled
1900 09:48:28.294616 Variable MTRRs: Enabled
1901 09:48:28.294704
1902 09:48:28.298007 call enable_fixed_mtrr()
1903 09:48:28.301551 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1904 09:48:28.304498 CPU physical address size: 39 bits
1905 09:48:28.310905 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1906 09:48:28.314507 MTRR: Fixed MSR 0x250 0x0606060606060606
1907 09:48:28.321108 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 09:48:28.324005 MTRR: Fixed MSR 0x250 0x0606060606060606
1909 09:48:28.327571 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 09:48:28.331043 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 09:48:28.337299 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 09:48:28.340306 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 09:48:28.343834 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 09:48:28.347424 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 09:48:28.353815 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 09:48:28.356725 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 09:48:28.360171 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 09:48:28.363529 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 09:48:28.369826 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 09:48:28.373401 call enable_fixed_mtrr()
1921 09:48:28.376197 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 09:48:28.379779 MTRR: Fixed MSR 0x259 0x0000000000000000
1923 09:48:28.382691 MTRR: Fixed MSR 0x268 0x0606060606060606
1924 09:48:28.389184 MTRR: Fixed MSR 0x269 0x0606060606060606
1925 09:48:28.392792 MTRR: Fixed MSR 0x26a 0x0606060606060606
1926 09:48:28.395802 MTRR: Fixed MSR 0x26b 0x0606060606060606
1927 09:48:28.399179 MTRR: Fixed MSR 0x26c 0x0606060606060606
1928 09:48:28.405313 MTRR: Fixed MSR 0x26d 0x0606060606060606
1929 09:48:28.408856 MTRR: Fixed MSR 0x26e 0x0606060606060606
1930 09:48:28.412361 MTRR: Fixed MSR 0x26f 0x0606060606060606
1931 09:48:28.415391 CPU physical address size: 39 bits
1932 09:48:28.418877 call enable_fixed_mtrr()
1933 09:48:28.421850 CBFS @ c08000 size 3f8000
1934 09:48:28.428368 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1935 09:48:28.431959 CBFS: Locating 'fallback/payload'
1936 09:48:28.435425 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 09:48:28.438290 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 09:48:28.441828 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 09:48:28.448267 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 09:48:28.451415 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 09:48:28.454919 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 09:48:28.458421 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 09:48:28.464821 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 09:48:28.467628 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 09:48:28.471041 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 09:48:28.473968 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 09:48:28.477421
1948 09:48:28.480908 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 09:48:28.483811 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 09:48:28.487479 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 09:48:28.493853 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 09:48:28.496797 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 09:48:28.500403 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 09:48:28.503330 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 09:48:28.510154 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 09:48:28.513080 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 09:48:28.516615 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 09:48:28.519529 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 09:48:28.526018 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 09:48:28.529538 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 09:48:28.533115 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 09:48:28.539174 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 09:48:28.542620 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 09:48:28.546132 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 09:48:28.548986 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 09:48:28.555890 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 09:48:28.558729 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 09:48:28.562024 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 09:48:28.565591 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 09:48:28.571645 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 09:48:28.571754 call enable_fixed_mtrr()
1972 09:48:28.575162
1973 09:48:28.575265 call enable_fixed_mtrr()
1974 09:48:28.578093 CPU physical address size: 39 bits
1975 09:48:28.581699 CPU physical address size: 39 bits
1976 09:48:28.585194
1977 09:48:28.588099 CBFS: Found @ offset 1c96c0 size 3f798
1978 09:48:28.591612 CPU physical address size: 39 bits
1979 09:48:28.594491 call enable_fixed_mtrr()
1980 09:48:28.597532 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 09:48:28.601108 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 09:48:28.604781 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 09:48:28.610984 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 09:48:28.613842 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 09:48:28.617463 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 09:48:28.620507 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 09:48:28.627302 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 09:48:28.630619 CPU physical address size: 39 bits
1989 09:48:28.633556 call enable_fixed_mtrr()
1990 09:48:28.637074 Checking segment from ROM address 0xffdd16f8
1991 09:48:28.640683 CPU physical address size: 39 bits
1992 09:48:28.643670 Checking segment from ROM address 0xffdd1714
1993 09:48:28.649964 Loading segment from ROM address 0xffdd16f8
1994 09:48:28.653450 code (compression=0)
1995 09:48:28.659681 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1996 09:48:28.669400 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1997 09:48:28.669490 it's not compressed!
1998 09:48:28.763261 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1999 09:48:28.769351 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2000 09:48:28.772760 Loading segment from ROM address 0xffdd1714
2001 09:48:28.776132
2002 09:48:28.776221 Entry Point 0x30000000
2003 09:48:28.779139 Loaded segments
2004 09:48:28.784993 Finalizing chipset.
2005 09:48:28.788616 Finalizing SMM.
2006 09:48:28.792041 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2007 09:48:28.794911 mp_park_aps done after 0 msecs.
2008 09:48:28.801401 Jumping to boot code at 30000000(99b62000)
2009 09:48:28.807780 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2010 09:48:28.807868
2011 09:48:28.807937
2012 09:48:28.808000
2013 09:48:28.811485 Starting depthcharge on Helios...
2014 09:48:28.811570
2015 09:48:28.811931 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2016 09:48:28.812035 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2017 09:48:28.812121 Setting prompt string to ['hatch:']
2018 09:48:28.812213 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2019 09:48:28.821274 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2020 09:48:28.821362
2021 09:48:28.827703 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2022 09:48:28.827805
2023 09:48:28.834203 board_setup: Info: eMMC controller not present; skipping
2024 09:48:28.834290
2025 09:48:28.837767 New NVMe Controller 0x30053ac0 @ 00:1d:00
2026 09:48:28.837854
2027 09:48:28.844151 board_setup: Info: SDHCI controller not present; skipping
2028 09:48:28.844237
2029 09:48:28.850601 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2030 09:48:28.850688
2031 09:48:28.850757 Wipe memory regions:
2032 09:48:28.850820
2033 09:48:28.856968 [0x00000000001000, 0x000000000a0000)
2034 09:48:28.857056
2035 09:48:28.860421 [0x00000000100000, 0x00000030000000)
2036 09:48:28.860508
2037 09:48:28.924334 [0x00000030657430, 0x00000099a2c000)
2038 09:48:28.924479
2039 09:48:29.056521 [0x00000100000000, 0x0000045e800000)
2040 09:48:29.056660
2041 09:48:30.975185 R8152: Initializing
2042 09:48:30.975331
2043 09:48:30.978608 Version 6 (ocp_data = 5c30)
2044 09:48:30.978772
2045 09:48:30.981633 R8152: Done initializing
2046 09:48:30.981718
2047 09:48:30.985013 Adding net device
2048 09:48:30.985105
2049 09:48:30.992045 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2050 09:48:30.992132
2051 09:48:30.992199
2052 09:48:30.992260
2053 09:48:30.992529 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2055 09:48:31.093162 hatch: tftpboot 192.168.201.1 8794211/tftp-deploy-y61ao7ev/kernel/bzImage 8794211/tftp-deploy-y61ao7ev/kernel/cmdline 8794211/tftp-deploy-y61ao7ev/ramdisk/ramdisk.cpio.gz
2056 09:48:31.093333 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 09:48:31.093422 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2058 09:48:31.097363 tftpboot 192.168.201.1 8794211/tftp-deploy-y61ao7ev/kernel/bzImoy-y61ao7ev/kernel/cmdline 8794211/tftp-deploy-y61ao7ev/ramdisk/ramdisk.cpio.gz
2059 09:48:31.097457
2060 09:48:31.097530 Waiting for link
2061 09:48:31.097595
2062 09:48:31.298006 done.
2063 09:48:31.298181
2064 09:48:31.298251 MAC: 00:24:32:50:21:91
2065 09:48:31.298315
2066 09:48:31.301610 Sending DHCP discover... done.
2067 09:48:31.301697
2068 09:48:31.304510 Waiting for reply... done.
2069 09:48:31.304598
2070 09:48:31.308132 Sending DHCP request... done.
2071 09:48:31.308220
2072 09:48:31.311045 Waiting for reply... done.
2073 09:48:31.311132
2074 09:48:31.314738 My ip is 192.168.201.14
2075 09:48:31.314833
2076 09:48:31.317968 The DHCP server ip is 192.168.201.1
2077 09:48:31.318067
2078 09:48:31.320929 TFTP server IP predefined by user: 192.168.201.1
2079 09:48:31.321019
2080 09:48:31.330716 Bootfile predefined by user: 8794211/tftp-deploy-y61ao7ev/kernel/bzImage
2081 09:48:31.330804
2082 09:48:31.333797 Sending tftp read request... done.
2083 09:48:31.333879
2084 09:48:31.337828 Waiting for the transfer...
2085 09:48:31.337910
2086 09:48:31.885945 00000000 ################################################################
2087 09:48:31.886170
2088 09:48:32.428969 00080000 ################################################################
2089 09:48:32.429107
2090 09:48:32.962563 00100000 ################################################################
2091 09:48:32.962731
2092 09:48:33.521479 00180000 ################################################################
2093 09:48:33.521621
2094 09:48:34.064145 00200000 ################################################################
2095 09:48:34.064286
2096 09:48:34.626221 00280000 ################################################################
2097 09:48:34.626362
2098 09:48:35.209876 00300000 ################################################################
2099 09:48:35.210447
2100 09:48:35.812449 00380000 ################################################################
2101 09:48:35.813008
2102 09:48:36.402355 00400000 ################################################################
2103 09:48:36.402496
2104 09:48:37.006556 00480000 ################################################################
2105 09:48:37.006700
2106 09:48:37.647201 00500000 ################################################################
2107 09:48:37.647785
2108 09:48:38.314634 00580000 ################################################################
2109 09:48:38.315174
2110 09:48:38.938632 00600000 ################################################################
2111 09:48:38.938789
2112 09:48:39.495033 00680000 ################################################################
2113 09:48:39.495166
2114 09:48:40.068683 00700000 ################################################################
2115 09:48:40.068821
2116 09:48:40.647478 00780000 ################################################################
2117 09:48:40.647620
2118 09:48:41.221943 00800000 ################################################################
2119 09:48:41.222120
2120 09:48:41.764401 00880000 ################################################################
2121 09:48:41.764547
2122 09:48:42.040407 00900000 ################################## done.
2123 09:48:42.040605
2124 09:48:42.043833 The bootfile was 9711616 bytes long.
2125 09:48:42.043938
2126 09:48:42.046790 Sending tftp read request... done.
2127 09:48:42.046877
2128 09:48:42.050439 Waiting for the transfer...
2129 09:48:42.050532
2130 09:48:42.607270 00000000 ################################################################
2131 09:48:42.607408
2132 09:48:43.154294 00080000 ################################################################
2133 09:48:43.154437
2134 09:48:43.697909 00100000 ################################################################
2135 09:48:43.698055
2136 09:48:44.244850 00180000 ################################################################
2137 09:48:44.244997
2138 09:48:44.798989 00200000 ################################################################
2139 09:48:44.799130
2140 09:48:45.360517 00280000 ################################################################
2141 09:48:45.360674
2142 09:48:45.951528 00300000 ################################################################
2143 09:48:45.951668
2144 09:48:46.561945 00380000 ################################################################
2145 09:48:46.562103
2146 09:48:47.143473 00400000 ################################################################
2147 09:48:47.143615
2148 09:48:47.714941 00480000 ################################################################
2149 09:48:47.715082
2150 09:48:48.289021 00500000 ################################################################
2151 09:48:48.289177
2152 09:48:48.909361 00580000 ################################################################
2153 09:48:48.909518
2154 09:48:49.474109 00600000 ################################################################
2155 09:48:49.474247
2156 09:48:50.034611 00680000 ################################################################
2157 09:48:50.034752
2158 09:48:50.600300 00700000 ################################################################
2159 09:48:50.600440
2160 09:48:51.170908 00780000 ################################################################
2161 09:48:51.171062
2162 09:48:51.382425 00800000 ######################## done.
2163 09:48:51.382578
2164 09:48:51.385319 Sending tftp read request... done.
2165 09:48:51.385406
2166 09:48:51.389107 Waiting for the transfer...
2167 09:48:51.389185
2168 09:48:51.389250 00000000 # done.
2169 09:48:51.389313
2170 09:48:51.398570 Command line loaded dynamically from TFTP file: 8794211/tftp-deploy-y61ao7ev/kernel/cmdline
2171 09:48:51.398660
2172 09:48:51.414899 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2173 09:48:51.414999
2174 09:48:51.421421 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 09:48:51.421511
2176 09:48:51.429498 Shutting down all USB controllers.
2177 09:48:51.429586
2178 09:48:51.433582 Removing current net device
2179 09:48:51.433669
2180 09:48:51.437326 Finalizing coreboot
2181 09:48:51.437439
2182 09:48:51.443813 Exiting depthcharge with code 4 at timestamp: 29976188
2183 09:48:51.443930
2184 09:48:51.444003
2185 09:48:51.444068 Starting kernel ...
2186 09:48:51.444129
2187 09:48:51.444189
2188 09:48:51.444257
2189 09:48:51.444642 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2190 09:48:51.444743 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2191 09:48:51.444821 Setting prompt string to ['Linux version [0-9]']
2192 09:48:51.444892 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2193 09:48:51.444963 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2195 09:53:09.444973 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2197 09:53:09.445197 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2199 09:53:09.445366 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2202 09:53:09.445636 end: 2 depthcharge-action (duration 00:05:00) [common]
2204 09:53:09.445885 Cleaning after the job
2205 09:53:09.445980 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794211/tftp-deploy-y61ao7ev/ramdisk
2206 09:53:09.446756 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794211/tftp-deploy-y61ao7ev/kernel
2207 09:53:09.447467 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794211/tftp-deploy-y61ao7ev/modules
2208 09:53:09.447671 start: 5.1 power-off (timeout 00:00:30) [common]
2209 09:53:09.447825 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2210 09:53:09.467550 >> Command sent successfully.
2211 09:53:09.469599 Returned 0 in 0 seconds
2212 09:53:09.570185 end: 5.1 power-off (duration 00:00:00) [common]
2214 09:53:09.570601 start: 5.2 read-feedback (timeout 00:10:00) [common]
2215 09:53:09.570965 Listened to connection for namespace 'common' for up to 1s
2216 09:53:10.574173 Finalising connection for namespace 'common'
2217 09:53:10.574369 Disconnecting from shell: Finalise
2218 09:53:10.674718 end: 5.2 read-feedback (duration 00:00:01) [common]
2219 09:53:10.674886 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8794211
2220 09:53:10.680373 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8794211
2221 09:53:10.680563 JobError: Your job cannot terminate cleanly.