Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 09:33:43.080150 lava-dispatcher, installed at version: 2022.11
2 09:33:43.080334 start: 0 validate
3 09:33:43.080460 Start time: 2023-01-19 09:33:43.080452+00:00 (UTC)
4 09:33:43.080578 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:33:43.080706 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230114.0%2Fx86%2Frootfs.cpio.gz exists
6 09:33:43.083374 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:33:43.083500 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.269-cip88-479-g3f9e11225caa5%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:33:43.368680 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:33:43.368853 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.269-cip88-479-g3f9e11225caa5%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 09:33:43.652128 validate duration: 0.57
12 09:33:43.652405 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:33:43.652510 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:33:43.652606 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:33:43.652717 Not decompressing ramdisk as can be used compressed.
16 09:33:43.652804 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230114.0/x86/rootfs.cpio.gz
17 09:33:43.652870 saving as /var/lib/lava/dispatcher/tmp/8794215/tftp-deploy-0ohwh6w8/ramdisk/rootfs.cpio.gz
18 09:33:43.652933 total size: 8423555 (8MB)
19 09:33:43.660117 progress 0% (0MB)
20 09:33:43.690181 progress 5% (0MB)
21 09:33:43.715452 progress 10% (0MB)
22 09:33:43.736721 progress 15% (1MB)
23 09:33:43.757454 progress 20% (1MB)
24 09:33:43.779207 progress 25% (2MB)
25 09:33:43.799977 progress 30% (2MB)
26 09:33:43.819755 progress 35% (2MB)
27 09:33:43.843676 progress 40% (3MB)
28 09:33:43.863591 progress 45% (3MB)
29 09:33:43.886900 progress 50% (4MB)
30 09:33:43.908380 progress 55% (4MB)
31 09:33:43.929531 progress 60% (4MB)
32 09:33:43.953640 progress 65% (5MB)
33 09:33:43.970333 progress 70% (5MB)
34 09:33:43.994582 progress 75% (6MB)
35 09:33:44.017147 progress 80% (6MB)
36 09:33:44.037185 progress 85% (6MB)
37 09:33:44.057966 progress 90% (7MB)
38 09:33:44.082584 progress 95% (7MB)
39 09:33:44.100498 progress 100% (8MB)
40 09:33:44.101303 8MB downloaded in 0.45s (17.92MB/s)
41 09:33:44.102070 end: 1.1.1 http-download (duration 00:00:00) [common]
43 09:33:44.103343 end: 1.1 download-retry (duration 00:00:00) [common]
44 09:33:44.103805 start: 1.2 download-retry (timeout 00:10:00) [common]
45 09:33:44.104257 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 09:33:44.104757 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.269-cip88-479-g3f9e11225caa5/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 09:33:44.105112 saving as /var/lib/lava/dispatcher/tmp/8794215/tftp-deploy-0ohwh6w8/kernel/bzImage
48 09:33:44.105438 total size: 9711616 (9MB)
49 09:33:44.105796 No compression specified
50 09:33:44.110888 progress 0% (0MB)
51 09:33:44.122546 progress 5% (0MB)
52 09:33:44.136136 progress 10% (0MB)
53 09:33:44.147973 progress 15% (1MB)
54 09:33:44.160260 progress 20% (1MB)
55 09:33:44.173701 progress 25% (2MB)
56 09:33:44.185422 progress 30% (2MB)
57 09:33:44.197125 progress 35% (3MB)
58 09:33:44.209404 progress 40% (3MB)
59 09:33:44.222485 progress 45% (4MB)
60 09:33:44.234532 progress 50% (4MB)
61 09:33:44.248009 progress 55% (5MB)
62 09:33:44.259693 progress 60% (5MB)
63 09:33:44.271385 progress 65% (6MB)
64 09:33:44.285063 progress 70% (6MB)
65 09:33:44.296941 progress 75% (6MB)
66 09:33:44.310594 progress 80% (7MB)
67 09:33:44.322311 progress 85% (7MB)
68 09:33:44.334216 progress 90% (8MB)
69 09:33:44.346114 progress 95% (8MB)
70 09:33:44.357059 progress 100% (9MB)
71 09:33:44.357272 9MB downloaded in 0.25s (36.78MB/s)
72 09:33:44.357425 end: 1.2.1 http-download (duration 00:00:00) [common]
74 09:33:44.357713 end: 1.2 download-retry (duration 00:00:00) [common]
75 09:33:44.357803 start: 1.3 download-retry (timeout 00:09:59) [common]
76 09:33:44.357891 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 09:33:44.357997 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.269-cip88-479-g3f9e11225caa5/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 09:33:44.358066 saving as /var/lib/lava/dispatcher/tmp/8794215/tftp-deploy-0ohwh6w8/modules/modules.tar
79 09:33:44.358128 total size: 64676 (0MB)
80 09:33:44.358190 Using unxz to decompress xz
81 09:33:44.362853 progress 50% (0MB)
82 09:33:44.363597 progress 100% (0MB)
83 09:33:44.367814 0MB downloaded in 0.01s (6.37MB/s)
84 09:33:44.368088 end: 1.3.1 http-download (duration 00:00:00) [common]
86 09:33:44.368397 end: 1.3 download-retry (duration 00:00:00) [common]
87 09:33:44.368510 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 09:33:44.368621 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 09:33:44.368721 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 09:33:44.368821 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 09:33:44.369010 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi
92 09:33:44.369134 makedir: /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin
93 09:33:44.369231 makedir: /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/tests
94 09:33:44.369324 makedir: /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/results
95 09:33:44.369442 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-add-keys
96 09:33:44.369601 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-add-sources
97 09:33:44.369735 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-background-process-start
98 09:33:44.369865 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-background-process-stop
99 09:33:44.369995 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-common-functions
100 09:33:44.370121 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-echo-ipv4
101 09:33:44.370250 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-install-packages
102 09:33:44.370379 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-installed-packages
103 09:33:44.370503 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-os-build
104 09:33:44.370628 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-probe-channel
105 09:33:44.370757 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-probe-ip
106 09:33:44.370883 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-target-ip
107 09:33:44.371008 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-target-mac
108 09:33:44.371133 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-target-storage
109 09:33:44.371261 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-test-case
110 09:33:44.371387 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-test-event
111 09:33:44.371513 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-test-feedback
112 09:33:44.371639 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-test-raise
113 09:33:44.371766 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-test-reference
114 09:33:44.371891 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-test-runner
115 09:33:44.372016 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-test-set
116 09:33:44.372139 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-test-shell
117 09:33:44.372267 Updating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-install-packages (oe)
118 09:33:44.372397 Updating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/bin/lava-installed-packages (oe)
119 09:33:44.372509 Creating /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/environment
120 09:33:44.372611 LAVA metadata
121 09:33:44.372693 - LAVA_JOB_ID=8794215
122 09:33:44.372770 - LAVA_DISPATCHER_IP=192.168.201.1
123 09:33:44.372893 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 09:33:44.372971 skipped lava-vland-overlay
125 09:33:44.373061 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 09:33:44.373160 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 09:33:44.373236 skipped lava-multinode-overlay
128 09:33:44.373322 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 09:33:44.373418 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 09:33:44.373517 Loading test definitions
131 09:33:44.373634 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 09:33:44.373724 Using /lava-8794215 at stage 0
133 09:33:44.374028 uuid=8794215_1.4.2.3.1 testdef=None
134 09:33:44.374134 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 09:33:44.374244 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 09:33:44.374806 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 09:33:44.375073 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 09:33:44.375728 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 09:33:44.376008 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 09:33:44.376628 runner path: /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/0/tests/0_dmesg test_uuid 8794215_1.4.2.3.1
143 09:33:44.376797 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 09:33:44.377068 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 09:33:44.377152 Using /lava-8794215 at stage 1
147 09:33:44.377434 uuid=8794215_1.4.2.3.5 testdef=None
148 09:33:44.377553 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 09:33:44.377657 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 09:33:44.378161 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 09:33:44.378422 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 09:33:44.379076 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 09:33:44.379353 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 09:33:44.379987 runner path: /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/1/tests/1_bootrr test_uuid 8794215_1.4.2.3.5
157 09:33:44.380151 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 09:33:44.380397 Creating lava-test-runner.conf files
160 09:33:44.380473 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/0 for stage 0
161 09:33:44.380567 - 0_dmesg
162 09:33:44.380654 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8794215/lava-overlay-5kty7jzi/lava-8794215/1 for stage 1
163 09:33:44.380751 - 1_bootrr
164 09:33:44.380857 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 09:33:44.380961 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 09:33:44.387899 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 09:33:44.388026 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 09:33:44.388133 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 09:33:44.388235 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 09:33:44.388338 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 09:33:44.574898 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 09:33:44.575253 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 09:33:44.575366 extracting modules file /var/lib/lava/dispatcher/tmp/8794215/tftp-deploy-0ohwh6w8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8794215/extract-overlay-ramdisk-ttxfh1uu/ramdisk
174 09:33:44.579549 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 09:33:44.579661 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 09:33:44.579750 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8794215/compress-overlay-h60yamjw/overlay-1.4.2.4.tar.gz to ramdisk
177 09:33:44.579826 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8794215/compress-overlay-h60yamjw/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8794215/extract-overlay-ramdisk-ttxfh1uu/ramdisk
178 09:33:44.583684 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 09:33:44.583796 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 09:33:44.583890 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 09:33:44.583985 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 09:33:44.584067 Building ramdisk /var/lib/lava/dispatcher/tmp/8794215/extract-overlay-ramdisk-ttxfh1uu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8794215/extract-overlay-ramdisk-ttxfh1uu/ramdisk
183 09:33:44.647132 >> 48350 blocks
184 09:33:45.390013 rename /var/lib/lava/dispatcher/tmp/8794215/extract-overlay-ramdisk-ttxfh1uu/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8794215/tftp-deploy-0ohwh6w8/ramdisk/ramdisk.cpio.gz
185 09:33:45.390436 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 09:33:45.390584 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 09:33:45.390693 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 09:33:45.390791 No mkimage arch provided, not using FIT.
189 09:33:45.390882 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 09:33:45.390969 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 09:33:45.391072 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 09:33:45.391170 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 09:33:45.391251 No LXC device requested
194 09:33:45.391334 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 09:33:45.391426 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 09:33:45.391512 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 09:33:45.391591 Checking files for TFTP limit of 4294967296 bytes.
198 09:33:45.392012 end: 1 tftp-deploy (duration 00:00:02) [common]
199 09:33:45.392125 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 09:33:45.392223 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 09:33:45.392354 substitutions:
202 09:33:45.392424 - {DTB}: None
203 09:33:45.392493 - {INITRD}: 8794215/tftp-deploy-0ohwh6w8/ramdisk/ramdisk.cpio.gz
204 09:33:45.392556 - {KERNEL}: 8794215/tftp-deploy-0ohwh6w8/kernel/bzImage
205 09:33:45.392618 - {LAVA_MAC}: None
206 09:33:45.392682 - {PRESEED_CONFIG}: None
207 09:33:45.392741 - {PRESEED_LOCAL}: None
208 09:33:45.392799 - {RAMDISK}: 8794215/tftp-deploy-0ohwh6w8/ramdisk/ramdisk.cpio.gz
209 09:33:45.392857 - {ROOT_PART}: None
210 09:33:45.392915 - {ROOT}: None
211 09:33:45.392973 - {SERVER_IP}: 192.168.201.1
212 09:33:45.393036 - {TEE}: None
213 09:33:45.393096 Parsed boot commands:
214 09:33:45.393153 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 09:33:45.393308 Parsed boot commands: tftpboot 192.168.201.1 8794215/tftp-deploy-0ohwh6w8/kernel/bzImage 8794215/tftp-deploy-0ohwh6w8/kernel/cmdline 8794215/tftp-deploy-0ohwh6w8/ramdisk/ramdisk.cpio.gz
216 09:33:45.393405 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 09:33:45.393534 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 09:33:45.393645 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 09:33:45.393736 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 09:33:45.393809 Not connected, no need to disconnect.
221 09:33:45.393889 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 09:33:45.393982 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 09:33:45.394052 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
224 09:33:45.396689 Setting prompt string to ['lava-test: # ']
225 09:33:45.396973 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 09:33:45.397077 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 09:33:45.397177 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 09:33:45.397268 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 09:33:45.397453 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
230 09:33:45.416148 >> Command sent successfully.
231 09:33:45.417998 Returned 0 in 0 seconds
232 09:33:45.519151 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 09:33:45.521643 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 09:33:45.522170 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 09:33:45.522623 Setting prompt string to 'Starting depthcharge on Voema...'
237 09:33:45.523002 Changing prompt to 'Starting depthcharge on Voema...'
238 09:33:45.523360 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 09:33:45.523972 [Enter `^Ec?' for help]
240 09:33:52.890935
241 09:33:52.891529
242 09:33:52.898219 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 09:33:52.906061 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 09:33:52.909513 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 09:33:52.916771 CPU: AES supported, TXT NOT supported, VT supported
246 09:33:52.920434 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 09:33:52.924128 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 09:33:52.931661 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 09:33:52.935302 VBOOT: Loading verstage.
250 09:33:52.939014 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 09:33:52.942499 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 09:33:52.949695 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 09:33:52.957534 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 09:33:52.965327 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 09:33:52.965986
256 09:33:52.966443
257 09:33:52.975733 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 09:33:52.991197 Probing TPM: . done!
259 09:33:52.994783 TPM ready after 0 ms
260 09:33:52.999958 Connected to device vid:did:rid of 1ae0:0028:00
261 09:33:53.011039 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
262 09:33:53.017997 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 09:33:53.103783 Initialized TPM device CR50 revision 0
264 09:33:53.113976 tlcl_send_startup: Startup return code is 0
265 09:33:53.114421 TPM: setup succeeded
266 09:33:53.141059 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 09:33:53.151975 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 09:33:53.159636 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 09:33:53.174168 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 09:33:53.177104
271 09:33:53.177726 Chrome EC: UHEPI supported
272 09:33:53.180888
273 09:33:53.181513 Phase 1
274 09:33:53.183755 FMAP: area GBB found @ 1805000 (458752 bytes)
275 09:33:53.193412 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
276 09:33:53.200203 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
277 09:33:53.206998 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
278 09:33:53.213645 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
279 09:33:53.216906 Recovery requested (1009000e)
280 09:33:53.226156 TPM: Extending digest for VBOOT: boot mode into PCR 0
281 09:33:53.232428 tlcl_extend: response is 0
282 09:33:53.238580 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
283 09:33:53.249153 tlcl_extend: response is 0
284 09:33:53.255075 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 09:33:53.262076 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
286 09:33:53.268456 BS: verstage times (exec / console): total (unknown) / 142 ms
287 09:33:53.268997
288 09:33:53.269381
289 09:33:53.281366 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
290 09:33:53.288020 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
291 09:33:53.291574 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
292 09:33:53.298038 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
293 09:33:53.301126 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
294 09:33:53.304785 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
295 09:33:53.307820 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
296 09:33:53.310929 TCO_STS: 0000 0000
297 09:33:53.315015 GEN_PMCON: d0015038 00002200
298 09:33:53.317931 GBLRST_CAUSE: 00000000 00000000
299 09:33:53.320762 HPR_CAUSE0: 00000000
300 09:33:53.321254 prev_sleep_state 5
301 09:33:53.324439 Boot Count incremented to 12561
302 09:33:53.331629 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 09:33:53.338088 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
304 09:33:53.347955 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
305 09:33:53.354138 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
306 09:33:53.357778 Chrome EC: UHEPI supported
307 09:33:53.364311 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
308 09:33:53.375808 Probing TPM: done!
309 09:33:53.382049 Connected to device vid:did:rid of 1ae0:0028:00
310 09:33:53.392193 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
311 09:33:53.395548 Initialized TPM device CR50 revision 0
312 09:33:53.410970 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 09:33:53.414904 MRC: Hash idx 0x100b comparison successful.
314 09:33:53.417986 MRC cache found, size faa8
315 09:33:53.421569 bootmode is set to: 2
316 09:33:53.424728 SPD index = 2
317 09:33:53.431221 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
318 09:33:53.431771 SPD: module type is LPDDR4X
319 09:33:53.438214 SPD: module part number is MT53D1G64D4NW-046
320 09:33:53.444918 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
321 09:33:53.448455 SPD: device width 16 bits, bus width 16 bits
322 09:33:53.451502 SPD: module size is 2048 MB (per channel)
323 09:33:53.883098 CBMEM:
324 09:33:53.885825 IMD: root @ 0x76fff000 254 entries.
325 09:33:53.889460 IMD: root @ 0x76ffec00 62 entries.
326 09:33:53.892494 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
327 09:33:53.899755 FMAP: area RW_VPD found @ f35000 (8192 bytes)
328 09:33:53.902566 External stage cache:
329 09:33:53.906178 IMD: root @ 0x7b3ff000 254 entries.
330 09:33:53.909147 IMD: root @ 0x7b3fec00 62 entries.
331 09:33:53.924430 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
332 09:33:53.930965 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 09:33:53.937561 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
334 09:33:53.951665 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 09:33:53.958435 cse_lite: Skip switching to RW in the recovery path
336 09:33:53.958911 8 DIMMs found
337 09:33:53.959362 SMM Memory Map
338 09:33:53.961446
339 09:33:53.964538 SMRAM : 0x7b000000 0x800000
340 09:33:53.967965 Subregion 0: 0x7b000000 0x200000
341 09:33:53.971602 Subregion 1: 0x7b200000 0x200000
342 09:33:53.974434 Subregion 2: 0x7b400000 0x400000
343 09:33:53.974951 top_of_ram = 0x77000000
344 09:33:53.981320 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
345 09:33:53.988420 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
346 09:33:53.992342 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
347 09:33:53.995404 MTRR Range: Start=ff000000 End=0 (Size 1000000)
348 09:33:54.004938 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
349 09:33:54.012098 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
350 09:33:54.021785 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
351 09:33:54.024868 Processing 211 relocs. Offset value of 0x74c0b000
352 09:33:54.033755 BS: romstage times (exec / console): total (unknown) / 277 ms
353 09:33:54.039894
354 09:33:54.039983
355 09:33:54.049955 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
356 09:33:54.053426 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
357 09:33:54.063299 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
358 09:33:54.069829 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
359 09:33:54.076450 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
360 09:33:54.082893 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
361 09:33:54.126777 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
362 09:33:54.133638 Processing 5008 relocs. Offset value of 0x75d98000
363 09:33:54.136550 BS: postcar times (exec / console): total (unknown) / 59 ms
364 09:33:54.140338
365 09:33:54.140818
366 09:33:54.141194
367 09:33:54.150299 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
368 09:33:54.150902 Normal boot
369 09:33:54.153094 FW_CONFIG value is 0x804c02
370 09:33:54.156730 PCI: 00:07.0 disabled by fw_config
371 09:33:54.159821 PCI: 00:07.1 disabled by fw_config
372 09:33:54.166682 PCI: 00:0d.2 disabled by fw_config
373 09:33:54.169439 PCI: 00:1c.7 disabled by fw_config
374 09:33:54.172900 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 09:33:54.179208 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
376 09:33:54.186001 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 09:33:54.189511 GENERIC: 0.0 disabled by fw_config
378 09:33:54.192328 GENERIC: 1.0 disabled by fw_config
379 09:33:54.195694 fw_config match found: DB_USB=USB3_ACTIVE
380 09:33:54.199411 fw_config match found: DB_USB=USB3_ACTIVE
381 09:33:54.202922 fw_config match found: DB_USB=USB3_ACTIVE
382 09:33:54.209542 fw_config match found: DB_USB=USB3_ACTIVE
383 09:33:54.212323 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
384 09:33:54.222391 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
385 09:33:54.229176 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
386 09:33:54.235740 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
387 09:33:54.242446 microcode: sig=0x806c1 pf=0x80 revision=0x86
388 09:33:54.245373 microcode: Update skipped, already up-to-date
389 09:33:54.251948 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
390 09:33:54.280421 Detected 4 core, 8 thread CPU.
391 09:33:54.283828 Setting up SMI for CPU
392 09:33:54.286924 IED base = 0x7b400000
393 09:33:54.287389 IED size = 0x00400000
394 09:33:54.290251
395 09:33:54.290691 Will perform SMM setup.
396 09:33:54.296848 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
397 09:33:54.303426 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
398 09:33:54.309375 Processing 16 relocs. Offset value of 0x00030000
399 09:33:54.313250 Attempting to start 7 APs
400 09:33:54.316139 Waiting for 10ms after sending INIT.
401 09:33:54.331842 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
402 09:33:54.331934 done.
403 09:33:54.335667 AP: slot 4 apic_id 7.
404 09:33:54.338551 AP: slot 5 apic_id 6.
405 09:33:54.338635 AP: slot 7 apic_id 5.
406 09:33:54.341735 AP: slot 3 apic_id 4.
407 09:33:54.345173 AP: slot 6 apic_id 2.
408 09:33:54.345257 AP: slot 2 apic_id 3.
409 09:33:54.348772
410 09:33:54.351659 Waiting for 2nd SIPI to complete...done.
411 09:33:54.358438 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 09:33:54.364696 Processing 13 relocs. Offset value of 0x00038000
413 09:33:54.368113 Unable to locate Global NVS
414 09:33:54.374747 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 09:33:54.378114 Installing permanent SMM handler to 0x7b000000
416 09:33:54.387881 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 09:33:54.391437 Processing 794 relocs. Offset value of 0x7b010000
418 09:33:54.401437 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 09:33:54.404579 Processing 13 relocs. Offset value of 0x7b008000
420 09:33:54.411099 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 09:33:54.417730 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 09:33:54.424194 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 09:33:54.427702 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 09:33:54.434385 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 09:33:54.440968 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 09:33:54.447232 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 09:33:54.450917 Unable to locate Global NVS
428 09:33:54.457256 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 09:33:54.460995 Clearing SMI status registers
430 09:33:54.464072 SMI_STS: PM1
431 09:33:54.464587 PM1_STS: PWRBTN
432 09:33:54.470858 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 09:33:54.474077 In relocation handler: CPU 0
434 09:33:54.480621 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 09:33:54.483498 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 09:33:54.486803 Relocation complete.
437 09:33:54.493445 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 09:33:54.496494 In relocation handler: CPU 1
439 09:33:54.500066 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 09:33:54.502983 Relocation complete.
441 09:33:54.510131 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
442 09:33:54.513467 In relocation handler: CPU 7
443 09:33:54.516819 New SMBASE=0x7affe400 IEDBASE=0x7b400000
444 09:33:54.519894 Relocation complete.
445 09:33:54.526205 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
446 09:33:54.529853 In relocation handler: CPU 3
447 09:33:54.532605 New SMBASE=0x7afff400 IEDBASE=0x7b400000
448 09:33:54.538792 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 09:33:54.538879 Relocation complete.
450 09:33:54.548903 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
451 09:33:54.548989 In relocation handler: CPU 5
452 09:33:54.555441 New SMBASE=0x7affec00 IEDBASE=0x7b400000
453 09:33:54.558792 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 09:33:54.562168 Relocation complete.
455 09:33:54.568681 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
456 09:33:54.571825 In relocation handler: CPU 4
457 09:33:54.575002 New SMBASE=0x7afff000 IEDBASE=0x7b400000
458 09:33:54.578568 Relocation complete.
459 09:33:54.585068 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
460 09:33:54.588130 In relocation handler: CPU 2
461 09:33:54.591452 New SMBASE=0x7afff800 IEDBASE=0x7b400000
462 09:33:54.594896 Relocation complete.
463 09:33:54.601022 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
464 09:33:54.604637 In relocation handler: CPU 6
465 09:33:54.608162 New SMBASE=0x7affe800 IEDBASE=0x7b400000
466 09:33:54.614812 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 09:33:54.614973 Relocation complete.
468 09:33:54.617764 Initializing CPU #0
469 09:33:54.621175 CPU: vendor Intel device 806c1
470 09:33:54.624445 CPU: family 06, model 8c, stepping 01
471 09:33:54.627984 Clearing out pending MCEs
472 09:33:54.631141 Setting up local APIC...
473 09:33:54.634626 apic_id: 0x00 done.
474 09:33:54.637579 Turbo is available but hidden
475 09:33:54.638021 Turbo is available and visible
476 09:33:54.644743 microcode: Update skipped, already up-to-date
477 09:33:54.647629 CPU #0 initialized
478 09:33:54.648072 Initializing CPU #3
479 09:33:54.651451 Initializing CPU #4
480 09:33:54.651998 Initializing CPU #5
481 09:33:54.654490 CPU: vendor Intel device 806c1
482 09:33:54.658533 CPU: family 06, model 8c, stepping 01
483 09:33:54.661467 CPU: vendor Intel device 806c1
484 09:33:54.665105 CPU: family 06, model 8c, stepping 01
485 09:33:54.668040 Clearing out pending MCEs
486 09:33:54.671613 Clearing out pending MCEs
487 09:33:54.674987 Setting up local APIC...
488 09:33:54.678198 CPU: vendor Intel device 806c1
489 09:33:54.681289 CPU: family 06, model 8c, stepping 01
490 09:33:54.681789 Initializing CPU #7
491 09:33:54.684646 Clearing out pending MCEs
492 09:33:54.687796 CPU: vendor Intel device 806c1
493 09:33:54.691224 CPU: family 06, model 8c, stepping 01
494 09:33:54.694846 Clearing out pending MCEs
495 09:33:54.697637 Setting up local APIC...
496 09:33:54.701250 Setting up local APIC...
497 09:33:54.701751 Initializing CPU #2
498 09:33:54.704324 Initializing CPU #6
499 09:33:54.707614 CPU: vendor Intel device 806c1
500 09:33:54.711096 CPU: family 06, model 8c, stepping 01
501 09:33:54.714390 Setting up local APIC...
502 09:33:54.714828 apic_id: 0x06 done.
503 09:33:54.717800
504 09:33:54.718239 Initializing CPU #1
505 09:33:54.721201 CPU: vendor Intel device 806c1
506 09:33:54.723832 CPU: family 06, model 8c, stepping 01
507 09:33:54.727340 Clearing out pending MCEs
508 09:33:54.730452 Clearing out pending MCEs
509 09:33:54.733998 Setting up local APIC...
510 09:33:54.737769 CPU: vendor Intel device 806c1
511 09:33:54.740554 CPU: family 06, model 8c, stepping 01
512 09:33:54.743996 microcode: Update skipped, already up-to-date
513 09:33:54.747054 apic_id: 0x07 done.
514 09:33:54.747547 CPU #5 initialized
515 09:33:54.753635 microcode: Update skipped, already up-to-date
516 09:33:54.754364 apic_id: 0x03 done.
517 09:33:54.757135 Setting up local APIC...
518 09:33:54.760653 Clearing out pending MCEs
519 09:33:54.763376 CPU #4 initialized
520 09:33:54.763862 apic_id: 0x05 done.
521 09:33:54.767361 apic_id: 0x04 done.
522 09:33:54.769941 microcode: Update skipped, already up-to-date
523 09:33:54.776639 microcode: Update skipped, already up-to-date
524 09:33:54.777126 CPU #7 initialized
525 09:33:54.779919 CPU #3 initialized
526 09:33:54.783645 Setting up local APIC...
527 09:33:54.786599 microcode: Update skipped, already up-to-date
528 09:33:54.790189 apic_id: 0x01 done.
529 09:33:54.790628 CPU #2 initialized
530 09:33:54.792895 apic_id: 0x02 done.
531 09:33:54.796562 microcode: Update skipped, already up-to-date
532 09:33:54.803401 microcode: Update skipped, already up-to-date
533 09:33:54.803993 CPU #1 initialized
534 09:33:54.806561 CPU #6 initialized
535 09:33:54.809728 bsp_do_flight_plan done after 454 msecs.
536 09:33:54.812998 CPU: frequency set to 4400 MHz
537 09:33:54.815967 Enabling SMIs.
538 09:33:54.822497 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
539 09:33:54.837117 SATAXPCIE1 indicates PCIe NVMe is present
540 09:33:54.840596 Probing TPM: done!
541 09:33:54.843785 Connected to device vid:did:rid of 1ae0:0028:00
542 09:33:54.854106 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
543 09:33:54.857577 Initialized TPM device CR50 revision 0
544 09:33:54.861127 Enabling S0i3.4
545 09:33:54.867672 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
546 09:33:54.870688 Found a VBT of 8704 bytes after decompression
547 09:33:54.877651 cse_lite: CSE RO boot. HybridStorageMode disabled
548 09:33:54.883581 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
549 09:33:54.959194 FSPS returned 0
550 09:33:54.962313 Executing Phase 1 of FspMultiPhaseSiInit
551 09:33:54.972411 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
552 09:33:54.976192 port C0 DISC req: usage 1 usb3 1 usb2 5
553 09:33:54.979319 Raw Buffer output 0 00000511
554 09:33:54.982306 Raw Buffer output 1 00000000
555 09:33:54.986474 pmc_send_ipc_cmd succeeded
556 09:33:54.993305 port C1 DISC req: usage 1 usb3 2 usb2 3
557 09:33:54.993833 Raw Buffer output 0 00000321
558 09:33:54.995976 Raw Buffer output 1 00000000
559 09:33:55.000442 pmc_send_ipc_cmd succeeded
560 09:33:55.005748 Detected 4 core, 8 thread CPU.
561 09:33:55.008898 Detected 4 core, 8 thread CPU.
562 09:33:55.209238 Display FSP Version Info HOB
563 09:33:55.212207 Reference Code - CPU = a.0.4c.31
564 09:33:55.216045 uCode Version = 0.0.0.86
565 09:33:55.218893 TXT ACM version = ff.ff.ff.ffff
566 09:33:55.222335 Reference Code - ME = a.0.4c.31
567 09:33:55.225321 MEBx version = 0.0.0.0
568 09:33:55.228792 ME Firmware Version = Consumer SKU
569 09:33:55.232405 Reference Code - PCH = a.0.4c.31
570 09:33:55.236472 PCH-CRID Status = Disabled
571 09:33:55.239894 PCH-CRID Original Value = ff.ff.ff.ffff
572 09:33:55.243089 PCH-CRID New Value = ff.ff.ff.ffff
573 09:33:55.246713 OPROM - RST - RAID = ff.ff.ff.ffff
574 09:33:55.249592 PCH Hsio Version = 4.0.0.0
575 09:33:55.253281 Reference Code - SA - System Agent = a.0.4c.31
576 09:33:55.256364 Reference Code - MRC = 2.0.0.1
577 09:33:55.259404 SA - PCIe Version = a.0.4c.31
578 09:33:55.262965 SA-CRID Status = Disabled
579 09:33:55.266394 SA-CRID Original Value = 0.0.0.1
580 09:33:55.266871 SA-CRID New Value = 0.0.0.1
581 09:33:55.269131
582 09:33:55.269610 OPROM - VBIOS = ff.ff.ff.ffff
583 09:33:55.275903 IO Manageability Engine FW Version = 11.1.4.0
584 09:33:55.279514 PHY Build Version = 0.0.0.e0
585 09:33:55.282581 Thunderbolt(TM) FW Version = 0.0.0.0
586 09:33:55.288921 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
587 09:33:55.292484 ITSS IRQ Polarities Before:
588 09:33:55.292926 IPC0: 0xffffffff
589 09:33:55.295529 IPC1: 0xffffffff
590 09:33:55.295969 IPC2: 0xffffffff
591 09:33:55.298956 IPC3: 0xffffffff
592 09:33:55.302379 ITSS IRQ Polarities After:
593 09:33:55.302816 IPC0: 0xffffffff
594 09:33:55.305385 IPC1: 0xffffffff
595 09:33:55.305863 IPC2: 0xffffffff
596 09:33:55.308891 IPC3: 0xffffffff
597 09:33:55.312284 Found PCIe Root Port #9 at PCI: 00:1d.0.
598 09:33:55.325545 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
599 09:33:55.335031 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
600 09:33:55.348422 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
601 09:33:55.355357 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
602 09:33:55.355943 Enumerating buses...
603 09:33:55.358138
604 09:33:55.361699 Show all devs... Before device enumeration.
605 09:33:55.364903 Root Device: enabled 1
606 09:33:55.365388 DOMAIN: 0000: enabled 1
607 09:33:55.368419 CPU_CLUSTER: 0: enabled 1
608 09:33:55.371344 PCI: 00:00.0: enabled 1
609 09:33:55.374456 PCI: 00:02.0: enabled 1
610 09:33:55.374899 PCI: 00:04.0: enabled 1
611 09:33:55.377988 PCI: 00:05.0: enabled 1
612 09:33:55.381198 PCI: 00:06.0: enabled 0
613 09:33:55.384783 PCI: 00:07.0: enabled 0
614 09:33:55.385226 PCI: 00:07.1: enabled 0
615 09:33:55.387976 PCI: 00:07.2: enabled 0
616 09:33:55.390917 PCI: 00:07.3: enabled 0
617 09:33:55.394521 PCI: 00:08.0: enabled 1
618 09:33:55.394961 PCI: 00:09.0: enabled 0
619 09:33:55.397542 PCI: 00:0a.0: enabled 0
620 09:33:55.401149 PCI: 00:0d.0: enabled 1
621 09:33:55.401618 PCI: 00:0d.1: enabled 0
622 09:33:55.404095
623 09:33:55.404538 PCI: 00:0d.2: enabled 0
624 09:33:55.407514 PCI: 00:0d.3: enabled 0
625 09:33:55.411110 PCI: 00:0e.0: enabled 0
626 09:33:55.411553 PCI: 00:10.2: enabled 1
627 09:33:55.414024 PCI: 00:10.6: enabled 0
628 09:33:55.417898 PCI: 00:10.7: enabled 0
629 09:33:55.420481 PCI: 00:12.0: enabled 0
630 09:33:55.420927 PCI: 00:12.6: enabled 0
631 09:33:55.424062 PCI: 00:13.0: enabled 0
632 09:33:55.427163 PCI: 00:14.0: enabled 1
633 09:33:55.430809 PCI: 00:14.1: enabled 0
634 09:33:55.431250 PCI: 00:14.2: enabled 1
635 09:33:55.433634 PCI: 00:14.3: enabled 1
636 09:33:55.437112 PCI: 00:15.0: enabled 1
637 09:33:55.440196 PCI: 00:15.1: enabled 1
638 09:33:55.440638 PCI: 00:15.2: enabled 1
639 09:33:55.444119 PCI: 00:15.3: enabled 1
640 09:33:55.446901 PCI: 00:16.0: enabled 1
641 09:33:55.450699 PCI: 00:16.1: enabled 0
642 09:33:55.451146 PCI: 00:16.2: enabled 0
643 09:33:55.453839 PCI: 00:16.3: enabled 0
644 09:33:55.456917 PCI: 00:16.4: enabled 0
645 09:33:55.460395 PCI: 00:16.5: enabled 0
646 09:33:55.460868 PCI: 00:17.0: enabled 1
647 09:33:55.463679 PCI: 00:19.0: enabled 0
648 09:33:55.466767 PCI: 00:19.1: enabled 1
649 09:33:55.470630 PCI: 00:19.2: enabled 0
650 09:33:55.471176 PCI: 00:1c.0: enabled 1
651 09:33:55.473226 PCI: 00:1c.1: enabled 0
652 09:33:55.476702 PCI: 00:1c.2: enabled 0
653 09:33:55.477143 PCI: 00:1c.3: enabled 0
654 09:33:55.480146
655 09:33:55.480590 PCI: 00:1c.4: enabled 0
656 09:33:55.483190 PCI: 00:1c.5: enabled 0
657 09:33:55.486373 PCI: 00:1c.6: enabled 1
658 09:33:55.486816 PCI: 00:1c.7: enabled 0
659 09:33:55.489903 PCI: 00:1d.0: enabled 1
660 09:33:55.492986 PCI: 00:1d.1: enabled 0
661 09:33:55.496554 PCI: 00:1d.2: enabled 1
662 09:33:55.496994 PCI: 00:1d.3: enabled 0
663 09:33:55.499534 PCI: 00:1e.0: enabled 1
664 09:33:55.503148 PCI: 00:1e.1: enabled 0
665 09:33:55.505975 PCI: 00:1e.2: enabled 1
666 09:33:55.506416 PCI: 00:1e.3: enabled 1
667 09:33:55.509692 PCI: 00:1f.0: enabled 1
668 09:33:55.512924 PCI: 00:1f.1: enabled 0
669 09:33:55.516003 PCI: 00:1f.2: enabled 1
670 09:33:55.516446 PCI: 00:1f.3: enabled 1
671 09:33:55.519410 PCI: 00:1f.4: enabled 0
672 09:33:55.522890 PCI: 00:1f.5: enabled 1
673 09:33:55.525990 PCI: 00:1f.6: enabled 0
674 09:33:55.526430 PCI: 00:1f.7: enabled 0
675 09:33:55.529323 APIC: 00: enabled 1
676 09:33:55.532487 GENERIC: 0.0: enabled 1
677 09:33:55.532956 GENERIC: 0.0: enabled 1
678 09:33:55.535983 GENERIC: 1.0: enabled 1
679 09:33:55.539058 GENERIC: 0.0: enabled 1
680 09:33:55.542413 GENERIC: 1.0: enabled 1
681 09:33:55.542876 USB0 port 0: enabled 1
682 09:33:55.546072 GENERIC: 0.0: enabled 1
683 09:33:55.548860 USB0 port 0: enabled 1
684 09:33:55.552612 GENERIC: 0.0: enabled 1
685 09:33:55.553045 I2C: 00:1a: enabled 1
686 09:33:55.555806 I2C: 00:31: enabled 1
687 09:33:55.558728 I2C: 00:32: enabled 1
688 09:33:55.559157 I2C: 00:10: enabled 1
689 09:33:55.562387 I2C: 00:15: enabled 1
690 09:33:55.565526 GENERIC: 0.0: enabled 0
691 09:33:55.565959 GENERIC: 1.0: enabled 0
692 09:33:55.569310 GENERIC: 0.0: enabled 1
693 09:33:55.572214 SPI: 00: enabled 1
694 09:33:55.572648 SPI: 00: enabled 1
695 09:33:55.575353 PNP: 0c09.0: enabled 1
696 09:33:55.578937 GENERIC: 0.0: enabled 1
697 09:33:55.582184 USB3 port 0: enabled 1
698 09:33:55.582616 USB3 port 1: enabled 1
699 09:33:55.585252 USB3 port 2: enabled 0
700 09:33:55.588908 USB3 port 3: enabled 0
701 09:33:55.589440 USB2 port 0: enabled 0
702 09:33:55.591794 USB2 port 1: enabled 1
703 09:33:55.595377 USB2 port 2: enabled 1
704 09:33:55.598512 USB2 port 3: enabled 0
705 09:33:55.598945 USB2 port 4: enabled 1
706 09:33:55.601398 USB2 port 5: enabled 0
707 09:33:55.604972 USB2 port 6: enabled 0
708 09:33:55.605402 USB2 port 7: enabled 0
709 09:33:55.608460 USB2 port 8: enabled 0
710 09:33:55.611522 USB2 port 9: enabled 0
711 09:33:55.615104 USB3 port 0: enabled 0
712 09:33:55.615535 USB3 port 1: enabled 1
713 09:33:55.618139 USB3 port 2: enabled 0
714 09:33:55.621327 USB3 port 3: enabled 0
715 09:33:55.621411 GENERIC: 0.0: enabled 1
716 09:33:55.624173 GENERIC: 1.0: enabled 1
717 09:33:55.627497 APIC: 01: enabled 1
718 09:33:55.627582 APIC: 03: enabled 1
719 09:33:55.630995 APIC: 04: enabled 1
720 09:33:55.633973 APIC: 07: enabled 1
721 09:33:55.634057 APIC: 06: enabled 1
722 09:33:55.637587 APIC: 02: enabled 1
723 09:33:55.637670 APIC: 05: enabled 1
724 09:33:55.640651
725 09:33:55.640740 Compare with tree...
726 09:33:55.644091 Root Device: enabled 1
727 09:33:55.647796 DOMAIN: 0000: enabled 1
728 09:33:55.647879 PCI: 00:00.0: enabled 1
729 09:33:55.650743 PCI: 00:02.0: enabled 1
730 09:33:55.654120 PCI: 00:04.0: enabled 1
731 09:33:55.657122 GENERIC: 0.0: enabled 1
732 09:33:55.660386 PCI: 00:05.0: enabled 1
733 09:33:55.660470 PCI: 00:06.0: enabled 0
734 09:33:55.663753
735 09:33:55.663837 PCI: 00:07.0: enabled 0
736 09:33:55.667051 GENERIC: 0.0: enabled 1
737 09:33:55.670769 PCI: 00:07.1: enabled 0
738 09:33:55.673820 GENERIC: 1.0: enabled 1
739 09:33:55.676718 PCI: 00:07.2: enabled 0
740 09:33:55.676879 GENERIC: 0.0: enabled 1
741 09:33:55.680372 PCI: 00:07.3: enabled 0
742 09:33:55.683480 GENERIC: 1.0: enabled 1
743 09:33:55.686979 PCI: 00:08.0: enabled 1
744 09:33:55.690135 PCI: 00:09.0: enabled 0
745 09:33:55.690263 PCI: 00:0a.0: enabled 0
746 09:33:55.693771 PCI: 00:0d.0: enabled 1
747 09:33:55.697056 USB0 port 0: enabled 1
748 09:33:55.699990 USB3 port 0: enabled 1
749 09:33:55.703658 USB3 port 1: enabled 1
750 09:33:55.706655 USB3 port 2: enabled 0
751 09:33:55.706916 USB3 port 3: enabled 0
752 09:33:55.710068 PCI: 00:0d.1: enabled 0
753 09:33:55.713143 PCI: 00:0d.2: enabled 0
754 09:33:55.716632 GENERIC: 0.0: enabled 1
755 09:33:55.719731 PCI: 00:0d.3: enabled 0
756 09:33:55.720115 PCI: 00:0e.0: enabled 0
757 09:33:55.723159 PCI: 00:10.2: enabled 1
758 09:33:55.726648 PCI: 00:10.6: enabled 0
759 09:33:55.729637 PCI: 00:10.7: enabled 0
760 09:33:55.733208 PCI: 00:12.0: enabled 0
761 09:33:55.733745 PCI: 00:12.6: enabled 0
762 09:33:55.736236 PCI: 00:13.0: enabled 0
763 09:33:55.739868 PCI: 00:14.0: enabled 1
764 09:33:55.742918 USB0 port 0: enabled 1
765 09:33:55.746568 USB2 port 0: enabled 0
766 09:33:55.747012 USB2 port 1: enabled 1
767 09:33:55.749703
768 09:33:55.750145 USB2 port 2: enabled 1
769 09:33:55.753064 USB2 port 3: enabled 0
770 09:33:55.756347 USB2 port 4: enabled 1
771 09:33:55.759683 USB2 port 5: enabled 0
772 09:33:55.762653 USB2 port 6: enabled 0
773 09:33:55.763143 USB2 port 7: enabled 0
774 09:33:55.765862 USB2 port 8: enabled 0
775 09:33:55.769727 USB2 port 9: enabled 0
776 09:33:55.772434 USB3 port 0: enabled 0
777 09:33:55.775993 USB3 port 1: enabled 1
778 09:33:55.779235 USB3 port 2: enabled 0
779 09:33:55.779780 USB3 port 3: enabled 0
780 09:33:55.782535 PCI: 00:14.1: enabled 0
781 09:33:55.785977 PCI: 00:14.2: enabled 1
782 09:33:55.789108 PCI: 00:14.3: enabled 1
783 09:33:55.792199 GENERIC: 0.0: enabled 1
784 09:33:55.792643 PCI: 00:15.0: enabled 1
785 09:33:55.795610
786 09:33:55.796055 I2C: 00:1a: enabled 1
787 09:33:55.798762 I2C: 00:31: enabled 1
788 09:33:55.802400 I2C: 00:32: enabled 1
789 09:33:55.805308 PCI: 00:15.1: enabled 1
790 09:33:55.805788 I2C: 00:10: enabled 1
791 09:33:55.808882 PCI: 00:15.2: enabled 1
792 09:33:55.811945 PCI: 00:15.3: enabled 1
793 09:33:55.815384 PCI: 00:16.0: enabled 1
794 09:33:55.818826 PCI: 00:16.1: enabled 0
795 09:33:55.819294 PCI: 00:16.2: enabled 0
796 09:33:55.821798 PCI: 00:16.3: enabled 0
797 09:33:55.825225 PCI: 00:16.4: enabled 0
798 09:33:55.828446 PCI: 00:16.5: enabled 0
799 09:33:55.831901 PCI: 00:17.0: enabled 1
800 09:33:55.832346 PCI: 00:19.0: enabled 0
801 09:33:55.835477 PCI: 00:19.1: enabled 1
802 09:33:55.885035 I2C: 00:15: enabled 1
803 09:33:55.885607 PCI: 00:19.2: enabled 0
804 09:33:55.886330 PCI: 00:1d.0: enabled 1
805 09:33:55.886704 GENERIC: 0.0: enabled 1
806 09:33:55.887033 PCI: 00:1e.0: enabled 1
807 09:33:55.887382 PCI: 00:1e.1: enabled 0
808 09:33:55.887714 PCI: 00:1e.2: enabled 1
809 09:33:55.888043 SPI: 00: enabled 1
810 09:33:55.888364 PCI: 00:1e.3: enabled 1
811 09:33:55.888657 SPI: 00: enabled 1
812 09:33:55.888944 PCI: 00:1f.0: enabled 1
813 09:33:55.889234 PNP: 0c09.0: enabled 1
814 09:33:55.889548 PCI: 00:1f.1: enabled 0
815 09:33:55.889840 PCI: 00:1f.2: enabled 1
816 09:33:55.890125 GENERIC: 0.0: enabled 1
817 09:33:55.890407 GENERIC: 0.0: enabled 1
818 09:33:55.890693 GENERIC: 1.0: enabled 1
819 09:33:55.890980 PCI: 00:1f.3: enabled 1
820 09:33:55.891264 PCI: 00:1f.4: enabled 0
821 09:33:55.936774 PCI: 00:1f.5: enabled 1
822 09:33:55.937223 PCI: 00:1f.6: enabled 0
823 09:33:55.937612 PCI: 00:1f.7: enabled 0
824 09:33:55.937963 CPU_CLUSTER: 0: enabled 1
825 09:33:55.938293 APIC: 00: enabled 1
826 09:33:55.938979 APIC: 01: enabled 1
827 09:33:55.939322 APIC: 03: enabled 1
828 09:33:55.939632 APIC: 04: enabled 1
829 09:33:55.939935 APIC: 07: enabled 1
830 09:33:55.940231 APIC: 06: enabled 1
831 09:33:55.940524 APIC: 02: enabled 1
832 09:33:55.940814 APIC: 05: enabled 1
833 09:33:55.941101 Root Device scanning...
834 09:33:55.941390 scan_static_bus for Root Device
835 09:33:55.941719 DOMAIN: 0000 enabled
836 09:33:55.942010 CPU_CLUSTER: 0 enabled
837 09:33:55.942300 DOMAIN: 0000 scanning...
838 09:33:55.942590 PCI: pci_scan_bus for bus 00
839 09:33:55.942876 PCI: 00:00.0 [8086/0000] ops
840 09:33:55.943162 PCI: 00:00.0 [8086/9a12] enabled
841 09:33:55.980799 PCI: 00:02.0 [8086/0000] bus ops
842 09:33:55.981246 PCI: 00:02.0 [8086/9a40] enabled
843 09:33:55.981981 PCI: 00:04.0 [8086/0000] bus ops
844 09:33:55.982341 PCI: 00:04.0 [8086/9a03] enabled
845 09:33:55.982664 PCI: 00:05.0 [8086/9a19] enabled
846 09:33:55.982974 PCI: 00:07.0 [0000/0000] hidden
847 09:33:55.983277 PCI: 00:08.0 [8086/9a11] enabled
848 09:33:55.983571 PCI: 00:0a.0 [8086/9a0d] disabled
849 09:33:55.983860 PCI: 00:0d.0 [8086/0000] bus ops
850 09:33:55.984476 PCI: 00:0d.0 [8086/9a13] enabled
851 09:33:55.984801 PCI: 00:14.0 [8086/0000] bus ops
852 09:33:55.985105 PCI: 00:14.0 [8086/a0ed] enabled
853 09:33:55.985639 PCI: 00:14.2 [8086/a0ef] enabled
854 09:33:55.986589 PCI: 00:14.3 [8086/0000] bus ops
855 09:33:55.988946 PCI: 00:14.3 [8086/a0f0] enabled
856 09:33:55.991979 PCI: 00:15.0 [8086/0000] bus ops
857 09:33:55.995445 PCI: 00:15.0 [8086/a0e8] enabled
858 09:33:55.998545 PCI: 00:15.1 [8086/0000] bus ops
859 09:33:56.002094 PCI: 00:15.1 [8086/a0e9] enabled
860 09:33:56.005216 PCI: 00:15.2 [8086/0000] bus ops
861 09:33:56.008447 PCI: 00:15.2 [8086/a0ea] enabled
862 09:33:56.011933 PCI: 00:15.3 [8086/0000] bus ops
863 09:33:56.014985 PCI: 00:15.3 [8086/a0eb] enabled
864 09:33:56.018370 PCI: 00:16.0 [8086/0000] ops
865 09:33:56.021733 PCI: 00:16.0 [8086/a0e0] enabled
866 09:33:56.024963 PCI: Static device PCI: 00:17.0 not found, disabling it.
867 09:33:56.027847
868 09:33:56.031314 PCI: 00:19.0 [8086/0000] bus ops
869 09:33:56.034391 PCI: 00:19.0 [8086/a0c5] disabled
870 09:33:56.037922 PCI: 00:19.1 [8086/0000] bus ops
871 09:33:56.040924 PCI: 00:19.1 [8086/a0c6] enabled
872 09:33:56.044390 PCI: 00:1d.0 [8086/0000] bus ops
873 09:33:56.047759 PCI: 00:1d.0 [8086/a0b0] enabled
874 09:33:56.051544 PCI: 00:1e.0 [8086/0000] ops
875 09:33:56.054396 PCI: 00:1e.0 [8086/a0a8] enabled
876 09:33:56.057192 PCI: 00:1e.2 [8086/0000] bus ops
877 09:33:56.060480 PCI: 00:1e.2 [8086/a0aa] enabled
878 09:33:56.063485 PCI: 00:1e.3 [8086/0000] bus ops
879 09:33:56.067268 PCI: 00:1e.3 [8086/a0ab] enabled
880 09:33:56.070120 PCI: 00:1f.0 [8086/0000] bus ops
881 09:33:56.073949 PCI: 00:1f.0 [8086/a087] enabled
882 09:33:56.074027 RTC Init
883 09:33:56.077085 Set power on after power failure.
884 09:33:56.080104 Disabling Deep S3
885 09:33:56.080192 Disabling Deep S3
886 09:33:56.083510 Disabling Deep S4
887 09:33:56.083621 Disabling Deep S4
888 09:33:56.087118 Disabling Deep S5
889 09:33:56.087218 Disabling Deep S5
890 09:33:56.090051
891 09:33:56.090136 PCI: 00:1f.2 [0000/0000] hidden
892 09:33:56.093385
893 09:33:56.093454 PCI: 00:1f.3 [8086/0000] bus ops
894 09:33:56.096541
895 09:33:56.096621 PCI: 00:1f.3 [8086/a0c8] enabled
896 09:33:56.100270
897 09:33:56.103345 PCI: 00:1f.5 [8086/0000] bus ops
898 09:33:56.106884 PCI: 00:1f.5 [8086/a0a4] enabled
899 09:33:56.107069 PCI: Leftover static devices:
900 09:33:56.110028
901 09:33:56.110224 PCI: 00:10.2
902 09:33:56.110321 PCI: 00:10.6
903 09:33:56.113370 PCI: 00:10.7
904 09:33:56.113584 PCI: 00:06.0
905 09:33:56.116590 PCI: 00:07.1
906 09:33:56.116793 PCI: 00:07.2
907 09:33:56.116900 PCI: 00:07.3
908 09:33:56.119698 PCI: 00:09.0
909 09:33:56.119885 PCI: 00:0d.1
910 09:33:56.123054 PCI: 00:0d.2
911 09:33:56.123244 PCI: 00:0d.3
912 09:33:56.126437 PCI: 00:0e.0
913 09:33:56.126650 PCI: 00:12.0
914 09:33:56.126788 PCI: 00:12.6
915 09:33:56.129435 PCI: 00:13.0
916 09:33:56.129639 PCI: 00:14.1
917 09:33:56.132669 PCI: 00:16.1
918 09:33:56.132867 PCI: 00:16.2
919 09:33:56.133008 PCI: 00:16.3
920 09:33:56.136030 PCI: 00:16.4
921 09:33:56.136239 PCI: 00:16.5
922 09:33:56.139575 PCI: 00:17.0
923 09:33:56.139821 PCI: 00:19.2
924 09:33:56.142596 PCI: 00:1e.1
925 09:33:56.142843 PCI: 00:1f.1
926 09:33:56.143044 PCI: 00:1f.4
927 09:33:56.146387 PCI: 00:1f.6
928 09:33:56.146694 PCI: 00:1f.7
929 09:33:56.149463 PCI: Check your devicetree.cb.
930 09:33:56.153124 PCI: 00:02.0 scanning...
931 09:33:56.156048 scan_generic_bus for PCI: 00:02.0
932 09:33:56.159366 scan_generic_bus for PCI: 00:02.0 done
933 09:33:56.166030 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
934 09:33:56.166488 PCI: 00:04.0 scanning...
935 09:33:56.169197 scan_generic_bus for PCI: 00:04.0
936 09:33:56.172591 GENERIC: 0.0 enabled
937 09:33:56.179388 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
938 09:33:56.182267 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
939 09:33:56.186001 PCI: 00:0d.0 scanning...
940 09:33:56.188869 scan_static_bus for PCI: 00:0d.0
941 09:33:56.192482 USB0 port 0 enabled
942 09:33:56.195845 USB0 port 0 scanning...
943 09:33:56.198965 scan_static_bus for USB0 port 0
944 09:33:56.199447 USB3 port 0 enabled
945 09:33:56.202152 USB3 port 1 enabled
946 09:33:56.206035 USB3 port 2 disabled
947 09:33:56.206628 USB3 port 3 disabled
948 09:33:56.208727 USB3 port 0 scanning...
949 09:33:56.212341 scan_static_bus for USB3 port 0
950 09:33:56.215380 scan_static_bus for USB3 port 0 done
951 09:33:56.221858 scan_bus: bus USB3 port 0 finished in 6 msecs
952 09:33:56.222346 USB3 port 1 scanning...
953 09:33:56.225344 scan_static_bus for USB3 port 1
954 09:33:56.228360 scan_static_bus for USB3 port 1 done
955 09:33:56.234524 scan_bus: bus USB3 port 1 finished in 6 msecs
956 09:33:56.238166 scan_static_bus for USB0 port 0 done
957 09:33:56.241610 scan_bus: bus USB0 port 0 finished in 43 msecs
958 09:33:56.247758 scan_static_bus for PCI: 00:0d.0 done
959 09:33:56.251160 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
960 09:33:56.254390 PCI: 00:14.0 scanning...
961 09:33:56.257817 scan_static_bus for PCI: 00:14.0
962 09:33:56.260882 USB0 port 0 enabled
963 09:33:56.261072 USB0 port 0 scanning...
964 09:33:56.264402 scan_static_bus for USB0 port 0
965 09:33:56.267530 USB2 port 0 disabled
966 09:33:56.271247 USB2 port 1 enabled
967 09:33:56.271685 USB2 port 2 enabled
968 09:33:56.274521 USB2 port 3 disabled
969 09:33:56.277579 USB2 port 4 enabled
970 09:33:56.278026 USB2 port 5 disabled
971 09:33:56.280963 USB2 port 6 disabled
972 09:33:56.281405 USB2 port 7 disabled
973 09:33:56.284138
974 09:33:56.284580 USB2 port 8 disabled
975 09:33:56.287627 USB2 port 9 disabled
976 09:33:56.288103 USB3 port 0 disabled
977 09:33:56.290706 USB3 port 1 enabled
978 09:33:56.294295 USB3 port 2 disabled
979 09:33:56.294793 USB3 port 3 disabled
980 09:33:56.297168 USB2 port 1 scanning...
981 09:33:56.300605 scan_static_bus for USB2 port 1
982 09:33:56.304388 scan_static_bus for USB2 port 1 done
983 09:33:56.310516 scan_bus: bus USB2 port 1 finished in 6 msecs
984 09:33:56.311151 USB2 port 2 scanning...
985 09:33:56.313986 scan_static_bus for USB2 port 2
986 09:33:56.320275 scan_static_bus for USB2 port 2 done
987 09:33:56.323547 scan_bus: bus USB2 port 2 finished in 6 msecs
988 09:33:56.326923 USB2 port 4 scanning...
989 09:33:56.329991 scan_static_bus for USB2 port 4
990 09:33:56.333439 scan_static_bus for USB2 port 4 done
991 09:33:56.336416 scan_bus: bus USB2 port 4 finished in 6 msecs
992 09:33:56.339905 USB3 port 1 scanning...
993 09:33:56.342981 scan_static_bus for USB3 port 1
994 09:33:56.346697 scan_static_bus for USB3 port 1 done
995 09:33:56.353174 scan_bus: bus USB3 port 1 finished in 6 msecs
996 09:33:56.356667 scan_static_bus for USB0 port 0 done
997 09:33:56.359690 scan_bus: bus USB0 port 0 finished in 93 msecs
998 09:33:56.363239 scan_static_bus for PCI: 00:14.0 done
999 09:33:56.369962 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1000 09:33:56.373043 PCI: 00:14.3 scanning...
1001 09:33:56.376159 scan_static_bus for PCI: 00:14.3
1002 09:33:56.376598 GENERIC: 0.0 enabled
1003 09:33:56.379872 scan_static_bus for PCI: 00:14.3 done
1004 09:33:56.383193
1005 09:33:56.386053 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1006 09:33:56.389218 PCI: 00:15.0 scanning...
1007 09:33:56.392216 scan_static_bus for PCI: 00:15.0
1008 09:33:56.392302 I2C: 00:1a enabled
1009 09:33:56.395766 I2C: 00:31 enabled
1010 09:33:56.399123 I2C: 00:32 enabled
1011 09:33:56.402244 scan_static_bus for PCI: 00:15.0 done
1012 09:33:56.405700 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1013 09:33:56.408580 PCI: 00:15.1 scanning...
1014 09:33:56.412187 scan_static_bus for PCI: 00:15.1
1015 09:33:56.415333 I2C: 00:10 enabled
1016 09:33:56.418897 scan_static_bus for PCI: 00:15.1 done
1017 09:33:56.421985 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1018 09:33:56.425020 PCI: 00:15.2 scanning...
1019 09:33:56.428476 scan_static_bus for PCI: 00:15.2
1020 09:33:56.431858 scan_static_bus for PCI: 00:15.2 done
1021 09:33:56.438445 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1022 09:33:56.438532 PCI: 00:15.3 scanning...
1023 09:33:56.444585 scan_static_bus for PCI: 00:15.3
1024 09:33:56.447955 scan_static_bus for PCI: 00:15.3 done
1025 09:33:56.451453 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1026 09:33:56.454614 PCI: 00:19.1 scanning...
1027 09:33:56.457954 scan_static_bus for PCI: 00:19.1
1028 09:33:56.461604 I2C: 00:15 enabled
1029 09:33:56.464543 scan_static_bus for PCI: 00:19.1 done
1030 09:33:56.468155 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1031 09:33:56.471716 PCI: 00:1d.0 scanning...
1032 09:33:56.474732 do_pci_scan_bridge for PCI: 00:1d.0
1033 09:33:56.478455 PCI: pci_scan_bus for bus 01
1034 09:33:56.481967 PCI: 01:00.0 [15b7/5009] enabled
1035 09:33:56.482051 GENERIC: 0.0 enabled
1036 09:33:56.485401 Enabling Common Clock Configuration
1037 09:33:56.488563
1038 09:33:56.491648 L1 Sub-State supported from root port 29
1039 09:33:56.495228 L1 Sub-State Support = 0x5
1040 09:33:56.495313 CommonModeRestoreTime = 0x28
1041 09:33:56.498432
1042 09:33:56.501835 Power On Value = 0x16, Power On Scale = 0x0
1043 09:33:56.501920 ASPM: Enabled L1
1044 09:33:56.508232 PCIe: Max_Payload_Size adjusted to 128
1045 09:33:56.511759 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1046 09:33:56.515024 PCI: 00:1e.2 scanning...
1047 09:33:56.518122 scan_generic_bus for PCI: 00:1e.2
1048 09:33:56.518211 SPI: 00 enabled
1049 09:33:56.524744 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1050 09:33:56.531122 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1051 09:33:56.531204 PCI: 00:1e.3 scanning...
1052 09:33:56.538207 scan_generic_bus for PCI: 00:1e.3
1053 09:33:56.538293 SPI: 00 enabled
1054 09:33:56.544587 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1055 09:33:56.548029 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1056 09:33:56.551539 PCI: 00:1f.0 scanning...
1057 09:33:56.554692 scan_static_bus for PCI: 00:1f.0
1058 09:33:56.558112 PNP: 0c09.0 enabled
1059 09:33:56.561151 PNP: 0c09.0 scanning...
1060 09:33:56.564792 scan_static_bus for PNP: 0c09.0
1061 09:33:56.567759 scan_static_bus for PNP: 0c09.0 done
1062 09:33:56.571168 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1063 09:33:56.574219 scan_static_bus for PCI: 00:1f.0 done
1064 09:33:56.580997 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1065 09:33:56.581087 PCI: 00:1f.2 scanning...
1066 09:33:56.584673 scan_static_bus for PCI: 00:1f.2
1067 09:33:56.588120 GENERIC: 0.0 enabled
1068 09:33:56.591327 GENERIC: 0.0 scanning...
1069 09:33:56.594806 scan_static_bus for GENERIC: 0.0
1070 09:33:56.597853 GENERIC: 0.0 enabled
1071 09:33:56.597968 GENERIC: 1.0 enabled
1072 09:33:56.600949 scan_static_bus for GENERIC: 0.0 done
1073 09:33:56.608133 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1074 09:33:56.611125 scan_static_bus for PCI: 00:1f.2 done
1075 09:33:56.614200 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1076 09:33:56.617872 PCI: 00:1f.3 scanning...
1077 09:33:56.621051 scan_static_bus for PCI: 00:1f.3
1078 09:33:56.624589 scan_static_bus for PCI: 00:1f.3 done
1079 09:33:56.627602
1080 09:33:56.631175 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1081 09:33:56.634132 PCI: 00:1f.5 scanning...
1082 09:33:56.637698 scan_generic_bus for PCI: 00:1f.5
1083 09:33:56.640715 scan_generic_bus for PCI: 00:1f.5 done
1084 09:33:56.644145 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1085 09:33:56.650674 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1086 09:33:56.654065 scan_static_bus for Root Device done
1087 09:33:56.657268 scan_bus: bus Root Device finished in 735 msecs
1088 09:33:56.660823 done
1089 09:33:56.667381 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1090 09:33:56.667826 Chrome EC: UHEPI supported
1091 09:33:56.674077 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1092 09:33:56.680961 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1093 09:33:56.684044 SPI flash protection: WPSW=0 SRP0=1
1094 09:33:56.690889 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1095 09:33:56.693783 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1096 09:33:56.697597 found VGA at PCI: 00:02.0
1097 09:33:56.700539 Setting up VGA for PCI: 00:02.0
1098 09:33:56.708003 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1099 09:33:56.710418 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1100 09:33:56.714032 Allocating resources...
1101 09:33:56.717534 Reading resources...
1102 09:33:56.720320 Root Device read_resources bus 0 link: 0
1103 09:33:56.724095 DOMAIN: 0000 read_resources bus 0 link: 0
1104 09:33:56.730558 PCI: 00:04.0 read_resources bus 1 link: 0
1105 09:33:56.734031 PCI: 00:04.0 read_resources bus 1 link: 0 done
1106 09:33:56.740435 PCI: 00:0d.0 read_resources bus 0 link: 0
1107 09:33:56.743494 USB0 port 0 read_resources bus 0 link: 0
1108 09:33:56.750445 USB0 port 0 read_resources bus 0 link: 0 done
1109 09:33:56.753397 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1110 09:33:56.760094 PCI: 00:14.0 read_resources bus 0 link: 0
1111 09:33:56.763152 USB0 port 0 read_resources bus 0 link: 0
1112 09:33:56.770279 USB0 port 0 read_resources bus 0 link: 0 done
1113 09:33:56.773027 PCI: 00:14.0 read_resources bus 0 link: 0 done
1114 09:33:56.780002 PCI: 00:14.3 read_resources bus 0 link: 0
1115 09:33:56.783511 PCI: 00:14.3 read_resources bus 0 link: 0 done
1116 09:33:56.789438 PCI: 00:15.0 read_resources bus 0 link: 0
1117 09:33:56.793028 PCI: 00:15.0 read_resources bus 0 link: 0 done
1118 09:33:56.799619 PCI: 00:15.1 read_resources bus 0 link: 0
1119 09:33:56.802698 PCI: 00:15.1 read_resources bus 0 link: 0 done
1120 09:33:56.809582 PCI: 00:19.1 read_resources bus 0 link: 0
1121 09:33:56.813172 PCI: 00:19.1 read_resources bus 0 link: 0 done
1122 09:33:56.819324 PCI: 00:1d.0 read_resources bus 1 link: 0
1123 09:33:56.822887 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1124 09:33:56.829330 PCI: 00:1e.2 read_resources bus 2 link: 0
1125 09:33:56.832795 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1126 09:33:56.839364 PCI: 00:1e.3 read_resources bus 3 link: 0
1127 09:33:56.842781 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1128 09:33:56.849297 PCI: 00:1f.0 read_resources bus 0 link: 0
1129 09:33:56.852825 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1130 09:33:56.859463 PCI: 00:1f.2 read_resources bus 0 link: 0
1131 09:33:56.862473 GENERIC: 0.0 read_resources bus 0 link: 0
1132 09:33:56.868933 GENERIC: 0.0 read_resources bus 0 link: 0 done
1133 09:33:56.872107 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1134 09:33:56.878989 DOMAIN: 0000 read_resources bus 0 link: 0 done
1135 09:33:56.881915 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1136 09:33:56.888558 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1137 09:33:56.892141 Root Device read_resources bus 0 link: 0 done
1138 09:33:56.895065 Done reading resources.
1139 09:33:56.901532 Show resources in subtree (Root Device)...After reading.
1140 09:33:56.905211 Root Device child on link 0 DOMAIN: 0000
1141 09:33:56.908284 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1142 09:33:56.918377 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1143 09:33:56.928075 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1144 09:33:56.931172 PCI: 00:00.0
1145 09:33:56.941065 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1146 09:33:56.948078 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1147 09:33:56.957561 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1148 09:33:56.967437 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1149 09:33:56.977595 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1150 09:33:56.987587 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1151 09:33:56.997303 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1152 09:33:57.004038 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1153 09:33:57.013660 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1154 09:33:57.023308 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1155 09:33:57.033357 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1156 09:33:57.043017 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1157 09:33:57.053016 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1158 09:33:57.059364 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1159 09:33:57.069684 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1160 09:33:57.079214 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1161 09:33:57.089302 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1162 09:33:57.099149 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1163 09:33:57.108690 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1164 09:33:57.118881 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1165 09:33:57.119316 PCI: 00:02.0
1166 09:33:57.128468 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1167 09:33:57.132020
1168 09:33:57.141601 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1169 09:33:57.148149 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1170 09:33:57.155286 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1171 09:33:57.164672 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1172 09:33:57.165255 GENERIC: 0.0
1173 09:33:57.168037 PCI: 00:05.0
1174 09:33:57.178050 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1175 09:33:57.181047 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1176 09:33:57.184585 GENERIC: 0.0
1177 09:33:57.185069 PCI: 00:08.0
1178 09:33:57.194129 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 09:33:57.197781 PCI: 00:0a.0
1180 09:33:57.200958 PCI: 00:0d.0 child on link 0 USB0 port 0
1181 09:33:57.210737 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1182 09:33:57.214151 USB0 port 0 child on link 0 USB3 port 0
1183 09:33:57.217988 USB3 port 0
1184 09:33:57.220768 USB3 port 1
1185 09:33:57.221353 USB3 port 2
1186 09:33:57.223829 USB3 port 3
1187 09:33:57.227623 PCI: 00:14.0 child on link 0 USB0 port 0
1188 09:33:57.237331 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1189 09:33:57.240746 USB0 port 0 child on link 0 USB2 port 0
1190 09:33:57.243949 USB2 port 0
1191 09:33:57.244435 USB2 port 1
1192 09:33:57.247244 USB2 port 2
1193 09:33:57.247727 USB2 port 3
1194 09:33:57.250300 USB2 port 4
1195 09:33:57.253644 USB2 port 5
1196 09:33:57.254167 USB2 port 6
1197 09:33:57.256552 USB2 port 7
1198 09:33:57.257117 USB2 port 8
1199 09:33:57.260217 USB2 port 9
1200 09:33:57.260699 USB3 port 0
1201 09:33:57.263740 USB3 port 1
1202 09:33:57.264231 USB3 port 2
1203 09:33:57.266798 USB3 port 3
1204 09:33:57.267323 PCI: 00:14.2
1205 09:33:57.277107 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1206 09:33:57.286691 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1207 09:33:57.293104 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1208 09:33:57.302942 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1209 09:33:57.303533 GENERIC: 0.0
1210 09:33:57.309382 PCI: 00:15.0 child on link 0 I2C: 00:1a
1211 09:33:57.319473 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 09:33:57.319965 I2C: 00:1a
1213 09:33:57.322489 I2C: 00:31
1214 09:33:57.322972 I2C: 00:32
1215 09:33:57.326080 PCI: 00:15.1 child on link 0 I2C: 00:10
1216 09:33:57.336330 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 09:33:57.339207 I2C: 00:10
1218 09:33:57.339690 PCI: 00:15.2
1219 09:33:57.348751 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 09:33:57.352449 PCI: 00:15.3
1221 09:33:57.362077 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 09:33:57.362529 PCI: 00:16.0
1223 09:33:57.372243 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 09:33:57.375496 PCI: 00:19.0
1225 09:33:57.378714 PCI: 00:19.1 child on link 0 I2C: 00:15
1226 09:33:57.388639 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 09:33:57.391933 I2C: 00:15
1228 09:33:57.395171 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1229 09:33:57.405439 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1230 09:33:57.414835 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1231 09:33:57.424879 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1232 09:33:57.425506 GENERIC: 0.0
1233 09:33:57.428512 PCI: 01:00.0
1234 09:33:57.437976 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1235 09:33:57.448071 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1236 09:33:57.448668 PCI: 00:1e.0
1237 09:33:57.460835 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1238 09:33:57.464498 PCI: 00:1e.2 child on link 0 SPI: 00
1239 09:33:57.473961 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 09:33:57.474449 SPI: 00
1241 09:33:57.477191 PCI: 00:1e.3 child on link 0 SPI: 00
1242 09:33:57.487261 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 09:33:57.490212 SPI: 00
1244 09:33:57.494043 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1245 09:33:57.503726 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1246 09:33:57.504192 PNP: 0c09.0
1247 09:33:57.513419 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1248 09:33:57.517096 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1249 09:33:57.526337 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1250 09:33:57.536616 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1251 09:33:57.539895 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1252 09:33:57.542950 GENERIC: 0.0
1253 09:33:57.546468 GENERIC: 1.0
1254 09:33:57.546904 PCI: 00:1f.3
1255 09:33:57.555863 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1256 09:33:57.565825 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1257 09:33:57.569347 PCI: 00:1f.5
1258 09:33:57.575954 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1259 09:33:57.582711 CPU_CLUSTER: 0 child on link 0 APIC: 00
1260 09:33:57.583207 APIC: 00
1261 09:33:57.583561 APIC: 01
1262 09:33:57.585963 APIC: 03
1263 09:33:57.586401 APIC: 04
1264 09:33:57.589245 APIC: 07
1265 09:33:57.589713 APIC: 06
1266 09:33:57.590058 APIC: 02
1267 09:33:57.592282 APIC: 05
1268 09:33:57.598921 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1269 09:33:57.605582 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1270 09:33:57.612053 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1271 09:33:57.618309 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1272 09:33:57.621786 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1273 09:33:57.625305 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1274 09:33:57.631898 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1275 09:33:57.641864 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1276 09:33:57.648325 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1277 09:33:57.655045 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1278 09:33:57.661547 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1279 09:33:57.667771 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1280 09:33:57.678094 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1281 09:33:57.684549 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1282 09:33:57.687638 DOMAIN: 0000: Resource ranges:
1283 09:33:57.691384 * Base: 1000, Size: 800, Tag: 100
1284 09:33:57.694371 * Base: 1900, Size: e700, Tag: 100
1285 09:33:57.700908 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1286 09:33:57.707793 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1287 09:33:57.713840 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1288 09:33:57.720591 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1289 09:33:57.727107 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1290 09:33:57.737034 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1291 09:33:57.743904 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1292 09:33:57.750133 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1293 09:33:57.760179 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1294 09:33:57.766742 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1295 09:33:57.773153 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1296 09:33:57.776671
1297 09:33:57.783288 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1298 09:33:57.789604 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1299 09:33:57.796260 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1300 09:33:57.799703
1301 09:33:57.806027 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1302 09:33:57.812443 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1303 09:33:57.822425 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1304 09:33:57.828967 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1305 09:33:57.836010 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1306 09:33:57.845441 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1307 09:33:57.852287 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1308 09:33:57.858510 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1309 09:33:57.868743 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1310 09:33:57.875311 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1311 09:33:57.881939 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1312 09:33:57.885062 DOMAIN: 0000: Resource ranges:
1313 09:33:57.891631 * Base: 7fc00000, Size: 40400000, Tag: 200
1314 09:33:57.895198 * Base: d0000000, Size: 28000000, Tag: 200
1315 09:33:57.898124 * Base: fa000000, Size: 1000000, Tag: 200
1316 09:33:57.905031 * Base: fb001000, Size: 2fff000, Tag: 200
1317 09:33:57.908323 * Base: fe010000, Size: 2e000, Tag: 200
1318 09:33:57.911309 * Base: fe03f000, Size: d41000, Tag: 200
1319 09:33:57.915032 * Base: fed88000, Size: 8000, Tag: 200
1320 09:33:57.921069 * Base: fed93000, Size: d000, Tag: 200
1321 09:33:57.924723 * Base: feda2000, Size: 1e000, Tag: 200
1322 09:33:57.927759 * Base: fede0000, Size: 1220000, Tag: 200
1323 09:33:57.934259 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1324 09:33:57.941001 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1325 09:33:57.947207 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1326 09:33:57.953864 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1327 09:33:57.960771 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1328 09:33:57.967194 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1329 09:33:57.974079 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1330 09:33:57.980510 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1331 09:33:57.987092 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1332 09:33:57.993417 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1333 09:33:57.999952 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1334 09:33:58.006411 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1335 09:33:58.013130 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1336 09:33:58.019783 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1337 09:33:58.026382 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1338 09:33:58.032748 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1339 09:33:58.039278 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1340 09:33:58.046067 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1341 09:33:58.052804 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1342 09:33:58.059171 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1343 09:33:58.066005 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1344 09:33:58.072413 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1345 09:33:58.079321 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1346 09:33:58.085412 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1347 09:33:58.095423 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1348 09:33:58.098988 PCI: 00:1d.0: Resource ranges:
1349 09:33:58.101942 * Base: 7fc00000, Size: 100000, Tag: 200
1350 09:33:58.108640 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1351 09:33:58.115124 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1352 09:33:58.124941 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1353 09:33:58.131622 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1354 09:33:58.134912 Root Device assign_resources, bus 0 link: 0
1355 09:33:58.141431 DOMAIN: 0000 assign_resources, bus 0 link: 0
1356 09:33:58.148084 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1357 09:33:58.157817 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1358 09:33:58.164333 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1359 09:33:58.174369 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1360 09:33:58.177679 PCI: 00:04.0 assign_resources, bus 1 link: 0
1361 09:33:58.180458 PCI: 00:04.0 assign_resources, bus 1 link: 0
1362 09:33:58.190458 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1363 09:33:58.197071 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1364 09:33:58.206991 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1365 09:33:58.209950 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1366 09:33:58.216728 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1367 09:33:58.223713 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1368 09:33:58.230100 PCI: 00:14.0 assign_resources, bus 0 link: 0
1369 09:33:58.233054 PCI: 00:14.0 assign_resources, bus 0 link: 0
1370 09:33:58.243098 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1371 09:33:58.249882 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1372 09:33:58.256254 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1373 09:33:58.262881 PCI: 00:14.3 assign_resources, bus 0 link: 0
1374 09:33:58.266023 PCI: 00:14.3 assign_resources, bus 0 link: 0
1375 09:33:58.276380 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1376 09:33:58.279814 PCI: 00:15.0 assign_resources, bus 0 link: 0
1377 09:33:58.286257 PCI: 00:15.0 assign_resources, bus 0 link: 0
1378 09:33:58.292553 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1379 09:33:58.295684 PCI: 00:15.1 assign_resources, bus 0 link: 0
1380 09:33:58.302585 PCI: 00:15.1 assign_resources, bus 0 link: 0
1381 09:33:58.309454 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1382 09:33:58.318698 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1383 09:33:58.325414 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1384 09:33:58.335424 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1385 09:33:58.338563 PCI: 00:19.1 assign_resources, bus 0 link: 0
1386 09:33:58.344945 PCI: 00:19.1 assign_resources, bus 0 link: 0
1387 09:33:58.351723 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1388 09:33:58.361953 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1389 09:33:58.371259 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1390 09:33:58.374950 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1391 09:33:58.384886 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1392 09:33:58.391041 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1393 09:33:58.397541 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 09:33:58.404045 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1395 09:33:58.410100 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1396 09:33:58.413723 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1397 09:33:58.424096 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1398 09:33:58.427155 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1399 09:33:58.430531 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1400 09:33:58.437112 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1401 09:33:58.440697 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1402 09:33:58.446961 LPC: Trying to open IO window from 800 size 1ff
1403 09:33:58.453850 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1404 09:33:58.463816 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1405 09:33:58.470341 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1406 09:33:58.476390 DOMAIN: 0000 assign_resources, bus 0 link: 0
1407 09:33:58.479734 Root Device assign_resources, bus 0 link: 0
1408 09:33:58.483091 Done setting resources.
1409 09:33:58.489446 Show resources in subtree (Root Device)...After assigning values.
1410 09:33:58.492833 Root Device child on link 0 DOMAIN: 0000
1411 09:33:58.496526 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1412 09:33:58.505958 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1413 09:33:58.516024 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1414 09:33:58.519490 PCI: 00:00.0
1415 09:33:58.529349 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1416 09:33:58.539172 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1417 09:33:58.545898 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1418 09:33:58.555456 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1419 09:33:58.565599 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1420 09:33:58.575396 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1421 09:33:58.585213 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1422 09:33:58.594992 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1423 09:33:58.601739 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1424 09:33:58.604756
1425 09:33:58.611454 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1426 09:33:58.620994 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1427 09:33:58.631454 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1428 09:33:58.640947 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1429 09:33:58.651086 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1430 09:33:58.657532 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1431 09:33:58.667354 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1432 09:33:58.676993 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1433 09:33:58.686799 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1434 09:33:58.696746 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1435 09:33:58.706595 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1436 09:33:58.710165 PCI: 00:02.0
1437 09:33:58.719719 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1438 09:33:58.729647 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1439 09:33:58.739679 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1440 09:33:58.742918 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1441 09:33:58.752867 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1442 09:33:58.755785 GENERIC: 0.0
1443 09:33:58.756273 PCI: 00:05.0
1444 09:33:58.769134 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1445 09:33:58.772697 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1446 09:33:58.775691 GENERIC: 0.0
1447 09:33:58.776194 PCI: 00:08.0
1448 09:33:58.785661 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1449 09:33:58.788711 PCI: 00:0a.0
1450 09:33:58.792246 PCI: 00:0d.0 child on link 0 USB0 port 0
1451 09:33:58.802397 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1452 09:33:58.808315 USB0 port 0 child on link 0 USB3 port 0
1453 09:33:58.808747 USB3 port 0
1454 09:33:58.811816 USB3 port 1
1455 09:33:58.812241 USB3 port 2
1456 09:33:58.814983 USB3 port 3
1457 09:33:58.818289 PCI: 00:14.0 child on link 0 USB0 port 0
1458 09:33:58.827902 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1459 09:33:58.831057 USB0 port 0 child on link 0 USB2 port 0
1460 09:33:58.834727
1461 09:33:58.834817 USB2 port 0
1462 09:33:58.837753 USB2 port 1
1463 09:33:58.837842 USB2 port 2
1464 09:33:58.841378 USB2 port 3
1465 09:33:58.841490 USB2 port 4
1466 09:33:58.844257 USB2 port 5
1467 09:33:58.844364 USB2 port 6
1468 09:33:58.847952 USB2 port 7
1469 09:33:58.848059 USB2 port 8
1470 09:33:58.850853 USB2 port 9
1471 09:33:58.850969 USB3 port 0
1472 09:33:58.854428 USB3 port 1
1473 09:33:58.854556 USB3 port 2
1474 09:33:58.857438
1475 09:33:58.857578 USB3 port 3
1476 09:33:58.861032 PCI: 00:14.2
1477 09:33:58.870746 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1478 09:33:58.880703 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1479 09:33:58.884180 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1480 09:33:58.893981 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1481 09:33:58.897330 GENERIC: 0.0
1482 09:33:58.901021 PCI: 00:15.0 child on link 0 I2C: 00:1a
1483 09:33:58.910494 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1484 09:33:58.913664 I2C: 00:1a
1485 09:33:58.914103 I2C: 00:31
1486 09:33:58.917376 I2C: 00:32
1487 09:33:58.920403 PCI: 00:15.1 child on link 0 I2C: 00:10
1488 09:33:58.930469 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1489 09:33:58.933452 I2C: 00:10
1490 09:33:58.933921 PCI: 00:15.2
1491 09:33:58.943510 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1492 09:33:58.946872 PCI: 00:15.3
1493 09:33:58.956502 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1494 09:33:58.957051 PCI: 00:16.0
1495 09:33:58.970000 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1496 09:33:58.970530 PCI: 00:19.0
1497 09:33:58.973525 PCI: 00:19.1 child on link 0 I2C: 00:15
1498 09:33:58.986424 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1499 09:33:58.987008 I2C: 00:15
1500 09:33:58.989285 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1501 09:33:58.999148 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1502 09:33:59.012778 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1503 09:33:59.022485 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1504 09:33:59.023074 GENERIC: 0.0
1505 09:33:59.025428
1506 09:33:59.025951 PCI: 01:00.0
1507 09:33:59.035828 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1508 09:33:59.045385 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1509 09:33:59.048406 PCI: 00:1e.0
1510 09:33:59.058536 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1511 09:33:59.061921 PCI: 00:1e.2 child on link 0 SPI: 00
1512 09:33:59.075172 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1513 09:33:59.075611 SPI: 00
1514 09:33:59.078139 PCI: 00:1e.3 child on link 0 SPI: 00
1515 09:33:59.087972 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1516 09:33:59.091453 SPI: 00
1517 09:33:59.094724 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1518 09:33:59.104513 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1519 09:33:59.105104 PNP: 0c09.0
1520 09:33:59.114505 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1521 09:33:59.117591 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1522 09:33:59.127514 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1523 09:33:59.137019 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1524 09:33:59.140670 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1525 09:33:59.143899 GENERIC: 0.0
1526 09:33:59.144422 GENERIC: 1.0
1527 09:33:59.146981 PCI: 00:1f.3
1528 09:33:59.157216 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1529 09:33:59.167141 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1530 09:33:59.170274 PCI: 00:1f.5
1531 09:33:59.179974 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1532 09:33:59.182991 CPU_CLUSTER: 0 child on link 0 APIC: 00
1533 09:33:59.186531 APIC: 00
1534 09:33:59.187025 APIC: 01
1535 09:33:59.187513 APIC: 03
1536 09:33:59.189616 APIC: 04
1537 09:33:59.190113 APIC: 07
1538 09:33:59.192935 APIC: 06
1539 09:33:59.193419 APIC: 02
1540 09:33:59.193893 APIC: 05
1541 09:33:59.196445 Done allocating resources.
1542 09:33:59.203010 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1543 09:33:59.209546 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1544 09:33:59.213016 Configure GPIOs for I2S audio on UP4.
1545 09:33:59.219528 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1546 09:33:59.222941 Enabling resources...
1547 09:33:59.225945 PCI: 00:00.0 subsystem <- 8086/9a12
1548 09:33:59.229305 PCI: 00:00.0 cmd <- 06
1549 09:33:59.232516 PCI: 00:02.0 subsystem <- 8086/9a40
1550 09:33:59.236009 PCI: 00:02.0 cmd <- 03
1551 09:33:59.239352 PCI: 00:04.0 subsystem <- 8086/9a03
1552 09:33:59.239805 PCI: 00:04.0 cmd <- 02
1553 09:33:59.242417
1554 09:33:59.245435 PCI: 00:05.0 subsystem <- 8086/9a19
1555 09:33:59.245937 PCI: 00:05.0 cmd <- 02
1556 09:33:59.252526 PCI: 00:08.0 subsystem <- 8086/9a11
1557 09:33:59.252967 PCI: 00:08.0 cmd <- 06
1558 09:33:59.255722 PCI: 00:0d.0 subsystem <- 8086/9a13
1559 09:33:59.258805 PCI: 00:0d.0 cmd <- 02
1560 09:33:59.262364 PCI: 00:14.0 subsystem <- 8086/a0ed
1561 09:33:59.265265 PCI: 00:14.0 cmd <- 02
1562 09:33:59.268875 PCI: 00:14.2 subsystem <- 8086/a0ef
1563 09:33:59.272016 PCI: 00:14.2 cmd <- 02
1564 09:33:59.275083 PCI: 00:14.3 subsystem <- 8086/a0f0
1565 09:33:59.278850 PCI: 00:14.3 cmd <- 02
1566 09:33:59.281839 PCI: 00:15.0 subsystem <- 8086/a0e8
1567 09:33:59.285004 PCI: 00:15.0 cmd <- 02
1568 09:33:59.288686 PCI: 00:15.1 subsystem <- 8086/a0e9
1569 09:33:59.291774 PCI: 00:15.1 cmd <- 02
1570 09:33:59.294935 PCI: 00:15.2 subsystem <- 8086/a0ea
1571 09:33:59.298354 PCI: 00:15.2 cmd <- 02
1572 09:33:59.301342 PCI: 00:15.3 subsystem <- 8086/a0eb
1573 09:33:59.301889 PCI: 00:15.3 cmd <- 02
1574 09:33:59.307967 PCI: 00:16.0 subsystem <- 8086/a0e0
1575 09:33:59.308456 PCI: 00:16.0 cmd <- 02
1576 09:33:59.311313 PCI: 00:19.1 subsystem <- 8086/a0c6
1577 09:33:59.314991 PCI: 00:19.1 cmd <- 02
1578 09:33:59.318033 PCI: 00:1d.0 bridge ctrl <- 0013
1579 09:33:59.321200 PCI: 00:1d.0 subsystem <- 8086/a0b0
1580 09:33:59.324496 PCI: 00:1d.0 cmd <- 06
1581 09:33:59.327986 PCI: 00:1e.0 subsystem <- 8086/a0a8
1582 09:33:59.330986 PCI: 00:1e.0 cmd <- 06
1583 09:33:59.334431 PCI: 00:1e.2 subsystem <- 8086/a0aa
1584 09:33:59.337562 PCI: 00:1e.2 cmd <- 06
1585 09:33:59.341093 PCI: 00:1e.3 subsystem <- 8086/a0ab
1586 09:33:59.344274 PCI: 00:1e.3 cmd <- 02
1587 09:33:59.347501 PCI: 00:1f.0 subsystem <- 8086/a087
1588 09:33:59.350921 PCI: 00:1f.0 cmd <- 407
1589 09:33:59.354028 PCI: 00:1f.3 subsystem <- 8086/a0c8
1590 09:33:59.357720 PCI: 00:1f.3 cmd <- 02
1591 09:33:59.360614 PCI: 00:1f.5 subsystem <- 8086/a0a4
1592 09:33:59.361056 PCI: 00:1f.5 cmd <- 406
1593 09:33:59.363698
1594 09:33:59.366995 PCI: 01:00.0 cmd <- 02
1595 09:33:59.370992 done.
1596 09:33:59.374244 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1597 09:33:59.377153 Initializing devices...
1598 09:33:59.381089 Root Device init
1599 09:33:59.384211 Chrome EC: Set SMI mask to 0x0000000000000000
1600 09:33:59.391533 Chrome EC: clear events_b mask to 0x0000000000000000
1601 09:33:59.397907 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1602 09:33:59.404552 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1603 09:33:59.411236 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1604 09:33:59.414305 Chrome EC: Set WAKE mask to 0x0000000000000000
1605 09:33:59.417686
1606 09:33:59.421150 fw_config match found: DB_USB=USB3_ACTIVE
1607 09:33:59.427413 Configure Right Type-C port orientation for retimer
1608 09:33:59.430700 Root Device init finished in 46 msecs
1609 09:33:59.433789 PCI: 00:00.0 init
1610 09:33:59.437316 CPU TDP = 9 Watts
1611 09:33:59.437834 CPU PL1 = 9 Watts
1612 09:33:59.440602 CPU PL2 = 40 Watts
1613 09:33:59.441091 CPU PL4 = 83 Watts
1614 09:33:59.446834 PCI: 00:00.0 init finished in 8 msecs
1615 09:33:59.447311 PCI: 00:02.0 init
1616 09:33:59.450493 GMA: Found VBT in CBFS
1617 09:33:59.453467 GMA: Found valid VBT in CBFS
1618 09:33:59.460324 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1619 09:33:59.467371 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1620 09:33:59.470362 PCI: 00:02.0 init finished in 18 msecs
1621 09:33:59.473723 PCI: 00:05.0 init
1622 09:33:59.476979 PCI: 00:05.0 init finished in 0 msecs
1623 09:33:59.480222 PCI: 00:08.0 init
1624 09:33:59.483551 PCI: 00:08.0 init finished in 0 msecs
1625 09:33:59.486450 PCI: 00:14.0 init
1626 09:33:59.490050 PCI: 00:14.0 init finished in 0 msecs
1627 09:33:59.493074 PCI: 00:14.2 init
1628 09:33:59.496390 PCI: 00:14.2 init finished in 0 msecs
1629 09:33:59.496835 PCI: 00:15.0 init
1630 09:33:59.500024 I2C bus 0 version 0x3230302a
1631 09:33:59.502734 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1632 09:33:59.506294
1633 09:33:59.509274 PCI: 00:15.0 init finished in 6 msecs
1634 09:33:59.509864 PCI: 00:15.1 init
1635 09:33:59.512826 I2C bus 1 version 0x3230302a
1636 09:33:59.516156 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1637 09:33:59.519283 PCI: 00:15.1 init finished in 6 msecs
1638 09:33:59.522355
1639 09:33:59.522869 PCI: 00:15.2 init
1640 09:33:59.525912 I2C bus 2 version 0x3230302a
1641 09:33:59.528928 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1642 09:33:59.532254 PCI: 00:15.2 init finished in 6 msecs
1643 09:33:59.535813 PCI: 00:15.3 init
1644 09:33:59.538880 I2C bus 3 version 0x3230302a
1645 09:33:59.542529 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1646 09:33:59.545444 PCI: 00:15.3 init finished in 6 msecs
1647 09:33:59.549206 PCI: 00:16.0 init
1648 09:33:59.552233 PCI: 00:16.0 init finished in 0 msecs
1649 09:33:59.555348 PCI: 00:19.1 init
1650 09:33:59.558494 I2C bus 5 version 0x3230302a
1651 09:33:59.562077 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1652 09:33:59.565248 PCI: 00:19.1 init finished in 6 msecs
1653 09:33:59.568384 PCI: 00:1d.0 init
1654 09:33:59.571765 Initializing PCH PCIe bridge.
1655 09:33:59.575040 PCI: 00:1d.0 init finished in 3 msecs
1656 09:33:59.578228 PCI: 00:1f.0 init
1657 09:33:59.581942 IOAPIC: Initializing IOAPIC at 0xfec00000
1658 09:33:59.584783 IOAPIC: Bootstrap Processor Local APIC = 0x00
1659 09:33:59.588388 IOAPIC: ID = 0x02
1660 09:33:59.591447 IOAPIC: Dumping registers
1661 09:33:59.591976 reg 0x0000: 0x02000000
1662 09:33:59.594614 reg 0x0001: 0x00770020
1663 09:33:59.598150 reg 0x0002: 0x00000000
1664 09:33:59.601619 PCI: 00:1f.0 init finished in 21 msecs
1665 09:33:59.604484 PCI: 00:1f.2 init
1666 09:33:59.608012 Disabling ACPI via APMC.
1667 09:33:59.611767 APMC done.
1668 09:33:59.615018 PCI: 00:1f.2 init finished in 6 msecs
1669 09:33:59.626560 PCI: 01:00.0 init
1670 09:33:59.629595 PCI: 01:00.0 init finished in 0 msecs
1671 09:33:59.632888 PNP: 0c09.0 init
1672 09:33:59.636472 Google Chrome EC uptime: 8.338 seconds
1673 09:33:59.642986 Google Chrome AP resets since EC boot: 1
1674 09:33:59.646642 Google Chrome most recent AP reset causes:
1675 09:33:59.649715 0.454: 32775 shutdown: entering G3
1676 09:33:59.656362 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1677 09:33:59.659479 PNP: 0c09.0 init finished in 22 msecs
1678 09:33:59.665338 Devices initialized
1679 09:33:59.668558 Show all devs... After init.
1680 09:33:59.671711 Root Device: enabled 1
1681 09:33:59.672183 DOMAIN: 0000: enabled 1
1682 09:33:59.674964 CPU_CLUSTER: 0: enabled 1
1683 09:33:59.678492 PCI: 00:00.0: enabled 1
1684 09:33:59.681661 PCI: 00:02.0: enabled 1
1685 09:33:59.682086 PCI: 00:04.0: enabled 1
1686 09:33:59.684962 PCI: 00:05.0: enabled 1
1687 09:33:59.687947 PCI: 00:06.0: enabled 0
1688 09:33:59.691368 PCI: 00:07.0: enabled 0
1689 09:33:59.691794 PCI: 00:07.1: enabled 0
1690 09:33:59.695176 PCI: 00:07.2: enabled 0
1691 09:33:59.698130 PCI: 00:07.3: enabled 0
1692 09:33:59.701242 PCI: 00:08.0: enabled 1
1693 09:33:59.701754 PCI: 00:09.0: enabled 0
1694 09:33:59.704633 PCI: 00:0a.0: enabled 0
1695 09:33:59.708000 PCI: 00:0d.0: enabled 1
1696 09:33:59.710984 PCI: 00:0d.1: enabled 0
1697 09:33:59.711498 PCI: 00:0d.2: enabled 0
1698 09:33:59.714500 PCI: 00:0d.3: enabled 0
1699 09:33:59.717977 PCI: 00:0e.0: enabled 0
1700 09:33:59.721232 PCI: 00:10.2: enabled 1
1701 09:33:59.721988 PCI: 00:10.6: enabled 0
1702 09:33:59.724202 PCI: 00:10.7: enabled 0
1703 09:33:59.727253 PCI: 00:12.0: enabled 0
1704 09:33:59.730356 PCI: 00:12.6: enabled 0
1705 09:33:59.730438 PCI: 00:13.0: enabled 0
1706 09:33:59.733858 PCI: 00:14.0: enabled 1
1707 09:33:59.736943 PCI: 00:14.1: enabled 0
1708 09:33:59.740216 PCI: 00:14.2: enabled 1
1709 09:33:59.740298 PCI: 00:14.3: enabled 1
1710 09:33:59.743558 PCI: 00:15.0: enabled 1
1711 09:33:59.747208 PCI: 00:15.1: enabled 1
1712 09:33:59.750226 PCI: 00:15.2: enabled 1
1713 09:33:59.750320 PCI: 00:15.3: enabled 1
1714 09:33:59.753611 PCI: 00:16.0: enabled 1
1715 09:33:59.756965 PCI: 00:16.1: enabled 0
1716 09:33:59.757067 PCI: 00:16.2: enabled 0
1717 09:33:59.760018
1718 09:33:59.760121 PCI: 00:16.3: enabled 0
1719 09:33:59.763862 PCI: 00:16.4: enabled 0
1720 09:33:59.766689 PCI: 00:16.5: enabled 0
1721 09:33:59.766886 PCI: 00:17.0: enabled 0
1722 09:33:59.770250 PCI: 00:19.0: enabled 0
1723 09:33:59.773111 PCI: 00:19.1: enabled 1
1724 09:33:59.776635 PCI: 00:19.2: enabled 0
1725 09:33:59.776788 PCI: 00:1c.0: enabled 1
1726 09:33:59.779595 PCI: 00:1c.1: enabled 0
1727 09:33:59.783143 PCI: 00:1c.2: enabled 0
1728 09:33:59.786231 PCI: 00:1c.3: enabled 0
1729 09:33:59.786439 PCI: 00:1c.4: enabled 0
1730 09:33:59.790067 PCI: 00:1c.5: enabled 0
1731 09:33:59.792985 PCI: 00:1c.6: enabled 1
1732 09:33:59.796035 PCI: 00:1c.7: enabled 0
1733 09:33:59.796115 PCI: 00:1d.0: enabled 1
1734 09:33:59.799646 PCI: 00:1d.1: enabled 0
1735 09:33:59.802787 PCI: 00:1d.2: enabled 1
1736 09:33:59.806342 PCI: 00:1d.3: enabled 0
1737 09:33:59.806436 PCI: 00:1e.0: enabled 1
1738 09:33:59.809197 PCI: 00:1e.1: enabled 0
1739 09:33:59.812669 PCI: 00:1e.2: enabled 1
1740 09:33:59.816090 PCI: 00:1e.3: enabled 1
1741 09:33:59.816202 PCI: 00:1f.0: enabled 1
1742 09:33:59.819468 PCI: 00:1f.1: enabled 0
1743 09:33:59.822372 PCI: 00:1f.2: enabled 1
1744 09:33:59.825747 PCI: 00:1f.3: enabled 1
1745 09:33:59.825871 PCI: 00:1f.4: enabled 0
1746 09:33:59.829388 PCI: 00:1f.5: enabled 1
1747 09:33:59.832287 PCI: 00:1f.6: enabled 0
1748 09:33:59.832363 PCI: 00:1f.7: enabled 0
1749 09:33:59.835552
1750 09:33:59.835633 APIC: 00: enabled 1
1751 09:33:59.838902 GENERIC: 0.0: enabled 1
1752 09:33:59.842427 GENERIC: 0.0: enabled 1
1753 09:33:59.842505 GENERIC: 1.0: enabled 1
1754 09:33:59.845446 GENERIC: 0.0: enabled 1
1755 09:33:59.849091 GENERIC: 1.0: enabled 1
1756 09:33:59.852001 USB0 port 0: enabled 1
1757 09:33:59.852076 GENERIC: 0.0: enabled 1
1758 09:33:59.855530 USB0 port 0: enabled 1
1759 09:33:59.858556 GENERIC: 0.0: enabled 1
1760 09:33:59.858628 I2C: 00:1a: enabled 1
1761 09:33:59.861779 I2C: 00:31: enabled 1
1762 09:33:59.865246 I2C: 00:32: enabled 1
1763 09:33:59.865317 I2C: 00:10: enabled 1
1764 09:33:59.868492
1765 09:33:59.868566 I2C: 00:15: enabled 1
1766 09:33:59.872073 GENERIC: 0.0: enabled 0
1767 09:33:59.874975 GENERIC: 1.0: enabled 0
1768 09:33:59.875080 GENERIC: 0.0: enabled 1
1769 09:33:59.878159 SPI: 00: enabled 1
1770 09:33:59.881501 SPI: 00: enabled 1
1771 09:33:59.881582 PNP: 0c09.0: enabled 1
1772 09:33:59.885028 GENERIC: 0.0: enabled 1
1773 09:33:59.888139 USB3 port 0: enabled 1
1774 09:33:59.888217 USB3 port 1: enabled 1
1775 09:33:59.891180
1776 09:33:59.891255 USB3 port 2: enabled 0
1777 09:33:59.894800 USB3 port 3: enabled 0
1778 09:33:59.897841 USB2 port 0: enabled 0
1779 09:33:59.897912 USB2 port 1: enabled 1
1780 09:33:59.901398 USB2 port 2: enabled 1
1781 09:33:59.904598 USB2 port 3: enabled 0
1782 09:33:59.904682 USB2 port 4: enabled 1
1783 09:33:59.907738
1784 09:33:59.907828 USB2 port 5: enabled 0
1785 09:33:59.911316 USB2 port 6: enabled 0
1786 09:33:59.914546 USB2 port 7: enabled 0
1787 09:33:59.914702 USB2 port 8: enabled 0
1788 09:33:59.917923 USB2 port 9: enabled 0
1789 09:33:59.921202 USB3 port 0: enabled 0
1790 09:33:59.921339 USB3 port 1: enabled 1
1791 09:33:59.924208
1792 09:33:59.924330 USB3 port 2: enabled 0
1793 09:33:59.927542 USB3 port 3: enabled 0
1794 09:33:59.930942 GENERIC: 0.0: enabled 1
1795 09:33:59.931026 GENERIC: 1.0: enabled 1
1796 09:33:59.933982 APIC: 01: enabled 1
1797 09:33:59.937489 APIC: 03: enabled 1
1798 09:33:59.937604 APIC: 04: enabled 1
1799 09:33:59.940506 APIC: 07: enabled 1
1800 09:33:59.944040 APIC: 06: enabled 1
1801 09:33:59.944131 APIC: 02: enabled 1
1802 09:33:59.947055 APIC: 05: enabled 1
1803 09:33:59.947153 PCI: 01:00.0: enabled 1
1804 09:33:59.950550
1805 09:33:59.953660 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1806 09:33:59.960116 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1807 09:33:59.963717 ELOG: NV offset 0xf30000 size 0x1000
1808 09:33:59.970592 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1809 09:33:59.977083 ELOG: Event(17) added with size 13 at 2023-01-19 09:33:59 UTC
1810 09:33:59.983563 ELOG: Event(92) added with size 9 at 2023-01-19 09:33:59 UTC
1811 09:33:59.990178 ELOG: Event(93) added with size 9 at 2023-01-19 09:33:59 UTC
1812 09:33:59.996764 ELOG: Event(16) added with size 11 at 2023-01-19 09:33:59 UTC
1813 09:33:59.999833 Erasing flash addr f30000 + 4 KiB
1814 09:34:00.054389 ELOG: Event(9E) added with size 10 at 2023-01-19 09:34:00 UTC
1815 09:34:00.061208 ELOG: Event(9F) added with size 14 at 2023-01-19 09:34:00 UTC
1816 09:34:00.066957 BS: BS_DEV_INIT exit times (exec / console): 50 / 55 ms
1817 09:34:00.073589 ELOG: Event(A1) added with size 10 at 2023-01-19 09:34:00 UTC
1818 09:34:00.080462 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1819 09:34:00.087212 ELOG: Event(A0) added with size 9 at 2023-01-19 09:34:00 UTC
1820 09:34:00.090218 elog_add_boot_reason: Logged dev mode boot
1821 09:34:00.096860 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1822 09:34:00.100569 Finalize devices...
1823 09:34:00.100773 Devices finalized
1824 09:34:00.107379 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1825 09:34:00.113410 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1826 09:34:00.116999 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1827 09:34:00.123212 ME: HFSTS1 : 0x80030055
1828 09:34:00.126606 ME: HFSTS2 : 0x30280116
1829 09:34:00.130158 ME: HFSTS3 : 0x00000050
1830 09:34:00.133238
1831 09:34:00.136873 ME: HFSTS4 : 0x00004000
1832 09:34:00.140078 ME: HFSTS5 : 0x00000000
1833 09:34:00.146494 ME: HFSTS6 : 0x40400006
1834 09:34:00.149757 ME: Manufacturing Mode : YES
1835 09:34:00.153453 ME: SPI Protection Mode Enabled : NO
1836 09:34:00.156429 ME: FW Partition Table : OK
1837 09:34:00.159922 ME: Bringup Loader Failure : NO
1838 09:34:00.163217 ME: Firmware Init Complete : NO
1839 09:34:00.167024 ME: Boot Options Present : NO
1840 09:34:00.169860 ME: Update In Progress : NO
1841 09:34:00.173315
1842 09:34:00.176370 ME: D0i3 Support : YES
1843 09:34:00.179802 ME: Low Power State Enabled : NO
1844 09:34:00.182967 ME: CPU Replaced : YES
1845 09:34:00.186322 ME: CPU Replacement Valid : YES
1846 09:34:00.189368 ME: Current Working State : 5
1847 09:34:00.192607 ME: Current Operation State : 1
1848 09:34:00.196105 ME: Current Operation Mode : 3
1849 09:34:00.199542 ME: Error Code : 0
1850 09:34:00.206174 ME: Enhanced Debug Mode : NO
1851 09:34:00.209129 ME: CPU Debug Disabled : YES
1852 09:34:00.212714 ME: TXT Support : NO
1853 09:34:00.219042 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1854 09:34:00.225371 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1855 09:34:00.228903 CBFS: 'fallback/slic' not found.
1856 09:34:00.232111 ACPI: Writing ACPI tables at 76b01000.
1857 09:34:00.235489 ACPI: * FACS
1858 09:34:00.236136 ACPI: * DSDT
1859 09:34:00.238988 Ramoops buffer: 0x100000@0x76a00000.
1860 09:34:00.245618 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1861 09:34:00.248607 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1862 09:34:00.252266 Google Chrome EC: version:
1863 09:34:00.255549 ro: voema_v2.0.10114-a447f03e46
1864 09:34:00.258613 rw: voema_v2.0.10114-a447f03e46
1865 09:34:00.262135 running image: 2
1866 09:34:00.268611 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1867 09:34:00.272059 ACPI: * FADT
1868 09:34:00.272547 SCI is IRQ9
1869 09:34:00.278229 ACPI: added table 1/32, length now 40
1870 09:34:00.278745 ACPI: * SSDT
1871 09:34:00.281942 Found 1 CPU(s) with 8 core(s) each.
1872 09:34:00.288274 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1873 09:34:00.291421 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1874 09:34:00.294674 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1875 09:34:00.297952 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1876 09:34:00.301886
1877 09:34:00.304999 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1878 09:34:00.311453 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1879 09:34:00.314643 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1880 09:34:00.320971 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1881 09:34:00.327581 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1882 09:34:00.330845 \_SB.PCI0.RP09: Added StorageD3Enable property
1883 09:34:00.337634 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1884 09:34:00.340869 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1885 09:34:00.348042 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1886 09:34:00.351359 PS2K: Passing 80 keymaps to kernel
1887 09:34:00.357833 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1888 09:34:00.364534 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1889 09:34:00.371443 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1890 09:34:00.377756 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1891 09:34:00.384412 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1892 09:34:00.391042 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1893 09:34:00.397784 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1894 09:34:00.404552 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1895 09:34:00.407567 ACPI: added table 2/32, length now 44
1896 09:34:00.410462 ACPI: * MCFG
1897 09:34:00.414035 ACPI: added table 3/32, length now 48
1898 09:34:00.414581 ACPI: * TPM2
1899 09:34:00.416966 TPM2 log created at 0x769f0000
1900 09:34:00.423914 ACPI: added table 4/32, length now 52
1901 09:34:00.424398 ACPI: * MADT
1902 09:34:00.424778 SCI is IRQ9
1903 09:34:00.430407 ACPI: added table 5/32, length now 56
1904 09:34:00.430894 current = 76b09850
1905 09:34:00.433670 ACPI: * DMAR
1906 09:34:00.437036 ACPI: added table 6/32, length now 60
1907 09:34:00.439850 ACPI: added table 7/32, length now 64
1908 09:34:00.443467 ACPI: * HPET
1909 09:34:00.446379 ACPI: added table 8/32, length now 68
1910 09:34:00.446981 ACPI: done.
1911 09:34:00.449954 ACPI tables: 35216 bytes.
1912 09:34:00.452961 smbios_write_tables: 769ef000
1913 09:34:00.456517 EC returned error result code 3
1914 09:34:00.459754 Couldn't obtain OEM name from CBI
1915 09:34:00.463225 Create SMBIOS type 16
1916 09:34:00.466455 Create SMBIOS type 17
1917 09:34:00.469764 GENERIC: 0.0 (WIFI Device)
1918 09:34:00.470252 SMBIOS tables: 1734 bytes.
1919 09:34:00.476342 Writing table forward entry at 0x00000500
1920 09:34:00.482507 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1921 09:34:00.485925 Writing coreboot table at 0x76b25000
1922 09:34:00.489008 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1923 09:34:00.492585
1924 09:34:00.495581 1. 0000000000001000-000000000009ffff: RAM
1925 09:34:00.498995 2. 00000000000a0000-00000000000fffff: RESERVED
1926 09:34:00.505301 3. 0000000000100000-00000000769eefff: RAM
1927 09:34:00.508851 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1928 09:34:00.515450 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1929 09:34:00.521955 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1930 09:34:00.524985 7. 0000000077000000-000000007fbfffff: RESERVED
1931 09:34:00.531911 8. 00000000c0000000-00000000cfffffff: RESERVED
1932 09:34:00.534925 9. 00000000f8000000-00000000f9ffffff: RESERVED
1933 09:34:00.538403 10. 00000000fb000000-00000000fb000fff: RESERVED
1934 09:34:00.541266
1935 09:34:00.544729 11. 00000000fe000000-00000000fe00ffff: RESERVED
1936 09:34:00.547785 12. 00000000fed80000-00000000fed87fff: RESERVED
1937 09:34:00.554494 13. 00000000fed90000-00000000fed92fff: RESERVED
1938 09:34:00.557794 14. 00000000feda0000-00000000feda1fff: RESERVED
1939 09:34:00.564443 15. 00000000fedc0000-00000000feddffff: RESERVED
1940 09:34:00.568054 16. 0000000100000000-00000004803fffff: RAM
1941 09:34:00.570975 Passing 4 GPIOs to payload:
1942 09:34:00.577203 NAME | PORT | POLARITY | VALUE
1943 09:34:00.580823 lid | undefined | high | high
1944 09:34:00.587111 power | undefined | high | low
1945 09:34:00.590551 oprom | undefined | high | low
1946 09:34:00.597257 EC in RW | 0x000000e5 | high | high
1947 09:34:00.603398 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1948 09:34:00.607101 coreboot table: 1576 bytes.
1949 09:34:00.610032 IMD ROOT 0. 0x76fff000 0x00001000
1950 09:34:00.613870 IMD SMALL 1. 0x76ffe000 0x00001000
1951 09:34:00.616572 FSP MEMORY 2. 0x76c4e000 0x003b0000
1952 09:34:00.620125 VPD 3. 0x76c4d000 0x00000367
1953 09:34:00.626636 RO MCACHE 4. 0x76c4c000 0x00000fdc
1954 09:34:00.630212 CONSOLE 5. 0x76c2c000 0x00020000
1955 09:34:00.633287 FMAP 6. 0x76c2b000 0x00000578
1956 09:34:00.636574 TIME STAMP 7. 0x76c2a000 0x00000910
1957 09:34:00.639909 VBOOT WORK 8. 0x76c16000 0x00014000
1958 09:34:00.642941 ROMSTG STCK 9. 0x76c15000 0x00001000
1959 09:34:00.646351 AFTER CAR 10. 0x76c0a000 0x0000b000
1960 09:34:00.649417 RAMSTAGE 11. 0x76b97000 0x00073000
1961 09:34:00.656124 REFCODE 12. 0x76b42000 0x00055000
1962 09:34:00.659530 SMM BACKUP 13. 0x76b32000 0x00010000
1963 09:34:00.663126 4f444749 14. 0x76b30000 0x00002000
1964 09:34:00.666277 EXT VBT15. 0x76b2d000 0x0000219f
1965 09:34:00.669429 COREBOOT 16. 0x76b25000 0x00008000
1966 09:34:00.672935 ACPI 17. 0x76b01000 0x00024000
1967 09:34:00.676136 ACPI GNVS 18. 0x76b00000 0x00001000
1968 09:34:00.679047 RAMOOPS 19. 0x76a00000 0x00100000
1969 09:34:00.685583 TPM2 TCGLOG20. 0x769f0000 0x00010000
1970 09:34:00.689216 SMBIOS 21. 0x769ef000 0x00000800
1971 09:34:00.689734 IMD small region:
1972 09:34:00.692447 IMD ROOT 0. 0x76ffec00 0x00000400
1973 09:34:00.698955 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1974 09:34:00.702552 POWER STATE 2. 0x76ffeb80 0x00000044
1975 09:34:00.705443 ROMSTAGE 3. 0x76ffeb60 0x00000004
1976 09:34:00.708517 MEM INFO 4. 0x76ffe980 0x000001e0
1977 09:34:00.715149 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1978 09:34:00.718886 MTRR: Physical address space:
1979 09:34:00.725371 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1980 09:34:00.731952 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1981 09:34:00.738350 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1982 09:34:00.744786 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1983 09:34:00.748146 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1984 09:34:00.754330 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1985 09:34:00.761454 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1986 09:34:00.767427 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 09:34:00.771068 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 09:34:00.774172 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 09:34:00.777619 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 09:34:00.783888 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 09:34:00.787463 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 09:34:00.790646 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 09:34:00.794008 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 09:34:00.800397 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 09:34:00.803834 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 09:34:00.807088 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 09:34:00.811019 call enable_fixed_mtrr()
1998 09:34:00.814178 CPU physical address size: 39 bits
1999 09:34:00.820884 MTRR: default type WB/UC MTRR counts: 6/7.
2000 09:34:00.823934 MTRR: WB selected as default type.
2001 09:34:00.830312 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2002 09:34:00.833878 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2003 09:34:00.840506 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2004 09:34:00.846870 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2005 09:34:00.853345 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2006 09:34:00.859961 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2007 09:34:00.867592 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 09:34:00.870644 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 09:34:00.874357 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 09:34:00.877318 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 09:34:00.884010 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 09:34:00.887505 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 09:34:00.890649 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 09:34:00.894174 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 09:34:00.900470 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 09:34:00.904134 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 09:34:00.907147 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 09:34:00.907460
2019 09:34:00.911920 MTRR check
2020 09:34:00.915024 call enable_fixed_mtrr()
2021 09:34:00.915467 Fixed MTRRs : Enabled
2022 09:34:00.918752 Variable MTRRs: Enabled
2023 09:34:00.919218
2024 09:34:00.921864 CPU physical address size: 39 bits
2025 09:34:00.924816 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 09:34:00.931958 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 09:34:00.934804 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 09:34:00.938131 MTRR: Fixed MSR 0x259 0x0000000000000000
2029 09:34:00.941161 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 09:34:00.947928 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 09:34:00.951000 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 09:34:00.954566 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 09:34:00.957969 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 09:34:00.964618 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 09:34:00.968011 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 09:34:00.970910 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 09:34:00.978871 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 09:34:00.982512 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 09:34:00.985521 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 09:34:00.988874 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 09:34:00.995443 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 09:34:00.998455 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 09:34:01.001902 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 09:34:01.005400 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 09:34:01.011895 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 09:34:01.014980 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 09:34:01.018582 call enable_fixed_mtrr()
2048 09:34:01.022051 call enable_fixed_mtrr()
2049 09:34:01.028777 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 152 ms
2050 09:34:01.031799 CPU physical address size: 39 bits
2051 09:34:01.035332 CPU physical address size: 39 bits
2052 09:34:01.041851 MTRR: Fixed MSR 0x250 0x0606060606060606
2053 09:34:01.045360 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 09:34:01.048428 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 09:34:01.051921 MTRR: Fixed MSR 0x259 0x0000000000000000
2056 09:34:01.058596 MTRR: Fixed MSR 0x268 0x0606060606060606
2057 09:34:01.061457 MTRR: Fixed MSR 0x269 0x0606060606060606
2058 09:34:01.065041 MTRR: Fixed MSR 0x26a 0x0606060606060606
2059 09:34:01.068217 MTRR: Fixed MSR 0x26b 0x0606060606060606
2060 09:34:01.074666 MTRR: Fixed MSR 0x26c 0x0606060606060606
2061 09:34:01.077885 MTRR: Fixed MSR 0x26d 0x0606060606060606
2062 09:34:01.081422 MTRR: Fixed MSR 0x26e 0x0606060606060606
2063 09:34:01.084390 MTRR: Fixed MSR 0x26f 0x0606060606060606
2064 09:34:01.087518
2065 09:34:01.091001 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 09:34:01.094065 call enable_fixed_mtrr()
2067 09:34:01.097219 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 09:34:01.103885 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 09:34:01.107477 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 09:34:01.110403 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 09:34:01.113893 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 09:34:01.120495 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 09:34:01.123468 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 09:34:01.126996 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 09:34:01.130038 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 09:34:01.136571 CPU physical address size: 39 bits
2077 09:34:01.141046 call enable_fixed_mtrr()
2078 09:34:01.144070 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 09:34:01.150976 MTRR: Fixed MSR 0x250 0x0606060606060606
2080 09:34:01.153954 MTRR: Fixed MSR 0x258 0x0606060606060606
2081 09:34:01.157328 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 09:34:01.160409 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 09:34:01.166945 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 09:34:01.170558 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 09:34:01.173640 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 09:34:01.177130 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 09:34:01.183613 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 09:34:01.186773 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 09:34:01.189851 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 09:34:01.198244 MTRR: Fixed MSR 0x258 0x0606060606060606
2091 09:34:01.198731 call enable_fixed_mtrr()
2092 09:34:01.204301 MTRR: Fixed MSR 0x259 0x0000000000000000
2093 09:34:01.208323 MTRR: Fixed MSR 0x268 0x0606060606060606
2094 09:34:01.210969 MTRR: Fixed MSR 0x269 0x0606060606060606
2095 09:34:01.214556 MTRR: Fixed MSR 0x26a 0x0606060606060606
2096 09:34:01.220541 MTRR: Fixed MSR 0x26b 0x0606060606060606
2097 09:34:01.224267 MTRR: Fixed MSR 0x26c 0x0606060606060606
2098 09:34:01.227267 MTRR: Fixed MSR 0x26d 0x0606060606060606
2099 09:34:01.230506 MTRR: Fixed MSR 0x26e 0x0606060606060606
2100 09:34:01.234041
2101 09:34:01.237283 MTRR: Fixed MSR 0x26f 0x0606060606060606
2102 09:34:01.240402 CPU physical address size: 39 bits
2103 09:34:01.245730 call enable_fixed_mtrr()
2104 09:34:01.248974 CPU physical address size: 39 bits
2105 09:34:01.252769 Checking cr50 for pending updates
2106 09:34:01.256783 CPU physical address size: 39 bits
2107 09:34:01.259957 Reading cr50 TPM mode
2108 09:34:01.270503 BS: BS_PAYLOAD_LOAD entry times (exec / console): 231 / 6 ms
2109 09:34:01.280466 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2110 09:34:01.283712 Checking segment from ROM address 0xffc02b38
2111 09:34:01.287156 Checking segment from ROM address 0xffc02b54
2112 09:34:01.293276 Loading segment from ROM address 0xffc02b38
2113 09:34:01.293760 code (compression=0)
2114 09:34:01.303574 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2115 09:34:01.312921 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2116 09:34:01.313383 it's not compressed!
2117 09:34:01.458410 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2118 09:34:01.465365 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2119 09:34:01.472091 Loading segment from ROM address 0xffc02b54
2120 09:34:01.475552 Entry Point 0x30000000
2121 09:34:01.476054 Loaded segments
2122 09:34:01.481733 BS: BS_PAYLOAD_LOAD run times (exec / console): 141 / 63 ms
2123 09:34:01.527456 Finalizing chipset.
2124 09:34:01.530500 Finalizing SMM.
2125 09:34:01.531023 APMC done.
2126 09:34:01.537005 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2127 09:34:01.540662 mp_park_aps done after 0 msecs.
2128 09:34:01.543836 Jumping to boot code at 0x30000000(0x76b25000)
2129 09:34:01.553614 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2130 09:34:01.554107
2131 09:34:01.556986
2132 09:34:01.557506
2133 09:34:01.560013 Starting depthcharge on Voema...
2134 09:34:01.560507
2135 09:34:01.561753 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2136 09:34:01.562389 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2137 09:34:01.562896 Setting prompt string to ['volteer:']
2138 09:34:01.563400 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2139 09:34:01.566863 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2140 09:34:01.567392
2141 09:34:01.573388 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2142 09:34:01.573891
2143 09:34:01.579778 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2144 09:34:01.580270
2145 09:34:01.583445 Failed to find eMMC card reader
2146 09:34:01.584054
2147 09:34:01.586459 Wipe memory regions:
2148 09:34:01.586947
2149 09:34:01.590035 [0x00000000001000, 0x000000000a0000)
2150 09:34:01.590583
2151 09:34:01.592895 [0x00000000100000, 0x00000030000000)
2152 09:34:01.593346
2153 09:34:01.633406 [0x00000032662db0, 0x000000769ef000)
2154 09:34:01.633496
2155 09:34:01.689018 [0x00000100000000, 0x00000480400000)
2156 09:34:01.689128
2157 09:34:02.349574 ec_init: CrosEC protocol v3 supported (256, 256)
2158 09:34:02.350178
2159 09:34:02.780870 R8152: Initializing
2160 09:34:02.781551
2161 09:34:02.783610 Version 6 (ocp_data = 5c30)
2162 09:34:02.784114
2163 09:34:02.787115 R8152: Done initializing
2164 09:34:02.787653
2165 09:34:02.790652 Adding net device
2166 09:34:02.791196
2167 09:34:03.094760 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 09:34:03.095349
2169 09:34:03.095833
2170 09:34:03.096224
2171 09:34:03.098672 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 09:34:03.200270 volteer: tftpboot 192.168.201.1 8794215/tftp-deploy-0ohwh6w8/kernel/bzImage 8794215/tftp-deploy-0ohwh6w8/kernel/cmdline 8794215/tftp-deploy-0ohwh6w8/ramdisk/ramdisk.cpio.gz
2174 09:34:03.200446 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 09:34:03.200538 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2176 09:34:03.204522 tftpboot 192.168.201.1 8794215/tftp-deploy-0ohwh6w8/kernel/bzImoy-0ohwh6w8/kernel/cmdline 8794215/tftp-deploy-0ohwh6w8/ramdisk/ramdisk.cpio.gz
2177 09:34:03.204624
2178 09:34:03.204695 Waiting for link
2179 09:34:03.204758
2180 09:34:03.407708 done.
2181 09:34:03.407872
2182 09:34:03.407949 MAC: 00:24:32:30:7a:04
2183 09:34:03.408017
2184 09:34:03.410713 Sending DHCP discover... done.
2185 09:34:03.410806
2186 09:34:03.414003 Waiting for reply... done.
2187 09:34:03.414103
2188 09:34:03.417502 Sending DHCP request... done.
2189 09:34:03.417615
2190 09:34:03.420386 Waiting for reply... done.
2191 09:34:03.420506
2192 09:34:03.424036 My ip is 192.168.201.22
2193 09:34:03.424175
2194 09:34:03.426986 The DHCP server ip is 192.168.201.1
2195 09:34:03.427133
2196 09:34:03.430043 TFTP server IP predefined by user: 192.168.201.1
2197 09:34:03.430197
2198 09:34:03.436685 Bootfile predefined by user: 8794215/tftp-deploy-0ohwh6w8/kernel/bzImage
2199 09:34:03.440190
2200 09:34:03.443387 Sending tftp read request... done.
2201 09:34:03.443479
2202 09:34:03.446904 Waiting for the transfer...
2203 09:34:03.446984
2204 09:34:04.007494 00000000 ################################################################
2205 09:34:04.007638
2206 09:34:04.561332 00080000 ################################################################
2207 09:34:04.561530
2208 09:34:05.118673 00100000 ################################################################
2209 09:34:05.118830
2210 09:34:05.667443 00180000 ################################################################
2211 09:34:05.667599
2212 09:34:06.237928 00200000 ################################################################
2213 09:34:06.238074
2214 09:34:06.866198 00280000 ################################################################
2215 09:34:06.866761
2216 09:34:07.499979 00300000 ################################################################
2217 09:34:07.500176
2218 09:34:08.134245 00380000 ################################################################
2219 09:34:08.134831
2220 09:34:08.715424 00400000 ################################################################
2221 09:34:08.715573
2222 09:34:09.337182 00480000 ################################################################
2223 09:34:09.337805
2224 09:34:10.005160 00500000 ################################################################
2225 09:34:10.005735
2226 09:34:10.642302 00580000 ################################################################
2227 09:34:10.642528
2228 09:34:11.276127 00600000 ################################################################
2229 09:34:11.276296
2230 09:34:11.880341 00680000 ################################################################
2231 09:34:11.880505
2232 09:34:12.510145 00700000 ################################################################
2233 09:34:12.510710
2234 09:34:13.167337 00780000 ################################################################
2235 09:34:13.167477
2236 09:34:13.771751 00800000 ################################################################
2237 09:34:13.771907
2238 09:34:14.414102 00880000 ################################################################
2239 09:34:14.414243
2240 09:34:14.703329 00900000 ################################## done.
2241 09:34:14.703489
2242 09:34:14.706549 The bootfile was 9711616 bytes long.
2243 09:34:14.706666
2244 09:34:14.709736 Sending tftp read request... done.
2245 09:34:14.709852
2246 09:34:14.712861 Waiting for the transfer...
2247 09:34:14.712990
2248 09:34:15.361902 00000000 ################################################################
2249 09:34:15.362506
2250 09:34:16.062442 00080000 ################################################################
2251 09:34:16.062980
2252 09:34:16.673979 00100000 ################################################################
2253 09:34:16.674123
2254 09:34:17.247055 00180000 ################################################################
2255 09:34:17.247200
2256 09:34:17.822339 00200000 ################################################################
2257 09:34:17.822565
2258 09:34:18.403290 00280000 ################################################################
2259 09:34:18.403429
2260 09:34:18.967539 00300000 ################################################################
2261 09:34:18.967918
2262 09:34:19.546412 00380000 ################################################################
2263 09:34:19.546550
2264 09:34:20.180596 00400000 ################################################################
2265 09:34:20.181210
2266 09:34:20.841692 00480000 ################################################################
2267 09:34:20.842223
2268 09:34:21.434768 00500000 ################################################################
2269 09:34:21.434907
2270 09:34:22.004535 00580000 ################################################################
2271 09:34:22.004672
2272 09:34:22.614949 00600000 ################################################################
2273 09:34:22.615093
2274 09:34:23.192145 00680000 ################################################################
2275 09:34:23.192285
2276 09:34:23.759212 00700000 ################################################################
2277 09:34:23.759352
2278 09:34:24.292570 00780000 ################################################################
2279 09:34:24.292710
2280 09:34:24.485298 00800000 ######################## done.
2281 09:34:24.485444
2282 09:34:24.488416 Sending tftp read request... done.
2283 09:34:24.488501
2284 09:34:24.491826 Waiting for the transfer...
2285 09:34:24.491911
2286 09:34:24.491978 00000000 # done.
2287 09:34:24.492042
2288 09:34:24.501395 Command line loaded dynamically from TFTP file: 8794215/tftp-deploy-0ohwh6w8/kernel/cmdline
2289 09:34:24.501502
2290 09:34:24.514698 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2291 09:34:24.514787
2292 09:34:24.522832 Shutting down all USB controllers.
2293 09:34:24.522930
2294 09:34:24.523008 Removing current net device
2295 09:34:24.523080
2296 09:34:24.526029 Finalizing coreboot
2297 09:34:24.526143
2298 09:34:24.532830 Exiting depthcharge with code 4 at timestamp: 31669231
2299 09:34:24.532946
2300 09:34:24.533036
2301 09:34:24.533120 Starting kernel ...
2302 09:34:24.533203
2303 09:34:24.533297
2304 09:34:24.533745 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2305 09:34:24.533893 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2306 09:34:24.533996 Setting prompt string to ['Linux version [0-9]']
2307 09:34:24.534091 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2308 09:34:24.534185 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2309 09:34:24.536212
2311 09:38:45.534739 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2313 09:38:45.535918 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2315 09:38:45.536732 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2318 09:38:45.538123 end: 2 depthcharge-action (duration 00:05:00) [common]
2320 09:38:45.539263 Cleaning after the job
2321 09:38:45.539734 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794215/tftp-deploy-0ohwh6w8/ramdisk
2322 09:38:45.542997 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794215/tftp-deploy-0ohwh6w8/kernel
2323 09:38:45.546640 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794215/tftp-deploy-0ohwh6w8/modules
2324 09:38:45.547694 start: 5.1 power-off (timeout 00:00:30) [common]
2325 09:38:45.548489 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2326 09:38:45.607093 >> Command sent successfully.
2327 09:38:45.609663 Returned 0 in 0 seconds
2328 09:38:45.710489 end: 5.1 power-off (duration 00:00:00) [common]
2330 09:38:45.710812 start: 5.2 read-feedback (timeout 00:10:00) [common]
2331 09:38:45.711053 Listened to connection for namespace 'common' for up to 1s
2332 09:38:46.713734 Finalising connection for namespace 'common'
2333 09:38:46.714404 Disconnecting from shell: Finalise
2334 09:38:46.815529 end: 5.2 read-feedback (duration 00:00:01) [common]
2335 09:38:46.815700 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8794215
2336 09:38:46.820865 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8794215
2337 09:38:46.821038 JobError: Your job cannot terminate cleanly.