Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 09:49:22.188498 lava-dispatcher, installed at version: 2022.11
2 09:49:22.188690 start: 0 validate
3 09:49:22.188823 Start time: 2023-01-19 09:49:22.188817+00:00 (UTC)
4 09:49:22.188964 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:49:22.189125 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230114.0%2Famd64%2Finitrd.cpio.gz exists
6 09:49:22.469886 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:49:22.470091 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.269-cip88-479-g3f9e11225caa5%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:49:22.761660 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:49:22.761844 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230114.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 09:49:23.039444 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:49:23.039629 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.269-cip88-479-g3f9e11225caa5%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:49:23.319248 validate duration: 1.13
14 09:49:23.319562 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:49:23.319682 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:49:23.319790 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:49:23.319903 Not decompressing ramdisk as can be used compressed.
18 09:49:23.319994 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230114.0/amd64/initrd.cpio.gz
19 09:49:23.320070 saving as /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/ramdisk/initrd.cpio.gz
20 09:49:23.320134 total size: 5432122 (5MB)
21 09:49:23.321494 progress 0% (0MB)
22 09:49:23.323797 progress 5% (0MB)
23 09:49:23.326041 progress 10% (0MB)
24 09:49:23.328259 progress 15% (0MB)
25 09:49:23.330746 progress 20% (1MB)
26 09:49:23.332884 progress 25% (1MB)
27 09:49:23.335077 progress 30% (1MB)
28 09:49:23.337493 progress 35% (1MB)
29 09:49:23.339648 progress 40% (2MB)
30 09:49:23.341604 progress 45% (2MB)
31 09:49:23.343703 progress 50% (2MB)
32 09:49:23.346049 progress 55% (2MB)
33 09:49:23.348065 progress 60% (3MB)
34 09:49:23.350095 progress 65% (3MB)
35 09:49:23.352470 progress 70% (3MB)
36 09:49:23.354610 progress 75% (3MB)
37 09:49:23.356704 progress 80% (4MB)
38 09:49:23.358891 progress 85% (4MB)
39 09:49:23.361285 progress 90% (4MB)
40 09:49:23.363435 progress 95% (4MB)
41 09:49:23.365615 progress 100% (5MB)
42 09:49:23.366072 5MB downloaded in 0.05s (112.80MB/s)
43 09:49:23.366325 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:49:23.366727 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:49:23.366866 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:49:23.367002 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:49:23.367163 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.269-cip88-479-g3f9e11225caa5/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 09:49:23.367269 saving as /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/kernel/bzImage
50 09:49:23.367369 total size: 9711616 (9MB)
51 09:49:23.367469 No compression specified
52 09:49:23.369005 progress 0% (0MB)
53 09:49:23.372870 progress 5% (0MB)
54 09:49:23.376943 progress 10% (0MB)
55 09:49:23.380926 progress 15% (1MB)
56 09:49:23.384870 progress 20% (1MB)
57 09:49:23.388757 progress 25% (2MB)
58 09:49:23.392428 progress 30% (2MB)
59 09:49:23.396407 progress 35% (3MB)
60 09:49:23.400354 progress 40% (3MB)
61 09:49:23.404285 progress 45% (4MB)
62 09:49:23.408242 progress 50% (4MB)
63 09:49:23.412163 progress 55% (5MB)
64 09:49:23.415807 progress 60% (5MB)
65 09:49:23.419688 progress 65% (6MB)
66 09:49:23.423622 progress 70% (6MB)
67 09:49:23.427510 progress 75% (6MB)
68 09:49:23.431399 progress 80% (7MB)
69 09:49:23.435021 progress 85% (7MB)
70 09:49:23.438926 progress 90% (8MB)
71 09:49:23.442834 progress 95% (8MB)
72 09:49:23.446754 progress 100% (9MB)
73 09:49:23.447139 9MB downloaded in 0.08s (116.12MB/s)
74 09:49:23.447364 end: 1.2.1 http-download (duration 00:00:00) [common]
76 09:49:23.447753 end: 1.2 download-retry (duration 00:00:00) [common]
77 09:49:23.447890 start: 1.3 download-retry (timeout 00:10:00) [common]
78 09:49:23.448022 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 09:49:23.448182 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230114.0/amd64/full.rootfs.tar.xz
80 09:49:23.448286 saving as /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/nfsrootfs/full.rootfs.tar
81 09:49:23.448381 total size: 123911640 (118MB)
82 09:49:23.448482 Using unxz to decompress xz
83 09:49:23.452261 progress 0% (0MB)
84 09:49:23.963124 progress 5% (5MB)
85 09:49:24.558693 progress 10% (11MB)
86 09:49:25.161238 progress 15% (17MB)
87 09:49:25.753821 progress 20% (23MB)
88 09:49:26.109108 progress 25% (29MB)
89 09:49:26.477155 progress 30% (35MB)
90 09:49:26.782748 progress 35% (41MB)
91 09:49:26.955669 progress 40% (47MB)
92 09:49:27.355553 progress 45% (53MB)
93 09:49:27.736749 progress 50% (59MB)
94 09:49:28.110564 progress 55% (65MB)
95 09:49:28.475579 progress 60% (70MB)
96 09:49:28.822064 progress 65% (76MB)
97 09:49:29.211069 progress 70% (82MB)
98 09:49:29.636859 progress 75% (88MB)
99 09:49:30.059967 progress 80% (94MB)
100 09:49:30.187646 progress 85% (100MB)
101 09:49:30.358750 progress 90% (106MB)
102 09:49:30.704970 progress 95% (112MB)
103 09:49:31.089038 progress 100% (118MB)
104 09:49:31.094883 118MB downloaded in 7.65s (15.45MB/s)
105 09:49:31.095165 end: 1.3.1 http-download (duration 00:00:08) [common]
107 09:49:31.095449 end: 1.3 download-retry (duration 00:00:08) [common]
108 09:49:31.095546 start: 1.4 download-retry (timeout 00:09:52) [common]
109 09:49:31.095642 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 09:49:31.095768 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.269-cip88-479-g3f9e11225caa5/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 09:49:31.095843 saving as /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/modules/modules.tar
112 09:49:31.095910 total size: 64676 (0MB)
113 09:49:31.095976 Using unxz to decompress xz
114 09:49:31.099129 progress 50% (0MB)
115 09:49:31.099527 progress 100% (0MB)
116 09:49:31.103816 0MB downloaded in 0.01s (7.81MB/s)
117 09:49:31.104066 end: 1.4.1 http-download (duration 00:00:00) [common]
119 09:49:31.104345 end: 1.4 download-retry (duration 00:00:00) [common]
120 09:49:31.104446 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 09:49:31.104567 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 09:49:32.860426 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8794212/extract-nfsrootfs-in8rx19a
123 09:49:32.860646 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 09:49:32.860752 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 09:49:32.860888 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d
126 09:49:32.860994 makedir: /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin
127 09:49:32.861081 makedir: /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/tests
128 09:49:32.861163 makedir: /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/results
129 09:49:32.861260 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-add-keys
130 09:49:32.861432 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-add-sources
131 09:49:32.861587 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-background-process-start
132 09:49:32.861704 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-background-process-stop
133 09:49:32.861818 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-common-functions
134 09:49:32.861930 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-echo-ipv4
135 09:49:32.862042 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-install-packages
136 09:49:32.862153 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-installed-packages
137 09:49:32.862263 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-os-build
138 09:49:32.862373 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-probe-channel
139 09:49:32.862485 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-probe-ip
140 09:49:32.862602 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-target-ip
141 09:49:32.862713 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-target-mac
142 09:49:32.862855 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-target-storage
143 09:49:32.863013 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-test-case
144 09:49:32.863134 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-test-event
145 09:49:32.863305 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-test-feedback
146 09:49:32.863422 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-test-raise
147 09:49:32.863553 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-test-reference
148 09:49:32.863667 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-test-runner
149 09:49:32.863782 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-test-set
150 09:49:32.863935 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-test-shell
151 09:49:32.864051 Updating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-install-packages (oe)
152 09:49:32.864187 Updating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/bin/lava-installed-packages (oe)
153 09:49:32.864289 Creating /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/environment
154 09:49:32.864377 LAVA metadata
155 09:49:32.864443 - LAVA_JOB_ID=8794212
156 09:49:32.864507 - LAVA_DISPATCHER_IP=192.168.201.1
157 09:49:32.864608 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 09:49:32.864700 skipped lava-vland-overlay
159 09:49:32.864814 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 09:49:32.864937 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 09:49:32.865005 skipped lava-multinode-overlay
162 09:49:32.865099 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 09:49:32.865203 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 09:49:32.865284 Loading test definitions
165 09:49:32.865537 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
166 09:49:32.865658 Using /lava-8794212 at stage 0
167 09:49:32.865761 Fetching tests from https://github.com/kernelci/test-definitions
168 09:49:32.865842 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/0/tests/0_ltp-ipc'
169 09:49:36.044925 Running '/usr/bin/git checkout kernelci.org
170 09:49:36.103109 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 09:49:36.103863 uuid=8794212_1.5.2.3.1 testdef=None
172 09:49:36.104024 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 09:49:36.104286 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
175 09:49:36.105072 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 09:49:36.105317 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
178 09:49:36.106334 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 09:49:36.106587 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
181 09:49:36.107560 runner path: /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/0/tests/0_ltp-ipc test_uuid 8794212_1.5.2.3.1
182 09:49:36.107656 SKIPFILE='skipfile-lkft.yaml'
183 09:49:36.107723 SKIP_INSTALL='true'
184 09:49:36.107786 TST_CMDFILES='ipc'
185 09:49:36.107927 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 09:49:36.108147 Creating lava-test-runner.conf files
188 09:49:36.108215 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8794212/lava-overlay-m4jtnl7d/lava-8794212/0 for stage 0
189 09:49:36.108302 - 0_ltp-ipc
190 09:49:36.108403 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
191 09:49:36.108496 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
192 09:49:43.693441 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 09:49:43.693603 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
194 09:49:43.693705 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 09:49:43.693814 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 09:49:43.693913 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
197 09:49:43.797948 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 09:49:43.798295 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
199 09:49:43.798493 extracting modules file /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8794212/extract-nfsrootfs-in8rx19a
200 09:49:43.802840 extracting modules file /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8794212/extract-overlay-ramdisk-bh04as2f/ramdisk
201 09:49:43.806932 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 09:49:43.807075 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
203 09:49:43.807177 [common] Applying overlay to NFS
204 09:49:43.807269 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8794212/compress-overlay-avkfrjd7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8794212/extract-nfsrootfs-in8rx19a
205 09:49:44.282463 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 09:49:44.282639 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
207 09:49:44.282738 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 09:49:44.282837 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
209 09:49:44.282926 Building ramdisk /var/lib/lava/dispatcher/tmp/8794212/extract-overlay-ramdisk-bh04as2f/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8794212/extract-overlay-ramdisk-bh04as2f/ramdisk
210 09:49:44.316879 >> 24777 blocks
211 09:49:44.788598 rename /var/lib/lava/dispatcher/tmp/8794212/extract-overlay-ramdisk-bh04as2f/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/ramdisk/ramdisk.cpio.gz
212 09:49:44.788996 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 09:49:44.789123 start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
214 09:49:44.789230 start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
215 09:49:44.789325 No mkimage arch provided, not using FIT.
216 09:49:44.789466 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 09:49:44.789564 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 09:49:44.789667 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
219 09:49:44.789764 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
220 09:49:44.789848 No LXC device requested
221 09:49:44.789932 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 09:49:44.790021 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
223 09:49:44.790110 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 09:49:44.790197 Checking files for TFTP limit of 4294967296 bytes.
225 09:49:44.790598 end: 1 tftp-deploy (duration 00:00:21) [common]
226 09:49:44.790707 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 09:49:44.790802 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 09:49:44.790934 substitutions:
229 09:49:44.791004 - {DTB}: None
230 09:49:44.791071 - {INITRD}: 8794212/tftp-deploy-8k2reu4l/ramdisk/ramdisk.cpio.gz
231 09:49:44.791135 - {KERNEL}: 8794212/tftp-deploy-8k2reu4l/kernel/bzImage
232 09:49:44.791196 - {LAVA_MAC}: None
233 09:49:44.791256 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8794212/extract-nfsrootfs-in8rx19a
234 09:49:44.791316 - {NFS_SERVER_IP}: 192.168.201.1
235 09:49:44.791374 - {PRESEED_CONFIG}: None
236 09:49:44.791432 - {PRESEED_LOCAL}: None
237 09:49:44.791489 - {RAMDISK}: 8794212/tftp-deploy-8k2reu4l/ramdisk/ramdisk.cpio.gz
238 09:49:44.791548 - {ROOT_PART}: None
239 09:49:44.791605 - {ROOT}: None
240 09:49:44.791663 - {SERVER_IP}: 192.168.201.1
241 09:49:44.791720 - {TEE}: None
242 09:49:44.791778 Parsed boot commands:
243 09:49:44.791834 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 09:49:44.792015 Parsed boot commands: tftpboot 192.168.201.1 8794212/tftp-deploy-8k2reu4l/kernel/bzImage 8794212/tftp-deploy-8k2reu4l/kernel/cmdline 8794212/tftp-deploy-8k2reu4l/ramdisk/ramdisk.cpio.gz
245 09:49:44.792113 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 09:49:44.792204 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 09:49:44.792301 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 09:49:44.792392 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 09:49:44.792464 Not connected, no need to disconnect.
250 09:49:44.792547 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 09:49:44.792638 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 09:49:44.792710 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
253 09:49:44.795531 Setting prompt string to ['lava-test: # ']
254 09:49:44.795833 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 09:49:44.795948 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 09:49:44.796050 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 09:49:44.796147 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 09:49:44.796328 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
259 09:49:44.816167 >> Command sent successfully.
260 09:49:44.818386 Returned 0 in 0 seconds
261 09:49:44.919192 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 09:49:44.919525 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 09:49:44.919630 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 09:49:44.919720 Setting prompt string to 'Starting depthcharge on Helios...'
266 09:49:44.919788 Changing prompt to 'Starting depthcharge on Helios...'
267 09:49:44.919857 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 09:49:44.920137 [Enter `^Ec?' for help]
269 09:49:51.146054
270 09:49:51.146228
271 09:49:51.155263 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 09:49:51.158630 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 09:49:51.165379 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 09:49:51.168643 CPU: AES supported, TXT NOT supported, VT supported
275 09:49:51.175302 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 09:49:51.178570 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 09:49:51.185222 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 09:49:51.188590 VBOOT: Loading verstage.
279 09:49:51.191872 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 09:49:51.197918 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 09:49:51.205015 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 09:49:51.205103 CBFS @ c08000 size 3f8000
283 09:49:51.211602 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 09:49:51.214380 CBFS: Locating 'fallback/verstage'
285 09:49:51.217786 CBFS: Found @ offset 10fb80 size 1072c
286 09:49:51.222478
287 09:49:51.222558
288 09:49:51.232466 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 09:49:51.246394 Probing TPM: . done!
290 09:49:51.249965 TPM ready after 0 ms
291 09:49:51.253319 Connected to device vid:did:rid of 1ae0:0028:00
292 09:49:51.263600 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 09:49:51.266968 Initialized TPM device CR50 revision 0
294 09:49:51.306824 tlcl_send_startup: Startup return code is 0
295 09:49:51.306949 TPM: setup succeeded
296 09:49:51.319411 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 09:49:51.323369 Chrome EC: UHEPI supported
298 09:49:51.326709 Phase 1
299 09:49:51.330060 FMAP: area GBB found @ c05000 (12288 bytes)
300 09:49:51.336824 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 09:49:51.339402 Phase 2
302 09:49:51.339492 Phase 3
303 09:49:51.342804 FMAP: area GBB found @ c05000 (12288 bytes)
304 09:49:51.349765 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 09:49:51.356599 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
306 09:49:51.359380 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 09:49:51.366230 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 09:49:51.382106 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 09:49:51.385423 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 09:49:51.392095 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 09:49:51.396063 Phase 4
312 09:49:51.399463 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
313 09:49:51.405625 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 09:49:51.408805
315 09:49:51.585838 VB2:vb2_rsa_verify_digest() Digest check failed!
316 09:49:51.592600 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 09:49:51.592694 Saving nvdata
318 09:49:51.596076 Reboot requested (10020007)
319 09:49:51.598779 board_reset() called!
320 09:49:51.598865 full_reset() called!
321 09:49:56.112390
322 09:49:56.112549
323 09:49:56.122311 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 09:49:56.125715 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 09:49:56.132317 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 09:49:56.135651 CPU: AES supported, TXT NOT supported, VT supported
327 09:49:56.142493 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 09:49:56.145890 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 09:49:56.151890 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 09:49:56.155488 VBOOT: Loading verstage.
331 09:49:56.158935 FMAP: Found "FLASH" version 1.1 at 0xc04000.
332 09:49:56.165626 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 09:49:56.171730 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 09:49:56.171844 CBFS @ c08000 size 3f8000
335 09:49:56.178326 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 09:49:56.181701 CBFS: Locating 'fallback/verstage'
337 09:49:56.185031 CBFS: Found @ offset 10fb80 size 1072c
338 09:49:56.189099
339 09:49:56.189200
340 09:49:56.199446 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 09:49:56.213774 Probing TPM: . done!
342 09:49:56.217042 TPM ready after 0 ms
343 09:49:56.220423 Connected to device vid:did:rid of 1ae0:0028:00
344 09:49:56.230435 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
345 09:49:56.233667 Initialized TPM device CR50 revision 0
346 09:49:56.274223 tlcl_send_startup: Startup return code is 0
347 09:49:56.274326 TPM: setup succeeded
348 09:49:56.286479 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 09:49:56.290396 Chrome EC: UHEPI supported
350 09:49:56.293946 Phase 1
351 09:49:56.296768 FMAP: area GBB found @ c05000 (12288 bytes)
352 09:49:56.303658 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 09:49:56.309924 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 09:49:56.313365 Recovery requested (1009000e)
355 09:49:56.319428 Saving nvdata
356 09:49:56.325332 tlcl_extend: response is 0
357 09:49:56.334096 tlcl_extend: response is 0
358 09:49:56.340762 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 09:49:56.344138 CBFS @ c08000 size 3f8000
360 09:49:56.351106 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 09:49:56.353866 CBFS: Locating 'fallback/romstage'
362 09:49:56.357187 CBFS: Found @ offset 80 size 145fc
363 09:49:56.360655 Accumulated console time in verstage 98 ms
364 09:49:56.360737
365 09:49:56.360804
366 09:49:56.363954
367 09:49:56.373648 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
368 09:49:56.380457 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
369 09:49:56.383863 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
370 09:49:56.386711 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
371 09:49:56.393549 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
372 09:49:56.396917 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
373 09:49:56.400339 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
374 09:49:56.403796 TCO_STS: 0000 0000
375 09:49:56.406618 GEN_PMCON: e0015238 00000200
376 09:49:56.409870 GBLRST_CAUSE: 00000000 00000000
377 09:49:56.409957 prev_sleep_state 5
378 09:49:56.413899 Boot Count incremented to 45099
379 09:49:56.420691 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 09:49:56.424078 CBFS @ c08000 size 3f8000
381 09:49:56.430751 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
382 09:49:56.430836 CBFS: Locating 'fspm.bin'
383 09:49:56.436846 CBFS: Found @ offset 5ffc0 size 71000
384 09:49:56.440216 Chrome EC: UHEPI supported
385 09:49:56.446842 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
386 09:49:56.450790 Probing TPM: done!
387 09:49:56.457662 Connected to device vid:did:rid of 1ae0:0028:00
388 09:49:56.467341 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
389 09:49:56.472921 Initialized TPM device CR50 revision 0
390 09:49:56.482467 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 09:49:56.488620 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
392 09:49:56.492081 MRC cache found, size 1948
393 09:49:56.495512 bootmode is set to: 2
394 09:49:56.498947 PRMRR disabled by config.
395 09:49:56.499030 SPD INDEX = 1
396 09:49:56.502376
397 09:49:56.505066 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
398 09:49:56.508484 CBFS @ c08000 size 3f8000
399 09:49:56.515389 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
400 09:49:56.515482 CBFS: Locating 'spd.bin'
401 09:49:56.518920 CBFS: Found @ offset 5fb80 size 400
402 09:49:56.522149 SPD: module type is LPDDR3
403 09:49:56.524992 SPD: module part is
404 09:49:56.531574 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
405 09:49:56.534927 SPD: device width 4 bits, bus width 8 bits
406 09:49:56.538302 SPD: module size is 4096 MB (per channel)
407 09:49:56.541716 memory slot: 0 configuration done.
408 09:49:56.545030 memory slot: 2 configuration done.
409 09:49:56.596896 CBMEM:
410 09:49:56.600244 IMD: root @ 99fff000 254 entries.
411 09:49:56.603676 IMD: root @ 99ffec00 62 entries.
412 09:49:56.606446 External stage cache:
413 09:49:56.609877 IMD: root @ 9abff000 254 entries.
414 09:49:56.613391 IMD: root @ 9abfec00 62 entries.
415 09:49:56.616884 Chrome EC: clear events_b mask to 0x0000000020004000
416 09:49:56.619522
417 09:49:56.632346 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
418 09:49:56.645748 tlcl_write: response is 0
419 09:49:56.654559 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 09:49:56.661527 MRC: TPM MRC hash updated successfully.
421 09:49:56.661615 2 DIMMs found
422 09:49:56.664268 SMM Memory Map
423 09:49:56.667630 SMRAM : 0x9a000000 0x1000000
424 09:49:56.671010 Subregion 0: 0x9a000000 0xa00000
425 09:49:56.674535 Subregion 1: 0x9aa00000 0x200000
426 09:49:56.677956 Subregion 2: 0x9ac00000 0x400000
427 09:49:56.680788 top_of_ram = 0x9a000000
428 09:49:56.684062 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
429 09:49:56.690863 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
430 09:49:56.694311 MTRR Range: Start=ff000000 End=0 (Size 1000000)
431 09:49:56.700449 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
432 09:49:56.703859 CBFS @ c08000 size 3f8000
433 09:49:56.707302 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
434 09:49:56.710673 CBFS: Locating 'fallback/postcar'
435 09:49:56.713555
436 09:49:56.717020 CBFS: Found @ offset 107000 size 4b44
437 09:49:56.723774 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
438 09:49:56.733253 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
439 09:49:56.736712 Processing 180 relocs. Offset value of 0x97c0c000
440 09:49:56.745352 Accumulated console time in romstage 286 ms
441 09:49:56.745514
442 09:49:56.745585
443 09:49:56.755428 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
444 09:49:56.761769 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
445 09:49:56.765267 CBFS @ c08000 size 3f8000
446 09:49:56.768655 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
447 09:49:56.775431 CBFS: Locating 'fallback/ramstage'
448 09:49:56.778171 CBFS: Found @ offset 43380 size 1b9e8
449 09:49:56.784822 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
450 09:49:56.817022 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
451 09:49:56.820502 Processing 3976 relocs. Offset value of 0x98db0000
452 09:49:56.823116
453 09:49:56.826545 Accumulated console time in postcar 52 ms
454 09:49:56.826641
455 09:49:56.826711
456 09:49:56.836545 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 09:49:56.843343 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 09:49:56.846355 WARNING: RO_VPD is uninitialized or empty.
459 09:49:56.850088 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 09:49:56.856310 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 09:49:56.856396 Normal boot.
462 09:49:56.863321 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 09:49:56.865922 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 09:49:56.869275 CBFS @ c08000 size 3f8000
465 09:49:56.876015 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 09:49:56.879496 CBFS: Locating 'cpu_microcode_blob.bin'
467 09:49:56.882917 CBFS: Found @ offset 14700 size 2ec00
468 09:49:56.886150 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 09:49:56.889475 Skip microcode update
470 09:49:56.896280 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 09:49:56.896368 CBFS @ c08000 size 3f8000
472 09:49:56.902594 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 09:49:56.906074 CBFS: Locating 'fsps.bin'
474 09:49:56.908883 CBFS: Found @ offset d1fc0 size 35000
475 09:49:56.934870 Detected 4 core, 8 thread CPU.
476 09:49:56.938220 Setting up SMI for CPU
477 09:49:56.941578 IED base = 0x9ac00000
478 09:49:56.941660 IED size = 0x00400000
479 09:49:56.944958 Will perform SMM setup.
480 09:49:56.951901 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 09:49:56.957997 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 09:49:56.961475 Processing 16 relocs. Offset value of 0x00030000
483 09:49:56.965526 Attempting to start 7 APs
484 09:49:56.968897 Waiting for 10ms after sending INIT.
485 09:49:56.985255 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
486 09:49:56.985343 done.
487 09:49:56.987947 AP: slot 5 apic_id 6.
488 09:49:56.991432 AP: slot 7 apic_id 7.
489 09:49:56.991519 AP: slot 6 apic_id 5.
490 09:49:56.994770 AP: slot 4 apic_id 4.
491 09:49:56.998213 AP: slot 1 apic_id 3.
492 09:49:56.998299 AP: slot 3 apic_id 2.
493 09:49:57.005085 Waiting for 2nd SIPI to complete...done.
494 09:49:57.011186 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 09:49:57.014714 Processing 13 relocs. Offset value of 0x00038000
496 09:49:57.018116
497 09:49:57.021575 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 09:49:57.027549 Installing SMM handler to 0x9a000000
499 09:49:57.034292 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 09:49:57.040848 Processing 658 relocs. Offset value of 0x9a010000
501 09:49:57.047834 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
502 09:49:57.051247 Processing 13 relocs. Offset value of 0x9a008000
503 09:49:57.057780 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
504 09:49:57.063886 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
505 09:49:57.070786 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
506 09:49:57.074382 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
507 09:49:57.080421 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
508 09:49:57.087218 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
509 09:49:57.094079 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
510 09:49:57.096740 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
511 09:49:57.100128
512 09:49:57.103625 Clearing SMI status registers
513 09:49:57.103727 SMI_STS: PM1
514 09:49:57.107051 PM1_STS: PWRBTN
515 09:49:57.107186 TCO_STS: SECOND_TO
516 09:49:57.110475 New SMBASE 0x9a000000
517 09:49:57.113221 In relocation handler: CPU 0
518 09:49:57.116471 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
519 09:49:57.119888 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 09:49:57.123408
521 09:49:57.123488 Relocation complete.
522 09:49:57.126800 New SMBASE 0x99fff800
523 09:49:57.130163 In relocation handler: CPU 2
524 09:49:57.132982 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
525 09:49:57.136267 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 09:49:57.139601 Relocation complete.
527 09:49:57.142833 New SMBASE 0x99ffe400
528 09:49:57.146265 In relocation handler: CPU 7
529 09:49:57.149662 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
530 09:49:57.153055 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 09:49:57.156603 Relocation complete.
532 09:49:57.159405 New SMBASE 0x99ffec00
533 09:49:57.162687 In relocation handler: CPU 5
534 09:49:57.166207 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
535 09:49:57.169744 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 09:49:57.172433 Relocation complete.
537 09:49:57.175861 New SMBASE 0x99ffe800
538 09:49:57.179335 In relocation handler: CPU 6
539 09:49:57.182746 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
540 09:49:57.186219 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 09:49:57.188954 Relocation complete.
542 09:49:57.192465 New SMBASE 0x99fff000
543 09:49:57.195682 In relocation handler: CPU 4
544 09:49:57.199155 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
545 09:49:57.202559 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 09:49:57.205322 Relocation complete.
547 09:49:57.208760 New SMBASE 0x99fff400
548 09:49:57.212276 In relocation handler: CPU 3
549 09:49:57.215007 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
550 09:49:57.218548 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 09:49:57.221931 Relocation complete.
552 09:49:57.225320 New SMBASE 0x99fffc00
553 09:49:57.228799 In relocation handler: CPU 1
554 09:49:57.232188 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
555 09:49:57.234972 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 09:49:57.238397 Relocation complete.
557 09:49:57.241712 Initializing CPU #0
558 09:49:57.244847 CPU: vendor Intel device 806ec
559 09:49:57.248208 CPU: family 06, model 8e, stepping 0c
560 09:49:57.251637 Clearing out pending MCEs
561 09:49:57.251718 Setting up local APIC...
562 09:49:57.254945 apic_id: 0x00 done.
563 09:49:57.258159 Turbo is available but hidden
564 09:49:57.261610 Turbo is available and visible
565 09:49:57.261683 VMX status: enabled
566 09:49:57.267926 IA32_FEATURE_CONTROL status: locked
567 09:49:57.268006 Skip microcode update
568 09:49:57.271383 CPU #0 initialized
569 09:49:57.271454 Initializing CPU #2
570 09:49:57.274770
571 09:49:57.274841 Initializing CPU #6
572 09:49:57.278377 Initializing CPU #4
573 09:49:57.281168 CPU: vendor Intel device 806ec
574 09:49:57.284508 CPU: family 06, model 8e, stepping 0c
575 09:49:57.287911 CPU: vendor Intel device 806ec
576 09:49:57.291340 CPU: family 06, model 8e, stepping 0c
577 09:49:57.294772 Clearing out pending MCEs
578 09:49:57.297346 Clearing out pending MCEs
579 09:49:57.297465 Setting up local APIC...
580 09:49:57.300711 Initializing CPU #5
581 09:49:57.304113 Initializing CPU #7
582 09:49:57.304193 CPU: vendor Intel device 806ec
583 09:49:57.307507
584 09:49:57.310952 CPU: family 06, model 8e, stepping 0c
585 09:49:57.311036 Initializing CPU #1
586 09:49:57.314426 Initializing CPU #3
587 09:49:57.317867 Setting up local APIC...
588 09:49:57.320468 CPU: vendor Intel device 806ec
589 09:49:57.323837 CPU: family 06, model 8e, stepping 0c
590 09:49:57.327312 Clearing out pending MCEs
591 09:49:57.327392 CPU: vendor Intel device 806ec
592 09:49:57.334281 CPU: family 06, model 8e, stepping 0c
593 09:49:57.337358 CPU: vendor Intel device 806ec
594 09:49:57.340923 CPU: family 06, model 8e, stepping 0c
595 09:49:57.341008 Clearing out pending MCEs
596 09:49:57.344231
597 09:49:57.344306 Clearing out pending MCEs
598 09:49:57.347518 Setting up local APIC...
599 09:49:57.350257 Setting up local APIC...
600 09:49:57.353743 Setting up local APIC...
601 09:49:57.357136 CPU: vendor Intel device 806ec
602 09:49:57.360503 CPU: family 06, model 8e, stepping 0c
603 09:49:57.360587 Clearing out pending MCEs
604 09:49:57.363852 Clearing out pending MCEs
605 09:49:57.367254 Setting up local APIC...
606 09:49:57.370037 apic_id: 0x03 done.
607 09:49:57.370118 apic_id: 0x02 done.
608 09:49:57.373381 VMX status: enabled
609 09:49:57.376856 VMX status: enabled
610 09:49:57.380348 IA32_FEATURE_CONTROL status: locked
611 09:49:57.383126 IA32_FEATURE_CONTROL status: locked
612 09:49:57.383211 Skip microcode update
613 09:49:57.386659 Skip microcode update
614 09:49:57.389911 CPU #1 initialized
615 09:49:57.389997 CPU #3 initialized
616 09:49:57.393505 apic_id: 0x07 done.
617 09:49:57.396871 Setting up local APIC...
618 09:49:57.396963 VMX status: enabled
619 09:49:57.400294 apic_id: 0x04 done.
620 09:49:57.403675 apic_id: 0x05 done.
621 09:49:57.403762 VMX status: enabled
622 09:49:57.406388 VMX status: enabled
623 09:49:57.409824 IA32_FEATURE_CONTROL status: locked
624 09:49:57.413179 IA32_FEATURE_CONTROL status: locked
625 09:49:57.416645 Skip microcode update
626 09:49:57.416730 Skip microcode update
627 09:49:57.420124 CPU #4 initialized
628 09:49:57.422885 CPU #6 initialized
629 09:49:57.422963 apic_id: 0x01 done.
630 09:49:57.426205 apic_id: 0x06 done.
631 09:49:57.429669 IA32_FEATURE_CONTROL status: locked
632 09:49:57.433128 VMX status: enabled
633 09:49:57.433213 Skip microcode update
634 09:49:57.436465 IA32_FEATURE_CONTROL status: locked
635 09:49:57.439840 CPU #7 initialized
636 09:49:57.443178 Skip microcode update
637 09:49:57.443278 VMX status: enabled
638 09:49:57.446444 CPU #5 initialized
639 09:49:57.449797 IA32_FEATURE_CONTROL status: locked
640 09:49:57.452516 Skip microcode update
641 09:49:57.452602 CPU #2 initialized
642 09:49:57.459374 bsp_do_flight_plan done after 452 msecs.
643 09:49:57.459531 CPU: frequency set to 4200 MHz
644 09:49:57.462837 Enabling SMIs.
645 09:49:57.462939 Locking SMM.
646 09:49:57.478401 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
647 09:49:57.481901 CBFS @ c08000 size 3f8000
648 09:49:57.488721 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
649 09:49:57.488812 CBFS: Locating 'vbt.bin'
650 09:49:57.492100 CBFS: Found @ offset 5f5c0 size 499
651 09:49:57.494878
652 09:49:57.498254 Found a VBT of 4608 bytes after decompression
653 09:49:57.679356 Display FSP Version Info HOB
654 09:49:57.681946 Reference Code - CPU = 9.0.1e.30
655 09:49:57.685357 uCode Version = 0.0.0.ca
656 09:49:57.688853 TXT ACM version = ff.ff.ff.ffff
657 09:49:57.692350 Display FSP Version Info HOB
658 09:49:57.695112 Reference Code - ME = 9.0.1e.30
659 09:49:57.698462 MEBx version = 0.0.0.0
660 09:49:57.701785 ME Firmware Version = Consumer SKU
661 09:49:57.705186 Display FSP Version Info HOB
662 09:49:57.708474 Reference Code - CML PCH = 9.0.1e.30
663 09:49:57.711964 PCH-CRID Status = Disabled
664 09:49:57.715415 PCH-CRID Original Value = ff.ff.ff.ffff
665 09:49:57.718058 PCH-CRID New Value = ff.ff.ff.ffff
666 09:49:57.721537 OPROM - RST - RAID = ff.ff.ff.ffff
667 09:49:57.724898 ChipsetInit Base Version = ff.ff.ff.ffff
668 09:49:57.728306 ChipsetInit Oem Version = ff.ff.ff.ffff
669 09:49:57.731740 Display FSP Version Info HOB
670 09:49:57.738046 Reference Code - SA - System Agent = 9.0.1e.30
671 09:49:57.741264 Reference Code - MRC = 0.7.1.6c
672 09:49:57.744632 SA - PCIe Version = 9.0.1e.30
673 09:49:57.747384 SA-CRID Status = Disabled
674 09:49:57.750668 SA-CRID Original Value = 0.0.0.c
675 09:49:57.750754 SA-CRID New Value = 0.0.0.c
676 09:49:57.754062 OPROM - VBIOS = ff.ff.ff.ffff
677 09:49:57.758195 RTC Init
678 09:49:57.760787 Set power on after power failure.
679 09:49:57.760872 Disabling Deep S3
680 09:49:57.764202 Disabling Deep S3
681 09:49:57.767693 Disabling Deep S4
682 09:49:57.767779 Disabling Deep S4
683 09:49:57.771051 Disabling Deep S5
684 09:49:57.771168 Disabling Deep S5
685 09:49:57.777578 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
686 09:49:57.780334 Enumerating buses...
687 09:49:57.783852 Show all devs... Before device enumeration.
688 09:49:57.787257 Root Device: enabled 1
689 09:49:57.790065 CPU_CLUSTER: 0: enabled 1
690 09:49:57.790151 DOMAIN: 0000: enabled 1
691 09:49:57.793380 APIC: 00: enabled 1
692 09:49:57.796733 PCI: 00:00.0: enabled 1
693 09:49:57.796819 PCI: 00:02.0: enabled 1
694 09:49:57.800157
695 09:49:57.800242 PCI: 00:04.0: enabled 0
696 09:49:57.803596 PCI: 00:05.0: enabled 0
697 09:49:57.806287 PCI: 00:12.0: enabled 1
698 09:49:57.806424 PCI: 00:12.5: enabled 0
699 09:49:57.809691 PCI: 00:12.6: enabled 0
700 09:49:57.812914 PCI: 00:14.0: enabled 1
701 09:49:57.816392 PCI: 00:14.1: enabled 0
702 09:49:57.816477 PCI: 00:14.3: enabled 1
703 09:49:57.819712 PCI: 00:14.5: enabled 0
704 09:49:57.823123 PCI: 00:15.0: enabled 1
705 09:49:57.826521 PCI: 00:15.1: enabled 1
706 09:49:57.826606 PCI: 00:15.2: enabled 0
707 09:49:57.829913 PCI: 00:15.3: enabled 0
708 09:49:57.832494 PCI: 00:16.0: enabled 1
709 09:49:57.836114 PCI: 00:16.1: enabled 0
710 09:49:57.836199 PCI: 00:16.2: enabled 0
711 09:49:57.839570 PCI: 00:16.3: enabled 0
712 09:49:57.842943 PCI: 00:16.4: enabled 0
713 09:49:57.845699 PCI: 00:16.5: enabled 0
714 09:49:57.845828 PCI: 00:17.0: enabled 1
715 09:49:57.849143 PCI: 00:19.0: enabled 1
716 09:49:57.852658 PCI: 00:19.1: enabled 0
717 09:49:57.856032 PCI: 00:19.2: enabled 0
718 09:49:57.856118 PCI: 00:1a.0: enabled 0
719 09:49:57.858756 PCI: 00:1c.0: enabled 0
720 09:49:57.862059 PCI: 00:1c.1: enabled 0
721 09:49:57.865325 PCI: 00:1c.2: enabled 0
722 09:49:57.865466 PCI: 00:1c.3: enabled 0
723 09:49:57.868746 PCI: 00:1c.4: enabled 0
724 09:49:57.872080 PCI: 00:1c.5: enabled 0
725 09:49:57.875615 PCI: 00:1c.6: enabled 0
726 09:49:57.875702 PCI: 00:1c.7: enabled 0
727 09:49:57.878449 PCI: 00:1d.0: enabled 1
728 09:49:57.881913 PCI: 00:1d.1: enabled 0
729 09:49:57.885335 PCI: 00:1d.2: enabled 0
730 09:49:57.885468 PCI: 00:1d.3: enabled 0
731 09:49:57.888732 PCI: 00:1d.4: enabled 0
732 09:49:57.891472 PCI: 00:1d.5: enabled 1
733 09:49:57.894870 PCI: 00:1e.0: enabled 1
734 09:49:57.894957 PCI: 00:1e.1: enabled 0
735 09:49:57.898279 PCI: 00:1e.2: enabled 1
736 09:49:57.901612 PCI: 00:1e.3: enabled 1
737 09:49:57.901705 PCI: 00:1f.0: enabled 1
738 09:49:57.905107 PCI: 00:1f.1: enabled 1
739 09:49:57.907814 PCI: 00:1f.2: enabled 1
740 09:49:57.911104 PCI: 00:1f.3: enabled 1
741 09:49:57.911179 PCI: 00:1f.4: enabled 1
742 09:49:57.914484 PCI: 00:1f.5: enabled 1
743 09:49:57.917881 PCI: 00:1f.6: enabled 0
744 09:49:57.921345 USB0 port 0: enabled 1
745 09:49:57.921464 I2C: 00:15: enabled 1
746 09:49:57.924821 I2C: 00:5d: enabled 1
747 09:49:57.927571 GENERIC: 0.0: enabled 1
748 09:49:57.927682 I2C: 00:1a: enabled 1
749 09:49:57.930915 I2C: 00:38: enabled 1
750 09:49:57.934391 I2C: 00:39: enabled 1
751 09:49:57.934473 I2C: 00:3a: enabled 1
752 09:49:57.937846 I2C: 00:3b: enabled 1
753 09:49:57.941346 PCI: 00:00.0: enabled 1
754 09:49:57.941469 SPI: 00: enabled 1
755 09:49:57.944145 SPI: 01: enabled 1
756 09:49:57.947536 PNP: 0c09.0: enabled 1
757 09:49:57.947621 USB2 port 0: enabled 1
758 09:49:57.951063
759 09:49:57.951149 USB2 port 1: enabled 1
760 09:49:57.953823 USB2 port 2: enabled 0
761 09:49:57.957209 USB2 port 3: enabled 0
762 09:49:57.957295 USB2 port 5: enabled 0
763 09:49:57.960498 USB2 port 6: enabled 1
764 09:49:57.963983 USB2 port 9: enabled 1
765 09:49:57.966858 USB3 port 0: enabled 1
766 09:49:57.966943 USB3 port 1: enabled 1
767 09:49:57.970179 USB3 port 2: enabled 1
768 09:49:57.973649 USB3 port 3: enabled 1
769 09:49:57.973736 USB3 port 4: enabled 0
770 09:49:57.977025 APIC: 03: enabled 1
771 09:49:57.979851 APIC: 01: enabled 1
772 09:49:57.979936 APIC: 02: enabled 1
773 09:49:57.983104 APIC: 04: enabled 1
774 09:49:57.983189 APIC: 06: enabled 1
775 09:49:57.986537
776 09:49:57.986623 APIC: 05: enabled 1
777 09:49:57.989888 APIC: 07: enabled 1
778 09:49:57.989994 Compare with tree...
779 09:49:57.993389 Root Device: enabled 1
780 09:49:57.996738 CPU_CLUSTER: 0: enabled 1
781 09:49:57.999628 APIC: 00: enabled 1
782 09:49:57.999714 APIC: 03: enabled 1
783 09:49:58.003050 APIC: 01: enabled 1
784 09:49:58.006554 APIC: 02: enabled 1
785 09:49:58.006640 APIC: 04: enabled 1
786 09:49:58.009970 APIC: 06: enabled 1
787 09:49:58.012715 APIC: 05: enabled 1
788 09:49:58.012813 APIC: 07: enabled 1
789 09:49:58.016048 DOMAIN: 0000: enabled 1
790 09:49:58.019346 PCI: 00:00.0: enabled 1
791 09:49:58.022959 PCI: 00:02.0: enabled 1
792 09:49:58.026437 PCI: 00:04.0: enabled 0
793 09:49:58.026521 PCI: 00:05.0: enabled 0
794 09:49:58.029236 PCI: 00:12.0: enabled 1
795 09:49:58.032709 PCI: 00:12.5: enabled 0
796 09:49:58.035527 PCI: 00:12.6: enabled 0
797 09:49:58.038981 PCI: 00:14.0: enabled 1
798 09:49:58.039065 USB0 port 0: enabled 1
799 09:49:58.042477 USB2 port 0: enabled 1
800 09:49:58.045434 USB2 port 1: enabled 1
801 09:49:58.048678 USB2 port 2: enabled 0
802 09:49:58.052109 USB2 port 3: enabled 0
803 09:49:58.055638 USB2 port 5: enabled 0
804 09:49:58.055722 USB2 port 6: enabled 1
805 09:49:58.058384 USB2 port 9: enabled 1
806 09:49:58.061838 USB3 port 0: enabled 1
807 09:49:58.065265 USB3 port 1: enabled 1
808 09:49:58.068717 USB3 port 2: enabled 1
809 09:49:58.072025 USB3 port 3: enabled 1
810 09:49:58.072110 USB3 port 4: enabled 0
811 09:49:58.075432 PCI: 00:14.1: enabled 0
812 09:49:58.078066 PCI: 00:14.3: enabled 1
813 09:49:58.081593 PCI: 00:14.5: enabled 0
814 09:49:58.085092 PCI: 00:15.0: enabled 1
815 09:49:58.085177 I2C: 00:15: enabled 1
816 09:49:58.088527 PCI: 00:15.1: enabled 1
817 09:49:58.091268 I2C: 00:5d: enabled 1
818 09:49:58.094753 GENERIC: 0.0: enabled 1
819 09:49:58.098230 PCI: 00:15.2: enabled 0
820 09:49:58.098315 PCI: 00:15.3: enabled 0
821 09:49:58.101643 PCI: 00:16.0: enabled 1
822 09:49:58.105056 PCI: 00:16.1: enabled 0
823 09:49:58.107848 PCI: 00:16.2: enabled 0
824 09:49:58.111233 PCI: 00:16.3: enabled 0
825 09:49:58.111319 PCI: 00:16.4: enabled 0
826 09:49:58.114615 PCI: 00:16.5: enabled 0
827 09:49:58.117980 PCI: 00:17.0: enabled 1
828 09:49:58.121336 PCI: 00:19.0: enabled 1
829 09:49:58.121460 I2C: 00:1a: enabled 1
830 09:49:58.124117
831 09:49:58.124204 I2C: 00:38: enabled 1
832 09:49:58.127623 I2C: 00:39: enabled 1
833 09:49:58.131120 I2C: 00:3a: enabled 1
834 09:49:58.133960 I2C: 00:3b: enabled 1
835 09:49:58.134045 PCI: 00:19.1: enabled 0
836 09:49:58.137441 PCI: 00:19.2: enabled 0
837 09:49:58.140814 PCI: 00:1a.0: enabled 0
838 09:49:58.144321 PCI: 00:1c.0: enabled 0
839 09:49:58.147030 PCI: 00:1c.1: enabled 0
840 09:49:58.147115 PCI: 00:1c.2: enabled 0
841 09:49:58.150520 PCI: 00:1c.3: enabled 0
842 09:49:58.153771 PCI: 00:1c.4: enabled 0
843 09:49:58.157302 PCI: 00:1c.5: enabled 0
844 09:49:58.160063 PCI: 00:1c.6: enabled 0
845 09:49:58.160137 PCI: 00:1c.7: enabled 0
846 09:49:58.163619 PCI: 00:1d.0: enabled 1
847 09:49:58.167084 PCI: 00:1d.1: enabled 0
848 09:49:58.170502 PCI: 00:1d.2: enabled 0
849 09:49:58.173336 PCI: 00:1d.3: enabled 0
850 09:49:58.173445 PCI: 00:1d.4: enabled 0
851 09:49:58.176727 PCI: 00:1d.5: enabled 1
852 09:49:58.180090 PCI: 00:00.0: enabled 1
853 09:49:58.182889 PCI: 00:1e.0: enabled 1
854 09:49:58.186411 PCI: 00:1e.1: enabled 0
855 09:49:58.189987 PCI: 00:1e.2: enabled 1
856 09:49:58.190073 SPI: 00: enabled 1
857 09:49:58.193355 PCI: 00:1e.3: enabled 1
858 09:49:58.196080 SPI: 01: enabled 1
859 09:49:58.196166 PCI: 00:1f.0: enabled 1
860 09:49:58.199647
861 09:49:58.199749 PNP: 0c09.0: enabled 1
862 09:49:58.202874 PCI: 00:1f.1: enabled 1
863 09:49:58.206352 PCI: 00:1f.2: enabled 1
864 09:49:58.209131 PCI: 00:1f.3: enabled 1
865 09:49:58.212576 PCI: 00:1f.4: enabled 1
866 09:49:58.212662 PCI: 00:1f.5: enabled 1
867 09:49:58.215924 PCI: 00:1f.6: enabled 0
868 09:49:58.219356 Root Device scanning...
869 09:49:58.222705 scan_static_bus for Root Device
870 09:49:58.226097 CPU_CLUSTER: 0 enabled
871 09:49:58.226184 DOMAIN: 0000 enabled
872 09:49:58.228920 DOMAIN: 0000 scanning...
873 09:49:58.232479 PCI: pci_scan_bus for bus 00
874 09:49:58.235381 PCI: 00:00.0 [8086/0000] ops
875 09:49:58.238815 PCI: 00:00.0 [8086/9b61] enabled
876 09:49:58.242003 PCI: 00:02.0 [8086/0000] bus ops
877 09:49:58.245469 PCI: 00:02.0 [8086/9b41] enabled
878 09:49:58.248892 PCI: 00:04.0 [8086/1903] disabled
879 09:49:58.251614 PCI: 00:08.0 [8086/1911] enabled
880 09:49:58.255015 PCI: 00:12.0 [8086/02f9] enabled
881 09:49:58.258352 PCI: 00:14.0 [8086/0000] bus ops
882 09:49:58.261910 PCI: 00:14.0 [8086/02ed] enabled
883 09:49:58.264774 PCI: 00:14.2 [8086/02ef] enabled
884 09:49:58.268211 PCI: 00:14.3 [8086/02f0] enabled
885 09:49:58.271693 PCI: 00:15.0 [8086/0000] bus ops
886 09:49:58.274438 PCI: 00:15.0 [8086/02e8] enabled
887 09:49:58.277912 PCI: 00:15.1 [8086/0000] bus ops
888 09:49:58.281338 PCI: 00:15.1 [8086/02e9] enabled
889 09:49:58.284730 PCI: 00:16.0 [8086/0000] ops
890 09:49:58.288074 PCI: 00:16.0 [8086/02e0] enabled
891 09:49:58.290894 PCI: 00:17.0 [8086/0000] ops
892 09:49:58.294254 PCI: 00:17.0 [8086/02d3] enabled
893 09:49:58.297651 PCI: 00:19.0 [8086/0000] bus ops
894 09:49:58.301099 PCI: 00:19.0 [8086/02c5] enabled
895 09:49:58.303896 PCI: 00:1d.0 [8086/0000] bus ops
896 09:49:58.307308 PCI: 00:1d.0 [8086/02b0] enabled
897 09:49:58.314115 PCI: Static device PCI: 00:1d.5 not found, disabling it.
898 09:49:58.317563 PCI: 00:1e.0 [8086/0000] ops
899 09:49:58.320255 PCI: 00:1e.0 [8086/02a8] enabled
900 09:49:58.323701 PCI: 00:1e.2 [8086/0000] bus ops
901 09:49:58.327016 PCI: 00:1e.2 [8086/02aa] enabled
902 09:49:58.330409 PCI: 00:1e.3 [8086/0000] bus ops
903 09:49:58.333881 PCI: 00:1e.3 [8086/02ab] enabled
904 09:49:58.336685 PCI: 00:1f.0 [8086/0000] bus ops
905 09:49:58.340040 PCI: 00:1f.0 [8086/0284] enabled
906 09:49:58.346857 PCI: Static device PCI: 00:1f.1 not found, disabling it.
907 09:49:58.350374 PCI: Static device PCI: 00:1f.2 not found, disabling it.
908 09:49:58.353280 PCI: 00:1f.3 [8086/0000] bus ops
909 09:49:58.356742 PCI: 00:1f.3 [8086/02c8] enabled
910 09:49:58.360116 PCI: 00:1f.4 [8086/0000] bus ops
911 09:49:58.363002 PCI: 00:1f.4 [8086/02a3] enabled
912 09:49:58.366412 PCI: 00:1f.5 [8086/0000] bus ops
913 09:49:58.369947 PCI: 00:1f.5 [8086/02a4] enabled
914 09:49:58.372779 PCI: Leftover static devices:
915 09:49:58.376130 PCI: 00:05.0
916 09:49:58.376212 PCI: 00:12.5
917 09:49:58.379505 PCI: 00:12.6
918 09:49:58.379581 PCI: 00:14.1
919 09:49:58.379647 PCI: 00:14.5
920 09:49:58.382976
921 09:49:58.383058 PCI: 00:15.2
922 09:49:58.383126 PCI: 00:15.3
923 09:49:58.385776 PCI: 00:16.1
924 09:49:58.385853 PCI: 00:16.2
925 09:49:58.389250 PCI: 00:16.3
926 09:49:58.389329 PCI: 00:16.4
927 09:49:58.389434 PCI: 00:16.5
928 09:49:58.392724 PCI: 00:19.1
929 09:49:58.392807 PCI: 00:19.2
930 09:49:58.396107 PCI: 00:1a.0
931 09:49:58.396185 PCI: 00:1c.0
932 09:49:58.396270 PCI: 00:1c.1
933 09:49:58.398920 PCI: 00:1c.2
934 09:49:58.398997 PCI: 00:1c.3
935 09:49:58.402337 PCI: 00:1c.4
936 09:49:58.402425 PCI: 00:1c.5
937 09:49:58.405792 PCI: 00:1c.6
938 09:49:58.405875 PCI: 00:1c.7
939 09:49:58.405952 PCI: 00:1d.1
940 09:49:58.409272 PCI: 00:1d.2
941 09:49:58.409357 PCI: 00:1d.3
942 09:49:58.412040 PCI: 00:1d.4
943 09:49:58.412125 PCI: 00:1d.5
944 09:49:58.412191 PCI: 00:1e.1
945 09:49:58.415329 PCI: 00:1f.1
946 09:49:58.415417 PCI: 00:1f.2
947 09:49:58.418694 PCI: 00:1f.6
948 09:49:58.422148 PCI: Check your devicetree.cb.
949 09:49:58.422233 PCI: 00:02.0 scanning...
950 09:49:58.425629 scan_generic_bus for PCI: 00:02.0
951 09:49:58.429000
952 09:49:58.431775 scan_generic_bus for PCI: 00:02.0 done
953 09:49:58.435297 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
954 09:49:58.438627 PCI: 00:14.0 scanning...
955 09:49:58.441936 scan_static_bus for PCI: 00:14.0
956 09:49:58.445412 USB0 port 0 enabled
957 09:49:58.448812 USB0 port 0 scanning...
958 09:49:58.451549 scan_static_bus for USB0 port 0
959 09:49:58.451635 USB2 port 0 enabled
960 09:49:58.454912 USB2 port 1 enabled
961 09:49:58.458344 USB2 port 2 disabled
962 09:49:58.458430 USB2 port 3 disabled
963 09:49:58.461698 USB2 port 5 disabled
964 09:49:58.465161 USB2 port 6 enabled
965 09:49:58.465246 USB2 port 9 enabled
966 09:49:58.468038 USB3 port 0 enabled
967 09:49:58.468124 USB3 port 1 enabled
968 09:49:58.471567 USB3 port 2 enabled
969 09:49:58.474990 USB3 port 3 enabled
970 09:49:58.475076 USB3 port 4 disabled
971 09:49:58.477724 USB2 port 0 scanning...
972 09:49:58.481088 scan_static_bus for USB2 port 0
973 09:49:58.484470 scan_static_bus for USB2 port 0 done
974 09:49:58.491410 scan_bus: scanning of bus USB2 port 0 took 9754 usecs
975 09:49:58.494121 USB2 port 1 scanning...
976 09:49:58.497659 scan_static_bus for USB2 port 1
977 09:49:58.501050 scan_static_bus for USB2 port 1 done
978 09:49:58.503962 scan_bus: scanning of bus USB2 port 1 took 9707 usecs
979 09:49:58.507340
980 09:49:58.507473 USB2 port 6 scanning...
981 09:49:58.510730 scan_static_bus for USB2 port 6
982 09:49:58.514122 scan_static_bus for USB2 port 6 done
983 09:49:58.520365 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
984 09:49:58.523786 USB2 port 9 scanning...
985 09:49:58.527317 scan_static_bus for USB2 port 9
986 09:49:58.530601 scan_static_bus for USB2 port 9 done
987 09:49:58.536615 scan_bus: scanning of bus USB2 port 9 took 9689 usecs
988 09:49:58.536705 USB3 port 0 scanning...
989 09:49:58.540032 scan_static_bus for USB3 port 0
990 09:49:58.547003 scan_static_bus for USB3 port 0 done
991 09:49:58.550411 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
992 09:49:58.553200 USB3 port 1 scanning...
993 09:49:58.556646 scan_static_bus for USB3 port 1
994 09:49:58.559960 scan_static_bus for USB3 port 1 done
995 09:49:58.566866 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
996 09:49:58.566950 USB3 port 2 scanning...
997 09:49:58.569554
998 09:49:58.572957 scan_static_bus for USB3 port 2
999 09:49:58.576415 scan_static_bus for USB3 port 2 done
1000 09:49:58.579858 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
1001 09:49:58.582609 USB3 port 3 scanning...
1002 09:49:58.586098 scan_static_bus for USB3 port 3
1003 09:49:58.589511 scan_static_bus for USB3 port 3 done
1004 09:49:58.595751 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
1005 09:49:58.599320 scan_static_bus for USB0 port 0 done
1006 09:49:58.605634 scan_bus: scanning of bus USB0 port 0 took 155433 usecs
1007 09:49:58.609115 scan_static_bus for PCI: 00:14.0 done
1008 09:49:58.615281 scan_bus: scanning of bus PCI: 00:14.0 took 173055 usecs
1009 09:49:58.615365 PCI: 00:15.0 scanning...
1010 09:49:58.622026 scan_generic_bus for PCI: 00:15.0
1011 09:49:58.625491 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1012 09:49:58.628894 scan_generic_bus for PCI: 00:15.0 done
1013 09:49:58.635430 scan_bus: scanning of bus PCI: 00:15.0 took 14307 usecs
1014 09:49:58.635512 PCI: 00:15.1 scanning...
1015 09:49:58.638709 scan_generic_bus for PCI: 00:15.1
1016 09:49:58.642047
1017 09:49:58.645548 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1018 09:49:58.648287 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1019 09:49:58.651727 scan_generic_bus for PCI: 00:15.1 done
1020 09:49:58.658498 scan_bus: scanning of bus PCI: 00:15.1 took 18607 usecs
1021 09:49:58.661353 PCI: 00:19.0 scanning...
1022 09:49:58.664742 scan_generic_bus for PCI: 00:19.0
1023 09:49:58.668112 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1024 09:49:58.671491 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1025 09:49:58.678177 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1026 09:49:58.681605 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1027 09:49:58.684463 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1028 09:49:58.687815 scan_generic_bus for PCI: 00:19.0 done
1029 09:49:58.694559 scan_bus: scanning of bus PCI: 00:19.0 took 30729 usecs
1030 09:49:58.697467 PCI: 00:1d.0 scanning...
1031 09:49:58.701012 do_pci_scan_bridge for PCI: 00:1d.0
1032 09:49:58.704472 PCI: pci_scan_bus for bus 01
1033 09:49:58.707265 PCI: 01:00.0 [1c5c/1327] enabled
1034 09:49:58.710585 Enabling Common Clock Configuration
1035 09:49:58.714076 L1 Sub-State supported from root port 29
1036 09:49:58.717549 L1 Sub-State Support = 0xf
1037 09:49:58.720353 CommonModeRestoreTime = 0x28
1038 09:49:58.723672 Power On Value = 0x16, Power On Scale = 0x0
1039 09:49:58.727232 ASPM: Enabled L1
1040 09:49:58.733305 scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs
1041 09:49:58.733429 PCI: 00:1e.2 scanning...
1042 09:49:58.737238 scan_generic_bus for PCI: 00:1e.2
1043 09:49:58.740628
1044 09:49:58.743440 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1045 09:49:58.746799 scan_generic_bus for PCI: 00:1e.2 done
1046 09:49:58.753622 scan_bus: scanning of bus PCI: 00:1e.2 took 13996 usecs
1047 09:49:58.753708 PCI: 00:1e.3 scanning...
1048 09:49:58.756446 scan_generic_bus for PCI: 00:1e.3
1049 09:49:58.763221 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1050 09:49:58.766580 scan_generic_bus for PCI: 00:1e.3 done
1051 09:49:58.770102 scan_bus: scanning of bus PCI: 00:1e.3 took 14014 usecs
1052 09:49:58.772815 PCI: 00:1f.0 scanning...
1053 09:49:58.776315 scan_static_bus for PCI: 00:1f.0
1054 09:49:58.779782 PNP: 0c09.0 enabled
1055 09:49:58.783172 scan_static_bus for PCI: 00:1f.0 done
1056 09:49:58.789399 scan_bus: scanning of bus PCI: 00:1f.0 took 12039 usecs
1057 09:49:58.792799 PCI: 00:1f.3 scanning...
1058 09:49:58.796297 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1059 09:49:58.799749 PCI: 00:1f.4 scanning...
1060 09:49:58.802462 scan_generic_bus for PCI: 00:1f.4
1061 09:49:58.805871 scan_generic_bus for PCI: 00:1f.4 done
1062 09:49:58.812302 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1063 09:49:58.815676 PCI: 00:1f.5 scanning...
1064 09:49:58.819186 scan_generic_bus for PCI: 00:1f.5
1065 09:49:58.822689 scan_generic_bus for PCI: 00:1f.5 done
1066 09:49:58.828780 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1067 09:49:58.835482 scan_bus: scanning of bus DOMAIN: 0000 took 605090 usecs
1068 09:49:58.838752 scan_static_bus for Root Device done
1069 09:49:58.844882 scan_bus: scanning of bus Root Device took 624951 usecs
1070 09:49:58.845002 done
1071 09:49:58.848486 Chrome EC: UHEPI supported
1072 09:49:58.854717 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1073 09:49:58.858176 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1074 09:49:58.861683
1075 09:49:58.864338 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1076 09:49:58.872532 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1077 09:49:58.875316 SPI flash protection: WPSW=0 SRP0=1
1078 09:49:58.882387 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1079 09:49:58.885024 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1080 09:49:58.888491 found VGA at PCI: 00:02.0
1081 09:49:58.891985 Setting up VGA for PCI: 00:02.0
1082 09:49:58.898293 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1083 09:49:58.901615 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1084 09:49:58.904977 Allocating resources...
1085 09:49:58.908288 Reading resources...
1086 09:49:58.911773 Root Device read_resources bus 0 link: 0
1087 09:49:58.914537 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1088 09:49:58.921409 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1089 09:49:58.924880 DOMAIN: 0000 read_resources bus 0 link: 0
1090 09:49:58.932302 PCI: 00:14.0 read_resources bus 0 link: 0
1091 09:49:58.935684 USB0 port 0 read_resources bus 0 link: 0
1092 09:49:58.943800 USB0 port 0 read_resources bus 0 link: 0 done
1093 09:49:58.947101 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 09:49:58.954813 PCI: 00:15.0 read_resources bus 1 link: 0
1095 09:49:58.957554 PCI: 00:15.0 read_resources bus 1 link: 0 done
1096 09:49:58.964455 PCI: 00:15.1 read_resources bus 2 link: 0
1097 09:49:58.967920 PCI: 00:15.1 read_resources bus 2 link: 0 done
1098 09:49:58.975458 PCI: 00:19.0 read_resources bus 3 link: 0
1099 09:49:58.981646 PCI: 00:19.0 read_resources bus 3 link: 0 done
1100 09:49:58.984984 PCI: 00:1d.0 read_resources bus 1 link: 0
1101 09:49:58.991893 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1102 09:49:58.994582 PCI: 00:1e.2 read_resources bus 4 link: 0
1103 09:49:59.001361 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1104 09:49:59.004847 PCI: 00:1e.3 read_resources bus 5 link: 0
1105 09:49:59.011077 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1106 09:49:59.014482 PCI: 00:1f.0 read_resources bus 0 link: 0
1107 09:49:59.021309 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1108 09:49:59.027462 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 09:49:59.030852 Root Device read_resources bus 0 link: 0 done
1110 09:49:59.034309 Done reading resources.
1111 09:49:59.041040 Show resources in subtree (Root Device)...After reading.
1112 09:49:59.043743 Root Device child on link 0 CPU_CLUSTER: 0
1113 09:49:59.047056 CPU_CLUSTER: 0 child on link 0 APIC: 00
1114 09:49:59.050446 APIC: 00
1115 09:49:59.050519 APIC: 03
1116 09:49:59.050582 APIC: 01
1117 09:49:59.053888
1118 09:49:59.053976 APIC: 02
1119 09:49:59.054049 APIC: 04
1120 09:49:59.057334 APIC: 06
1121 09:49:59.057452 APIC: 05
1122 09:49:59.057517 APIC: 07
1123 09:49:59.063593 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1124 09:49:59.073170 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1125 09:49:59.123285 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1126 09:49:59.123397 PCI: 00:00.0
1127 09:49:59.123469 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1128 09:49:59.123744 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1129 09:49:59.123834 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1130 09:49:59.124098 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1131 09:49:59.173044 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1132 09:49:59.173338 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1133 09:49:59.173462 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1134 09:49:59.173743 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1135 09:49:59.174348 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1136 09:49:59.222280 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1137 09:49:59.222581 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1138 09:49:59.222659 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1139 09:49:59.222917 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1140 09:49:59.223170 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1141 09:49:59.231392 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1142 09:49:59.234834 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1143 09:49:59.234913 PCI: 00:02.0
1144 09:49:59.244789 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 09:49:59.254289 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1146 09:49:59.264472 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1147 09:49:59.264560 PCI: 00:04.0
1148 09:49:59.267276 PCI: 00:08.0
1149 09:49:59.277507 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1150 09:49:59.277601 PCI: 00:12.0
1151 09:49:59.280336
1152 09:49:59.287297 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1153 09:49:59.290713
1154 09:49:59.293497 PCI: 00:14.0 child on link 0 USB0 port 0
1155 09:49:59.303350 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 09:49:59.306882 USB0 port 0 child on link 0 USB2 port 0
1157 09:49:59.310240 USB2 port 0
1158 09:49:59.310320 USB2 port 1
1159 09:49:59.313672 USB2 port 2
1160 09:49:59.313751 USB2 port 3
1161 09:49:59.316345 USB2 port 5
1162 09:49:59.316433 USB2 port 6
1163 09:49:59.319818 USB2 port 9
1164 09:49:59.323269 USB3 port 0
1165 09:49:59.323361 USB3 port 1
1166 09:49:59.326682 USB3 port 2
1167 09:49:59.326761 USB3 port 3
1168 09:49:59.329460 USB3 port 4
1169 09:49:59.329540 PCI: 00:14.2
1170 09:49:59.339420 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 09:49:59.349435 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 09:49:59.352816 PCI: 00:14.3
1173 09:49:59.362320 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 09:49:59.365790 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 09:49:59.375547 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 09:49:59.378977 I2C: 01:15
1177 09:49:59.381694 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 09:49:59.392051 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 09:49:59.392163 I2C: 02:5d
1180 09:49:59.394798 GENERIC: 0.0
1181 09:49:59.394884 PCI: 00:16.0
1182 09:49:59.398177
1183 09:49:59.407889 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 09:49:59.407978 PCI: 00:17.0
1185 09:49:59.418114 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1186 09:49:59.427681 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1187 09:49:59.434380 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1188 09:49:59.443764 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1189 09:49:59.450386 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1190 09:49:59.460216 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1191 09:49:59.463566 PCI: 00:19.0 child on link 0 I2C: 03:1a
1192 09:49:59.473718 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 09:49:59.476530 I2C: 03:1a
1194 09:49:59.476617 I2C: 03:38
1195 09:49:59.479801 I2C: 03:39
1196 09:49:59.479890 I2C: 03:3a
1197 09:49:59.483168 I2C: 03:3b
1198 09:49:59.486566 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1199 09:49:59.496398 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 09:49:59.505899 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 09:49:59.512778 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 09:49:59.516137 PCI: 01:00.0
1203 09:49:59.525889 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 09:49:59.529249 PCI: 00:1e.0
1205 09:49:59.538938 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1206 09:49:59.548940 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1207 09:49:59.551643 PCI: 00:1e.2 child on link 0 SPI: 00
1208 09:49:59.561944 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 09:49:59.564761 SPI: 00
1210 09:49:59.568111 PCI: 00:1e.3 child on link 0 SPI: 01
1211 09:49:59.578104 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 09:49:59.578195 SPI: 01
1213 09:49:59.584964 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1214 09:49:59.591267 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1215 09:49:59.600663 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1216 09:49:59.604090 PNP: 0c09.0
1217 09:49:59.610777 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1218 09:49:59.614202 PCI: 00:1f.3
1219 09:49:59.623873 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 09:49:59.633679 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 09:49:59.633768 PCI: 00:1f.4
1222 09:49:59.643628 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1223 09:49:59.653145 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1224 09:49:59.656533 PCI: 00:1f.5
1225 09:49:59.662714 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1226 09:49:59.669640 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1227 09:49:59.675847 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1228 09:49:59.682695 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1229 09:49:59.686268 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1230 09:49:59.692451 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1231 09:49:59.695868 PCI: 00:17.0 18 * [0x60 - 0x67] io
1232 09:49:59.699256 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1233 09:49:59.705326 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1234 09:49:59.712180 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1235 09:49:59.719048 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1236 09:49:59.728698 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1237 09:49:59.735004 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1238 09:49:59.738391 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1239 09:49:59.748133 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1240 09:49:59.751517 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1241 09:49:59.754923 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1242 09:49:59.761085 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1243 09:49:59.764522 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1244 09:49:59.770999 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1245 09:49:59.774311 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1246 09:49:59.780959 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1247 09:49:59.784184 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1248 09:49:59.790285 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1249 09:49:59.793656 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1250 09:49:59.800376 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1251 09:49:59.803900 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1252 09:49:59.810078 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1253 09:49:59.813582 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1254 09:49:59.819869 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1255 09:49:59.823475 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1256 09:49:59.829479 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1257 09:49:59.833003 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1258 09:49:59.839304 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1259 09:49:59.842671 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1260 09:49:59.849529 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1261 09:49:59.852564 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1262 09:49:59.859237 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1263 09:49:59.866024 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1264 09:49:59.868927 avoid_fixed_resources: DOMAIN: 0000
1265 09:49:59.875797 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1266 09:49:59.881909 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1267 09:49:59.888414 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1268 09:49:59.898639 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1269 09:49:59.904758 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1270 09:49:59.911628 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1271 09:49:59.921686 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1272 09:49:59.928012 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1273 09:49:59.934261 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1274 09:49:59.943939 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1275 09:49:59.950715 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1276 09:49:59.957594 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1277 09:49:59.960851 Setting resources...
1278 09:49:59.967009 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1279 09:49:59.970393 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1280 09:49:59.973887 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1281 09:49:59.976717 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1282 09:49:59.983458 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1283 09:49:59.990158 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1284 09:49:59.993573 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1285 09:49:59.999887 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1286 09:50:00.009296 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1287 09:50:00.012747 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1288 09:50:00.019529 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1289 09:50:00.022957 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1290 09:50:00.029116 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1291 09:50:00.032538 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1292 09:50:00.038718 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1293 09:50:00.042155 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1294 09:50:00.049058 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1295 09:50:00.051799 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1296 09:50:00.058494 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1297 09:50:00.061817 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1298 09:50:00.067967 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1299 09:50:00.071466 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1300 09:50:00.077686 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1301 09:50:00.081249 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1302 09:50:00.088019 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1303 09:50:00.091380 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1304 09:50:00.097359 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1305 09:50:00.100941 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1306 09:50:00.107563 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1307 09:50:00.110395 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1308 09:50:00.117206 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1309 09:50:00.120599 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1310 09:50:00.126823 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1311 09:50:00.136572 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1312 09:50:00.143418 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1313 09:50:00.149594 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1314 09:50:00.156410 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1315 09:50:00.163167 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1316 09:50:00.165878 Root Device assign_resources, bus 0 link: 0
1317 09:50:00.172894 DOMAIN: 0000 assign_resources, bus 0 link: 0
1318 09:50:00.179048 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1319 09:50:00.189167 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1320 09:50:00.195431 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1321 09:50:00.205510 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1322 09:50:00.211761 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1323 09:50:00.221938 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1324 09:50:00.224612 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 09:50:00.231424 PCI: 00:14.0 assign_resources, bus 0 link: 0
1326 09:50:00.238314 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1327 09:50:00.247914 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1328 09:50:00.254762 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1329 09:50:00.264110 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1330 09:50:00.267560 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 09:50:00.273768 PCI: 00:15.0 assign_resources, bus 1 link: 0
1332 09:50:00.280122 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1333 09:50:00.283581 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 09:50:00.286904
1335 09:50:00.290230 PCI: 00:15.1 assign_resources, bus 2 link: 0
1336 09:50:00.299788 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1337 09:50:00.306718 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1338 09:50:00.312906 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1339 09:50:00.323071 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1340 09:50:00.329039 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1341 09:50:00.335959 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1342 09:50:00.345778 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1343 09:50:00.352150 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1344 09:50:00.358815 PCI: 00:19.0 assign_resources, bus 3 link: 0
1345 09:50:00.361620 PCI: 00:19.0 assign_resources, bus 3 link: 0
1346 09:50:00.371586 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1347 09:50:00.381300 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1348 09:50:00.388226 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1349 09:50:00.394238 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 09:50:00.401040 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1351 09:50:00.407431 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 09:50:00.414387 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1353 09:50:00.424217 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1354 09:50:00.427654 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1355 09:50:00.430326 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1356 09:50:00.440773 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1357 09:50:00.444094 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1358 09:50:00.450219 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1359 09:50:00.453711 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1360 09:50:00.460487 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1361 09:50:00.463319 LPC: Trying to open IO window from 800 size 1ff
1362 09:50:00.473171 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1363 09:50:00.480127 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1364 09:50:00.489796 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1365 09:50:00.496664 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1366 09:50:00.502794 DOMAIN: 0000 assign_resources, bus 0 link: 0
1367 09:50:00.506176 Root Device assign_resources, bus 0 link: 0
1368 09:50:00.509548 Done setting resources.
1369 09:50:00.515726 Show resources in subtree (Root Device)...After assigning values.
1370 09:50:00.519272 Root Device child on link 0 CPU_CLUSTER: 0
1371 09:50:00.522708 CPU_CLUSTER: 0 child on link 0 APIC: 00
1372 09:50:00.525446 APIC: 00
1373 09:50:00.525535 APIC: 03
1374 09:50:00.528755 APIC: 01
1375 09:50:00.528837 APIC: 02
1376 09:50:00.528904 APIC: 04
1377 09:50:00.532268 APIC: 06
1378 09:50:00.532343 APIC: 05
1379 09:50:00.535755 APIC: 07
1380 09:50:00.538551 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1381 09:50:00.548874 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1382 09:50:00.558535 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1383 09:50:00.561776 PCI: 00:00.0
1384 09:50:00.571533 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1385 09:50:00.581599 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1386 09:50:00.587785 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1387 09:50:00.598063 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1388 09:50:00.607369 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1389 09:50:00.616938 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1390 09:50:00.626641 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1391 09:50:00.636860 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1392 09:50:00.646515 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1393 09:50:00.653290 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1394 09:50:00.663053 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1395 09:50:00.672319 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1396 09:50:00.682481 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1397 09:50:00.692499 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1398 09:50:00.701734 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1399 09:50:00.712122 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1400 09:50:00.712213 PCI: 00:02.0
1401 09:50:00.721713 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1402 09:50:00.734644 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1403 09:50:00.741465 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1404 09:50:00.744434 PCI: 00:04.0
1405 09:50:00.744515 PCI: 00:08.0
1406 09:50:00.757496 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1407 09:50:00.757592 PCI: 00:12.0
1408 09:50:00.767616 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1409 09:50:00.773670 PCI: 00:14.0 child on link 0 USB0 port 0
1410 09:50:00.783912 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1411 09:50:00.786745 USB0 port 0 child on link 0 USB2 port 0
1412 09:50:00.790180 USB2 port 0
1413 09:50:00.790259 USB2 port 1
1414 09:50:00.793668 USB2 port 2
1415 09:50:00.793747 USB2 port 3
1416 09:50:00.797029 USB2 port 5
1417 09:50:00.797125 USB2 port 6
1418 09:50:00.800299 USB2 port 9
1419 09:50:00.800383 USB3 port 0
1420 09:50:00.803739 USB3 port 1
1421 09:50:00.806563 USB3 port 2
1422 09:50:00.806649 USB3 port 3
1423 09:50:00.810131 USB3 port 4
1424 09:50:00.810216 PCI: 00:14.2
1425 09:50:00.819732 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1426 09:50:00.829586 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1427 09:50:00.832959 PCI: 00:14.3
1428 09:50:00.842485 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1429 09:50:00.845810 PCI: 00:15.0 child on link 0 I2C: 01:15
1430 09:50:00.858923 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1431 09:50:00.859017 I2C: 01:15
1432 09:50:00.862189 PCI: 00:15.1 child on link 0 I2C: 02:5d
1433 09:50:00.872415 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1434 09:50:00.875697 I2C: 02:5d
1435 09:50:00.875783 GENERIC: 0.0
1436 09:50:00.878432 PCI: 00:16.0
1437 09:50:00.888534 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1438 09:50:00.891343 PCI: 00:17.0
1439 09:50:00.901660 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1440 09:50:00.911177 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1441 09:50:00.920812 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1442 09:50:00.927582 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1443 09:50:00.937231 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1444 09:50:00.947381 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1445 09:50:00.953730 PCI: 00:19.0 child on link 0 I2C: 03:1a
1446 09:50:00.963947 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1447 09:50:00.964035 I2C: 03:1a
1448 09:50:00.967343 I2C: 03:38
1449 09:50:00.967428 I2C: 03:39
1450 09:50:00.969946 I2C: 03:3a
1451 09:50:00.970031 I2C: 03:3b
1452 09:50:00.976821 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1453 09:50:00.983368 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1454 09:50:00.993290 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1455 09:50:01.006253 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1456 09:50:01.006351 PCI: 01:00.0
1457 09:50:01.015886 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1458 09:50:01.019384 PCI: 00:1e.0
1459 09:50:01.028851 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1460 09:50:01.039190 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1461 09:50:01.045274 PCI: 00:1e.2 child on link 0 SPI: 00
1462 09:50:01.055057 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1463 09:50:01.055143 SPI: 00
1464 09:50:01.058291 PCI: 00:1e.3 child on link 0 SPI: 01
1465 09:50:01.068162 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1466 09:50:01.071524
1467 09:50:01.071601 SPI: 01
1468 09:50:01.074859 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1469 09:50:01.084579 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1470 09:50:01.094359 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1471 09:50:01.094442 PNP: 0c09.0
1472 09:50:01.103892 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1473 09:50:01.103977 PCI: 00:1f.3
1474 09:50:01.114182 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1475 09:50:01.117060
1476 09:50:01.127539 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1477 09:50:01.127628 PCI: 00:1f.4
1478 09:50:01.137008 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1479 09:50:01.146680 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1480 09:50:01.150153 PCI: 00:1f.5
1481 09:50:01.159895 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1482 09:50:01.163332 Done allocating resources.
1483 09:50:01.166098 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1484 09:50:01.169351 Enabling resources...
1485 09:50:01.175642 PCI: 00:00.0 subsystem <- 8086/9b61
1486 09:50:01.175727 PCI: 00:00.0 cmd <- 06
1487 09:50:01.179040 PCI: 00:02.0 subsystem <- 8086/9b41
1488 09:50:01.182438 PCI: 00:02.0 cmd <- 03
1489 09:50:01.185695 PCI: 00:08.0 cmd <- 06
1490 09:50:01.189056 PCI: 00:12.0 subsystem <- 8086/02f9
1491 09:50:01.191897 PCI: 00:12.0 cmd <- 02
1492 09:50:01.195380 PCI: 00:14.0 subsystem <- 8086/02ed
1493 09:50:01.198814 PCI: 00:14.0 cmd <- 02
1494 09:50:01.202297 PCI: 00:14.2 cmd <- 02
1495 09:50:01.204950 PCI: 00:14.3 subsystem <- 8086/02f0
1496 09:50:01.208158 PCI: 00:14.3 cmd <- 02
1497 09:50:01.211666 PCI: 00:15.0 subsystem <- 8086/02e8
1498 09:50:01.211752 PCI: 00:15.0 cmd <- 02
1499 09:50:01.218568 PCI: 00:15.1 subsystem <- 8086/02e9
1500 09:50:01.218668 PCI: 00:15.1 cmd <- 02
1501 09:50:01.221940 PCI: 00:16.0 subsystem <- 8086/02e0
1502 09:50:01.225471
1503 09:50:01.225558 PCI: 00:16.0 cmd <- 02
1504 09:50:01.228084 PCI: 00:17.0 subsystem <- 8086/02d3
1505 09:50:01.231701 PCI: 00:17.0 cmd <- 03
1506 09:50:01.235156 PCI: 00:19.0 subsystem <- 8086/02c5
1507 09:50:01.237838 PCI: 00:19.0 cmd <- 02
1508 09:50:01.241272 PCI: 00:1d.0 bridge ctrl <- 0013
1509 09:50:01.244815 PCI: 00:1d.0 subsystem <- 8086/02b0
1510 09:50:01.248315 PCI: 00:1d.0 cmd <- 06
1511 09:50:01.251693 PCI: 00:1e.0 subsystem <- 8086/02a8
1512 09:50:01.254315 PCI: 00:1e.0 cmd <- 06
1513 09:50:01.257884 PCI: 00:1e.2 subsystem <- 8086/02aa
1514 09:50:01.261292 PCI: 00:1e.2 cmd <- 06
1515 09:50:01.264116 PCI: 00:1e.3 subsystem <- 8086/02ab
1516 09:50:01.267536 PCI: 00:1e.3 cmd <- 02
1517 09:50:01.270920 PCI: 00:1f.0 subsystem <- 8086/0284
1518 09:50:01.274321 PCI: 00:1f.0 cmd <- 407
1519 09:50:01.277801 PCI: 00:1f.3 subsystem <- 8086/02c8
1520 09:50:01.280522 PCI: 00:1f.3 cmd <- 02
1521 09:50:01.283769 PCI: 00:1f.4 subsystem <- 8086/02a3
1522 09:50:01.283855 PCI: 00:1f.4 cmd <- 03
1523 09:50:01.287207
1524 09:50:01.290611 PCI: 00:1f.5 subsystem <- 8086/02a4
1525 09:50:01.290696 PCI: 00:1f.5 cmd <- 406
1526 09:50:01.301021 PCI: 01:00.0 cmd <- 02
1527 09:50:01.305849 done.
1528 09:50:01.318715 ME: Version: 14.0.39.1367
1529 09:50:01.325407 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1530 09:50:01.328884 Initializing devices...
1531 09:50:01.328970 Root Device init ...
1532 09:50:01.335155 Chrome EC: Set SMI mask to 0x0000000000000000
1533 09:50:01.338472 Chrome EC: clear events_b mask to 0x0000000000000000
1534 09:50:01.345611 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1535 09:50:01.351665 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1536 09:50:01.358510 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1537 09:50:01.361315 Chrome EC: Set WAKE mask to 0x0000000000000000
1538 09:50:01.368178 Root Device init finished in 35148 usecs
1539 09:50:01.368264 CPU_CLUSTER: 0 init ...
1540 09:50:01.374591 CPU_CLUSTER: 0 init finished in 2446 usecs
1541 09:50:01.379346 PCI: 00:00.0 init ...
1542 09:50:01.382759 CPU TDP: 15 Watts
1543 09:50:01.386172 CPU PL2 = 64 Watts
1544 09:50:01.389579 PCI: 00:00.0 init finished in 7076 usecs
1545 09:50:01.392946 PCI: 00:02.0 init ...
1546 09:50:01.395731 PCI: 00:02.0 init finished in 2244 usecs
1547 09:50:01.399463 PCI: 00:08.0 init ...
1548 09:50:01.402853 PCI: 00:08.0 init finished in 2251 usecs
1549 09:50:01.405675 PCI: 00:12.0 init ...
1550 09:50:01.409032 PCI: 00:12.0 init finished in 2252 usecs
1551 09:50:01.412315 PCI: 00:14.0 init ...
1552 09:50:01.415932 PCI: 00:14.0 init finished in 2252 usecs
1553 09:50:01.418775 PCI: 00:14.2 init ...
1554 09:50:01.422031 PCI: 00:14.2 init finished in 2243 usecs
1555 09:50:01.425493 PCI: 00:14.3 init ...
1556 09:50:01.428893 PCI: 00:14.3 init finished in 2270 usecs
1557 09:50:01.432390 PCI: 00:15.0 init ...
1558 09:50:01.435302 DW I2C bus 0 at 0xd121f000 (400 KHz)
1559 09:50:01.438578 PCI: 00:15.0 init finished in 5976 usecs
1560 09:50:01.442110
1561 09:50:01.442196 PCI: 00:15.1 init ...
1562 09:50:01.445401 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 09:50:01.451549 PCI: 00:15.1 init finished in 5974 usecs
1564 09:50:01.455055 PCI: 00:16.0 init ...
1565 09:50:01.457950 PCI: 00:16.0 init finished in 2252 usecs
1566 09:50:01.461372 PCI: 00:19.0 init ...
1567 09:50:01.464617 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 09:50:01.468018 PCI: 00:19.0 init finished in 5976 usecs
1569 09:50:01.471484 PCI: 00:1d.0 init ...
1570 09:50:01.474916 Initializing PCH PCIe bridge.
1571 09:50:01.477653 PCI: 00:1d.0 init finished in 5283 usecs
1572 09:50:01.481821 PCI: 00:1f.0 init ...
1573 09:50:01.484652 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 09:50:01.491477 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 09:50:01.491562 IOAPIC: ID = 0x02
1576 09:50:01.494839 IOAPIC: Dumping registers
1577 09:50:01.497640 reg 0x0000: 0x02000000
1578 09:50:01.500954 reg 0x0001: 0x00770020
1579 09:50:01.504416 reg 0x0002: 0x00000000
1580 09:50:01.507873 PCI: 00:1f.0 init finished in 23532 usecs
1581 09:50:01.511236 PCI: 00:1f.4 init ...
1582 09:50:01.513993 PCI: 00:1f.4 init finished in 2261 usecs
1583 09:50:01.525687 PCI: 01:00.0 init ...
1584 09:50:01.529134 PCI: 01:00.0 init finished in 2252 usecs
1585 09:50:01.533242 PNP: 0c09.0 init ...
1586 09:50:01.536657 Google Chrome EC uptime: 11.085 seconds
1587 09:50:01.539457
1588 09:50:01.542834 Google Chrome AP resets since EC boot: 0
1589 09:50:01.546333 Google Chrome most recent AP reset causes:
1590 09:50:01.552538 Google Chrome EC reset flags at last EC boot: reset-pin
1591 09:50:01.555837 PNP: 0c09.0 init finished in 20602 usecs
1592 09:50:01.559428 Devices initialized
1593 09:50:01.562840 Show all devs... After init.
1594 09:50:01.562923 Root Device: enabled 1
1595 09:50:01.565539 CPU_CLUSTER: 0: enabled 1
1596 09:50:01.568903 DOMAIN: 0000: enabled 1
1597 09:50:01.572325 APIC: 00: enabled 1
1598 09:50:01.572410 PCI: 00:00.0: enabled 1
1599 09:50:01.575189 PCI: 00:02.0: enabled 1
1600 09:50:01.578650 PCI: 00:04.0: enabled 0
1601 09:50:01.578741 PCI: 00:05.0: enabled 0
1602 09:50:01.582035
1603 09:50:01.582115 PCI: 00:12.0: enabled 1
1604 09:50:01.585616 PCI: 00:12.5: enabled 0
1605 09:50:01.588921 PCI: 00:12.6: enabled 0
1606 09:50:01.589003 PCI: 00:14.0: enabled 1
1607 09:50:01.592171 PCI: 00:14.1: enabled 0
1608 09:50:01.595473 PCI: 00:14.3: enabled 1
1609 09:50:01.598876 PCI: 00:14.5: enabled 0
1610 09:50:01.598960 PCI: 00:15.0: enabled 1
1611 09:50:01.601676 PCI: 00:15.1: enabled 1
1612 09:50:01.605200 PCI: 00:15.2: enabled 0
1613 09:50:01.608090 PCI: 00:15.3: enabled 0
1614 09:50:01.608173 PCI: 00:16.0: enabled 1
1615 09:50:01.611542 PCI: 00:16.1: enabled 0
1616 09:50:01.614770 PCI: 00:16.2: enabled 0
1617 09:50:01.618214 PCI: 00:16.3: enabled 0
1618 09:50:01.618298 PCI: 00:16.4: enabled 0
1619 09:50:01.621699 PCI: 00:16.5: enabled 0
1620 09:50:01.624324 PCI: 00:17.0: enabled 1
1621 09:50:01.627739 PCI: 00:19.0: enabled 1
1622 09:50:01.627821 PCI: 00:19.1: enabled 0
1623 09:50:01.631125 PCI: 00:19.2: enabled 0
1624 09:50:01.634718 PCI: 00:1a.0: enabled 0
1625 09:50:01.637486 PCI: 00:1c.0: enabled 0
1626 09:50:01.637567 PCI: 00:1c.1: enabled 0
1627 09:50:01.640844 PCI: 00:1c.2: enabled 0
1628 09:50:01.644227 PCI: 00:1c.3: enabled 0
1629 09:50:01.647692 PCI: 00:1c.4: enabled 0
1630 09:50:01.647794 PCI: 00:1c.5: enabled 0
1631 09:50:01.650449 PCI: 00:1c.6: enabled 0
1632 09:50:01.653876 PCI: 00:1c.7: enabled 0
1633 09:50:01.657336 PCI: 00:1d.0: enabled 1
1634 09:50:01.657434 PCI: 00:1d.1: enabled 0
1635 09:50:01.660692 PCI: 00:1d.2: enabled 0
1636 09:50:01.663405 PCI: 00:1d.3: enabled 0
1637 09:50:01.667010 PCI: 00:1d.4: enabled 0
1638 09:50:01.667096 PCI: 00:1d.5: enabled 0
1639 09:50:01.670574 PCI: 00:1e.0: enabled 1
1640 09:50:01.673822 PCI: 00:1e.1: enabled 0
1641 09:50:01.676656 PCI: 00:1e.2: enabled 1
1642 09:50:01.676748 PCI: 00:1e.3: enabled 1
1643 09:50:01.680162 PCI: 00:1f.0: enabled 1
1644 09:50:01.683635 PCI: 00:1f.1: enabled 0
1645 09:50:01.683742 PCI: 00:1f.2: enabled 0
1646 09:50:01.686468
1647 09:50:01.686574 PCI: 00:1f.3: enabled 1
1648 09:50:01.689796 PCI: 00:1f.4: enabled 1
1649 09:50:01.693108 PCI: 00:1f.5: enabled 1
1650 09:50:01.693236 PCI: 00:1f.6: enabled 0
1651 09:50:01.696631 USB0 port 0: enabled 1
1652 09:50:01.699935 I2C: 01:15: enabled 1
1653 09:50:01.703419 I2C: 02:5d: enabled 1
1654 09:50:01.703583 GENERIC: 0.0: enabled 1
1655 09:50:01.706132 I2C: 03:1a: enabled 1
1656 09:50:01.709659 I2C: 03:38: enabled 1
1657 09:50:01.709840 I2C: 03:39: enabled 1
1658 09:50:01.713045 I2C: 03:3a: enabled 1
1659 09:50:01.716609 I2C: 03:3b: enabled 1
1660 09:50:01.716819 PCI: 00:00.0: enabled 1
1661 09:50:01.719295 SPI: 00: enabled 1
1662 09:50:01.722846 SPI: 01: enabled 1
1663 09:50:01.723156 PNP: 0c09.0: enabled 1
1664 09:50:01.726147 USB2 port 0: enabled 1
1665 09:50:01.729673 USB2 port 1: enabled 1
1666 09:50:01.730079 USB2 port 2: enabled 0
1667 09:50:01.733009
1668 09:50:01.733521 USB2 port 3: enabled 0
1669 09:50:01.735871 USB2 port 5: enabled 0
1670 09:50:01.739118 USB2 port 6: enabled 1
1671 09:50:01.739638 USB2 port 9: enabled 1
1672 09:50:01.742760 USB3 port 0: enabled 1
1673 09:50:01.746160 USB3 port 1: enabled 1
1674 09:50:01.746642 USB3 port 2: enabled 1
1675 09:50:01.748976
1676 09:50:01.749465 USB3 port 3: enabled 1
1677 09:50:01.752387 USB3 port 4: enabled 0
1678 09:50:01.755825 APIC: 03: enabled 1
1679 09:50:01.756261 APIC: 01: enabled 1
1680 09:50:01.759257 APIC: 02: enabled 1
1681 09:50:01.759743 APIC: 04: enabled 1
1682 09:50:01.761904 APIC: 06: enabled 1
1683 09:50:01.765168 APIC: 05: enabled 1
1684 09:50:01.765710 APIC: 07: enabled 1
1685 09:50:01.768542 PCI: 00:08.0: enabled 1
1686 09:50:01.772073 PCI: 00:14.2: enabled 1
1687 09:50:01.775460 PCI: 01:00.0: enabled 1
1688 09:50:01.778775 Disabling ACPI via APMC:
1689 09:50:01.779221 done.
1690 09:50:01.784816 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1691 09:50:01.788444 ELOG: NV offset 0xaf0000 size 0x4000
1692 09:50:01.794656 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1693 09:50:01.801501 ELOG: Event(17) added with size 13 at 2023-01-19 09:50:01 UTC
1694 09:50:01.808430 POST: Unexpected post code in previous boot: 0x73
1695 09:50:01.814576 ELOG: Event(A3) added with size 11 at 2023-01-19 09:50:01 UTC
1696 09:50:01.821409 ELOG: Event(A6) added with size 13 at 2023-01-19 09:50:01 UTC
1697 09:50:01.827525 ELOG: Event(92) added with size 9 at 2023-01-19 09:50:01 UTC
1698 09:50:01.834388 ELOG: Event(93) added with size 9 at 2023-01-19 09:50:01 UTC
1699 09:50:01.840692 ELOG: Event(9A) added with size 9 at 2023-01-19 09:50:01 UTC
1700 09:50:01.844094 ELOG: Event(9E) added with size 10 at 2023-01-19 09:50:01 UTC
1701 09:50:01.847105
1702 09:50:01.850338 ELOG: Event(9F) added with size 14 at 2023-01-19 09:50:01 UTC
1703 09:50:01.857364 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1704 09:50:01.863562 ELOG: Event(A1) added with size 10 at 2023-01-19 09:50:01 UTC
1705 09:50:01.873650 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1706 09:50:01.876411 ELOG: Event(A0) added with size 9 at 2023-01-19 09:50:01 UTC
1707 09:50:01.883121 elog_add_boot_reason: Logged dev mode boot
1708 09:50:01.883689 Finalize devices...
1709 09:50:01.886561 PCI: 00:17.0 final
1710 09:50:01.889963 Devices finalized
1711 09:50:01.892700 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1712 09:50:01.899208 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1713 09:50:01.902615 ME: HFSTS1 : 0x90000245
1714 09:50:01.906085 ME: HFSTS2 : 0x3B850126
1715 09:50:01.912326 ME: HFSTS3 : 0x00000020
1716 09:50:01.915864 ME: HFSTS4 : 0x00004800
1717 09:50:01.919142 ME: HFSTS5 : 0x00000000
1718 09:50:01.922520 ME: HFSTS6 : 0x40400006
1719 09:50:01.925199 ME: Manufacturing Mode : NO
1720 09:50:01.928438 ME: FW Partition Table : OK
1721 09:50:01.931786 ME: Bringup Loader Failure : NO
1722 09:50:01.935197 ME: Firmware Init Complete : YES
1723 09:50:01.938494 ME: Boot Options Present : NO
1724 09:50:01.941856 ME: Update In Progress : NO
1725 09:50:01.944567 ME: D0i3 Support : YES
1726 09:50:01.948026 ME: Low Power State Enabled : NO
1727 09:50:01.951520 ME: CPU Replaced : NO
1728 09:50:01.954994
1729 09:50:01.958374 ME: CPU Replacement Valid : YES
1730 09:50:01.961046 ME: Current Working State : 5
1731 09:50:01.961133 ME: Current Operation State : 1
1732 09:50:01.964464
1733 09:50:01.964553 ME: Current Operation Mode : 0
1734 09:50:01.968004
1735 09:50:01.968093 ME: Error Code : 0
1736 09:50:01.970695 ME: CPU Debug Disabled : YES
1737 09:50:01.974103
1738 09:50:01.977311 ME: TXT Support : NO
1739 09:50:01.980814 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1740 09:50:01.987598 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1741 09:50:01.990278 CBFS @ c08000 size 3f8000
1742 09:50:01.993773 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1743 09:50:01.997172 CBFS: Locating 'fallback/dsdt.aml'
1744 09:50:02.004126 CBFS: Found @ offset 10bb80 size 3fa5
1745 09:50:02.007549 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1746 09:50:02.010394 CBFS @ c08000 size 3f8000
1747 09:50:02.017363 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1748 09:50:02.020786 CBFS: Locating 'fallback/slic'
1749 09:50:02.023539 CBFS: 'fallback/slic' not found.
1750 09:50:02.026901 ACPI: Writing ACPI tables at 99b3e000.
1751 09:50:02.030334
1752 09:50:02.030458 ACPI: * FACS
1753 09:50:02.033801 ACPI: * DSDT
1754 09:50:02.036562 Ramoops buffer: 0x100000@0x99a3d000.
1755 09:50:02.040006 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1756 09:50:02.043535 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1757 09:50:02.047630 Google Chrome EC: version:
1758 09:50:02.050415 ro: helios_v2.0.2659-56403530b
1759 09:50:02.053776 rw: helios_v2.0.2849-c41de27e7d
1760 09:50:02.057351 running image: 1
1761 09:50:02.060877 ACPI: * FADT
1762 09:50:02.060969 SCI is IRQ9
1763 09:50:02.063637 ACPI: added table 1/32, length now 40
1764 09:50:02.066974
1765 09:50:02.067061 ACPI: * SSDT
1766 09:50:02.070380 Found 1 CPU(s) with 8 core(s) each.
1767 09:50:02.073705 Error: Could not locate 'wifi_sar' in VPD.
1768 09:50:02.080566 Checking CBFS for default SAR values
1769 09:50:02.083324 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1770 09:50:02.086845 CBFS @ c08000 size 3f8000
1771 09:50:02.093536 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1772 09:50:02.096361 CBFS: Locating 'wifi_sar_defaults.hex'
1773 09:50:02.099868 CBFS: Found @ offset 5fac0 size 77
1774 09:50:02.103312 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1775 09:50:02.109338 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1776 09:50:02.112798 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1777 09:50:02.119805 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1778 09:50:02.122501 failed to find key in VPD: dsm_calib_r0_0
1779 09:50:02.132604 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1780 09:50:02.135919 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1781 09:50:02.142188 failed to find key in VPD: dsm_calib_r0_1
1782 09:50:02.149172 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1783 09:50:02.155221 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1784 09:50:02.158598 failed to find key in VPD: dsm_calib_r0_2
1785 09:50:02.168299 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1786 09:50:02.175027 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1787 09:50:02.177884 failed to find key in VPD: dsm_calib_r0_3
1788 09:50:02.188004 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1789 09:50:02.191484 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1790 09:50:02.197660 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1791 09:50:02.200928 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1792 09:50:02.204448 EC returned error result code 1
1793 09:50:02.207785 EC returned error result code 1
1794 09:50:02.211395 EC returned error result code 1
1795 09:50:02.217748 PS2K: Bad resp from EC. Vivaldi disabled!
1796 09:50:02.221213 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1797 09:50:02.227431 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1798 09:50:02.233687 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1799 09:50:02.237008 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1800 09:50:02.243921 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1801 09:50:02.250048 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1802 09:50:02.256987 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1803 09:50:02.259756 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1804 09:50:02.266595 ACPI: added table 2/32, length now 44
1805 09:50:02.266682 ACPI: * MCFG
1806 09:50:02.270083 ACPI: added table 3/32, length now 48
1807 09:50:02.273478 ACPI: * TPM2
1808 09:50:02.276802 TPM2 log created at 99a2d000
1809 09:50:02.279492 ACPI: added table 4/32, length now 52
1810 09:50:02.279567 ACPI: * MADT
1811 09:50:02.282838 SCI is IRQ9
1812 09:50:02.286177 ACPI: added table 5/32, length now 56
1813 09:50:02.286284 current = 99b43ac0
1814 09:50:02.289547 ACPI: * DMAR
1815 09:50:02.292916 ACPI: added table 6/32, length now 60
1816 09:50:02.296298 ACPI: * IGD OpRegion
1817 09:50:02.299050 GMA: Found VBT in CBFS
1818 09:50:02.299127 GMA: Found valid VBT in CBFS
1819 09:50:02.302485
1820 09:50:02.305791 ACPI: added table 7/32, length now 64
1821 09:50:02.305869 ACPI: * HPET
1822 09:50:02.309250 ACPI: added table 8/32, length now 68
1823 09:50:02.312570 ACPI: done.
1824 09:50:02.315927 ACPI tables: 31744 bytes.
1825 09:50:02.316002 smbios_write_tables: 99a2c000
1826 09:50:02.319088 EC returned error result code 3
1827 09:50:02.322685
1828 09:50:02.326081 Couldn't obtain OEM name from CBI
1829 09:50:02.326160 Create SMBIOS type 17
1830 09:50:02.328796 PCI: 00:00.0 (Intel Cannonlake)
1831 09:50:02.332202 PCI: 00:14.3 (Intel WiFi)
1832 09:50:02.335681 SMBIOS tables: 939 bytes.
1833 09:50:02.339077 Writing table forward entry at 0x00000500
1834 09:50:02.345202 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1835 09:50:02.348387 Writing coreboot table at 0x99b62000
1836 09:50:02.355139 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1837 09:50:02.358413 1. 0000000000001000-000000000009ffff: RAM
1838 09:50:02.365275 2. 00000000000a0000-00000000000fffff: RESERVED
1839 09:50:02.368096 3. 0000000000100000-0000000099a2bfff: RAM
1840 09:50:02.374835 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1841 09:50:02.378320 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1842 09:50:02.384465 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1843 09:50:02.391204 7. 000000009a000000-000000009f7fffff: RESERVED
1844 09:50:02.394651 8. 00000000e0000000-00000000efffffff: RESERVED
1845 09:50:02.400931 9. 00000000fc000000-00000000fc000fff: RESERVED
1846 09:50:02.404376 10. 00000000fe000000-00000000fe00ffff: RESERVED
1847 09:50:02.407863 11. 00000000fed10000-00000000fed17fff: RESERVED
1848 09:50:02.414547 12. 00000000fed80000-00000000fed83fff: RESERVED
1849 09:50:02.417427 13. 00000000fed90000-00000000fed91fff: RESERVED
1850 09:50:02.424059 14. 00000000feda0000-00000000feda1fff: RESERVED
1851 09:50:02.427496 15. 0000000100000000-000000045e7fffff: RAM
1852 09:50:02.430831 Graphics framebuffer located at 0xc0000000
1853 09:50:02.434170 Passing 5 GPIOs to payload:
1854 09:50:02.440234 NAME | PORT | POLARITY | VALUE
1855 09:50:02.447111 write protect | undefined | high | low
1856 09:50:02.449776 lid | undefined | high | high
1857 09:50:02.456621 power | undefined | high | low
1858 09:50:02.459973 oprom | undefined | high | low
1859 09:50:02.466168 EC in RW | 0x000000cb | high | low
1860 09:50:02.466249 Board ID: 4
1861 09:50:02.473167 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1862 09:50:02.476034 CBFS @ c08000 size 3f8000
1863 09:50:02.483001 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1864 09:50:02.485745 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1865 09:50:02.489078 coreboot table: 1492 bytes.
1866 09:50:02.492316 IMD ROOT 0. 99fff000 00001000
1867 09:50:02.495755 IMD SMALL 1. 99ffe000 00001000
1868 09:50:02.499384 FSP MEMORY 2. 99c4e000 003b0000
1869 09:50:02.502216 CONSOLE 3. 99c2e000 00020000
1870 09:50:02.505651 FMAP 4. 99c2d000 0000054e
1871 09:50:02.508943 TIME STAMP 5. 99c2c000 00000910
1872 09:50:02.511775 VBOOT WORK 6. 99c18000 00014000
1873 09:50:02.515210 MRC DATA 7. 99c16000 00001958
1874 09:50:02.518501
1875 09:50:02.521788 ROMSTG STCK 8. 99c15000 00001000
1876 09:50:02.525177 AFTER CAR 9. 99c0b000 0000a000
1877 09:50:02.528036 RAMSTAGE 10. 99baf000 0005c000
1878 09:50:02.531529 REFCODE 11. 99b7a000 00035000
1879 09:50:02.534885 SMM BACKUP 12. 99b6a000 00010000
1880 09:50:02.537706 COREBOOT 13. 99b62000 00008000
1881 09:50:02.541075 ACPI 14. 99b3e000 00024000
1882 09:50:02.544526 ACPI GNVS 15. 99b3d000 00001000
1883 09:50:02.547925 RAMOOPS 16. 99a3d000 00100000
1884 09:50:02.550727 TPM2 TCGLOG17. 99a2d000 00010000
1885 09:50:02.554386 SMBIOS 18. 99a2c000 00000800
1886 09:50:02.554471 IMD small region:
1887 09:50:02.557757 IMD ROOT 0. 99ffec00 00000400
1888 09:50:02.560561 FSP RUNTIME 1. 99ffebe0 00000004
1889 09:50:02.567381 EC HOSTEVENT 2. 99ffebc0 00000008
1890 09:50:02.570807 POWER STATE 3. 99ffeb80 00000040
1891 09:50:02.573539 ROMSTAGE 4. 99ffeb60 00000004
1892 09:50:02.576860 MEM INFO 5. 99ffe9a0 000001b9
1893 09:50:02.580327 VPD 6. 99ffe920 0000006c
1894 09:50:02.583797 MTRR: Physical address space:
1895 09:50:02.590028 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1896 09:50:02.596746 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1897 09:50:02.603450 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1898 09:50:02.606719 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1899 09:50:02.612843 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1900 09:50:02.619569 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1901 09:50:02.625803 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1902 09:50:02.629176 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 09:50:02.635282 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 09:50:02.638702 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 09:50:02.642081 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 09:50:02.645735 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 09:50:02.652004 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 09:50:02.655420 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 09:50:02.659057 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 09:50:02.661826 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 09:50:02.668895 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 09:50:02.671570 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 09:50:02.675083 call enable_fixed_mtrr()
1914 09:50:02.678544 CPU physical address size: 39 bits
1915 09:50:02.681292 MTRR: default type WB/UC MTRR counts: 6/8.
1916 09:50:02.684786 MTRR: WB selected as default type.
1917 09:50:02.691682 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1918 09:50:02.697890 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1919 09:50:02.704970 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1920 09:50:02.711215 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1921 09:50:02.717356 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1922 09:50:02.724053 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1923 09:50:02.727366 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 09:50:02.730918
1925 09:50:02.733705 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 09:50:02.737245 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 09:50:02.740568 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 09:50:02.744060 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 09:50:02.750152 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 09:50:02.753511 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 09:50:02.757083 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 09:50:02.759984 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 09:50:02.766914 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 09:50:02.770317 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 09:50:02.770816
1936 09:50:02.771292 MTRR check
1937 09:50:02.773677
1938 09:50:02.774121 Fixed MTRRs : Enabled
1939 09:50:02.776494 Variable MTRRs: Enabled
1940 09:50:02.776935
1941 09:50:02.779880 call enable_fixed_mtrr()
1942 09:50:02.783351 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1943 09:50:02.786696 CPU physical address size: 39 bits
1944 09:50:02.792934 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1945 09:50:02.796193 CBFS @ c08000 size 3f8000
1946 09:50:02.802991 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1947 09:50:02.806267 CBFS: Locating 'fallback/payload'
1948 09:50:02.809188 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 09:50:02.812477 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 09:50:02.815946 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 09:50:02.822711 MTRR: Fixed MSR 0x259 0x0000000000000000
1952 09:50:02.826073 MTRR: Fixed MSR 0x268 0x0606060606060606
1953 09:50:02.828703 MTRR: Fixed MSR 0x269 0x0606060606060606
1954 09:50:02.832131 MTRR: Fixed MSR 0x26a 0x0606060606060606
1955 09:50:02.835597
1956 09:50:02.839118 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 09:50:02.841819 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 09:50:02.845225 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 09:50:02.848582 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 09:50:02.852074
1961 09:50:02.854962 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 09:50:02.858292 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 09:50:02.861692 call enable_fixed_mtrr()
1964 09:50:02.865181 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 09:50:02.867983 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 09:50:02.874920 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 09:50:02.878259 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 09:50:02.881123 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 09:50:02.884556 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 09:50:02.890680 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 09:50:02.894128 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 09:50:02.897581 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 09:50:02.900987 CPU physical address size: 39 bits
1974 09:50:02.904475 call enable_fixed_mtrr()
1975 09:50:02.907914 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 09:50:02.914062 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 09:50:02.917476 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 09:50:02.920886 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 09:50:02.924266 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 09:50:02.930481 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 09:50:02.933774 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 09:50:02.937467 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 09:50:02.940395 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 09:50:02.946387 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 09:50:02.950000 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 09:50:02.953549 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 09:50:02.956957 call enable_fixed_mtrr()
1988 09:50:02.959760 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 09:50:02.963102 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 09:50:02.969448 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 09:50:02.972854 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 09:50:02.976386 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 09:50:02.979105 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 09:50:02.986054 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 09:50:02.989585 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 09:50:02.992213 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 09:50:02.995746 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 09:50:03.002254 CPU physical address size: 39 bits
1999 09:50:03.005754 call enable_fixed_mtrr()
2000 09:50:03.009131 CBFS: Found @ offset 1c96c0 size 3f798
2001 09:50:03.011773 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 09:50:03.015147 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 09:50:03.018607 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 09:50:03.024677 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 09:50:03.028122 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 09:50:03.031434 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 09:50:03.034779 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 09:50:03.040896 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 09:50:03.044267 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 09:50:03.047737 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 09:50:03.051026 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 09:50:03.053867
2013 09:50:03.057191 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 09:50:03.060713 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 09:50:03.064039 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 09:50:03.070139 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 09:50:03.073605 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 09:50:03.077153 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 09:50:03.080394 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 09:50:03.086685 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 09:50:03.090086 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 09:50:03.092878 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 09:50:03.096369 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 09:50:03.099661 call enable_fixed_mtrr()
2025 09:50:03.103023 call enable_fixed_mtrr()
2026 09:50:03.106367 CPU physical address size: 39 bits
2027 09:50:03.109848 CPU physical address size: 39 bits
2028 09:50:03.116064 Checking segment from ROM address 0xffdd16f8
2029 09:50:03.119549 CPU physical address size: 39 bits
2030 09:50:03.122319 CPU physical address size: 39 bits
2031 09:50:03.125764 Checking segment from ROM address 0xffdd1714
2032 09:50:03.129222 Loading segment from ROM address 0xffdd16f8
2033 09:50:03.132685
2034 09:50:03.132771 code (compression=0)
2035 09:50:03.142199 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2036 09:50:03.149128 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2037 09:50:03.151948 it's not compressed!
2038 09:50:03.244722 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2039 09:50:03.250877 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2040 09:50:03.254391 Loading segment from ROM address 0xffdd1714
2041 09:50:03.257897
2042 09:50:03.257984 Entry Point 0x30000000
2043 09:50:03.260584 Loaded segments
2044 09:50:03.266874 Finalizing chipset.
2045 09:50:03.270272 Finalizing SMM.
2046 09:50:03.273694 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2047 09:50:03.276986 mp_park_aps done after 0 msecs.
2048 09:50:03.283837 Jumping to boot code at 30000000(99b62000)
2049 09:50:03.289965 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2050 09:50:03.290053
2051 09:50:03.290121
2052 09:50:03.290185
2053 09:50:03.293421 Starting depthcharge on Helios...
2054 09:50:03.293506
2055 09:50:03.293855 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
2056 09:50:03.293960 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2057 09:50:03.294043 Setting prompt string to ['hatch:']
2058 09:50:03.294126 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2059 09:50:03.303125 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2060 09:50:03.303246
2061 09:50:03.309959 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2062 09:50:03.310055
2063 09:50:03.316329 board_setup: Info: eMMC controller not present; skipping
2064 09:50:03.316420
2065 09:50:03.319714 New NVMe Controller 0x30053ac0 @ 00:1d:00
2066 09:50:03.319801
2067 09:50:03.325966 board_setup: Info: SDHCI controller not present; skipping
2068 09:50:03.326055
2069 09:50:03.332713 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2070 09:50:03.332803
2071 09:50:03.332871 Wipe memory regions:
2072 09:50:03.332935
2073 09:50:03.338939 [0x00000000001000, 0x000000000a0000)
2074 09:50:03.339027
2075 09:50:03.342447 [0x00000000100000, 0x00000030000000)
2076 09:50:03.342534
2077 09:50:03.409309 [0x00000030657430, 0x00000099a2c000)
2078 09:50:03.409489
2079 09:50:03.549734 [0x00000100000000, 0x0000045e800000)
2080 09:50:03.549872
2081 09:50:04.932373 R8152: Initializing
2082 09:50:04.932517
2083 09:50:04.935814 Version 9 (ocp_data = 6010)
2084 09:50:04.935901
2085 09:50:04.939821 R8152: Done initializing
2086 09:50:04.939908
2087 09:50:04.943332 Adding net device
2088 09:50:04.943418
2089 09:50:05.426246 R8152: Initializing
2090 09:50:05.426394
2091 09:50:05.428949 Version 6 (ocp_data = 5c30)
2092 09:50:05.429046
2093 09:50:05.432234 R8152: Done initializing
2094 09:50:05.432324
2095 09:50:05.439080 net_add_device: Attemp to include the same device
2096 09:50:05.439193
2097 09:50:05.446013 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2098 09:50:05.446136
2099 09:50:05.446205
2100 09:50:05.446268
2101 09:50:05.446541 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2103 09:50:05.547487 hatch: tftpboot 192.168.201.1 8794212/tftp-deploy-8k2reu4l/kernel/bzImage 8794212/tftp-deploy-8k2reu4l/kernel/cmdline 8794212/tftp-deploy-8k2reu4l/ramdisk/ramdisk.cpio.gz
2104 09:50:05.547855 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2105 09:50:05.548091 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2106 09:50:05.553293 tftpboot 192.168.201.1 8794212/tftp-deploy-8k2reu4l/kernel/bzImoy-8k2reu4l/kernel/cmdline 8794212/tftp-deploy-8k2reu4l/ramdisk/ramdisk.cpio.gz
2107 09:50:05.553506
2108 09:50:05.553658 Waiting for link
2109 09:50:05.553827
2110 09:50:05.753914 done.
2111 09:50:05.754520
2112 09:50:05.754916 MAC: 00:24:32:50:19:be
2113 09:50:05.755327
2114 09:50:05.757424 Sending DHCP discover... done.
2115 09:50:05.757917
2116 09:50:05.760619 Waiting for reply... done.
2117 09:50:05.761184
2118 09:50:05.763844 Sending DHCP request... done.
2119 09:50:05.764315
2120 09:50:05.767431 Waiting for reply... done.
2121 09:50:05.767977
2122 09:50:05.770582 My ip is 192.168.201.15
2123 09:50:05.771056
2124 09:50:05.773927 The DHCP server ip is 192.168.201.1
2125 09:50:05.774368
2126 09:50:05.776887 TFTP server IP predefined by user: 192.168.201.1
2127 09:50:05.777463
2128 09:50:05.783740 Bootfile predefined by user: 8794212/tftp-deploy-8k2reu4l/kernel/bzImage
2129 09:50:05.784348
2130 09:50:05.786499 Sending tftp read request... done.
2131 09:50:05.789933
2132 09:50:05.794874 Waiting for the transfer...
2133 09:50:05.795335
2134 09:50:06.416437 00000000 ################################################################
2135 09:50:06.417070
2136 09:50:07.086294 00080000 ################################################################
2137 09:50:07.086916
2138 09:50:07.742905 00100000 ################################################################
2139 09:50:07.743455
2140 09:50:08.364728 00180000 ################################################################
2141 09:50:08.365197
2142 09:50:09.012000 00200000 ################################################################
2143 09:50:09.012517
2144 09:50:09.580495 00280000 ################################################################
2145 09:50:09.580637
2146 09:50:10.130211 00300000 ################################################################
2147 09:50:10.130349
2148 09:50:10.693798 00380000 ################################################################
2149 09:50:10.693966
2150 09:50:11.257439 00400000 ################################################################
2151 09:50:11.257581
2152 09:50:11.818698 00480000 ################################################################
2153 09:50:11.819254
2154 09:50:12.467622 00500000 ################################################################
2155 09:50:12.468207
2156 09:50:13.097624 00580000 ################################################################
2157 09:50:13.097802
2158 09:50:13.623066 00600000 ################################################################
2159 09:50:13.623219
2160 09:50:14.180093 00680000 ################################################################
2161 09:50:14.180241
2162 09:50:14.728286 00700000 ################################################################
2163 09:50:14.728439
2164 09:50:15.246242 00780000 ################################################################
2165 09:50:15.246394
2166 09:50:15.764478 00800000 ################################################################
2167 09:50:15.764632
2168 09:50:16.283696 00880000 ################################################################
2169 09:50:16.283841
2170 09:50:16.556257 00900000 ################################## done.
2171 09:50:16.556393
2172 09:50:16.559714 The bootfile was 9711616 bytes long.
2173 09:50:16.559801
2174 09:50:16.563133 Sending tftp read request... done.
2175 09:50:16.563211
2176 09:50:16.566522 Waiting for the transfer...
2177 09:50:16.566607
2178 09:50:17.091641 00000000 ################################################################
2179 09:50:17.091784
2180 09:50:17.613445 00080000 ################################################################
2181 09:50:17.613589
2182 09:50:18.149505 00100000 ################################################################
2183 09:50:18.149648
2184 09:50:18.678315 00180000 ################################################################
2185 09:50:18.678483
2186 09:50:19.223815 00200000 ################################################################
2187 09:50:19.223963
2188 09:50:19.766701 00280000 ################################################################
2189 09:50:19.766844
2190 09:50:20.303023 00300000 ################################################################
2191 09:50:20.303159
2192 09:50:20.834123 00380000 ################################################################
2193 09:50:20.834265
2194 09:50:21.371880 00400000 ################################################################
2195 09:50:21.372056
2196 09:50:21.911276 00480000 ################################################################
2197 09:50:21.911417
2198 09:50:22.196175 00500000 ################################### done.
2199 09:50:22.196350
2200 09:50:22.199715 Sending tftp read request... done.
2201 09:50:22.199832
2202 09:50:22.202466 Waiting for the transfer...
2203 09:50:22.202552
2204 09:50:22.202621 00000000 # done.
2205 09:50:22.202686
2206 09:50:22.212380 Command line loaded dynamically from TFTP file: 8794212/tftp-deploy-8k2reu4l/kernel/cmdline
2207 09:50:22.212514
2208 09:50:22.235374 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8794212/extract-nfsrootfs-in8rx19a,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2209 09:50:22.235475
2210 09:50:22.242154 ec_init(0): CrosEC protocol v3 supported (256, 256)
2211 09:50:22.242245
2212 09:50:22.248978 Shutting down all USB controllers.
2213 09:50:22.249065
2214 09:50:22.249133 Removing current net device
2215 09:50:22.249197
2216 09:50:22.253813 Finalizing coreboot
2217 09:50:22.253900
2218 09:50:22.260243 Exiting depthcharge with code 4 at timestamp: 26309961
2219 09:50:22.260330
2220 09:50:22.260398
2221 09:50:22.260460 Starting kernel ...
2222 09:50:22.260520
2223 09:50:22.260579
2224 09:50:22.260637
2225 09:50:22.261004 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2226 09:50:22.261106 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2227 09:50:22.261184 Setting prompt string to ['Linux version [0-9]']
2228 09:50:22.261279 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2229 09:50:22.261350 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2231 09:54:45.261426 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2233 09:54:45.261673 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2235 09:54:45.261837 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2238 09:54:45.262119 end: 2 depthcharge-action (duration 00:05:00) [common]
2240 09:54:45.262414 Cleaning after the job
2241 09:54:45.262503 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/ramdisk
2242 09:54:45.263057 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/kernel
2243 09:54:45.263750 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/nfsrootfs
2244 09:54:45.311183 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794212/tftp-deploy-8k2reu4l/modules
2245 09:54:45.311489 start: 4.1 power-off (timeout 00:00:30) [common]
2246 09:54:45.311648 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2247 09:54:45.332209 >> Command sent successfully.
2248 09:54:45.334376 Returned 0 in 0 seconds
2249 09:54:45.435175 end: 4.1 power-off (duration 00:00:00) [common]
2251 09:54:45.435523 start: 4.2 read-feedback (timeout 00:10:00) [common]
2252 09:54:45.435768 Listened to connection for namespace 'common' for up to 1s
2253 09:54:46.437490 Finalising connection for namespace 'common'
2254 09:54:46.437677 Disconnecting from shell: Finalise
2255 09:54:46.538431 end: 4.2 read-feedback (duration 00:00:01) [common]
2256 09:54:46.538601 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8794212
2257 09:54:46.695818 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8794212
2258 09:54:46.696022 JobError: Your job cannot terminate cleanly.