Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 09:43:43.653002 lava-dispatcher, installed at version: 2022.11
2 09:43:43.653191 start: 0 validate
3 09:43:43.653313 Start time: 2023-01-19 09:43:43.653306+00:00 (UTC)
4 09:43:43.653429 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:43:43.653626 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230114.0%2Famd64%2Finitrd.cpio.gz exists
6 09:43:43.944317 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:43:43.945087 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.269-cip88-479-g3f9e11225caa5%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:43:44.233618 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:43:44.234308 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230114.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 09:43:44.531136 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:43:44.531843 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.269-cip88-479-g3f9e11225caa5%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:43:44.821400 validate duration: 1.17
14 09:43:44.821713 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:43:44.821823 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:43:44.821912 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:43:44.822010 Not decompressing ramdisk as can be used compressed.
18 09:43:44.822094 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230114.0/amd64/initrd.cpio.gz
19 09:43:44.822158 saving as /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/ramdisk/initrd.cpio.gz
20 09:43:44.822218 total size: 5432122 (5MB)
21 09:43:44.825218 progress 0% (0MB)
22 09:43:44.827275 progress 5% (0MB)
23 09:43:44.829393 progress 10% (0MB)
24 09:43:44.832043 progress 15% (0MB)
25 09:43:44.834233 progress 20% (1MB)
26 09:43:44.836428 progress 25% (1MB)
27 09:43:44.838573 progress 30% (1MB)
28 09:43:44.841173 progress 35% (1MB)
29 09:43:44.843369 progress 40% (2MB)
30 09:43:44.845816 progress 45% (2MB)
31 09:43:44.847768 progress 50% (2MB)
32 09:43:44.850279 progress 55% (2MB)
33 09:43:44.852585 progress 60% (3MB)
34 09:43:44.854868 progress 65% (3MB)
35 09:43:44.857825 progress 70% (3MB)
36 09:43:44.859653 progress 75% (3MB)
37 09:43:44.861845 progress 80% (4MB)
38 09:43:44.864166 progress 85% (4MB)
39 09:43:44.866617 progress 90% (4MB)
40 09:43:44.868781 progress 95% (4MB)
41 09:43:44.870864 progress 100% (5MB)
42 09:43:44.871156 5MB downloaded in 0.05s (105.87MB/s)
43 09:43:44.871323 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:43:44.871590 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:43:44.871686 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:43:44.871779 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:43:44.871890 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.269-cip88-479-g3f9e11225caa5/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 09:43:44.871964 saving as /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/kernel/bzImage
50 09:43:44.872031 total size: 9711616 (9MB)
51 09:43:44.872096 No compression specified
52 09:43:44.874416 progress 0% (0MB)
53 09:43:44.878421 progress 5% (0MB)
54 09:43:44.882696 progress 10% (0MB)
55 09:43:44.886865 progress 15% (1MB)
56 09:43:44.891057 progress 20% (1MB)
57 09:43:44.895293 progress 25% (2MB)
58 09:43:44.899170 progress 30% (2MB)
59 09:43:44.903370 progress 35% (3MB)
60 09:43:44.907543 progress 40% (3MB)
61 09:43:44.911594 progress 45% (4MB)
62 09:43:44.915903 progress 50% (4MB)
63 09:43:44.920026 progress 55% (5MB)
64 09:43:44.923862 progress 60% (5MB)
65 09:43:44.928090 progress 65% (6MB)
66 09:43:44.932325 progress 70% (6MB)
67 09:43:44.936532 progress 75% (6MB)
68 09:43:44.940800 progress 80% (7MB)
69 09:43:44.944643 progress 85% (7MB)
70 09:43:44.948825 progress 90% (8MB)
71 09:43:44.953043 progress 95% (8MB)
72 09:43:44.957067 progress 100% (9MB)
73 09:43:44.957271 9MB downloaded in 0.09s (108.66MB/s)
74 09:43:44.957421 end: 1.2.1 http-download (duration 00:00:00) [common]
76 09:43:44.957672 end: 1.2 download-retry (duration 00:00:00) [common]
77 09:43:44.957761 start: 1.3 download-retry (timeout 00:10:00) [common]
78 09:43:44.957848 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 09:43:44.957952 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230114.0/amd64/full.rootfs.tar.xz
80 09:43:44.958022 saving as /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/nfsrootfs/full.rootfs.tar
81 09:43:44.958084 total size: 123911640 (118MB)
82 09:43:44.958146 Using unxz to decompress xz
83 09:43:44.962583 progress 0% (0MB)
84 09:43:45.401994 progress 5% (5MB)
85 09:43:45.849179 progress 10% (11MB)
86 09:43:46.295666 progress 15% (17MB)
87 09:43:46.746225 progress 20% (23MB)
88 09:43:47.072146 progress 25% (29MB)
89 09:43:47.400074 progress 30% (35MB)
90 09:43:47.659664 progress 35% (41MB)
91 09:43:47.821314 progress 40% (47MB)
92 09:43:48.176527 progress 45% (53MB)
93 09:43:48.525424 progress 50% (59MB)
94 09:43:48.848386 progress 55% (65MB)
95 09:43:49.188599 progress 60% (70MB)
96 09:43:49.509973 progress 65% (76MB)
97 09:43:49.874746 progress 70% (82MB)
98 09:43:50.270784 progress 75% (88MB)
99 09:43:50.668225 progress 80% (94MB)
100 09:43:50.789678 progress 85% (100MB)
101 09:43:50.947759 progress 90% (106MB)
102 09:43:51.268133 progress 95% (112MB)
103 09:43:51.625606 progress 100% (118MB)
104 09:43:51.631140 118MB downloaded in 6.67s (17.71MB/s)
105 09:43:51.631392 end: 1.3.1 http-download (duration 00:00:07) [common]
107 09:43:51.631745 end: 1.3 download-retry (duration 00:00:07) [common]
108 09:43:51.631843 start: 1.4 download-retry (timeout 00:09:53) [common]
109 09:43:51.631937 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 09:43:51.632057 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.269-cip88-479-g3f9e11225caa5/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 09:43:51.632128 saving as /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/modules/modules.tar
112 09:43:51.632190 total size: 64676 (0MB)
113 09:43:51.632254 Using unxz to decompress xz
114 09:43:51.637482 progress 50% (0MB)
115 09:43:51.637898 progress 100% (0MB)
116 09:43:51.641989 0MB downloaded in 0.01s (6.30MB/s)
117 09:43:51.642206 end: 1.4.1 http-download (duration 00:00:00) [common]
119 09:43:51.642464 end: 1.4 download-retry (duration 00:00:00) [common]
120 09:43:51.642562 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 09:43:51.642661 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 09:43:53.330251 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8794202/extract-nfsrootfs-73bm1fut
123 09:43:53.330456 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 09:43:53.330561 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 09:43:53.330695 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc
126 09:43:53.330796 makedir: /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin
127 09:43:53.330883 makedir: /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/tests
128 09:43:53.330966 makedir: /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/results
129 09:43:53.331064 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-add-keys
130 09:43:53.331194 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-add-sources
131 09:43:53.331308 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-background-process-start
132 09:43:53.331423 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-background-process-stop
133 09:43:53.331535 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-common-functions
134 09:43:53.331645 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-echo-ipv4
135 09:43:53.331754 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-install-packages
136 09:43:53.331863 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-installed-packages
137 09:43:53.331970 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-os-build
138 09:43:53.332078 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-probe-channel
139 09:43:53.332185 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-probe-ip
140 09:43:53.332294 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-target-ip
141 09:43:53.332402 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-target-mac
142 09:43:53.332510 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-target-storage
143 09:43:53.332621 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-test-case
144 09:43:53.332732 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-test-event
145 09:43:53.332840 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-test-feedback
146 09:43:53.332949 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-test-raise
147 09:43:53.333056 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-test-reference
148 09:43:53.333164 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-test-runner
149 09:43:53.333275 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-test-set
150 09:43:53.333383 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-test-shell
151 09:43:53.333548 Updating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-install-packages (oe)
152 09:43:53.333665 Updating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/bin/lava-installed-packages (oe)
153 09:43:53.333762 Creating /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/environment
154 09:43:53.333850 LAVA metadata
155 09:43:53.333917 - LAVA_JOB_ID=8794202
156 09:43:53.333981 - LAVA_DISPATCHER_IP=192.168.201.1
157 09:43:53.334080 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 09:43:53.334146 skipped lava-vland-overlay
159 09:43:53.334222 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 09:43:53.334305 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 09:43:53.334368 skipped lava-multinode-overlay
162 09:43:53.334443 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 09:43:53.334525 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 09:43:53.334596 Loading test definitions
165 09:43:53.334687 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 09:43:53.334758 Using /lava-8794202 at stage 0
167 09:43:53.334851 Fetching tests from https://github.com/kernelci/test-definitions
168 09:43:53.334931 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/0/tests/0_ltp-timers'
169 09:43:58.482005 Running '/usr/bin/git checkout kernelci.org
170 09:43:58.617391 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 09:43:58.618111 uuid=8794202_1.5.2.3.1 testdef=None
172 09:43:58.618271 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 09:43:58.618519 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 09:43:58.619176 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 09:43:58.619416 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 09:43:58.620204 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 09:43:58.620480 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 09:43:58.621236 runner path: /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/0/tests/0_ltp-timers test_uuid 8794202_1.5.2.3.1
182 09:43:58.621328 GRP_TEST='TMR'
183 09:43:58.621395 SKIPFILE='skipfile-lkft.yaml'
184 09:43:58.621457 SKIP_INSTALL='true'
185 09:43:58.621576 TST_CMDFILES=''
186 09:43:58.621709 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 09:43:58.621922 Creating lava-test-runner.conf files
189 09:43:58.621990 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8794202/lava-overlay-a1k1_dwc/lava-8794202/0 for stage 0
190 09:43:58.622075 - 0_ltp-timers
191 09:43:58.622175 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
192 09:43:58.622265 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
193 09:44:05.882654 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 09:44:05.882830 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
195 09:44:05.882945 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 09:44:05.883066 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
197 09:44:05.883174 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
198 09:44:05.983370 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 09:44:05.983723 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
200 09:44:05.983859 extracting modules file /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8794202/extract-nfsrootfs-73bm1fut
201 09:44:05.987867 extracting modules file /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8794202/extract-overlay-ramdisk-oc9r4shb/ramdisk
202 09:44:05.991667 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 09:44:05.991786 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
204 09:44:05.991880 [common] Applying overlay to NFS
205 09:44:05.991965 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8794202/compress-overlay-_uw2mzj2/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8794202/extract-nfsrootfs-73bm1fut
206 09:44:06.442031 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 09:44:06.442210 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
208 09:44:06.442332 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 09:44:06.442440 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
210 09:44:06.442537 Building ramdisk /var/lib/lava/dispatcher/tmp/8794202/extract-overlay-ramdisk-oc9r4shb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8794202/extract-overlay-ramdisk-oc9r4shb/ramdisk
211 09:44:06.475578 >> 24777 blocks
212 09:44:06.972693 rename /var/lib/lava/dispatcher/tmp/8794202/extract-overlay-ramdisk-oc9r4shb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/ramdisk/ramdisk.cpio.gz
213 09:44:06.973116 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 09:44:06.973256 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
215 09:44:06.973378 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
216 09:44:06.973494 No mkimage arch provided, not using FIT.
217 09:44:06.973641 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 09:44:06.973741 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 09:44:06.973868 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
220 09:44:06.973977 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
221 09:44:06.974072 No LXC device requested
222 09:44:06.974177 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 09:44:06.974281 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
224 09:44:06.974378 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 09:44:06.974460 Checking files for TFTP limit of 4294967296 bytes.
226 09:44:06.974857 end: 1 tftp-deploy (duration 00:00:22) [common]
227 09:44:06.974974 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 09:44:06.975085 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 09:44:06.975226 substitutions:
230 09:44:06.975303 - {DTB}: None
231 09:44:06.975384 - {INITRD}: 8794202/tftp-deploy-_r94mnzw/ramdisk/ramdisk.cpio.gz
232 09:44:06.975463 - {KERNEL}: 8794202/tftp-deploy-_r94mnzw/kernel/bzImage
233 09:44:06.975540 - {LAVA_MAC}: None
234 09:44:06.975616 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8794202/extract-nfsrootfs-73bm1fut
235 09:44:06.975693 - {NFS_SERVER_IP}: 192.168.201.1
236 09:44:06.975768 - {PRESEED_CONFIG}: None
237 09:44:06.975843 - {PRESEED_LOCAL}: None
238 09:44:06.975917 - {RAMDISK}: 8794202/tftp-deploy-_r94mnzw/ramdisk/ramdisk.cpio.gz
239 09:44:06.975991 - {ROOT_PART}: None
240 09:44:06.976064 - {ROOT}: None
241 09:44:06.976137 - {SERVER_IP}: 192.168.201.1
242 09:44:06.976211 - {TEE}: None
243 09:44:06.976284 Parsed boot commands:
244 09:44:06.976356 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 09:44:06.976536 Parsed boot commands: tftpboot 192.168.201.1 8794202/tftp-deploy-_r94mnzw/kernel/bzImage 8794202/tftp-deploy-_r94mnzw/kernel/cmdline 8794202/tftp-deploy-_r94mnzw/ramdisk/ramdisk.cpio.gz
246 09:44:06.976647 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 09:44:06.976756 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 09:44:06.976869 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 09:44:06.976978 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 09:44:06.977066 Not connected, no need to disconnect.
251 09:44:06.977169 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 09:44:06.977272 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 09:44:06.977352 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
254 09:44:06.980088 Setting prompt string to ['lava-test: # ']
255 09:44:06.980371 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 09:44:06.980491 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 09:44:06.980603 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 09:44:06.980713 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 09:44:06.980901 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
260 09:44:06.999278 >> Command sent successfully.
261 09:44:07.001160 Returned 0 in 0 seconds
262 09:44:07.102318 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 09:44:07.103613 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 09:44:07.104097 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 09:44:07.104491 Setting prompt string to 'Starting depthcharge on Helios...'
267 09:44:07.104806 Changing prompt to 'Starting depthcharge on Helios...'
268 09:44:07.105126 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 09:44:07.106475 [Enter `^Ec?' for help]
270 09:44:13.507272
271 09:44:13.507853
272 09:44:13.517121 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 09:44:13.520280 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 09:44:13.526524 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 09:44:13.530244 CPU: AES supported, TXT NOT supported, VT supported
276 09:44:13.537584 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 09:44:13.540198 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 09:44:13.547080 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 09:44:13.549906 VBOOT: Loading verstage.
280 09:44:13.553444 FMAP: Found "FLASH" version 1.1 at 0xc04000.
281 09:44:13.560459 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 09:44:13.563618 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 09:44:13.566892 CBFS @ c08000 size 3f8000
284 09:44:13.573673 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 09:44:13.576631 CBFS: Locating 'fallback/verstage'
286 09:44:13.580112 CBFS: Found @ offset 10fb80 size 1072c
287 09:44:13.580688
288 09:44:13.584082
289 09:44:13.593908 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 09:44:13.607578 Probing TPM: . done!
291 09:44:13.610602 TPM ready after 0 ms
292 09:44:13.614615 Connected to device vid:did:rid of 1ae0:0028:00
293 09:44:13.624458 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 09:44:13.628033 Initialized TPM device CR50 revision 0
295 09:44:13.671707 tlcl_send_startup: Startup return code is 0
296 09:44:13.672285 TPM: setup succeeded
297 09:44:13.684428 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 09:44:13.688112 Chrome EC: UHEPI supported
299 09:44:13.691549 Phase 1
300 09:44:13.694751 FMAP: area GBB found @ c05000 (12288 bytes)
301 09:44:13.701091 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 09:44:13.701751 Phase 2
303 09:44:13.704931
304 09:44:13.705531 Phase 3
305 09:44:13.708211 FMAP: area GBB found @ c05000 (12288 bytes)
306 09:44:13.714804 VB2:vb2_report_dev_firmware() This is developer signed firmware
307 09:44:13.721120 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 09:44:13.724423 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 09:44:13.730965 VB2:vb2_verify_keyblock() Checking keyblock signature...
310 09:44:13.747073 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 09:44:13.749964 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
312 09:44:13.756665 VB2:vb2_verify_fw_preamble() Verifying preamble.
313 09:44:13.761613 Phase 4
314 09:44:13.764124 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
315 09:44:13.771394 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
316 09:44:13.950238 VB2:vb2_rsa_verify_digest() Digest check failed!
317 09:44:13.953587 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
318 09:44:13.957531
319 09:44:13.958017 Saving nvdata
320 09:44:13.960784 Reboot requested (10020007)
321 09:44:13.963538 board_reset() called!
322 09:44:13.964059 full_reset() called!
323 09:44:18.474172
324 09:44:18.474791
325 09:44:18.484446 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
326 09:44:18.487277 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
327 09:44:18.494771 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
328 09:44:18.497362 CPU: AES supported, TXT NOT supported, VT supported
329 09:44:18.504030 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
330 09:44:18.507404 PCH: device id 0284 (rev 00) is Cometlake-U Premium
331 09:44:18.514134 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
332 09:44:18.517767 VBOOT: Loading verstage.
333 09:44:18.520997 FMAP: Found "FLASH" version 1.1 at 0xc04000.
334 09:44:18.527549 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
335 09:44:18.530721 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
336 09:44:18.533903 CBFS @ c08000 size 3f8000
337 09:44:18.540638 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
338 09:44:18.543996 CBFS: Locating 'fallback/verstage'
339 09:44:18.546991 CBFS: Found @ offset 10fb80 size 1072c
340 09:44:18.550964
341 09:44:18.551544
342 09:44:18.561357 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
343 09:44:18.575717 Probing TPM: . done!
344 09:44:18.578420 TPM ready after 0 ms
345 09:44:18.581666 Connected to device vid:did:rid of 1ae0:0028:00
346 09:44:18.591924 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
347 09:44:18.595577 Initialized TPM device CR50 revision 0
348 09:44:18.639723 tlcl_send_startup: Startup return code is 0
349 09:44:18.640314 TPM: setup succeeded
350 09:44:18.651760 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 09:44:18.656268 Chrome EC: UHEPI supported
352 09:44:18.659309 Phase 1
353 09:44:18.662239 FMAP: area GBB found @ c05000 (12288 bytes)
354 09:44:18.668658 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
355 09:44:18.675428 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
356 09:44:18.678895 Recovery requested (1009000e)
357 09:44:18.684511 Saving nvdata
358 09:44:18.690618 tlcl_extend: response is 0
359 09:44:18.699539 tlcl_extend: response is 0
360 09:44:18.706438 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 09:44:18.710036 CBFS @ c08000 size 3f8000
362 09:44:18.713343 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 09:44:18.716697
364 09:44:18.720407 CBFS: Locating 'fallback/romstage'
365 09:44:18.723471 CBFS: Found @ offset 80 size 145fc
366 09:44:18.727316 Accumulated console time in verstage 99 ms
367 09:44:18.727896
368 09:44:18.728275
369 09:44:18.739813 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
370 09:44:18.746692 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
371 09:44:18.750034 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
372 09:44:18.753050 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
373 09:44:18.759759 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
374 09:44:18.762741 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
375 09:44:18.766344 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
376 09:44:18.769928 TCO_STS: 0000 0000
377 09:44:18.773152 GEN_PMCON: e0015238 00000200
378 09:44:18.775784 GBLRST_CAUSE: 00000000 00000000
379 09:44:18.776322 prev_sleep_state 5
380 09:44:18.779340 Boot Count incremented to 51976
381 09:44:18.786212 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
382 09:44:18.789878 CBFS @ c08000 size 3f8000
383 09:44:18.796183 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
384 09:44:18.796668 CBFS: Locating 'fspm.bin'
385 09:44:18.799435 CBFS: Found @ offset 5ffc0 size 71000
386 09:44:18.803225
387 09:44:18.806096 Chrome EC: UHEPI supported
388 09:44:18.812586 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
389 09:44:18.816400 Probing TPM: done!
390 09:44:18.823292 Connected to device vid:did:rid of 1ae0:0028:00
391 09:44:18.833627 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
392 09:44:18.839103 Initialized TPM device CR50 revision 0
393 09:44:18.848115 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
394 09:44:18.854783 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
395 09:44:18.858169 MRC cache found, size 1948
396 09:44:18.861049 bootmode is set to: 2
397 09:44:18.865317 PRMRR disabled by config.
398 09:44:18.865926 SPD INDEX = 1
399 09:44:18.871097 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
400 09:44:18.874732 CBFS @ c08000 size 3f8000
401 09:44:18.881773 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
402 09:44:18.882263 CBFS: Locating 'spd.bin'
403 09:44:18.884645 CBFS: Found @ offset 5fb80 size 400
404 09:44:18.887752 SPD: module type is LPDDR3
405 09:44:18.891098 SPD: module part is
406 09:44:18.897685 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
407 09:44:18.901151 SPD: device width 4 bits, bus width 8 bits
408 09:44:18.905076 SPD: module size is 4096 MB (per channel)
409 09:44:18.908126 memory slot: 0 configuration done.
410 09:44:18.911053 memory slot: 2 configuration done.
411 09:44:18.962950 CBMEM:
412 09:44:18.966266 IMD: root @ 99fff000 254 entries.
413 09:44:18.969342 IMD: root @ 99ffec00 62 entries.
414 09:44:18.972820 External stage cache:
415 09:44:18.975845 IMD: root @ 9abff000 254 entries.
416 09:44:18.979389 IMD: root @ 9abfec00 62 entries.
417 09:44:18.982570 Chrome EC: clear events_b mask to 0x0000000020004000
418 09:44:18.998904 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
419 09:44:19.012358 tlcl_write: response is 0
420 09:44:19.020898 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 09:44:19.027517 MRC: TPM MRC hash updated successfully.
422 09:44:19.028090 2 DIMMs found
423 09:44:19.030987 SMM Memory Map
424 09:44:19.034393 SMRAM : 0x9a000000 0x1000000
425 09:44:19.037699 Subregion 0: 0x9a000000 0xa00000
426 09:44:19.040912 Subregion 1: 0x9aa00000 0x200000
427 09:44:19.044013 Subregion 2: 0x9ac00000 0x400000
428 09:44:19.047711 top_of_ram = 0x9a000000
429 09:44:19.050512 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
430 09:44:19.058027 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
431 09:44:19.060454 MTRR Range: Start=ff000000 End=0 (Size 1000000)
432 09:44:19.067460 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 09:44:19.070365 CBFS @ c08000 size 3f8000
434 09:44:19.074057 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 09:44:19.077005 CBFS: Locating 'fallback/postcar'
436 09:44:19.079929
437 09:44:19.084065 CBFS: Found @ offset 107000 size 4b44
438 09:44:19.089914 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 09:44:19.100060 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 09:44:19.103504 Processing 180 relocs. Offset value of 0x97c0c000
441 09:44:19.111865 Accumulated console time in romstage 286 ms
442 09:44:19.112436
443 09:44:19.112816
444 09:44:19.121972 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 09:44:19.128453 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 09:44:19.132328 CBFS @ c08000 size 3f8000
447 09:44:19.135676 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 09:44:19.138281 CBFS: Locating 'fallback/ramstage'
449 09:44:19.141576
450 09:44:19.145965 CBFS: Found @ offset 43380 size 1b9e8
451 09:44:19.151508 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
452 09:44:19.183823 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
453 09:44:19.187422 Processing 3976 relocs. Offset value of 0x98db0000
454 09:44:19.193567 Accumulated console time in postcar 52 ms
455 09:44:19.194226
456 09:44:19.194623
457 09:44:19.203661 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
458 09:44:19.210200 FMAP: area RO_VPD found @ c00000 (16384 bytes)
459 09:44:19.213252 WARNING: RO_VPD is uninitialized or empty.
460 09:44:19.216929 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 09:44:19.223879 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 09:44:19.224470 Normal boot.
463 09:44:19.230341 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
464 09:44:19.233840 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 09:44:19.236875 CBFS @ c08000 size 3f8000
466 09:44:19.243611 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 09:44:19.246606 CBFS: Locating 'cpu_microcode_blob.bin'
468 09:44:19.249768 CBFS: Found @ offset 14700 size 2ec00
469 09:44:19.252992 microcode: sig=0x806ec pf=0x4 revision=0xc9
470 09:44:19.256863 Skip microcode update
471 09:44:19.262844 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 09:44:19.263423 CBFS @ c08000 size 3f8000
473 09:44:19.269451 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 09:44:19.273171 CBFS: Locating 'fsps.bin'
475 09:44:19.276181 CBFS: Found @ offset d1fc0 size 35000
476 09:44:19.302220 Detected 4 core, 8 thread CPU.
477 09:44:19.305194 Setting up SMI for CPU
478 09:44:19.308993 IED base = 0x9ac00000
479 09:44:19.309640 IED size = 0x00400000
480 09:44:19.311388 Will perform SMM setup.
481 09:44:19.318396 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
482 09:44:19.325118 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
483 09:44:19.328365 Processing 16 relocs. Offset value of 0x00030000
484 09:44:19.332062 Attempting to start 7 APs
485 09:44:19.335705 Waiting for 10ms after sending INIT.
486 09:44:19.351949 Waiting for 1st SIPI to complete...done.
487 09:44:19.352548 AP: slot 3 apic_id 1.
488 09:44:19.358206 Waiting for 2nd SIPI to complete...done.
489 09:44:19.358793 AP: slot 5 apic_id 4.
490 09:44:19.361641 AP: slot 2 apic_id 5.
491 09:44:19.365521 AP: slot 4 apic_id 2.
492 09:44:19.366109 AP: slot 1 apic_id 3.
493 09:44:19.367746 AP: slot 7 apic_id 6.
494 09:44:19.370952 AP: slot 6 apic_id 7.
495 09:44:19.377995 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
496 09:44:19.384934 Processing 13 relocs. Offset value of 0x00038000
497 09:44:19.391411 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 09:44:19.394290 Installing SMM handler to 0x9a000000
499 09:44:19.401324 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 09:44:19.407484 Processing 658 relocs. Offset value of 0x9a010000
501 09:44:19.414524 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
502 09:44:19.417940 Processing 13 relocs. Offset value of 0x9a008000
503 09:44:19.424345 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
504 09:44:19.431127 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
505 09:44:19.437691 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
506 09:44:19.440822 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
507 09:44:19.447878 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
508 09:44:19.454239 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
509 09:44:19.460852 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
510 09:44:19.467326 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
511 09:44:19.470749 Clearing SMI status registers
512 09:44:19.471237 SMI_STS: PM1
513 09:44:19.473634 PM1_STS: PWRBTN
514 09:44:19.474116 TCO_STS: SECOND_TO
515 09:44:19.477506 New SMBASE 0x9a000000
516 09:44:19.480201 In relocation handler: CPU 0
517 09:44:19.483847 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
518 09:44:19.487393 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 09:44:19.490544 Relocation complete.
520 09:44:19.493934 New SMBASE 0x99fff400
521 09:44:19.496718 In relocation handler: CPU 3
522 09:44:19.500452 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
523 09:44:19.503707 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 09:44:19.507083 Relocation complete.
525 09:44:19.509818 New SMBASE 0x99ffe400
526 09:44:19.513430 In relocation handler: CPU 7
527 09:44:19.517050 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
528 09:44:19.520038 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 09:44:19.523510 Relocation complete.
530 09:44:19.527087 New SMBASE 0x99ffe800
531 09:44:19.530441 In relocation handler: CPU 6
532 09:44:19.533594 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
533 09:44:19.536740 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 09:44:19.540487 Relocation complete.
535 09:44:19.543006 New SMBASE 0x99fff000
536 09:44:19.546723 In relocation handler: CPU 4
537 09:44:19.550395 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
538 09:44:19.553233 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 09:44:19.556534 Relocation complete.
540 09:44:19.559810 New SMBASE 0x99fffc00
541 09:44:19.562950 In relocation handler: CPU 1
542 09:44:19.566443 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
543 09:44:19.570033 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 09:44:19.572948 Relocation complete.
545 09:44:19.576698 New SMBASE 0x99ffec00
546 09:44:19.577279 In relocation handler: CPU 5
547 09:44:19.583071 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
548 09:44:19.586765 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 09:44:19.589833 Relocation complete.
550 09:44:19.592899 New SMBASE 0x99fff800
551 09:44:19.593381 In relocation handler: CPU 2
552 09:44:19.599869 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
553 09:44:19.602764 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 09:44:19.606950 Relocation complete.
555 09:44:19.607528 Initializing CPU #0
556 09:44:19.609299 CPU: vendor Intel device 806ec
557 09:44:19.615696 CPU: family 06, model 8e, stepping 0c
558 09:44:19.616270 Clearing out pending MCEs
559 09:44:19.620061 Setting up local APIC...
560 09:44:19.622645 apic_id: 0x00 done.
561 09:44:19.626742 Turbo is available but hidden
562 09:44:19.629582 Turbo is available and visible
563 09:44:19.630167 VMX status: enabled
564 09:44:19.632727 IA32_FEATURE_CONTROL status: locked
565 09:44:19.636069 Skip microcode update
566 09:44:19.639430 CPU #0 initialized
567 09:44:19.640008 Initializing CPU #3
568 09:44:19.642360 Initializing CPU #7
569 09:44:19.642838 Initializing CPU #6
570 09:44:19.646185
571 09:44:19.646759 CPU: vendor Intel device 806ec
572 09:44:19.652849 CPU: family 06, model 8e, stepping 0c
573 09:44:19.655711 CPU: vendor Intel device 806ec
574 09:44:19.659383 CPU: family 06, model 8e, stepping 0c
575 09:44:19.659968 Clearing out pending MCEs
576 09:44:19.662515 CPU: vendor Intel device 806ec
577 09:44:19.668988 CPU: family 06, model 8e, stepping 0c
578 09:44:19.669608 Clearing out pending MCEs
579 09:44:19.672618 Initializing CPU #2
580 09:44:19.675919 Initializing CPU #5
581 09:44:19.676399 Setting up local APIC...
582 09:44:19.678935 Initializing CPU #4
583 09:44:19.682218 Setting up local APIC...
584 09:44:19.682698 Initializing CPU #1
585 09:44:19.685511 CPU: vendor Intel device 806ec
586 09:44:19.688884 CPU: family 06, model 8e, stepping 0c
587 09:44:19.692356 CPU: vendor Intel device 806ec
588 09:44:19.698862 CPU: family 06, model 8e, stepping 0c
589 09:44:19.699447 Clearing out pending MCEs
590 09:44:19.702016 Clearing out pending MCEs
591 09:44:19.705424 Setting up local APIC...
592 09:44:19.708961 apic_id: 0x07 done.
593 09:44:19.709580 Clearing out pending MCEs
594 09:44:19.711930 VMX status: enabled
595 09:44:19.715562 Setting up local APIC...
596 09:44:19.718375 CPU: vendor Intel device 806ec
597 09:44:19.721995 CPU: family 06, model 8e, stepping 0c
598 09:44:19.726389 CPU: vendor Intel device 806ec
599 09:44:19.729156 CPU: family 06, model 8e, stepping 0c
600 09:44:19.732375 Clearing out pending MCEs
601 09:44:19.732952 Clearing out pending MCEs
602 09:44:19.735513 Setting up local APIC...
603 09:44:19.738628 apic_id: 0x01 done.
604 09:44:19.741983 Setting up local APIC...
605 09:44:19.742466 apic_id: 0x06 done.
606 09:44:19.745443 IA32_FEATURE_CONTROL status: locked
607 09:44:19.748551 VMX status: enabled
608 09:44:19.751869 Skip microcode update
609 09:44:19.752442 VMX status: enabled
610 09:44:19.755068 CPU #6 initialized
611 09:44:19.758573 IA32_FEATURE_CONTROL status: locked
612 09:44:19.762276 IA32_FEATURE_CONTROL status: locked
613 09:44:19.765386 apic_id: 0x03 done.
614 09:44:19.765908 apic_id: 0x02 done.
615 09:44:19.768214 VMX status: enabled
616 09:44:19.771894 VMX status: enabled
617 09:44:19.774835 IA32_FEATURE_CONTROL status: locked
618 09:44:19.778534 IA32_FEATURE_CONTROL status: locked
619 09:44:19.779066 Skip microcode update
620 09:44:19.781564 Skip microcode update
621 09:44:19.784768 CPU #1 initialized
622 09:44:19.785245 CPU #4 initialized
623 09:44:19.788347 Skip microcode update
624 09:44:19.791670 Skip microcode update
625 09:44:19.792250 CPU #7 initialized
626 09:44:19.794674 CPU #3 initialized
627 09:44:19.797995 Setting up local APIC...
628 09:44:19.798472 apic_id: 0x04 done.
629 09:44:19.801795 apic_id: 0x05 done.
630 09:44:19.802273 VMX status: enabled
631 09:44:19.804969 VMX status: enabled
632 09:44:19.808421 IA32_FEATURE_CONTROL status: locked
633 09:44:19.812073 IA32_FEATURE_CONTROL status: locked
634 09:44:19.814987 Skip microcode update
635 09:44:19.818189 Skip microcode update
636 09:44:19.818666 CPU #5 initialized
637 09:44:19.821125 CPU #2 initialized
638 09:44:19.825326 bsp_do_flight_plan done after 466 msecs.
639 09:44:19.828006 CPU: frequency set to 4200 MHz
640 09:44:19.828487 Enabling SMIs.
641 09:44:19.831521 Locking SMM.
642 09:44:19.845764 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
643 09:44:19.848972 CBFS @ c08000 size 3f8000
644 09:44:19.856044 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
645 09:44:19.856628 CBFS: Locating 'vbt.bin'
646 09:44:19.859482 CBFS: Found @ offset 5f5c0 size 499
647 09:44:19.865757 Found a VBT of 4608 bytes after decompression
648 09:44:20.051140 Display FSP Version Info HOB
649 09:44:20.054658 Reference Code - CPU = 9.0.1e.30
650 09:44:20.058060 uCode Version = 0.0.0.ca
651 09:44:20.061133 TXT ACM version = ff.ff.ff.ffff
652 09:44:20.064685 Display FSP Version Info HOB
653 09:44:20.068279 Reference Code - ME = 9.0.1e.30
654 09:44:20.070960 MEBx version = 0.0.0.0
655 09:44:20.074617 ME Firmware Version = Consumer SKU
656 09:44:20.077916 Display FSP Version Info HOB
657 09:44:20.081011 Reference Code - CML PCH = 9.0.1e.30
658 09:44:20.084418 PCH-CRID Status = Disabled
659 09:44:20.088162 PCH-CRID Original Value = ff.ff.ff.ffff
660 09:44:20.090774 PCH-CRID New Value = ff.ff.ff.ffff
661 09:44:20.094368 OPROM - RST - RAID = ff.ff.ff.ffff
662 09:44:20.097944 ChipsetInit Base Version = ff.ff.ff.ffff
663 09:44:20.100722 ChipsetInit Oem Version = ff.ff.ff.ffff
664 09:44:20.104468 Display FSP Version Info HOB
665 09:44:20.110823 Reference Code - SA - System Agent = 9.0.1e.30
666 09:44:20.114084 Reference Code - MRC = 0.7.1.6c
667 09:44:20.114564 SA - PCIe Version = 9.0.1e.30
668 09:44:20.117834 SA-CRID Status = Disabled
669 09:44:20.120893 SA-CRID Original Value = 0.0.0.c
670 09:44:20.124124 SA-CRID New Value = 0.0.0.c
671 09:44:20.127327 OPROM - VBIOS = ff.ff.ff.ffff
672 09:44:20.130474 RTC Init
673 09:44:20.134012 Set power on after power failure.
674 09:44:20.134593 Disabling Deep S3
675 09:44:20.137500 Disabling Deep S3
676 09:44:20.138083 Disabling Deep S4
677 09:44:20.141030 Disabling Deep S4
678 09:44:20.141641 Disabling Deep S5
679 09:44:20.143972 Disabling Deep S5
680 09:44:20.151071 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
681 09:44:20.151658 Enumerating buses...
682 09:44:20.157613 Show all devs... Before device enumeration.
683 09:44:20.158194 Root Device: enabled 1
684 09:44:20.160861 CPU_CLUSTER: 0: enabled 1
685 09:44:20.164138 DOMAIN: 0000: enabled 1
686 09:44:20.167490 APIC: 00: enabled 1
687 09:44:20.168067 PCI: 00:00.0: enabled 1
688 09:44:20.170247 PCI: 00:02.0: enabled 1
689 09:44:20.173920 PCI: 00:04.0: enabled 0
690 09:44:20.177022 PCI: 00:05.0: enabled 0
691 09:44:20.177524 PCI: 00:12.0: enabled 1
692 09:44:20.180157 PCI: 00:12.5: enabled 0
693 09:44:20.183454 PCI: 00:12.6: enabled 0
694 09:44:20.183951 PCI: 00:14.0: enabled 1
695 09:44:20.186838 PCI: 00:14.1: enabled 0
696 09:44:20.190442 PCI: 00:14.3: enabled 1
697 09:44:20.194102 PCI: 00:14.5: enabled 0
698 09:44:20.194685 PCI: 00:15.0: enabled 1
699 09:44:20.197291 PCI: 00:15.1: enabled 1
700 09:44:20.200508 PCI: 00:15.2: enabled 0
701 09:44:20.204022 PCI: 00:15.3: enabled 0
702 09:44:20.204620 PCI: 00:16.0: enabled 1
703 09:44:20.206849 PCI: 00:16.1: enabled 0
704 09:44:20.210324 PCI: 00:16.2: enabled 0
705 09:44:20.213968 PCI: 00:16.3: enabled 0
706 09:44:20.214546 PCI: 00:16.4: enabled 0
707 09:44:20.216830 PCI: 00:16.5: enabled 0
708 09:44:20.221011 PCI: 00:17.0: enabled 1
709 09:44:20.221623 PCI: 00:19.0: enabled 1
710 09:44:20.223571 PCI: 00:19.1: enabled 0
711 09:44:20.227014 PCI: 00:19.2: enabled 0
712 09:44:20.229951 PCI: 00:1a.0: enabled 0
713 09:44:20.230431 PCI: 00:1c.0: enabled 0
714 09:44:20.234102 PCI: 00:1c.1: enabled 0
715 09:44:20.237109 PCI: 00:1c.2: enabled 0
716 09:44:20.240463 PCI: 00:1c.3: enabled 0
717 09:44:20.241047 PCI: 00:1c.4: enabled 0
718 09:44:20.243377 PCI: 00:1c.5: enabled 0
719 09:44:20.246967 PCI: 00:1c.6: enabled 0
720 09:44:20.250135 PCI: 00:1c.7: enabled 0
721 09:44:20.250718 PCI: 00:1d.0: enabled 1
722 09:44:20.254036 PCI: 00:1d.1: enabled 0
723 09:44:20.256363 PCI: 00:1d.2: enabled 0
724 09:44:20.256843 PCI: 00:1d.3: enabled 0
725 09:44:20.259968
726 09:44:20.260550 PCI: 00:1d.4: enabled 0
727 09:44:20.263319 PCI: 00:1d.5: enabled 1
728 09:44:20.266993 PCI: 00:1e.0: enabled 1
729 09:44:20.267478 PCI: 00:1e.1: enabled 0
730 09:44:20.270253 PCI: 00:1e.2: enabled 1
731 09:44:20.273150 PCI: 00:1e.3: enabled 1
732 09:44:20.276516 PCI: 00:1f.0: enabled 1
733 09:44:20.276998 PCI: 00:1f.1: enabled 1
734 09:44:20.279710 PCI: 00:1f.2: enabled 1
735 09:44:20.283114 PCI: 00:1f.3: enabled 1
736 09:44:20.286645 PCI: 00:1f.4: enabled 1
737 09:44:20.287128 PCI: 00:1f.5: enabled 1
738 09:44:20.289992 PCI: 00:1f.6: enabled 0
739 09:44:20.293516 USB0 port 0: enabled 1
740 09:44:20.294098 I2C: 00:15: enabled 1
741 09:44:20.296733 I2C: 00:5d: enabled 1
742 09:44:20.299613 GENERIC: 0.0: enabled 1
743 09:44:20.300097 I2C: 00:1a: enabled 1
744 09:44:20.303156 I2C: 00:38: enabled 1
745 09:44:20.306403 I2C: 00:39: enabled 1
746 09:44:20.306885 I2C: 00:3a: enabled 1
747 09:44:20.309709 I2C: 00:3b: enabled 1
748 09:44:20.313060 PCI: 00:00.0: enabled 1
749 09:44:20.313673 SPI: 00: enabled 1
750 09:44:20.316371 SPI: 01: enabled 1
751 09:44:20.319672 PNP: 0c09.0: enabled 1
752 09:44:20.320257 USB2 port 0: enabled 1
753 09:44:20.323189
754 09:44:20.323672 USB2 port 1: enabled 1
755 09:44:20.326037 USB2 port 2: enabled 0
756 09:44:20.329624 USB2 port 3: enabled 0
757 09:44:20.330198 USB2 port 5: enabled 0
758 09:44:20.333152 USB2 port 6: enabled 1
759 09:44:20.336837 USB2 port 9: enabled 1
760 09:44:20.337417 USB3 port 0: enabled 1
761 09:44:20.339886 USB3 port 1: enabled 1
762 09:44:20.342816 USB3 port 2: enabled 1
763 09:44:20.346390 USB3 port 3: enabled 1
764 09:44:20.346998 USB3 port 4: enabled 0
765 09:44:20.350010 APIC: 03: enabled 1
766 09:44:20.350583 APIC: 05: enabled 1
767 09:44:20.353007 APIC: 01: enabled 1
768 09:44:20.357226 APIC: 02: enabled 1
769 09:44:20.357846 APIC: 04: enabled 1
770 09:44:20.359861 APIC: 07: enabled 1
771 09:44:20.363026 APIC: 06: enabled 1
772 09:44:20.363604 Compare with tree...
773 09:44:20.366076 Root Device: enabled 1
774 09:44:20.369534 CPU_CLUSTER: 0: enabled 1
775 09:44:20.370123 APIC: 00: enabled 1
776 09:44:20.372967 APIC: 03: enabled 1
777 09:44:20.376207 APIC: 05: enabled 1
778 09:44:20.376782 APIC: 01: enabled 1
779 09:44:20.379444 APIC: 02: enabled 1
780 09:44:20.382404 APIC: 04: enabled 1
781 09:44:20.382889 APIC: 07: enabled 1
782 09:44:20.386264 APIC: 06: enabled 1
783 09:44:20.389272 DOMAIN: 0000: enabled 1
784 09:44:20.392401 PCI: 00:00.0: enabled 1
785 09:44:20.392881 PCI: 00:02.0: enabled 1
786 09:44:20.396133
787 09:44:20.396726 PCI: 00:04.0: enabled 0
788 09:44:20.399578 PCI: 00:05.0: enabled 0
789 09:44:20.402950 PCI: 00:12.0: enabled 1
790 09:44:20.405688 PCI: 00:12.5: enabled 0
791 09:44:20.406260 PCI: 00:12.6: enabled 0
792 09:44:20.409269 PCI: 00:14.0: enabled 1
793 09:44:20.412595 USB0 port 0: enabled 1
794 09:44:20.415700 USB2 port 0: enabled 1
795 09:44:20.419183 USB2 port 1: enabled 1
796 09:44:20.419753 USB2 port 2: enabled 0
797 09:44:20.422388
798 09:44:20.422983 USB2 port 3: enabled 0
799 09:44:20.426069 USB2 port 5: enabled 0
800 09:44:20.429158 USB2 port 6: enabled 1
801 09:44:20.432590 USB2 port 9: enabled 1
802 09:44:20.435506 USB3 port 0: enabled 1
803 09:44:20.435990 USB3 port 1: enabled 1
804 09:44:20.439007 USB3 port 2: enabled 1
805 09:44:20.442434 USB3 port 3: enabled 1
806 09:44:20.446094 USB3 port 4: enabled 0
807 09:44:20.449654 PCI: 00:14.1: enabled 0
808 09:44:20.450230 PCI: 00:14.3: enabled 1
809 09:44:20.452288
810 09:44:20.452864 PCI: 00:14.5: enabled 0
811 09:44:20.455987 PCI: 00:15.0: enabled 1
812 09:44:20.459187 I2C: 00:15: enabled 1
813 09:44:20.462363 PCI: 00:15.1: enabled 1
814 09:44:20.462942 I2C: 00:5d: enabled 1
815 09:44:20.465623 GENERIC: 0.0: enabled 1
816 09:44:20.468832 PCI: 00:15.2: enabled 0
817 09:44:20.472119 PCI: 00:15.3: enabled 0
818 09:44:20.475750 PCI: 00:16.0: enabled 1
819 09:44:20.476327 PCI: 00:16.1: enabled 0
820 09:44:20.478787 PCI: 00:16.2: enabled 0
821 09:44:20.482184 PCI: 00:16.3: enabled 0
822 09:44:20.485186 PCI: 00:16.4: enabled 0
823 09:44:20.488538 PCI: 00:16.5: enabled 0
824 09:44:20.489013 PCI: 00:17.0: enabled 1
825 09:44:20.492043 PCI: 00:19.0: enabled 1
826 09:44:20.495184 I2C: 00:1a: enabled 1
827 09:44:20.498555 I2C: 00:38: enabled 1
828 09:44:20.499078 I2C: 00:39: enabled 1
829 09:44:20.501993 I2C: 00:3a: enabled 1
830 09:44:20.505464 I2C: 00:3b: enabled 1
831 09:44:20.508893 PCI: 00:19.1: enabled 0
832 09:44:20.509557 PCI: 00:19.2: enabled 0
833 09:44:20.512113
834 09:44:20.512589 PCI: 00:1a.0: enabled 0
835 09:44:20.515010 PCI: 00:1c.0: enabled 0
836 09:44:20.518206 PCI: 00:1c.1: enabled 0
837 09:44:20.522060 PCI: 00:1c.2: enabled 0
838 09:44:20.522642 PCI: 00:1c.3: enabled 0
839 09:44:20.525533
840 09:44:20.526116 PCI: 00:1c.4: enabled 0
841 09:44:20.528967 PCI: 00:1c.5: enabled 0
842 09:44:20.531571 PCI: 00:1c.6: enabled 0
843 09:44:20.534864 PCI: 00:1c.7: enabled 0
844 09:44:20.535342 PCI: 00:1d.0: enabled 1
845 09:44:20.538150 PCI: 00:1d.1: enabled 0
846 09:44:20.541599 PCI: 00:1d.2: enabled 0
847 09:44:20.545263 PCI: 00:1d.3: enabled 0
848 09:44:20.548016 PCI: 00:1d.4: enabled 0
849 09:44:20.548494 PCI: 00:1d.5: enabled 1
850 09:44:20.551813 PCI: 00:00.0: enabled 1
851 09:44:20.555611 PCI: 00:1e.0: enabled 1
852 09:44:20.558278 PCI: 00:1e.1: enabled 0
853 09:44:20.561550 PCI: 00:1e.2: enabled 1
854 09:44:20.562130 SPI: 00: enabled 1
855 09:44:20.565168 PCI: 00:1e.3: enabled 1
856 09:44:20.568402 SPI: 01: enabled 1
857 09:44:20.571404 PCI: 00:1f.0: enabled 1
858 09:44:20.571999 PNP: 0c09.0: enabled 1
859 09:44:20.574606 PCI: 00:1f.1: enabled 1
860 09:44:20.578164 PCI: 00:1f.2: enabled 1
861 09:44:20.581414 PCI: 00:1f.3: enabled 1
862 09:44:20.584747 PCI: 00:1f.4: enabled 1
863 09:44:20.585230 PCI: 00:1f.5: enabled 1
864 09:44:20.587651 PCI: 00:1f.6: enabled 0
865 09:44:20.590935 Root Device scanning...
866 09:44:20.595034 scan_static_bus for Root Device
867 09:44:20.597891 CPU_CLUSTER: 0 enabled
868 09:44:20.598369 DOMAIN: 0000 enabled
869 09:44:20.601034 DOMAIN: 0000 scanning...
870 09:44:20.604718 PCI: pci_scan_bus for bus 00
871 09:44:20.607811 PCI: 00:00.0 [8086/0000] ops
872 09:44:20.611193 PCI: 00:00.0 [8086/9b61] enabled
873 09:44:20.614772 PCI: 00:02.0 [8086/0000] bus ops
874 09:44:20.617677 PCI: 00:02.0 [8086/9b41] enabled
875 09:44:20.621063 PCI: 00:04.0 [8086/1903] disabled
876 09:44:20.624453 PCI: 00:08.0 [8086/1911] enabled
877 09:44:20.627946 PCI: 00:12.0 [8086/02f9] enabled
878 09:44:20.631127 PCI: 00:14.0 [8086/0000] bus ops
879 09:44:20.634485 PCI: 00:14.0 [8086/02ed] enabled
880 09:44:20.637849 PCI: 00:14.2 [8086/02ef] enabled
881 09:44:20.641128 PCI: 00:14.3 [8086/02f0] enabled
882 09:44:20.644322 PCI: 00:15.0 [8086/0000] bus ops
883 09:44:20.647615 PCI: 00:15.0 [8086/02e8] enabled
884 09:44:20.651014 PCI: 00:15.1 [8086/0000] bus ops
885 09:44:20.654414 PCI: 00:15.1 [8086/02e9] enabled
886 09:44:20.657838 PCI: 00:16.0 [8086/0000] ops
887 09:44:20.660990 PCI: 00:16.0 [8086/02e0] enabled
888 09:44:20.664435 PCI: 00:17.0 [8086/0000] ops
889 09:44:20.667791 PCI: 00:17.0 [8086/02d3] enabled
890 09:44:20.671176 PCI: 00:19.0 [8086/0000] bus ops
891 09:44:20.674391 PCI: 00:19.0 [8086/02c5] enabled
892 09:44:20.677249 PCI: 00:1d.0 [8086/0000] bus ops
893 09:44:20.680900 PCI: 00:1d.0 [8086/02b0] enabled
894 09:44:20.687174 PCI: Static device PCI: 00:1d.5 not found, disabling it.
895 09:44:20.687697 PCI: 00:1e.0 [8086/0000] ops
896 09:44:20.690475 PCI: 00:1e.0 [8086/02a8] enabled
897 09:44:20.694043 PCI: 00:1e.2 [8086/0000] bus ops
898 09:44:20.697088 PCI: 00:1e.2 [8086/02aa] enabled
899 09:44:20.700692 PCI: 00:1e.3 [8086/0000] bus ops
900 09:44:20.703730 PCI: 00:1e.3 [8086/02ab] enabled
901 09:44:20.707274 PCI: 00:1f.0 [8086/0000] bus ops
902 09:44:20.710348 PCI: 00:1f.0 [8086/0284] enabled
903 09:44:20.717084 PCI: Static device PCI: 00:1f.1 not found, disabling it.
904 09:44:20.723952 PCI: Static device PCI: 00:1f.2 not found, disabling it.
905 09:44:20.727702 PCI: 00:1f.3 [8086/0000] bus ops
906 09:44:20.730494 PCI: 00:1f.3 [8086/02c8] enabled
907 09:44:20.734055 PCI: 00:1f.4 [8086/0000] bus ops
908 09:44:20.737366 PCI: 00:1f.4 [8086/02a3] enabled
909 09:44:20.740542 PCI: 00:1f.5 [8086/0000] bus ops
910 09:44:20.743775 PCI: 00:1f.5 [8086/02a4] enabled
911 09:44:20.746814 PCI: Leftover static devices:
912 09:44:20.747301 PCI: 00:05.0
913 09:44:20.750796 PCI: 00:12.5
914 09:44:20.751385 PCI: 00:12.6
915 09:44:20.751768 PCI: 00:14.1
916 09:44:20.754654 PCI: 00:14.5
917 09:44:20.755243 PCI: 00:15.2
918 09:44:20.757014 PCI: 00:15.3
919 09:44:20.757523 PCI: 00:16.1
920 09:44:20.757931 PCI: 00:16.2
921 09:44:20.760745 PCI: 00:16.3
922 09:44:20.761336 PCI: 00:16.4
923 09:44:20.764027 PCI: 00:16.5
924 09:44:20.764740 PCI: 00:19.1
925 09:44:20.765140 PCI: 00:19.2
926 09:44:20.767173
927 09:44:20.767659 PCI: 00:1a.0
928 09:44:20.768042 PCI: 00:1c.0
929 09:44:20.770270 PCI: 00:1c.1
930 09:44:20.770751 PCI: 00:1c.2
931 09:44:20.773750 PCI: 00:1c.3
932 09:44:20.774232 PCI: 00:1c.4
933 09:44:20.774610 PCI: 00:1c.5
934 09:44:20.777358 PCI: 00:1c.6
935 09:44:20.777990 PCI: 00:1c.7
936 09:44:20.780437 PCI: 00:1d.1
937 09:44:20.780920 PCI: 00:1d.2
938 09:44:20.781365 PCI: 00:1d.3
939 09:44:20.783437 PCI: 00:1d.4
940 09:44:20.783922 PCI: 00:1d.5
941 09:44:20.786929 PCI: 00:1e.1
942 09:44:20.787410 PCI: 00:1f.1
943 09:44:20.787792 PCI: 00:1f.2
944 09:44:20.790398
945 09:44:20.790883 PCI: 00:1f.6
946 09:44:20.793365 PCI: Check your devicetree.cb.
947 09:44:20.796892 PCI: 00:02.0 scanning...
948 09:44:20.800435 scan_generic_bus for PCI: 00:02.0
949 09:44:20.803197 scan_generic_bus for PCI: 00:02.0 done
950 09:44:20.809884 scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs
951 09:44:20.810373 PCI: 00:14.0 scanning...
952 09:44:20.813549 scan_static_bus for PCI: 00:14.0
953 09:44:20.816704 USB0 port 0 enabled
954 09:44:20.820424 USB0 port 0 scanning...
955 09:44:20.824156 scan_static_bus for USB0 port 0
956 09:44:20.824749 USB2 port 0 enabled
957 09:44:20.826508 USB2 port 1 enabled
958 09:44:20.830285 USB2 port 2 disabled
959 09:44:20.830872 USB2 port 3 disabled
960 09:44:20.834172 USB2 port 5 disabled
961 09:44:20.837161 USB2 port 6 enabled
962 09:44:20.837798 USB2 port 9 enabled
963 09:44:20.840331 USB3 port 0 enabled
964 09:44:20.840921 USB3 port 1 enabled
965 09:44:20.843221 USB3 port 2 enabled
966 09:44:20.847358 USB3 port 3 enabled
967 09:44:20.847947 USB3 port 4 disabled
968 09:44:20.850511 USB2 port 0 scanning...
969 09:44:20.853667 scan_static_bus for USB2 port 0
970 09:44:20.856940 scan_static_bus for USB2 port 0 done
971 09:44:20.863600 scan_bus: scanning of bus USB2 port 0 took 9690 usecs
972 09:44:20.866412 USB2 port 1 scanning...
973 09:44:20.869925 scan_static_bus for USB2 port 1
974 09:44:20.873164 scan_static_bus for USB2 port 1 done
975 09:44:20.876416 scan_bus: scanning of bus USB2 port 1 took 9687 usecs
976 09:44:20.879717 USB2 port 6 scanning...
977 09:44:20.882804 scan_static_bus for USB2 port 6
978 09:44:20.886078 scan_static_bus for USB2 port 6 done
979 09:44:20.892972 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
980 09:44:20.896154 USB2 port 9 scanning...
981 09:44:20.899765 scan_static_bus for USB2 port 9
982 09:44:20.903189 scan_static_bus for USB2 port 9 done
983 09:44:20.906552 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
984 09:44:20.909621 USB3 port 0 scanning...
985 09:44:20.912489 scan_static_bus for USB3 port 0
986 09:44:20.915853 scan_static_bus for USB3 port 0 done
987 09:44:20.922968 scan_bus: scanning of bus USB3 port 0 took 9685 usecs
988 09:44:20.926657 USB3 port 1 scanning...
989 09:44:20.928911 scan_static_bus for USB3 port 1
990 09:44:20.932673 scan_static_bus for USB3 port 1 done
991 09:44:20.939410 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
992 09:44:20.939850 USB3 port 2 scanning...
993 09:44:20.942447 scan_static_bus for USB3 port 2
994 09:44:20.946198 scan_static_bus for USB3 port 2 done
995 09:44:20.952258 scan_bus: scanning of bus USB3 port 2 took 9702 usecs
996 09:44:20.956192 USB3 port 3 scanning...
997 09:44:20.959254 scan_static_bus for USB3 port 3
998 09:44:20.962731 scan_static_bus for USB3 port 3 done
999 09:44:20.969147 scan_bus: scanning of bus USB3 port 3 took 9695 usecs
1000 09:44:20.972630 scan_static_bus for USB0 port 0 done
1001 09:44:20.975628 scan_bus: scanning of bus USB0 port 0 took 155276 usecs
1002 09:44:20.979083 scan_static_bus for PCI: 00:14.0 done
1003 09:44:20.982587
1004 09:44:20.985705 scan_bus: scanning of bus PCI: 00:14.0 took 172885 usecs
1005 09:44:20.988774 PCI: 00:15.0 scanning...
1006 09:44:20.992424 scan_generic_bus for PCI: 00:15.0
1007 09:44:20.995350 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1008 09:44:20.998463 scan_generic_bus for PCI: 00:15.0 done
1009 09:44:21.001865
1010 09:44:21.005140 scan_bus: scanning of bus PCI: 00:15.0 took 14294 usecs
1011 09:44:21.008769 PCI: 00:15.1 scanning...
1012 09:44:21.012598 scan_generic_bus for PCI: 00:15.1
1013 09:44:21.015365 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1014 09:44:21.022082 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1015 09:44:21.025393 scan_generic_bus for PCI: 00:15.1 done
1016 09:44:21.028561 scan_bus: scanning of bus PCI: 00:15.1 took 18590 usecs
1017 09:44:21.031659 PCI: 00:19.0 scanning...
1018 09:44:21.034992 scan_generic_bus for PCI: 00:19.0
1019 09:44:21.042318 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1020 09:44:21.045277 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1021 09:44:21.048410 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1022 09:44:21.051739 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1023 09:44:21.055542 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1024 09:44:21.058606
1025 09:44:21.061656 scan_generic_bus for PCI: 00:19.0 done
1026 09:44:21.065213 scan_bus: scanning of bus PCI: 00:19.0 took 30720 usecs
1027 09:44:21.068385 PCI: 00:1d.0 scanning...
1028 09:44:21.071935 do_pci_scan_bridge for PCI: 00:1d.0
1029 09:44:21.074928 PCI: pci_scan_bus for bus 01
1030 09:44:21.078609 PCI: 01:00.0 [1c5c/1327] enabled
1031 09:44:21.081387 Enabling Common Clock Configuration
1032 09:44:21.088561 L1 Sub-State supported from root port 29
1033 09:44:21.089177 L1 Sub-State Support = 0xf
1034 09:44:21.091523 CommonModeRestoreTime = 0x28
1035 09:44:21.098308 Power On Value = 0x16, Power On Scale = 0x0
1036 09:44:21.098844 ASPM: Enabled L1
1037 09:44:21.104873 scan_bus: scanning of bus PCI: 00:1d.0 took 32772 usecs
1038 09:44:21.108340 PCI: 00:1e.2 scanning...
1039 09:44:21.111034 scan_generic_bus for PCI: 00:1e.2
1040 09:44:21.114686 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1041 09:44:21.117819 scan_generic_bus for PCI: 00:1e.2 done
1042 09:44:21.124795 scan_bus: scanning of bus PCI: 00:1e.2 took 13989 usecs
1043 09:44:21.125363 PCI: 00:1e.3 scanning...
1044 09:44:21.128424
1045 09:44:21.131636 scan_generic_bus for PCI: 00:1e.3
1046 09:44:21.134791 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 09:44:21.138067 scan_generic_bus for PCI: 00:1e.3 done
1048 09:44:21.144858 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1049 09:44:21.145444 PCI: 00:1f.0 scanning...
1050 09:44:21.147940 scan_static_bus for PCI: 00:1f.0
1051 09:44:21.150845 PNP: 0c09.0 enabled
1052 09:44:21.154414 scan_static_bus for PCI: 00:1f.0 done
1053 09:44:21.160974 scan_bus: scanning of bus PCI: 00:1f.0 took 12032 usecs
1054 09:44:21.164418 PCI: 00:1f.3 scanning...
1055 09:44:21.168296 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1056 09:44:21.171608 PCI: 00:1f.4 scanning...
1057 09:44:21.174621 scan_generic_bus for PCI: 00:1f.4
1058 09:44:21.180842 scan_generic_bus for PCI: 00:1f.4 done
1059 09:44:21.183890 scan_bus: scanning of bus PCI: 00:1f.4 took 10181 usecs
1060 09:44:21.187172 PCI: 00:1f.5 scanning...
1061 09:44:21.190350 scan_generic_bus for PCI: 00:1f.5
1062 09:44:21.194309 scan_generic_bus for PCI: 00:1f.5 done
1063 09:44:21.200419 scan_bus: scanning of bus PCI: 00:1f.5 took 10174 usecs
1064 09:44:21.207471 scan_bus: scanning of bus DOMAIN: 0000 took 604750 usecs
1065 09:44:21.210248 scan_static_bus for Root Device done
1066 09:44:21.213848 scan_bus: scanning of bus Root Device took 624649 usecs
1067 09:44:21.217704 done
1068 09:44:21.220667 Chrome EC: UHEPI supported
1069 09:44:21.224112 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 09:44:21.231247 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 09:44:21.237362 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 09:44:21.244276 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 09:44:21.247166 SPI flash protection: WPSW=0 SRP0=0
1074 09:44:21.253586 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 09:44:21.257423 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1076 09:44:21.261386 found VGA at PCI: 00:02.0
1077 09:44:21.263623 Setting up VGA for PCI: 00:02.0
1078 09:44:21.270023 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 09:44:21.273408 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 09:44:21.276791 Allocating resources...
1081 09:44:21.280747 Reading resources...
1082 09:44:21.283674 Root Device read_resources bus 0 link: 0
1083 09:44:21.286869 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 09:44:21.293548 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 09:44:21.296592 DOMAIN: 0000 read_resources bus 0 link: 0
1086 09:44:21.303951 PCI: 00:14.0 read_resources bus 0 link: 0
1087 09:44:21.307430 USB0 port 0 read_resources bus 0 link: 0
1088 09:44:21.315920 USB0 port 0 read_resources bus 0 link: 0 done
1089 09:44:21.318619 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 09:44:21.326139 PCI: 00:15.0 read_resources bus 1 link: 0
1091 09:44:21.329643 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 09:44:21.335699 PCI: 00:15.1 read_resources bus 2 link: 0
1093 09:44:21.340081 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 09:44:21.346695 PCI: 00:19.0 read_resources bus 3 link: 0
1095 09:44:21.353623 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 09:44:21.357064 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 09:44:21.363506 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 09:44:21.367013 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 09:44:21.373951 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 09:44:21.377378 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 09:44:21.383351 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 09:44:21.386638 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 09:44:21.393612 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 09:44:21.399816 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 09:44:21.403496 Root Device read_resources bus 0 link: 0 done
1106 09:44:21.406216 Done reading resources.
1107 09:44:21.409632 Show resources in subtree (Root Device)...After reading.
1108 09:44:21.413435
1109 09:44:21.416434 Root Device child on link 0 CPU_CLUSTER: 0
1110 09:44:21.419344 CPU_CLUSTER: 0 child on link 0 APIC: 00
1111 09:44:21.419890 APIC: 00
1112 09:44:21.422607 APIC: 03
1113 09:44:21.423082 APIC: 05
1114 09:44:21.426718 APIC: 01
1115 09:44:21.427193 APIC: 02
1116 09:44:21.427566 APIC: 04
1117 09:44:21.429354 APIC: 07
1118 09:44:21.429872 APIC: 06
1119 09:44:21.432614 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1120 09:44:21.489256 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1121 09:44:21.489930 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1122 09:44:21.490752 PCI: 00:00.0
1123 09:44:21.491149 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1124 09:44:21.491510 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1125 09:44:21.492211 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1126 09:44:21.533273 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1127 09:44:21.534282 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1128 09:44:21.534695 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1129 09:44:21.535422 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1130 09:44:21.535827 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1131 09:44:21.538739 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1132 09:44:21.548493 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1133 09:44:21.558637 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1134 09:44:21.568165 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1135 09:44:21.578046 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1136 09:44:21.587969 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1137 09:44:21.594202 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1138 09:44:21.604467 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1139 09:44:21.607666 PCI: 00:02.0
1140 09:44:21.617341 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 09:44:21.627455 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 09:44:21.633984 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 09:44:21.638294 PCI: 00:04.0
1144 09:44:21.638878 PCI: 00:08.0
1145 09:44:21.647500 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1146 09:44:21.650651 PCI: 00:12.0
1147 09:44:21.660736 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 09:44:21.663997 PCI: 00:14.0 child on link 0 USB0 port 0
1149 09:44:21.674403 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1150 09:44:21.680604 USB0 port 0 child on link 0 USB2 port 0
1151 09:44:21.681188 USB2 port 0
1152 09:44:21.684288 USB2 port 1
1153 09:44:21.684865 USB2 port 2
1154 09:44:21.687472 USB2 port 3
1155 09:44:21.688052 USB2 port 5
1156 09:44:21.690277 USB2 port 6
1157 09:44:21.690786 USB2 port 9
1158 09:44:21.693734 USB3 port 0
1159 09:44:21.694218 USB3 port 1
1160 09:44:21.697104 USB3 port 2
1161 09:44:21.697711 USB3 port 3
1162 09:44:21.700636 USB3 port 4
1163 09:44:21.701119 PCI: 00:14.2
1164 09:44:21.710879 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1165 09:44:21.720645 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1166 09:44:21.724364 PCI: 00:14.3
1167 09:44:21.733609 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 09:44:21.736462 PCI: 00:15.0 child on link 0 I2C: 01:15
1169 09:44:21.746957 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 09:44:21.750121 I2C: 01:15
1171 09:44:21.753963 PCI: 00:15.1 child on link 0 I2C: 02:5d
1172 09:44:21.763742 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1173 09:44:21.764333 I2C: 02:5d
1174 09:44:21.766304 GENERIC: 0.0
1175 09:44:21.766880 PCI: 00:16.0
1176 09:44:21.777040 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 09:44:21.780456 PCI: 00:17.0
1178 09:44:21.789863 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1179 09:44:21.796508 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1180 09:44:21.806551 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1181 09:44:21.813734 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1182 09:44:21.823389 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1183 09:44:21.833583 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1184 09:44:21.836236 PCI: 00:19.0 child on link 0 I2C: 03:1a
1185 09:44:21.846313 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 09:44:21.846921 I2C: 03:1a
1187 09:44:21.849114 I2C: 03:38
1188 09:44:21.849629 I2C: 03:39
1189 09:44:21.852629 I2C: 03:3a
1190 09:44:21.853203 I2C: 03:3b
1191 09:44:21.859619 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1192 09:44:21.866139 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 09:44:21.875682 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 09:44:21.885390 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 09:44:21.889430 PCI: 01:00.0
1196 09:44:21.899039 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 09:44:21.899609 PCI: 00:1e.0
1198 09:44:21.908807 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1199 09:44:21.919061 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1200 09:44:21.925979 PCI: 00:1e.2 child on link 0 SPI: 00
1201 09:44:21.935536 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 09:44:21.936109 SPI: 00
1203 09:44:21.938864 PCI: 00:1e.3 child on link 0 SPI: 01
1204 09:44:21.948784 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 09:44:21.949372 SPI: 01
1206 09:44:21.952043
1207 09:44:21.955784 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1208 09:44:21.963337 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1209 09:44:21.972074 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1210 09:44:21.975490 PNP: 0c09.0
1211 09:44:21.982344 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1212 09:44:21.985269 PCI: 00:1f.3
1213 09:44:21.995087 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 09:44:22.006065 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1215 09:44:22.006706 PCI: 00:1f.4
1216 09:44:22.015287 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1217 09:44:22.025179 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1218 09:44:22.025978 PCI: 00:1f.5
1219 09:44:22.028471
1220 09:44:22.035149 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1221 09:44:22.041794 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1222 09:44:22.048119 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1223 09:44:22.055168 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1224 09:44:22.058054 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1225 09:44:22.061693 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1226 09:44:22.064949 PCI: 00:17.0 18 * [0x60 - 0x67] io
1227 09:44:22.068582 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1228 09:44:22.078005 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1229 09:44:22.085091 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1230 09:44:22.091678 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1231 09:44:22.097921 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1232 09:44:22.101585
1233 09:44:22.107558 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1234 09:44:22.111842 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1235 09:44:22.118075 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1236 09:44:22.121568 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1237 09:44:22.127775 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1238 09:44:22.130896 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1239 09:44:22.137839 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1240 09:44:22.141510 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1241 09:44:22.147623 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1242 09:44:22.150975 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1243 09:44:22.157686 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1244 09:44:22.160789 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1245 09:44:22.167776 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1246 09:44:22.171042 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1247 09:44:22.177280 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1248 09:44:22.180550 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1249 09:44:22.187564 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1250 09:44:22.190601 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1251 09:44:22.197234 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1252 09:44:22.200410 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1253 09:44:22.203669 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1254 09:44:22.210815 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1255 09:44:22.213465 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1256 09:44:22.220631 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1257 09:44:22.224004 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1258 09:44:22.230004 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1259 09:44:22.236800 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1260 09:44:22.240263 avoid_fixed_resources: DOMAIN: 0000
1261 09:44:22.243332
1262 09:44:22.246540 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1263 09:44:22.253392 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1264 09:44:22.259945 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1265 09:44:22.269650 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1266 09:44:22.276805 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1267 09:44:22.282940 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1268 09:44:22.292860 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1269 09:44:22.299845 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1270 09:44:22.306774 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1271 09:44:22.313269 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1272 09:44:22.316403
1273 09:44:22.323547 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1274 09:44:22.329574 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1275 09:44:22.333126 Setting resources...
1276 09:44:22.336981 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1277 09:44:22.339124
1278 09:44:22.342903 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 09:44:22.346134 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 09:44:22.349348 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 09:44:22.352722 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 09:44:22.359001 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 09:44:22.366129 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 09:44:22.372459 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 09:44:22.379428 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 09:44:22.385978 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 09:44:22.389149 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 09:44:22.396268 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 09:44:22.398880 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 09:44:22.405839 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 09:44:22.409435 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 09:44:22.415664 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 09:44:22.418976 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 09:44:22.425434 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 09:44:22.428827 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 09:44:22.434971 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 09:44:22.438667 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 09:44:22.445704 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 09:44:22.448663 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 09:44:22.451823 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 09:44:22.458652 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 09:44:22.461965 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 09:44:22.468639 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 09:44:22.471390 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 09:44:22.478345 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 09:44:22.482096 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 09:44:22.488462 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 09:44:22.491576 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 09:44:22.498357 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 09:44:22.508549 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 09:44:22.515044 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 09:44:22.521655 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 09:44:22.528315 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 09:44:22.534987 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 09:44:22.538166 Root Device assign_resources, bus 0 link: 0
1316 09:44:22.544904 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 09:44:22.551485 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 09:44:22.561012 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 09:44:22.567590 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 09:44:22.574791 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 09:44:22.585195 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 09:44:22.591403 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 09:44:22.597768 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 09:44:22.602356 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 09:44:22.611294 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 09:44:22.617844 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 09:44:22.628144 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 09:44:22.634305 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 09:44:22.640858 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 09:44:22.644120 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 09:44:22.650526 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 09:44:22.653969
1333 09:44:22.657348 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 09:44:22.660932 PCI: 00:15.1 assign_resources, bus 2 link: 0
1335 09:44:22.670625 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1336 09:44:22.677227 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1337 09:44:22.687101 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1338 09:44:22.693818 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1339 09:44:22.700625 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1340 09:44:22.710334 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1341 09:44:22.716935 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1342 09:44:22.723811 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1343 09:44:22.730327 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 09:44:22.733871 PCI: 00:19.0 assign_resources, bus 3 link: 0
1345 09:44:22.744062 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1346 09:44:22.752905 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1347 09:44:22.760075 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1348 09:44:22.763179 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 09:44:22.766022
1350 09:44:22.772650 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1351 09:44:22.776107 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 09:44:22.779719
1353 09:44:22.785983 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1354 09:44:22.795969 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1355 09:44:22.799371 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1356 09:44:22.802397 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1357 09:44:22.812327 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1358 09:44:22.815922 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1359 09:44:22.822450 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1360 09:44:22.826081 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1361 09:44:22.832445 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1362 09:44:22.835701 LPC: Trying to open IO window from 800 size 1ff
1363 09:44:22.845256 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1364 09:44:22.852130 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1365 09:44:22.861987 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1366 09:44:22.868412 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1367 09:44:22.871705 DOMAIN: 0000 assign_resources, bus 0 link: 0
1368 09:44:22.878514 Root Device assign_resources, bus 0 link: 0
1369 09:44:22.881934 Done setting resources.
1370 09:44:22.885443 Show resources in subtree (Root Device)...After assigning values.
1371 09:44:22.888645
1372 09:44:22.891819 Root Device child on link 0 CPU_CLUSTER: 0
1373 09:44:22.895032 CPU_CLUSTER: 0 child on link 0 APIC: 00
1374 09:44:22.895646 APIC: 00
1375 09:44:22.898768 APIC: 03
1376 09:44:22.899250 APIC: 05
1377 09:44:22.901907 APIC: 01
1378 09:44:22.902388 APIC: 02
1379 09:44:22.902795 APIC: 04
1380 09:44:22.904982 APIC: 07
1381 09:44:22.905462 APIC: 06
1382 09:44:22.908514 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1383 09:44:22.911929
1384 09:44:22.918576 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1385 09:44:22.931669 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1386 09:44:22.932250 PCI: 00:00.0
1387 09:44:22.941377 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1388 09:44:22.951707 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1389 09:44:22.961170 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1390 09:44:22.970995 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1391 09:44:22.981193 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1392 09:44:22.987638 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1393 09:44:22.997439 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1394 09:44:23.007675 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1395 09:44:23.017816 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1396 09:44:23.024282 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1397 09:44:23.034176 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1398 09:44:23.044413 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1399 09:44:23.054412 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1400 09:44:23.064088 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1401 09:44:23.073392 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1402 09:44:23.083603 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1403 09:44:23.084188 PCI: 00:02.0
1404 09:44:23.093596 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1405 09:44:23.106509 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1406 09:44:23.113782 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1407 09:44:23.116589 PCI: 00:04.0
1408 09:44:23.117164 PCI: 00:08.0
1409 09:44:23.129894 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1410 09:44:23.130478 PCI: 00:12.0
1411 09:44:23.139478 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1412 09:44:23.143091 PCI: 00:14.0 child on link 0 USB0 port 0
1413 09:44:23.155925 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1414 09:44:23.159545 USB0 port 0 child on link 0 USB2 port 0
1415 09:44:23.160032 USB2 port 0
1416 09:44:23.162668 USB2 port 1
1417 09:44:23.166201 USB2 port 2
1418 09:44:23.166774 USB2 port 3
1419 09:44:23.169025 USB2 port 5
1420 09:44:23.169548 USB2 port 6
1421 09:44:23.173198 USB2 port 9
1422 09:44:23.173865 USB3 port 0
1423 09:44:23.175939 USB3 port 1
1424 09:44:23.176416 USB3 port 2
1425 09:44:23.179027 USB3 port 3
1426 09:44:23.179527 USB3 port 4
1427 09:44:23.182718 PCI: 00:14.2
1428 09:44:23.192213 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1429 09:44:23.202007 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1430 09:44:23.205367 PCI: 00:14.3
1431 09:44:23.215793 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1432 09:44:23.218851 PCI: 00:15.0 child on link 0 I2C: 01:15
1433 09:44:23.228894 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1434 09:44:23.232093 I2C: 01:15
1435 09:44:23.235605 PCI: 00:15.1 child on link 0 I2C: 02:5d
1436 09:44:23.244931 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1437 09:44:23.245523 I2C: 02:5d
1438 09:44:23.249098 GENERIC: 0.0
1439 09:44:23.249707 PCI: 00:16.0
1440 09:44:23.251770
1441 09:44:23.261572 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1442 09:44:23.262138 PCI: 00:17.0
1443 09:44:23.271668 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1444 09:44:23.281914 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1445 09:44:23.291521 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1446 09:44:23.301205 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1447 09:44:23.311273 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1448 09:44:23.321922 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1449 09:44:23.324968 PCI: 00:19.0 child on link 0 I2C: 03:1a
1450 09:44:23.334196 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1451 09:44:23.337468 I2C: 03:1a
1452 09:44:23.337989 I2C: 03:38
1453 09:44:23.338369 I2C: 03:39
1454 09:44:23.341234 I2C: 03:3a
1455 09:44:23.341853 I2C: 03:3b
1456 09:44:23.348259 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1457 09:44:23.357600 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1458 09:44:23.367848 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1459 09:44:23.377238 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1460 09:44:23.377885 PCI: 01:00.0
1461 09:44:23.387517 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1462 09:44:23.390304 PCI: 00:1e.0
1463 09:44:23.400585 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1464 09:44:23.410618 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1465 09:44:23.417516 PCI: 00:1e.2 child on link 0 SPI: 00
1466 09:44:23.427515 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1467 09:44:23.428103 SPI: 00
1468 09:44:23.430489 PCI: 00:1e.3 child on link 0 SPI: 01
1469 09:44:23.440612 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1470 09:44:23.443480 SPI: 01
1471 09:44:23.446925 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1472 09:44:23.456880 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1473 09:44:23.463334 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1474 09:44:23.466677 PNP: 0c09.0
1475 09:44:23.476603 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1476 09:44:23.477234 PCI: 00:1f.3
1477 09:44:23.486883 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1478 09:44:23.496211 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1479 09:44:23.499490 PCI: 00:1f.4
1480 09:44:23.509531 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1481 09:44:23.519522 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1482 09:44:23.520106 PCI: 00:1f.5
1483 09:44:23.529567 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1484 09:44:23.532447 Done allocating resources.
1485 09:44:23.539007 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1486 09:44:23.543021 Enabling resources...
1487 09:44:23.545974 PCI: 00:00.0 subsystem <- 8086/9b61
1488 09:44:23.549562 PCI: 00:00.0 cmd <- 06
1489 09:44:23.552870 PCI: 00:02.0 subsystem <- 8086/9b41
1490 09:44:23.556072 PCI: 00:02.0 cmd <- 03
1491 09:44:23.556647 PCI: 00:08.0 cmd <- 06
1492 09:44:23.562538 PCI: 00:12.0 subsystem <- 8086/02f9
1493 09:44:23.563131 PCI: 00:12.0 cmd <- 02
1494 09:44:23.566201 PCI: 00:14.0 subsystem <- 8086/02ed
1495 09:44:23.569666 PCI: 00:14.0 cmd <- 02
1496 09:44:23.572501 PCI: 00:14.2 cmd <- 02
1497 09:44:23.575647 PCI: 00:14.3 subsystem <- 8086/02f0
1498 09:44:23.579114 PCI: 00:14.3 cmd <- 02
1499 09:44:23.583312 PCI: 00:15.0 subsystem <- 8086/02e8
1500 09:44:23.586346 PCI: 00:15.0 cmd <- 02
1501 09:44:23.588759 PCI: 00:15.1 subsystem <- 8086/02e9
1502 09:44:23.593012 PCI: 00:15.1 cmd <- 02
1503 09:44:23.595748 PCI: 00:16.0 subsystem <- 8086/02e0
1504 09:44:23.598637 PCI: 00:16.0 cmd <- 02
1505 09:44:23.602152 PCI: 00:17.0 subsystem <- 8086/02d3
1506 09:44:23.602657 PCI: 00:17.0 cmd <- 03
1507 09:44:23.609794 PCI: 00:19.0 subsystem <- 8086/02c5
1508 09:44:23.610372 PCI: 00:19.0 cmd <- 02
1509 09:44:23.612265 PCI: 00:1d.0 bridge ctrl <- 0013
1510 09:44:23.616656 PCI: 00:1d.0 subsystem <- 8086/02b0
1511 09:44:23.619324
1512 09:44:23.619900 PCI: 00:1d.0 cmd <- 06
1513 09:44:23.623005 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 09:44:23.625661 PCI: 00:1e.0 cmd <- 06
1515 09:44:23.628839 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 09:44:23.631845 PCI: 00:1e.2 cmd <- 06
1517 09:44:23.635544 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 09:44:23.638856 PCI: 00:1e.3 cmd <- 02
1519 09:44:23.641858 PCI: 00:1f.0 subsystem <- 8086/0284
1520 09:44:23.645663 PCI: 00:1f.0 cmd <- 407
1521 09:44:23.648787 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 09:44:23.652374 PCI: 00:1f.3 cmd <- 02
1523 09:44:23.655391 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 09:44:23.658621 PCI: 00:1f.4 cmd <- 03
1525 09:44:23.662065 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 09:44:23.665028 PCI: 00:1f.5 cmd <- 406
1527 09:44:23.672972 PCI: 01:00.0 cmd <- 02
1528 09:44:23.678186 done.
1529 09:44:23.690101 ME: Version: 14.0.39.1367
1530 09:44:23.696886 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1531 09:44:23.699679 Initializing devices...
1532 09:44:23.700196 Root Device init ...
1533 09:44:23.706741 Chrome EC: Set SMI mask to 0x0000000000000000
1534 09:44:23.710171 Chrome EC: clear events_b mask to 0x0000000000000000
1535 09:44:23.716578 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 09:44:23.723137 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 09:44:23.730370 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 09:44:23.734062 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 09:44:23.736371 Root Device init finished in 35239 usecs
1540 09:44:23.740629 CPU_CLUSTER: 0 init ...
1541 09:44:23.743452 CPU_CLUSTER: 0 init finished in 2448 usecs
1542 09:44:23.746728
1543 09:44:23.751412 PCI: 00:00.0 init ...
1544 09:44:23.754386 CPU TDP: 15 Watts
1545 09:44:23.757619 CPU PL2 = 64 Watts
1546 09:44:23.761137 PCI: 00:00.0 init finished in 7077 usecs
1547 09:44:23.764028 PCI: 00:02.0 init ...
1548 09:44:23.767665 PCI: 00:02.0 init finished in 2255 usecs
1549 09:44:23.770520 PCI: 00:08.0 init ...
1550 09:44:23.774001 PCI: 00:08.0 init finished in 2255 usecs
1551 09:44:23.777166 PCI: 00:12.0 init ...
1552 09:44:23.780729 PCI: 00:12.0 init finished in 2253 usecs
1553 09:44:23.784239 PCI: 00:14.0 init ...
1554 09:44:23.787239 PCI: 00:14.0 init finished in 2254 usecs
1555 09:44:23.790969 PCI: 00:14.2 init ...
1556 09:44:23.793782 PCI: 00:14.2 init finished in 2245 usecs
1557 09:44:23.796879 PCI: 00:14.3 init ...
1558 09:44:23.801081 PCI: 00:14.3 init finished in 2270 usecs
1559 09:44:23.803527 PCI: 00:15.0 init ...
1560 09:44:23.806953 DW I2C bus 0 at 0xd121f000 (400 KHz)
1561 09:44:23.810175 PCI: 00:15.0 init finished in 5981 usecs
1562 09:44:23.814212 PCI: 00:15.1 init ...
1563 09:44:23.817654 DW I2C bus 1 at 0xd1220000 (400 KHz)
1564 09:44:23.821069 PCI: 00:15.1 init finished in 5970 usecs
1565 09:44:23.823555
1566 09:44:23.824049 PCI: 00:16.0 init ...
1567 09:44:23.830386 PCI: 00:16.0 init finished in 2254 usecs
1568 09:44:23.831003 PCI: 00:19.0 init ...
1569 09:44:23.833705
1570 09:44:23.837579 DW I2C bus 4 at 0xd1222000 (400 KHz)
1571 09:44:23.840398 PCI: 00:19.0 init finished in 5979 usecs
1572 09:44:23.844473 PCI: 00:1d.0 init ...
1573 09:44:23.846807 Initializing PCH PCIe bridge.
1574 09:44:23.849922 PCI: 00:1d.0 init finished in 5288 usecs
1575 09:44:23.853378 PCI: 00:1f.0 init ...
1576 09:44:23.856603 IOAPIC: Initializing IOAPIC at 0xfec00000
1577 09:44:23.863336 IOAPIC: Bootstrap Processor Local APIC = 0x00
1578 09:44:23.863926 IOAPIC: ID = 0x02
1579 09:44:23.867153 IOAPIC: Dumping registers
1580 09:44:23.869753 reg 0x0000: 0x02000000
1581 09:44:23.873472 reg 0x0001: 0x00770020
1582 09:44:23.874098 reg 0x0002: 0x00000000
1583 09:44:23.879962 PCI: 00:1f.0 init finished in 23565 usecs
1584 09:44:23.882925 PCI: 00:1f.4 init ...
1585 09:44:23.886111 PCI: 00:1f.4 init finished in 2263 usecs
1586 09:44:23.897320 PCI: 01:00.0 init ...
1587 09:44:23.900335 PCI: 01:00.0 init finished in 2253 usecs
1588 09:44:23.904866 PNP: 0c09.0 init ...
1589 09:44:23.908326 Google Chrome EC uptime: 11.097 seconds
1590 09:44:23.914933 Google Chrome AP resets since EC boot: 0
1591 09:44:23.917455 Google Chrome most recent AP reset causes:
1592 09:44:23.924640 Google Chrome EC reset flags at last EC boot: reset-pin
1593 09:44:23.928165 PNP: 0c09.0 init finished in 20583 usecs
1594 09:44:23.931200 Devices initialized
1595 09:44:23.931759 Show all devs... After init.
1596 09:44:23.934720
1597 09:44:23.935295 Root Device: enabled 1
1598 09:44:23.937555 CPU_CLUSTER: 0: enabled 1
1599 09:44:23.941158 DOMAIN: 0000: enabled 1
1600 09:44:23.941671 APIC: 00: enabled 1
1601 09:44:23.944425 PCI: 00:00.0: enabled 1
1602 09:44:23.947817 PCI: 00:02.0: enabled 1
1603 09:44:23.950867 PCI: 00:04.0: enabled 0
1604 09:44:23.951348 PCI: 00:05.0: enabled 0
1605 09:44:23.954306 PCI: 00:12.0: enabled 1
1606 09:44:23.958390 PCI: 00:12.5: enabled 0
1607 09:44:23.958971 PCI: 00:12.6: enabled 0
1608 09:44:23.961371
1609 09:44:23.961978 PCI: 00:14.0: enabled 1
1610 09:44:23.964554 PCI: 00:14.1: enabled 0
1611 09:44:23.967661 PCI: 00:14.3: enabled 1
1612 09:44:23.968244 PCI: 00:14.5: enabled 0
1613 09:44:23.970704 PCI: 00:15.0: enabled 1
1614 09:44:23.974479 PCI: 00:15.1: enabled 1
1615 09:44:23.977775 PCI: 00:15.2: enabled 0
1616 09:44:23.978354 PCI: 00:15.3: enabled 0
1617 09:44:23.980758 PCI: 00:16.0: enabled 1
1618 09:44:23.984035 PCI: 00:16.1: enabled 0
1619 09:44:23.988402 PCI: 00:16.2: enabled 0
1620 09:44:23.988984 PCI: 00:16.3: enabled 0
1621 09:44:23.990409 PCI: 00:16.4: enabled 0
1622 09:44:23.993687 PCI: 00:16.5: enabled 0
1623 09:44:23.997185 PCI: 00:17.0: enabled 1
1624 09:44:23.997797 PCI: 00:19.0: enabled 1
1625 09:44:24.000531 PCI: 00:19.1: enabled 0
1626 09:44:24.003822 PCI: 00:19.2: enabled 0
1627 09:44:24.004309 PCI: 00:1a.0: enabled 0
1628 09:44:24.007062
1629 09:44:24.007569 PCI: 00:1c.0: enabled 0
1630 09:44:24.011206 PCI: 00:1c.1: enabled 0
1631 09:44:24.013725 PCI: 00:1c.2: enabled 0
1632 09:44:24.014212 PCI: 00:1c.3: enabled 0
1633 09:44:24.017450 PCI: 00:1c.4: enabled 0
1634 09:44:24.020321 PCI: 00:1c.5: enabled 0
1635 09:44:24.023923 PCI: 00:1c.6: enabled 0
1636 09:44:24.024510 PCI: 00:1c.7: enabled 0
1637 09:44:24.026823 PCI: 00:1d.0: enabled 1
1638 09:44:24.030115 PCI: 00:1d.1: enabled 0
1639 09:44:24.033463 PCI: 00:1d.2: enabled 0
1640 09:44:24.033964 PCI: 00:1d.3: enabled 0
1641 09:44:24.037429 PCI: 00:1d.4: enabled 0
1642 09:44:24.040642 PCI: 00:1d.5: enabled 0
1643 09:44:24.043846 PCI: 00:1e.0: enabled 1
1644 09:44:24.044424 PCI: 00:1e.1: enabled 0
1645 09:44:24.046887 PCI: 00:1e.2: enabled 1
1646 09:44:24.050384 PCI: 00:1e.3: enabled 1
1647 09:44:24.050992 PCI: 00:1f.0: enabled 1
1648 09:44:24.053424
1649 09:44:24.054025 PCI: 00:1f.1: enabled 0
1650 09:44:24.056695 PCI: 00:1f.2: enabled 0
1651 09:44:24.060255 PCI: 00:1f.3: enabled 1
1652 09:44:24.060832 PCI: 00:1f.4: enabled 1
1653 09:44:24.063229 PCI: 00:1f.5: enabled 1
1654 09:44:24.066699 PCI: 00:1f.6: enabled 0
1655 09:44:24.069980 USB0 port 0: enabled 1
1656 09:44:24.070568 I2C: 01:15: enabled 1
1657 09:44:24.073274 I2C: 02:5d: enabled 1
1658 09:44:24.076251 GENERIC: 0.0: enabled 1
1659 09:44:24.076728 I2C: 03:1a: enabled 1
1660 09:44:24.079681 I2C: 03:38: enabled 1
1661 09:44:24.083149 I2C: 03:39: enabled 1
1662 09:44:24.083823 I2C: 03:3a: enabled 1
1663 09:44:24.086522 I2C: 03:3b: enabled 1
1664 09:44:24.090027 PCI: 00:00.0: enabled 1
1665 09:44:24.090662 SPI: 00: enabled 1
1666 09:44:24.093059 SPI: 01: enabled 1
1667 09:44:24.096345 PNP: 0c09.0: enabled 1
1668 09:44:24.096817 USB2 port 0: enabled 1
1669 09:44:24.099815 USB2 port 1: enabled 1
1670 09:44:24.103142 USB2 port 2: enabled 0
1671 09:44:24.105847 USB2 port 3: enabled 0
1672 09:44:24.106342 USB2 port 5: enabled 0
1673 09:44:24.109791 USB2 port 6: enabled 1
1674 09:44:24.113037 USB2 port 9: enabled 1
1675 09:44:24.113662 USB3 port 0: enabled 1
1676 09:44:24.117091 USB3 port 1: enabled 1
1677 09:44:24.119448 USB3 port 2: enabled 1
1678 09:44:24.120028 USB3 port 3: enabled 1
1679 09:44:24.122680
1680 09:44:24.123164 USB3 port 4: enabled 0
1681 09:44:24.125971 APIC: 03: enabled 1
1682 09:44:24.126451 APIC: 05: enabled 1
1683 09:44:24.129543 APIC: 01: enabled 1
1684 09:44:24.133269 APIC: 02: enabled 1
1685 09:44:24.133789 APIC: 04: enabled 1
1686 09:44:24.135826 APIC: 07: enabled 1
1687 09:44:24.139484 APIC: 06: enabled 1
1688 09:44:24.140069 PCI: 00:08.0: enabled 1
1689 09:44:24.142724 PCI: 00:14.2: enabled 1
1690 09:44:24.146075 PCI: 01:00.0: enabled 1
1691 09:44:24.149843 Disabling ACPI via APMC:
1692 09:44:24.152914 done.
1693 09:44:24.156279 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1694 09:44:24.159339 ELOG: NV offset 0xaf0000 size 0x4000
1695 09:44:24.166091 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1696 09:44:24.173276 ELOG: Event(17) added with size 13 at 2023-01-19 09:44:24 UTC
1697 09:44:24.179886 ELOG: Event(92) added with size 9 at 2023-01-19 09:44:24 UTC
1698 09:44:24.186360 ELOG: Event(93) added with size 9 at 2023-01-19 09:44:24 UTC
1699 09:44:24.192985 ELOG: Event(9A) added with size 9 at 2023-01-19 09:44:24 UTC
1700 09:44:24.199774 ELOG: Event(9E) added with size 10 at 2023-01-19 09:44:24 UTC
1701 09:44:24.205947 ELOG: Event(16) added with size 11 at 2023-01-19 09:44:24 UTC
1702 09:44:24.209610 Erasing flash addr af0000 + 4 KiB
1703 09:44:24.285433 ELOG: Event(9F) added with size 14 at 2023-01-19 09:44:24 UTC
1704 09:44:24.292206 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 67
1705 09:44:24.298472 ELOG: Event(A1) added with size 10 at 2023-01-19 09:44:24 UTC
1706 09:44:24.305150 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1707 09:44:24.311753 ELOG: Event(A0) added with size 9 at 2023-01-19 09:44:24 UTC
1708 09:44:24.318510 elog_add_boot_reason: Logged dev mode boot
1709 09:44:24.319003 Finalize devices...
1710 09:44:24.321729 PCI: 00:17.0 final
1711 09:44:24.322216 Devices finalized
1712 09:44:24.328580 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1713 09:44:24.334695 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1714 09:44:24.338273 ME: HFSTS1 : 0x90000245
1715 09:44:24.341841 ME: HFSTS2 : 0x3B850126
1716 09:44:24.345082 ME: HFSTS3 : 0x00000020
1717 09:44:24.352066 ME: HFSTS4 : 0x00004800
1718 09:44:24.354984 ME: HFSTS5 : 0x00000000
1719 09:44:24.359483 ME: HFSTS6 : 0x40400006
1720 09:44:24.361514 ME: Manufacturing Mode : NO
1721 09:44:24.365259 ME: FW Partition Table : OK
1722 09:44:24.368298 ME: Bringup Loader Failure : NO
1723 09:44:24.371849 ME: Firmware Init Complete : YES
1724 09:44:24.374780 ME: Boot Options Present : NO
1725 09:44:24.378183 ME: Update In Progress : NO
1726 09:44:24.381195 ME: D0i3 Support : YES
1727 09:44:24.384461 ME: Low Power State Enabled : NO
1728 09:44:24.388251 ME: CPU Replaced : NO
1729 09:44:24.390694 ME: CPU Replacement Valid : YES
1730 09:44:24.394509 ME: Current Working State : 5
1731 09:44:24.397606 ME: Current Operation State : 1
1732 09:44:24.400620 ME: Current Operation Mode : 0
1733 09:44:24.404651 ME: Error Code : 0
1734 09:44:24.407655 ME: CPU Debug Disabled : YES
1735 09:44:24.410555 ME: TXT Support : NO
1736 09:44:24.417597 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1737 09:44:24.420785 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1738 09:44:24.424872 CBFS @ c08000 size 3f8000
1739 09:44:24.431076 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1740 09:44:24.434030 CBFS: Locating 'fallback/dsdt.aml'
1741 09:44:24.437521 CBFS: Found @ offset 10bb80 size 3fa5
1742 09:44:24.444186 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1743 09:44:24.444768 CBFS @ c08000 size 3f8000
1744 09:44:24.447539
1745 09:44:24.450754 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1746 09:44:24.454348 CBFS: Locating 'fallback/slic'
1747 09:44:24.459904 CBFS: 'fallback/slic' not found.
1748 09:44:24.465433 ACPI: Writing ACPI tables at 99b3e000.
1749 09:44:24.466057 ACPI: * FACS
1750 09:44:24.468938 ACPI: * DSDT
1751 09:44:24.471897 Ramoops buffer: 0x100000@0x99a3d000.
1752 09:44:24.475048 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1753 09:44:24.481376 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1754 09:44:24.485374 Google Chrome EC: version:
1755 09:44:24.487977 ro: helios_v2.0.2659-56403530b
1756 09:44:24.491103 rw: helios_v2.0.2849-c41de27e7d
1757 09:44:24.491588 running image: 1
1758 09:44:24.495524 ACPI: * FADT
1759 09:44:24.496006 SCI is IRQ9
1760 09:44:24.498880 ACPI: added table 1/32, length now 40
1761 09:44:24.502067
1762 09:44:24.502577 ACPI: * SSDT
1763 09:44:24.505577 Found 1 CPU(s) with 8 core(s) each.
1764 09:44:24.508621 Error: Could not locate 'wifi_sar' in VPD.
1765 09:44:24.515584 Checking CBFS for default SAR values
1766 09:44:24.519010 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1767 09:44:24.522431 CBFS @ c08000 size 3f8000
1768 09:44:24.528867 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1769 09:44:24.532422 CBFS: Locating 'wifi_sar_defaults.hex'
1770 09:44:24.535201 CBFS: Found @ offset 5fac0 size 77
1771 09:44:24.538690 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1772 09:44:24.542333 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1773 09:44:24.545599
1774 09:44:24.548962 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1775 09:44:24.556062 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1776 09:44:24.558715 failed to find key in VPD: dsm_calib_r0_0
1777 09:44:24.568471 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1778 09:44:24.572057 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1779 09:44:24.574998 failed to find key in VPD: dsm_calib_r0_1
1780 09:44:24.585097 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1781 09:44:24.591522 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1782 09:44:24.594675 failed to find key in VPD: dsm_calib_r0_2
1783 09:44:24.604935 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1784 09:44:24.607808 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1785 09:44:24.614831 failed to find key in VPD: dsm_calib_r0_3
1786 09:44:24.621707 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1787 09:44:24.628281 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1788 09:44:24.632421 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1789 09:44:24.634733 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1790 09:44:24.638389 EC returned error result code 1
1791 09:44:24.642355 EC returned error result code 1
1792 09:44:24.646196 EC returned error result code 1
1793 09:44:24.652776 PS2K: Bad resp from EC. Vivaldi disabled!
1794 09:44:24.656288 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1795 09:44:24.662768 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1796 09:44:24.669326 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1797 09:44:24.672647 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1798 09:44:24.680005 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1799 09:44:24.685860 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1800 09:44:24.692057 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1801 09:44:24.695350 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1802 09:44:24.702020 ACPI: added table 2/32, length now 44
1803 09:44:24.702602 ACPI: * MCFG
1804 09:44:24.705229 ACPI: added table 3/32, length now 48
1805 09:44:24.708503 ACPI: * TPM2
1806 09:44:24.712056 TPM2 log created at 99a2d000
1807 09:44:24.715411 ACPI: added table 4/32, length now 52
1808 09:44:24.716008 ACPI: * MADT
1809 09:44:24.718237 SCI is IRQ9
1810 09:44:24.721986 ACPI: added table 5/32, length now 56
1811 09:44:24.722468 current = 99b43ac0
1812 09:44:24.725225 ACPI: * DMAR
1813 09:44:24.728861 ACPI: added table 6/32, length now 60
1814 09:44:24.732288 ACPI: * IGD OpRegion
1815 09:44:24.732871 GMA: Found VBT in CBFS
1816 09:44:24.735010
1817 09:44:24.735492 GMA: Found valid VBT in CBFS
1818 09:44:24.741456 ACPI: added table 7/32, length now 64
1819 09:44:24.742097 ACPI: * HPET
1820 09:44:24.745128 ACPI: added table 8/32, length now 68
1821 09:44:24.748274 ACPI: done.
1822 09:44:24.748846 ACPI tables: 31744 bytes.
1823 09:44:24.752284 smbios_write_tables: 99a2c000
1824 09:44:24.755424 EC returned error result code 3
1825 09:44:24.758357 Couldn't obtain OEM name from CBI
1826 09:44:24.762129
1827 09:44:24.762708 Create SMBIOS type 17
1828 09:44:24.765002 PCI: 00:00.0 (Intel Cannonlake)
1829 09:44:24.768078 PCI: 00:14.3 (Intel WiFi)
1830 09:44:24.771253 SMBIOS tables: 939 bytes.
1831 09:44:24.774403 Writing table forward entry at 0x00000500
1832 09:44:24.781129 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1833 09:44:24.784492 Writing coreboot table at 0x99b62000
1834 09:44:24.791117 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1835 09:44:24.794379 1. 0000000000001000-000000000009ffff: RAM
1836 09:44:24.801192 2. 00000000000a0000-00000000000fffff: RESERVED
1837 09:44:24.804762 3. 0000000000100000-0000000099a2bfff: RAM
1838 09:44:24.810809 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1839 09:44:24.814167 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1840 09:44:24.821387 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1841 09:44:24.824822 7. 000000009a000000-000000009f7fffff: RESERVED
1842 09:44:24.830730 8. 00000000e0000000-00000000efffffff: RESERVED
1843 09:44:24.834464 9. 00000000fc000000-00000000fc000fff: RESERVED
1844 09:44:24.840502 10. 00000000fe000000-00000000fe00ffff: RESERVED
1845 09:44:24.843773 11. 00000000fed10000-00000000fed17fff: RESERVED
1846 09:44:24.850781 12. 00000000fed80000-00000000fed83fff: RESERVED
1847 09:44:24.854100 13. 00000000fed90000-00000000fed91fff: RESERVED
1848 09:44:24.860775 14. 00000000feda0000-00000000feda1fff: RESERVED
1849 09:44:24.864171 15. 0000000100000000-000000045e7fffff: RAM
1850 09:44:24.866843 Graphics framebuffer located at 0xc0000000
1851 09:44:24.870975 Passing 5 GPIOs to payload:
1852 09:44:24.877450 NAME | PORT | POLARITY | VALUE
1853 09:44:24.880485 write protect | undefined | high | low
1854 09:44:24.887001 lid | undefined | high | high
1855 09:44:24.890402 power | undefined | high | low
1856 09:44:24.897076 oprom | undefined | high | low
1857 09:44:24.903732 EC in RW | 0x000000cb | high | low
1858 09:44:24.904356 Board ID: 4
1859 09:44:24.906805 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1860 09:44:24.910422 CBFS @ c08000 size 3f8000
1861 09:44:24.916745 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1862 09:44:24.923624 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1863 09:44:24.926514 coreboot table: 1492 bytes.
1864 09:44:24.930061 IMD ROOT 0. 99fff000 00001000
1865 09:44:24.933460 IMD SMALL 1. 99ffe000 00001000
1866 09:44:24.937036 FSP MEMORY 2. 99c4e000 003b0000
1867 09:44:24.940103 CONSOLE 3. 99c2e000 00020000
1868 09:44:24.943591 FMAP 4. 99c2d000 0000054e
1869 09:44:24.946682 TIME STAMP 5. 99c2c000 00000910
1870 09:44:24.950363 VBOOT WORK 6. 99c18000 00014000
1871 09:44:24.953424 MRC DATA 7. 99c16000 00001958
1872 09:44:24.957044 ROMSTG STCK 8. 99c15000 00001000
1873 09:44:24.960093 AFTER CAR 9. 99c0b000 0000a000
1874 09:44:24.963622 RAMSTAGE 10. 99baf000 0005c000
1875 09:44:24.966707 REFCODE 11. 99b7a000 00035000
1876 09:44:24.969980 SMM BACKUP 12. 99b6a000 00010000
1877 09:44:24.973523 COREBOOT 13. 99b62000 00008000
1878 09:44:24.976717 ACPI 14. 99b3e000 00024000
1879 09:44:24.979808 ACPI GNVS 15. 99b3d000 00001000
1880 09:44:24.983239 RAMOOPS 16. 99a3d000 00100000
1881 09:44:24.986397 TPM2 TCGLOG17. 99a2d000 00010000
1882 09:44:24.989735 SMBIOS 18. 99a2c000 00000800
1883 09:44:24.990311 IMD small region:
1884 09:44:24.993056 IMD ROOT 0. 99ffec00 00000400
1885 09:44:24.996300 FSP RUNTIME 1. 99ffebe0 00000004
1886 09:44:25.003051 EC HOSTEVENT 2. 99ffebc0 00000008
1887 09:44:25.005931 POWER STATE 3. 99ffeb80 00000040
1888 09:44:25.009402 ROMSTAGE 4. 99ffeb60 00000004
1889 09:44:25.013451 MEM INFO 5. 99ffe9a0 000001b9
1890 09:44:25.015947 VPD 6. 99ffe920 0000006c
1891 09:44:25.019695 MTRR: Physical address space:
1892 09:44:25.026372 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1893 09:44:25.029282 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1894 09:44:25.032846
1895 09:44:25.036193 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1896 09:44:25.043494 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1897 09:44:25.049543 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1898 09:44:25.055813 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1899 09:44:25.062926 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1900 09:44:25.065630 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 09:44:25.069094 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 09:44:25.075917 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 09:44:25.079346 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 09:44:25.081915 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 09:44:25.085468 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 09:44:25.092652 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 09:44:25.095891 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 09:44:25.098700 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 09:44:25.102141 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 09:44:25.109184 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 09:44:25.111704 call enable_fixed_mtrr()
1912 09:44:25.115473 CPU physical address size: 39 bits
1913 09:44:25.118501 MTRR: default type WB/UC MTRR counts: 6/8.
1914 09:44:25.121748 MTRR: WB selected as default type.
1915 09:44:25.128084 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1916 09:44:25.135075 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1917 09:44:25.141963 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1918 09:44:25.148518 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1919 09:44:25.151340 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1920 09:44:25.158108 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1921 09:44:25.165448 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 09:44:25.168572 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 09:44:25.171953 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 09:44:25.175395 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 09:44:25.182095 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 09:44:25.185327 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 09:44:25.188454 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 09:44:25.192077 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 09:44:25.198403 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 09:44:25.201530 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 09:44:25.205257 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 09:44:25.205902
1933 09:44:25.208045 MTRR check
1934 09:44:25.208537 call enable_fixed_mtrr()
1935 09:44:25.211305 Fixed MTRRs : Enabled
1936 09:44:25.214909 Variable MTRRs: Enabled
1937 09:44:25.215383
1938 09:44:25.218057 CPU physical address size: 39 bits
1939 09:44:25.224778 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1940 09:44:25.227996 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 09:44:25.231392 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 09:44:25.234414 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 09:44:25.241347 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 09:44:25.244956 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 09:44:25.247838 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 09:44:25.251241 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 09:44:25.258094 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 09:44:25.260940 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 09:44:25.264804 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 09:44:25.268102 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 09:44:25.274059 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 09:44:25.277593 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 09:44:25.280709 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 09:44:25.284418 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 09:44:25.291731 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 09:44:25.294734 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 09:44:25.297520 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 09:44:25.301523 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 09:44:25.307540 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 09:44:25.310690 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 09:44:25.314137 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 09:44:25.317204 call enable_fixed_mtrr()
1963 09:44:25.321168 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 09:44:25.323567 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 09:44:25.330329 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 09:44:25.333738 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 09:44:25.336947 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 09:44:25.340189 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 09:44:25.346804 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 09:44:25.350146 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 09:44:25.353646 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 09:44:25.356868 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 09:44:25.360230 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 09:44:25.363624
1975 09:44:25.366609 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 09:44:25.369954 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 09:44:25.373182 call enable_fixed_mtrr()
1978 09:44:25.377031 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 09:44:25.379863 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 09:44:25.386858 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 09:44:25.389920 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 09:44:25.393242 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 09:44:25.397351 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 09:44:25.403522 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 09:44:25.406381 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 09:44:25.409435 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 09:44:25.413070 CPU physical address size: 39 bits
1988 09:44:25.416101 call enable_fixed_mtrr()
1989 09:44:25.419338 CPU physical address size: 39 bits
1990 09:44:25.422904 call enable_fixed_mtrr()
1991 09:44:25.426007 CPU physical address size: 39 bits
1992 09:44:25.429642 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 09:44:25.433226 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 09:44:25.439284 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 09:44:25.442581 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 09:44:25.446215 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 09:44:25.449701 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 09:44:25.456374 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 09:44:25.459300 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 09:44:25.462717 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 09:44:25.466358 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 09:44:25.473651 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 09:44:25.476257 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 09:44:25.479379 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 09:44:25.482252 call enable_fixed_mtrr()
2006 09:44:25.485912 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 09:44:25.489516 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 09:44:25.495732 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 09:44:25.499222 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 09:44:25.502205 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 09:44:25.505315 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 09:44:25.512678 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 09:44:25.515507 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 09:44:25.518646 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 09:44:25.521925 CPU physical address size: 39 bits
2016 09:44:25.525571 call enable_fixed_mtrr()
2017 09:44:25.528547 CPU physical address size: 39 bits
2018 09:44:25.535207 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
2019 09:44:25.538766 CPU physical address size: 39 bits
2020 09:44:25.542230 CBFS @ c08000 size 3f8000
2021 09:44:25.545178 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2022 09:44:25.549035 CBFS: Locating 'fallback/payload'
2023 09:44:25.555566 CBFS: Found @ offset 1c96c0 size 3f798
2024 09:44:25.558923 Checking segment from ROM address 0xffdd16f8
2025 09:44:25.562474 Checking segment from ROM address 0xffdd1714
2026 09:44:25.569621 Loading segment from ROM address 0xffdd16f8
2027 09:44:25.570207 code (compression=0)
2028 09:44:25.578458 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2029 09:44:25.588824 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2030 09:44:25.589421 it's not compressed!
2031 09:44:25.682329 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2032 09:44:25.688309 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2033 09:44:25.691723 Loading segment from ROM address 0xffdd1714
2034 09:44:25.694917 Entry Point 0x30000000
2035 09:44:25.698304 Loaded segments
2036 09:44:25.704021 Finalizing chipset.
2037 09:44:25.707216 Finalizing SMM.
2038 09:44:25.710213 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2039 09:44:25.713676 mp_park_aps done after 0 msecs.
2040 09:44:25.720342 Jumping to boot code at 30000000(99b62000)
2041 09:44:25.726961 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2042 09:44:25.727554
2043 09:44:25.727943
2044 09:44:25.728363
2045 09:44:25.730088 Starting depthcharge on Helios...
2046 09:44:25.730573
2047 09:44:25.731886 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2048 09:44:25.732472 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2049 09:44:25.732962 Setting prompt string to ['hatch:']
2050 09:44:25.733431 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2051 09:44:25.739914 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2052 09:44:25.740505
2053 09:44:25.746840 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2054 09:44:25.747431
2055 09:44:25.753237 board_setup: Info: eMMC controller not present; skipping
2056 09:44:25.753863
2057 09:44:25.756792 New NVMe Controller 0x30053ac0 @ 00:1d:00
2058 09:44:25.757379
2059 09:44:25.763266 board_setup: Info: SDHCI controller not present; skipping
2060 09:44:25.763858
2061 09:44:25.770175 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2062 09:44:25.770769
2063 09:44:25.771161 Wipe memory regions:
2064 09:44:25.771522
2065 09:44:25.773142 [0x00000000001000, 0x000000000a0000)
2066 09:44:25.773667
2067 09:44:25.776082 [0x00000000100000, 0x00000030000000)
2068 09:44:25.779356
2069 09:44:25.845303 [0x00000030657430, 0x00000099a2c000)
2070 09:44:25.845916
2071 09:44:25.986646 [0x00000100000000, 0x0000045e800000)
2072 09:44:25.987228
2073 09:44:27.369089 R8152: Initializing
2074 09:44:27.369723
2075 09:44:27.371742 Version 9 (ocp_data = 6010)
2076 09:44:27.372246
2077 09:44:27.376105 R8152: Done initializing
2078 09:44:27.376689
2079 09:44:27.379163 Adding net device
2080 09:44:27.379652
2081 09:44:27.988645 R8152: Initializing
2082 09:44:27.989245
2083 09:44:27.991567 Version 6 (ocp_data = 5c30)
2084 09:44:27.992042
2085 09:44:27.995484 R8152: Done initializing
2086 09:44:27.995958
2087 09:44:28.001761 net_add_device: Attemp to include the same device
2088 09:44:28.002239
2089 09:44:28.008546 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2090 09:44:28.009030
2091 09:44:28.009400
2092 09:44:28.009812
2093 09:44:28.010596 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2095 09:44:28.112451 hatch: tftpboot 192.168.201.1 8794202/tftp-deploy-_r94mnzw/kernel/bzImage 8794202/tftp-deploy-_r94mnzw/kernel/cmdline 8794202/tftp-deploy-_r94mnzw/ramdisk/ramdisk.cpio.gz
2096 09:44:28.113169 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2097 09:44:28.113693 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2098 09:44:28.118207 tftpboot 192.168.201.1 8794202/tftp-deploy-_r94mnzw/kernel/bzImay-_r94mnzw/kernel/cmdline 8794202/tftp-deploy-_r94mnzw/ramdisk/ramdisk.cpio.gz
2099 09:44:28.118703
2100 09:44:28.119078 Waiting for link
2101 09:44:28.119421
2102 09:44:28.318988 done.
2103 09:44:28.319568
2104 09:44:28.319955 MAC: 00:24:32:50:1a:5f
2105 09:44:28.320418
2106 09:44:28.322377 Sending DHCP discover... done.
2107 09:44:28.322894
2108 09:44:28.325670 Waiting for reply... done.
2109 09:44:28.326157
2110 09:44:28.328857 Sending DHCP request... done.
2111 09:44:28.329340
2112 09:44:28.332323 Waiting for reply... done.
2113 09:44:28.332804
2114 09:44:28.335866 My ip is 192.168.201.21
2115 09:44:28.336445
2116 09:44:28.338823 The DHCP server ip is 192.168.201.1
2117 09:44:28.339310
2118 09:44:28.342103 TFTP server IP predefined by user: 192.168.201.1
2119 09:44:28.342589
2120 09:44:28.349156 Bootfile predefined by user: 8794202/tftp-deploy-_r94mnzw/kernel/bzImage
2121 09:44:28.349775
2122 09:44:28.352113 Sending tftp read request... done.
2123 09:44:28.352597
2124 09:44:28.360040 Waiting for the transfer...
2125 09:44:28.360656
2126 09:44:29.015431 00000000 ################################################################
2127 09:44:29.015963
2128 09:44:29.681135 00080000 ################################################################
2129 09:44:29.681682
2130 09:44:30.325726 00100000 ################################################################
2131 09:44:30.326308
2132 09:44:30.992149 00180000 ################################################################
2133 09:44:30.992689
2134 09:44:31.646571 00200000 ################################################################
2135 09:44:31.647085
2136 09:44:32.321556 00280000 ################################################################
2137 09:44:32.322099
2138 09:44:32.953094 00300000 ################################################################
2139 09:44:32.953671
2140 09:44:33.595805 00380000 ################################################################
2141 09:44:33.596327
2142 09:44:34.249727 00400000 ################################################################
2143 09:44:34.250257
2144 09:44:34.921015 00480000 ################################################################
2145 09:44:34.921564
2146 09:44:35.588733 00500000 ################################################################
2147 09:44:35.589263
2148 09:44:36.262611 00580000 ################################################################
2149 09:44:36.263139
2150 09:44:36.933936 00600000 ################################################################
2151 09:44:36.934472
2152 09:44:37.604326 00680000 ################################################################
2153 09:44:37.604911
2154 09:44:38.284134 00700000 ################################################################
2155 09:44:38.284657
2156 09:44:38.931820 00780000 ################################################################
2157 09:44:38.932394
2158 09:44:39.605228 00800000 ################################################################
2159 09:44:39.605802
2160 09:44:40.271103 00880000 ################################################################
2161 09:44:40.271677
2162 09:44:40.624060 00900000 ################################## done.
2163 09:44:40.624590
2164 09:44:40.627540 The bootfile was 9711616 bytes long.
2165 09:44:40.627981
2166 09:44:40.631574 Sending tftp read request... done.
2167 09:44:40.632064
2168 09:44:40.634293 Waiting for the transfer...
2169 09:44:40.634802
2170 09:44:41.332791 00000000 ################################################################
2171 09:44:41.333390
2172 09:44:42.052295 00080000 ################################################################
2173 09:44:42.052901
2174 09:44:42.769232 00100000 ################################################################
2175 09:44:42.769931
2176 09:44:43.469016 00180000 ################################################################
2177 09:44:43.469647
2178 09:44:44.183504 00200000 ################################################################
2179 09:44:44.184125
2180 09:44:44.899516 00280000 ################################################################
2181 09:44:44.900104
2182 09:44:45.617568 00300000 ################################################################
2183 09:44:45.618191
2184 09:44:46.341681 00380000 ################################################################
2185 09:44:46.342250
2186 09:44:47.069132 00400000 ################################################################
2187 09:44:47.069734
2188 09:44:47.778178 00480000 ################################################################
2189 09:44:47.778728
2190 09:44:48.149913 00500000 ################################### done.
2191 09:44:48.150512
2192 09:44:48.153214 Sending tftp read request... done.
2193 09:44:48.153902
2194 09:44:48.156576 Waiting for the transfer...
2195 09:44:48.157152
2196 09:44:48.157596 00000000 # done.
2197 09:44:48.158060
2198 09:44:48.166162 Command line loaded dynamically from TFTP file: 8794202/tftp-deploy-_r94mnzw/kernel/cmdline
2199 09:44:48.166654
2200 09:44:48.189323 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8794202/extract-nfsrootfs-73bm1fut,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2201 09:44:48.189953
2202 09:44:48.196387 ec_init(0): CrosEC protocol v3 supported (256, 256)
2203 09:44:48.196951
2204 09:44:48.203257 Shutting down all USB controllers.
2205 09:44:48.203753
2206 09:44:48.204352 Removing current net device
2207 09:44:48.204730
2208 09:44:48.210895 Finalizing coreboot
2209 09:44:48.211483
2210 09:44:48.217610 Exiting depthcharge with code 4 at timestamp: 29926812
2211 09:44:48.218091
2212 09:44:48.218467
2213 09:44:48.218836 Starting kernel ...
2214 09:44:48.219173
2215 09:44:48.219500
2216 09:44:48.220898 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2217 09:44:48.221444 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2218 09:44:48.221909 Setting prompt string to ['Linux version [0-9]']
2219 09:44:48.222302 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2220 09:44:48.222695 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2221 09:44:48.223637
2222 09:44:48.224084
2224 09:49:07.221690 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2226 09:49:07.221924 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2228 09:49:07.222101 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2231 09:49:07.222383 end: 2 depthcharge-action (duration 00:05:00) [common]
2233 09:49:07.222614 Cleaning after the job
2234 09:49:07.222712 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/ramdisk
2235 09:49:07.223174 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/kernel
2236 09:49:07.223875 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/nfsrootfs
2237 09:49:07.273490 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8794202/tftp-deploy-_r94mnzw/modules
2238 09:49:07.273823 start: 4.1 power-off (timeout 00:00:30) [common]
2239 09:49:07.273997 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2240 09:49:07.294548 >> Command sent successfully.
2241 09:49:07.296569 Returned 0 in 0 seconds
2242 09:49:07.397350 end: 4.1 power-off (duration 00:00:00) [common]
2244 09:49:07.397737 start: 4.2 read-feedback (timeout 00:10:00) [common]
2245 09:49:07.398019 Listened to connection for namespace 'common' for up to 1s
2246 09:49:08.401571 Finalising connection for namespace 'common'
2247 09:49:08.401851 Disconnecting from shell: Finalise
2248 09:49:08.502783 end: 4.2 read-feedback (duration 00:00:01) [common]
2249 09:49:08.502946 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8794202
2250 09:49:08.659904 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8794202
2251 09:49:08.660107 JobError: Your job cannot terminate cleanly.