Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:06:58.678262 lava-dispatcher, installed at version: 2022.11
2 12:06:58.678444 start: 0 validate
3 12:06:58.678575 Start time: 2023-01-24 12:06:58.678566+00:00 (UTC)
4 12:06:58.678696 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:06:58.678823 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230120.0%2Fx86%2Frootfs.cpio.gz exists
6 12:06:58.968541 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:06:58.968713 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:06:59.251411 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:06:59.251583 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:06:59.253975 validate duration: 0.58
12 12:06:59.254216 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:06:59.254321 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:06:59.254416 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:06:59.254519 Not decompressing ramdisk as can be used compressed.
16 12:06:59.254604 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230120.0/x86/rootfs.cpio.gz
17 12:06:59.254668 saving as /var/lib/lava/dispatcher/tmp/8853701/tftp-deploy-w0wkmpn6/ramdisk/rootfs.cpio.gz
18 12:06:59.254729 total size: 8423992 (8MB)
19 12:06:59.255765 progress 0% (0MB)
20 12:06:59.257821 progress 5% (0MB)
21 12:06:59.260000 progress 10% (0MB)
22 12:06:59.262089 progress 15% (1MB)
23 12:06:59.264206 progress 20% (1MB)
24 12:06:59.266286 progress 25% (2MB)
25 12:06:59.268377 progress 30% (2MB)
26 12:06:59.270291 progress 35% (2MB)
27 12:06:59.272377 progress 40% (3MB)
28 12:06:59.274446 progress 45% (3MB)
29 12:06:59.276541 progress 50% (4MB)
30 12:06:59.278585 progress 55% (4MB)
31 12:06:59.280671 progress 60% (4MB)
32 12:06:59.282705 progress 65% (5MB)
33 12:06:59.284629 progress 70% (5MB)
34 12:06:59.286662 progress 75% (6MB)
35 12:06:59.288735 progress 80% (6MB)
36 12:06:59.290766 progress 85% (6MB)
37 12:06:59.292846 progress 90% (7MB)
38 12:06:59.295047 progress 95% (7MB)
39 12:06:59.297203 progress 100% (8MB)
40 12:06:59.297425 8MB downloaded in 0.04s (188.18MB/s)
41 12:06:59.297613 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:06:59.297922 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:06:59.298040 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:06:59.298158 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:06:59.298292 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:06:59.298362 saving as /var/lib/lava/dispatcher/tmp/8853701/tftp-deploy-w0wkmpn6/kernel/bzImage
48 12:06:59.298424 total size: 9707520 (9MB)
49 12:06:59.298486 No compression specified
50 12:06:59.299508 progress 0% (0MB)
51 12:06:59.301920 progress 5% (0MB)
52 12:06:59.304489 progress 10% (0MB)
53 12:06:59.306970 progress 15% (1MB)
54 12:06:59.309400 progress 20% (1MB)
55 12:06:59.311897 progress 25% (2MB)
56 12:06:59.314172 progress 30% (2MB)
57 12:06:59.316592 progress 35% (3MB)
58 12:06:59.319007 progress 40% (3MB)
59 12:06:59.321394 progress 45% (4MB)
60 12:06:59.323815 progress 50% (4MB)
61 12:06:59.326038 progress 55% (5MB)
62 12:06:59.328423 progress 60% (5MB)
63 12:06:59.330800 progress 65% (6MB)
64 12:06:59.333346 progress 70% (6MB)
65 12:06:59.335832 progress 75% (6MB)
66 12:06:59.338018 progress 80% (7MB)
67 12:06:59.340442 progress 85% (7MB)
68 12:06:59.342783 progress 90% (8MB)
69 12:06:59.345168 progress 95% (8MB)
70 12:06:59.347643 progress 100% (9MB)
71 12:06:59.347835 9MB downloaded in 0.05s (187.39MB/s)
72 12:06:59.347988 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:06:59.348220 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:06:59.348307 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:06:59.348393 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:06:59.348500 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:06:59.348584 saving as /var/lib/lava/dispatcher/tmp/8853701/tftp-deploy-w0wkmpn6/modules/modules.tar
79 12:06:59.348659 total size: 64588 (0MB)
80 12:06:59.348721 Using unxz to decompress xz
81 12:06:59.351997 progress 50% (0MB)
82 12:06:59.352408 progress 100% (0MB)
83 12:06:59.357301 0MB downloaded in 0.01s (7.14MB/s)
84 12:06:59.357576 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:06:59.357864 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:06:59.357972 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 12:06:59.358083 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 12:06:59.358181 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:06:59.358283 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 12:06:59.358464 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral
92 12:06:59.358587 makedir: /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin
93 12:06:59.358684 makedir: /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/tests
94 12:06:59.358783 makedir: /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/results
95 12:06:59.358950 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-add-keys
96 12:06:59.359095 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-add-sources
97 12:06:59.359226 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-background-process-start
98 12:06:59.359356 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-background-process-stop
99 12:06:59.359483 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-common-functions
100 12:06:59.359609 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-echo-ipv4
101 12:06:59.359737 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-install-packages
102 12:06:59.359864 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-installed-packages
103 12:06:59.359989 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-os-build
104 12:06:59.360117 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-probe-channel
105 12:06:59.360244 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-probe-ip
106 12:06:59.360369 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-target-ip
107 12:06:59.360493 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-target-mac
108 12:06:59.360618 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-target-storage
109 12:06:59.360814 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-test-case
110 12:06:59.360940 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-test-event
111 12:06:59.361066 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-test-feedback
112 12:06:59.361189 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-test-raise
113 12:06:59.361315 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-test-reference
114 12:06:59.361439 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-test-runner
115 12:06:59.361563 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-test-set
116 12:06:59.361687 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-test-shell
117 12:06:59.361814 Updating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-install-packages (oe)
118 12:06:59.361942 Updating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/bin/lava-installed-packages (oe)
119 12:06:59.362055 Creating /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/environment
120 12:06:59.362158 LAVA metadata
121 12:06:59.362239 - LAVA_JOB_ID=8853701
122 12:06:59.362321 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:06:59.362452 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 12:06:59.362526 skipped lava-vland-overlay
125 12:06:59.362628 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:06:59.362730 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 12:06:59.362802 skipped lava-multinode-overlay
128 12:06:59.362923 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:06:59.363038 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 12:06:59.363128 Loading test definitions
131 12:06:59.363245 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 12:06:59.363331 Using /lava-8853701 at stage 0
133 12:06:59.363622 uuid=8853701_1.4.2.3.1 testdef=None
134 12:06:59.363730 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:06:59.363837 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 12:06:59.364350 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:06:59.364605 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 12:06:59.365186 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:06:59.365450 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 12:06:59.366038 runner path: /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/0/tests/0_dmesg test_uuid 8853701_1.4.2.3.1
143 12:06:59.366195 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:06:59.366454 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 12:06:59.366538 Using /lava-8853701 at stage 1
147 12:06:59.366811 uuid=8853701_1.4.2.3.5 testdef=None
148 12:06:59.366946 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 12:06:59.367050 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 12:06:59.367507 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 12:06:59.367757 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 12:06:59.368380 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 12:06:59.368683 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 12:06:59.369253 runner path: /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/1/tests/1_bootrr test_uuid 8853701_1.4.2.3.5
157 12:06:59.369406 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 12:06:59.369638 Creating lava-test-runner.conf files
160 12:06:59.369718 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/0 for stage 0
161 12:06:59.369822 - 0_dmesg
162 12:06:59.369907 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853701/lava-overlay-s1n_rral/lava-8853701/1 for stage 1
163 12:06:59.370008 - 1_bootrr
164 12:06:59.370114 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 12:06:59.370217 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 12:06:59.376449 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 12:06:59.376578 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 12:06:59.376685 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 12:06:59.376791 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 12:06:59.376895 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 12:06:59.577814 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 12:06:59.578181 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 12:06:59.578328 extracting modules file /var/lib/lava/dispatcher/tmp/8853701/tftp-deploy-w0wkmpn6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853701/extract-overlay-ramdisk-selo876j/ramdisk
174 12:06:59.582823 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 12:06:59.583028 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 12:06:59.583151 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853701/compress-overlay-bh2fmudo/overlay-1.4.2.4.tar.gz to ramdisk
177 12:06:59.583225 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853701/compress-overlay-bh2fmudo/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8853701/extract-overlay-ramdisk-selo876j/ramdisk
178 12:06:59.587337 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 12:06:59.587450 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 12:06:59.587561 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 12:06:59.587667 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 12:06:59.587749 Building ramdisk /var/lib/lava/dispatcher/tmp/8853701/extract-overlay-ramdisk-selo876j/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8853701/extract-overlay-ramdisk-selo876j/ramdisk
183 12:06:59.655007 >> 48350 blocks
184 12:07:00.419157 rename /var/lib/lava/dispatcher/tmp/8853701/extract-overlay-ramdisk-selo876j/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8853701/tftp-deploy-w0wkmpn6/ramdisk/ramdisk.cpio.gz
185 12:07:00.419575 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 12:07:00.419702 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 12:07:00.419822 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 12:07:00.419938 No mkimage arch provided, not using FIT.
189 12:07:00.420030 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 12:07:00.420116 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 12:07:00.420215 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 12:07:00.420307 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 12:07:00.420384 No LXC device requested
194 12:07:00.420465 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 12:07:00.420551 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 12:07:00.420636 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 12:07:00.420709 Checking files for TFTP limit of 4294967296 bytes.
198 12:07:00.421099 end: 1 tftp-deploy (duration 00:00:01) [common]
199 12:07:00.421206 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 12:07:00.421307 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 12:07:00.421431 substitutions:
202 12:07:00.421501 - {DTB}: None
203 12:07:00.421583 - {INITRD}: 8853701/tftp-deploy-w0wkmpn6/ramdisk/ramdisk.cpio.gz
204 12:07:00.421674 - {KERNEL}: 8853701/tftp-deploy-w0wkmpn6/kernel/bzImage
205 12:07:00.421741 - {LAVA_MAC}: None
206 12:07:00.421801 - {PRESEED_CONFIG}: None
207 12:07:00.421862 - {PRESEED_LOCAL}: None
208 12:07:00.421919 - {RAMDISK}: 8853701/tftp-deploy-w0wkmpn6/ramdisk/ramdisk.cpio.gz
209 12:07:00.421976 - {ROOT_PART}: None
210 12:07:00.422033 - {ROOT}: None
211 12:07:00.422090 - {SERVER_IP}: 192.168.201.1
212 12:07:00.422146 - {TEE}: None
213 12:07:00.422203 Parsed boot commands:
214 12:07:00.422259 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 12:07:00.422413 Parsed boot commands: tftpboot 192.168.201.1 8853701/tftp-deploy-w0wkmpn6/kernel/bzImage 8853701/tftp-deploy-w0wkmpn6/kernel/cmdline 8853701/tftp-deploy-w0wkmpn6/ramdisk/ramdisk.cpio.gz
216 12:07:00.422510 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 12:07:00.422603 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 12:07:00.422706 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 12:07:00.422794 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 12:07:00.422866 Not connected, no need to disconnect.
221 12:07:00.422990 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 12:07:00.423075 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 12:07:00.423145 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
224 12:07:00.425909 Setting prompt string to ['lava-test: # ']
225 12:07:00.426231 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 12:07:00.426338 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 12:07:00.426438 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 12:07:00.426545 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 12:07:00.426750 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
230 12:07:00.446531 >> Command sent successfully.
231 12:07:00.448593 Returned 0 in 0 seconds
232 12:07:00.549390 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 12:07:00.550019 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 12:07:00.550119 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 12:07:00.550206 Setting prompt string to 'Starting depthcharge on Voema...'
237 12:07:00.550271 Changing prompt to 'Starting depthcharge on Voema...'
238 12:07:00.550340 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 12:07:00.550613 [Enter `^Ec?' for help]
240 12:07:08.270959
241 12:07:08.271180
242 12:07:08.280646 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 12:07:08.284302 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 12:07:08.290939 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 12:07:08.294198 CPU: AES supported, TXT NOT supported, VT supported
246 12:07:08.301116 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 12:07:08.303921 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 12:07:08.307764
249 12:07:08.310558 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
250 12:07:08.314204 VBOOT: Loading verstage.
251 12:07:08.317267 FMAP: Found "FLASH" version 1.1 at 0x1804000.
252 12:07:08.323776 FMAP: base = 0x0 size = 0x2000000 #areas = 32
253 12:07:08.327203 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
254 12:07:08.337958 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
255 12:07:08.344518 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 12:07:08.344629
257 12:07:08.344697
258 12:07:08.357917 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 12:07:08.371530 Probing TPM: . done!
260 12:07:08.374816 TPM ready after 0 ms
261 12:07:08.378181 Connected to device vid:did:rid of 1ae0:0028:00
262 12:07:08.389465 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
263 12:07:08.396383 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 12:07:08.399904 Initialized TPM device CR50 revision 0
265 12:07:08.451973 tlcl_send_startup: Startup return code is 0
266 12:07:08.452110 TPM: setup succeeded
267 12:07:08.467595 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 12:07:08.481899 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 12:07:08.494581 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 12:07:08.504331 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 12:07:08.507991 Chrome EC: UHEPI supported
272 12:07:08.511517 Phase 1
273 12:07:08.514617 FMAP: area GBB found @ 1805000 (458752 bytes)
274 12:07:08.524399 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 12:07:08.531230 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
276 12:07:08.537817 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
277 12:07:08.544890 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
278 12:07:08.548049 Recovery requested (1009000e)
279 12:07:08.551229 TPM: Extending digest for VBOOT: boot mode into PCR 0
280 12:07:08.563018 tlcl_extend: response is 0
281 12:07:08.569163 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
282 12:07:08.579422 tlcl_extend: response is 0
283 12:07:08.585736 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 12:07:08.592575 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
285 12:07:08.599081 BS: verstage times (exec / console): total (unknown) / 142 ms
286 12:07:08.599169
287 12:07:08.599254
288 12:07:08.612565 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
289 12:07:08.618855 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 12:07:08.622713 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 12:07:08.625749 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
292 12:07:08.632558 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 12:07:08.635605 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
294 12:07:08.639026 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
295 12:07:08.642373 TCO_STS: 0000 0000
296 12:07:08.645878 GEN_PMCON: d0015038 00002200
297 12:07:08.648815 GBLRST_CAUSE: 00000000 00000000
298 12:07:08.648904 HPR_CAUSE0: 00000000
299 12:07:08.652451 prev_sleep_state 5
300 12:07:08.656245 Boot Count incremented to 17297
301 12:07:08.662608 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 12:07:08.669086 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 12:07:08.675513 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 12:07:08.682157 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
305 12:07:08.686859 Chrome EC: UHEPI supported
306 12:07:08.693577 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
307 12:07:08.706997 Probing TPM: done!
308 12:07:08.713980 Connected to device vid:did:rid of 1ae0:0028:00
309 12:07:08.724089 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
310 12:07:08.731044 Initialized TPM device CR50 revision 0
311 12:07:08.741499 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
312 12:07:08.747829 MRC: Hash idx 0x100b comparison successful.
313 12:07:08.751403 MRC cache found, size faa8
314 12:07:08.751492 bootmode is set to: 2
315 12:07:08.754461 SPD index = 0
316 12:07:08.761092 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
317 12:07:08.764523 SPD: module type is LPDDR4X
318 12:07:08.767923 SPD: module part number is MT53E512M64D4NW-046
319 12:07:08.774396 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
320 12:07:08.777704 SPD: device width 16 bits, bus width 16 bits
321 12:07:08.784103 SPD: module size is 1024 MB (per channel)
322 12:07:09.217732 CBMEM:
323 12:07:09.221047 IMD: root @ 0x76fff000 254 entries.
324 12:07:09.224433 IMD: root @ 0x76ffec00 62 entries.
325 12:07:09.228047 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
326 12:07:09.234394 FMAP: area RW_VPD found @ f35000 (8192 bytes)
327 12:07:09.237341 External stage cache:
328 12:07:09.240995 IMD: root @ 0x7b3ff000 254 entries.
329 12:07:09.244020 IMD: root @ 0x7b3fec00 62 entries.
330 12:07:09.259646 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
331 12:07:09.266064 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
332 12:07:09.272859 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
333 12:07:09.287355 MRC: 'RECOVERY_MRC_CACHE' does not need update.
334 12:07:09.291162 cse_lite: Skip switching to RW in the recovery path
335 12:07:09.294553 8 DIMMs found
336 12:07:09.294654 SMM Memory Map
337 12:07:09.297815 SMRAM : 0x7b000000 0x800000
338 12:07:09.301403 Subregion 0: 0x7b000000 0x200000
339 12:07:09.304305 Subregion 1: 0x7b200000 0x200000
340 12:07:09.308067 Subregion 2: 0x7b400000 0x400000
341 12:07:09.311310 top_of_ram = 0x77000000
342 12:07:09.317946 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
343 12:07:09.321323 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
344 12:07:09.327719 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
345 12:07:09.331030 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 12:07:09.337760 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
347 12:07:09.341104
348 12:07:09.344211 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
349 12:07:09.356803 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
350 12:07:09.359960 Processing 211 relocs. Offset value of 0x74c0b000
351 12:07:09.369431 BS: romstage times (exec / console): total (unknown) / 277 ms
352 12:07:09.375413
353 12:07:09.375518
354 12:07:09.385334 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
355 12:07:09.388701 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
356 12:07:09.398851 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
357 12:07:09.405399 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
358 12:07:09.411890 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
359 12:07:09.418709 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
360 12:07:09.465561 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
361 12:07:09.472525 Processing 5008 relocs. Offset value of 0x75d98000
362 12:07:09.475303 BS: postcar times (exec / console): total (unknown) / 59 ms
363 12:07:09.478790
364 12:07:09.478886
365 12:07:09.489276 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
366 12:07:09.489374 Normal boot
367 12:07:09.492566 FW_CONFIG value is 0x804c02
368 12:07:09.495897 PCI: 00:07.0 disabled by fw_config
369 12:07:09.499246 PCI: 00:07.1 disabled by fw_config
370 12:07:09.502604 PCI: 00:0d.2 disabled by fw_config
371 12:07:09.505515 PCI: 00:1c.7 disabled by fw_config
372 12:07:09.512147 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 12:07:09.518971 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 12:07:09.522265 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 12:07:09.525502 GENERIC: 0.0 disabled by fw_config
376 12:07:09.528825 GENERIC: 1.0 disabled by fw_config
377 12:07:09.535521 fw_config match found: DB_USB=USB3_ACTIVE
378 12:07:09.538858 fw_config match found: DB_USB=USB3_ACTIVE
379 12:07:09.542059 fw_config match found: DB_USB=USB3_ACTIVE
380 12:07:09.545621 fw_config match found: DB_USB=USB3_ACTIVE
381 12:07:09.552127 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
382 12:07:09.558914 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
383 12:07:09.565408 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
384 12:07:09.569375
385 12:07:09.575198 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
386 12:07:09.578669 microcode: sig=0x806c1 pf=0x80 revision=0x86
387 12:07:09.585638 microcode: Update skipped, already up-to-date
388 12:07:09.591897 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
389 12:07:09.619046 Detected 4 core, 8 thread CPU.
390 12:07:09.622383 Setting up SMI for CPU
391 12:07:09.625859 IED base = 0x7b400000
392 12:07:09.626009 IED size = 0x00400000
393 12:07:09.629020 Will perform SMM setup.
394 12:07:09.635635 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
395 12:07:09.642732 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
396 12:07:09.649104 Processing 16 relocs. Offset value of 0x00030000
397 12:07:09.652591 Attempting to start 7 APs
398 12:07:09.655517 Waiting for 10ms after sending INIT.
399 12:07:09.671532 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
400 12:07:09.674359 AP: slot 7 apic_id 4.
401 12:07:09.678013 AP: slot 3 apic_id 5.
402 12:07:09.678099 AP: slot 4 apic_id 7.
403 12:07:09.681325 AP: slot 5 apic_id 6.
404 12:07:09.684377 AP: slot 6 apic_id 2.
405 12:07:09.684463 AP: slot 2 apic_id 3.
406 12:07:09.684530 done.
407 12:07:09.691204 Waiting for 2nd SIPI to complete...done.
408 12:07:09.697697 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 12:07:09.704321 Processing 13 relocs. Offset value of 0x00038000
410 12:07:09.704406 Unable to locate Global NVS
411 12:07:09.707778
412 12:07:09.714734 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
413 12:07:09.717449 Installing permanent SMM handler to 0x7b000000
414 12:07:09.727400 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
415 12:07:09.730903 Processing 794 relocs. Offset value of 0x7b010000
416 12:07:09.740704 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
417 12:07:09.743957 Processing 13 relocs. Offset value of 0x7b008000
418 12:07:09.750707 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
419 12:07:09.757280 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
420 12:07:09.761015 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
421 12:07:09.767255 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
422 12:07:09.773991 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
423 12:07:09.780780 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
424 12:07:09.787154 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
425 12:07:09.787245 Unable to locate Global NVS
426 12:07:09.797287 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
427 12:07:09.800672 Clearing SMI status registers
428 12:07:09.800758 SMI_STS: PM1
429 12:07:09.803967 PM1_STS: PWRBTN
430 12:07:09.810421 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
431 12:07:09.813762 In relocation handler: CPU 0
432 12:07:09.817306 New SMBASE=0x7b000000 IEDBASE=0x7b400000
433 12:07:09.823845 Writing SMRR. base = 0x7b000006, mask=0xff800c00
434 12:07:09.823932 Relocation complete.
435 12:07:09.833755 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
436 12:07:09.833864 In relocation handler: CPU 1
437 12:07:09.840347 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
438 12:07:09.840439 Relocation complete.
439 12:07:09.850694 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
440 12:07:09.850813 In relocation handler: CPU 2
441 12:07:09.857274 New SMBASE=0x7afff800 IEDBASE=0x7b400000
442 12:07:09.857362 Relocation complete.
443 12:07:09.863662 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
444 12:07:09.866847 In relocation handler: CPU 6
445 12:07:09.873647 New SMBASE=0x7affe800 IEDBASE=0x7b400000
446 12:07:09.877260 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 12:07:09.880555 Relocation complete.
448 12:07:09.886911 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
449 12:07:09.890754 In relocation handler: CPU 4
450 12:07:09.894003 New SMBASE=0x7afff000 IEDBASE=0x7b400000
451 12:07:09.897203 Relocation complete.
452 12:07:09.903618 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
453 12:07:09.907242 In relocation handler: CPU 5
454 12:07:09.910574 New SMBASE=0x7affec00 IEDBASE=0x7b400000
455 12:07:09.913978 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 12:07:09.916910 Relocation complete.
457 12:07:09.923540 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
458 12:07:09.927082 In relocation handler: CPU 7
459 12:07:09.930299 New SMBASE=0x7affe400 IEDBASE=0x7b400000
460 12:07:09.936921 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 12:07:09.940027 Relocation complete.
462 12:07:09.947168 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
463 12:07:09.950547 In relocation handler: CPU 3
464 12:07:09.954275 New SMBASE=0x7afff400 IEDBASE=0x7b400000
465 12:07:09.954451 Relocation complete.
466 12:07:09.957719 Initializing CPU #0
467 12:07:09.961281 CPU: vendor Intel device 806c1
468 12:07:09.964206 CPU: family 06, model 8c, stepping 01
469 12:07:09.967423 Clearing out pending MCEs
470 12:07:09.970770 Setting up local APIC...
471 12:07:09.970951 apic_id: 0x00 done.
472 12:07:09.974140 Turbo is available but hidden
473 12:07:09.977623 Turbo is available and visible
474 12:07:09.984544 microcode: Update skipped, already up-to-date
475 12:07:09.984809 CPU #0 initialized
476 12:07:09.987290 Initializing CPU #6
477 12:07:09.987482 Initializing CPU #2
478 12:07:09.990694
479 12:07:09.990918 CPU: vendor Intel device 806c1
480 12:07:09.997646 CPU: family 06, model 8c, stepping 01
481 12:07:09.997988 CPU: vendor Intel device 806c1
482 12:07:10.001048
483 12:07:10.004472 CPU: family 06, model 8c, stepping 01
484 12:07:10.004984 Initializing CPU #7
485 12:07:10.007503 Initializing CPU #3
486 12:07:10.010686 CPU: vendor Intel device 806c1
487 12:07:10.013896 CPU: family 06, model 8c, stepping 01
488 12:07:10.017151 CPU: vendor Intel device 806c1
489 12:07:10.020732 CPU: family 06, model 8c, stepping 01
490 12:07:10.024149 Clearing out pending MCEs
491 12:07:10.027267 Clearing out pending MCEs
492 12:07:10.027684 Initializing CPU #1
493 12:07:10.030494 Initializing CPU #5
494 12:07:10.030921 Initializing CPU #4
495 12:07:10.033803
496 12:07:10.034203 CPU: vendor Intel device 806c1
497 12:07:10.040570 CPU: family 06, model 8c, stepping 01
498 12:07:10.044153 CPU: vendor Intel device 806c1
499 12:07:10.046835 CPU: family 06, model 8c, stepping 01
500 12:07:10.047081 Clearing out pending MCEs
501 12:07:10.050038
502 12:07:10.050219 Clearing out pending MCEs
503 12:07:10.053591 Setting up local APIC...
504 12:07:10.057098 CPU: vendor Intel device 806c1
505 12:07:10.060419 CPU: family 06, model 8c, stepping 01
506 12:07:10.063757 Setting up local APIC...
507 12:07:10.066820 Clearing out pending MCEs
508 12:07:10.066962 Clearing out pending MCEs
509 12:07:10.070265
510 12:07:10.070481 Setting up local APIC...
511 12:07:10.073722 apic_id: 0x06 done.
512 12:07:10.077277 Setting up local APIC...
513 12:07:10.077490 Clearing out pending MCEs
514 12:07:10.080184 apic_id: 0x07 done.
515 12:07:10.083780 microcode: Update skipped, already up-to-date
516 12:07:10.087248
517 12:07:10.090488 microcode: Update skipped, already up-to-date
518 12:07:10.090725 CPU #5 initialized
519 12:07:10.093660 CPU #4 initialized
520 12:07:10.096898 Setting up local APIC...
521 12:07:10.097161 apic_id: 0x04 done.
522 12:07:10.100114 Setting up local APIC...
523 12:07:10.103803 apic_id: 0x01 done.
524 12:07:10.107115 apic_id: 0x05 done.
525 12:07:10.110331 microcode: Update skipped, already up-to-date
526 12:07:10.113482 microcode: Update skipped, already up-to-date
527 12:07:10.116640 CPU #7 initialized
528 12:07:10.116909 CPU #3 initialized
529 12:07:10.123275 microcode: Update skipped, already up-to-date
530 12:07:10.123591 apic_id: 0x03 done.
531 12:07:10.126756
532 12:07:10.126857 Setting up local APIC...
533 12:07:10.129857 CPU #1 initialized
534 12:07:10.129943 apic_id: 0x02 done.
535 12:07:10.133145
536 12:07:10.136469 microcode: Update skipped, already up-to-date
537 12:07:10.139689 microcode: Update skipped, already up-to-date
538 12:07:10.143131 CPU #2 initialized
539 12:07:10.143216 CPU #6 initialized
540 12:07:10.149595 bsp_do_flight_plan done after 454 msecs.
541 12:07:10.153112 CPU: frequency set to 4000 MHz
542 12:07:10.153202 Enabling SMIs.
543 12:07:10.160160 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
544 12:07:10.176025 SATAXPCIE1 indicates PCIe NVMe is present
545 12:07:10.179493 Probing TPM: done!
546 12:07:10.182944 Connected to device vid:did:rid of 1ae0:0028:00
547 12:07:10.193677 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
548 12:07:10.196885 Initialized TPM device CR50 revision 0
549 12:07:10.200402 Enabling S0i3.4
550 12:07:10.206551 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
551 12:07:10.209902 Found a VBT of 8704 bytes after decompression
552 12:07:10.216219 cse_lite: CSE RO boot. HybridStorageMode disabled
553 12:07:10.223065 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
554 12:07:10.299566 FSPS returned 0
555 12:07:10.302851 Executing Phase 1 of FspMultiPhaseSiInit
556 12:07:10.312406 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
557 12:07:10.316111 port C0 DISC req: usage 1 usb3 1 usb2 5
558 12:07:10.319277 Raw Buffer output 0 00000511
559 12:07:10.322417 Raw Buffer output 1 00000000
560 12:07:10.326261 pmc_send_ipc_cmd succeeded
561 12:07:10.329640 port C1 DISC req: usage 1 usb3 2 usb2 3
562 12:07:10.332944
563 12:07:10.333376 Raw Buffer output 0 00000321
564 12:07:10.336054 Raw Buffer output 1 00000000
565 12:07:10.340110 pmc_send_ipc_cmd succeeded
566 12:07:10.345520 Detected 4 core, 8 thread CPU.
567 12:07:10.348645 Detected 4 core, 8 thread CPU.
568 12:07:10.582949 Display FSP Version Info HOB
569 12:07:10.585936 Reference Code - CPU = a.0.4c.31
570 12:07:10.589897 uCode Version = 0.0.0.86
571 12:07:10.592929 TXT ACM version = ff.ff.ff.ffff
572 12:07:10.596024 Reference Code - ME = a.0.4c.31
573 12:07:10.599402 MEBx version = 0.0.0.0
574 12:07:10.602821 ME Firmware Version = Consumer SKU
575 12:07:10.606152 Reference Code - PCH = a.0.4c.31
576 12:07:10.609714 PCH-CRID Status = Disabled
577 12:07:10.612942 PCH-CRID Original Value = ff.ff.ff.ffff
578 12:07:10.616188 PCH-CRID New Value = ff.ff.ff.ffff
579 12:07:10.619445 OPROM - RST - RAID = ff.ff.ff.ffff
580 12:07:10.622708 PCH Hsio Version = 4.0.0.0
581 12:07:10.625929 Reference Code - SA - System Agent = a.0.4c.31
582 12:07:10.629063 Reference Code - MRC = 2.0.0.1
583 12:07:10.632635 SA - PCIe Version = a.0.4c.31
584 12:07:10.635961 SA-CRID Status = Disabled
585 12:07:10.639680 SA-CRID Original Value = 0.0.0.1
586 12:07:10.642797 SA-CRID New Value = 0.0.0.1
587 12:07:10.645821 OPROM - VBIOS = ff.ff.ff.ffff
588 12:07:10.649156 IO Manageability Engine FW Version = 11.1.4.0
589 12:07:10.652455 PHY Build Version = 0.0.0.e0
590 12:07:10.655753 Thunderbolt(TM) FW Version = 0.0.0.0
591 12:07:10.662470 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 12:07:10.666071 ITSS IRQ Polarities Before:
593 12:07:10.666187 IPC0: 0xffffffff
594 12:07:10.669173 IPC1: 0xffffffff
595 12:07:10.669283 IPC2: 0xffffffff
596 12:07:10.672509 IPC3: 0xffffffff
597 12:07:10.675771 ITSS IRQ Polarities After:
598 12:07:10.675878 IPC0: 0xffffffff
599 12:07:10.679385 IPC1: 0xffffffff
600 12:07:10.679484 IPC2: 0xffffffff
601 12:07:10.682308 IPC3: 0xffffffff
602 12:07:10.685851 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 12:07:10.699296 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 12:07:10.708886 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 12:07:10.722003 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 12:07:10.728717 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
607 12:07:10.728811 Enumerating buses...
608 12:07:10.735473 Show all devs... Before device enumeration.
609 12:07:10.735568 Root Device: enabled 1
610 12:07:10.738665
611 12:07:10.738785 DOMAIN: 0000: enabled 1
612 12:07:10.742181 CPU_CLUSTER: 0: enabled 1
613 12:07:10.745399 PCI: 00:00.0: enabled 1
614 12:07:10.745486 PCI: 00:02.0: enabled 1
615 12:07:10.748738
616 12:07:10.748820 PCI: 00:04.0: enabled 1
617 12:07:10.751978 PCI: 00:05.0: enabled 1
618 12:07:10.755490 PCI: 00:06.0: enabled 0
619 12:07:10.755594 PCI: 00:07.0: enabled 0
620 12:07:10.758588 PCI: 00:07.1: enabled 0
621 12:07:10.762221 PCI: 00:07.2: enabled 0
622 12:07:10.765625 PCI: 00:07.3: enabled 0
623 12:07:10.765713 PCI: 00:08.0: enabled 1
624 12:07:10.769104 PCI: 00:09.0: enabled 0
625 12:07:10.772349 PCI: 00:0a.0: enabled 0
626 12:07:10.775298 PCI: 00:0d.0: enabled 1
627 12:07:10.775401 PCI: 00:0d.1: enabled 0
628 12:07:10.778803 PCI: 00:0d.2: enabled 0
629 12:07:10.781913 PCI: 00:0d.3: enabled 0
630 12:07:10.785522 PCI: 00:0e.0: enabled 0
631 12:07:10.785613 PCI: 00:10.2: enabled 1
632 12:07:10.788684 PCI: 00:10.6: enabled 0
633 12:07:10.792273 PCI: 00:10.7: enabled 0
634 12:07:10.792363 PCI: 00:12.0: enabled 0
635 12:07:10.795341 PCI: 00:12.6: enabled 0
636 12:07:10.799266 PCI: 00:13.0: enabled 0
637 12:07:10.802123 PCI: 00:14.0: enabled 1
638 12:07:10.802212 PCI: 00:14.1: enabled 0
639 12:07:10.805230 PCI: 00:14.2: enabled 1
640 12:07:10.808688 PCI: 00:14.3: enabled 1
641 12:07:10.811879 PCI: 00:15.0: enabled 1
642 12:07:10.811967 PCI: 00:15.1: enabled 1
643 12:07:10.815063 PCI: 00:15.2: enabled 1
644 12:07:10.818356 PCI: 00:15.3: enabled 1
645 12:07:10.821980 PCI: 00:16.0: enabled 1
646 12:07:10.822071 PCI: 00:16.1: enabled 0
647 12:07:10.825383 PCI: 00:16.2: enabled 0
648 12:07:10.828504 PCI: 00:16.3: enabled 0
649 12:07:10.828593 PCI: 00:16.4: enabled 0
650 12:07:10.831984
651 12:07:10.832072 PCI: 00:16.5: enabled 0
652 12:07:10.835139 PCI: 00:17.0: enabled 1
653 12:07:10.838568 PCI: 00:19.0: enabled 0
654 12:07:10.838656 PCI: 00:19.1: enabled 1
655 12:07:10.841972 PCI: 00:19.2: enabled 0
656 12:07:10.845088 PCI: 00:1c.0: enabled 1
657 12:07:10.848344 PCI: 00:1c.1: enabled 0
658 12:07:10.848433 PCI: 00:1c.2: enabled 0
659 12:07:10.851675 PCI: 00:1c.3: enabled 0
660 12:07:10.855216 PCI: 00:1c.4: enabled 0
661 12:07:10.858332 PCI: 00:1c.5: enabled 0
662 12:07:10.858420 PCI: 00:1c.6: enabled 1
663 12:07:10.861928 PCI: 00:1c.7: enabled 0
664 12:07:10.865352 PCI: 00:1d.0: enabled 1
665 12:07:10.865441 PCI: 00:1d.1: enabled 0
666 12:07:10.868767
667 12:07:10.868856 PCI: 00:1d.2: enabled 1
668 12:07:10.871868 PCI: 00:1d.3: enabled 0
669 12:07:10.875283 PCI: 00:1e.0: enabled 1
670 12:07:10.875386 PCI: 00:1e.1: enabled 0
671 12:07:10.878301 PCI: 00:1e.2: enabled 1
672 12:07:10.881773 PCI: 00:1e.3: enabled 1
673 12:07:10.885429 PCI: 00:1f.0: enabled 1
674 12:07:10.885902 PCI: 00:1f.1: enabled 0
675 12:07:10.888711 PCI: 00:1f.2: enabled 1
676 12:07:10.892205 PCI: 00:1f.3: enabled 1
677 12:07:10.895294 PCI: 00:1f.4: enabled 0
678 12:07:10.895716 PCI: 00:1f.5: enabled 1
679 12:07:10.899042 PCI: 00:1f.6: enabled 0
680 12:07:10.901903 PCI: 00:1f.7: enabled 0
681 12:07:10.902307 APIC: 00: enabled 1
682 12:07:10.905150 GENERIC: 0.0: enabled 1
683 12:07:10.908975 GENERIC: 0.0: enabled 1
684 12:07:10.911770 GENERIC: 1.0: enabled 1
685 12:07:10.911987 GENERIC: 0.0: enabled 1
686 12:07:10.915139 GENERIC: 1.0: enabled 1
687 12:07:10.918349 USB0 port 0: enabled 1
688 12:07:10.918526 GENERIC: 0.0: enabled 1
689 12:07:10.921931
690 12:07:10.922079 USB0 port 0: enabled 1
691 12:07:10.925145 GENERIC: 0.0: enabled 1
692 12:07:10.928478 I2C: 00:1a: enabled 1
693 12:07:10.928619 I2C: 00:31: enabled 1
694 12:07:10.931822 I2C: 00:32: enabled 1
695 12:07:10.934949 I2C: 00:10: enabled 1
696 12:07:10.935056 I2C: 00:15: enabled 1
697 12:07:10.938218 GENERIC: 0.0: enabled 0
698 12:07:10.941598 GENERIC: 1.0: enabled 0
699 12:07:10.944882 GENERIC: 0.0: enabled 1
700 12:07:10.944965 SPI: 00: enabled 1
701 12:07:10.948308 SPI: 00: enabled 1
702 12:07:10.948397 PNP: 0c09.0: enabled 1
703 12:07:10.951838 GENERIC: 0.0: enabled 1
704 12:07:10.954925 USB3 port 0: enabled 1
705 12:07:10.958063 USB3 port 1: enabled 1
706 12:07:10.958140 USB3 port 2: enabled 0
707 12:07:10.961487 USB3 port 3: enabled 0
708 12:07:10.965088 USB2 port 0: enabled 0
709 12:07:10.965171 USB2 port 1: enabled 1
710 12:07:10.968244 USB2 port 2: enabled 1
711 12:07:10.971729 USB2 port 3: enabled 0
712 12:07:10.971817 USB2 port 4: enabled 1
713 12:07:10.974988
714 12:07:10.975076 USB2 port 5: enabled 0
715 12:07:10.978031 USB2 port 6: enabled 0
716 12:07:10.981463 USB2 port 7: enabled 0
717 12:07:10.981550 USB2 port 8: enabled 0
718 12:07:10.985128 USB2 port 9: enabled 0
719 12:07:10.988400 USB3 port 0: enabled 0
720 12:07:10.988493 USB3 port 1: enabled 1
721 12:07:10.991487 USB3 port 2: enabled 0
722 12:07:10.994912 USB3 port 3: enabled 0
723 12:07:10.997972 GENERIC: 0.0: enabled 1
724 12:07:10.998094 GENERIC: 1.0: enabled 1
725 12:07:11.001562 APIC: 01: enabled 1
726 12:07:11.004855 APIC: 03: enabled 1
727 12:07:11.004946 APIC: 05: enabled 1
728 12:07:11.008174 APIC: 07: enabled 1
729 12:07:11.008281 APIC: 06: enabled 1
730 12:07:11.011487 APIC: 02: enabled 1
731 12:07:11.014519 APIC: 04: enabled 1
732 12:07:11.014632 Compare with tree...
733 12:07:11.018027 Root Device: enabled 1
734 12:07:11.021362 DOMAIN: 0000: enabled 1
735 12:07:11.024572 PCI: 00:00.0: enabled 1
736 12:07:11.024662 PCI: 00:02.0: enabled 1
737 12:07:11.027969 PCI: 00:04.0: enabled 1
738 12:07:11.031176 GENERIC: 0.0: enabled 1
739 12:07:11.034535 PCI: 00:05.0: enabled 1
740 12:07:11.038075 PCI: 00:06.0: enabled 0
741 12:07:11.038163 PCI: 00:07.0: enabled 0
742 12:07:11.041306 GENERIC: 0.0: enabled 1
743 12:07:11.044684 PCI: 00:07.1: enabled 0
744 12:07:11.048488 GENERIC: 1.0: enabled 1
745 12:07:11.051240 PCI: 00:07.2: enabled 0
746 12:07:11.051321 GENERIC: 0.0: enabled 1
747 12:07:11.054791 PCI: 00:07.3: enabled 0
748 12:07:11.057957 GENERIC: 1.0: enabled 1
749 12:07:11.061118 PCI: 00:08.0: enabled 1
750 12:07:11.064464 PCI: 00:09.0: enabled 0
751 12:07:11.064556 PCI: 00:0a.0: enabled 0
752 12:07:11.068097 PCI: 00:0d.0: enabled 1
753 12:07:11.071623 USB0 port 0: enabled 1
754 12:07:11.074617 USB3 port 0: enabled 1
755 12:07:11.078037 USB3 port 1: enabled 1
756 12:07:11.078135 USB3 port 2: enabled 0
757 12:07:11.081514 USB3 port 3: enabled 0
758 12:07:11.084430 PCI: 00:0d.1: enabled 0
759 12:07:11.087865 PCI: 00:0d.2: enabled 0
760 12:07:11.091248 GENERIC: 0.0: enabled 1
761 12:07:11.091367 PCI: 00:0d.3: enabled 0
762 12:07:11.094628
763 12:07:11.094742 PCI: 00:0e.0: enabled 0
764 12:07:11.097788 PCI: 00:10.2: enabled 1
765 12:07:11.100984 PCI: 00:10.6: enabled 0
766 12:07:11.104448 PCI: 00:10.7: enabled 0
767 12:07:11.104564 PCI: 00:12.0: enabled 0
768 12:07:11.107678 PCI: 00:12.6: enabled 0
769 12:07:11.111195 PCI: 00:13.0: enabled 0
770 12:07:11.114571 PCI: 00:14.0: enabled 1
771 12:07:11.117894 USB0 port 0: enabled 1
772 12:07:11.117980 USB2 port 0: enabled 0
773 12:07:11.121006 USB2 port 1: enabled 1
774 12:07:11.124586 USB2 port 2: enabled 1
775 12:07:11.127635 USB2 port 3: enabled 0
776 12:07:11.130912 USB2 port 4: enabled 1
777 12:07:11.134358 USB2 port 5: enabled 0
778 12:07:11.134445 USB2 port 6: enabled 0
779 12:07:11.137518 USB2 port 7: enabled 0
780 12:07:11.141002 USB2 port 8: enabled 0
781 12:07:11.144536 USB2 port 9: enabled 0
782 12:07:11.147651 USB3 port 0: enabled 0
783 12:07:11.150802 USB3 port 1: enabled 1
784 12:07:11.150911 USB3 port 2: enabled 0
785 12:07:11.154189 USB3 port 3: enabled 0
786 12:07:11.157524 PCI: 00:14.1: enabled 0
787 12:07:11.160945 PCI: 00:14.2: enabled 1
788 12:07:11.164254 PCI: 00:14.3: enabled 1
789 12:07:11.164742 GENERIC: 0.0: enabled 1
790 12:07:11.167647 PCI: 00:15.0: enabled 1
791 12:07:11.171325 I2C: 00:1a: enabled 1
792 12:07:11.174393 I2C: 00:31: enabled 1
793 12:07:11.174974 I2C: 00:32: enabled 1
794 12:07:11.177923 PCI: 00:15.1: enabled 1
795 12:07:11.181348 I2C: 00:10: enabled 1
796 12:07:11.184378 PCI: 00:15.2: enabled 1
797 12:07:11.187703 PCI: 00:15.3: enabled 1
798 12:07:11.188088 PCI: 00:16.0: enabled 1
799 12:07:11.191034 PCI: 00:16.1: enabled 0
800 12:07:11.194561 PCI: 00:16.2: enabled 0
801 12:07:11.197680 PCI: 00:16.3: enabled 0
802 12:07:11.197865 PCI: 00:16.4: enabled 0
803 12:07:11.201461 PCI: 00:16.5: enabled 0
804 12:07:11.204819 PCI: 00:17.0: enabled 1
805 12:07:11.207894 PCI: 00:19.0: enabled 0
806 12:07:11.211499 PCI: 00:19.1: enabled 1
807 12:07:11.211651 I2C: 00:15: enabled 1
808 12:07:11.214870 PCI: 00:19.2: enabled 0
809 12:07:11.217883 PCI: 00:1d.0: enabled 1
810 12:07:11.221140 GENERIC: 0.0: enabled 1
811 12:07:11.224315 PCI: 00:1e.0: enabled 1
812 12:07:11.224445 PCI: 00:1e.1: enabled 0
813 12:07:11.227950 PCI: 00:1e.2: enabled 1
814 12:07:11.231389 SPI: 00: enabled 1
815 12:07:11.234501 PCI: 00:1e.3: enabled 1
816 12:07:11.234589 SPI: 00: enabled 1
817 12:07:11.237957 PCI: 00:1f.0: enabled 1
818 12:07:11.289203 PNP: 0c09.0: enabled 1
819 12:07:11.289345 PCI: 00:1f.1: enabled 0
820 12:07:11.289644 PCI: 00:1f.2: enabled 1
821 12:07:11.289736 GENERIC: 0.0: enabled 1
822 12:07:11.289807 GENERIC: 0.0: enabled 1
823 12:07:11.289876 GENERIC: 1.0: enabled 1
824 12:07:11.289944 PCI: 00:1f.3: enabled 1
825 12:07:11.290200 PCI: 00:1f.4: enabled 0
826 12:07:11.290273 PCI: 00:1f.5: enabled 1
827 12:07:11.290525 PCI: 00:1f.6: enabled 0
828 12:07:11.290593 PCI: 00:1f.7: enabled 0
829 12:07:11.290654 CPU_CLUSTER: 0: enabled 1
830 12:07:11.290907 APIC: 00: enabled 1
831 12:07:11.290985 APIC: 01: enabled 1
832 12:07:11.291392 APIC: 03: enabled 1
833 12:07:11.291491 APIC: 05: enabled 1
834 12:07:11.291559 APIC: 07: enabled 1
835 12:07:11.291808 APIC: 06: enabled 1
836 12:07:11.291874 APIC: 02: enabled 1
837 12:07:11.291934 APIC: 04: enabled 1
838 12:07:11.299793 Root Device scanning...
839 12:07:11.299890 scan_static_bus for Root Device
840 12:07:11.303097 DOMAIN: 0000 enabled
841 12:07:11.303183 CPU_CLUSTER: 0 enabled
842 12:07:11.303252 DOMAIN: 0000 scanning...
843 12:07:11.306399 PCI: pci_scan_bus for bus 00
844 12:07:11.309820 PCI: 00:00.0 [8086/0000] ops
845 12:07:11.312887 PCI: 00:00.0 [8086/9a12] enabled
846 12:07:11.316744 PCI: 00:02.0 [8086/0000] bus ops
847 12:07:11.319808 PCI: 00:02.0 [8086/9a40] enabled
848 12:07:11.323013 PCI: 00:04.0 [8086/0000] bus ops
849 12:07:11.326436 PCI: 00:04.0 [8086/9a03] enabled
850 12:07:11.329578 PCI: 00:05.0 [8086/9a19] enabled
851 12:07:11.333005 PCI: 00:07.0 [0000/0000] hidden
852 12:07:11.336367 PCI: 00:08.0 [8086/9a11] enabled
853 12:07:11.339625 PCI: 00:0a.0 [8086/9a0d] disabled
854 12:07:11.342836 PCI: 00:0d.0 [8086/0000] bus ops
855 12:07:11.346277 PCI: 00:0d.0 [8086/9a13] enabled
856 12:07:11.349797 PCI: 00:14.0 [8086/0000] bus ops
857 12:07:11.353194 PCI: 00:14.0 [8086/a0ed] enabled
858 12:07:11.356356 PCI: 00:14.2 [8086/a0ef] enabled
859 12:07:11.359396 PCI: 00:14.3 [8086/0000] bus ops
860 12:07:11.362847 PCI: 00:14.3 [8086/a0f0] enabled
861 12:07:11.366104 PCI: 00:15.0 [8086/0000] bus ops
862 12:07:11.369716 PCI: 00:15.0 [8086/a0e8] enabled
863 12:07:11.372844 PCI: 00:15.1 [8086/0000] bus ops
864 12:07:11.376140 PCI: 00:15.1 [8086/a0e9] enabled
865 12:07:11.379602 PCI: 00:15.2 [8086/0000] bus ops
866 12:07:11.382844 PCI: 00:15.2 [8086/a0ea] enabled
867 12:07:11.386249 PCI: 00:15.3 [8086/0000] bus ops
868 12:07:11.389268 PCI: 00:15.3 [8086/a0eb] enabled
869 12:07:11.392767 PCI: 00:16.0 [8086/0000] ops
870 12:07:11.396296 PCI: 00:16.0 [8086/a0e0] enabled
871 12:07:11.399766 PCI: Static device PCI: 00:17.0 not found, disabling it.
872 12:07:11.402711 PCI: 00:19.0 [8086/0000] bus ops
873 12:07:11.405956 PCI: 00:19.0 [8086/a0c5] disabled
874 12:07:11.410097 PCI: 00:19.1 [8086/0000] bus ops
875 12:07:11.413217 PCI: 00:19.1 [8086/a0c6] enabled
876 12:07:11.416133 PCI: 00:1d.0 [8086/0000] bus ops
877 12:07:11.419600 PCI: 00:1d.0 [8086/a0b0] enabled
878 12:07:11.422835 PCI: 00:1e.0 [8086/0000] ops
879 12:07:11.426275 PCI: 00:1e.0 [8086/a0a8] enabled
880 12:07:11.429593 PCI: 00:1e.2 [8086/0000] bus ops
881 12:07:11.433047 PCI: 00:1e.2 [8086/a0aa] enabled
882 12:07:11.436280 PCI: 00:1e.3 [8086/0000] bus ops
883 12:07:11.439566 PCI: 00:1e.3 [8086/a0ab] enabled
884 12:07:11.442745 PCI: 00:1f.0 [8086/0000] bus ops
885 12:07:11.446235 PCI: 00:1f.0 [8086/a087] enabled
886 12:07:11.449503 RTC Init
887 12:07:11.452863 Set power on after power failure.
888 12:07:11.453096 Disabling Deep S3
889 12:07:11.455992 Disabling Deep S3
890 12:07:11.459507 Disabling Deep S4
891 12:07:11.459663 Disabling Deep S4
892 12:07:11.462704 Disabling Deep S5
893 12:07:11.462881 Disabling Deep S5
894 12:07:11.465779 PCI: 00:1f.2 [0000/0000] hidden
895 12:07:11.469255 PCI: 00:1f.3 [8086/0000] bus ops
896 12:07:11.472516 PCI: 00:1f.3 [8086/a0c8] enabled
897 12:07:11.476010 PCI: 00:1f.5 [8086/0000] bus ops
898 12:07:11.479278 PCI: 00:1f.5 [8086/a0a4] enabled
899 12:07:11.482428 PCI: Leftover static devices:
900 12:07:11.485793 PCI: 00:10.2
901 12:07:11.485881 PCI: 00:10.6
902 12:07:11.485948 PCI: 00:10.7
903 12:07:11.489308 PCI: 00:06.0
904 12:07:11.489394 PCI: 00:07.1
905 12:07:11.492610 PCI: 00:07.2
906 12:07:11.492698 PCI: 00:07.3
907 12:07:11.492767 PCI: 00:09.0
908 12:07:11.496228 PCI: 00:0d.1
909 12:07:11.496314 PCI: 00:0d.2
910 12:07:11.499088 PCI: 00:0d.3
911 12:07:11.499201 PCI: 00:0e.0
912 12:07:11.499302 PCI: 00:12.0
913 12:07:11.502355 PCI: 00:12.6
914 12:07:11.502444 PCI: 00:13.0
915 12:07:11.505724 PCI: 00:14.1
916 12:07:11.505809 PCI: 00:16.1
917 12:07:11.509257 PCI: 00:16.2
918 12:07:11.509348 PCI: 00:16.3
919 12:07:11.509417 PCI: 00:16.4
920 12:07:11.512536 PCI: 00:16.5
921 12:07:11.512626 PCI: 00:17.0
922 12:07:11.515576 PCI: 00:19.2
923 12:07:11.515658 PCI: 00:1e.1
924 12:07:11.515734 PCI: 00:1f.1
925 12:07:11.519139 PCI: 00:1f.4
926 12:07:11.519212 PCI: 00:1f.6
927 12:07:11.522535 PCI: 00:1f.7
928 12:07:11.525614 PCI: Check your devicetree.cb.
929 12:07:11.525716 PCI: 00:02.0 scanning...
930 12:07:11.528996 scan_generic_bus for PCI: 00:02.0
931 12:07:11.535793 scan_generic_bus for PCI: 00:02.0 done
932 12:07:11.539313 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
933 12:07:11.542533 PCI: 00:04.0 scanning...
934 12:07:11.546010 scan_generic_bus for PCI: 00:04.0
935 12:07:11.549350 GENERIC: 0.0 enabled
936 12:07:11.552787 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
937 12:07:11.559189 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
938 12:07:11.562476 PCI: 00:0d.0 scanning...
939 12:07:11.565986 scan_static_bus for PCI: 00:0d.0
940 12:07:11.566469 USB0 port 0 enabled
941 12:07:11.569390 USB0 port 0 scanning...
942 12:07:11.572841 scan_static_bus for USB0 port 0
943 12:07:11.575854 USB3 port 0 enabled
944 12:07:11.576453 USB3 port 1 enabled
945 12:07:11.579088 USB3 port 2 disabled
946 12:07:11.582407 USB3 port 3 disabled
947 12:07:11.583035 USB3 port 0 scanning...
948 12:07:11.585731 scan_static_bus for USB3 port 0
949 12:07:11.589107 scan_static_bus for USB3 port 0 done
950 12:07:11.592127
951 12:07:11.595521 scan_bus: bus USB3 port 0 finished in 6 msecs
952 12:07:11.598820 USB3 port 1 scanning...
953 12:07:11.602279 scan_static_bus for USB3 port 1
954 12:07:11.605749 scan_static_bus for USB3 port 1 done
955 12:07:11.608673 scan_bus: bus USB3 port 1 finished in 6 msecs
956 12:07:11.612324 scan_static_bus for USB0 port 0 done
957 12:07:11.618986 scan_bus: bus USB0 port 0 finished in 43 msecs
958 12:07:11.622301 scan_static_bus for PCI: 00:0d.0 done
959 12:07:11.625532 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
960 12:07:11.628525 PCI: 00:14.0 scanning...
961 12:07:11.632057 scan_static_bus for PCI: 00:14.0
962 12:07:11.635211 USB0 port 0 enabled
963 12:07:11.635468 USB0 port 0 scanning...
964 12:07:11.639057 scan_static_bus for USB0 port 0
965 12:07:11.642424 USB2 port 0 disabled
966 12:07:11.645685 USB2 port 1 enabled
967 12:07:11.645922 USB2 port 2 enabled
968 12:07:11.649030 USB2 port 3 disabled
969 12:07:11.652518 USB2 port 4 enabled
970 12:07:11.652757 USB2 port 5 disabled
971 12:07:11.655725 USB2 port 6 disabled
972 12:07:11.658929 USB2 port 7 disabled
973 12:07:11.659155 USB2 port 8 disabled
974 12:07:11.662156 USB2 port 9 disabled
975 12:07:11.662389 USB3 port 0 disabled
976 12:07:11.665754 USB3 port 1 enabled
977 12:07:11.669112 USB3 port 2 disabled
978 12:07:11.669353 USB3 port 3 disabled
979 12:07:11.672110 USB2 port 1 scanning...
980 12:07:11.675447 scan_static_bus for USB2 port 1
981 12:07:11.678921 scan_static_bus for USB2 port 1 done
982 12:07:11.685720 scan_bus: bus USB2 port 1 finished in 6 msecs
983 12:07:11.685958 USB2 port 2 scanning...
984 12:07:11.689281 scan_static_bus for USB2 port 2
985 12:07:11.695398 scan_static_bus for USB2 port 2 done
986 12:07:11.699074 scan_bus: bus USB2 port 2 finished in 6 msecs
987 12:07:11.701863 USB2 port 4 scanning...
988 12:07:11.705485 scan_static_bus for USB2 port 4
989 12:07:11.708565 scan_static_bus for USB2 port 4 done
990 12:07:11.712201 scan_bus: bus USB2 port 4 finished in 6 msecs
991 12:07:11.715316 USB3 port 1 scanning...
992 12:07:11.718657 scan_static_bus for USB3 port 1
993 12:07:11.722349 scan_static_bus for USB3 port 1 done
994 12:07:11.725710 scan_bus: bus USB3 port 1 finished in 6 msecs
995 12:07:11.732206 scan_static_bus for USB0 port 0 done
996 12:07:11.735466 scan_bus: bus USB0 port 0 finished in 93 msecs
997 12:07:11.738655 scan_static_bus for PCI: 00:14.0 done
998 12:07:11.745291 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
999 12:07:11.745730 PCI: 00:14.3 scanning...
1000 12:07:11.748565 scan_static_bus for PCI: 00:14.3
1001 12:07:11.752036 GENERIC: 0.0 enabled
1002 12:07:11.755265 scan_static_bus for PCI: 00:14.3 done
1003 12:07:11.762052 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1004 12:07:11.762495 PCI: 00:15.0 scanning...
1005 12:07:11.768710 scan_static_bus for PCI: 00:15.0
1006 12:07:11.769170 I2C: 00:1a enabled
1007 12:07:11.772559 I2C: 00:31 enabled
1008 12:07:11.773010 I2C: 00:32 enabled
1009 12:07:11.775939 scan_static_bus for PCI: 00:15.0 done
1010 12:07:11.782551 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1011 12:07:11.783028 PCI: 00:15.1 scanning...
1012 12:07:11.786006 scan_static_bus for PCI: 00:15.1
1013 12:07:11.789589 I2C: 00:10 enabled
1014 12:07:11.792651 scan_static_bus for PCI: 00:15.1 done
1015 12:07:11.799175 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1016 12:07:11.799416 PCI: 00:15.2 scanning...
1017 12:07:11.802642 scan_static_bus for PCI: 00:15.2
1018 12:07:11.809022 scan_static_bus for PCI: 00:15.2 done
1019 12:07:11.812274 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1020 12:07:11.815687 PCI: 00:15.3 scanning...
1021 12:07:11.819097 scan_static_bus for PCI: 00:15.3
1022 12:07:11.822094 scan_static_bus for PCI: 00:15.3 done
1023 12:07:11.825455 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1024 12:07:11.829064 PCI: 00:19.1 scanning...
1025 12:07:11.832256 scan_static_bus for PCI: 00:19.1
1026 12:07:11.835362 I2C: 00:15 enabled
1027 12:07:11.839026 scan_static_bus for PCI: 00:19.1 done
1028 12:07:11.842412 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1029 12:07:11.845310 PCI: 00:1d.0 scanning...
1030 12:07:11.848724 do_pci_scan_bridge for PCI: 00:1d.0
1031 12:07:11.852030 PCI: pci_scan_bus for bus 01
1032 12:07:11.855374 PCI: 01:00.0 [1c5c/174a] enabled
1033 12:07:11.858905 GENERIC: 0.0 enabled
1034 12:07:11.861878 Enabling Common Clock Configuration
1035 12:07:11.865685 L1 Sub-State supported from root port 29
1036 12:07:11.868871 L1 Sub-State Support = 0xf
1037 12:07:11.871979 CommonModeRestoreTime = 0x28
1038 12:07:11.875359 Power On Value = 0x16, Power On Scale = 0x0
1039 12:07:11.878534 ASPM: Enabled L1
1040 12:07:11.882059 PCIe: Max_Payload_Size adjusted to 128
1041 12:07:11.885625 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1042 12:07:11.888667
1043 12:07:11.888885 PCI: 00:1e.2 scanning...
1044 12:07:11.892085 scan_generic_bus for PCI: 00:1e.2
1045 12:07:11.895392 SPI: 00 enabled
1046 12:07:11.902553 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1047 12:07:11.905655 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1048 12:07:11.908864 PCI: 00:1e.3 scanning...
1049 12:07:11.912187 scan_generic_bus for PCI: 00:1e.3
1050 12:07:11.912647 SPI: 00 enabled
1051 12:07:11.918964 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1052 12:07:11.925748 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1053 12:07:11.926235 PCI: 00:1f.0 scanning...
1054 12:07:11.929055
1055 12:07:11.932133 scan_static_bus for PCI: 00:1f.0
1056 12:07:11.932598 PNP: 0c09.0 enabled
1057 12:07:11.935510 PNP: 0c09.0 scanning...
1058 12:07:11.938706 scan_static_bus for PNP: 0c09.0
1059 12:07:11.941943 scan_static_bus for PNP: 0c09.0 done
1060 12:07:11.945117 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1061 12:07:11.948637
1062 12:07:11.951571 scan_static_bus for PCI: 00:1f.0 done
1063 12:07:11.954787 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1064 12:07:11.958270 PCI: 00:1f.2 scanning...
1065 12:07:11.961643 scan_static_bus for PCI: 00:1f.2
1066 12:07:11.965220 GENERIC: 0.0 enabled
1067 12:07:11.965390 GENERIC: 0.0 scanning...
1068 12:07:11.968241 scan_static_bus for GENERIC: 0.0
1069 12:07:11.971739 GENERIC: 0.0 enabled
1070 12:07:11.975059 GENERIC: 1.0 enabled
1071 12:07:11.978255 scan_static_bus for GENERIC: 0.0 done
1072 12:07:11.981583 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1073 12:07:11.985166 scan_static_bus for PCI: 00:1f.2 done
1074 12:07:11.991596 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1075 12:07:11.994852 PCI: 00:1f.3 scanning...
1076 12:07:11.998418 scan_static_bus for PCI: 00:1f.3
1077 12:07:12.001507 scan_static_bus for PCI: 00:1f.3 done
1078 12:07:12.004843 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1079 12:07:12.008318 PCI: 00:1f.5 scanning...
1080 12:07:12.011496 scan_generic_bus for PCI: 00:1f.5
1081 12:07:12.015049 scan_generic_bus for PCI: 00:1f.5 done
1082 12:07:12.021573 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1083 12:07:12.024748 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1084 12:07:12.028098 scan_static_bus for Root Device done
1085 12:07:12.034780 scan_bus: bus Root Device finished in 736 msecs
1086 12:07:12.034979 done
1087 12:07:12.041301 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1088 12:07:12.044702 Chrome EC: UHEPI supported
1089 12:07:12.051596 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1090 12:07:12.054779 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1091 12:07:12.061655 SPI flash protection: WPSW=0 SRP0=0
1092 12:07:12.065084 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1093 12:07:12.071436 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1094 12:07:12.074841 found VGA at PCI: 00:02.0
1095 12:07:12.078477 Setting up VGA for PCI: 00:02.0
1096 12:07:12.081458 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1097 12:07:12.088000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1098 12:07:12.088443 Allocating resources...
1099 12:07:12.091416 Reading resources...
1100 12:07:12.094777 Root Device read_resources bus 0 link: 0
1101 12:07:12.101700 DOMAIN: 0000 read_resources bus 0 link: 0
1102 12:07:12.104565 PCI: 00:04.0 read_resources bus 1 link: 0
1103 12:07:12.111347 PCI: 00:04.0 read_resources bus 1 link: 0 done
1104 12:07:12.114648 PCI: 00:0d.0 read_resources bus 0 link: 0
1105 12:07:12.117741 USB0 port 0 read_resources bus 0 link: 0
1106 12:07:12.125307 USB0 port 0 read_resources bus 0 link: 0 done
1107 12:07:12.128512 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1108 12:07:12.134868 PCI: 00:14.0 read_resources bus 0 link: 0
1109 12:07:12.138254 USB0 port 0 read_resources bus 0 link: 0
1110 12:07:12.145276 USB0 port 0 read_resources bus 0 link: 0 done
1111 12:07:12.148323 PCI: 00:14.0 read_resources bus 0 link: 0 done
1112 12:07:12.155021 PCI: 00:14.3 read_resources bus 0 link: 0
1113 12:07:12.158554 PCI: 00:14.3 read_resources bus 0 link: 0 done
1114 12:07:12.165243 PCI: 00:15.0 read_resources bus 0 link: 0
1115 12:07:12.168616 PCI: 00:15.0 read_resources bus 0 link: 0 done
1116 12:07:12.175255 PCI: 00:15.1 read_resources bus 0 link: 0
1117 12:07:12.178153 PCI: 00:15.1 read_resources bus 0 link: 0 done
1118 12:07:12.185419 PCI: 00:19.1 read_resources bus 0 link: 0
1119 12:07:12.188798 PCI: 00:19.1 read_resources bus 0 link: 0 done
1120 12:07:12.195280 PCI: 00:1d.0 read_resources bus 1 link: 0
1121 12:07:12.198546 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1122 12:07:12.205294 PCI: 00:1e.2 read_resources bus 2 link: 0
1123 12:07:12.208807 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1124 12:07:12.215144 PCI: 00:1e.3 read_resources bus 3 link: 0
1125 12:07:12.219096 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1126 12:07:12.225272 PCI: 00:1f.0 read_resources bus 0 link: 0
1127 12:07:12.228436 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1128 12:07:12.231715 PCI: 00:1f.2 read_resources bus 0 link: 0
1129 12:07:12.238668 GENERIC: 0.0 read_resources bus 0 link: 0
1130 12:07:12.241766 GENERIC: 0.0 read_resources bus 0 link: 0 done
1131 12:07:12.248118 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1132 12:07:12.254654 DOMAIN: 0000 read_resources bus 0 link: 0 done
1133 12:07:12.258069 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1134 12:07:12.265000 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1135 12:07:12.268115 Root Device read_resources bus 0 link: 0 done
1136 12:07:12.271502 Done reading resources.
1137 12:07:12.274717 Show resources in subtree (Root Device)...After reading.
1138 12:07:12.281729 Root Device child on link 0 DOMAIN: 0000
1139 12:07:12.284743 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1140 12:07:12.294909 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1141 12:07:12.304743 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1142 12:07:12.304925 PCI: 00:00.0
1143 12:07:12.314612 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1144 12:07:12.325157 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1145 12:07:12.334815 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1146 12:07:12.344806 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1147 12:07:12.351381 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1148 12:07:12.354776
1149 12:07:12.361662 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1150 12:07:12.371594 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1151 12:07:12.381664 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1152 12:07:12.391484 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1153 12:07:12.401390 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1154 12:07:12.408076 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1155 12:07:12.417929 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1156 12:07:12.427682 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1157 12:07:12.437974 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1158 12:07:12.447713 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1159 12:07:12.454539 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1160 12:07:12.464502 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1161 12:07:12.474484 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1162 12:07:12.484003 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1163 12:07:12.494249 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1164 12:07:12.494602 PCI: 00:02.0
1165 12:07:12.497306
1166 12:07:12.507644 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1167 12:07:12.517059 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1168 12:07:12.524064 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1169 12:07:12.530687 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1170 12:07:12.540641 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1171 12:07:12.540734 GENERIC: 0.0
1172 12:07:12.543833 PCI: 00:05.0
1173 12:07:12.553619 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1174 12:07:12.556948 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1175 12:07:12.560223 GENERIC: 0.0
1176 12:07:12.560306 PCI: 00:08.0
1177 12:07:12.570572 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 12:07:12.574326 PCI: 00:0a.0
1179 12:07:12.577149 PCI: 00:0d.0 child on link 0 USB0 port 0
1180 12:07:12.586819 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1181 12:07:12.590412 USB0 port 0 child on link 0 USB3 port 0
1182 12:07:12.593647 USB3 port 0
1183 12:07:12.593738 USB3 port 1
1184 12:07:12.596956 USB3 port 2
1185 12:07:12.597042 USB3 port 3
1186 12:07:12.603626 PCI: 00:14.0 child on link 0 USB0 port 0
1187 12:07:12.613645 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1188 12:07:12.616697 USB0 port 0 child on link 0 USB2 port 0
1189 12:07:12.620180 USB2 port 0
1190 12:07:12.620269 USB2 port 1
1191 12:07:12.623520 USB2 port 2
1192 12:07:12.623613 USB2 port 3
1193 12:07:12.626750 USB2 port 4
1194 12:07:12.626831 USB2 port 5
1195 12:07:12.630190 USB2 port 6
1196 12:07:12.630271 USB2 port 7
1197 12:07:12.633404 USB2 port 8
1198 12:07:12.633487 USB2 port 9
1199 12:07:12.636579 USB3 port 0
1200 12:07:12.636657 USB3 port 1
1201 12:07:12.640199
1202 12:07:12.640290 USB3 port 2
1203 12:07:12.643403 USB3 port 3
1204 12:07:12.643491 PCI: 00:14.2
1205 12:07:12.653186 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1206 12:07:12.663283 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1207 12:07:12.666643 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1208 12:07:12.676403 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1209 12:07:12.680060 GENERIC: 0.0
1210 12:07:12.683157 PCI: 00:15.0 child on link 0 I2C: 00:1a
1211 12:07:12.693048 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 12:07:12.696519 I2C: 00:1a
1213 12:07:12.696618 I2C: 00:31
1214 12:07:12.699991 I2C: 00:32
1215 12:07:12.703192 PCI: 00:15.1 child on link 0 I2C: 00:10
1216 12:07:12.713045 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 12:07:12.713183 I2C: 00:10
1218 12:07:12.716516 PCI: 00:15.2
1219 12:07:12.726192 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 12:07:12.726336 PCI: 00:15.3
1221 12:07:12.736207 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 12:07:12.739676 PCI: 00:16.0
1223 12:07:12.749501 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 12:07:12.749629 PCI: 00:19.0
1225 12:07:12.756484 PCI: 00:19.1 child on link 0 I2C: 00:15
1226 12:07:12.766230 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 12:07:12.766365 I2C: 00:15
1228 12:07:12.769844 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1229 12:07:12.773163
1230 12:07:12.779617 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1231 12:07:12.789707 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1232 12:07:12.799425 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1233 12:07:12.799538 GENERIC: 0.0
1234 12:07:12.803084 PCI: 01:00.0
1235 12:07:12.812940 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 12:07:12.822592 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1237 12:07:12.829628 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1238 12:07:12.832853
1239 12:07:12.832957 PCI: 00:1e.0
1240 12:07:12.842499 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1241 12:07:12.849258 PCI: 00:1e.2 child on link 0 SPI: 00
1242 12:07:12.859229 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:07:12.859348 SPI: 00
1244 12:07:12.862488 PCI: 00:1e.3 child on link 0 SPI: 00
1245 12:07:12.872359 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 12:07:12.875718 SPI: 00
1247 12:07:12.879330 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1248 12:07:12.886273 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1249 12:07:12.889291 PNP: 0c09.0
1250 12:07:12.898899 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1251 12:07:12.902489 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1252 12:07:12.912390 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1253 12:07:12.922518 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1254 12:07:12.925664 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1255 12:07:12.929089 GENERIC: 0.0
1256 12:07:12.929179 GENERIC: 1.0
1257 12:07:12.932131 PCI: 00:1f.3
1258 12:07:12.942449 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 12:07:12.952436 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1260 12:07:12.952571 PCI: 00:1f.5
1261 12:07:12.962244 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1262 12:07:12.965695 CPU_CLUSTER: 0 child on link 0 APIC: 00
1263 12:07:12.968865 APIC: 00
1264 12:07:12.968951 APIC: 01
1265 12:07:12.969025 APIC: 03
1266 12:07:12.972072 APIC: 05
1267 12:07:12.972166 APIC: 07
1268 12:07:12.972250 APIC: 06
1269 12:07:12.975384 APIC: 02
1270 12:07:12.975466 APIC: 04
1271 12:07:12.985471 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1272 12:07:12.988769 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1273 12:07:12.995550 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1274 12:07:13.002005 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1275 12:07:13.005279 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1276 12:07:13.008850 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1277 12:07:13.011859
1278 12:07:13.015418 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1279 12:07:13.021952 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1280 12:07:13.028782 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1281 12:07:13.035227 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1282 12:07:13.038699
1283 12:07:13.045160 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1284 12:07:13.051593 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1285 12:07:13.058223 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1286 12:07:13.064901 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1287 12:07:13.071641 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1288 12:07:13.074697 DOMAIN: 0000: Resource ranges:
1289 12:07:13.078466 * Base: 1000, Size: 800, Tag: 100
1290 12:07:13.081384 * Base: 1900, Size: e700, Tag: 100
1291 12:07:13.084895
1292 12:07:13.088100 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1293 12:07:13.094925 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1294 12:07:13.101685 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1295 12:07:13.108338 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1296 12:07:13.111350
1297 12:07:13.117903 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1298 12:07:13.124832 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1299 12:07:13.131287 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1300 12:07:13.141600 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1301 12:07:13.148140 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1302 12:07:13.154838 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1303 12:07:13.164640 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1304 12:07:13.171155 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1305 12:07:13.178166 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1306 12:07:13.187877 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1307 12:07:13.194468 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1308 12:07:13.201138 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1309 12:07:13.211324 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1310 12:07:13.217841 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1311 12:07:13.224365 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1312 12:07:13.234380 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1313 12:07:13.241178 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1314 12:07:13.247997 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1315 12:07:13.257661 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1316 12:07:13.264266 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1317 12:07:13.270732 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1318 12:07:13.274336 DOMAIN: 0000: Resource ranges:
1319 12:07:13.280980 * Base: 7fc00000, Size: 40400000, Tag: 200
1320 12:07:13.283959 * Base: d0000000, Size: 28000000, Tag: 200
1321 12:07:13.287312 * Base: fa000000, Size: 1000000, Tag: 200
1322 12:07:13.290746 * Base: fb001000, Size: 2fff000, Tag: 200
1323 12:07:13.297352 * Base: fe010000, Size: 2e000, Tag: 200
1324 12:07:13.300913 * Base: fe03f000, Size: d41000, Tag: 200
1325 12:07:13.304031 * Base: fed88000, Size: 8000, Tag: 200
1326 12:07:13.307182 * Base: fed93000, Size: d000, Tag: 200
1327 12:07:13.313966 * Base: feda2000, Size: 1e000, Tag: 200
1328 12:07:13.317261 * Base: fede0000, Size: 1220000, Tag: 200
1329 12:07:13.320645 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1330 12:07:13.330510 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1331 12:07:13.337164 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1332 12:07:13.343885 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1333 12:07:13.350555 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1334 12:07:13.353984 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1335 12:07:13.357210
1336 12:07:13.363672 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1337 12:07:13.370485 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1338 12:07:13.376846 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1339 12:07:13.383802 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1340 12:07:13.390517 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1341 12:07:13.393937 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1342 12:07:13.397241
1343 12:07:13.400245 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1344 12:07:13.403452
1345 12:07:13.406857 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1346 12:07:13.410511
1347 12:07:13.413673 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1348 12:07:13.416761
1349 12:07:13.420105 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1350 12:07:13.423592
1351 12:07:13.427058 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1352 12:07:13.430180
1353 12:07:13.433398 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1354 12:07:13.436934
1355 12:07:13.440386 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1356 12:07:13.443456
1357 12:07:13.446821 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1358 12:07:13.450124
1359 12:07:13.453529 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 12:07:13.456636
1361 12:07:13.460076 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1362 12:07:13.463180
1363 12:07:13.466551 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1364 12:07:13.470228
1365 12:07:13.476717 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1366 12:07:13.483148 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1367 12:07:13.486576 PCI: 00:1d.0: Resource ranges:
1368 12:07:13.489949 * Base: 7fc00000, Size: 100000, Tag: 200
1369 12:07:13.496554 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1370 12:07:13.503168 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1371 12:07:13.509574 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1372 12:07:13.519667 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1373 12:07:13.526238 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1374 12:07:13.529798 Root Device assign_resources, bus 0 link: 0
1375 12:07:13.536384 DOMAIN: 0000 assign_resources, bus 0 link: 0
1376 12:07:13.542834 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1377 12:07:13.552984 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1378 12:07:13.559371 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1379 12:07:13.569470 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1380 12:07:13.572520 PCI: 00:04.0 assign_resources, bus 1 link: 0
1381 12:07:13.579669 PCI: 00:04.0 assign_resources, bus 1 link: 0
1382 12:07:13.585827 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1383 12:07:13.595871 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1384 12:07:13.602428 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1385 12:07:13.605439 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1386 12:07:13.612277 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1387 12:07:13.618651 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1388 12:07:13.625388 PCI: 00:14.0 assign_resources, bus 0 link: 0
1389 12:07:13.629060 PCI: 00:14.0 assign_resources, bus 0 link: 0
1390 12:07:13.638814 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1391 12:07:13.645140 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1392 12:07:13.655107 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1393 12:07:13.658933 PCI: 00:14.3 assign_resources, bus 0 link: 0
1394 12:07:13.661771 PCI: 00:14.3 assign_resources, bus 0 link: 0
1395 12:07:13.671930 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1396 12:07:13.675128 PCI: 00:15.0 assign_resources, bus 0 link: 0
1397 12:07:13.681587 PCI: 00:15.0 assign_resources, bus 0 link: 0
1398 12:07:13.688352 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1399 12:07:13.691531 PCI: 00:15.1 assign_resources, bus 0 link: 0
1400 12:07:13.698303 PCI: 00:15.1 assign_resources, bus 0 link: 0
1401 12:07:13.705060 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1402 12:07:13.714814 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1403 12:07:13.721574 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1404 12:07:13.731734 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1405 12:07:13.734900 PCI: 00:19.1 assign_resources, bus 0 link: 0
1406 12:07:13.741422 PCI: 00:19.1 assign_resources, bus 0 link: 0
1407 12:07:13.748075 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1408 12:07:13.757874 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1409 12:07:13.767869 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1410 12:07:13.771317 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1411 12:07:13.781297 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1412 12:07:13.787672 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1413 12:07:13.794565 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1414 12:07:13.801172 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 12:07:13.807572 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1416 12:07:13.814585 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1417 12:07:13.818000 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1418 12:07:13.827882 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1419 12:07:13.830830 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1420 12:07:13.834362 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1421 12:07:13.841043 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1422 12:07:13.844210 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1423 12:07:13.850943 LPC: Trying to open IO window from 800 size 1ff
1424 12:07:13.857586 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1425 12:07:13.867523 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1426 12:07:13.874206 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1427 12:07:13.877709 DOMAIN: 0000 assign_resources, bus 0 link: 0
1428 12:07:13.880986
1429 12:07:13.884243 Root Device assign_resources, bus 0 link: 0
1430 12:07:13.887393 Done setting resources.
1431 12:07:13.893863 Show resources in subtree (Root Device)...After assigning values.
1432 12:07:13.897238 Root Device child on link 0 DOMAIN: 0000
1433 12:07:13.900825 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1434 12:07:13.910858 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1435 12:07:13.920811 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1436 12:07:13.920902 PCI: 00:00.0
1437 12:07:13.930417 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1438 12:07:13.940668 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1439 12:07:13.950298 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1440 12:07:13.960576 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1441 12:07:13.970787 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1442 12:07:13.980321 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1443 12:07:13.986869 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1444 12:07:13.996980 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1445 12:07:14.007000 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1446 12:07:14.016888 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1447 12:07:14.026782 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1448 12:07:14.033564 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1449 12:07:14.043454 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1450 12:07:14.053445 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1451 12:07:14.063201 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1452 12:07:14.073188 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1453 12:07:14.083192 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1454 12:07:14.089797 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1455 12:07:14.093430
1456 12:07:14.099698 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1457 12:07:14.109959 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1458 12:07:14.112941 PCI: 00:02.0
1459 12:07:14.122907 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1460 12:07:14.133141 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1461 12:07:14.142843 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1462 12:07:14.146475 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1463 12:07:14.155987 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1464 12:07:14.159420 GENERIC: 0.0
1465 12:07:14.159517 PCI: 00:05.0
1466 12:07:14.172704 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1467 12:07:14.176360 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1468 12:07:14.179422 GENERIC: 0.0
1469 12:07:14.179507 PCI: 00:08.0
1470 12:07:14.189636 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1471 12:07:14.192631 PCI: 00:0a.0
1472 12:07:14.195984 PCI: 00:0d.0 child on link 0 USB0 port 0
1473 12:07:14.205923 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1474 12:07:14.209231 USB0 port 0 child on link 0 USB3 port 0
1475 12:07:14.212609 USB3 port 0
1476 12:07:14.216053 USB3 port 1
1477 12:07:14.216139 USB3 port 2
1478 12:07:14.219359 USB3 port 3
1479 12:07:14.222715 PCI: 00:14.0 child on link 0 USB0 port 0
1480 12:07:14.232538 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1481 12:07:14.236058 USB0 port 0 child on link 0 USB2 port 0
1482 12:07:14.239133 USB2 port 0
1483 12:07:14.239235 USB2 port 1
1484 12:07:14.242587 USB2 port 2
1485 12:07:14.242672 USB2 port 3
1486 12:07:14.245984
1487 12:07:14.246070 USB2 port 4
1488 12:07:14.249325 USB2 port 5
1489 12:07:14.249410 USB2 port 6
1490 12:07:14.252369 USB2 port 7
1491 12:07:14.252454 USB2 port 8
1492 12:07:14.256173 USB2 port 9
1493 12:07:14.256259 USB3 port 0
1494 12:07:14.259114 USB3 port 1
1495 12:07:14.259242 USB3 port 2
1496 12:07:14.262336 USB3 port 3
1497 12:07:14.262421 PCI: 00:14.2
1498 12:07:14.272394 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1499 12:07:14.285718 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1500 12:07:14.288891 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1501 12:07:14.299121 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1502 12:07:14.302394 GENERIC: 0.0
1503 12:07:14.305832 PCI: 00:15.0 child on link 0 I2C: 00:1a
1504 12:07:14.315771 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1505 12:07:14.315856 I2C: 00:1a
1506 12:07:14.319103 I2C: 00:31
1507 12:07:14.319181 I2C: 00:32
1508 12:07:14.325813 PCI: 00:15.1 child on link 0 I2C: 00:10
1509 12:07:14.335709 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1510 12:07:14.335797 I2C: 00:10
1511 12:07:14.338741 PCI: 00:15.2
1512 12:07:14.348686 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1513 12:07:14.348777 PCI: 00:15.3
1514 12:07:14.358822 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1515 12:07:14.361904
1516 12:07:14.361992 PCI: 00:16.0
1517 12:07:14.372474 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1518 12:07:14.375361 PCI: 00:19.0
1519 12:07:14.378660 PCI: 00:19.1 child on link 0 I2C: 00:15
1520 12:07:14.388400 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1521 12:07:14.388506 I2C: 00:15
1522 12:07:14.392038
1523 12:07:14.395234 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1524 12:07:14.405341 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1525 12:07:14.415313 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1526 12:07:14.425030 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1527 12:07:14.428383 GENERIC: 0.0
1528 12:07:14.428470 PCI: 01:00.0
1529 12:07:14.441819 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1530 12:07:14.451504 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1531 12:07:14.461633 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1532 12:07:14.461762 PCI: 00:1e.0
1533 12:07:14.475039 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1534 12:07:14.478440 PCI: 00:1e.2 child on link 0 SPI: 00
1535 12:07:14.488346 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1536 12:07:14.488435 SPI: 00
1537 12:07:14.495077 PCI: 00:1e.3 child on link 0 SPI: 00
1538 12:07:14.505154 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1539 12:07:14.505247 SPI: 00
1540 12:07:14.508114 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1541 12:07:14.518146 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1542 12:07:14.518233 PNP: 0c09.0
1543 12:07:14.521477
1544 12:07:14.528163 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1545 12:07:14.531218 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1546 12:07:14.534865
1547 12:07:14.541268 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1548 12:07:14.551477 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1549 12:07:14.554517 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1550 12:07:14.557881
1551 12:07:14.557982 GENERIC: 0.0
1552 12:07:14.561538 GENERIC: 1.0
1553 12:07:14.561623 PCI: 00:1f.3
1554 12:07:14.571483 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1555 12:07:14.581185 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1556 12:07:14.584610 PCI: 00:1f.5
1557 12:07:14.594526 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1558 12:07:14.597815 CPU_CLUSTER: 0 child on link 0 APIC: 00
1559 12:07:14.601377 APIC: 00
1560 12:07:14.601461 APIC: 01
1561 12:07:14.601527 APIC: 03
1562 12:07:14.604701 APIC: 05
1563 12:07:14.604785 APIC: 07
1564 12:07:14.607940 APIC: 06
1565 12:07:14.608024 APIC: 02
1566 12:07:14.608091 APIC: 04
1567 12:07:14.611226 Done allocating resources.
1568 12:07:14.617576 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1569 12:07:14.624540 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1570 12:07:14.627648 Configure GPIOs for I2S audio on UP4.
1571 12:07:14.634849 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1572 12:07:14.637493 Enabling resources...
1573 12:07:14.640886 PCI: 00:00.0 subsystem <- 8086/9a12
1574 12:07:14.644302 PCI: 00:00.0 cmd <- 06
1575 12:07:14.647476 PCI: 00:02.0 subsystem <- 8086/9a40
1576 12:07:14.650833 PCI: 00:02.0 cmd <- 03
1577 12:07:14.654206 PCI: 00:04.0 subsystem <- 8086/9a03
1578 12:07:14.654289 PCI: 00:04.0 cmd <- 02
1579 12:07:14.657440
1580 12:07:14.660885 PCI: 00:05.0 subsystem <- 8086/9a19
1581 12:07:14.660969 PCI: 00:05.0 cmd <- 02
1582 12:07:14.667316 PCI: 00:08.0 subsystem <- 8086/9a11
1583 12:07:14.667400 PCI: 00:08.0 cmd <- 06
1584 12:07:14.670550 PCI: 00:0d.0 subsystem <- 8086/9a13
1585 12:07:14.673900 PCI: 00:0d.0 cmd <- 02
1586 12:07:14.677544 PCI: 00:14.0 subsystem <- 8086/a0ed
1587 12:07:14.680897 PCI: 00:14.0 cmd <- 02
1588 12:07:14.684029 PCI: 00:14.2 subsystem <- 8086/a0ef
1589 12:07:14.687480 PCI: 00:14.2 cmd <- 02
1590 12:07:14.690564 PCI: 00:14.3 subsystem <- 8086/a0f0
1591 12:07:14.694135 PCI: 00:14.3 cmd <- 02
1592 12:07:14.697390 PCI: 00:15.0 subsystem <- 8086/a0e8
1593 12:07:14.700824 PCI: 00:15.0 cmd <- 02
1594 12:07:14.703815 PCI: 00:15.1 subsystem <- 8086/a0e9
1595 12:07:14.703898 PCI: 00:15.1 cmd <- 02
1596 12:07:14.710750 PCI: 00:15.2 subsystem <- 8086/a0ea
1597 12:07:14.710830 PCI: 00:15.2 cmd <- 02
1598 12:07:14.714106 PCI: 00:15.3 subsystem <- 8086/a0eb
1599 12:07:14.717315 PCI: 00:15.3 cmd <- 02
1600 12:07:14.720676 PCI: 00:16.0 subsystem <- 8086/a0e0
1601 12:07:14.724036 PCI: 00:16.0 cmd <- 02
1602 12:07:14.727328 PCI: 00:19.1 subsystem <- 8086/a0c6
1603 12:07:14.730776 PCI: 00:19.1 cmd <- 02
1604 12:07:14.734118 PCI: 00:1d.0 bridge ctrl <- 0013
1605 12:07:14.737456 PCI: 00:1d.0 subsystem <- 8086/a0b0
1606 12:07:14.740872 PCI: 00:1d.0 cmd <- 06
1607 12:07:14.744065 PCI: 00:1e.0 subsystem <- 8086/a0a8
1608 12:07:14.747511 PCI: 00:1e.0 cmd <- 06
1609 12:07:14.750422 PCI: 00:1e.2 subsystem <- 8086/a0aa
1610 12:07:14.753846 PCI: 00:1e.2 cmd <- 06
1611 12:07:14.757104 PCI: 00:1e.3 subsystem <- 8086/a0ab
1612 12:07:14.757181 PCI: 00:1e.3 cmd <- 02
1613 12:07:14.763577 PCI: 00:1f.0 subsystem <- 8086/a087
1614 12:07:14.763657 PCI: 00:1f.0 cmd <- 407
1615 12:07:14.767039 PCI: 00:1f.3 subsystem <- 8086/a0c8
1616 12:07:14.770299 PCI: 00:1f.3 cmd <- 02
1617 12:07:14.773614 PCI: 00:1f.5 subsystem <- 8086/a0a4
1618 12:07:14.777081 PCI: 00:1f.5 cmd <- 406
1619 12:07:14.781482 PCI: 01:00.0 cmd <- 02
1620 12:07:14.786197 done.
1621 12:07:14.789345 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1622 12:07:14.792914 Initializing devices...
1623 12:07:14.795882 Root Device init
1624 12:07:14.799579 Chrome EC: Set SMI mask to 0x0000000000000000
1625 12:07:14.806099 Chrome EC: clear events_b mask to 0x0000000000000000
1626 12:07:14.812837 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1627 12:07:14.816046 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1628 12:07:14.822669 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1629 12:07:14.829332 Chrome EC: Set WAKE mask to 0x0000000000000000
1630 12:07:14.832732 fw_config match found: DB_USB=USB3_ACTIVE
1631 12:07:14.839331 Configure Right Type-C port orientation for retimer
1632 12:07:14.842608 Root Device init finished in 43 msecs
1633 12:07:14.846153 PCI: 00:00.0 init
1634 12:07:14.849040 CPU TDP = 9 Watts
1635 12:07:14.849115 CPU PL1 = 9 Watts
1636 12:07:14.853033 CPU PL2 = 40 Watts
1637 12:07:14.853112 CPU PL4 = 83 Watts
1638 12:07:14.855754 PCI: 00:00.0 init finished in 8 msecs
1639 12:07:14.859300 PCI: 00:02.0 init
1640 12:07:14.862849 GMA: Found VBT in CBFS
1641 12:07:14.865925 GMA: Found valid VBT in CBFS
1642 12:07:14.869705 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1643 12:07:14.879221 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1644 12:07:14.882704 PCI: 00:02.0 init finished in 18 msecs
1645 12:07:14.885829 PCI: 00:05.0 init
1646 12:07:14.889023 PCI: 00:05.0 init finished in 0 msecs
1647 12:07:14.889153 PCI: 00:08.0 init
1648 12:07:14.895666 PCI: 00:08.0 init finished in 0 msecs
1649 12:07:14.895751 PCI: 00:14.0 init
1650 12:07:14.902293 PCI: 00:14.0 init finished in 0 msecs
1651 12:07:14.902381 PCI: 00:14.2 init
1652 12:07:14.905788 PCI: 00:14.2 init finished in 0 msecs
1653 12:07:14.909512 PCI: 00:15.0 init
1654 12:07:14.913106 I2C bus 0 version 0x3230302a
1655 12:07:14.916114 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1656 12:07:14.919670 PCI: 00:15.0 init finished in 6 msecs
1657 12:07:14.922843 PCI: 00:15.1 init
1658 12:07:14.926308 I2C bus 1 version 0x3230302a
1659 12:07:14.929381 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1660 12:07:14.932697 PCI: 00:15.1 init finished in 6 msecs
1661 12:07:14.936307 PCI: 00:15.2 init
1662 12:07:14.936399 I2C bus 2 version 0x3230302a
1663 12:07:14.939537
1664 12:07:14.942885 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1665 12:07:14.946085 PCI: 00:15.2 init finished in 6 msecs
1666 12:07:14.946169 PCI: 00:15.3 init
1667 12:07:14.949450 I2C bus 3 version 0x3230302a
1668 12:07:14.952860 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1669 12:07:14.959179 PCI: 00:15.3 init finished in 6 msecs
1670 12:07:14.959281 PCI: 00:16.0 init
1671 12:07:14.962734 PCI: 00:16.0 init finished in 0 msecs
1672 12:07:14.966271 PCI: 00:19.1 init
1673 12:07:14.969736 I2C bus 5 version 0x3230302a
1674 12:07:14.972836 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1675 12:07:14.976425 PCI: 00:19.1 init finished in 6 msecs
1676 12:07:14.979722 PCI: 00:1d.0 init
1677 12:07:14.983095 Initializing PCH PCIe bridge.
1678 12:07:14.986026 PCI: 00:1d.0 init finished in 3 msecs
1679 12:07:14.989570 PCI: 00:1f.0 init
1680 12:07:14.993106 IOAPIC: Initializing IOAPIC at 0xfec00000
1681 12:07:14.996130 IOAPIC: Bootstrap Processor Local APIC = 0x00
1682 12:07:14.999688
1683 12:07:14.999774 IOAPIC: ID = 0x02
1684 12:07:15.002893 IOAPIC: Dumping registers
1685 12:07:15.006183 reg 0x0000: 0x02000000
1686 12:07:15.006269 reg 0x0001: 0x00770020
1687 12:07:15.009566 reg 0x0002: 0x00000000
1688 12:07:15.012737 PCI: 00:1f.0 init finished in 21 msecs
1689 12:07:15.016466 PCI: 00:1f.2 init
1690 12:07:15.019773 Disabling ACPI via APMC.
1691 12:07:15.023290 APMC done.
1692 12:07:15.026542 PCI: 00:1f.2 init finished in 5 msecs
1693 12:07:15.037425 PCI: 01:00.0 init
1694 12:07:15.040707 PCI: 01:00.0 init finished in 0 msecs
1695 12:07:15.044008 PNP: 0c09.0 init
1696 12:07:15.047613 Google Chrome EC uptime: 8.422 seconds
1697 12:07:15.053943 Google Chrome AP resets since EC boot: 1
1698 12:07:15.057618 Google Chrome most recent AP reset causes:
1699 12:07:15.060394 0.349: 32775 shutdown: entering G3
1700 12:07:15.067265 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1701 12:07:15.070690 PNP: 0c09.0 init finished in 22 msecs
1702 12:07:15.076052 Devices initialized
1703 12:07:15.079727 Show all devs... After init.
1704 12:07:15.082647 Root Device: enabled 1
1705 12:07:15.082732 DOMAIN: 0000: enabled 1
1706 12:07:15.086050 CPU_CLUSTER: 0: enabled 1
1707 12:07:15.089550 PCI: 00:00.0: enabled 1
1708 12:07:15.092440 PCI: 00:02.0: enabled 1
1709 12:07:15.092526 PCI: 00:04.0: enabled 1
1710 12:07:15.095919 PCI: 00:05.0: enabled 1
1711 12:07:15.099276 PCI: 00:06.0: enabled 0
1712 12:07:15.102491 PCI: 00:07.0: enabled 0
1713 12:07:15.102571 PCI: 00:07.1: enabled 0
1714 12:07:15.106039 PCI: 00:07.2: enabled 0
1715 12:07:15.109473 PCI: 00:07.3: enabled 0
1716 12:07:15.112534 PCI: 00:08.0: enabled 1
1717 12:07:15.112612 PCI: 00:09.0: enabled 0
1718 12:07:15.115872 PCI: 00:0a.0: enabled 0
1719 12:07:15.119418 PCI: 00:0d.0: enabled 1
1720 12:07:15.122758 PCI: 00:0d.1: enabled 0
1721 12:07:15.122835 PCI: 00:0d.2: enabled 0
1722 12:07:15.125887 PCI: 00:0d.3: enabled 0
1723 12:07:15.129181 PCI: 00:0e.0: enabled 0
1724 12:07:15.129267 PCI: 00:10.2: enabled 1
1725 12:07:15.132598 PCI: 00:10.6: enabled 0
1726 12:07:15.135983 PCI: 00:10.7: enabled 0
1727 12:07:15.139430 PCI: 00:12.0: enabled 0
1728 12:07:15.139515 PCI: 00:12.6: enabled 0
1729 12:07:15.142612 PCI: 00:13.0: enabled 0
1730 12:07:15.145798 PCI: 00:14.0: enabled 1
1731 12:07:15.149027 PCI: 00:14.1: enabled 0
1732 12:07:15.149112 PCI: 00:14.2: enabled 1
1733 12:07:15.152436 PCI: 00:14.3: enabled 1
1734 12:07:15.155824 PCI: 00:15.0: enabled 1
1735 12:07:15.159096 PCI: 00:15.1: enabled 1
1736 12:07:15.159227 PCI: 00:15.2: enabled 1
1737 12:07:15.162403 PCI: 00:15.3: enabled 1
1738 12:07:15.165837 PCI: 00:16.0: enabled 1
1739 12:07:15.165923 PCI: 00:16.1: enabled 0
1740 12:07:15.169026 PCI: 00:16.2: enabled 0
1741 12:07:15.172486 PCI: 00:16.3: enabled 0
1742 12:07:15.175593 PCI: 00:16.4: enabled 0
1743 12:07:15.175696 PCI: 00:16.5: enabled 0
1744 12:07:15.179053 PCI: 00:17.0: enabled 0
1745 12:07:15.182385 PCI: 00:19.0: enabled 0
1746 12:07:15.186040 PCI: 00:19.1: enabled 1
1747 12:07:15.186125 PCI: 00:19.2: enabled 0
1748 12:07:15.188990 PCI: 00:1c.0: enabled 1
1749 12:07:15.192325 PCI: 00:1c.1: enabled 0
1750 12:07:15.195509 PCI: 00:1c.2: enabled 0
1751 12:07:15.195587 PCI: 00:1c.3: enabled 0
1752 12:07:15.199043 PCI: 00:1c.4: enabled 0
1753 12:07:15.202254 PCI: 00:1c.5: enabled 0
1754 12:07:15.202332 PCI: 00:1c.6: enabled 1
1755 12:07:15.205875
1756 12:07:15.205953 PCI: 00:1c.7: enabled 0
1757 12:07:15.208989 PCI: 00:1d.0: enabled 1
1758 12:07:15.212404 PCI: 00:1d.1: enabled 0
1759 12:07:15.212482 PCI: 00:1d.2: enabled 1
1760 12:07:15.215513 PCI: 00:1d.3: enabled 0
1761 12:07:15.219115 PCI: 00:1e.0: enabled 1
1762 12:07:15.222131 PCI: 00:1e.1: enabled 0
1763 12:07:15.222214 PCI: 00:1e.2: enabled 1
1764 12:07:15.225964 PCI: 00:1e.3: enabled 1
1765 12:07:15.228987 PCI: 00:1f.0: enabled 1
1766 12:07:15.232284 PCI: 00:1f.1: enabled 0
1767 12:07:15.232368 PCI: 00:1f.2: enabled 1
1768 12:07:15.235475 PCI: 00:1f.3: enabled 1
1769 12:07:15.238712 PCI: 00:1f.4: enabled 0
1770 12:07:15.242268 PCI: 00:1f.5: enabled 1
1771 12:07:15.242344 PCI: 00:1f.6: enabled 0
1772 12:07:15.245334 PCI: 00:1f.7: enabled 0
1773 12:07:15.248822 APIC: 00: enabled 1
1774 12:07:15.248906 GENERIC: 0.0: enabled 1
1775 12:07:15.251995 GENERIC: 0.0: enabled 1
1776 12:07:15.255425 GENERIC: 1.0: enabled 1
1777 12:07:15.258909 GENERIC: 0.0: enabled 1
1778 12:07:15.259024 GENERIC: 1.0: enabled 1
1779 12:07:15.262036 USB0 port 0: enabled 1
1780 12:07:15.265392 GENERIC: 0.0: enabled 1
1781 12:07:15.265477 USB0 port 0: enabled 1
1782 12:07:15.268671 GENERIC: 0.0: enabled 1
1783 12:07:15.272186 I2C: 00:1a: enabled 1
1784 12:07:15.275462 I2C: 00:31: enabled 1
1785 12:07:15.275563 I2C: 00:32: enabled 1
1786 12:07:15.279182 I2C: 00:10: enabled 1
1787 12:07:15.282123 I2C: 00:15: enabled 1
1788 12:07:15.282209 GENERIC: 0.0: enabled 0
1789 12:07:15.285508 GENERIC: 1.0: enabled 0
1790 12:07:15.288985 GENERIC: 0.0: enabled 1
1791 12:07:15.289061 SPI: 00: enabled 1
1792 12:07:15.291889 SPI: 00: enabled 1
1793 12:07:15.295477 PNP: 0c09.0: enabled 1
1794 12:07:15.295556 GENERIC: 0.0: enabled 1
1795 12:07:15.298796 USB3 port 0: enabled 1
1796 12:07:15.302061 USB3 port 1: enabled 1
1797 12:07:15.302138 USB3 port 2: enabled 0
1798 12:07:15.305553 USB3 port 3: enabled 0
1799 12:07:15.308781 USB2 port 0: enabled 0
1800 12:07:15.311965 USB2 port 1: enabled 1
1801 12:07:15.312051 USB2 port 2: enabled 1
1802 12:07:15.315582 USB2 port 3: enabled 0
1803 12:07:15.318616 USB2 port 4: enabled 1
1804 12:07:15.318701 USB2 port 5: enabled 0
1805 12:07:15.321780 USB2 port 6: enabled 0
1806 12:07:15.325084 USB2 port 7: enabled 0
1807 12:07:15.328917 USB2 port 8: enabled 0
1808 12:07:15.329003 USB2 port 9: enabled 0
1809 12:07:15.331788 USB3 port 0: enabled 0
1810 12:07:15.335132 USB3 port 1: enabled 1
1811 12:07:15.335216 USB3 port 2: enabled 0
1812 12:07:15.338556 USB3 port 3: enabled 0
1813 12:07:15.341964 GENERIC: 0.0: enabled 1
1814 12:07:15.345395 GENERIC: 1.0: enabled 1
1815 12:07:15.345480 APIC: 01: enabled 1
1816 12:07:15.348593 APIC: 03: enabled 1
1817 12:07:15.348677 APIC: 05: enabled 1
1818 12:07:15.351673 APIC: 07: enabled 1
1819 12:07:15.355404 APIC: 06: enabled 1
1820 12:07:15.355503 APIC: 02: enabled 1
1821 12:07:15.358735 APIC: 04: enabled 1
1822 12:07:15.361953 PCI: 01:00.0: enabled 1
1823 12:07:15.365417 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1824 12:07:15.371804 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1825 12:07:15.375292 ELOG: NV offset 0xf30000 size 0x1000
1826 12:07:15.381659 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1827 12:07:15.388139 ELOG: Event(17) added with size 13 at 2023-01-24 12:07:13 UTC
1828 12:07:15.394845 ELOG: Event(92) added with size 9 at 2023-01-24 12:07:13 UTC
1829 12:07:15.401712 ELOG: Event(93) added with size 9 at 2023-01-24 12:07:13 UTC
1830 12:07:15.408175 ELOG: Event(9E) added with size 10 at 2023-01-24 12:07:13 UTC
1831 12:07:15.415197 ELOG: Event(9F) added with size 14 at 2023-01-24 12:07:13 UTC
1832 12:07:15.418465 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1833 12:07:15.421429
1834 12:07:15.424753 ELOG: Event(A1) added with size 10 at 2023-01-24 12:07:13 UTC
1835 12:07:15.435102 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1836 12:07:15.441554 ELOG: Event(A0) added with size 9 at 2023-01-24 12:07:13 UTC
1837 12:07:15.444969 elog_add_boot_reason: Logged dev mode boot
1838 12:07:15.451681 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1839 12:07:15.451785 Finalize devices...
1840 12:07:15.455124 Devices finalized
1841 12:07:15.458006 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1842 12:07:15.461464
1843 12:07:15.464864 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1844 12:07:15.471491 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1845 12:07:15.474654 ME: HFSTS1 : 0x80030055
1846 12:07:15.478181 ME: HFSTS2 : 0x30280116
1847 12:07:15.481223
1848 12:07:15.484727 ME: HFSTS3 : 0x00000050
1849 12:07:15.487851 ME: HFSTS4 : 0x00004000
1850 12:07:15.494474 ME: HFSTS5 : 0x00000000
1851 12:07:15.498074 ME: HFSTS6 : 0x00400006
1852 12:07:15.501428 ME: Manufacturing Mode : YES
1853 12:07:15.504327 ME: SPI Protection Mode Enabled : NO
1854 12:07:15.507678 ME: FW Partition Table : OK
1855 12:07:15.511094 ME: Bringup Loader Failure : NO
1856 12:07:15.517868 ME: Firmware Init Complete : NO
1857 12:07:15.521377 ME: Boot Options Present : NO
1858 12:07:15.524609 ME: Update In Progress : NO
1859 12:07:15.527655 ME: D0i3 Support : YES
1860 12:07:15.530867 ME: Low Power State Enabled : NO
1861 12:07:15.534565 ME: CPU Replaced : YES
1862 12:07:15.537850 ME: CPU Replacement Valid : YES
1863 12:07:15.540887 ME: Current Working State : 5
1864 12:07:15.544401 ME: Current Operation State : 1
1865 12:07:15.547897
1866 12:07:15.551145 ME: Current Operation Mode : 3
1867 12:07:15.554219 ME: Error Code : 0
1868 12:07:15.557923 ME: Enhanced Debug Mode : NO
1869 12:07:15.560893 ME: CPU Debug Disabled : YES
1870 12:07:15.564335 ME: TXT Support : NO
1871 12:07:15.570770 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1872 12:07:15.577559 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1873 12:07:15.580637 CBFS: 'fallback/slic' not found.
1874 12:07:15.584273 ACPI: Writing ACPI tables at 76b01000.
1875 12:07:15.587364 ACPI: * FACS
1876 12:07:15.587445 ACPI: * DSDT
1877 12:07:15.591034 Ramoops buffer: 0x100000@0x76a00000.
1878 12:07:15.593968
1879 12:07:15.597466 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1880 12:07:15.600696 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1881 12:07:15.605266 Google Chrome EC: version:
1882 12:07:15.608269 ro: voema_v2.0.7540-147f8d37d1
1883 12:07:15.611752 rw: voema_v2.0.7540-147f8d37d1
1884 12:07:15.615169 running image: 2
1885 12:07:15.621799 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1886 12:07:15.624779 ACPI: * FADT
1887 12:07:15.624864 SCI is IRQ9
1888 12:07:15.628426 ACPI: added table 1/32, length now 40
1889 12:07:15.631494 ACPI: * SSDT
1890 12:07:15.634820 Found 1 CPU(s) with 8 core(s) each.
1891 12:07:15.638506 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1892 12:07:15.644875 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1893 12:07:15.648132 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1894 12:07:15.651426 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1895 12:07:15.658333 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1896 12:07:15.664819 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1897 12:07:15.668190 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1898 12:07:15.674820 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1899 12:07:15.681378 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1900 12:07:15.685139 \_SB.PCI0.RP09: Added StorageD3Enable property
1901 12:07:15.688004 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1902 12:07:15.694663 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1903 12:07:15.698445 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1904 12:07:15.701402
1905 12:07:15.705116 PS2K: Passing 80 keymaps to kernel
1906 12:07:15.711410 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1907 12:07:15.718191 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1908 12:07:15.721382 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1909 12:07:15.724546
1910 12:07:15.727946 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1911 12:07:15.734543 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1912 12:07:15.741205 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1913 12:07:15.747700 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1914 12:07:15.754659 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1915 12:07:15.761277 ACPI: added table 2/32, length now 44
1916 12:07:15.761366 ACPI: * MCFG
1917 12:07:15.764288 ACPI: added table 3/32, length now 48
1918 12:07:15.767655 ACPI: * TPM2
1919 12:07:15.771001 TPM2 log created at 0x769f0000
1920 12:07:15.774345 ACPI: added table 4/32, length now 52
1921 12:07:15.774446 ACPI: * MADT
1922 12:07:15.777674 SCI is IRQ9
1923 12:07:15.781258 ACPI: added table 5/32, length now 56
1924 12:07:15.781345 current = 76b09850
1925 12:07:15.784391 ACPI: * DMAR
1926 12:07:15.787998 ACPI: added table 6/32, length now 60
1927 12:07:15.791137 ACPI: added table 7/32, length now 64
1928 12:07:15.794344 ACPI: * HPET
1929 12:07:15.797619 ACPI: added table 8/32, length now 68
1930 12:07:15.797705 ACPI: done.
1931 12:07:15.800985 ACPI tables: 35216 bytes.
1932 12:07:15.804327 smbios_write_tables: 769ef000
1933 12:07:15.807588 EC returned error result code 3
1934 12:07:15.810919 Couldn't obtain OEM name from CBI
1935 12:07:15.814417 Create SMBIOS type 16
1936 12:07:15.814503 Create SMBIOS type 17
1937 12:07:15.817660
1938 12:07:15.817746 GENERIC: 0.0 (WIFI Device)
1939 12:07:15.820958 SMBIOS tables: 1750 bytes.
1940 12:07:15.824374 Writing table forward entry at 0x00000500
1941 12:07:15.831007 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1942 12:07:15.834294 Writing coreboot table at 0x76b25000
1943 12:07:15.840912 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1944 12:07:15.844093 1. 0000000000001000-000000000009ffff: RAM
1945 12:07:15.847630
1946 12:07:15.851006 2. 00000000000a0000-00000000000fffff: RESERVED
1947 12:07:15.854142 3. 0000000000100000-00000000769eefff: RAM
1948 12:07:15.861063 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1949 12:07:15.864115 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1950 12:07:15.870817 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1951 12:07:15.877333 7. 0000000077000000-000000007fbfffff: RESERVED
1952 12:07:15.880729 8. 00000000c0000000-00000000cfffffff: RESERVED
1953 12:07:15.887088 9. 00000000f8000000-00000000f9ffffff: RESERVED
1954 12:07:15.890738 10. 00000000fb000000-00000000fb000fff: RESERVED
1955 12:07:15.893898 11. 00000000fe000000-00000000fe00ffff: RESERVED
1956 12:07:15.900580 12. 00000000fed80000-00000000fed87fff: RESERVED
1957 12:07:15.904109 13. 00000000fed90000-00000000fed92fff: RESERVED
1958 12:07:15.910540 14. 00000000feda0000-00000000feda1fff: RESERVED
1959 12:07:15.913915 15. 00000000fedc0000-00000000feddffff: RESERVED
1960 12:07:15.920622 16. 0000000100000000-00000002803fffff: RAM
1961 12:07:15.920708 Passing 4 GPIOs to payload:
1962 12:07:15.927112 NAME | PORT | POLARITY | VALUE
1963 12:07:15.933698 lid | undefined | high | high
1964 12:07:15.936799 power | undefined | high | low
1965 12:07:15.943708 oprom | undefined | high | low
1966 12:07:15.947096 EC in RW | 0x000000e5 | high | high
1967 12:07:15.953492 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 9b47
1968 12:07:15.956983 coreboot table: 1576 bytes.
1969 12:07:15.960367 IMD ROOT 0. 0x76fff000 0x00001000
1970 12:07:15.963526 IMD SMALL 1. 0x76ffe000 0x00001000
1971 12:07:15.967129 FSP MEMORY 2. 0x76c4e000 0x003b0000
1972 12:07:15.973849 VPD 3. 0x76c4d000 0x00000367
1973 12:07:15.977024 RO MCACHE 4. 0x76c4c000 0x00000fdc
1974 12:07:15.980420 CONSOLE 5. 0x76c2c000 0x00020000
1975 12:07:15.983662 FMAP 6. 0x76c2b000 0x00000578
1976 12:07:15.986815 TIME STAMP 7. 0x76c2a000 0x00000910
1977 12:07:15.990218 VBOOT WORK 8. 0x76c16000 0x00014000
1978 12:07:15.993571 ROMSTG STCK 9. 0x76c15000 0x00001000
1979 12:07:15.997068 AFTER CAR 10. 0x76c0a000 0x0000b000
1980 12:07:16.003768 RAMSTAGE 11. 0x76b97000 0x00073000
1981 12:07:16.006860 REFCODE 12. 0x76b42000 0x00055000
1982 12:07:16.010092 SMM BACKUP 13. 0x76b32000 0x00010000
1983 12:07:16.013425 4f444749 14. 0x76b30000 0x00002000
1984 12:07:16.017027 EXT VBT15. 0x76b2d000 0x0000219f
1985 12:07:16.019983 COREBOOT 16. 0x76b25000 0x00008000
1986 12:07:16.023403 ACPI 17. 0x76b01000 0x00024000
1987 12:07:16.027049 ACPI GNVS 18. 0x76b00000 0x00001000
1988 12:07:16.029969 RAMOOPS 19. 0x76a00000 0x00100000
1989 12:07:16.033451 TPM2 TCGLOG20. 0x769f0000 0x00010000
1990 12:07:16.036799
1991 12:07:16.040078 SMBIOS 21. 0x769ef000 0x00000800
1992 12:07:16.040163 IMD small region:
1993 12:07:16.043324 IMD ROOT 0. 0x76ffec00 0x00000400
1994 12:07:16.050008 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1995 12:07:16.053696 POWER STATE 2. 0x76ffeb80 0x00000044
1996 12:07:16.056655 ROMSTAGE 3. 0x76ffeb60 0x00000004
1997 12:07:16.059947 MEM INFO 4. 0x76ffe980 0x000001e0
1998 12:07:16.066560 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1999 12:07:16.069951 MTRR: Physical address space:
2000 12:07:16.076661 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2001 12:07:16.083272 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2002 12:07:16.086404 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2003 12:07:16.093528 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2004 12:07:16.100021 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2005 12:07:16.106422 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2006 12:07:16.113275 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2007 12:07:16.116353 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 12:07:16.119754 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 12:07:16.126238 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 12:07:16.129678 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 12:07:16.132925 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 12:07:16.136442 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 12:07:16.142806 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 12:07:16.146346 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 12:07:16.149558 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 12:07:16.153037 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 12:07:16.159406 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 12:07:16.162784 call enable_fixed_mtrr()
2019 12:07:16.166278 CPU physical address size: 39 bits
2020 12:07:16.169510 MTRR: default type WB/UC MTRR counts: 6/6.
2021 12:07:16.173048 MTRR: UC selected as default type.
2022 12:07:16.179331 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2023 12:07:16.185898 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2024 12:07:16.192686 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2025 12:07:16.199426 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2026 12:07:16.206061 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2027 12:07:16.209188 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2028 12:07:16.213783
2029 12:07:16.213859 MTRR check
2030 12:07:16.216946 Fixed MTRRs : Enabled
2031 12:07:16.217021 Variable MTRRs: Enabled
2032 12:07:16.217101
2033 12:07:16.223874 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 12:07:16.227000 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 12:07:16.230336 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 12:07:16.233641 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 12:07:16.240528 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 12:07:16.243973 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 12:07:16.246885 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 12:07:16.250503 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 12:07:16.257097 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 12:07:16.260401 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 12:07:16.263934 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 12:07:16.270401 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2045 12:07:16.273748 call enable_fixed_mtrr()
2046 12:07:16.276970 Checking cr50 for pending updates
2047 12:07:16.280853 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:07:16.284284 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 12:07:16.287748 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 12:07:16.294276 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 12:07:16.297913 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 12:07:16.301060 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 12:07:16.304522 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 12:07:16.307592 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 12:07:16.310862
2056 12:07:16.314480 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 12:07:16.317819 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 12:07:16.321083 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 12:07:16.324412 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 12:07:16.331906 MTRR: Fixed MSR 0x258 0x0606060606060606
2061 12:07:16.331998 call enable_fixed_mtrr()
2062 12:07:16.338562 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 12:07:16.342083 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 12:07:16.345534 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 12:07:16.348793 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 12:07:16.355150 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 12:07:16.358660 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 12:07:16.361913 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 12:07:16.365466 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 12:07:16.368575 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 12:07:16.372218
2072 12:07:16.375349 CPU physical address size: 39 bits
2073 12:07:16.378299 call enable_fixed_mtrr()
2074 12:07:16.381892 CPU physical address size: 39 bits
2075 12:07:16.385324 Reading cr50 TPM mode
2076 12:07:16.389089 MTRR: Fixed MSR 0x250 0x0606060606060606
2077 12:07:16.392713 MTRR: Fixed MSR 0x250 0x0606060606060606
2078 12:07:16.396026 MTRR: Fixed MSR 0x258 0x0606060606060606
2079 12:07:16.399132
2080 12:07:16.402489 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 12:07:16.405991 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 12:07:16.409179 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 12:07:16.412664 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 12:07:16.419138 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 12:07:16.422418 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 12:07:16.425942 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 12:07:16.429138 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 12:07:16.435520 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 12:07:16.439202 MTRR: Fixed MSR 0x258 0x0606060606060606
2090 12:07:16.442423 call enable_fixed_mtrr()
2091 12:07:16.445761 MTRR: Fixed MSR 0x259 0x0000000000000000
2092 12:07:16.449055 MTRR: Fixed MSR 0x268 0x0606060606060606
2093 12:07:16.455364 MTRR: Fixed MSR 0x269 0x0606060606060606
2094 12:07:16.458856 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 12:07:16.462204 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 12:07:16.465281 MTRR: Fixed MSR 0x26c 0x0606060606060606
2097 12:07:16.472118 MTRR: Fixed MSR 0x26d 0x0606060606060606
2098 12:07:16.475574 MTRR: Fixed MSR 0x26e 0x0606060606060606
2099 12:07:16.478658 MTRR: Fixed MSR 0x26f 0x0606060606060606
2100 12:07:16.481766 CPU physical address size: 39 bits
2101 12:07:16.488796 call enable_fixed_mtrr()
2102 12:07:16.492167 MTRR: Fixed MSR 0x250 0x0606060606060606
2103 12:07:16.495526 MTRR: Fixed MSR 0x250 0x0606060606060606
2104 12:07:16.498474 MTRR: Fixed MSR 0x258 0x0606060606060606
2105 12:07:16.501808 MTRR: Fixed MSR 0x259 0x0000000000000000
2106 12:07:16.505533
2107 12:07:16.508387 MTRR: Fixed MSR 0x268 0x0606060606060606
2108 12:07:16.511905 MTRR: Fixed MSR 0x269 0x0606060606060606
2109 12:07:16.515217 MTRR: Fixed MSR 0x26a 0x0606060606060606
2110 12:07:16.518533 MTRR: Fixed MSR 0x26b 0x0606060606060606
2111 12:07:16.525095 MTRR: Fixed MSR 0x26c 0x0606060606060606
2112 12:07:16.528505 MTRR: Fixed MSR 0x26d 0x0606060606060606
2113 12:07:16.531701 MTRR: Fixed MSR 0x26e 0x0606060606060606
2114 12:07:16.534941 MTRR: Fixed MSR 0x26f 0x0606060606060606
2115 12:07:16.542425 MTRR: Fixed MSR 0x258 0x0606060606060606
2116 12:07:16.546146 MTRR: Fixed MSR 0x259 0x0000000000000000
2117 12:07:16.549286 MTRR: Fixed MSR 0x268 0x0606060606060606
2118 12:07:16.552617 MTRR: Fixed MSR 0x269 0x0606060606060606
2119 12:07:16.559202 MTRR: Fixed MSR 0x26a 0x0606060606060606
2120 12:07:16.562593 MTRR: Fixed MSR 0x26b 0x0606060606060606
2121 12:07:16.565610 MTRR: Fixed MSR 0x26c 0x0606060606060606
2122 12:07:16.569108 MTRR: Fixed MSR 0x26d 0x0606060606060606
2123 12:07:16.575604 MTRR: Fixed MSR 0x26e 0x0606060606060606
2124 12:07:16.579090 MTRR: Fixed MSR 0x26f 0x0606060606060606
2125 12:07:16.582377 call enable_fixed_mtrr()
2126 12:07:16.585618 call enable_fixed_mtrr()
2127 12:07:16.589349 CPU physical address size: 39 bits
2128 12:07:16.592547 CPU physical address size: 39 bits
2129 12:07:16.595762 CPU physical address size: 39 bits
2130 12:07:16.599331 CPU physical address size: 39 bits
2131 12:07:16.605653 BS: BS_PAYLOAD_LOAD entry times (exec / console): 113 / 7 ms
2132 12:07:16.612268 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2133 12:07:16.618920 Checking segment from ROM address 0xffc02b38
2134 12:07:16.622350 Checking segment from ROM address 0xffc02b54
2135 12:07:16.625857 Loading segment from ROM address 0xffc02b38
2136 12:07:16.629119 code (compression=0)
2137 12:07:16.638690 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2138 12:07:16.645585 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2139 12:07:16.648656 it's not compressed!
2140 12:07:16.787229 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2141 12:07:16.794214 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2142 12:07:16.800886 Loading segment from ROM address 0xffc02b54
2143 12:07:16.800972 Entry Point 0x30000000
2144 12:07:16.803955 Loaded segments
2145 12:07:16.810699 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2146 12:07:16.853337 Finalizing chipset.
2147 12:07:16.856939 Finalizing SMM.
2148 12:07:16.857021 APMC done.
2149 12:07:16.863639 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2150 12:07:16.866586 mp_park_aps done after 0 msecs.
2151 12:07:16.870014 Jumping to boot code at 0x30000000(0x76b25000)
2152 12:07:16.879706 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2153 12:07:16.879791
2154 12:07:16.879858
2155 12:07:16.879918
2156 12:07:16.883379 Starting depthcharge on Voema...
2157 12:07:16.883462
2158 12:07:16.883838 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2159 12:07:16.883940 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2160 12:07:16.884021 Setting prompt string to ['volteer:']
2161 12:07:16.884097 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2162 12:07:16.893302 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2163 12:07:16.893389
2164 12:07:16.899989 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2165 12:07:16.900076
2166 12:07:16.906569 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2167 12:07:16.906654
2168 12:07:16.910030 Failed to find eMMC card reader
2169 12:07:16.910115
2170 12:07:16.910181 Wipe memory regions:
2171 12:07:16.910241
2172 12:07:16.916402 [0x00000000001000, 0x000000000a0000)
2173 12:07:16.916487
2174 12:07:16.920112 [0x00000000100000, 0x00000030000000)
2175 12:07:16.920228
2176 12:07:16.948790 [0x00000032662db0, 0x000000769ef000)
2177 12:07:16.948876
2178 12:07:16.987131 [0x00000100000000, 0x00000280400000)
2179 12:07:16.987228
2180 12:07:17.190228 ec_init: CrosEC protocol v3 supported (256, 256)
2181 12:07:17.190364
2182 12:07:17.196983 update_port_state: port C0 state: usb enable 1 mux conn 0
2183 12:07:17.197069
2184 12:07:17.203163 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2185 12:07:17.206464
2186 12:07:17.210112 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2187 12:07:17.210197
2188 12:07:17.216560 send_conn_disc_msg: pmc_send_cmd succeeded
2189 12:07:17.216644
2190 12:07:17.647799 R8152: Initializing
2191 12:07:17.647948
2192 12:07:17.650824 Version 6 (ocp_data = 5c30)
2193 12:07:17.650917
2194 12:07:17.654430 R8152: Done initializing
2195 12:07:17.654515
2196 12:07:17.657578 Adding net device
2197 12:07:17.657672
2198 12:07:17.962499 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2199 12:07:17.962645
2200 12:07:17.962712
2201 12:07:17.962775
2202 12:07:17.965961 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2204 12:07:18.066837 volteer: tftpboot 192.168.201.1 8853701/tftp-deploy-w0wkmpn6/kernel/bzImage 8853701/tftp-deploy-w0wkmpn6/kernel/cmdline 8853701/tftp-deploy-w0wkmpn6/ramdisk/ramdisk.cpio.gz
2205 12:07:18.066998 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2206 12:07:18.067112 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2207 12:07:18.071327 tftpboot 192.168.201.1 8853701/tftp-deploy-w0wkmpn6/kernel/bzImoy-w0wkmpn6/kernel/cmdline 8853701/tftp-deploy-w0wkmpn6/ramdisk/ramdisk.cpio.gz
2208 12:07:18.071420
2209 12:07:18.071488 Waiting for link
2210 12:07:18.071550
2211 12:07:18.275557 done.
2212 12:07:18.275701
2213 12:07:18.275773 MAC: 00:24:32:30:78:74
2214 12:07:18.275836
2215 12:07:18.278958 Sending DHCP discover... done.
2216 12:07:18.279038
2217 12:07:18.282276 Waiting for reply... done.
2218 12:07:18.282355
2219 12:07:18.285703 Sending DHCP request... done.
2220 12:07:18.285779
2221 12:07:18.288959 Waiting for reply... done.
2222 12:07:18.289029
2223 12:07:18.292047 My ip is 192.168.201.14
2224 12:07:18.292132
2225 12:07:18.295696 The DHCP server ip is 192.168.201.1
2226 12:07:18.295782
2227 12:07:18.298425 TFTP server IP predefined by user: 192.168.201.1
2228 12:07:18.298510
2229 12:07:18.305686 Bootfile predefined by user: 8853701/tftp-deploy-w0wkmpn6/kernel/bzImage
2230 12:07:18.305772
2231 12:07:18.308903 Sending tftp read request... done.
2232 12:07:18.308987
2233 12:07:18.315070 Waiting for the transfer...
2234 12:07:18.315156
2235 12:07:18.834379 00000000 ################################################################
2236 12:07:18.834533
2237 12:07:19.363812 00080000 ################################################################
2238 12:07:19.363959
2239 12:07:19.882470 00100000 ################################################################
2240 12:07:19.882616
2241 12:07:20.413810 00180000 ################################################################
2242 12:07:20.413952
2243 12:07:20.946661 00200000 ################################################################
2244 12:07:20.946892
2245 12:07:21.476107 00280000 ################################################################
2246 12:07:21.476254
2247 12:07:21.999517 00300000 ################################################################
2248 12:07:21.999668
2249 12:07:22.513521 00380000 ################################################################
2250 12:07:22.513729
2251 12:07:23.029072 00400000 ################################################################
2252 12:07:23.029217
2253 12:07:23.535585 00480000 ################################################################
2254 12:07:23.535748
2255 12:07:24.052255 00500000 ################################################################
2256 12:07:24.052404
2257 12:07:24.568100 00580000 ################################################################
2258 12:07:24.568252
2259 12:07:25.076802 00600000 ################################################################
2260 12:07:25.076943
2261 12:07:25.611535 00680000 ################################################################
2262 12:07:25.611681
2263 12:07:26.151512 00700000 ################################################################
2264 12:07:26.151659
2265 12:07:26.691120 00780000 ################################################################
2266 12:07:26.691256
2267 12:07:27.340178 00800000 ################################################################
2268 12:07:27.340676
2269 12:07:27.974442 00880000 ################################################################
2270 12:07:27.975005
2271 12:07:28.319854 00900000 ################################## done.
2272 12:07:28.320465
2273 12:07:28.323351 The bootfile was 9707520 bytes long.
2274 12:07:28.323819
2275 12:07:28.326476 Sending tftp read request... done.
2276 12:07:28.326958
2277 12:07:28.329487 Waiting for the transfer...
2278 12:07:28.329927
2279 12:07:28.975796 00000000 ################################################################
2280 12:07:28.976432
2281 12:07:29.652780 00080000 ################################################################
2282 12:07:29.653293
2283 12:07:30.348682 00100000 ################################################################
2284 12:07:30.349201
2285 12:07:31.058369 00180000 ################################################################
2286 12:07:31.058999
2287 12:07:31.776087 00200000 ################################################################
2288 12:07:31.776697
2289 12:07:32.484878 00280000 ################################################################
2290 12:07:32.485505
2291 12:07:33.206076 00300000 ################################################################
2292 12:07:33.206687
2293 12:07:33.915539 00380000 ################################################################
2294 12:07:33.916147
2295 12:07:34.566278 00400000 ################################################################
2296 12:07:34.566420
2297 12:07:35.114566 00480000 ################################################################
2298 12:07:35.114707
2299 12:07:35.675084 00500000 ################################################################
2300 12:07:35.675225
2301 12:07:36.296390 00580000 ################################################################
2302 12:07:36.296937
2303 12:07:36.944673 00600000 ################################################################
2304 12:07:36.945198
2305 12:07:37.569918 00680000 ################################################################
2306 12:07:37.570056
2307 12:07:38.272258 00700000 ################################################################
2308 12:07:38.272396
2309 12:07:38.957667 00780000 ################################################################
2310 12:07:38.957803
2311 12:07:39.155304 00800000 ######################## done.
2312 12:07:39.155437
2313 12:07:39.158909 Sending tftp read request... done.
2314 12:07:39.158989
2315 12:07:39.161972 Waiting for the transfer...
2316 12:07:39.162051
2317 12:07:39.162131 00000000 # done.
2318 12:07:39.162209
2319 12:07:39.172111 Command line loaded dynamically from TFTP file: 8853701/tftp-deploy-w0wkmpn6/kernel/cmdline
2320 12:07:39.172197
2321 12:07:39.185367 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2322 12:07:39.185458
2323 12:07:39.192737 Shutting down all USB controllers.
2324 12:07:39.192823
2325 12:07:39.192908 Removing current net device
2326 12:07:39.192989
2327 12:07:39.195863 Finalizing coreboot
2328 12:07:39.195951
2329 12:07:39.202720 Exiting depthcharge with code 4 at timestamp: 30972013
2330 12:07:39.202801
2331 12:07:39.202891
2332 12:07:39.202972 Starting kernel ...
2333 12:07:39.203049
2334 12:07:39.203126
2335 12:07:39.203203
2336 12:07:39.203599 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2337 12:07:39.203708 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2338 12:07:39.203794 Setting prompt string to ['Linux version [0-9]']
2339 12:07:39.203880 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2340 12:07:39.203965 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2342 12:12:00.204689 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2344 12:12:00.206534 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2346 12:12:00.208005 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2349 12:12:00.209525 end: 2 depthcharge-action (duration 00:05:00) [common]
2351 12:12:00.209824 Cleaning after the job
2352 12:12:00.209909 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853701/tftp-deploy-w0wkmpn6/ramdisk
2353 12:12:00.210659 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853701/tftp-deploy-w0wkmpn6/kernel
2354 12:12:00.211428 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853701/tftp-deploy-w0wkmpn6/modules
2355 12:12:00.211645 start: 5.1 power-off (timeout 00:00:30) [common]
2356 12:12:00.211826 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2357 12:12:00.231061 >> Command sent successfully.
2358 12:12:00.232834 Returned 0 in 0 seconds
2359 12:12:00.333889 end: 5.1 power-off (duration 00:00:00) [common]
2361 12:12:00.334613 start: 5.2 read-feedback (timeout 00:10:00) [common]
2362 12:12:00.335136 Listened to connection for namespace 'common' for up to 1s
2363 12:12:01.340092 Finalising connection for namespace 'common'
2364 12:12:01.340471 Disconnecting from shell: Finalise
2365 12:12:01.441506 end: 5.2 read-feedback (duration 00:00:01) [common]
2366 12:12:01.441813 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8853701
2367 12:12:01.449434 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8853701
2368 12:12:01.449563 JobError: Your job cannot terminate cleanly.