Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:07:04.467692 lava-dispatcher, installed at version: 2022.11
2 12:07:04.467887 start: 0 validate
3 12:07:04.468024 Start time: 2023-01-24 12:07:04.468017+00:00 (UTC)
4 12:07:04.468157 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:07:04.468292 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
6 12:07:04.476933 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:07:04.477067 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:07:04.483543 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:07:04.483661 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:07:04.490352 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:07:04.490465 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:07:04.783366 validate duration: 0.32
14 12:07:04.783639 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:07:04.783753 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:07:04.783859 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:07:04.783969 Not decompressing ramdisk as can be used compressed.
18 12:07:04.784058 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230120.0/amd64/initrd.cpio.gz
19 12:07:04.784123 saving as /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/ramdisk/initrd.cpio.gz
20 12:07:04.784182 total size: 5432079 (5MB)
21 12:07:04.901560 progress 0% (0MB)
22 12:07:05.230703 progress 5% (0MB)
23 12:07:05.329724 progress 10% (0MB)
24 12:07:05.419677 progress 15% (0MB)
25 12:07:05.521731 progress 20% (1MB)
26 12:07:05.626431 progress 25% (1MB)
27 12:07:05.741147 progress 30% (1MB)
28 12:07:05.821958 progress 35% (1MB)
29 12:07:05.936279 progress 40% (2MB)
30 12:07:06.029994 progress 45% (2MB)
31 12:07:06.124129 progress 50% (2MB)
32 12:07:06.218219 progress 55% (2MB)
33 12:07:06.278222 progress 60% (3MB)
34 12:07:06.316068 progress 65% (3MB)
35 12:07:06.347076 progress 70% (3MB)
36 12:07:06.377163 progress 75% (3MB)
37 12:07:06.407240 progress 80% (4MB)
38 12:07:06.445271 progress 85% (4MB)
39 12:07:06.482596 progress 90% (4MB)
40 12:07:06.506793 progress 95% (4MB)
41 12:07:06.543184 progress 100% (5MB)
42 12:07:06.543510 5MB downloaded in 1.76s (2.94MB/s)
43 12:07:06.543674 end: 1.1.1 http-download (duration 00:00:02) [common]
45 12:07:06.543926 end: 1.1 download-retry (duration 00:00:02) [common]
46 12:07:06.544014 start: 1.2 download-retry (timeout 00:09:58) [common]
47 12:07:06.544100 start: 1.2.1 http-download (timeout 00:09:58) [common]
48 12:07:06.544205 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:07:06.544276 saving as /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/kernel/bzImage
50 12:07:06.544336 total size: 9707520 (9MB)
51 12:07:06.544396 No compression specified
52 12:07:06.546808 progress 0% (0MB)
53 12:07:06.559820 progress 5% (0MB)
54 12:07:06.571378 progress 10% (0MB)
55 12:07:06.585222 progress 15% (1MB)
56 12:07:06.596904 progress 20% (1MB)
57 12:07:06.610137 progress 25% (2MB)
58 12:07:06.621459 progress 30% (2MB)
59 12:07:06.633354 progress 35% (3MB)
60 12:07:06.646805 progress 40% (3MB)
61 12:07:06.658488 progress 45% (4MB)
62 12:07:06.671953 progress 50% (4MB)
63 12:07:06.683477 progress 55% (5MB)
64 12:07:06.695321 progress 60% (5MB)
65 12:07:06.708624 progress 65% (6MB)
66 12:07:06.720491 progress 70% (6MB)
67 12:07:06.734165 progress 75% (6MB)
68 12:07:06.745678 progress 80% (7MB)
69 12:07:06.757560 progress 85% (7MB)
70 12:07:06.769889 progress 90% (8MB)
71 12:07:06.783887 progress 95% (8MB)
72 12:07:06.794476 progress 100% (9MB)
73 12:07:06.794704 9MB downloaded in 0.25s (36.98MB/s)
74 12:07:06.794859 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:07:06.795097 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:07:06.795186 start: 1.3 download-retry (timeout 00:09:58) [common]
78 12:07:06.795272 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 12:07:06.795423 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230120.0/amd64/full.rootfs.tar.xz
80 12:07:06.795491 saving as /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/nfsrootfs/full.rootfs.tar
81 12:07:06.795553 total size: 133327304 (127MB)
82 12:07:06.795615 Using unxz to decompress xz
83 12:07:06.826504 progress 0% (0MB)
84 12:07:07.284240 progress 5% (6MB)
85 12:07:07.715519 progress 10% (12MB)
86 12:07:08.149867 progress 15% (19MB)
87 12:07:08.579170 progress 20% (25MB)
88 12:07:09.015393 progress 25% (31MB)
89 12:07:09.450127 progress 30% (38MB)
90 12:07:09.894637 progress 35% (44MB)
91 12:07:10.332173 progress 40% (50MB)
92 12:07:10.768346 progress 45% (57MB)
93 12:07:11.291048 progress 50% (63MB)
94 12:07:12.016944 progress 55% (69MB)
95 12:07:12.776855 progress 60% (76MB)
96 12:07:13.149864 progress 65% (82MB)
97 12:07:13.522625 progress 70% (89MB)
98 12:07:13.894655 progress 75% (95MB)
99 12:07:14.344000 progress 80% (101MB)
100 12:07:14.785110 progress 85% (108MB)
101 12:07:15.073222 progress 90% (114MB)
102 12:07:15.423173 progress 95% (120MB)
103 12:07:15.819726 progress 100% (127MB)
104 12:07:15.825886 127MB downloaded in 9.03s (14.08MB/s)
105 12:07:15.826157 end: 1.3.1 http-download (duration 00:00:09) [common]
107 12:07:15.826416 end: 1.3 download-retry (duration 00:00:09) [common]
108 12:07:15.826509 start: 1.4 download-retry (timeout 00:09:49) [common]
109 12:07:15.826599 start: 1.4.1 http-download (timeout 00:09:49) [common]
110 12:07:15.826717 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:07:15.826790 saving as /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/modules/modules.tar
112 12:07:15.826852 total size: 64588 (0MB)
113 12:07:15.826916 Using unxz to decompress xz
114 12:07:15.831122 progress 50% (0MB)
115 12:07:15.831703 progress 100% (0MB)
116 12:07:15.835801 0MB downloaded in 0.01s (6.89MB/s)
117 12:07:15.836022 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:07:15.836282 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:07:15.836380 start: 1.5 prepare-tftp-overlay (timeout 00:09:49) [common]
121 12:07:15.836485 start: 1.5.1 extract-nfsrootfs (timeout 00:09:49) [common]
122 12:07:17.107194 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8853755/extract-nfsrootfs-t0kmgpp4
123 12:07:17.107430 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 12:07:17.107552 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
125 12:07:17.107690 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3
126 12:07:17.107791 makedir: /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin
127 12:07:17.107875 makedir: /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/tests
128 12:07:17.107955 makedir: /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/results
129 12:07:17.108054 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-add-keys
130 12:07:17.108188 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-add-sources
131 12:07:17.108303 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-background-process-start
132 12:07:17.108415 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-background-process-stop
133 12:07:17.108526 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-common-functions
134 12:07:17.108636 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-echo-ipv4
135 12:07:17.108746 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-install-packages
136 12:07:17.108855 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-installed-packages
137 12:07:17.108963 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-os-build
138 12:07:17.109071 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-probe-channel
139 12:07:17.109180 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-probe-ip
140 12:07:17.109288 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-target-ip
141 12:07:17.109427 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-target-mac
142 12:07:17.109554 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-target-storage
143 12:07:17.109666 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-test-case
144 12:07:17.109776 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-test-event
145 12:07:17.109884 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-test-feedback
146 12:07:17.109991 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-test-raise
147 12:07:17.110098 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-test-reference
148 12:07:17.110206 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-test-runner
149 12:07:17.110313 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-test-set
150 12:07:17.110420 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-test-shell
151 12:07:17.110530 Updating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-install-packages (oe)
152 12:07:17.110642 Updating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/bin/lava-installed-packages (oe)
153 12:07:17.110738 Creating /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/environment
154 12:07:17.110822 LAVA metadata
155 12:07:17.110888 - LAVA_JOB_ID=8853755
156 12:07:17.110953 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:07:17.111051 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
158 12:07:17.111116 skipped lava-vland-overlay
159 12:07:17.111192 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:07:17.111273 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
161 12:07:17.111334 skipped lava-multinode-overlay
162 12:07:17.111407 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:07:17.111487 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
164 12:07:17.111557 Loading test definitions
165 12:07:17.111648 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
166 12:07:17.111719 Using /lava-8853755 at stage 0
167 12:07:17.111974 uuid=8853755_1.5.2.3.1 testdef=None
168 12:07:17.112064 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 12:07:17.112150 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
170 12:07:17.112617 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 12:07:17.112847 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
173 12:07:17.113405 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 12:07:17.113684 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
176 12:07:17.114218 runner path: /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/0/tests/0_dmesg test_uuid 8853755_1.5.2.3.1
177 12:07:17.114361 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 12:07:17.114593 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:48) [common]
180 12:07:17.114666 Using /lava-8853755 at stage 1
181 12:07:17.114905 uuid=8853755_1.5.2.3.5 testdef=None
182 12:07:17.114995 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 12:07:17.115082 start: 1.5.2.3.6 test-overlay (timeout 00:09:48) [common]
184 12:07:17.115515 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 12:07:17.115741 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:48) [common]
187 12:07:17.116303 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 12:07:17.116539 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:48) [common]
190 12:07:17.117078 runner path: /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/1/tests/1_bootrr test_uuid 8853755_1.5.2.3.5
191 12:07:17.117220 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 12:07:17.117432 Creating lava-test-runner.conf files
194 12:07:17.117534 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/0 for stage 0
195 12:07:17.117616 - 0_dmesg
196 12:07:17.117691 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853755/lava-overlay-h5pul9y3/lava-8853755/1 for stage 1
197 12:07:17.117774 - 1_bootrr
198 12:07:17.117866 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 12:07:17.117953 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
200 12:07:17.123353 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 12:07:17.123457 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:48) [common]
202 12:07:17.123546 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 12:07:17.123633 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 12:07:17.123722 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:48) [common]
205 12:07:17.226564 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 12:07:17.226918 start: 1.5.4 extract-modules (timeout 00:09:48) [common]
207 12:07:17.227028 extracting modules file /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853755/extract-nfsrootfs-t0kmgpp4
208 12:07:17.230924 extracting modules file /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853755/extract-overlay-ramdisk-kfbo50m5/ramdisk
209 12:07:17.234596 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 12:07:17.234709 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
211 12:07:17.234793 [common] Applying overlay to NFS
212 12:07:17.234863 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853755/compress-overlay-7aw1m954/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8853755/extract-nfsrootfs-t0kmgpp4
213 12:07:17.238562 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 12:07:17.238670 start: 1.5.6 configure-preseed-file (timeout 00:09:48) [common]
215 12:07:17.238759 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 12:07:17.238849 start: 1.5.7 compress-ramdisk (timeout 00:09:48) [common]
217 12:07:17.238926 Building ramdisk /var/lib/lava/dispatcher/tmp/8853755/extract-overlay-ramdisk-kfbo50m5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8853755/extract-overlay-ramdisk-kfbo50m5/ramdisk
218 12:07:17.272851 >> 24777 blocks
219 12:07:17.741372 rename /var/lib/lava/dispatcher/tmp/8853755/extract-overlay-ramdisk-kfbo50m5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/ramdisk/ramdisk.cpio.gz
220 12:07:17.741788 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 12:07:17.741911 start: 1.5.8 prepare-kernel (timeout 00:09:47) [common]
222 12:07:17.742018 start: 1.5.8.1 prepare-fit (timeout 00:09:47) [common]
223 12:07:17.742117 No mkimage arch provided, not using FIT.
224 12:07:17.742208 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 12:07:17.742300 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 12:07:17.742397 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 12:07:17.742491 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:47) [common]
228 12:07:17.742574 No LXC device requested
229 12:07:17.742660 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 12:07:17.742780 start: 1.7 deploy-device-env (timeout 00:09:47) [common]
231 12:07:17.742900 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 12:07:17.742993 Checking files for TFTP limit of 4294967296 bytes.
233 12:07:17.743372 end: 1 tftp-deploy (duration 00:00:13) [common]
234 12:07:17.743477 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 12:07:17.743570 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 12:07:17.743701 substitutions:
237 12:07:17.743770 - {DTB}: None
238 12:07:17.743835 - {INITRD}: 8853755/tftp-deploy-5wqxab66/ramdisk/ramdisk.cpio.gz
239 12:07:17.743896 - {KERNEL}: 8853755/tftp-deploy-5wqxab66/kernel/bzImage
240 12:07:17.743956 - {LAVA_MAC}: None
241 12:07:17.744012 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8853755/extract-nfsrootfs-t0kmgpp4
242 12:07:17.744069 - {NFS_SERVER_IP}: 192.168.201.1
243 12:07:17.744128 - {PRESEED_CONFIG}: None
244 12:07:17.744187 - {PRESEED_LOCAL}: None
245 12:07:17.744243 - {RAMDISK}: 8853755/tftp-deploy-5wqxab66/ramdisk/ramdisk.cpio.gz
246 12:07:17.744299 - {ROOT_PART}: None
247 12:07:17.744354 - {ROOT}: None
248 12:07:17.744412 - {SERVER_IP}: 192.168.201.1
249 12:07:17.744467 - {TEE}: None
250 12:07:17.744523 Parsed boot commands:
251 12:07:17.744578 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 12:07:17.744776 Parsed boot commands: tftpboot 192.168.201.1 8853755/tftp-deploy-5wqxab66/kernel/bzImage 8853755/tftp-deploy-5wqxab66/kernel/cmdline 8853755/tftp-deploy-5wqxab66/ramdisk/ramdisk.cpio.gz
253 12:07:17.744894 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 12:07:17.744985 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 12:07:17.745080 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 12:07:17.745173 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 12:07:17.745248 Not connected, no need to disconnect.
258 12:07:17.745326 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 12:07:17.745410 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 12:07:17.745482 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
261 12:07:17.748153 Setting prompt string to ['lava-test: # ']
262 12:07:17.748435 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 12:07:17.748568 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 12:07:17.748702 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 12:07:17.748800 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 12:07:17.748976 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
267 12:07:17.767816 >> Command sent successfully.
268 12:07:17.769743 Returned 0 in 0 seconds
269 12:07:17.870532 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 12:07:17.870884 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 12:07:17.871004 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 12:07:17.871098 Setting prompt string to 'Starting depthcharge on Voema...'
274 12:07:17.871193 Changing prompt to 'Starting depthcharge on Voema...'
275 12:07:17.871272 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 12:07:17.871573 [Enter `^Ec?' for help]
277 12:07:25.120231
278 12:07:25.120385
279 12:07:25.130026 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 12:07:25.133136 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 12:07:25.139671 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 12:07:25.143042 CPU: AES supported, TXT NOT supported, VT supported
283 12:07:25.149855 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 12:07:25.156652 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 12:07:25.159657 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 12:07:25.162948 VBOOT: Loading verstage.
287 12:07:25.166477 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 12:07:25.169699
289 12:07:25.172974 FMAP: base = 0x0 size = 0x2000000 #areas = 32
290 12:07:25.176217 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 12:07:25.179515
292 12:07:25.186019 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
293 12:07:25.192595 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
294 12:07:25.196334
295 12:07:25.196419
296 12:07:25.205959 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
297 12:07:25.220525 Probing TPM: . done!
298 12:07:25.223945 TPM ready after 0 ms
299 12:07:25.227557 Connected to device vid:did:rid of 1ae0:0028:00
300 12:07:25.238327 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
301 12:07:25.245232 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
302 12:07:25.248351 Initialized TPM device CR50 revision 0
303 12:07:25.300239 tlcl_send_startup: Startup return code is 0
304 12:07:25.300338 TPM: setup succeeded
305 12:07:25.315799 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
306 12:07:25.331004 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 12:07:25.344849 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
308 12:07:25.354639 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
309 12:07:25.358364 Chrome EC: UHEPI supported
310 12:07:25.362158 Phase 1
311 12:07:25.365664 FMAP: area GBB found @ 1805000 (458752 bytes)
312 12:07:25.375444 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
313 12:07:25.382205 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
314 12:07:25.388919 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
315 12:07:25.395886 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
316 12:07:25.398796 Recovery requested (1009000e)
317 12:07:25.402381 TPM: Extending digest for VBOOT: boot mode into PCR 0
318 12:07:25.413727 tlcl_extend: response is 0
319 12:07:25.420811 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
320 12:07:25.430280 tlcl_extend: response is 0
321 12:07:25.436962 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
322 12:07:25.443716 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
323 12:07:25.450137 BS: verstage times (exec / console): total (unknown) / 142 ms
324 12:07:25.450225
325 12:07:25.450311
326 12:07:25.463473 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
327 12:07:25.469805 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
328 12:07:25.473374 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
329 12:07:25.476687 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
330 12:07:25.483084 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
331 12:07:25.486447 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
332 12:07:25.489861 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
333 12:07:25.493049 TCO_STS: 0000 0000
334 12:07:25.496710 GEN_PMCON: d0015038 00002200
335 12:07:25.499971 GBLRST_CAUSE: 00000000 00000000
336 12:07:25.500059 HPR_CAUSE0: 00000000
337 12:07:25.503454
338 12:07:25.503542 prev_sleep_state 5
339 12:07:25.506497 Boot Count incremented to 15542
340 12:07:25.513200 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
341 12:07:25.519596 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
342 12:07:25.529576 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
343 12:07:25.536134 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
344 12:07:25.539438 Chrome EC: UHEPI supported
345 12:07:25.545929 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
346 12:07:25.558037 Probing TPM: done!
347 12:07:25.561963 Connected to device vid:did:rid of 1ae0:0028:00
348 12:07:25.573847 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
349 12:07:25.577199 Initialized TPM device CR50 revision 0
350 12:07:25.592616 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
351 12:07:25.599252 MRC: Hash idx 0x100b comparison successful.
352 12:07:25.602567 MRC cache found, size faa8
353 12:07:25.602653 bootmode is set to: 2
354 12:07:25.605804 SPD index = 0
355 12:07:25.612617 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
356 12:07:25.616020 SPD: module type is LPDDR4X
357 12:07:25.619190 SPD: module part number is MT53E512M64D4NW-046
358 12:07:25.625695 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
359 12:07:25.629156 SPD: device width 16 bits, bus width 16 bits
360 12:07:25.635419 SPD: module size is 1024 MB (per channel)
361 12:07:26.070028 CBMEM:
362 12:07:26.073399 IMD: root @ 0x76fff000 254 entries.
363 12:07:26.076808 IMD: root @ 0x76ffec00 62 entries.
364 12:07:26.080175 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
365 12:07:26.086509 FMAP: area RW_VPD found @ f35000 (8192 bytes)
366 12:07:26.089692 External stage cache:
367 12:07:26.093091 IMD: root @ 0x7b3ff000 254 entries.
368 12:07:26.096302 IMD: root @ 0x7b3fec00 62 entries.
369 12:07:26.111729 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
370 12:07:26.118373 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
371 12:07:26.125066 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
372 12:07:26.140819 MRC: 'RECOVERY_MRC_CACHE' does not need update.
373 12:07:26.143958 cse_lite: Skip switching to RW in the recovery path
374 12:07:26.144043 8 DIMMs found
375 12:07:26.147196 SMM Memory Map
376 12:07:26.150946 SMRAM : 0x7b000000 0x800000
377 12:07:26.153796 Subregion 0: 0x7b000000 0x200000
378 12:07:26.157253 Subregion 1: 0x7b200000 0x200000
379 12:07:26.160835 Subregion 2: 0x7b400000 0x400000
380 12:07:26.164285 top_of_ram = 0x77000000
381 12:07:26.167576 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
382 12:07:26.173818 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
383 12:07:26.180282 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
384 12:07:26.183768 MTRR Range: Start=ff000000 End=0 (Size 1000000)
385 12:07:26.190692 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
386 12:07:26.196959 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
387 12:07:26.209113 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
388 12:07:26.212004 Processing 211 relocs. Offset value of 0x74c0b000
389 12:07:26.214969
390 12:07:26.221926 BS: romstage times (exec / console): total (unknown) / 277 ms
391 12:07:26.228230
392 12:07:26.228316
393 12:07:26.237860 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
394 12:07:26.241353 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
395 12:07:26.250781 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
396 12:07:26.257712 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
397 12:07:26.264289 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
398 12:07:26.270725 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
399 12:07:26.318273 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
400 12:07:26.324615 Processing 5008 relocs. Offset value of 0x75d98000
401 12:07:26.328018 BS: postcar times (exec / console): total (unknown) / 59 ms
402 12:07:26.330944
403 12:07:26.331030
404 12:07:26.341466 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
405 12:07:26.341575 Normal boot
406 12:07:26.345003 FW_CONFIG value is 0x804c02
407 12:07:26.348232 PCI: 00:07.0 disabled by fw_config
408 12:07:26.351539 PCI: 00:07.1 disabled by fw_config
409 12:07:26.354737 PCI: 00:0d.2 disabled by fw_config
410 12:07:26.358389 PCI: 00:1c.7 disabled by fw_config
411 12:07:26.364796 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 12:07:26.371591 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 12:07:26.374791 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:07:26.378323 GENERIC: 0.0 disabled by fw_config
415 12:07:26.381696 GENERIC: 1.0 disabled by fw_config
416 12:07:26.388101 fw_config match found: DB_USB=USB3_ACTIVE
417 12:07:26.391425 fw_config match found: DB_USB=USB3_ACTIVE
418 12:07:26.394780 fw_config match found: DB_USB=USB3_ACTIVE
419 12:07:26.398215 fw_config match found: DB_USB=USB3_ACTIVE
420 12:07:26.404723 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
421 12:07:26.411266 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
422 12:07:26.418119 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
423 12:07:26.428079 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
424 12:07:26.431470 microcode: sig=0x806c1 pf=0x80 revision=0x86
425 12:07:26.438057 microcode: Update skipped, already up-to-date
426 12:07:26.444331 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
427 12:07:26.471350 Detected 4 core, 8 thread CPU.
428 12:07:26.474566 Setting up SMI for CPU
429 12:07:26.477960 IED base = 0x7b400000
430 12:07:26.478046 IED size = 0x00400000
431 12:07:26.481387 Will perform SMM setup.
432 12:07:26.487817 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
433 12:07:26.494784 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
434 12:07:26.501069 Processing 16 relocs. Offset value of 0x00030000
435 12:07:26.504639 Attempting to start 7 APs
436 12:07:26.507814 Waiting for 10ms after sending INIT.
437 12:07:26.523516 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
438 12:07:26.526812 AP: slot 6 apic_id 2.
439 12:07:26.530420 AP: slot 2 apic_id 3.
440 12:07:26.530505 AP: slot 7 apic_id 4.
441 12:07:26.533435 AP: slot 3 apic_id 5.
442 12:07:26.536828 AP: slot 4 apic_id 7.
443 12:07:26.536914 AP: slot 5 apic_id 6.
444 12:07:26.536981 done.
445 12:07:26.543496 Waiting for 2nd SIPI to complete...done.
446 12:07:26.550136 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
447 12:07:26.556450 Processing 13 relocs. Offset value of 0x00038000
448 12:07:26.556535 Unable to locate Global NVS
449 12:07:26.559929
450 12:07:26.566425 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 12:07:26.569838 Installing permanent SMM handler to 0x7b000000
452 12:07:26.579639 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 12:07:26.583023 Processing 794 relocs. Offset value of 0x7b010000
454 12:07:26.592928 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 12:07:26.596385 Processing 13 relocs. Offset value of 0x7b008000
456 12:07:26.603016 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 12:07:26.609694 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 12:07:26.612846 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 12:07:26.619627 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 12:07:26.626408 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 12:07:26.633053 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 12:07:26.639555 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 12:07:26.639642 Unable to locate Global NVS
464 12:07:26.649412 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 12:07:26.652717 Clearing SMI status registers
466 12:07:26.652802 SMI_STS: PM1
467 12:07:26.656066 PM1_STS: PWRBTN
468 12:07:26.662844 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 12:07:26.665962 In relocation handler: CPU 0
470 12:07:26.669189 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 12:07:26.676130 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 12:07:26.676218 Relocation complete.
473 12:07:26.686191 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 12:07:26.686278 In relocation handler: CPU 1
475 12:07:26.692842 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 12:07:26.692928 Relocation complete.
477 12:07:26.702782 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
478 12:07:26.702868 In relocation handler: CPU 3
479 12:07:26.709044 New SMBASE=0x7afff400 IEDBASE=0x7b400000
480 12:07:26.709130 Relocation complete.
481 12:07:26.719091 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
482 12:07:26.719177 In relocation handler: CPU 7
483 12:07:26.725676 New SMBASE=0x7affe400 IEDBASE=0x7b400000
484 12:07:26.729451 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 12:07:26.732730 Relocation complete.
486 12:07:26.739377 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
487 12:07:26.742695 In relocation handler: CPU 4
488 12:07:26.745602 New SMBASE=0x7afff000 IEDBASE=0x7b400000
489 12:07:26.749065 Relocation complete.
490 12:07:26.755316 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
491 12:07:26.758688 In relocation handler: CPU 5
492 12:07:26.762033 New SMBASE=0x7affec00 IEDBASE=0x7b400000
493 12:07:26.768589 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 12:07:26.768674 Relocation complete.
495 12:07:26.775181 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
496 12:07:26.778445 In relocation handler: CPU 6
497 12:07:26.785104 New SMBASE=0x7affe800 IEDBASE=0x7b400000
498 12:07:26.788660 Writing SMRR. base = 0x7b000006, mask=0xff800c00
499 12:07:26.791994 Relocation complete.
500 12:07:26.798450 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
501 12:07:26.802296 In relocation handler: CPU 2
502 12:07:26.806256 New SMBASE=0x7afff800 IEDBASE=0x7b400000
503 12:07:26.806342 Relocation complete.
504 12:07:26.809990 Initializing CPU #0
505 12:07:26.813194 CPU: vendor Intel device 806c1
506 12:07:26.816780 CPU: family 06, model 8c, stepping 01
507 12:07:26.820023 Clearing out pending MCEs
508 12:07:26.823054 Setting up local APIC...
509 12:07:26.823138 apic_id: 0x00 done.
510 12:07:26.826618 Turbo is available but hidden
511 12:07:26.829464 Turbo is available and visible
512 12:07:26.836102 microcode: Update skipped, already up-to-date
513 12:07:26.836185 CPU #0 initialized
514 12:07:26.839655 Initializing CPU #1
515 12:07:26.839741 Initializing CPU #3
516 12:07:26.842793 Initializing CPU #7
517 12:07:26.846349 CPU: vendor Intel device 806c1
518 12:07:26.849611 CPU: family 06, model 8c, stepping 01
519 12:07:26.853039 CPU: vendor Intel device 806c1
520 12:07:26.856336 CPU: family 06, model 8c, stepping 01
521 12:07:26.859763 Clearing out pending MCEs
522 12:07:26.862915 Clearing out pending MCEs
523 12:07:26.866113 Setting up local APIC...
524 12:07:26.869445 CPU: vendor Intel device 806c1
525 12:07:26.872793 CPU: family 06, model 8c, stepping 01
526 12:07:26.872877 apic_id: 0x05 done.
527 12:07:26.876109 Setting up local APIC...
528 12:07:26.879676 Initializing CPU #5
529 12:07:26.879761 Initializing CPU #4
530 12:07:26.882783 CPU: vendor Intel device 806c1
531 12:07:26.885846 CPU: family 06, model 8c, stepping 01
532 12:07:26.889336 CPU: vendor Intel device 806c1
533 12:07:26.896260 CPU: family 06, model 8c, stepping 01
534 12:07:26.896359 Clearing out pending MCEs
535 12:07:26.899595 Clearing out pending MCEs
536 12:07:26.902579 Setting up local APIC...
537 12:07:26.906262 apic_id: 0x04 done.
538 12:07:26.909134 microcode: Update skipped, already up-to-date
539 12:07:26.912505 microcode: Update skipped, already up-to-date
540 12:07:26.915984 CPU #3 initialized
541 12:07:26.916066 CPU #7 initialized
542 12:07:26.919155 Initializing CPU #6
543 12:07:26.922388 Initializing CPU #2
544 12:07:26.925887 CPU: vendor Intel device 806c1
545 12:07:26.929131 CPU: family 06, model 8c, stepping 01
546 12:07:26.932477 CPU: vendor Intel device 806c1
547 12:07:26.935762 CPU: family 06, model 8c, stepping 01
548 12:07:26.939125 Clearing out pending MCEs
549 12:07:26.939208 Clearing out pending MCEs
550 12:07:26.942363 Setting up local APIC...
551 12:07:26.945796 Clearing out pending MCEs
552 12:07:26.949184 apic_id: 0x02 done.
553 12:07:26.949266 Setting up local APIC...
554 12:07:26.952225 Setting up local APIC...
555 12:07:26.955760 apic_id: 0x06 done.
556 12:07:26.959108 Setting up local APIC...
557 12:07:26.959207 apic_id: 0x03 done.
558 12:07:26.965413 microcode: Update skipped, already up-to-date
559 12:07:26.968814 microcode: Update skipped, already up-to-date
560 12:07:26.972284 CPU #6 initialized
561 12:07:26.972367 CPU #2 initialized
562 12:07:26.975603 apic_id: 0x01 done.
563 12:07:26.975686 apic_id: 0x07 done.
564 12:07:26.978963
565 12:07:26.982439 microcode: Update skipped, already up-to-date
566 12:07:26.985697 microcode: Update skipped, already up-to-date
567 12:07:26.988916 CPU #5 initialized
568 12:07:26.989001 CPU #4 initialized
569 12:07:26.995826 microcode: Update skipped, already up-to-date
570 12:07:26.995909 CPU #1 initialized
571 12:07:27.002575 bsp_do_flight_plan done after 455 msecs.
572 12:07:27.005469 CPU: frequency set to 4000 MHz
573 12:07:27.005620 Enabling SMIs.
574 12:07:27.011987 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 12:07:27.028565 SATAXPCIE1 indicates PCIe NVMe is present
576 12:07:27.031862 Probing TPM: done!
577 12:07:27.034947 Connected to device vid:did:rid of 1ae0:0028:00
578 12:07:27.045940 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
579 12:07:27.049059 Initialized TPM device CR50 revision 0
580 12:07:27.052373 Enabling S0i3.4
581 12:07:27.059163 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 12:07:27.062719 Found a VBT of 8704 bytes after decompression
583 12:07:27.069305 cse_lite: CSE RO boot. HybridStorageMode disabled
584 12:07:27.075674 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 12:07:27.152300 FSPS returned 0
586 12:07:27.155428 Executing Phase 1 of FspMultiPhaseSiInit
587 12:07:27.165280 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 12:07:27.168541 port C0 DISC req: usage 1 usb3 1 usb2 5
589 12:07:27.171846 Raw Buffer output 0 00000511
590 12:07:27.174999 Raw Buffer output 1 00000000
591 12:07:27.178890 pmc_send_ipc_cmd succeeded
592 12:07:27.182467 port C1 DISC req: usage 1 usb3 2 usb2 3
593 12:07:27.185592
594 12:07:27.185676 Raw Buffer output 0 00000321
595 12:07:27.188817 Raw Buffer output 1 00000000
596 12:07:27.192945 pmc_send_ipc_cmd succeeded
597 12:07:27.198076 Detected 4 core, 8 thread CPU.
598 12:07:27.201677 Detected 4 core, 8 thread CPU.
599 12:07:27.435696 Display FSP Version Info HOB
600 12:07:27.439031 Reference Code - CPU = a.0.4c.31
601 12:07:27.442326 uCode Version = 0.0.0.86
602 12:07:27.445212 TXT ACM version = ff.ff.ff.ffff
603 12:07:27.448992 Reference Code - ME = a.0.4c.31
604 12:07:27.452127 MEBx version = 0.0.0.0
605 12:07:27.455475 ME Firmware Version = Consumer SKU
606 12:07:27.458584 Reference Code - PCH = a.0.4c.31
607 12:07:27.462298 PCH-CRID Status = Disabled
608 12:07:27.465350 PCH-CRID Original Value = ff.ff.ff.ffff
609 12:07:27.468623 PCH-CRID New Value = ff.ff.ff.ffff
610 12:07:27.471951 OPROM - RST - RAID = ff.ff.ff.ffff
611 12:07:27.475200 PCH Hsio Version = 4.0.0.0
612 12:07:27.478608 Reference Code - SA - System Agent = a.0.4c.31
613 12:07:27.482133 Reference Code - MRC = 2.0.0.1
614 12:07:27.485207 SA - PCIe Version = a.0.4c.31
615 12:07:27.488859 SA-CRID Status = Disabled
616 12:07:27.491912 SA-CRID Original Value = 0.0.0.1
617 12:07:27.495481 SA-CRID New Value = 0.0.0.1
618 12:07:27.498531 OPROM - VBIOS = ff.ff.ff.ffff
619 12:07:27.502015 IO Manageability Engine FW Version = 11.1.4.0
620 12:07:27.505642 PHY Build Version = 0.0.0.e0
621 12:07:27.508849 Thunderbolt(TM) FW Version = 0.0.0.0
622 12:07:27.515375 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
623 12:07:27.519182 ITSS IRQ Polarities Before:
624 12:07:27.519267 IPC0: 0xffffffff
625 12:07:27.521977 IPC1: 0xffffffff
626 12:07:27.522077 IPC2: 0xffffffff
627 12:07:27.525290 IPC3: 0xffffffff
628 12:07:27.528535 ITSS IRQ Polarities After:
629 12:07:27.528618 IPC0: 0xffffffff
630 12:07:27.531815 IPC1: 0xffffffff
631 12:07:27.531898 IPC2: 0xffffffff
632 12:07:27.535383 IPC3: 0xffffffff
633 12:07:27.538585 Found PCIe Root Port #9 at PCI: 00:1d.0.
634 12:07:27.551771 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
635 12:07:27.561762 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
636 12:07:27.575165 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
637 12:07:27.581419 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
638 12:07:27.585307 Enumerating buses...
639 12:07:27.588432 Show all devs... Before device enumeration.
640 12:07:27.591575 Root Device: enabled 1
641 12:07:27.591660 DOMAIN: 0000: enabled 1
642 12:07:27.594859 CPU_CLUSTER: 0: enabled 1
643 12:07:27.598085 PCI: 00:00.0: enabled 1
644 12:07:27.601398 PCI: 00:02.0: enabled 1
645 12:07:27.601487 PCI: 00:04.0: enabled 1
646 12:07:27.604771 PCI: 00:05.0: enabled 1
647 12:07:27.608346 PCI: 00:06.0: enabled 0
648 12:07:27.608431 PCI: 00:07.0: enabled 0
649 12:07:27.611651
650 12:07:27.611736 PCI: 00:07.1: enabled 0
651 12:07:27.615018 PCI: 00:07.2: enabled 0
652 12:07:27.618045 PCI: 00:07.3: enabled 0
653 12:07:27.618129 PCI: 00:08.0: enabled 1
654 12:07:27.621417 PCI: 00:09.0: enabled 0
655 12:07:27.624835 PCI: 00:0a.0: enabled 0
656 12:07:27.628180 PCI: 00:0d.0: enabled 1
657 12:07:27.628265 PCI: 00:0d.1: enabled 0
658 12:07:27.631278 PCI: 00:0d.2: enabled 0
659 12:07:27.634685 PCI: 00:0d.3: enabled 0
660 12:07:27.638290 PCI: 00:0e.0: enabled 0
661 12:07:27.638373 PCI: 00:10.2: enabled 1
662 12:07:27.641715 PCI: 00:10.6: enabled 0
663 12:07:27.644548 PCI: 00:10.7: enabled 0
664 12:07:27.648112 PCI: 00:12.0: enabled 0
665 12:07:27.648196 PCI: 00:12.6: enabled 0
666 12:07:27.651696 PCI: 00:13.0: enabled 0
667 12:07:27.654802 PCI: 00:14.0: enabled 1
668 12:07:27.654887 PCI: 00:14.1: enabled 0
669 12:07:27.657900 PCI: 00:14.2: enabled 1
670 12:07:27.661364 PCI: 00:14.3: enabled 1
671 12:07:27.664667 PCI: 00:15.0: enabled 1
672 12:07:27.664778 PCI: 00:15.1: enabled 1
673 12:07:27.667856 PCI: 00:15.2: enabled 1
674 12:07:27.671439 PCI: 00:15.3: enabled 1
675 12:07:27.674657 PCI: 00:16.0: enabled 1
676 12:07:27.674740 PCI: 00:16.1: enabled 0
677 12:07:27.677782 PCI: 00:16.2: enabled 0
678 12:07:27.681223 PCI: 00:16.3: enabled 0
679 12:07:27.684828 PCI: 00:16.4: enabled 0
680 12:07:27.684910 PCI: 00:16.5: enabled 0
681 12:07:27.687922 PCI: 00:17.0: enabled 1
682 12:07:27.691205 PCI: 00:19.0: enabled 0
683 12:07:27.691287 PCI: 00:19.1: enabled 1
684 12:07:27.694565
685 12:07:27.694648 PCI: 00:19.2: enabled 0
686 12:07:27.697783 PCI: 00:1c.0: enabled 1
687 12:07:27.701121 PCI: 00:1c.1: enabled 0
688 12:07:27.701204 PCI: 00:1c.2: enabled 0
689 12:07:27.704582 PCI: 00:1c.3: enabled 0
690 12:07:27.708142 PCI: 00:1c.4: enabled 0
691 12:07:27.710920 PCI: 00:1c.5: enabled 0
692 12:07:27.711003 PCI: 00:1c.6: enabled 1
693 12:07:27.714629 PCI: 00:1c.7: enabled 0
694 12:07:27.717588 PCI: 00:1d.0: enabled 1
695 12:07:27.721020 PCI: 00:1d.1: enabled 0
696 12:07:27.721103 PCI: 00:1d.2: enabled 1
697 12:07:27.724824 PCI: 00:1d.3: enabled 0
698 12:07:27.727841 PCI: 00:1e.0: enabled 1
699 12:07:27.730985 PCI: 00:1e.1: enabled 0
700 12:07:27.731068 PCI: 00:1e.2: enabled 1
701 12:07:27.734276 PCI: 00:1e.3: enabled 1
702 12:07:27.737481 PCI: 00:1f.0: enabled 1
703 12:07:27.737591 PCI: 00:1f.1: enabled 0
704 12:07:27.741151 PCI: 00:1f.2: enabled 1
705 12:07:27.744248 PCI: 00:1f.3: enabled 1
706 12:07:27.747675 PCI: 00:1f.4: enabled 0
707 12:07:27.747758 PCI: 00:1f.5: enabled 1
708 12:07:27.751134 PCI: 00:1f.6: enabled 0
709 12:07:27.754431 PCI: 00:1f.7: enabled 0
710 12:07:27.754514 APIC: 00: enabled 1
711 12:07:27.757407
712 12:07:27.757496 GENERIC: 0.0: enabled 1
713 12:07:27.760983 GENERIC: 0.0: enabled 1
714 12:07:27.764179 GENERIC: 1.0: enabled 1
715 12:07:27.764263 GENERIC: 0.0: enabled 1
716 12:07:27.767870 GENERIC: 1.0: enabled 1
717 12:07:27.770948 USB0 port 0: enabled 1
718 12:07:27.774253 GENERIC: 0.0: enabled 1
719 12:07:27.774336 USB0 port 0: enabled 1
720 12:07:27.777413 GENERIC: 0.0: enabled 1
721 12:07:27.781027 I2C: 00:1a: enabled 1
722 12:07:27.781110 I2C: 00:31: enabled 1
723 12:07:27.784113 I2C: 00:32: enabled 1
724 12:07:27.787620 I2C: 00:10: enabled 1
725 12:07:27.787717 I2C: 00:15: enabled 1
726 12:07:27.790746 GENERIC: 0.0: enabled 0
727 12:07:27.793979 GENERIC: 1.0: enabled 0
728 12:07:27.797255 GENERIC: 0.0: enabled 1
729 12:07:27.797338 SPI: 00: enabled 1
730 12:07:27.800803 SPI: 00: enabled 1
731 12:07:27.804261 PNP: 0c09.0: enabled 1
732 12:07:27.804343 GENERIC: 0.0: enabled 1
733 12:07:27.807602 USB3 port 0: enabled 1
734 12:07:27.810643 USB3 port 1: enabled 1
735 12:07:27.810725 USB3 port 2: enabled 0
736 12:07:27.814255 USB3 port 3: enabled 0
737 12:07:27.817492 USB2 port 0: enabled 0
738 12:07:27.817604 USB2 port 1: enabled 1
739 12:07:27.820573
740 12:07:27.820655 USB2 port 2: enabled 1
741 12:07:27.824026 USB2 port 3: enabled 0
742 12:07:27.827470 USB2 port 4: enabled 1
743 12:07:27.827553 USB2 port 5: enabled 0
744 12:07:27.830853 USB2 port 6: enabled 0
745 12:07:27.834096 USB2 port 7: enabled 0
746 12:07:27.834179 USB2 port 8: enabled 0
747 12:07:27.837208 USB2 port 9: enabled 0
748 12:07:27.840635 USB3 port 0: enabled 0
749 12:07:27.843881 USB3 port 1: enabled 1
750 12:07:27.843964 USB3 port 2: enabled 0
751 12:07:27.847301 USB3 port 3: enabled 0
752 12:07:27.850752 GENERIC: 0.0: enabled 1
753 12:07:27.850834 GENERIC: 1.0: enabled 1
754 12:07:27.854002 APIC: 01: enabled 1
755 12:07:27.857113 APIC: 03: enabled 1
756 12:07:27.857195 APIC: 05: enabled 1
757 12:07:27.861029 APIC: 07: enabled 1
758 12:07:27.864144 APIC: 06: enabled 1
759 12:07:27.864226 APIC: 02: enabled 1
760 12:07:27.867825 APIC: 04: enabled 1
761 12:07:27.867907 Compare with tree...
762 12:07:27.870464 Root Device: enabled 1
763 12:07:27.873969 DOMAIN: 0000: enabled 1
764 12:07:27.877516 PCI: 00:00.0: enabled 1
765 12:07:27.877637 PCI: 00:02.0: enabled 1
766 12:07:27.880708 PCI: 00:04.0: enabled 1
767 12:07:27.883889 GENERIC: 0.0: enabled 1
768 12:07:27.887149 PCI: 00:05.0: enabled 1
769 12:07:27.890544 PCI: 00:06.0: enabled 0
770 12:07:27.890627 PCI: 00:07.0: enabled 0
771 12:07:27.893752 GENERIC: 0.0: enabled 1
772 12:07:27.897090 PCI: 00:07.1: enabled 0
773 12:07:27.900458 GENERIC: 1.0: enabled 1
774 12:07:27.904045 PCI: 00:07.2: enabled 0
775 12:07:27.906900 GENERIC: 0.0: enabled 1
776 12:07:27.906997 PCI: 00:07.3: enabled 0
777 12:07:27.910266 GENERIC: 1.0: enabled 1
778 12:07:27.913690 PCI: 00:08.0: enabled 1
779 12:07:27.916785 PCI: 00:09.0: enabled 0
780 12:07:27.920223 PCI: 00:0a.0: enabled 0
781 12:07:27.920334 PCI: 00:0d.0: enabled 1
782 12:07:27.923561 USB0 port 0: enabled 1
783 12:07:27.926830 USB3 port 0: enabled 1
784 12:07:27.930018 USB3 port 1: enabled 1
785 12:07:27.933897 USB3 port 2: enabled 0
786 12:07:27.933978 USB3 port 3: enabled 0
787 12:07:27.937166 PCI: 00:0d.1: enabled 0
788 12:07:27.940152 PCI: 00:0d.2: enabled 0
789 12:07:27.943791 GENERIC: 0.0: enabled 1
790 12:07:27.946805 PCI: 00:0d.3: enabled 0
791 12:07:27.946887 PCI: 00:0e.0: enabled 0
792 12:07:27.950419 PCI: 00:10.2: enabled 1
793 12:07:27.953617 PCI: 00:10.6: enabled 0
794 12:07:27.956790 PCI: 00:10.7: enabled 0
795 12:07:27.960780 PCI: 00:12.0: enabled 0
796 12:07:27.960865 PCI: 00:12.6: enabled 0
797 12:07:27.963591 PCI: 00:13.0: enabled 0
798 12:07:27.966582 PCI: 00:14.0: enabled 1
799 12:07:27.970181 USB0 port 0: enabled 1
800 12:07:27.973388 USB2 port 0: enabled 0
801 12:07:27.973469 USB2 port 1: enabled 1
802 12:07:27.976423 USB2 port 2: enabled 1
803 12:07:27.980162 USB2 port 3: enabled 0
804 12:07:27.983185 USB2 port 4: enabled 1
805 12:07:27.986452 USB2 port 5: enabled 0
806 12:07:27.990264 USB2 port 6: enabled 0
807 12:07:27.990347 USB2 port 7: enabled 0
808 12:07:27.993413 USB2 port 8: enabled 0
809 12:07:27.996606 USB2 port 9: enabled 0
810 12:07:28.000042 USB3 port 0: enabled 0
811 12:07:28.003420 USB3 port 1: enabled 1
812 12:07:28.006689 USB3 port 2: enabled 0
813 12:07:28.006774 USB3 port 3: enabled 0
814 12:07:28.009752 PCI: 00:14.1: enabled 0
815 12:07:28.013028 PCI: 00:14.2: enabled 1
816 12:07:28.016637 PCI: 00:14.3: enabled 1
817 12:07:28.019836 GENERIC: 0.0: enabled 1
818 12:07:28.019921 PCI: 00:15.0: enabled 1
819 12:07:28.023180 I2C: 00:1a: enabled 1
820 12:07:28.026432 I2C: 00:31: enabled 1
821 12:07:28.029686 I2C: 00:32: enabled 1
822 12:07:28.029771 PCI: 00:15.1: enabled 1
823 12:07:28.032987 I2C: 00:10: enabled 1
824 12:07:28.036408 PCI: 00:15.2: enabled 1
825 12:07:28.039623 PCI: 00:15.3: enabled 1
826 12:07:28.043945 PCI: 00:16.0: enabled 1
827 12:07:28.044030 PCI: 00:16.1: enabled 0
828 12:07:28.046860 PCI: 00:16.2: enabled 0
829 12:07:28.050627 PCI: 00:16.3: enabled 0
830 12:07:28.050716 PCI: 00:16.4: enabled 0
831 12:07:28.054325 PCI: 00:16.5: enabled 0
832 12:07:28.057367 PCI: 00:17.0: enabled 1
833 12:07:28.060819 PCI: 00:19.0: enabled 0
834 12:07:28.064253 PCI: 00:19.1: enabled 1
835 12:07:28.064339 I2C: 00:15: enabled 1
836 12:07:28.067594 PCI: 00:19.2: enabled 0
837 12:07:28.070508 PCI: 00:1d.0: enabled 1
838 12:07:28.074263 GENERIC: 0.0: enabled 1
839 12:07:28.077038 PCI: 00:1e.0: enabled 1
840 12:07:28.077124 PCI: 00:1e.1: enabled 0
841 12:07:28.127024 PCI: 00:1e.2: enabled 1
842 12:07:28.127141 SPI: 00: enabled 1
843 12:07:28.127472 PCI: 00:1e.3: enabled 1
844 12:07:28.127557 SPI: 00: enabled 1
845 12:07:28.127624 PCI: 00:1f.0: enabled 1
846 12:07:28.127871 PNP: 0c09.0: enabled 1
847 12:07:28.127939 PCI: 00:1f.1: enabled 0
848 12:07:28.127999 PCI: 00:1f.2: enabled 1
849 12:07:28.128057 GENERIC: 0.0: enabled 1
850 12:07:28.128297 GENERIC: 0.0: enabled 1
851 12:07:28.128361 GENERIC: 1.0: enabled 1
852 12:07:28.128421 PCI: 00:1f.3: enabled 1
853 12:07:28.128718 PCI: 00:1f.4: enabled 0
854 12:07:28.128804 PCI: 00:1f.5: enabled 1
855 12:07:28.129056 PCI: 00:1f.6: enabled 0
856 12:07:28.129125 PCI: 00:1f.7: enabled 0
857 12:07:28.129187 CPU_CLUSTER: 0: enabled 1
858 12:07:28.129248 APIC: 00: enabled 1
859 12:07:28.129306 APIC: 01: enabled 1
860 12:07:28.149740 APIC: 03: enabled 1
861 12:07:28.149831 APIC: 05: enabled 1
862 12:07:28.149899 APIC: 07: enabled 1
863 12:07:28.150151 APIC: 06: enabled 1
864 12:07:28.150221 APIC: 02: enabled 1
865 12:07:28.150283 APIC: 04: enabled 1
866 12:07:28.150561 Root Device scanning...
867 12:07:28.150627 scan_static_bus for Root Device
868 12:07:28.153367 DOMAIN: 0000 enabled
869 12:07:28.153453 CPU_CLUSTER: 0 enabled
870 12:07:28.156304 DOMAIN: 0000 scanning...
871 12:07:28.159908 PCI: pci_scan_bus for bus 00
872 12:07:28.163048 PCI: 00:00.0 [8086/0000] ops
873 12:07:28.166483 PCI: 00:00.0 [8086/9a12] enabled
874 12:07:28.170003 PCI: 00:02.0 [8086/0000] bus ops
875 12:07:28.173069 PCI: 00:02.0 [8086/9a40] enabled
876 12:07:28.176240 PCI: 00:04.0 [8086/0000] bus ops
877 12:07:28.179612 PCI: 00:04.0 [8086/9a03] enabled
878 12:07:28.183108 PCI: 00:05.0 [8086/9a19] enabled
879 12:07:28.186519 PCI: 00:07.0 [0000/0000] hidden
880 12:07:28.189674 PCI: 00:08.0 [8086/9a11] enabled
881 12:07:28.192970 PCI: 00:0a.0 [8086/9a0d] disabled
882 12:07:28.196421 PCI: 00:0d.0 [8086/0000] bus ops
883 12:07:28.199842 PCI: 00:0d.0 [8086/9a13] enabled
884 12:07:28.203161 PCI: 00:14.0 [8086/0000] bus ops
885 12:07:28.206315 PCI: 00:14.0 [8086/a0ed] enabled
886 12:07:28.209829 PCI: 00:14.2 [8086/a0ef] enabled
887 12:07:28.213011 PCI: 00:14.3 [8086/0000] bus ops
888 12:07:28.216094 PCI: 00:14.3 [8086/a0f0] enabled
889 12:07:28.219361 PCI: 00:15.0 [8086/0000] bus ops
890 12:07:28.222803 PCI: 00:15.0 [8086/a0e8] enabled
891 12:07:28.226048 PCI: 00:15.1 [8086/0000] bus ops
892 12:07:28.229756 PCI: 00:15.1 [8086/a0e9] enabled
893 12:07:28.232698 PCI: 00:15.2 [8086/0000] bus ops
894 12:07:28.236215 PCI: 00:15.2 [8086/a0ea] enabled
895 12:07:28.239510 PCI: 00:15.3 [8086/0000] bus ops
896 12:07:28.242734 PCI: 00:15.3 [8086/a0eb] enabled
897 12:07:28.246249 PCI: 00:16.0 [8086/0000] ops
898 12:07:28.249255 PCI: 00:16.0 [8086/a0e0] enabled
899 12:07:28.253013 PCI: Static device PCI: 00:17.0 not found, disabling it.
900 12:07:28.256055 PCI: 00:19.0 [8086/0000] bus ops
901 12:07:28.259564 PCI: 00:19.0 [8086/a0c5] disabled
902 12:07:28.262691 PCI: 00:19.1 [8086/0000] bus ops
903 12:07:28.265842 PCI: 00:19.1 [8086/a0c6] enabled
904 12:07:28.269188 PCI: 00:1d.0 [8086/0000] bus ops
905 12:07:28.272582 PCI: 00:1d.0 [8086/a0b0] enabled
906 12:07:28.275920 PCI: 00:1e.0 [8086/0000] ops
907 12:07:28.279137 PCI: 00:1e.0 [8086/a0a8] enabled
908 12:07:28.282594 PCI: 00:1e.2 [8086/0000] bus ops
909 12:07:28.285829 PCI: 00:1e.2 [8086/a0aa] enabled
910 12:07:28.288990 PCI: 00:1e.3 [8086/0000] bus ops
911 12:07:28.292481 PCI: 00:1e.3 [8086/a0ab] enabled
912 12:07:28.295778 PCI: 00:1f.0 [8086/0000] bus ops
913 12:07:28.299024 PCI: 00:1f.0 [8086/a087] enabled
914 12:07:28.302291 RTC Init
915 12:07:28.305860 Set power on after power failure.
916 12:07:28.305944 Disabling Deep S3
917 12:07:28.309182 Disabling Deep S3
918 12:07:28.309265 Disabling Deep S4
919 12:07:28.312342 Disabling Deep S4
920 12:07:28.315727 Disabling Deep S5
921 12:07:28.315811 Disabling Deep S5
922 12:07:28.319092 PCI: 00:1f.2 [0000/0000] hidden
923 12:07:28.322206 PCI: 00:1f.3 [8086/0000] bus ops
924 12:07:28.325705 PCI: 00:1f.3 [8086/a0c8] enabled
925 12:07:28.328978 PCI: 00:1f.5 [8086/0000] bus ops
926 12:07:28.332440 PCI: 00:1f.5 [8086/a0a4] enabled
927 12:07:28.335501 PCI: Leftover static devices:
928 12:07:28.335588 PCI: 00:10.2
929 12:07:28.338801
930 12:07:28.338888 PCI: 00:10.6
931 12:07:28.338974 PCI: 00:10.7
932 12:07:28.341926 PCI: 00:06.0
933 12:07:28.342013 PCI: 00:07.1
934 12:07:28.345259 PCI: 00:07.2
935 12:07:28.345345 PCI: 00:07.3
936 12:07:28.345429 PCI: 00:09.0
937 12:07:28.348634 PCI: 00:0d.1
938 12:07:28.348720 PCI: 00:0d.2
939 12:07:28.351990 PCI: 00:0d.3
940 12:07:28.352078 PCI: 00:0e.0
941 12:07:28.352163 PCI: 00:12.0
942 12:07:28.355065
943 12:07:28.355152 PCI: 00:12.6
944 12:07:28.355236 PCI: 00:13.0
945 12:07:28.358495 PCI: 00:14.1
946 12:07:28.358581 PCI: 00:16.1
947 12:07:28.361716 PCI: 00:16.2
948 12:07:28.361803 PCI: 00:16.3
949 12:07:28.361888 PCI: 00:16.4
950 12:07:28.365369 PCI: 00:16.5
951 12:07:28.365454 PCI: 00:17.0
952 12:07:28.368556 PCI: 00:19.2
953 12:07:28.368643 PCI: 00:1e.1
954 12:07:28.368728 PCI: 00:1f.1
955 12:07:28.371944 PCI: 00:1f.4
956 12:07:28.372030 PCI: 00:1f.6
957 12:07:28.375176 PCI: 00:1f.7
958 12:07:28.378428 PCI: Check your devicetree.cb.
959 12:07:28.378515 PCI: 00:02.0 scanning...
960 12:07:28.385022 scan_generic_bus for PCI: 00:02.0
961 12:07:28.388863 scan_generic_bus for PCI: 00:02.0 done
962 12:07:28.391765 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 12:07:28.395084 PCI: 00:04.0 scanning...
964 12:07:28.398677 scan_generic_bus for PCI: 00:04.0
965 12:07:28.401682 GENERIC: 0.0 enabled
966 12:07:28.405049 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 12:07:28.411535 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 12:07:28.414774 PCI: 00:0d.0 scanning...
969 12:07:28.418194 scan_static_bus for PCI: 00:0d.0
970 12:07:28.418281 USB0 port 0 enabled
971 12:07:28.421485 USB0 port 0 scanning...
972 12:07:28.424910 scan_static_bus for USB0 port 0
973 12:07:28.427917 USB3 port 0 enabled
974 12:07:28.427993 USB3 port 1 enabled
975 12:07:28.431350 USB3 port 2 disabled
976 12:07:28.434475 USB3 port 3 disabled
977 12:07:28.434559 USB3 port 0 scanning...
978 12:07:28.438264 scan_static_bus for USB3 port 0
979 12:07:28.444809 scan_static_bus for USB3 port 0 done
980 12:07:28.447972 scan_bus: bus USB3 port 0 finished in 6 msecs
981 12:07:28.451454 USB3 port 1 scanning...
982 12:07:28.454750 scan_static_bus for USB3 port 1
983 12:07:28.457978 scan_static_bus for USB3 port 1 done
984 12:07:28.461227 scan_bus: bus USB3 port 1 finished in 6 msecs
985 12:07:28.464705 scan_static_bus for USB0 port 0 done
986 12:07:28.471336 scan_bus: bus USB0 port 0 finished in 43 msecs
987 12:07:28.474380 scan_static_bus for PCI: 00:0d.0 done
988 12:07:28.477833 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 12:07:28.481204 PCI: 00:14.0 scanning...
990 12:07:28.484416 scan_static_bus for PCI: 00:14.0
991 12:07:28.487504 USB0 port 0 enabled
992 12:07:28.491411 USB0 port 0 scanning...
993 12:07:28.494536 scan_static_bus for USB0 port 0
994 12:07:28.494609 USB2 port 0 disabled
995 12:07:28.497704 USB2 port 1 enabled
996 12:07:28.500861 USB2 port 2 enabled
997 12:07:28.500933 USB2 port 3 disabled
998 12:07:28.504415 USB2 port 4 enabled
999 12:07:28.504514 USB2 port 5 disabled
1000 12:07:28.507643 USB2 port 6 disabled
1001 12:07:28.510932 USB2 port 7 disabled
1002 12:07:28.511009 USB2 port 8 disabled
1003 12:07:28.514333 USB2 port 9 disabled
1004 12:07:28.517382 USB3 port 0 disabled
1005 12:07:28.517460 USB3 port 1 enabled
1006 12:07:28.520676 USB3 port 2 disabled
1007 12:07:28.524053 USB3 port 3 disabled
1008 12:07:28.524129 USB2 port 1 scanning...
1009 12:07:28.527297 scan_static_bus for USB2 port 1
1010 12:07:28.533867 scan_static_bus for USB2 port 1 done
1011 12:07:28.537388 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 12:07:28.540708 USB2 port 2 scanning...
1013 12:07:28.544017 scan_static_bus for USB2 port 2
1014 12:07:28.547439 scan_static_bus for USB2 port 2 done
1015 12:07:28.550520 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 12:07:28.554091 USB2 port 4 scanning...
1017 12:07:28.557325 scan_static_bus for USB2 port 4
1018 12:07:28.560572 scan_static_bus for USB2 port 4 done
1019 12:07:28.563749 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 12:07:28.566886
1021 12:07:28.566960 USB3 port 1 scanning...
1022 12:07:28.570605 scan_static_bus for USB3 port 1
1023 12:07:28.573788 scan_static_bus for USB3 port 1 done
1024 12:07:28.580463 scan_bus: bus USB3 port 1 finished in 6 msecs
1025 12:07:28.583644 scan_static_bus for USB0 port 0 done
1026 12:07:28.587160 scan_bus: bus USB0 port 0 finished in 93 msecs
1027 12:07:28.590444 scan_static_bus for PCI: 00:14.0 done
1028 12:07:28.596768 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1029 12:07:28.600419 PCI: 00:14.3 scanning...
1030 12:07:28.603272 scan_static_bus for PCI: 00:14.3
1031 12:07:28.603349 GENERIC: 0.0 enabled
1032 12:07:28.609948 scan_static_bus for PCI: 00:14.3 done
1033 12:07:28.613282 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1034 12:07:28.616497 PCI: 00:15.0 scanning...
1035 12:07:28.620107 scan_static_bus for PCI: 00:15.0
1036 12:07:28.620194 I2C: 00:1a enabled
1037 12:07:28.623944 I2C: 00:31 enabled
1038 12:07:28.627397 I2C: 00:32 enabled
1039 12:07:28.630703 scan_static_bus for PCI: 00:15.0 done
1040 12:07:28.633897 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1041 12:07:28.637548 PCI: 00:15.1 scanning...
1042 12:07:28.640513 scan_static_bus for PCI: 00:15.1
1043 12:07:28.640596 I2C: 00:10 enabled
1044 12:07:28.647367 scan_static_bus for PCI: 00:15.1 done
1045 12:07:28.650604 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1046 12:07:28.653655 PCI: 00:15.2 scanning...
1047 12:07:28.657105 scan_static_bus for PCI: 00:15.2
1048 12:07:28.660346 scan_static_bus for PCI: 00:15.2 done
1049 12:07:28.663556 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1050 12:07:28.667243 PCI: 00:15.3 scanning...
1051 12:07:28.670090 scan_static_bus for PCI: 00:15.3
1052 12:07:28.673785 scan_static_bus for PCI: 00:15.3 done
1053 12:07:28.680227 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1054 12:07:28.683449 PCI: 00:19.1 scanning...
1055 12:07:28.686988 scan_static_bus for PCI: 00:19.1
1056 12:07:28.687065 I2C: 00:15 enabled
1057 12:07:28.689943 scan_static_bus for PCI: 00:19.1 done
1058 12:07:28.696789 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1059 12:07:28.700140 PCI: 00:1d.0 scanning...
1060 12:07:28.703408 do_pci_scan_bridge for PCI: 00:1d.0
1061 12:07:28.706563 PCI: pci_scan_bus for bus 01
1062 12:07:28.710051 PCI: 01:00.0 [1c5c/174a] enabled
1063 12:07:28.710130 GENERIC: 0.0 enabled
1064 12:07:28.716443 Enabling Common Clock Configuration
1065 12:07:28.719890 L1 Sub-State supported from root port 29
1066 12:07:28.722862 L1 Sub-State Support = 0xf
1067 12:07:28.726228 CommonModeRestoreTime = 0x28
1068 12:07:28.729533 Power On Value = 0x16, Power On Scale = 0x0
1069 12:07:28.729623 ASPM: Enabled L1
1070 12:07:28.736096 PCIe: Max_Payload_Size adjusted to 128
1071 12:07:28.739416 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1072 12:07:28.742907 PCI: 00:1e.2 scanning...
1073 12:07:28.745974 scan_generic_bus for PCI: 00:1e.2
1074 12:07:28.746073 SPI: 00 enabled
1075 12:07:28.749228
1076 12:07:28.752703 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1077 12:07:28.759300 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1078 12:07:28.762653 PCI: 00:1e.3 scanning...
1079 12:07:28.765861 scan_generic_bus for PCI: 00:1e.3
1080 12:07:28.765944 SPI: 00 enabled
1081 12:07:28.772433 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1082 12:07:28.775986 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1083 12:07:28.779356 PCI: 00:1f.0 scanning...
1084 12:07:28.782272 scan_static_bus for PCI: 00:1f.0
1085 12:07:28.786101 PNP: 0c09.0 enabled
1086 12:07:28.789218 PNP: 0c09.0 scanning...
1087 12:07:28.792351 scan_static_bus for PNP: 0c09.0
1088 12:07:28.795792 scan_static_bus for PNP: 0c09.0 done
1089 12:07:28.798906 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1090 12:07:28.802277 scan_static_bus for PCI: 00:1f.0 done
1091 12:07:28.808861 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1092 12:07:28.808946 PCI: 00:1f.2 scanning...
1093 12:07:28.812005
1094 12:07:28.815401 scan_static_bus for PCI: 00:1f.2
1095 12:07:28.815485 GENERIC: 0.0 enabled
1096 12:07:28.818686 GENERIC: 0.0 scanning...
1097 12:07:28.822251 scan_static_bus for GENERIC: 0.0
1098 12:07:28.825698 GENERIC: 0.0 enabled
1099 12:07:28.825782 GENERIC: 1.0 enabled
1100 12:07:28.832025 scan_static_bus for GENERIC: 0.0 done
1101 12:07:28.835289 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1102 12:07:28.838640 scan_static_bus for PCI: 00:1f.2 done
1103 12:07:28.845055 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1104 12:07:28.845141 PCI: 00:1f.3 scanning...
1105 12:07:28.848599 scan_static_bus for PCI: 00:1f.3
1106 12:07:28.855207 scan_static_bus for PCI: 00:1f.3 done
1107 12:07:28.858643 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1108 12:07:28.861797 PCI: 00:1f.5 scanning...
1109 12:07:28.865055 scan_generic_bus for PCI: 00:1f.5
1110 12:07:28.868439 scan_generic_bus for PCI: 00:1f.5 done
1111 12:07:28.871614 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1112 12:07:28.874980
1113 12:07:28.878476 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1114 12:07:28.881393 scan_static_bus for Root Device done
1115 12:07:28.888494 scan_bus: bus Root Device finished in 736 msecs
1116 12:07:28.888579 done
1117 12:07:28.894752 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1118 12:07:28.898183 Chrome EC: UHEPI supported
1119 12:07:28.901637 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1120 12:07:28.907939 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1121 12:07:28.911462 SPI flash protection: WPSW=0 SRP0=0
1122 12:07:28.918207 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1123 12:07:28.924632 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1124 12:07:28.924717 found VGA at PCI: 00:02.0
1125 12:07:28.928066 Setting up VGA for PCI: 00:02.0
1126 12:07:28.934723 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1127 12:07:28.937781 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1128 12:07:28.941243 Allocating resources...
1129 12:07:28.944436 Reading resources...
1130 12:07:28.947999 Root Device read_resources bus 0 link: 0
1131 12:07:28.950979 DOMAIN: 0000 read_resources bus 0 link: 0
1132 12:07:28.958320 PCI: 00:04.0 read_resources bus 1 link: 0
1133 12:07:28.961591 PCI: 00:04.0 read_resources bus 1 link: 0 done
1134 12:07:28.968877 PCI: 00:0d.0 read_resources bus 0 link: 0
1135 12:07:28.971802 USB0 port 0 read_resources bus 0 link: 0
1136 12:07:28.978926 USB0 port 0 read_resources bus 0 link: 0 done
1137 12:07:28.981643 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1138 12:07:28.985064 PCI: 00:14.0 read_resources bus 0 link: 0
1139 12:07:28.988773
1140 12:07:28.991612 USB0 port 0 read_resources bus 0 link: 0
1141 12:07:28.998568 USB0 port 0 read_resources bus 0 link: 0 done
1142 12:07:29.001828 PCI: 00:14.0 read_resources bus 0 link: 0 done
1143 12:07:29.008278 PCI: 00:14.3 read_resources bus 0 link: 0
1144 12:07:29.011535 PCI: 00:14.3 read_resources bus 0 link: 0 done
1145 12:07:29.015019 PCI: 00:15.0 read_resources bus 0 link: 0
1146 12:07:29.022451 PCI: 00:15.0 read_resources bus 0 link: 0 done
1147 12:07:29.025794 PCI: 00:15.1 read_resources bus 0 link: 0
1148 12:07:29.032525 PCI: 00:15.1 read_resources bus 0 link: 0 done
1149 12:07:29.035809 PCI: 00:19.1 read_resources bus 0 link: 0
1150 12:07:29.042825 PCI: 00:19.1 read_resources bus 0 link: 0 done
1151 12:07:29.045870 PCI: 00:1d.0 read_resources bus 1 link: 0
1152 12:07:29.053015 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1153 12:07:29.056050 PCI: 00:1e.2 read_resources bus 2 link: 0
1154 12:07:29.062721 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1155 12:07:29.065962 PCI: 00:1e.3 read_resources bus 3 link: 0
1156 12:07:29.072725 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1157 12:07:29.076037 PCI: 00:1f.0 read_resources bus 0 link: 0
1158 12:07:29.082594 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1159 12:07:29.086004 PCI: 00:1f.2 read_resources bus 0 link: 0
1160 12:07:29.089171 GENERIC: 0.0 read_resources bus 0 link: 0
1161 12:07:29.096279 GENERIC: 0.0 read_resources bus 0 link: 0 done
1162 12:07:29.099288 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1163 12:07:29.106736 DOMAIN: 0000 read_resources bus 0 link: 0 done
1164 12:07:29.109919 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1165 12:07:29.116686 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1166 12:07:29.119735 Root Device read_resources bus 0 link: 0 done
1167 12:07:29.123301 Done reading resources.
1168 12:07:29.129732 Show resources in subtree (Root Device)...After reading.
1169 12:07:29.133499 Root Device child on link 0 DOMAIN: 0000
1170 12:07:29.136641 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1171 12:07:29.146310 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1172 12:07:29.156592 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1173 12:07:29.160067 PCI: 00:00.0
1174 12:07:29.170050 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1175 12:07:29.176320 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1176 12:07:29.186257 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1177 12:07:29.196087 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1178 12:07:29.206176 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1179 12:07:29.216181 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1180 12:07:29.226279 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1181 12:07:29.232750 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1182 12:07:29.242480 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1183 12:07:29.252631 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1184 12:07:29.262648 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1185 12:07:29.272487 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1186 12:07:29.279266 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1187 12:07:29.289211 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1188 12:07:29.299049 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1189 12:07:29.308816 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1190 12:07:29.318874 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1191 12:07:29.328825 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1192 12:07:29.338776 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1193 12:07:29.345512 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1194 12:07:29.349012 PCI: 00:02.0
1195 12:07:29.358436 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1196 12:07:29.368651 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1197 12:07:29.378369 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1198 12:07:29.382240 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1199 12:07:29.391643 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1200 12:07:29.395224 GENERIC: 0.0
1201 12:07:29.395309 PCI: 00:05.0
1202 12:07:29.404992 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1203 12:07:29.411713 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1204 12:07:29.411799 GENERIC: 0.0
1205 12:07:29.415018 PCI: 00:08.0
1206 12:07:29.424808 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 12:07:29.424896 PCI: 00:0a.0
1208 12:07:29.428382 PCI: 00:0d.0 child on link 0 USB0 port 0
1209 12:07:29.438068 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1210 12:07:29.441248
1211 12:07:29.444637 USB0 port 0 child on link 0 USB3 port 0
1212 12:07:29.444722 USB3 port 0
1213 12:07:29.448124 USB3 port 1
1214 12:07:29.448208 USB3 port 2
1215 12:07:29.451632 USB3 port 3
1216 12:07:29.454678 PCI: 00:14.0 child on link 0 USB0 port 0
1217 12:07:29.464658 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1218 12:07:29.471210 USB0 port 0 child on link 0 USB2 port 0
1219 12:07:29.471294 USB2 port 0
1220 12:07:29.474725 USB2 port 1
1221 12:07:29.474809 USB2 port 2
1222 12:07:29.477965 USB2 port 3
1223 12:07:29.478104 USB2 port 4
1224 12:07:29.481465 USB2 port 5
1225 12:07:29.481584 USB2 port 6
1226 12:07:29.484626 USB2 port 7
1227 12:07:29.484709 USB2 port 8
1228 12:07:29.487968 USB2 port 9
1229 12:07:29.488052 USB3 port 0
1230 12:07:29.491162
1231 12:07:29.491246 USB3 port 1
1232 12:07:29.494477 USB3 port 2
1233 12:07:29.494561 USB3 port 3
1234 12:07:29.497760 PCI: 00:14.2
1235 12:07:29.507929 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 12:07:29.517652 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1237 12:07:29.520978 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1238 12:07:29.530739 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 12:07:29.530826 GENERIC: 0.0
1240 12:07:29.534142
1241 12:07:29.538333 PCI: 00:15.0 child on link 0 I2C: 00:1a
1242 12:07:29.547463 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:07:29.547549 I2C: 00:1a
1244 12:07:29.550589 I2C: 00:31
1245 12:07:29.550672 I2C: 00:32
1246 12:07:29.554007 PCI: 00:15.1 child on link 0 I2C: 00:10
1247 12:07:29.557595
1248 12:07:29.564142 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 12:07:29.567524
1250 12:07:29.567608 I2C: 00:10
1251 12:07:29.567674 PCI: 00:15.2
1252 12:07:29.577281 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1253 12:07:29.580785 PCI: 00:15.3
1254 12:07:29.590504 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 12:07:29.590589 PCI: 00:16.0
1256 12:07:29.600581 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:07:29.604266 PCI: 00:19.0
1258 12:07:29.607364 PCI: 00:19.1 child on link 0 I2C: 00:15
1259 12:07:29.617041 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 12:07:29.620670 I2C: 00:15
1261 12:07:29.623794 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1262 12:07:29.633865 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1263 12:07:29.643524 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1264 12:07:29.650622 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1265 12:07:29.653835 GENERIC: 0.0
1266 12:07:29.653919 PCI: 01:00.0
1267 12:07:29.663787 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1268 12:07:29.667041
1269 12:07:29.673452 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1270 12:07:29.684012 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1271 12:07:29.687274 PCI: 00:1e.0
1272 12:07:29.696807 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1273 12:07:29.700106 PCI: 00:1e.2 child on link 0 SPI: 00
1274 12:07:29.710003 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1275 12:07:29.713301 SPI: 00
1276 12:07:29.716722 PCI: 00:1e.3 child on link 0 SPI: 00
1277 12:07:29.726920 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1278 12:07:29.727007 SPI: 00
1279 12:07:29.730044 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1280 12:07:29.739772 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1281 12:07:29.743219 PNP: 0c09.0
1282 12:07:29.750321 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1283 12:07:29.756635 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1284 12:07:29.763046 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1285 12:07:29.773009 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1286 12:07:29.779547 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1287 12:07:29.779631 GENERIC: 0.0
1288 12:07:29.783387 GENERIC: 1.0
1289 12:07:29.783471 PCI: 00:1f.3
1290 12:07:29.792882 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1291 12:07:29.802868 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1292 12:07:29.805940 PCI: 00:1f.5
1293 12:07:29.816338 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1294 12:07:29.819255 CPU_CLUSTER: 0 child on link 0 APIC: 00
1295 12:07:29.819339 APIC: 00
1296 12:07:29.822682 APIC: 01
1297 12:07:29.822795 APIC: 03
1298 12:07:29.822864 APIC: 05
1299 12:07:29.826003 APIC: 07
1300 12:07:29.826086 APIC: 06
1301 12:07:29.829372 APIC: 02
1302 12:07:29.829458 APIC: 04
1303 12:07:29.836160 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1304 12:07:29.842704 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1305 12:07:29.849206 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1306 12:07:29.855830 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1307 12:07:29.859252 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1308 12:07:29.862393 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1309 12:07:29.865833 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1310 12:07:29.875688 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1311 12:07:29.882522 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1312 12:07:29.889296 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1313 12:07:29.895552 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1314 12:07:29.902140 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1315 12:07:29.911995 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1316 12:07:29.918897 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1317 12:07:29.925284 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1318 12:07:29.928473 DOMAIN: 0000: Resource ranges:
1319 12:07:29.932185 * Base: 1000, Size: 800, Tag: 100
1320 12:07:29.935255 * Base: 1900, Size: e700, Tag: 100
1321 12:07:29.942130 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1322 12:07:29.948694 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1323 12:07:29.955777 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1324 12:07:29.961774 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1325 12:07:29.971796 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1326 12:07:29.978547 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1327 12:07:29.984920 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1328 12:07:29.995423 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1329 12:07:30.001381 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1330 12:07:30.008265 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1331 12:07:30.018380 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1332 12:07:30.024743 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1333 12:07:30.031406 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1334 12:07:30.037857 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1335 12:07:30.041352
1336 12:07:30.047899 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1337 12:07:30.054765 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1338 12:07:30.061181 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1339 12:07:30.071466 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1340 12:07:30.077719 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1341 12:07:30.084670 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1342 12:07:30.088238
1343 12:07:30.094439 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1344 12:07:30.100858 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1345 12:07:30.107463 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1346 12:07:30.111040
1347 12:07:30.117627 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1348 12:07:30.124275 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1349 12:07:30.127804 DOMAIN: 0000: Resource ranges:
1350 12:07:30.130870 * Base: 7fc00000, Size: 40400000, Tag: 200
1351 12:07:30.137266 * Base: d0000000, Size: 28000000, Tag: 200
1352 12:07:30.140847 * Base: fa000000, Size: 1000000, Tag: 200
1353 12:07:30.143930 * Base: fb001000, Size: 2fff000, Tag: 200
1354 12:07:30.150766 * Base: fe010000, Size: 2e000, Tag: 200
1355 12:07:30.154144 * Base: fe03f000, Size: d41000, Tag: 200
1356 12:07:30.157317 * Base: fed88000, Size: 8000, Tag: 200
1357 12:07:30.161151 * Base: fed93000, Size: d000, Tag: 200
1358 12:07:30.164022 * Base: feda2000, Size: 1e000, Tag: 200
1359 12:07:30.167177
1360 12:07:30.170854 * Base: fede0000, Size: 1220000, Tag: 200
1361 12:07:30.173914 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1362 12:07:30.180426 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1363 12:07:30.187064 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1364 12:07:30.193994 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1365 12:07:30.200708 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1366 12:07:30.206946 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1367 12:07:30.213791 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1368 12:07:30.220320 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1369 12:07:30.226941 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1370 12:07:30.233592 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1371 12:07:30.240639 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1372 12:07:30.247212 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1373 12:07:30.253747 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1374 12:07:30.260191 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1375 12:07:30.266713 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1376 12:07:30.273714 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1377 12:07:30.280043 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1378 12:07:30.287006 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1379 12:07:30.293452 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1380 12:07:30.300330 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1381 12:07:30.306746 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1382 12:07:30.313137 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1383 12:07:30.319809 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1384 12:07:30.329905 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1385 12:07:30.336381 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1386 12:07:30.339526 PCI: 00:1d.0: Resource ranges:
1387 12:07:30.343361 * Base: 7fc00000, Size: 100000, Tag: 200
1388 12:07:30.350194 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1389 12:07:30.356202 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1390 12:07:30.362814 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1391 12:07:30.372946 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1392 12:07:30.379486 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1393 12:07:30.382520 Root Device assign_resources, bus 0 link: 0
1394 12:07:30.389187 DOMAIN: 0000 assign_resources, bus 0 link: 0
1395 12:07:30.395993 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1396 12:07:30.405661 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1397 12:07:30.412338 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1398 12:07:30.422268 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1399 12:07:30.425624 PCI: 00:04.0 assign_resources, bus 1 link: 0
1400 12:07:30.429001 PCI: 00:04.0 assign_resources, bus 1 link: 0
1401 12:07:30.432159
1402 12:07:30.439106 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1403 12:07:30.445703 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1404 12:07:30.448644
1405 12:07:30.455297 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1406 12:07:30.458582 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1407 12:07:30.465482 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1408 12:07:30.471871 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1409 12:07:30.478282 PCI: 00:14.0 assign_resources, bus 0 link: 0
1410 12:07:30.481911 PCI: 00:14.0 assign_resources, bus 0 link: 0
1411 12:07:30.491874 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1412 12:07:30.498411 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1413 12:07:30.504672 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1414 12:07:30.508262
1415 12:07:30.511516 PCI: 00:14.3 assign_resources, bus 0 link: 0
1416 12:07:30.514714 PCI: 00:14.3 assign_resources, bus 0 link: 0
1417 12:07:30.524623 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1418 12:07:30.527864 PCI: 00:15.0 assign_resources, bus 0 link: 0
1419 12:07:30.534891 PCI: 00:15.0 assign_resources, bus 0 link: 0
1420 12:07:30.541130 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1421 12:07:30.544730 PCI: 00:15.1 assign_resources, bus 0 link: 0
1422 12:07:30.551169 PCI: 00:15.1 assign_resources, bus 0 link: 0
1423 12:07:30.557739 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1424 12:07:30.567795 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1425 12:07:30.574295 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1426 12:07:30.584717 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1427 12:07:30.587372 PCI: 00:19.1 assign_resources, bus 0 link: 0
1428 12:07:30.594426 PCI: 00:19.1 assign_resources, bus 0 link: 0
1429 12:07:30.600948 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1430 12:07:30.610629 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1431 12:07:30.620696 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1432 12:07:30.623995 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1433 12:07:30.633633 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1434 12:07:30.640573 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1435 12:07:30.646899 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1436 12:07:30.653677 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1437 12:07:30.660599 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1438 12:07:30.667094 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1439 12:07:30.670134 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1440 12:07:30.680246 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1441 12:07:30.683305 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1442 12:07:30.686791 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1443 12:07:30.693826 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1444 12:07:30.697063 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1445 12:07:30.703943 LPC: Trying to open IO window from 800 size 1ff
1446 12:07:30.709893 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1447 12:07:30.719878 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1448 12:07:30.726411 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1449 12:07:30.733605 DOMAIN: 0000 assign_resources, bus 0 link: 0
1450 12:07:30.736338 Root Device assign_resources, bus 0 link: 0
1451 12:07:30.739965 Done setting resources.
1452 12:07:30.746497 Show resources in subtree (Root Device)...After assigning values.
1453 12:07:30.749925 Root Device child on link 0 DOMAIN: 0000
1454 12:07:30.753560 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1455 12:07:30.763100 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1456 12:07:30.773399 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1457 12:07:30.776236 PCI: 00:00.0
1458 12:07:30.786432 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1459 12:07:30.793075 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1460 12:07:30.803039 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1461 12:07:30.812931 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1462 12:07:30.822661 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1463 12:07:30.833060 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1464 12:07:30.842689 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1465 12:07:30.849147 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1466 12:07:30.859173 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1467 12:07:30.869182 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1468 12:07:30.879290 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1469 12:07:30.888851 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1470 12:07:30.895571 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1471 12:07:30.899061
1472 12:07:30.905452 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1473 12:07:30.915160 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1474 12:07:30.925376 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1475 12:07:30.935224 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1476 12:07:30.945373 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1477 12:07:30.955135 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1478 12:07:30.961907 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1479 12:07:30.965470
1480 12:07:30.965595 PCI: 00:02.0
1481 12:07:30.974854 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1482 12:07:30.984833 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1483 12:07:30.995190 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1484 12:07:31.001874 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1485 12:07:31.011468 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1486 12:07:31.011555 GENERIC: 0.0
1487 12:07:31.014805 PCI: 00:05.0
1488 12:07:31.024782 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1489 12:07:31.028068 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1490 12:07:31.031170 GENERIC: 0.0
1491 12:07:31.031255 PCI: 00:08.0
1492 12:07:31.041197 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1493 12:07:31.044883
1494 12:07:31.044968 PCI: 00:0a.0
1495 12:07:31.048161 PCI: 00:0d.0 child on link 0 USB0 port 0
1496 12:07:31.057730 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1497 12:07:31.064797 USB0 port 0 child on link 0 USB3 port 0
1498 12:07:31.064883 USB3 port 0
1499 12:07:31.067767 USB3 port 1
1500 12:07:31.067859 USB3 port 2
1501 12:07:31.071565 USB3 port 3
1502 12:07:31.074554 PCI: 00:14.0 child on link 0 USB0 port 0
1503 12:07:31.084252 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1504 12:07:31.091037 USB0 port 0 child on link 0 USB2 port 0
1505 12:07:31.091120 USB2 port 0
1506 12:07:31.094369 USB2 port 1
1507 12:07:31.094443 USB2 port 2
1508 12:07:31.097688 USB2 port 3
1509 12:07:31.097762 USB2 port 4
1510 12:07:31.100861 USB2 port 5
1511 12:07:31.100934 USB2 port 6
1512 12:07:31.104334 USB2 port 7
1513 12:07:31.107527 USB2 port 8
1514 12:07:31.107601 USB2 port 9
1515 12:07:31.110900 USB3 port 0
1516 12:07:31.110981 USB3 port 1
1517 12:07:31.114019 USB3 port 2
1518 12:07:31.114095 USB3 port 3
1519 12:07:31.117364 PCI: 00:14.2
1520 12:07:31.127585 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1521 12:07:31.137353 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1522 12:07:31.140618 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1523 12:07:31.150750 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1524 12:07:31.153961 GENERIC: 0.0
1525 12:07:31.157270 PCI: 00:15.0 child on link 0 I2C: 00:1a
1526 12:07:31.167242 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1527 12:07:31.170904 I2C: 00:1a
1528 12:07:31.170984 I2C: 00:31
1529 12:07:31.174163 I2C: 00:32
1530 12:07:31.177133 PCI: 00:15.1 child on link 0 I2C: 00:10
1531 12:07:31.187168 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1532 12:07:31.190517 I2C: 00:10
1533 12:07:31.190596 PCI: 00:15.2
1534 12:07:31.200397 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1535 12:07:31.203825 PCI: 00:15.3
1536 12:07:31.213669 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1537 12:07:31.213753 PCI: 00:16.0
1538 12:07:31.223689 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1539 12:07:31.227176
1540 12:07:31.227262 PCI: 00:19.0
1541 12:07:31.230408 PCI: 00:19.1 child on link 0 I2C: 00:15
1542 12:07:31.240319 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1543 12:07:31.243971 I2C: 00:15
1544 12:07:31.246992 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1545 12:07:31.257030 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1546 12:07:31.270140 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1547 12:07:31.279895 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1548 12:07:31.279977 GENERIC: 0.0
1549 12:07:31.283191 PCI: 01:00.0
1550 12:07:31.293247 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1551 12:07:31.303571 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1552 12:07:31.313217 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1553 12:07:31.316454 PCI: 00:1e.0
1554 12:07:31.326326 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1555 12:07:31.329603 PCI: 00:1e.2 child on link 0 SPI: 00
1556 12:07:31.339518 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1557 12:07:31.343154 SPI: 00
1558 12:07:31.346385 PCI: 00:1e.3 child on link 0 SPI: 00
1559 12:07:31.356332 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1560 12:07:31.356426 SPI: 00
1561 12:07:31.359636
1562 12:07:31.362900 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1563 12:07:31.369586 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1564 12:07:31.372590 PNP: 0c09.0
1565 12:07:31.382560 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1566 12:07:31.386124 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1567 12:07:31.396008 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1568 12:07:31.405972 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1569 12:07:31.409037 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1570 12:07:31.412534 GENERIC: 0.0
1571 12:07:31.412614 GENERIC: 1.0
1572 12:07:31.415731 PCI: 00:1f.3
1573 12:07:31.426006 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1574 12:07:31.435796 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1575 12:07:31.435881 PCI: 00:1f.5
1576 12:07:31.449176 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1577 12:07:31.452462 CPU_CLUSTER: 0 child on link 0 APIC: 00
1578 12:07:31.452540 APIC: 00
1579 12:07:31.455766 APIC: 01
1580 12:07:31.455844 APIC: 03
1581 12:07:31.455908 APIC: 05
1582 12:07:31.458817 APIC: 07
1583 12:07:31.458894 APIC: 06
1584 12:07:31.458957 APIC: 02
1585 12:07:31.462296
1586 12:07:31.462372 APIC: 04
1587 12:07:31.465609 Done allocating resources.
1588 12:07:31.472025 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1589 12:07:31.475674 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1590 12:07:31.478711 Configure GPIOs for I2S audio on UP4.
1591 12:07:31.482359
1592 12:07:31.488618 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1593 12:07:31.488700 Enabling resources...
1594 12:07:31.495505 PCI: 00:00.0 subsystem <- 8086/9a12
1595 12:07:31.495587 PCI: 00:00.0 cmd <- 06
1596 12:07:31.498499 PCI: 00:02.0 subsystem <- 8086/9a40
1597 12:07:31.501825 PCI: 00:02.0 cmd <- 03
1598 12:07:31.505442 PCI: 00:04.0 subsystem <- 8086/9a03
1599 12:07:31.508612 PCI: 00:04.0 cmd <- 02
1600 12:07:31.512048 PCI: 00:05.0 subsystem <- 8086/9a19
1601 12:07:31.515527 PCI: 00:05.0 cmd <- 02
1602 12:07:31.518729 PCI: 00:08.0 subsystem <- 8086/9a11
1603 12:07:31.521865 PCI: 00:08.0 cmd <- 06
1604 12:07:31.525624 PCI: 00:0d.0 subsystem <- 8086/9a13
1605 12:07:31.528466 PCI: 00:0d.0 cmd <- 02
1606 12:07:31.531751 PCI: 00:14.0 subsystem <- 8086/a0ed
1607 12:07:31.531834 PCI: 00:14.0 cmd <- 02
1608 12:07:31.534864
1609 12:07:31.538187 PCI: 00:14.2 subsystem <- 8086/a0ef
1610 12:07:31.538267 PCI: 00:14.2 cmd <- 02
1611 12:07:31.544706 PCI: 00:14.3 subsystem <- 8086/a0f0
1612 12:07:31.544786 PCI: 00:14.3 cmd <- 02
1613 12:07:31.548055 PCI: 00:15.0 subsystem <- 8086/a0e8
1614 12:07:31.551461 PCI: 00:15.0 cmd <- 02
1615 12:07:31.555036 PCI: 00:15.1 subsystem <- 8086/a0e9
1616 12:07:31.558148 PCI: 00:15.1 cmd <- 02
1617 12:07:31.561348 PCI: 00:15.2 subsystem <- 8086/a0ea
1618 12:07:31.565012 PCI: 00:15.2 cmd <- 02
1619 12:07:31.567871 PCI: 00:15.3 subsystem <- 8086/a0eb
1620 12:07:31.571196 PCI: 00:15.3 cmd <- 02
1621 12:07:31.574520 PCI: 00:16.0 subsystem <- 8086/a0e0
1622 12:07:31.578117 PCI: 00:16.0 cmd <- 02
1623 12:07:31.581333 PCI: 00:19.1 subsystem <- 8086/a0c6
1624 12:07:31.584739 PCI: 00:19.1 cmd <- 02
1625 12:07:31.587966 PCI: 00:1d.0 bridge ctrl <- 0013
1626 12:07:31.590999 PCI: 00:1d.0 subsystem <- 8086/a0b0
1627 12:07:31.591078 PCI: 00:1d.0 cmd <- 06
1628 12:07:31.598002 PCI: 00:1e.0 subsystem <- 8086/a0a8
1629 12:07:31.598082 PCI: 00:1e.0 cmd <- 06
1630 12:07:31.601391 PCI: 00:1e.2 subsystem <- 8086/a0aa
1631 12:07:31.604616 PCI: 00:1e.2 cmd <- 06
1632 12:07:31.608292 PCI: 00:1e.3 subsystem <- 8086/a0ab
1633 12:07:31.611053 PCI: 00:1e.3 cmd <- 02
1634 12:07:31.614398 PCI: 00:1f.0 subsystem <- 8086/a087
1635 12:07:31.617726 PCI: 00:1f.0 cmd <- 407
1636 12:07:31.620909 PCI: 00:1f.3 subsystem <- 8086/a0c8
1637 12:07:31.624158 PCI: 00:1f.3 cmd <- 02
1638 12:07:31.627643 PCI: 00:1f.5 subsystem <- 8086/a0a4
1639 12:07:31.631179 PCI: 00:1f.5 cmd <- 406
1640 12:07:31.634741 PCI: 01:00.0 cmd <- 02
1641 12:07:31.638941 done.
1642 12:07:31.642213 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1643 12:07:31.645412 Initializing devices...
1644 12:07:31.648990 Root Device init
1645 12:07:31.652295 Chrome EC: Set SMI mask to 0x0000000000000000
1646 12:07:31.658690 Chrome EC: clear events_b mask to 0x0000000000000000
1647 12:07:31.665199 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1648 12:07:31.668540 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1649 12:07:31.676191 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1650 12:07:31.682666 Chrome EC: Set WAKE mask to 0x0000000000000000
1651 12:07:31.685915 fw_config match found: DB_USB=USB3_ACTIVE
1652 12:07:31.689154
1653 12:07:31.692697 Configure Right Type-C port orientation for retimer
1654 12:07:31.695971 Root Device init finished in 44 msecs
1655 12:07:31.699322 PCI: 00:00.0 init
1656 12:07:31.702489 CPU TDP = 9 Watts
1657 12:07:31.702575 CPU PL1 = 9 Watts
1658 12:07:31.706003 CPU PL2 = 40 Watts
1659 12:07:31.709019 CPU PL4 = 83 Watts
1660 12:07:31.712535 PCI: 00:00.0 init finished in 8 msecs
1661 12:07:31.712622 PCI: 00:02.0 init
1662 12:07:31.716125 GMA: Found VBT in CBFS
1663 12:07:31.719261 GMA: Found valid VBT in CBFS
1664 12:07:31.725930 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1665 12:07:31.732358 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1666 12:07:31.735806 PCI: 00:02.0 init finished in 18 msecs
1667 12:07:31.739110 PCI: 00:05.0 init
1668 12:07:31.742201 PCI: 00:05.0 init finished in 0 msecs
1669 12:07:31.745671 PCI: 00:08.0 init
1670 12:07:31.748879 PCI: 00:08.0 init finished in 0 msecs
1671 12:07:31.752164 PCI: 00:14.0 init
1672 12:07:31.755838 PCI: 00:14.0 init finished in 0 msecs
1673 12:07:31.758878 PCI: 00:14.2 init
1674 12:07:31.762363 PCI: 00:14.2 init finished in 0 msecs
1675 12:07:31.765630 PCI: 00:15.0 init
1676 12:07:31.765716 I2C bus 0 version 0x3230302a
1677 12:07:31.772729 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1678 12:07:31.775829 PCI: 00:15.0 init finished in 6 msecs
1679 12:07:31.775915 PCI: 00:15.1 init
1680 12:07:31.779022 I2C bus 1 version 0x3230302a
1681 12:07:31.782526 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1682 12:07:31.788728 PCI: 00:15.1 init finished in 6 msecs
1683 12:07:31.788815 PCI: 00:15.2 init
1684 12:07:31.791978 I2C bus 2 version 0x3230302a
1685 12:07:31.795057 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1686 12:07:31.798372 PCI: 00:15.2 init finished in 6 msecs
1687 12:07:31.801950 PCI: 00:15.3 init
1688 12:07:31.805505 I2C bus 3 version 0x3230302a
1689 12:07:31.808652 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1690 12:07:31.812194 PCI: 00:15.3 init finished in 6 msecs
1691 12:07:31.815389 PCI: 00:16.0 init
1692 12:07:31.818527 PCI: 00:16.0 init finished in 0 msecs
1693 12:07:31.821978 PCI: 00:19.1 init
1694 12:07:31.825003 I2C bus 5 version 0x3230302a
1695 12:07:31.828368 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1696 12:07:31.831760 PCI: 00:19.1 init finished in 6 msecs
1697 12:07:31.834859 PCI: 00:1d.0 init
1698 12:07:31.834944 Initializing PCH PCIe bridge.
1699 12:07:31.841817 PCI: 00:1d.0 init finished in 3 msecs
1700 12:07:31.844773 PCI: 00:1f.0 init
1701 12:07:31.848384 IOAPIC: Initializing IOAPIC at 0xfec00000
1702 12:07:31.851733 IOAPIC: Bootstrap Processor Local APIC = 0x00
1703 12:07:31.855044 IOAPIC: ID = 0x02
1704 12:07:31.858436 IOAPIC: Dumping registers
1705 12:07:31.858520 reg 0x0000: 0x02000000
1706 12:07:31.861443 reg 0x0001: 0x00770020
1707 12:07:31.865300 reg 0x0002: 0x00000000
1708 12:07:31.867945 PCI: 00:1f.0 init finished in 21 msecs
1709 12:07:31.871269 PCI: 00:1f.2 init
1710 12:07:31.874824 Disabling ACPI via APMC.
1711 12:07:31.877973 APMC done.
1712 12:07:31.881449 PCI: 00:1f.2 init finished in 6 msecs
1713 12:07:31.892688 PCI: 01:00.0 init
1714 12:07:31.895893 PCI: 01:00.0 init finished in 0 msecs
1715 12:07:31.899249 PNP: 0c09.0 init
1716 12:07:31.902485 Google Chrome EC uptime: 8.422 seconds
1717 12:07:31.909424 Google Chrome AP resets since EC boot: 0
1718 12:07:31.912662 Google Chrome most recent AP reset causes:
1719 12:07:31.919093 Google Chrome EC reset flags at last EC boot: reset-pin
1720 12:07:31.922425 PNP: 0c09.0 init finished in 18 msecs
1721 12:07:31.927187 Devices initialized
1722 12:07:31.930318 Show all devs... After init.
1723 12:07:31.934080 Root Device: enabled 1
1724 12:07:31.934165 DOMAIN: 0000: enabled 1
1725 12:07:31.937201 CPU_CLUSTER: 0: enabled 1
1726 12:07:31.940669 PCI: 00:00.0: enabled 1
1727 12:07:31.943486 PCI: 00:02.0: enabled 1
1728 12:07:31.943570 PCI: 00:04.0: enabled 1
1729 12:07:31.947444 PCI: 00:05.0: enabled 1
1730 12:07:31.950519 PCI: 00:06.0: enabled 0
1731 12:07:31.953857 PCI: 00:07.0: enabled 0
1732 12:07:31.953941 PCI: 00:07.1: enabled 0
1733 12:07:31.956979 PCI: 00:07.2: enabled 0
1734 12:07:31.960455 PCI: 00:07.3: enabled 0
1735 12:07:31.963776 PCI: 00:08.0: enabled 1
1736 12:07:31.963860 PCI: 00:09.0: enabled 0
1737 12:07:31.966787 PCI: 00:0a.0: enabled 0
1738 12:07:31.970086 PCI: 00:0d.0: enabled 1
1739 12:07:31.970170 PCI: 00:0d.1: enabled 0
1740 12:07:31.973506
1741 12:07:31.973591 PCI: 00:0d.2: enabled 0
1742 12:07:31.976848 PCI: 00:0d.3: enabled 0
1743 12:07:31.980020 PCI: 00:0e.0: enabled 0
1744 12:07:31.980104 PCI: 00:10.2: enabled 1
1745 12:07:31.983354 PCI: 00:10.6: enabled 0
1746 12:07:31.987020 PCI: 00:10.7: enabled 0
1747 12:07:31.989771 PCI: 00:12.0: enabled 0
1748 12:07:31.989855 PCI: 00:12.6: enabled 0
1749 12:07:31.993105 PCI: 00:13.0: enabled 0
1750 12:07:31.996776 PCI: 00:14.0: enabled 1
1751 12:07:32.000114 PCI: 00:14.1: enabled 0
1752 12:07:32.000198 PCI: 00:14.2: enabled 1
1753 12:07:32.003026 PCI: 00:14.3: enabled 1
1754 12:07:32.006776 PCI: 00:15.0: enabled 1
1755 12:07:32.009798 PCI: 00:15.1: enabled 1
1756 12:07:32.009882 PCI: 00:15.2: enabled 1
1757 12:07:32.013370 PCI: 00:15.3: enabled 1
1758 12:07:32.016487 PCI: 00:16.0: enabled 1
1759 12:07:32.016573 PCI: 00:16.1: enabled 0
1760 12:07:32.019668
1761 12:07:32.019747 PCI: 00:16.2: enabled 0
1762 12:07:32.023119 PCI: 00:16.3: enabled 0
1763 12:07:32.026473 PCI: 00:16.4: enabled 0
1764 12:07:32.026548 PCI: 00:16.5: enabled 0
1765 12:07:32.029743 PCI: 00:17.0: enabled 0
1766 12:07:32.033085 PCI: 00:19.0: enabled 0
1767 12:07:32.036639 PCI: 00:19.1: enabled 1
1768 12:07:32.036724 PCI: 00:19.2: enabled 0
1769 12:07:32.039983 PCI: 00:1c.0: enabled 1
1770 12:07:32.043025 PCI: 00:1c.1: enabled 0
1771 12:07:32.046377 PCI: 00:1c.2: enabled 0
1772 12:07:32.046462 PCI: 00:1c.3: enabled 0
1773 12:07:32.049789 PCI: 00:1c.4: enabled 0
1774 12:07:32.053132 PCI: 00:1c.5: enabled 0
1775 12:07:32.056211 PCI: 00:1c.6: enabled 1
1776 12:07:32.056293 PCI: 00:1c.7: enabled 0
1777 12:07:32.059646 PCI: 00:1d.0: enabled 1
1778 12:07:32.063669 PCI: 00:1d.1: enabled 0
1779 12:07:32.063752 PCI: 00:1d.2: enabled 1
1780 12:07:32.066431 PCI: 00:1d.3: enabled 0
1781 12:07:32.069777 PCI: 00:1e.0: enabled 1
1782 12:07:32.073091 PCI: 00:1e.1: enabled 0
1783 12:07:32.073174 PCI: 00:1e.2: enabled 1
1784 12:07:32.076215 PCI: 00:1e.3: enabled 1
1785 12:07:32.079697 PCI: 00:1f.0: enabled 1
1786 12:07:32.082947 PCI: 00:1f.1: enabled 0
1787 12:07:32.083030 PCI: 00:1f.2: enabled 1
1788 12:07:32.086526 PCI: 00:1f.3: enabled 1
1789 12:07:32.089594 PCI: 00:1f.4: enabled 0
1790 12:07:32.092922 PCI: 00:1f.5: enabled 1
1791 12:07:32.093004 PCI: 00:1f.6: enabled 0
1792 12:07:32.096417 PCI: 00:1f.7: enabled 0
1793 12:07:32.099372 APIC: 00: enabled 1
1794 12:07:32.099454 GENERIC: 0.0: enabled 1
1795 12:07:32.103081 GENERIC: 0.0: enabled 1
1796 12:07:32.106266 GENERIC: 1.0: enabled 1
1797 12:07:32.109436 GENERIC: 0.0: enabled 1
1798 12:07:32.109542 GENERIC: 1.0: enabled 1
1799 12:07:32.113041 USB0 port 0: enabled 1
1800 12:07:32.116060 GENERIC: 0.0: enabled 1
1801 12:07:32.116143 USB0 port 0: enabled 1
1802 12:07:32.119377 GENERIC: 0.0: enabled 1
1803 12:07:32.122642 I2C: 00:1a: enabled 1
1804 12:07:32.125802 I2C: 00:31: enabled 1
1805 12:07:32.125886 I2C: 00:32: enabled 1
1806 12:07:32.129450 I2C: 00:10: enabled 1
1807 12:07:32.132850 I2C: 00:15: enabled 1
1808 12:07:32.132933 GENERIC: 0.0: enabled 0
1809 12:07:32.135905 GENERIC: 1.0: enabled 0
1810 12:07:32.139486 GENERIC: 0.0: enabled 1
1811 12:07:32.139569 SPI: 00: enabled 1
1812 12:07:32.142518 SPI: 00: enabled 1
1813 12:07:32.145942 PNP: 0c09.0: enabled 1
1814 12:07:32.146024 GENERIC: 0.0: enabled 1
1815 12:07:32.149351 USB3 port 0: enabled 1
1816 12:07:32.152603 USB3 port 1: enabled 1
1817 12:07:32.155975 USB3 port 2: enabled 0
1818 12:07:32.156060 USB3 port 3: enabled 0
1819 12:07:32.159426 USB2 port 0: enabled 0
1820 12:07:32.162551 USB2 port 1: enabled 1
1821 12:07:32.162634 USB2 port 2: enabled 1
1822 12:07:32.166094 USB2 port 3: enabled 0
1823 12:07:32.169389 USB2 port 4: enabled 1
1824 12:07:32.169471 USB2 port 5: enabled 0
1825 12:07:32.172315
1826 12:07:32.172398 USB2 port 6: enabled 0
1827 12:07:32.175802 USB2 port 7: enabled 0
1828 12:07:32.179068 USB2 port 8: enabled 0
1829 12:07:32.179165 USB2 port 9: enabled 0
1830 12:07:32.182237 USB3 port 0: enabled 0
1831 12:07:32.185513 USB3 port 1: enabled 1
1832 12:07:32.185595 USB3 port 2: enabled 0
1833 12:07:32.188996 USB3 port 3: enabled 0
1834 12:07:32.192368 GENERIC: 0.0: enabled 1
1835 12:07:32.195651 GENERIC: 1.0: enabled 1
1836 12:07:32.195734 APIC: 01: enabled 1
1837 12:07:32.198720 APIC: 03: enabled 1
1838 12:07:32.198816 APIC: 05: enabled 1
1839 12:07:32.202429
1840 12:07:32.202513 APIC: 07: enabled 1
1841 12:07:32.205351 APIC: 06: enabled 1
1842 12:07:32.205434 APIC: 02: enabled 1
1843 12:07:32.209302 APIC: 04: enabled 1
1844 12:07:32.212245 PCI: 01:00.0: enabled 1
1845 12:07:32.215919 BS: BS_DEV_INIT run times (exec / console): 32 / 536 ms
1846 12:07:32.222055 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1847 12:07:32.225612 ELOG: NV offset 0xf30000 size 0x1000
1848 12:07:32.232421 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1849 12:07:32.239124 ELOG: Event(17) added with size 13 at 2023-01-24 12:07:32 UTC
1850 12:07:32.245262 ELOG: Event(92) added with size 9 at 2023-01-24 12:07:32 UTC
1851 12:07:32.252268 ELOG: Event(93) added with size 9 at 2023-01-24 12:07:32 UTC
1852 12:07:32.258623 ELOG: Event(9E) added with size 10 at 2023-01-24 12:07:32 UTC
1853 12:07:32.265340 ELOG: Event(9F) added with size 14 at 2023-01-24 12:07:32 UTC
1854 12:07:32.271914 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1855 12:07:32.274884 ELOG: Event(A1) added with size 10 at 2023-01-24 12:07:32 UTC
1856 12:07:32.278373
1857 12:07:32.284807 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1858 12:07:32.291353 ELOG: Event(A0) added with size 9 at 2023-01-24 12:07:32 UTC
1859 12:07:32.295071 elog_add_boot_reason: Logged dev mode boot
1860 12:07:32.301363 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1861 12:07:32.301454 Finalize devices...
1862 12:07:32.305011
1863 12:07:32.305098 Devices finalized
1864 12:07:32.311271 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1865 12:07:32.314680 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1866 12:07:32.321249 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1867 12:07:32.324646 ME: HFSTS1 : 0x80030055
1868 12:07:32.331140 ME: HFSTS2 : 0x30280116
1869 12:07:32.334404 ME: HFSTS3 : 0x00000050
1870 12:07:32.337798 ME: HFSTS4 : 0x00004000
1871 12:07:32.344430 ME: HFSTS5 : 0x00000000
1872 12:07:32.347688 ME: HFSTS6 : 0x00400006
1873 12:07:32.351227 ME: Manufacturing Mode : YES
1874 12:07:32.354706 ME: SPI Protection Mode Enabled : NO
1875 12:07:32.360861 ME: FW Partition Table : OK
1876 12:07:32.364486 ME: Bringup Loader Failure : NO
1877 12:07:32.367869 ME: Firmware Init Complete : NO
1878 12:07:32.371069 ME: Boot Options Present : NO
1879 12:07:32.374667 ME: Update In Progress : NO
1880 12:07:32.377667 ME: D0i3 Support : YES
1881 12:07:32.380966 ME: Low Power State Enabled : NO
1882 12:07:32.384264 ME: CPU Replaced : YES
1883 12:07:32.390794 ME: CPU Replacement Valid : YES
1884 12:07:32.394267 ME: Current Working State : 5
1885 12:07:32.397453 ME: Current Operation State : 1
1886 12:07:32.401026 ME: Current Operation Mode : 3
1887 12:07:32.404249 ME: Error Code : 0
1888 12:07:32.407352 ME: Enhanced Debug Mode : NO
1889 12:07:32.410767 ME: CPU Debug Disabled : YES
1890 12:07:32.414006 ME: TXT Support : NO
1891 12:07:32.420806 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1892 12:07:32.427334 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1893 12:07:32.430844 CBFS: 'fallback/slic' not found.
1894 12:07:32.437546 ACPI: Writing ACPI tables at 76b01000.
1895 12:07:32.437622 ACPI: * FACS
1896 12:07:32.440663 ACPI: * DSDT
1897 12:07:32.443956 Ramoops buffer: 0x100000@0x76a00000.
1898 12:07:32.447025 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1899 12:07:32.453701 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1900 12:07:32.457082 Google Chrome EC: version:
1901 12:07:32.460406 ro: voema_v2.0.10114-a447f03e46
1902 12:07:32.463623 rw: voema_v2.0.10114-a447f03e46
1903 12:07:32.463697 running image: 1
1904 12:07:32.470234 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1905 12:07:32.475332 ACPI: * FADT
1906 12:07:32.475412 SCI is IRQ9
1907 12:07:32.478297 ACPI: added table 1/32, length now 40
1908 12:07:32.481441
1909 12:07:32.481547 ACPI: * SSDT
1910 12:07:32.485000 Found 1 CPU(s) with 8 core(s) each.
1911 12:07:32.491735 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1912 12:07:32.495162 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1913 12:07:32.498103 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1914 12:07:32.501560 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1915 12:07:32.508405 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1916 12:07:32.514822 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1917 12:07:32.518092 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1918 12:07:32.525600 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1919 12:07:32.531458 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1920 12:07:32.534876 \_SB.PCI0.RP09: Added StorageD3Enable property
1921 12:07:32.538004 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1922 12:07:32.545243 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1923 12:07:32.551744 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1924 12:07:32.554834 PS2K: Passing 80 keymaps to kernel
1925 12:07:32.561328 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1926 12:07:32.568183 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1927 12:07:32.574602 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1928 12:07:32.581206 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1929 12:07:32.587827 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1930 12:07:32.591565 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1931 12:07:32.594544
1932 12:07:32.597840 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1933 12:07:32.604557 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1934 12:07:32.611178 ACPI: added table 2/32, length now 44
1935 12:07:32.611276 ACPI: * MCFG
1936 12:07:32.614647 ACPI: added table 3/32, length now 48
1937 12:07:32.617792 ACPI: * TPM2
1938 12:07:32.621055 TPM2 log created at 0x769f0000
1939 12:07:32.624269 ACPI: added table 4/32, length now 52
1940 12:07:32.624354 ACPI: * MADT
1941 12:07:32.627664 SCI is IRQ9
1942 12:07:32.630998 ACPI: added table 5/32, length now 56
1943 12:07:32.631084 current = 76b09850
1944 12:07:32.634226 ACPI: * DMAR
1945 12:07:32.637509 ACPI: added table 6/32, length now 60
1946 12:07:32.640852 ACPI: added table 7/32, length now 64
1947 12:07:32.644315 ACPI: * HPET
1948 12:07:32.647752 ACPI: added table 8/32, length now 68
1949 12:07:32.647838 ACPI: done.
1950 12:07:32.651049 ACPI tables: 35216 bytes.
1951 12:07:32.654170 smbios_write_tables: 769ef000
1952 12:07:32.657810 EC returned error result code 3
1953 12:07:32.660690 Couldn't obtain OEM name from CBI
1954 12:07:32.664744 Create SMBIOS type 16
1955 12:07:32.667957 Create SMBIOS type 17
1956 12:07:32.670973 GENERIC: 0.0 (WIFI Device)
1957 12:07:32.671059 SMBIOS tables: 1750 bytes.
1958 12:07:32.677735 Writing table forward entry at 0x00000500
1959 12:07:32.684562 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1960 12:07:32.687724 Writing coreboot table at 0x76b25000
1961 12:07:32.694146 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1962 12:07:32.697988 1. 0000000000001000-000000000009ffff: RAM
1963 12:07:32.700874 2. 00000000000a0000-00000000000fffff: RESERVED
1964 12:07:32.708032 3. 0000000000100000-00000000769eefff: RAM
1965 12:07:32.710717 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1966 12:07:32.717510 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1967 12:07:32.724183 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1968 12:07:32.727522 7. 0000000077000000-000000007fbfffff: RESERVED
1969 12:07:32.730816 8. 00000000c0000000-00000000cfffffff: RESERVED
1970 12:07:32.737575 9. 00000000f8000000-00000000f9ffffff: RESERVED
1971 12:07:32.740574 10. 00000000fb000000-00000000fb000fff: RESERVED
1972 12:07:32.747416 11. 00000000fe000000-00000000fe00ffff: RESERVED
1973 12:07:32.750584 12. 00000000fed80000-00000000fed87fff: RESERVED
1974 12:07:32.757382 13. 00000000fed90000-00000000fed92fff: RESERVED
1975 12:07:32.760615 14. 00000000feda0000-00000000feda1fff: RESERVED
1976 12:07:32.767293 15. 00000000fedc0000-00000000feddffff: RESERVED
1977 12:07:32.770852 16. 0000000100000000-00000002803fffff: RAM
1978 12:07:32.773739 Passing 4 GPIOs to payload:
1979 12:07:32.777264 NAME | PORT | POLARITY | VALUE
1980 12:07:32.783887 lid | undefined | high | high
1981 12:07:32.787085 power | undefined | high | low
1982 12:07:32.793989 oprom | undefined | high | low
1983 12:07:32.800555 EC in RW | 0x000000e5 | high | low
1984 12:07:32.807506 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum ee3d
1985 12:07:32.807593 coreboot table: 1576 bytes.
1986 12:07:32.813846 IMD ROOT 0. 0x76fff000 0x00001000
1987 12:07:32.817356 IMD SMALL 1. 0x76ffe000 0x00001000
1988 12:07:32.820415 FSP MEMORY 2. 0x76c4e000 0x003b0000
1989 12:07:32.823893 VPD 3. 0x76c4d000 0x00000367
1990 12:07:32.827095 RO MCACHE 4. 0x76c4c000 0x00000fdc
1991 12:07:32.830286 CONSOLE 5. 0x76c2c000 0x00020000
1992 12:07:32.833718 FMAP 6. 0x76c2b000 0x00000578
1993 12:07:32.837405 TIME STAMP 7. 0x76c2a000 0x00000910
1994 12:07:32.840478 VBOOT WORK 8. 0x76c16000 0x00014000
1995 12:07:32.843873
1996 12:07:32.847038 ROMSTG STCK 9. 0x76c15000 0x00001000
1997 12:07:32.850444 AFTER CAR 10. 0x76c0a000 0x0000b000
1998 12:07:32.853468 RAMSTAGE 11. 0x76b97000 0x00073000
1999 12:07:32.857050 REFCODE 12. 0x76b42000 0x00055000
2000 12:07:32.860335 SMM BACKUP 13. 0x76b32000 0x00010000
2001 12:07:32.863604 4f444749 14. 0x76b30000 0x00002000
2002 12:07:32.866838 EXT VBT15. 0x76b2d000 0x0000219f
2003 12:07:32.870292 COREBOOT 16. 0x76b25000 0x00008000
2004 12:07:32.873737 ACPI 17. 0x76b01000 0x00024000
2005 12:07:32.877178
2006 12:07:32.880455 ACPI GNVS 18. 0x76b00000 0x00001000
2007 12:07:32.883239 RAMOOPS 19. 0x76a00000 0x00100000
2008 12:07:32.886684 TPM2 TCGLOG20. 0x769f0000 0x00010000
2009 12:07:32.890196 SMBIOS 21. 0x769ef000 0x00000800
2010 12:07:32.893676 IMD small region:
2011 12:07:32.896567 IMD ROOT 0. 0x76ffec00 0x00000400
2012 12:07:32.899871 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2013 12:07:32.903445 POWER STATE 2. 0x76ffeb80 0x00000044
2014 12:07:32.906870 ROMSTAGE 3. 0x76ffeb60 0x00000004
2015 12:07:32.909879 MEM INFO 4. 0x76ffe980 0x000001e0
2016 12:07:32.913261
2017 12:07:32.916605 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2018 12:07:32.919744 MTRR: Physical address space:
2019 12:07:32.926951 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2020 12:07:32.933128 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2021 12:07:32.939546 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2022 12:07:32.946203 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2023 12:07:32.952953 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2024 12:07:32.956321 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2025 12:07:32.963035 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2026 12:07:32.969715 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 12:07:32.972828 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 12:07:32.976040 MTRR: Fixed MSR 0x259 0x0000000000000000
2029 12:07:32.979453 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 12:07:32.986347 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 12:07:32.989322 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 12:07:32.992929 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 12:07:32.996663 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 12:07:32.999634 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 12:07:33.003416
2036 12:07:33.006387 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 12:07:33.009832 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 12:07:33.012978 call enable_fixed_mtrr()
2039 12:07:33.016200 CPU physical address size: 39 bits
2040 12:07:33.019290 MTRR: default type WB/UC MTRR counts: 6/6.
2041 12:07:33.022774
2042 12:07:33.025970 MTRR: UC selected as default type.
2043 12:07:33.029491 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2044 12:07:33.036633 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2045 12:07:33.042841 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2046 12:07:33.049230 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2047 12:07:33.056050 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2048 12:07:33.062715 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2049 12:07:33.062800
2050 12:07:33.065882 MTRR check
2051 12:07:33.065966 Fixed MTRRs : Enabled
2052 12:07:33.069232 Variable MTRRs: Enabled
2053 12:07:33.069316
2054 12:07:33.072330 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 12:07:33.079354 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 12:07:33.082447 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 12:07:33.085735 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 12:07:33.089161 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 12:07:33.095702 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 12:07:33.099055 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 12:07:33.102247 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 12:07:33.105439 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 12:07:33.112436 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 12:07:33.115384 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 12:07:33.118597 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 12:07:33.122277 MTRR: Fixed MSR 0x250 0x0606060606060606
2067 12:07:33.128741 MTRR: Fixed MSR 0x258 0x0606060606060606
2068 12:07:33.131987 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 12:07:33.135655 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 12:07:33.138603 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 12:07:33.141827 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 12:07:33.148627 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 12:07:33.152107 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 12:07:33.155491 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 12:07:33.158782 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 12:07:33.165216 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 12:07:33.168391 MTRR: Fixed MSR 0x258 0x0606060606060606
2078 12:07:33.172173 call enable_fixed_mtrr()
2079 12:07:33.175428 MTRR: Fixed MSR 0x259 0x0000000000000000
2080 12:07:33.178384 MTRR: Fixed MSR 0x268 0x0606060606060606
2081 12:07:33.185124 MTRR: Fixed MSR 0x269 0x0606060606060606
2082 12:07:33.188712 MTRR: Fixed MSR 0x26a 0x0606060606060606
2083 12:07:33.192011 MTRR: Fixed MSR 0x26b 0x0606060606060606
2084 12:07:33.195651 MTRR: Fixed MSR 0x26c 0x0606060606060606
2085 12:07:33.201958 MTRR: Fixed MSR 0x26d 0x0606060606060606
2086 12:07:33.205064 MTRR: Fixed MSR 0x26e 0x0606060606060606
2087 12:07:33.208649 MTRR: Fixed MSR 0x26f 0x0606060606060606
2088 12:07:33.211776 CPU physical address size: 39 bits
2089 12:07:33.218199 call enable_fixed_mtrr()
2090 12:07:33.221566 MTRR: Fixed MSR 0x250 0x0606060606060606
2091 12:07:33.225139 MTRR: Fixed MSR 0x250 0x0606060606060606
2092 12:07:33.228425 MTRR: Fixed MSR 0x258 0x0606060606060606
2093 12:07:33.235066 MTRR: Fixed MSR 0x259 0x0000000000000000
2094 12:07:33.238146 MTRR: Fixed MSR 0x268 0x0606060606060606
2095 12:07:33.241619 MTRR: Fixed MSR 0x269 0x0606060606060606
2096 12:07:33.244580 MTRR: Fixed MSR 0x26a 0x0606060606060606
2097 12:07:33.248035 MTRR: Fixed MSR 0x26b 0x0606060606060606
2098 12:07:33.254863 MTRR: Fixed MSR 0x26c 0x0606060606060606
2099 12:07:33.258479 MTRR: Fixed MSR 0x26d 0x0606060606060606
2100 12:07:33.261261 MTRR: Fixed MSR 0x26e 0x0606060606060606
2101 12:07:33.264831 MTRR: Fixed MSR 0x26f 0x0606060606060606
2102 12:07:33.272245 MTRR: Fixed MSR 0x258 0x0606060606060606
2103 12:07:33.275497 MTRR: Fixed MSR 0x259 0x0000000000000000
2104 12:07:33.278949 MTRR: Fixed MSR 0x268 0x0606060606060606
2105 12:07:33.282233 MTRR: Fixed MSR 0x269 0x0606060606060606
2106 12:07:33.288947 MTRR: Fixed MSR 0x26a 0x0606060606060606
2107 12:07:33.292373 MTRR: Fixed MSR 0x26b 0x0606060606060606
2108 12:07:33.295602 MTRR: Fixed MSR 0x26c 0x0606060606060606
2109 12:07:33.299048 MTRR: Fixed MSR 0x26d 0x0606060606060606
2110 12:07:33.305437 MTRR: Fixed MSR 0x26e 0x0606060606060606
2111 12:07:33.308791 MTRR: Fixed MSR 0x26f 0x0606060606060606
2112 12:07:33.312220 call enable_fixed_mtrr()
2113 12:07:33.315612 call enable_fixed_mtrr()
2114 12:07:33.318611 CPU physical address size: 39 bits
2115 12:07:33.322129 MTRR: Fixed MSR 0x250 0x0606060606060606
2116 12:07:33.325376 MTRR: Fixed MSR 0x250 0x0606060606060606
2117 12:07:33.328860 MTRR: Fixed MSR 0x258 0x0606060606060606
2118 12:07:33.335519 MTRR: Fixed MSR 0x259 0x0000000000000000
2119 12:07:33.338669 MTRR: Fixed MSR 0x268 0x0606060606060606
2120 12:07:33.341768 MTRR: Fixed MSR 0x269 0x0606060606060606
2121 12:07:33.345513 MTRR: Fixed MSR 0x26a 0x0606060606060606
2122 12:07:33.351724 MTRR: Fixed MSR 0x26b 0x0606060606060606
2123 12:07:33.355320 MTRR: Fixed MSR 0x26c 0x0606060606060606
2124 12:07:33.358821 MTRR: Fixed MSR 0x26d 0x0606060606060606
2125 12:07:33.362067 MTRR: Fixed MSR 0x26e 0x0606060606060606
2126 12:07:33.365000 MTRR: Fixed MSR 0x26f 0x0606060606060606
2127 12:07:33.368420
2128 12:07:33.371834 MTRR: Fixed MSR 0x258 0x0606060606060606
2129 12:07:33.375268 call enable_fixed_mtrr()
2130 12:07:33.378131 MTRR: Fixed MSR 0x259 0x0000000000000000
2131 12:07:33.381507 MTRR: Fixed MSR 0x268 0x0606060606060606
2132 12:07:33.388588 MTRR: Fixed MSR 0x269 0x0606060606060606
2133 12:07:33.391547 MTRR: Fixed MSR 0x26a 0x0606060606060606
2134 12:07:33.394850 MTRR: Fixed MSR 0x26b 0x0606060606060606
2135 12:07:33.398270 MTRR: Fixed MSR 0x26c 0x0606060606060606
2136 12:07:33.404636 MTRR: Fixed MSR 0x26d 0x0606060606060606
2137 12:07:33.407844 MTRR: Fixed MSR 0x26e 0x0606060606060606
2138 12:07:33.411456 MTRR: Fixed MSR 0x26f 0x0606060606060606
2139 12:07:33.414783 CPU physical address size: 39 bits
2140 12:07:33.419013 call enable_fixed_mtrr()
2141 12:07:33.421927 CPU physical address size: 39 bits
2142 12:07:33.426139 CPU physical address size: 39 bits
2143 12:07:33.432611 CPU physical address size: 39 bits
2144 12:07:33.432698 call enable_fixed_mtrr()
2145 12:07:33.439146 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2146 12:07:33.442478 CPU physical address size: 39 bits
2147 12:07:33.445908 Checking cr50 for pending updates
2148 12:07:33.454417 Reading cr50 TPM mode
2149 12:07:33.465040 BS: BS_PAYLOAD_LOAD entry times (exec / console): 13 / 7 ms
2150 12:07:33.475116 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2151 12:07:33.478085 Checking segment from ROM address 0xffc02b38
2152 12:07:33.481397 Checking segment from ROM address 0xffc02b54
2153 12:07:33.488065 Loading segment from ROM address 0xffc02b38
2154 12:07:33.488150 code (compression=0)
2155 12:07:33.497975 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2156 12:07:33.504652 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2157 12:07:33.508068 it's not compressed!
2158 12:07:33.647267 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2159 12:07:33.654096 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2160 12:07:33.660659 Loading segment from ROM address 0xffc02b54
2161 12:07:33.660743 Entry Point 0x30000000
2162 12:07:33.663807 Loaded segments
2163 12:07:33.670491 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2164 12:07:33.713667 Finalizing chipset.
2165 12:07:33.716437 Finalizing SMM.
2166 12:07:33.716544 APMC done.
2167 12:07:33.723581 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2168 12:07:33.726789 mp_park_aps done after 0 msecs.
2169 12:07:33.730158 Jumping to boot code at 0x30000000(0x76b25000)
2170 12:07:33.739767 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2171 12:07:33.739852
2172 12:07:33.739936
2173 12:07:33.743201
2174 12:07:33.743285 Starting depthcharge on Voema...
2175 12:07:33.743645 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2176 12:07:33.743757 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2177 12:07:33.743849 Setting prompt string to ['volteer:']
2178 12:07:33.743942 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2179 12:07:33.746527
2180 12:07:33.753015 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2181 12:07:33.753101
2182 12:07:33.759623 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2183 12:07:33.759709
2184 12:07:33.765947 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2185 12:07:33.766033
2186 12:07:33.769350 Failed to find eMMC card reader
2187 12:07:33.769435
2188 12:07:33.769556 Wipe memory regions:
2189 12:07:33.772964
2190 12:07:33.775842 [0x00000000001000, 0x000000000a0000)
2191 12:07:33.775928
2192 12:07:33.779331 [0x00000000100000, 0x00000030000000)
2193 12:07:33.779416
2194 12:07:33.808021 [0x00000032662db0, 0x000000769ef000)
2195 12:07:33.808107
2196 12:07:33.846827 [0x00000100000000, 0x00000280400000)
2197 12:07:33.846920
2198 12:07:34.051612 ec_init: CrosEC protocol v3 supported (256, 256)
2199 12:07:34.051740
2200 12:07:34.482929 R8152: Initializing
2201 12:07:34.483424
2202 12:07:34.485816 Version 6 (ocp_data = 5c30)
2203 12:07:34.486227
2204 12:07:34.488824 R8152: Done initializing
2205 12:07:34.489233
2206 12:07:34.492359 Adding net device
2207 12:07:34.492766
2208 12:07:34.796333 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2209 12:07:34.796465
2210 12:07:34.796555
2211 12:07:34.796635
2212 12:07:34.799783 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2214 12:07:34.900575 volteer: tftpboot 192.168.201.1 8853755/tftp-deploy-5wqxab66/kernel/bzImage 8853755/tftp-deploy-5wqxab66/kernel/cmdline 8853755/tftp-deploy-5wqxab66/ramdisk/ramdisk.cpio.gz
2215 12:07:34.900703 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2216 12:07:34.900803 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2217 12:07:34.905438 tftpboot 192.168.201.1 8853755/tftp-deploy-5wqxab66/kernel/bzImoy-5wqxab66/kernel/cmdline 8853755/tftp-deploy-5wqxab66/ramdisk/ramdisk.cpio.gz
2218 12:07:34.905536
2219 12:07:34.905623 Waiting for link
2220 12:07:34.905705
2221 12:07:35.109039 done.
2222 12:07:35.109171
2223 12:07:35.109265 MAC: 00:24:32:30:77:76
2224 12:07:35.109347
2225 12:07:35.112639 Sending DHCP discover... done.
2226 12:07:35.112726
2227 12:07:35.115797 Waiting for reply... done.
2228 12:07:35.115884
2229 12:07:35.118993 Sending DHCP request... done.
2230 12:07:35.119080
2231 12:07:35.122106 Waiting for reply... done.
2232 12:07:35.122193
2233 12:07:35.125730 My ip is 192.168.201.16
2234 12:07:35.125817
2235 12:07:35.129081 The DHCP server ip is 192.168.201.1
2236 12:07:35.129168
2237 12:07:35.135517 TFTP server IP predefined by user: 192.168.201.1
2238 12:07:35.135603
2239 12:07:35.142410 Bootfile predefined by user: 8853755/tftp-deploy-5wqxab66/kernel/bzImage
2240 12:07:35.142496
2241 12:07:35.145776 Sending tftp read request... done.
2242 12:07:35.145861
2243 12:07:35.148546 Waiting for the transfer...
2244 12:07:35.148630
2245 12:07:35.715291 00000000 ################################################################
2246 12:07:35.715449
2247 12:07:36.270850 00080000 ################################################################
2248 12:07:36.270998
2249 12:07:36.839548 00100000 ################################################################
2250 12:07:36.839692
2251 12:07:37.415473 00180000 ################################################################
2252 12:07:37.415627
2253 12:07:37.970374 00200000 ################################################################
2254 12:07:37.970542
2255 12:07:38.524473 00280000 ################################################################
2256 12:07:38.524618
2257 12:07:39.074655 00300000 ################################################################
2258 12:07:39.074805
2259 12:07:39.624685 00380000 ################################################################
2260 12:07:39.624820
2261 12:07:40.174296 00400000 ################################################################
2262 12:07:40.174434
2263 12:07:40.725492 00480000 ################################################################
2264 12:07:40.725647
2265 12:07:41.302641 00500000 ################################################################
2266 12:07:41.302790
2267 12:07:41.873327 00580000 ################################################################
2268 12:07:41.873484
2269 12:07:42.444592 00600000 ################################################################
2270 12:07:42.444743
2271 12:07:43.001459 00680000 ################################################################
2272 12:07:43.001651
2273 12:07:43.575003 00700000 ################################################################
2274 12:07:43.575142
2275 12:07:44.141580 00780000 ################################################################
2276 12:07:44.141716
2277 12:07:44.718295 00800000 ################################################################
2278 12:07:44.718434
2279 12:07:45.277127 00880000 ################################################################
2280 12:07:45.277263
2281 12:07:45.564315 00900000 ################################## done.
2282 12:07:45.564459
2283 12:07:45.567453 The bootfile was 9707520 bytes long.
2284 12:07:45.567541
2285 12:07:45.570694 Sending tftp read request... done.
2286 12:07:45.570777
2287 12:07:45.573967 Waiting for the transfer...
2288 12:07:45.574051
2289 12:07:46.129152 00000000 ################################################################
2290 12:07:46.129298
2291 12:07:46.695370 00080000 ################################################################
2292 12:07:46.695509
2293 12:07:47.265957 00100000 ################################################################
2294 12:07:47.266095
2295 12:07:47.837146 00180000 ################################################################
2296 12:07:47.837292
2297 12:07:48.397491 00200000 ################################################################
2298 12:07:48.397641
2299 12:07:48.954907 00280000 ################################################################
2300 12:07:48.955048
2301 12:07:49.516456 00300000 ################################################################
2302 12:07:49.516592
2303 12:07:50.060695 00380000 ################################################################
2304 12:07:50.060834
2305 12:07:50.622244 00400000 ################################################################
2306 12:07:50.622386
2307 12:07:51.233240 00480000 ################################################################
2308 12:07:51.233833
2309 12:07:51.602093 00500000 ################################## done.
2310 12:07:51.602854
2311 12:07:51.605291 Sending tftp read request... done.
2312 12:07:51.605848
2313 12:07:51.608616 Waiting for the transfer...
2314 12:07:51.609080
2315 12:07:51.609429 00000000 # done.
2316 12:07:51.609841
2317 12:07:51.618421 Command line loaded dynamically from TFTP file: 8853755/tftp-deploy-5wqxab66/kernel/cmdline
2318 12:07:51.618906
2319 12:07:51.638058 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8853755/extract-nfsrootfs-t0kmgpp4,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2320 12:07:51.638629
2321 12:07:51.644917 Shutting down all USB controllers.
2322 12:07:51.645433
2323 12:07:51.645870 Removing current net device
2324 12:07:51.646230
2325 12:07:51.648636 Finalizing coreboot
2326 12:07:51.649218
2327 12:07:51.655015 Exiting depthcharge with code 4 at timestamp: 26572643
2328 12:07:51.655598
2329 12:07:51.655989
2330 12:07:51.656343 Starting kernel ...
2331 12:07:51.656679
2332 12:07:51.657009
2333 12:07:51.657335
2334 12:07:51.658645 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2335 12:07:51.659175 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2336 12:07:51.659579 Setting prompt string to ['Linux version [0-9]']
2337 12:07:51.659971 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2338 12:07:51.660365 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2340 12:12:17.660133 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2342 12:12:17.661374 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2344 12:12:17.662306 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2347 12:12:17.664037 end: 2 depthcharge-action (duration 00:05:00) [common]
2349 12:12:17.664783 Cleaning after the job
2350 12:12:17.664865 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/ramdisk
2351 12:12:17.665341 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/kernel
2352 12:12:17.666038 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/nfsrootfs
2353 12:12:17.698064 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853755/tftp-deploy-5wqxab66/modules
2354 12:12:17.698382 start: 5.1 power-off (timeout 00:00:30) [common]
2355 12:12:17.698543 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2356 12:12:17.717448 >> Command sent successfully.
2357 12:12:17.719302 Returned 0 in 0 seconds
2358 12:12:17.820735 end: 5.1 power-off (duration 00:00:00) [common]
2360 12:12:17.822328 start: 5.2 read-feedback (timeout 00:10:00) [common]
2361 12:12:17.823545 Listened to connection for namespace 'common' for up to 1s
2362 12:12:18.828276 Finalising connection for namespace 'common'
2363 12:12:18.829102 Disconnecting from shell: Finalise
2364 12:12:18.930774 end: 5.2 read-feedback (duration 00:00:01) [common]
2365 12:12:18.931594 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8853755
2366 12:12:19.027272 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8853755
2367 12:12:19.027467 JobError: Your job cannot terminate cleanly.