Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:06:41.515765 lava-dispatcher, installed at version: 2022.11
2 12:06:41.515957 start: 0 validate
3 12:06:41.516083 Start time: 2023-01-24 12:06:41.516077+00:00 (UTC)
4 12:06:41.516204 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:06:41.516323 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
6 12:06:41.803493 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:06:41.804269 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:06:44.310722 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:06:44.311468 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:06:44.316755 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:06:44.317421 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:06:44.328431 validate duration: 2.81
14 12:06:44.329725 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:06:44.330348 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:06:44.330851 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:06:44.331358 Not decompressing ramdisk as can be used compressed.
18 12:06:44.331834 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230120.0/amd64/initrd.cpio.gz
19 12:06:44.332201 saving as /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/ramdisk/initrd.cpio.gz
20 12:06:44.332547 total size: 5432131 (5MB)
21 12:06:44.337699 progress 0% (0MB)
22 12:06:44.343429 progress 5% (0MB)
23 12:06:44.347219 progress 10% (0MB)
24 12:06:44.350478 progress 15% (0MB)
25 12:06:44.353760 progress 20% (1MB)
26 12:06:44.356211 progress 25% (1MB)
27 12:06:44.358602 progress 30% (1MB)
28 12:06:44.360928 progress 35% (1MB)
29 12:06:44.363045 progress 40% (2MB)
30 12:06:44.364901 progress 45% (2MB)
31 12:06:44.366728 progress 50% (2MB)
32 12:06:44.368711 progress 55% (2MB)
33 12:06:44.370339 progress 60% (3MB)
34 12:06:44.371970 progress 65% (3MB)
35 12:06:44.373752 progress 70% (3MB)
36 12:06:44.375228 progress 75% (3MB)
37 12:06:44.376694 progress 80% (4MB)
38 12:06:44.378164 progress 85% (4MB)
39 12:06:44.379678 progress 90% (4MB)
40 12:06:44.381012 progress 95% (4MB)
41 12:06:44.382368 progress 100% (5MB)
42 12:06:44.382637 5MB downloaded in 0.05s (103.41MB/s)
43 12:06:44.382792 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:06:44.383040 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:06:44.383132 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:06:44.383221 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:06:44.383339 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:06:44.383405 saving as /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/kernel/bzImage
50 12:06:44.383464 total size: 9707520 (9MB)
51 12:06:44.383522 No compression specified
52 12:06:44.384550 progress 0% (0MB)
53 12:06:44.386899 progress 5% (0MB)
54 12:06:44.389374 progress 10% (0MB)
55 12:06:44.391735 progress 15% (1MB)
56 12:06:44.394098 progress 20% (1MB)
57 12:06:44.396453 progress 25% (2MB)
58 12:06:44.398678 progress 30% (2MB)
59 12:06:44.401040 progress 35% (3MB)
60 12:06:44.403402 progress 40% (3MB)
61 12:06:44.405760 progress 45% (4MB)
62 12:06:44.408149 progress 50% (4MB)
63 12:06:44.410413 progress 55% (5MB)
64 12:06:44.412748 progress 60% (5MB)
65 12:06:44.415109 progress 65% (6MB)
66 12:06:44.417486 progress 70% (6MB)
67 12:06:44.419794 progress 75% (6MB)
68 12:06:44.422006 progress 80% (7MB)
69 12:06:44.424328 progress 85% (7MB)
70 12:06:44.426684 progress 90% (8MB)
71 12:06:44.428988 progress 95% (8MB)
72 12:06:44.431376 progress 100% (9MB)
73 12:06:44.431561 9MB downloaded in 0.05s (192.50MB/s)
74 12:06:44.431709 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:06:44.431944 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:06:44.432034 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:06:44.432122 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:06:44.432228 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230120.0/amd64/full.rootfs.tar.xz
80 12:06:44.432295 saving as /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/nfsrootfs/full.rootfs.tar
81 12:06:44.432356 total size: 123909728 (118MB)
82 12:06:44.432417 Using unxz to decompress xz
83 12:06:44.435585 progress 0% (0MB)
84 12:06:44.876303 progress 5% (5MB)
85 12:06:45.326749 progress 10% (11MB)
86 12:06:45.779366 progress 15% (17MB)
87 12:06:46.240910 progress 20% (23MB)
88 12:06:46.578399 progress 25% (29MB)
89 12:06:46.912605 progress 30% (35MB)
90 12:06:47.183951 progress 35% (41MB)
91 12:06:47.349187 progress 40% (47MB)
92 12:06:47.711149 progress 45% (53MB)
93 12:06:48.068221 progress 50% (59MB)
94 12:06:48.400181 progress 55% (65MB)
95 12:06:48.748715 progress 60% (70MB)
96 12:06:49.079492 progress 65% (76MB)
97 12:06:49.455861 progress 70% (82MB)
98 12:06:49.867245 progress 75% (88MB)
99 12:06:50.281408 progress 80% (94MB)
100 12:06:50.405117 progress 85% (100MB)
101 12:06:50.570995 progress 90% (106MB)
102 12:06:50.912446 progress 95% (112MB)
103 12:06:51.278241 progress 100% (118MB)
104 12:06:51.283659 118MB downloaded in 6.85s (17.25MB/s)
105 12:06:51.283927 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:06:51.284204 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:06:51.284298 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:06:51.284391 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:06:51.284521 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:06:51.284597 saving as /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/modules/modules.tar
112 12:06:51.284660 total size: 64588 (0MB)
113 12:06:51.284722 Using unxz to decompress xz
114 12:06:51.287838 progress 50% (0MB)
115 12:06:51.288200 progress 100% (0MB)
116 12:06:51.292319 0MB downloaded in 0.01s (8.05MB/s)
117 12:06:51.292543 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:06:51.292826 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:06:51.292925 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 12:06:51.293025 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 12:06:52.997253 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8853693/extract-nfsrootfs-w64f3q2l
123 12:06:52.997772 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:06:52.997888 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 12:06:52.998033 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l
126 12:06:52.998169 makedir: /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin
127 12:06:52.998253 makedir: /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/tests
128 12:06:52.998332 makedir: /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/results
129 12:06:52.998431 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-add-keys
130 12:06:52.998566 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-add-sources
131 12:06:52.998682 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-background-process-start
132 12:06:52.998793 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-background-process-stop
133 12:06:52.998905 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-common-functions
134 12:06:52.999015 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-echo-ipv4
135 12:06:52.999124 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-install-packages
136 12:06:52.999232 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-installed-packages
137 12:06:52.999340 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-os-build
138 12:06:52.999447 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-probe-channel
139 12:06:52.999554 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-probe-ip
140 12:06:52.999662 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-target-ip
141 12:06:52.999774 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-target-mac
142 12:06:52.999881 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-target-storage
143 12:06:52.999991 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-test-case
144 12:06:53.000102 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-test-event
145 12:06:53.000209 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-test-feedback
146 12:06:53.000317 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-test-raise
147 12:06:53.000424 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-test-reference
148 12:06:53.000531 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-test-runner
149 12:06:53.000638 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-test-set
150 12:06:53.000744 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-test-shell
151 12:06:53.000853 Updating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-install-packages (oe)
152 12:06:53.000965 Updating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/bin/lava-installed-packages (oe)
153 12:06:53.001061 Creating /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/environment
154 12:06:53.001145 LAVA metadata
155 12:06:53.001210 - LAVA_JOB_ID=8853693
156 12:06:53.001273 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:06:53.001383 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 12:06:53.001484 skipped lava-vland-overlay
159 12:06:53.001562 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:06:53.001645 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 12:06:53.001707 skipped lava-multinode-overlay
162 12:06:53.001780 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:06:53.001860 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 12:06:53.001933 Loading test definitions
165 12:06:53.002023 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 12:06:53.002094 Using /lava-8853693 at stage 0
167 12:06:53.002188 Fetching tests from https://github.com/kernelci/test-definitions
168 12:06:53.002268 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/0/tests/0_ltp-ipc'
169 12:06:58.727485 Running '/usr/bin/git checkout kernelci.org
170 12:06:58.864220 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 12:06:58.864981 uuid=8853693_1.5.2.3.1 testdef=None
172 12:06:58.865143 end: 1.5.2.3.1 git-repo-action (duration 00:00:06) [common]
174 12:06:58.865447 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
175 12:06:58.866267 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 12:06:58.866512 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
178 12:06:58.867519 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 12:06:58.867790 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
181 12:06:58.868751 runner path: /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/0/tests/0_ltp-ipc test_uuid 8853693_1.5.2.3.1
182 12:06:58.868844 SKIPFILE='skipfile-lkft.yaml'
183 12:06:58.868911 SKIP_INSTALL='true'
184 12:06:58.868973 TST_CMDFILES='ipc'
185 12:06:58.869111 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 12:06:58.869324 Creating lava-test-runner.conf files
188 12:06:58.869426 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853693/lava-overlay-t5vkyu6l/lava-8853693/0 for stage 0
189 12:06:58.869511 - 0_ltp-ipc
190 12:06:58.869610 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
191 12:06:58.869704 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
192 12:07:06.531130 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 12:07:06.531303 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
194 12:07:06.531403 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 12:07:06.531510 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
196 12:07:06.531606 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
197 12:07:06.635123 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 12:07:06.635481 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
199 12:07:06.635673 extracting modules file /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853693/extract-nfsrootfs-w64f3q2l
200 12:07:06.639943 extracting modules file /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853693/extract-overlay-ramdisk-lbvktca7/ramdisk
201 12:07:06.643980 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 12:07:06.644130 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
203 12:07:06.644249 [common] Applying overlay to NFS
204 12:07:06.644334 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853693/compress-overlay-xotghulc/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8853693/extract-nfsrootfs-w64f3q2l
205 12:07:07.114508 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 12:07:07.114700 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
207 12:07:07.114801 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 12:07:07.114892 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
209 12:07:07.114981 Building ramdisk /var/lib/lava/dispatcher/tmp/8853693/extract-overlay-ramdisk-lbvktca7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8853693/extract-overlay-ramdisk-lbvktca7/ramdisk
210 12:07:07.148806 >> 24777 blocks
211 12:07:07.670058 rename /var/lib/lava/dispatcher/tmp/8853693/extract-overlay-ramdisk-lbvktca7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/ramdisk/ramdisk.cpio.gz
212 12:07:07.670468 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 12:07:07.670595 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
214 12:07:07.670700 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
215 12:07:07.670794 No mkimage arch provided, not using FIT.
216 12:07:07.670887 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 12:07:07.670977 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 12:07:07.671078 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
219 12:07:07.671179 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
220 12:07:07.671259 No LXC device requested
221 12:07:07.671348 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 12:07:07.671457 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
223 12:07:07.671551 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 12:07:07.671626 Checking files for TFTP limit of 4294967296 bytes.
225 12:07:07.672011 end: 1 tftp-deploy (duration 00:00:23) [common]
226 12:07:07.672121 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 12:07:07.672220 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 12:07:07.672350 substitutions:
229 12:07:07.672420 - {DTB}: None
230 12:07:07.672486 - {INITRD}: 8853693/tftp-deploy-4v4hvemb/ramdisk/ramdisk.cpio.gz
231 12:07:07.672548 - {KERNEL}: 8853693/tftp-deploy-4v4hvemb/kernel/bzImage
232 12:07:07.672608 - {LAVA_MAC}: None
233 12:07:07.672666 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8853693/extract-nfsrootfs-w64f3q2l
234 12:07:07.672726 - {NFS_SERVER_IP}: 192.168.201.1
235 12:07:07.672783 - {PRESEED_CONFIG}: None
236 12:07:07.672839 - {PRESEED_LOCAL}: None
237 12:07:07.672895 - {RAMDISK}: 8853693/tftp-deploy-4v4hvemb/ramdisk/ramdisk.cpio.gz
238 12:07:07.672951 - {ROOT_PART}: None
239 12:07:07.673014 - {ROOT}: None
240 12:07:07.673079 - {SERVER_IP}: 192.168.201.1
241 12:07:07.673136 - {TEE}: None
242 12:07:07.673192 Parsed boot commands:
243 12:07:07.673249 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 12:07:07.673417 Parsed boot commands: tftpboot 192.168.201.1 8853693/tftp-deploy-4v4hvemb/kernel/bzImage 8853693/tftp-deploy-4v4hvemb/kernel/cmdline 8853693/tftp-deploy-4v4hvemb/ramdisk/ramdisk.cpio.gz
245 12:07:07.673517 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 12:07:07.673610 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 12:07:07.673709 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 12:07:07.673801 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 12:07:07.673874 Not connected, no need to disconnect.
250 12:07:07.673957 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 12:07:07.674045 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 12:07:07.674118 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-14'
253 12:07:07.676846 Setting prompt string to ['lava-test: # ']
254 12:07:07.677166 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 12:07:07.677280 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 12:07:07.677389 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 12:07:07.677486 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 12:07:07.677670 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
259 12:07:07.697998 >> Command sent successfully.
260 12:07:07.700738 Returned 0 in 0 seconds
261 12:07:07.801525 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 12:07:07.802002 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 12:07:07.802151 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 12:07:07.802278 Setting prompt string to 'Starting depthcharge on Voema...'
266 12:07:07.802383 Changing prompt to 'Starting depthcharge on Voema...'
267 12:07:07.802489 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 12:07:07.802875 [Enter `^Ec?' for help]
269 12:07:15.215769
270 12:07:15.216370
271 12:07:15.225126 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 12:07:15.228356 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
273 12:07:15.231733
274 12:07:15.235451 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
275 12:07:15.239011 CPU: AES supported, TXT NOT supported, VT supported
276 12:07:15.246403 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
277 12:07:15.249016 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
278 12:07:15.255578 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
279 12:07:15.259550 VBOOT: Loading verstage.
280 12:07:15.262340 FMAP: Found "FLASH" version 1.1 at 0x1804000.
281 12:07:15.269004 FMAP: base = 0x0 size = 0x2000000 #areas = 32
282 12:07:15.272545 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 12:07:15.279022 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
284 12:07:15.282255
285 12:07:15.289159 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
286 12:07:15.289246
287 12:07:15.289316
288 12:07:15.299721 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
289 12:07:15.315396 Probing TPM: . done!
290 12:07:15.318720 TPM ready after 0 ms
291 12:07:15.322315 Connected to device vid:did:rid of 1ae0:0028:00
292 12:07:15.333509 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
293 12:07:15.340086 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
294 12:07:15.343428 Initialized TPM device CR50 revision 0
295 12:07:15.399632 tlcl_send_startup: Startup return code is 0
296 12:07:15.399772 TPM: setup succeeded
297 12:07:15.414553 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
298 12:07:15.428246 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
299 12:07:15.441067 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
300 12:07:15.451417 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
301 12:07:15.454605 Chrome EC: UHEPI supported
302 12:07:15.457858 Phase 1
303 12:07:15.461206 FMAP: area GBB found @ 1805000 (458752 bytes)
304 12:07:15.471445 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
305 12:07:15.477838 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
306 12:07:15.484650 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
307 12:07:15.491311 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
308 12:07:15.494596 Recovery requested (1009000e)
309 12:07:15.497867 TPM: Extending digest for VBOOT: boot mode into PCR 0
310 12:07:15.509486 tlcl_extend: response is 0
311 12:07:15.516109 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
312 12:07:15.526106 tlcl_extend: response is 0
313 12:07:15.532676 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 12:07:15.539054 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
315 12:07:15.545671 BS: verstage times (exec / console): total (unknown) / 142 ms
316 12:07:15.545790
317 12:07:15.545893
318 12:07:15.559501 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
319 12:07:15.565498 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
320 12:07:15.568894 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
321 12:07:15.572207 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
322 12:07:15.578793 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
323 12:07:15.582166 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
324 12:07:15.585958 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
325 12:07:15.589103 TCO_STS: 0000 0000
326 12:07:15.592407 GEN_PMCON: d0015038 00002200
327 12:07:15.595855 GBLRST_CAUSE: 00000000 00000000
328 12:07:15.595965 HPR_CAUSE0: 00000000
329 12:07:15.598960
330 12:07:15.599046 prev_sleep_state 5
331 12:07:15.602299 Boot Count incremented to 2591
332 12:07:15.608821 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 12:07:15.615495 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
334 12:07:15.622301 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
335 12:07:15.625069
336 12:07:15.631640 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
337 12:07:15.635033 Chrome EC: UHEPI supported
338 12:07:15.641618 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
339 12:07:15.652520 Probing TPM: done!
340 12:07:15.659503 Connected to device vid:did:rid of 1ae0:0028:00
341 12:07:15.669803 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
342 12:07:15.673054 Initialized TPM device CR50 revision 0
343 12:07:15.687397 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
344 12:07:15.694379 MRC: Hash idx 0x100b comparison successful.
345 12:07:15.697765 MRC cache found, size faa8
346 12:07:15.697880 bootmode is set to: 2
347 12:07:15.701251 SPD index = 2
348 12:07:15.707781 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
349 12:07:15.710458 SPD: module type is LPDDR4X
350 12:07:15.714457 SPD: module part number is MT53D1G64D4NW-046
351 12:07:15.720447 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
352 12:07:15.723957 SPD: device width 16 bits, bus width 16 bits
353 12:07:15.727880 SPD: module size is 2048 MB (per channel)
354 12:07:16.160387 CBMEM:
355 12:07:16.163804 IMD: root @ 0x76fff000 254 entries.
356 12:07:16.167142 IMD: root @ 0x76ffec00 62 entries.
357 12:07:16.170410 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
358 12:07:16.176366 FMAP: area RW_VPD found @ f35000 (8192 bytes)
359 12:07:16.180255 External stage cache:
360 12:07:16.183476 IMD: root @ 0x7b3ff000 254 entries.
361 12:07:16.186798 IMD: root @ 0x7b3fec00 62 entries.
362 12:07:16.201749 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
363 12:07:16.207913 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
364 12:07:16.215014 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
365 12:07:16.228085 MRC: 'RECOVERY_MRC_CACHE' does not need update.
366 12:07:16.234973 cse_lite: Skip switching to RW in the recovery path
367 12:07:16.235071 8 DIMMs found
368 12:07:16.235142 SMM Memory Map
369 12:07:16.238407 SMRAM : 0x7b000000 0x800000
370 12:07:16.241759
371 12:07:16.241848 Subregion 0: 0x7b000000 0x200000
372 12:07:16.245075
373 12:07:16.248586 Subregion 1: 0x7b200000 0x200000
374 12:07:16.251846 Subregion 2: 0x7b400000 0x400000
375 12:07:16.251945 top_of_ram = 0x77000000
376 12:07:16.258406 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
377 12:07:16.265224 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
378 12:07:16.268279 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
379 12:07:16.274914 MTRR Range: Start=ff000000 End=0 (Size 1000000)
380 12:07:16.281621 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
381 12:07:16.288146 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
382 12:07:16.298082 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
383 12:07:16.301145 Processing 211 relocs. Offset value of 0x74c0b000
384 12:07:16.304669
385 12:07:16.311938 BS: romstage times (exec / console): total (unknown) / 276 ms
386 12:07:16.317247
387 12:07:16.317338
388 12:07:16.326978 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
389 12:07:16.330554 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
390 12:07:16.340252 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
391 12:07:16.346468 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
392 12:07:16.353052 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
393 12:07:16.359784 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
394 12:07:16.403594 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
395 12:07:16.409988 Processing 5008 relocs. Offset value of 0x75d98000
396 12:07:16.413915 BS: postcar times (exec / console): total (unknown) / 59 ms
397 12:07:16.414013
398 12:07:16.417168
399 12:07:16.417249
400 12:07:16.427029 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 12:07:16.427125 Normal boot
402 12:07:16.430334 FW_CONFIG value is 0x804c02
403 12:07:16.433695 PCI: 00:07.0 disabled by fw_config
404 12:07:16.436842 PCI: 00:07.1 disabled by fw_config
405 12:07:16.440235 PCI: 00:0d.2 disabled by fw_config
406 12:07:16.443495 PCI: 00:1c.7 disabled by fw_config
407 12:07:16.450283 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 12:07:16.456733 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 12:07:16.460298 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 12:07:16.463494 GENERIC: 0.0 disabled by fw_config
411 12:07:16.470321 GENERIC: 1.0 disabled by fw_config
412 12:07:16.473675 fw_config match found: DB_USB=USB3_ACTIVE
413 12:07:16.476355 fw_config match found: DB_USB=USB3_ACTIVE
414 12:07:16.479818 fw_config match found: DB_USB=USB3_ACTIVE
415 12:07:16.486521 fw_config match found: DB_USB=USB3_ACTIVE
416 12:07:16.489701 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 12:07:16.496380 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 12:07:16.506717 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 12:07:16.513687 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 12:07:16.516652 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 12:07:16.523168 microcode: Update skipped, already up-to-date
422 12:07:16.529715 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 12:07:16.557208 Detected 4 core, 8 thread CPU.
424 12:07:16.560366 Setting up SMI for CPU
425 12:07:16.563776 IED base = 0x7b400000
426 12:07:16.563856 IED size = 0x00400000
427 12:07:16.567095 Will perform SMM setup.
428 12:07:16.573710 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
429 12:07:16.580392 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 12:07:16.587045 Processing 16 relocs. Offset value of 0x00030000
431 12:07:16.590380 Attempting to start 7 APs
432 12:07:16.593837 Waiting for 10ms after sending INIT.
433 12:07:16.609260 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
434 12:07:16.612231 AP: slot 4 apic_id 2.
435 12:07:16.615945 AP: slot 7 apic_id 3.
436 12:07:16.616048 done.
437 12:07:16.616138 AP: slot 3 apic_id 7.
438 12:07:16.619448 AP: slot 6 apic_id 6.
439 12:07:16.622072 Waiting for 2nd SIPI to complete...done.
440 12:07:16.625932 AP: slot 5 apic_id 4.
441 12:07:16.629215 AP: slot 2 apic_id 5.
442 12:07:16.636094 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 12:07:16.642033 Processing 13 relocs. Offset value of 0x00038000
444 12:07:16.642124 Unable to locate Global NVS
445 12:07:16.652293 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 12:07:16.655576 Installing permanent SMM handler to 0x7b000000
447 12:07:16.665849 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 12:07:16.668834 Processing 794 relocs. Offset value of 0x7b010000
449 12:07:16.678789 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 12:07:16.682052 Processing 13 relocs. Offset value of 0x7b008000
451 12:07:16.688723 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 12:07:16.695315 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 12:07:16.698652 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 12:07:16.705233 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 12:07:16.711607 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 12:07:16.718980 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 12:07:16.724830 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 12:07:16.724964 Unable to locate Global NVS
459 12:07:16.734771 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 12:07:16.738065 Clearing SMI status registers
461 12:07:16.738193 SMI_STS: PM1
462 12:07:16.741962 PM1_STS: PWRBTN
463 12:07:16.748064 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 12:07:16.751673 In relocation handler: CPU 0
465 12:07:16.754884 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 12:07:16.761597 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 12:07:16.761734 Relocation complete.
468 12:07:16.771603 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 12:07:16.771728 In relocation handler: CPU 1
470 12:07:16.778321 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 12:07:16.778432 Relocation complete.
472 12:07:16.788516 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
473 12:07:16.788641 In relocation handler: CPU 5
474 12:07:16.794487 New SMBASE=0x7affec00 IEDBASE=0x7b400000
475 12:07:16.797850 Writing SMRR. base = 0x7b000006, mask=0xff800c00
476 12:07:16.801119 Relocation complete.
477 12:07:16.807923 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
478 12:07:16.811155 In relocation handler: CPU 2
479 12:07:16.814625 New SMBASE=0x7afff800 IEDBASE=0x7b400000
480 12:07:16.817884 Relocation complete.
481 12:07:16.824639 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
482 12:07:16.827571 In relocation handler: CPU 4
483 12:07:16.831373 New SMBASE=0x7afff000 IEDBASE=0x7b400000
484 12:07:16.837876 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 12:07:16.837980 Relocation complete.
486 12:07:16.844387 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
487 12:07:16.847769 In relocation handler: CPU 7
488 12:07:16.853793 New SMBASE=0x7affe400 IEDBASE=0x7b400000
489 12:07:16.853886 Relocation complete.
490 12:07:16.860523 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
491 12:07:16.863800 In relocation handler: CPU 6
492 12:07:16.870981 New SMBASE=0x7affe800 IEDBASE=0x7b400000
493 12:07:16.874163 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 12:07:16.877727 Relocation complete.
495 12:07:16.884214 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
496 12:07:16.887298 In relocation handler: CPU 3
497 12:07:16.890841 New SMBASE=0x7afff400 IEDBASE=0x7b400000
498 12:07:16.894211 Relocation complete.
499 12:07:16.894304 Initializing CPU #0
500 12:07:16.897528 CPU: vendor Intel device 806c1
501 12:07:16.900808 CPU: family 06, model 8c, stepping 01
502 12:07:16.903936 Clearing out pending MCEs
503 12:07:16.907431 Setting up local APIC...
504 12:07:16.910279 apic_id: 0x00 done.
505 12:07:16.914063 Turbo is available but hidden
506 12:07:16.917511 Turbo is available and visible
507 12:07:16.920063 microcode: Update skipped, already up-to-date
508 12:07:16.923981 CPU #0 initialized
509 12:07:16.924102 Initializing CPU #7
510 12:07:16.927270 Initializing CPU #4
511 12:07:16.927358 Initializing CPU #6
512 12:07:16.930692
513 12:07:16.930789 Initializing CPU #3
514 12:07:16.933884 CPU: vendor Intel device 806c1
515 12:07:16.937342 CPU: family 06, model 8c, stepping 01
516 12:07:16.940071 CPU: vendor Intel device 806c1
517 12:07:16.943489 CPU: family 06, model 8c, stepping 01
518 12:07:16.947132 Clearing out pending MCEs
519 12:07:16.950559 Clearing out pending MCEs
520 12:07:16.953390 Setting up local APIC...
521 12:07:16.953484 Initializing CPU #5
522 12:07:16.956780 Initializing CPU #2
523 12:07:16.960076 CPU: vendor Intel device 806c1
524 12:07:16.963371 CPU: family 06, model 8c, stepping 01
525 12:07:16.967467 CPU: vendor Intel device 806c1
526 12:07:16.971329 CPU: family 06, model 8c, stepping 01
527 12:07:16.971425 Clearing out pending MCEs
528 12:07:16.975098
529 12:07:16.975224 Clearing out pending MCEs
530 12:07:16.978235 Setting up local APIC...
531 12:07:16.981676 Initializing CPU #1
532 12:07:16.981787 Setting up local APIC...
533 12:07:16.984970 Setting up local APIC...
534 12:07:16.988319 CPU: vendor Intel device 806c1
535 12:07:16.991887 CPU: family 06, model 8c, stepping 01
536 12:07:16.995070 CPU: vendor Intel device 806c1
537 12:07:16.998356 CPU: family 06, model 8c, stepping 01
538 12:07:17.002016 CPU: vendor Intel device 806c1
539 12:07:17.005046 CPU: family 06, model 8c, stepping 01
540 12:07:17.008402 Clearing out pending MCEs
541 12:07:17.011724 Clearing out pending MCEs
542 12:07:17.014991 Setting up local APIC...
543 12:07:17.015130 Clearing out pending MCEs
544 12:07:17.018414 apic_id: 0x04 done.
545 12:07:17.021678 apic_id: 0x05 done.
546 12:07:17.024448 microcode: Update skipped, already up-to-date
547 12:07:17.031666 microcode: Update skipped, already up-to-date
548 12:07:17.031753 CPU #5 initialized
549 12:07:17.035089 CPU #2 initialized
550 12:07:17.035199 Setting up local APIC...
551 12:07:17.038215
552 12:07:17.038301 Setting up local APIC...
553 12:07:17.041607 apic_id: 0x02 done.
554 12:07:17.045019 apic_id: 0x03 done.
555 12:07:17.048223 microcode: Update skipped, already up-to-date
556 12:07:17.051289 microcode: Update skipped, already up-to-date
557 12:07:17.054354 CPU #4 initialized
558 12:07:17.054475 CPU #7 initialized
559 12:07:17.057789
560 12:07:17.057878 apic_id: 0x06 done.
561 12:07:17.061009 apic_id: 0x07 done.
562 12:07:17.064444 microcode: Update skipped, already up-to-date
563 12:07:17.071199 microcode: Update skipped, already up-to-date
564 12:07:17.071295 apic_id: 0x01 done.
565 12:07:17.074334 CPU #6 initialized
566 12:07:17.074422 CPU #3 initialized
567 12:07:17.081005 microcode: Update skipped, already up-to-date
568 12:07:17.081093 CPU #1 initialized
569 12:07:17.087659 bsp_do_flight_plan done after 459 msecs.
570 12:07:17.090757 CPU: frequency set to 4400 MHz
571 12:07:17.090844 Enabling SMIs.
572 12:07:17.097392 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
573 12:07:17.113878 SATAXPCIE1 indicates PCIe NVMe is present
574 12:07:17.117171 Probing TPM: done!
575 12:07:17.120578 Connected to device vid:did:rid of 1ae0:0028:00
576 12:07:17.130828 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
577 12:07:17.134653 Initialized TPM device CR50 revision 0
578 12:07:17.137993 Enabling S0i3.4
579 12:07:17.144588 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
580 12:07:17.147850 Found a VBT of 8704 bytes after decompression
581 12:07:17.153946 cse_lite: CSE RO boot. HybridStorageMode disabled
582 12:07:17.160653 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
583 12:07:17.235720 FSPS returned 0
584 12:07:17.238910 Executing Phase 1 of FspMultiPhaseSiInit
585 12:07:17.249132 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
586 12:07:17.252672 port C0 DISC req: usage 1 usb3 1 usb2 5
587 12:07:17.255800 Raw Buffer output 0 00000511
588 12:07:17.259520 Raw Buffer output 1 00000000
589 12:07:17.262694 pmc_send_ipc_cmd succeeded
590 12:07:17.265918 port C1 DISC req: usage 1 usb3 2 usb2 3
591 12:07:17.269354
592 12:07:17.269470 Raw Buffer output 0 00000321
593 12:07:17.272742 Raw Buffer output 1 00000000
594 12:07:17.276856 pmc_send_ipc_cmd succeeded
595 12:07:17.281943 Detected 4 core, 8 thread CPU.
596 12:07:17.285228 Detected 4 core, 8 thread CPU.
597 12:07:17.486133 Display FSP Version Info HOB
598 12:07:17.489043 Reference Code - CPU = a.0.4c.31
599 12:07:17.492504 uCode Version = 0.0.0.86
600 12:07:17.495891 TXT ACM version = ff.ff.ff.ffff
601 12:07:17.499020 Reference Code - ME = a.0.4c.31
602 12:07:17.502482 MEBx version = 0.0.0.0
603 12:07:17.505731 ME Firmware Version = Consumer SKU
604 12:07:17.508801 Reference Code - PCH = a.0.4c.31
605 12:07:17.512174 PCH-CRID Status = Disabled
606 12:07:17.515612 PCH-CRID Original Value = ff.ff.ff.ffff
607 12:07:17.518925 PCH-CRID New Value = ff.ff.ff.ffff
608 12:07:17.522284 OPROM - RST - RAID = ff.ff.ff.ffff
609 12:07:17.525659 PCH Hsio Version = 4.0.0.0
610 12:07:17.528884 Reference Code - SA - System Agent = a.0.4c.31
611 12:07:17.532232 Reference Code - MRC = 2.0.0.1
612 12:07:17.535620 SA - PCIe Version = a.0.4c.31
613 12:07:17.539045 SA-CRID Status = Disabled
614 12:07:17.541928 SA-CRID Original Value = 0.0.0.1
615 12:07:17.545607 SA-CRID New Value = 0.0.0.1
616 12:07:17.549476 OPROM - VBIOS = ff.ff.ff.ffff
617 12:07:17.553525 IO Manageability Engine FW Version = 11.1.4.0
618 12:07:17.556843 PHY Build Version = 0.0.0.e0
619 12:07:17.559508 Thunderbolt(TM) FW Version = 0.0.0.0
620 12:07:17.566260 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 12:07:17.566355 ITSS IRQ Polarities Before:
622 12:07:17.569611 IPC0: 0xffffffff
623 12:07:17.569696 IPC1: 0xffffffff
624 12:07:17.573072 IPC2: 0xffffffff
625 12:07:17.576276 IPC3: 0xffffffff
626 12:07:17.576368 ITSS IRQ Polarities After:
627 12:07:17.579505 IPC0: 0xffffffff
628 12:07:17.579594 IPC1: 0xffffffff
629 12:07:17.583338 IPC2: 0xffffffff
630 12:07:17.583424 IPC3: 0xffffffff
631 12:07:17.585973
632 12:07:17.589313 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 12:07:17.599325 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 12:07:17.612686 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 12:07:17.625672 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 12:07:17.632265 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
637 12:07:17.632368 Enumerating buses...
638 12:07:17.638937 Show all devs... Before device enumeration.
639 12:07:17.639032 Root Device: enabled 1
640 12:07:17.642333 DOMAIN: 0000: enabled 1
641 12:07:17.645630 CPU_CLUSTER: 0: enabled 1
642 12:07:17.649005 PCI: 00:00.0: enabled 1
643 12:07:17.649096 PCI: 00:02.0: enabled 1
644 12:07:17.652193 PCI: 00:04.0: enabled 1
645 12:07:17.655611 PCI: 00:05.0: enabled 1
646 12:07:17.655698 PCI: 00:06.0: enabled 0
647 12:07:17.658866
648 12:07:17.658953 PCI: 00:07.0: enabled 0
649 12:07:17.662191 PCI: 00:07.1: enabled 0
650 12:07:17.665523 PCI: 00:07.2: enabled 0
651 12:07:17.665624 PCI: 00:07.3: enabled 0
652 12:07:17.668935 PCI: 00:08.0: enabled 1
653 12:07:17.672059 PCI: 00:09.0: enabled 0
654 12:07:17.675663 PCI: 00:0a.0: enabled 0
655 12:07:17.675762 PCI: 00:0d.0: enabled 1
656 12:07:17.678842 PCI: 00:0d.1: enabled 0
657 12:07:17.682681 PCI: 00:0d.2: enabled 0
658 12:07:17.685352 PCI: 00:0d.3: enabled 0
659 12:07:17.685467 PCI: 00:0e.0: enabled 0
660 12:07:17.689237 PCI: 00:10.2: enabled 1
661 12:07:17.692838 PCI: 00:10.6: enabled 0
662 12:07:17.695534 PCI: 00:10.7: enabled 0
663 12:07:17.695622 PCI: 00:12.0: enabled 0
664 12:07:17.698698 PCI: 00:12.6: enabled 0
665 12:07:17.702053 PCI: 00:13.0: enabled 0
666 12:07:17.702140 PCI: 00:14.0: enabled 1
667 12:07:17.705352 PCI: 00:14.1: enabled 0
668 12:07:17.708721 PCI: 00:14.2: enabled 1
669 12:07:17.712021 PCI: 00:14.3: enabled 1
670 12:07:17.712136 PCI: 00:15.0: enabled 1
671 12:07:17.715310 PCI: 00:15.1: enabled 1
672 12:07:17.719013 PCI: 00:15.2: enabled 1
673 12:07:17.722362 PCI: 00:15.3: enabled 1
674 12:07:17.722447 PCI: 00:16.0: enabled 1
675 12:07:17.725492 PCI: 00:16.1: enabled 0
676 12:07:17.728861 PCI: 00:16.2: enabled 0
677 12:07:17.732074 PCI: 00:16.3: enabled 0
678 12:07:17.732164 PCI: 00:16.4: enabled 0
679 12:07:17.735586 PCI: 00:16.5: enabled 0
680 12:07:17.738541 PCI: 00:17.0: enabled 1
681 12:07:17.738628 PCI: 00:19.0: enabled 0
682 12:07:17.741929
683 12:07:17.742071 PCI: 00:19.1: enabled 1
684 12:07:17.745261 PCI: 00:19.2: enabled 0
685 12:07:17.748728 PCI: 00:1c.0: enabled 1
686 12:07:17.748858 PCI: 00:1c.1: enabled 0
687 12:07:17.752097 PCI: 00:1c.2: enabled 0
688 12:07:17.755522 PCI: 00:1c.3: enabled 0
689 12:07:17.758889 PCI: 00:1c.4: enabled 0
690 12:07:17.758994 PCI: 00:1c.5: enabled 0
691 12:07:17.761727 PCI: 00:1c.6: enabled 1
692 12:07:17.765100 PCI: 00:1c.7: enabled 0
693 12:07:17.768424 PCI: 00:1d.0: enabled 1
694 12:07:17.768513 PCI: 00:1d.1: enabled 0
695 12:07:17.772040 PCI: 00:1d.2: enabled 1
696 12:07:17.775234 PCI: 00:1d.3: enabled 0
697 12:07:17.778205 PCI: 00:1e.0: enabled 1
698 12:07:17.778292 PCI: 00:1e.1: enabled 0
699 12:07:17.782127 PCI: 00:1e.2: enabled 1
700 12:07:17.785084 PCI: 00:1e.3: enabled 1
701 12:07:17.785180 PCI: 00:1f.0: enabled 1
702 12:07:17.788053
703 12:07:17.788134 PCI: 00:1f.1: enabled 0
704 12:07:17.792170 PCI: 00:1f.2: enabled 1
705 12:07:17.795567 PCI: 00:1f.3: enabled 1
706 12:07:17.795654 PCI: 00:1f.4: enabled 0
707 12:07:17.798185 PCI: 00:1f.5: enabled 1
708 12:07:17.801384 PCI: 00:1f.6: enabled 0
709 12:07:17.804813 PCI: 00:1f.7: enabled 0
710 12:07:17.804901 APIC: 00: enabled 1
711 12:07:17.808177 GENERIC: 0.0: enabled 1
712 12:07:17.811381 GENERIC: 0.0: enabled 1
713 12:07:17.811468 GENERIC: 1.0: enabled 1
714 12:07:17.814827 GENERIC: 0.0: enabled 1
715 12:07:17.818191 GENERIC: 1.0: enabled 1
716 12:07:17.821699 USB0 port 0: enabled 1
717 12:07:17.821787 GENERIC: 0.0: enabled 1
718 12:07:17.825118 USB0 port 0: enabled 1
719 12:07:17.828559 GENERIC: 0.0: enabled 1
720 12:07:17.828653 I2C: 00:1a: enabled 1
721 12:07:17.832023
722 12:07:17.832114 I2C: 00:31: enabled 1
723 12:07:17.835282 I2C: 00:32: enabled 1
724 12:07:17.838417 I2C: 00:10: enabled 1
725 12:07:17.838506 I2C: 00:15: enabled 1
726 12:07:17.841804 GENERIC: 0.0: enabled 0
727 12:07:17.845143 GENERIC: 1.0: enabled 0
728 12:07:17.845230 GENERIC: 0.0: enabled 1
729 12:07:17.847962 SPI: 00: enabled 1
730 12:07:17.851681 SPI: 00: enabled 1
731 12:07:17.851799 PNP: 0c09.0: enabled 1
732 12:07:17.855166 GENERIC: 0.0: enabled 1
733 12:07:17.858261 USB3 port 0: enabled 1
734 12:07:17.858374 USB3 port 1: enabled 1
735 12:07:17.861600 USB3 port 2: enabled 0
736 12:07:17.864484 USB3 port 3: enabled 0
737 12:07:17.868206 USB2 port 0: enabled 0
738 12:07:17.868320 USB2 port 1: enabled 1
739 12:07:17.871713 USB2 port 2: enabled 1
740 12:07:17.875152 USB2 port 3: enabled 0
741 12:07:17.875269 USB2 port 4: enabled 1
742 12:07:17.877856 USB2 port 5: enabled 0
743 12:07:17.881322 USB2 port 6: enabled 0
744 12:07:17.885096 USB2 port 7: enabled 0
745 12:07:17.885210 USB2 port 8: enabled 0
746 12:07:17.887646 USB2 port 9: enabled 0
747 12:07:17.891944 USB3 port 0: enabled 0
748 12:07:17.892060 USB3 port 1: enabled 1
749 12:07:17.894339 USB3 port 2: enabled 0
750 12:07:17.897721 USB3 port 3: enabled 0
751 12:07:17.897835 GENERIC: 0.0: enabled 1
752 12:07:17.901741
753 12:07:17.901856 GENERIC: 1.0: enabled 1
754 12:07:17.904337 APIC: 01: enabled 1
755 12:07:17.904423 APIC: 05: enabled 1
756 12:07:17.907930 APIC: 07: enabled 1
757 12:07:17.910914 APIC: 02: enabled 1
758 12:07:17.911002 APIC: 04: enabled 1
759 12:07:17.914458 APIC: 06: enabled 1
760 12:07:17.917873 APIC: 03: enabled 1
761 12:07:17.917957 Compare with tree...
762 12:07:17.921287 Root Device: enabled 1
763 12:07:17.924475 DOMAIN: 0000: enabled 1
764 12:07:17.924559 PCI: 00:00.0: enabled 1
765 12:07:17.928032 PCI: 00:02.0: enabled 1
766 12:07:17.931395 PCI: 00:04.0: enabled 1
767 12:07:17.934103 GENERIC: 0.0: enabled 1
768 12:07:17.937419 PCI: 00:05.0: enabled 1
769 12:07:17.937506 PCI: 00:06.0: enabled 0
770 12:07:17.940878 PCI: 00:07.0: enabled 0
771 12:07:17.944423 GENERIC: 0.0: enabled 1
772 12:07:17.947649 PCI: 00:07.1: enabled 0
773 12:07:17.950995 GENERIC: 1.0: enabled 1
774 12:07:17.951083 PCI: 00:07.2: enabled 0
775 12:07:17.954473
776 12:07:17.954555 GENERIC: 0.0: enabled 1
777 12:07:17.957914 PCI: 00:07.3: enabled 0
778 12:07:17.960884 GENERIC: 1.0: enabled 1
779 12:07:17.964341 PCI: 00:08.0: enabled 1
780 12:07:17.967604 PCI: 00:09.0: enabled 0
781 12:07:17.967692 PCI: 00:0a.0: enabled 0
782 12:07:17.970800 PCI: 00:0d.0: enabled 1
783 12:07:17.974358 USB0 port 0: enabled 1
784 12:07:17.977845 USB3 port 0: enabled 1
785 12:07:17.981189 USB3 port 1: enabled 1
786 12:07:17.981275 USB3 port 2: enabled 0
787 12:07:17.984345 USB3 port 3: enabled 0
788 12:07:17.987254 PCI: 00:0d.1: enabled 0
789 12:07:17.990673 PCI: 00:0d.2: enabled 0
790 12:07:17.993969 GENERIC: 0.0: enabled 1
791 12:07:17.994063 PCI: 00:0d.3: enabled 0
792 12:07:17.997267 PCI: 00:0e.0: enabled 0
793 12:07:18.000607 PCI: 00:10.2: enabled 1
794 12:07:18.004111 PCI: 00:10.6: enabled 0
795 12:07:18.007378 PCI: 00:10.7: enabled 0
796 12:07:18.007461 PCI: 00:12.0: enabled 0
797 12:07:18.010867 PCI: 00:12.6: enabled 0
798 12:07:18.014149 PCI: 00:13.0: enabled 0
799 12:07:18.017343 PCI: 00:14.0: enabled 1
800 12:07:18.020749 USB0 port 0: enabled 1
801 12:07:18.020838 USB2 port 0: enabled 0
802 12:07:18.023914 USB2 port 1: enabled 1
803 12:07:18.027234 USB2 port 2: enabled 1
804 12:07:18.030447 USB2 port 3: enabled 0
805 12:07:18.033743 USB2 port 4: enabled 1
806 12:07:18.033831 USB2 port 5: enabled 0
807 12:07:18.037089
808 12:07:18.037177 USB2 port 6: enabled 0
809 12:07:18.040439 USB2 port 7: enabled 0
810 12:07:18.043753 USB2 port 8: enabled 0
811 12:07:18.047150 USB2 port 9: enabled 0
812 12:07:18.050544 USB3 port 0: enabled 0
813 12:07:18.050635 USB3 port 1: enabled 1
814 12:07:18.053653 USB3 port 2: enabled 0
815 12:07:18.057025 USB3 port 3: enabled 0
816 12:07:18.060349 PCI: 00:14.1: enabled 0
817 12:07:18.064213 PCI: 00:14.2: enabled 1
818 12:07:18.064333 PCI: 00:14.3: enabled 1
819 12:07:18.067527 GENERIC: 0.0: enabled 1
820 12:07:18.070374 PCI: 00:15.0: enabled 1
821 12:07:18.074309 I2C: 00:1a: enabled 1
822 12:07:18.076921 I2C: 00:31: enabled 1
823 12:07:18.077008 I2C: 00:32: enabled 1
824 12:07:18.080431 PCI: 00:15.1: enabled 1
825 12:07:18.083677 I2C: 00:10: enabled 1
826 12:07:18.086917 PCI: 00:15.2: enabled 1
827 12:07:18.090240 PCI: 00:15.3: enabled 1
828 12:07:18.090326 PCI: 00:16.0: enabled 1
829 12:07:18.093633 PCI: 00:16.1: enabled 0
830 12:07:18.096950 PCI: 00:16.2: enabled 0
831 12:07:18.100226 PCI: 00:16.3: enabled 0
832 12:07:18.100311 PCI: 00:16.4: enabled 0
833 12:07:18.103491
834 12:07:18.103576 PCI: 00:16.5: enabled 0
835 12:07:18.106991 PCI: 00:17.0: enabled 1
836 12:07:18.110294 PCI: 00:19.0: enabled 0
837 12:07:18.113791 PCI: 00:19.1: enabled 1
838 12:07:18.113875 I2C: 00:15: enabled 1
839 12:07:18.116780 PCI: 00:19.2: enabled 0
840 12:07:18.120291 PCI: 00:1d.0: enabled 1
841 12:07:18.123589 GENERIC: 0.0: enabled 1
842 12:07:18.126855 PCI: 00:1e.0: enabled 1
843 12:07:18.126941 PCI: 00:1e.1: enabled 0
844 12:07:18.130360 PCI: 00:1e.2: enabled 1
845 12:07:18.133575 SPI: 00: enabled 1
846 12:07:18.136786 PCI: 00:1e.3: enabled 1
847 12:07:18.136871 SPI: 00: enabled 1
848 12:07:18.140035 PCI: 00:1f.0: enabled 1
849 12:07:18.143181 PNP: 0c09.0: enabled 1
850 12:07:18.146739 PCI: 00:1f.1: enabled 0
851 12:07:18.150251 PCI: 00:1f.2: enabled 1
852 12:07:18.150352 GENERIC: 0.0: enabled 1
853 12:07:18.153422 GENERIC: 0.0: enabled 1
854 12:07:18.205213 GENERIC: 1.0: enabled 1
855 12:07:18.205379 PCI: 00:1f.3: enabled 1
856 12:07:18.205698 PCI: 00:1f.4: enabled 0
857 12:07:18.205768 PCI: 00:1f.5: enabled 1
858 12:07:18.205829 PCI: 00:1f.6: enabled 0
859 12:07:18.205888 PCI: 00:1f.7: enabled 0
860 12:07:18.205946 CPU_CLUSTER: 0: enabled 1
861 12:07:18.206002 APIC: 00: enabled 1
862 12:07:18.206060 APIC: 01: enabled 1
863 12:07:18.206119 APIC: 05: enabled 1
864 12:07:18.206364 APIC: 07: enabled 1
865 12:07:18.206479 APIC: 02: enabled 1
866 12:07:18.206717 APIC: 04: enabled 1
867 12:07:18.206778 APIC: 06: enabled 1
868 12:07:18.206835 APIC: 03: enabled 1
869 12:07:18.207234 Root Device scanning...
870 12:07:18.207351 scan_static_bus for Root Device
871 12:07:18.207602 DOMAIN: 0000 enabled
872 12:07:18.207670 CPU_CLUSTER: 0 enabled
873 12:07:18.207731 DOMAIN: 0000 scanning...
874 12:07:18.255424 PCI: pci_scan_bus for bus 00
875 12:07:18.255539 PCI: 00:00.0 [8086/0000] ops
876 12:07:18.256169 PCI: 00:00.0 [8086/9a12] enabled
877 12:07:18.256253 PCI: 00:02.0 [8086/0000] bus ops
878 12:07:18.256503 PCI: 00:02.0 [8086/9a40] enabled
879 12:07:18.256571 PCI: 00:04.0 [8086/0000] bus ops
880 12:07:18.256632 PCI: 00:04.0 [8086/9a03] enabled
881 12:07:18.256692 PCI: 00:05.0 [8086/9a19] enabled
882 12:07:18.256931 PCI: 00:07.0 [0000/0000] hidden
883 12:07:18.257002 PCI: 00:08.0 [8086/9a11] enabled
884 12:07:18.257061 PCI: 00:0a.0 [8086/9a0d] disabled
885 12:07:18.257501 PCI: 00:0d.0 [8086/0000] bus ops
886 12:07:18.257599 PCI: 00:0d.0 [8086/9a13] enabled
887 12:07:18.257849 PCI: 00:14.0 [8086/0000] bus ops
888 12:07:18.257917 PCI: 00:14.0 [8086/a0ed] enabled
889 12:07:18.267337 PCI: 00:14.2 [8086/a0ef] enabled
890 12:07:18.267435 PCI: 00:14.3 [8086/0000] bus ops
891 12:07:18.270649 PCI: 00:14.3 [8086/a0f0] enabled
892 12:07:18.270745 PCI: 00:15.0 [8086/0000] bus ops
893 12:07:18.274199 PCI: 00:15.0 [8086/a0e8] enabled
894 12:07:18.274300 PCI: 00:15.1 [8086/0000] bus ops
895 12:07:18.277507 PCI: 00:15.1 [8086/a0e9] enabled
896 12:07:18.280826 PCI: 00:15.2 [8086/0000] bus ops
897 12:07:18.283651 PCI: 00:15.2 [8086/a0ea] enabled
898 12:07:18.287080 PCI: 00:15.3 [8086/0000] bus ops
899 12:07:18.290305 PCI: 00:15.3 [8086/a0eb] enabled
900 12:07:18.293784 PCI: 00:16.0 [8086/0000] ops
901 12:07:18.297171 PCI: 00:16.0 [8086/a0e0] enabled
902 12:07:18.303873 PCI: Static device PCI: 00:17.0 not found, disabling it.
903 12:07:18.307283 PCI: 00:19.0 [8086/0000] bus ops
904 12:07:18.310300 PCI: 00:19.0 [8086/a0c5] disabled
905 12:07:18.313990 PCI: 00:19.1 [8086/0000] bus ops
906 12:07:18.317223 PCI: 00:19.1 [8086/a0c6] enabled
907 12:07:18.320194 PCI: 00:1d.0 [8086/0000] bus ops
908 12:07:18.323555 PCI: 00:1d.0 [8086/a0b0] enabled
909 12:07:18.327126 PCI: 00:1e.0 [8086/0000] ops
910 12:07:18.330473 PCI: 00:1e.0 [8086/a0a8] enabled
911 12:07:18.333578 PCI: 00:1e.2 [8086/0000] bus ops
912 12:07:18.336832 PCI: 00:1e.2 [8086/a0aa] enabled
913 12:07:18.340108 PCI: 00:1e.3 [8086/0000] bus ops
914 12:07:18.343361 PCI: 00:1e.3 [8086/a0ab] enabled
915 12:07:18.346740 PCI: 00:1f.0 [8086/0000] bus ops
916 12:07:18.349958 PCI: 00:1f.0 [8086/a087] enabled
917 12:07:18.350045 RTC Init
918 12:07:18.353347 Set power on after power failure.
919 12:07:18.356763 Disabling Deep S3
920 12:07:18.356849 Disabling Deep S3
921 12:07:18.360262
922 12:07:18.360368 Disabling Deep S4
923 12:07:18.363299 Disabling Deep S4
924 12:07:18.363384 Disabling Deep S5
925 12:07:18.366716 Disabling Deep S5
926 12:07:18.369578 PCI: 00:1f.2 [0000/0000] hidden
927 12:07:18.373189 PCI: 00:1f.3 [8086/0000] bus ops
928 12:07:18.376223 PCI: 00:1f.3 [8086/a0c8] enabled
929 12:07:18.380158 PCI: 00:1f.5 [8086/0000] bus ops
930 12:07:18.383525 PCI: 00:1f.5 [8086/a0a4] enabled
931 12:07:18.386234 PCI: Leftover static devices:
932 12:07:18.386326 PCI: 00:10.2
933 12:07:18.386394 PCI: 00:10.6
934 12:07:18.389566
935 12:07:18.389686 PCI: 00:10.7
936 12:07:18.389753 PCI: 00:06.0
937 12:07:18.392872 PCI: 00:07.1
938 12:07:18.393042 PCI: 00:07.2
939 12:07:18.396213 PCI: 00:07.3
940 12:07:18.396300 PCI: 00:09.0
941 12:07:18.396400 PCI: 00:0d.1
942 12:07:18.399591 PCI: 00:0d.2
943 12:07:18.399677 PCI: 00:0d.3
944 12:07:18.402960 PCI: 00:0e.0
945 12:07:18.403060 PCI: 00:12.0
946 12:07:18.403128 PCI: 00:12.6
947 12:07:18.406392
948 12:07:18.406534 PCI: 00:13.0
949 12:07:18.406607 PCI: 00:14.1
950 12:07:18.409784 PCI: 00:16.1
951 12:07:18.409919 PCI: 00:16.2
952 12:07:18.413028 PCI: 00:16.3
953 12:07:18.413113 PCI: 00:16.4
954 12:07:18.413179 PCI: 00:16.5
955 12:07:18.416003 PCI: 00:17.0
956 12:07:18.416088 PCI: 00:19.2
957 12:07:18.419685 PCI: 00:1e.1
958 12:07:18.419787 PCI: 00:1f.1
959 12:07:18.419854 PCI: 00:1f.4
960 12:07:18.422901 PCI: 00:1f.6
961 12:07:18.422986 PCI: 00:1f.7
962 12:07:18.426291 PCI: Check your devicetree.cb.
963 12:07:18.429485 PCI: 00:02.0 scanning...
964 12:07:18.432859 scan_generic_bus for PCI: 00:02.0
965 12:07:18.436140 scan_generic_bus for PCI: 00:02.0 done
966 12:07:18.442763 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
967 12:07:18.442848 PCI: 00:04.0 scanning...
968 12:07:18.446036 scan_generic_bus for PCI: 00:04.0
969 12:07:18.449572
970 12:07:18.449657 GENERIC: 0.0 enabled
971 12:07:18.456059 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
972 12:07:18.459396 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
973 12:07:18.462837 PCI: 00:0d.0 scanning...
974 12:07:18.466143 scan_static_bus for PCI: 00:0d.0
975 12:07:18.469565 USB0 port 0 enabled
976 12:07:18.472582 USB0 port 0 scanning...
977 12:07:18.475911 scan_static_bus for USB0 port 0
978 12:07:18.475998 USB3 port 0 enabled
979 12:07:18.479262 USB3 port 1 enabled
980 12:07:18.482662 USB3 port 2 disabled
981 12:07:18.482781 USB3 port 3 disabled
982 12:07:18.485891 USB3 port 0 scanning...
983 12:07:18.489303 scan_static_bus for USB3 port 0
984 12:07:18.492610 scan_static_bus for USB3 port 0 done
985 12:07:18.496090 scan_bus: bus USB3 port 0 finished in 6 msecs
986 12:07:18.499336
987 12:07:18.499421 USB3 port 1 scanning...
988 12:07:18.502694 scan_static_bus for USB3 port 1
989 12:07:18.505922 scan_static_bus for USB3 port 1 done
990 12:07:18.512489 scan_bus: bus USB3 port 1 finished in 6 msecs
991 12:07:18.515809 scan_static_bus for USB0 port 0 done
992 12:07:18.519076 scan_bus: bus USB0 port 0 finished in 43 msecs
993 12:07:18.522235 scan_static_bus for PCI: 00:0d.0 done
994 12:07:18.528848 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
995 12:07:18.532512 PCI: 00:14.0 scanning...
996 12:07:18.535456 scan_static_bus for PCI: 00:14.0
997 12:07:18.535540 USB0 port 0 enabled
998 12:07:18.538817 USB0 port 0 scanning...
999 12:07:18.542185 scan_static_bus for USB0 port 0
1000 12:07:18.545621 USB2 port 0 disabled
1001 12:07:18.545706 USB2 port 1 enabled
1002 12:07:18.548790 USB2 port 2 enabled
1003 12:07:18.552067 USB2 port 3 disabled
1004 12:07:18.552156 USB2 port 4 enabled
1005 12:07:18.555353 USB2 port 5 disabled
1006 12:07:18.558855 USB2 port 6 disabled
1007 12:07:18.558939 USB2 port 7 disabled
1008 12:07:18.562113 USB2 port 8 disabled
1009 12:07:18.565334 USB2 port 9 disabled
1010 12:07:18.565447 USB3 port 0 disabled
1011 12:07:18.568794 USB3 port 1 enabled
1012 12:07:18.568881 USB3 port 2 disabled
1013 12:07:18.572114 USB3 port 3 disabled
1014 12:07:18.575348 USB2 port 1 scanning...
1015 12:07:18.578466 scan_static_bus for USB2 port 1
1016 12:07:18.581896 scan_static_bus for USB2 port 1 done
1017 12:07:18.585092 scan_bus: bus USB2 port 1 finished in 6 msecs
1018 12:07:18.588437 USB2 port 2 scanning...
1019 12:07:18.591879 scan_static_bus for USB2 port 2
1020 12:07:18.595263 scan_static_bus for USB2 port 2 done
1021 12:07:18.601439 scan_bus: bus USB2 port 2 finished in 6 msecs
1022 12:07:18.601526 USB2 port 4 scanning...
1023 12:07:18.604767 scan_static_bus for USB2 port 4
1024 12:07:18.612039 scan_static_bus for USB2 port 4 done
1025 12:07:18.614808 scan_bus: bus USB2 port 4 finished in 6 msecs
1026 12:07:18.618254 USB3 port 1 scanning...
1027 12:07:18.621524 scan_static_bus for USB3 port 1
1028 12:07:18.624706 scan_static_bus for USB3 port 1 done
1029 12:07:18.628205 scan_bus: bus USB3 port 1 finished in 6 msecs
1030 12:07:18.631433 scan_static_bus for USB0 port 0 done
1031 12:07:18.637908 scan_bus: bus USB0 port 0 finished in 93 msecs
1032 12:07:18.641182 scan_static_bus for PCI: 00:14.0 done
1033 12:07:18.644554 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1034 12:07:18.647920 PCI: 00:14.3 scanning...
1035 12:07:18.651082 scan_static_bus for PCI: 00:14.3
1036 12:07:18.654334 GENERIC: 0.0 enabled
1037 12:07:18.657728 scan_static_bus for PCI: 00:14.3 done
1038 12:07:18.661063 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1039 12:07:18.664331
1040 12:07:18.664416 PCI: 00:15.0 scanning...
1041 12:07:18.667608 scan_static_bus for PCI: 00:15.0
1042 12:07:18.670860 I2C: 00:1a enabled
1043 12:07:18.670953 I2C: 00:31 enabled
1044 12:07:18.674231
1045 12:07:18.674317 I2C: 00:32 enabled
1046 12:07:18.677643 scan_static_bus for PCI: 00:15.0 done
1047 12:07:18.684492 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1048 12:07:18.684581 PCI: 00:15.1 scanning...
1049 12:07:18.687630 scan_static_bus for PCI: 00:15.1
1050 12:07:18.691165 I2C: 00:10 enabled
1051 12:07:18.694462 scan_static_bus for PCI: 00:15.1 done
1052 12:07:18.701278 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1053 12:07:18.701364 PCI: 00:15.2 scanning...
1054 12:07:18.704467 scan_static_bus for PCI: 00:15.2
1055 12:07:18.711310 scan_static_bus for PCI: 00:15.2 done
1056 12:07:18.714643 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1057 12:07:18.717939 PCI: 00:15.3 scanning...
1058 12:07:18.721382 scan_static_bus for PCI: 00:15.3
1059 12:07:18.723965 scan_static_bus for PCI: 00:15.3 done
1060 12:07:18.727419 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1061 12:07:18.731254 PCI: 00:19.1 scanning...
1062 12:07:18.734091 scan_static_bus for PCI: 00:19.1
1063 12:07:18.737328 I2C: 00:15 enabled
1064 12:07:18.741018 scan_static_bus for PCI: 00:19.1 done
1065 12:07:18.744489 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1066 12:07:18.747264 PCI: 00:1d.0 scanning...
1067 12:07:18.750968 do_pci_scan_bridge for PCI: 00:1d.0
1068 12:07:18.754218 PCI: pci_scan_bus for bus 01
1069 12:07:18.757599 PCI: 01:00.0 [15b7/5009] enabled
1070 12:07:18.760877 GENERIC: 0.0 enabled
1071 12:07:18.764261 Enabling Common Clock Configuration
1072 12:07:18.767637 L1 Sub-State supported from root port 29
1073 12:07:18.770890 L1 Sub-State Support = 0x5
1074 12:07:18.774324 CommonModeRestoreTime = 0x28
1075 12:07:18.777068 Power On Value = 0x16, Power On Scale = 0x0
1076 12:07:18.780321 ASPM: Enabled L1
1077 12:07:18.784062 PCIe: Max_Payload_Size adjusted to 128
1078 12:07:18.787415 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1079 12:07:18.791463 PCI: 00:1e.2 scanning...
1080 12:07:18.794801 scan_generic_bus for PCI: 00:1e.2
1081 12:07:18.798059 SPI: 00 enabled
1082 12:07:18.804740 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1083 12:07:18.807955 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1084 12:07:18.811201 PCI: 00:1e.3 scanning...
1085 12:07:18.814728 scan_generic_bus for PCI: 00:1e.3
1086 12:07:18.814814 SPI: 00 enabled
1087 12:07:18.821365 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1088 12:07:18.827800 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1089 12:07:18.827928 PCI: 00:1f.0 scanning...
1090 12:07:18.831281 scan_static_bus for PCI: 00:1f.0
1091 12:07:18.834630 PNP: 0c09.0 enabled
1092 12:07:18.837350 PNP: 0c09.0 scanning...
1093 12:07:18.840699 scan_static_bus for PNP: 0c09.0
1094 12:07:18.844125 scan_static_bus for PNP: 0c09.0 done
1095 12:07:18.847566 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1096 12:07:18.850596 scan_static_bus for PCI: 00:1f.0 done
1097 12:07:18.854474
1098 12:07:18.857699 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1099 12:07:18.860888 PCI: 00:1f.2 scanning...
1100 12:07:18.864426 scan_static_bus for PCI: 00:1f.2
1101 12:07:18.864550 GENERIC: 0.0 enabled
1102 12:07:18.867701 GENERIC: 0.0 scanning...
1103 12:07:18.871023 scan_static_bus for GENERIC: 0.0
1104 12:07:18.874313 GENERIC: 0.0 enabled
1105 12:07:18.877682 GENERIC: 1.0 enabled
1106 12:07:18.880997 scan_static_bus for GENERIC: 0.0 done
1107 12:07:18.884088 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1108 12:07:18.887611 scan_static_bus for PCI: 00:1f.2 done
1109 12:07:18.894189 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1110 12:07:18.897606 PCI: 00:1f.3 scanning...
1111 12:07:18.900294 scan_static_bus for PCI: 00:1f.3
1112 12:07:18.903658 scan_static_bus for PCI: 00:1f.3 done
1113 12:07:18.906902 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1114 12:07:18.910273 PCI: 00:1f.5 scanning...
1115 12:07:18.913782 scan_generic_bus for PCI: 00:1f.5
1116 12:07:18.917012 scan_generic_bus for PCI: 00:1f.5 done
1117 12:07:18.923518 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1118 12:07:18.927038 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1119 12:07:18.930170 scan_static_bus for Root Device done
1120 12:07:18.936878 scan_bus: bus Root Device finished in 735 msecs
1121 12:07:18.937035 done
1122 12:07:18.943527 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1123 12:07:18.946921 Chrome EC: UHEPI supported
1124 12:07:18.953603 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1125 12:07:18.956841 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1126 12:07:18.963313 SPI flash protection: WPSW=0 SRP0=1
1127 12:07:18.966780 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1128 12:07:18.973413 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1129 12:07:18.976702 found VGA at PCI: 00:02.0
1130 12:07:18.979984 Setting up VGA for PCI: 00:02.0
1131 12:07:18.983255 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1132 12:07:18.990070 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1133 12:07:18.990204 Allocating resources...
1134 12:07:18.993323 Reading resources...
1135 12:07:18.996548 Root Device read_resources bus 0 link: 0
1136 12:07:19.002797 DOMAIN: 0000 read_resources bus 0 link: 0
1137 12:07:19.006200 PCI: 00:04.0 read_resources bus 1 link: 0
1138 12:07:19.012833 PCI: 00:04.0 read_resources bus 1 link: 0 done
1139 12:07:19.016354 PCI: 00:0d.0 read_resources bus 0 link: 0
1140 12:07:19.019630 USB0 port 0 read_resources bus 0 link: 0
1141 12:07:19.026952 USB0 port 0 read_resources bus 0 link: 0 done
1142 12:07:19.030262 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1143 12:07:19.036838 PCI: 00:14.0 read_resources bus 0 link: 0
1144 12:07:19.039609 USB0 port 0 read_resources bus 0 link: 0
1145 12:07:19.046379 USB0 port 0 read_resources bus 0 link: 0 done
1146 12:07:19.049741 PCI: 00:14.0 read_resources bus 0 link: 0 done
1147 12:07:19.056395 PCI: 00:14.3 read_resources bus 0 link: 0
1148 12:07:19.059565 PCI: 00:14.3 read_resources bus 0 link: 0 done
1149 12:07:19.066184 PCI: 00:15.0 read_resources bus 0 link: 0
1150 12:07:19.069660 PCI: 00:15.0 read_resources bus 0 link: 0 done
1151 12:07:19.076244 PCI: 00:15.1 read_resources bus 0 link: 0
1152 12:07:19.079597 PCI: 00:15.1 read_resources bus 0 link: 0 done
1153 12:07:19.086716 PCI: 00:19.1 read_resources bus 0 link: 0
1154 12:07:19.090087 PCI: 00:19.1 read_resources bus 0 link: 0 done
1155 12:07:19.096639 PCI: 00:1d.0 read_resources bus 1 link: 0
1156 12:07:19.100161 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1157 12:07:19.106887 PCI: 00:1e.2 read_resources bus 2 link: 0
1158 12:07:19.110280 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1159 12:07:19.117079 PCI: 00:1e.3 read_resources bus 3 link: 0
1160 12:07:19.119715 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1161 12:07:19.126458 PCI: 00:1f.0 read_resources bus 0 link: 0
1162 12:07:19.129775 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1163 12:07:19.133000 PCI: 00:1f.2 read_resources bus 0 link: 0
1164 12:07:19.136520
1165 12:07:19.139940 GENERIC: 0.0 read_resources bus 0 link: 0
1166 12:07:19.142670 GENERIC: 0.0 read_resources bus 0 link: 0 done
1167 12:07:19.150030 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1168 12:07:19.156161 DOMAIN: 0000 read_resources bus 0 link: 0 done
1169 12:07:19.159876 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1170 12:07:19.165968 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1171 12:07:19.169862 Root Device read_resources bus 0 link: 0 done
1172 12:07:19.172560 Done reading resources.
1173 12:07:19.176392 Show resources in subtree (Root Device)...After reading.
1174 12:07:19.183138 Root Device child on link 0 DOMAIN: 0000
1175 12:07:19.186456 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1176 12:07:19.196384 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1177 12:07:19.206348 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1178 12:07:19.206472 PCI: 00:00.0
1179 12:07:19.215682 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1180 12:07:19.225775 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1181 12:07:19.235897 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1182 12:07:19.245945 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1183 12:07:19.255668 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1184 12:07:19.262300 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1185 12:07:19.272056 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1186 12:07:19.282108 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1187 12:07:19.292004 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1188 12:07:19.301963 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1189 12:07:19.312138 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1190 12:07:19.318675 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1191 12:07:19.329046 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1192 12:07:19.338395 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1193 12:07:19.348383 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1194 12:07:19.358606 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1195 12:07:19.368345 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1196 12:07:19.374920 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1197 12:07:19.385124 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1198 12:07:19.394989 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1199 12:07:19.398283 PCI: 00:02.0
1200 12:07:19.408483 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1201 12:07:19.418000 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1202 12:07:19.424569 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1203 12:07:19.431113 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1204 12:07:19.440968 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1205 12:07:19.441057 GENERIC: 0.0
1206 12:07:19.444466 PCI: 00:05.0
1207 12:07:19.454197 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1208 12:07:19.457719 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1209 12:07:19.460942 GENERIC: 0.0
1210 12:07:19.461050 PCI: 00:08.0
1211 12:07:19.470630 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 12:07:19.474607 PCI: 00:0a.0
1213 12:07:19.478043 PCI: 00:0d.0 child on link 0 USB0 port 0
1214 12:07:19.487374 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1215 12:07:19.494104 USB0 port 0 child on link 0 USB3 port 0
1216 12:07:19.494193 USB3 port 0
1217 12:07:19.497204 USB3 port 1
1218 12:07:19.497288 USB3 port 2
1219 12:07:19.500645 USB3 port 3
1220 12:07:19.503998 PCI: 00:14.0 child on link 0 USB0 port 0
1221 12:07:19.513982 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1222 12:07:19.517554 USB0 port 0 child on link 0 USB2 port 0
1223 12:07:19.520740 USB2 port 0
1224 12:07:19.520825 USB2 port 1
1225 12:07:19.523922 USB2 port 2
1226 12:07:19.527430 USB2 port 3
1227 12:07:19.527515 USB2 port 4
1228 12:07:19.530552 USB2 port 5
1229 12:07:19.530636 USB2 port 6
1230 12:07:19.533851 USB2 port 7
1231 12:07:19.533936 USB2 port 8
1232 12:07:19.537269 USB2 port 9
1233 12:07:19.537382 USB3 port 0
1234 12:07:19.540421 USB3 port 1
1235 12:07:19.540554 USB3 port 2
1236 12:07:19.543885 USB3 port 3
1237 12:07:19.543971 PCI: 00:14.2
1238 12:07:19.553703 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 12:07:19.563787 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1240 12:07:19.570300 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1241 12:07:19.580068 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 12:07:19.580175 GENERIC: 0.0
1243 12:07:19.586867 PCI: 00:15.0 child on link 0 I2C: 00:1a
1244 12:07:19.596851 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 12:07:19.596937 I2C: 00:1a
1246 12:07:19.597004 I2C: 00:31
1247 12:07:19.600275
1248 12:07:19.600360 I2C: 00:32
1249 12:07:19.603211 PCI: 00:15.1 child on link 0 I2C: 00:10
1250 12:07:19.613399 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 12:07:19.616725 I2C: 00:10
1252 12:07:19.616809 PCI: 00:15.2
1253 12:07:19.626732 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 12:07:19.629774 PCI: 00:15.3
1255 12:07:19.639862 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 12:07:19.639948 PCI: 00:16.0
1257 12:07:19.649844 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 12:07:19.653231 PCI: 00:19.0
1259 12:07:19.656546 PCI: 00:19.1 child on link 0 I2C: 00:15
1260 12:07:19.666566 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 12:07:19.669836 I2C: 00:15
1262 12:07:19.673203 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1263 12:07:19.679841 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1264 12:07:19.683216
1265 12:07:19.689765 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1266 12:07:19.699898 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1267 12:07:19.702968 GENERIC: 0.0
1268 12:07:19.703054 PCI: 01:00.0
1269 12:07:19.713256 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1270 12:07:19.723065 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1271 12:07:19.726357 PCI: 00:1e.0
1272 12:07:19.736186 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1273 12:07:19.739589 PCI: 00:1e.2 child on link 0 SPI: 00
1274 12:07:19.749362 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1275 12:07:19.752652 SPI: 00
1276 12:07:19.756039 PCI: 00:1e.3 child on link 0 SPI: 00
1277 12:07:19.766107 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1278 12:07:19.766237 SPI: 00
1279 12:07:19.772710 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1280 12:07:19.779220 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1281 12:07:19.782317 PNP: 0c09.0
1282 12:07:19.789084 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1283 12:07:19.795716 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1284 12:07:19.805575 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1285 12:07:19.812381 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1286 12:07:19.818982 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1287 12:07:19.819089 GENERIC: 0.0
1288 12:07:19.822289 GENERIC: 1.0
1289 12:07:19.822404 PCI: 00:1f.3
1290 12:07:19.832315 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1291 12:07:19.842543 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1292 12:07:19.845258 PCI: 00:1f.5
1293 12:07:19.855635 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1294 12:07:19.858686 CPU_CLUSTER: 0 child on link 0 APIC: 00
1295 12:07:19.858835 APIC: 00
1296 12:07:19.861784 APIC: 01
1297 12:07:19.861903 APIC: 05
1298 12:07:19.862021 APIC: 07
1299 12:07:19.865214
1300 12:07:19.865301 APIC: 02
1301 12:07:19.865413 APIC: 04
1302 12:07:19.869039 APIC: 06
1303 12:07:19.869124 APIC: 03
1304 12:07:19.875631 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1305 12:07:19.882302 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1306 12:07:19.888879 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1307 12:07:19.895474 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1308 12:07:19.898769 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1309 12:07:19.902076 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1310 12:07:19.908760 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1311 12:07:19.918289 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1312 12:07:19.924887 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1313 12:07:19.931410 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1314 12:07:19.937995 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1315 12:07:19.945246 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1316 12:07:19.954982 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1317 12:07:19.961583 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1318 12:07:19.964896 DOMAIN: 0000: Resource ranges:
1319 12:07:19.968405 * Base: 1000, Size: 800, Tag: 100
1320 12:07:19.971465 * Base: 1900, Size: e700, Tag: 100
1321 12:07:19.978142 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1322 12:07:19.984626 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1323 12:07:19.991222 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1324 12:07:19.997821 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1325 12:07:20.004655 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1326 12:07:20.014532 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1327 12:07:20.021199 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1328 12:07:20.027979 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1329 12:07:20.037849 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1330 12:07:20.044365 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1331 12:07:20.051212 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1332 12:07:20.061301 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1333 12:07:20.067873 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1334 12:07:20.074030 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1335 12:07:20.084473 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1336 12:07:20.091087 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1337 12:07:20.097623 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1338 12:07:20.107631 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1339 12:07:20.114332 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1340 12:07:20.120946 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1341 12:07:20.130414 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1342 12:07:20.136955 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1343 12:07:20.143799 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1344 12:07:20.153711 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1345 12:07:20.160167 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1346 12:07:20.163474 DOMAIN: 0000: Resource ranges:
1347 12:07:20.167314 * Base: 7fc00000, Size: 40400000, Tag: 200
1348 12:07:20.170638 * Base: d0000000, Size: 28000000, Tag: 200
1349 12:07:20.176996 * Base: fa000000, Size: 1000000, Tag: 200
1350 12:07:20.180368 * Base: fb001000, Size: 2fff000, Tag: 200
1351 12:07:20.183704 * Base: fe010000, Size: 2e000, Tag: 200
1352 12:07:20.190298 * Base: fe03f000, Size: d41000, Tag: 200
1353 12:07:20.193701 * Base: fed88000, Size: 8000, Tag: 200
1354 12:07:20.197093 * Base: fed93000, Size: d000, Tag: 200
1355 12:07:20.200222 * Base: feda2000, Size: 1e000, Tag: 200
1356 12:07:20.203804 * Base: fede0000, Size: 1220000, Tag: 200
1357 12:07:20.207262
1358 12:07:20.210123 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1359 12:07:20.216600 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1360 12:07:20.223235 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1361 12:07:20.230410 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1362 12:07:20.236979 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1363 12:07:20.243475 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1364 12:07:20.249790 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1365 12:07:20.256906 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1366 12:07:20.263368 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1367 12:07:20.270108 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1368 12:07:20.276395 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1369 12:07:20.283376 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1370 12:07:20.289443 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1371 12:07:20.296198 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1372 12:07:20.303130 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1373 12:07:20.309745 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1374 12:07:20.316336 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1375 12:07:20.323183 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1376 12:07:20.329802 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1377 12:07:20.335857 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1378 12:07:20.342518 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1379 12:07:20.349216 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1380 12:07:20.355873 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1381 12:07:20.362610 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1382 12:07:20.372749 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1383 12:07:20.376107 PCI: 00:1d.0: Resource ranges:
1384 12:07:20.379371 * Base: 7fc00000, Size: 100000, Tag: 200
1385 12:07:20.385981 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1386 12:07:20.392435 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1387 12:07:20.402178 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1388 12:07:20.409141 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1389 12:07:20.411969 Root Device assign_resources, bus 0 link: 0
1390 12:07:20.415705 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 12:07:20.425681 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1392 12:07:20.432445 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1393 12:07:20.442574 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1394 12:07:20.449317 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1395 12:07:20.455386 PCI: 00:04.0 assign_resources, bus 1 link: 0
1396 12:07:20.458733 PCI: 00:04.0 assign_resources, bus 1 link: 0
1397 12:07:20.465336 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1398 12:07:20.468656
1399 12:07:20.475413 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1400 12:07:20.481996 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1401 12:07:20.485142
1402 12:07:20.488463 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1403 12:07:20.491966 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1404 12:07:20.501656 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1405 12:07:20.504953 PCI: 00:14.0 assign_resources, bus 0 link: 0
1406 12:07:20.511585 PCI: 00:14.0 assign_resources, bus 0 link: 0
1407 12:07:20.518148 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1408 12:07:20.524668 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1409 12:07:20.535388 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1410 12:07:20.538390 PCI: 00:14.3 assign_resources, bus 0 link: 0
1411 12:07:20.545288 PCI: 00:14.3 assign_resources, bus 0 link: 0
1412 12:07:20.552068 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1413 12:07:20.554781 PCI: 00:15.0 assign_resources, bus 0 link: 0
1414 12:07:20.558028
1415 12:07:20.561347 PCI: 00:15.0 assign_resources, bus 0 link: 0
1416 12:07:20.568132 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1417 12:07:20.574683 PCI: 00:15.1 assign_resources, bus 0 link: 0
1418 12:07:20.578005 PCI: 00:15.1 assign_resources, bus 0 link: 0
1419 12:07:20.587847 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1420 12:07:20.594672 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1421 12:07:20.604781 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1422 12:07:20.611361 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1423 12:07:20.614688 PCI: 00:19.1 assign_resources, bus 0 link: 0
1424 12:07:20.617592
1425 12:07:20.620795 PCI: 00:19.1 assign_resources, bus 0 link: 0
1426 12:07:20.631240 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1427 12:07:20.640587 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1428 12:07:20.647566 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1429 12:07:20.650957 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1430 12:07:20.653837
1431 12:07:20.660615 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1432 12:07:20.667107 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1433 12:07:20.674124 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1434 12:07:20.680900 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1435 12:07:20.686937 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1436 12:07:20.690325 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1437 12:07:20.700618 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1438 12:07:20.703847 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1439 12:07:20.707300 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1440 12:07:20.713970 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1441 12:07:20.717269 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1442 12:07:20.723871 LPC: Trying to open IO window from 800 size 1ff
1443 12:07:20.730560 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1444 12:07:20.740081 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1445 12:07:20.746691 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1446 12:07:20.753246 DOMAIN: 0000 assign_resources, bus 0 link: 0
1447 12:07:20.756773 Root Device assign_resources, bus 0 link: 0
1448 12:07:20.760208 Done setting resources.
1449 12:07:20.766848 Show resources in subtree (Root Device)...After assigning values.
1450 12:07:20.770370 Root Device child on link 0 DOMAIN: 0000
1451 12:07:20.773560 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1452 12:07:20.783559 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1453 12:07:20.793360 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1454 12:07:20.796686 PCI: 00:00.0
1455 12:07:20.806602 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1456 12:07:20.813265 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1457 12:07:20.823229 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1458 12:07:20.833359 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1459 12:07:20.842738 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1460 12:07:20.852711 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1461 12:07:20.859366 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1462 12:07:20.862579
1463 12:07:20.869241 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1464 12:07:20.879508 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1465 12:07:20.889534 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1466 12:07:20.899407 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1467 12:07:20.909107 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1468 12:07:20.915805 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1469 12:07:20.925796 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1470 12:07:20.935865 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1471 12:07:20.945907 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1472 12:07:20.956021 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1473 12:07:20.965599 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1474 12:07:20.972121 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1475 12:07:20.975492
1476 12:07:20.982262 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1477 12:07:20.985499 PCI: 00:02.0
1478 12:07:20.995452 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1479 12:07:21.005297 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1480 12:07:21.015140 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1481 12:07:21.018754 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1482 12:07:21.022042
1483 12:07:21.031897 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1484 12:07:21.031987 GENERIC: 0.0
1485 12:07:21.035375 PCI: 00:05.0
1486 12:07:21.044737 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1487 12:07:21.048255 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1488 12:07:21.051521 GENERIC: 0.0
1489 12:07:21.051609 PCI: 00:08.0
1490 12:07:21.061597 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1491 12:07:21.065001 PCI: 00:0a.0
1492 12:07:21.068517 PCI: 00:0d.0 child on link 0 USB0 port 0
1493 12:07:21.078256 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1494 12:07:21.084903 USB0 port 0 child on link 0 USB3 port 0
1495 12:07:21.085005 USB3 port 0
1496 12:07:21.088372 USB3 port 1
1497 12:07:21.088460 USB3 port 2
1498 12:07:21.091821 USB3 port 3
1499 12:07:21.094571 PCI: 00:14.0 child on link 0 USB0 port 0
1500 12:07:21.104661 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1501 12:07:21.111324 USB0 port 0 child on link 0 USB2 port 0
1502 12:07:21.111416 USB2 port 0
1503 12:07:21.114649 USB2 port 1
1504 12:07:21.114736 USB2 port 2
1505 12:07:21.118163 USB2 port 3
1506 12:07:21.118250 USB2 port 4
1507 12:07:21.121408 USB2 port 5
1508 12:07:21.121495 USB2 port 6
1509 12:07:21.124749 USB2 port 7
1510 12:07:21.124836 USB2 port 8
1511 12:07:21.128129 USB2 port 9
1512 12:07:21.128217 USB3 port 0
1513 12:07:21.131445
1514 12:07:21.131526 USB3 port 1
1515 12:07:21.134763 USB3 port 2
1516 12:07:21.134844 USB3 port 3
1517 12:07:21.138056 PCI: 00:14.2
1518 12:07:21.147417 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1519 12:07:21.157630 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1520 12:07:21.161067 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1521 12:07:21.171065 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1522 12:07:21.174383 GENERIC: 0.0
1523 12:07:21.177751 PCI: 00:15.0 child on link 0 I2C: 00:1a
1524 12:07:21.187832 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1525 12:07:21.191262 I2C: 00:1a
1526 12:07:21.191357 I2C: 00:31
1527 12:07:21.194466 I2C: 00:32
1528 12:07:21.197353 PCI: 00:15.1 child on link 0 I2C: 00:10
1529 12:07:21.207678 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1530 12:07:21.210896 I2C: 00:10
1531 12:07:21.210989 PCI: 00:15.2
1532 12:07:21.220931 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1533 12:07:21.223823 PCI: 00:15.3
1534 12:07:21.234126 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1535 12:07:21.234252 PCI: 00:16.0
1536 12:07:21.243618 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1537 12:07:21.247150 PCI: 00:19.0
1538 12:07:21.250366 PCI: 00:19.1 child on link 0 I2C: 00:15
1539 12:07:21.260293 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1540 12:07:21.263580 I2C: 00:15
1541 12:07:21.267128 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1542 12:07:21.276903 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1543 12:07:21.286995 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1544 12:07:21.290368
1545 12:07:21.300349 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1546 12:07:21.300444 GENERIC: 0.0
1547 12:07:21.303492 PCI: 01:00.0
1548 12:07:21.313197 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1549 12:07:21.323124 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1550 12:07:21.323221 PCI: 00:1e.0
1551 12:07:21.336369 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1552 12:07:21.339933 PCI: 00:1e.2 child on link 0 SPI: 00
1553 12:07:21.349912 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1554 12:07:21.353275 SPI: 00
1555 12:07:21.356730 PCI: 00:1e.3 child on link 0 SPI: 00
1556 12:07:21.366626 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1557 12:07:21.366717 SPI: 00
1558 12:07:21.373246 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1559 12:07:21.379720 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1560 12:07:21.383090 PNP: 0c09.0
1561 12:07:21.389463 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1562 12:07:21.396445 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1563 12:07:21.406092 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1564 12:07:21.412760 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1565 12:07:21.419228 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1566 12:07:21.419317 GENERIC: 0.0
1567 12:07:21.422533 GENERIC: 1.0
1568 12:07:21.422613 PCI: 00:1f.3
1569 12:07:21.432621 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1570 12:07:21.445873 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1571 12:07:21.445966 PCI: 00:1f.5
1572 12:07:21.456046 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1573 12:07:21.459355 CPU_CLUSTER: 0 child on link 0 APIC: 00
1574 12:07:21.462986 APIC: 00
1575 12:07:21.463066 APIC: 01
1576 12:07:21.466209 APIC: 05
1577 12:07:21.466287 APIC: 07
1578 12:07:21.466350 APIC: 02
1579 12:07:21.469531 APIC: 04
1580 12:07:21.469606 APIC: 06
1581 12:07:21.472321 APIC: 03
1582 12:07:21.472397 Done allocating resources.
1583 12:07:21.478862 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1584 12:07:21.486095 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1585 12:07:21.488684 Configure GPIOs for I2S audio on UP4.
1586 12:07:21.495953 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1587 12:07:21.499308 Enabling resources...
1588 12:07:21.502583 PCI: 00:00.0 subsystem <- 8086/9a12
1589 12:07:21.506018 PCI: 00:00.0 cmd <- 06
1590 12:07:21.509237 PCI: 00:02.0 subsystem <- 8086/9a40
1591 12:07:21.512576 PCI: 00:02.0 cmd <- 03
1592 12:07:21.515823 PCI: 00:04.0 subsystem <- 8086/9a03
1593 12:07:21.515906 PCI: 00:04.0 cmd <- 02
1594 12:07:21.522943 PCI: 00:05.0 subsystem <- 8086/9a19
1595 12:07:21.523027 PCI: 00:05.0 cmd <- 02
1596 12:07:21.526350 PCI: 00:08.0 subsystem <- 8086/9a11
1597 12:07:21.529167 PCI: 00:08.0 cmd <- 06
1598 12:07:21.533088 PCI: 00:0d.0 subsystem <- 8086/9a13
1599 12:07:21.535944 PCI: 00:0d.0 cmd <- 02
1600 12:07:21.539198 PCI: 00:14.0 subsystem <- 8086/a0ed
1601 12:07:21.542613 PCI: 00:14.0 cmd <- 02
1602 12:07:21.545928 PCI: 00:14.2 subsystem <- 8086/a0ef
1603 12:07:21.549175 PCI: 00:14.2 cmd <- 02
1604 12:07:21.552600 PCI: 00:14.3 subsystem <- 8086/a0f0
1605 12:07:21.556095 PCI: 00:14.3 cmd <- 02
1606 12:07:21.559681 PCI: 00:15.0 subsystem <- 8086/a0e8
1607 12:07:21.562187 PCI: 00:15.0 cmd <- 02
1608 12:07:21.566207 PCI: 00:15.1 subsystem <- 8086/a0e9
1609 12:07:21.566298 PCI: 00:15.1 cmd <- 02
1610 12:07:21.572734 PCI: 00:15.2 subsystem <- 8086/a0ea
1611 12:07:21.572832 PCI: 00:15.2 cmd <- 02
1612 12:07:21.576070 PCI: 00:15.3 subsystem <- 8086/a0eb
1613 12:07:21.579505 PCI: 00:15.3 cmd <- 02
1614 12:07:21.582081 PCI: 00:16.0 subsystem <- 8086/a0e0
1615 12:07:21.586139 PCI: 00:16.0 cmd <- 02
1616 12:07:21.588755 PCI: 00:19.1 subsystem <- 8086/a0c6
1617 12:07:21.592015 PCI: 00:19.1 cmd <- 02
1618 12:07:21.595347 PCI: 00:1d.0 bridge ctrl <- 0013
1619 12:07:21.598718 PCI: 00:1d.0 subsystem <- 8086/a0b0
1620 12:07:21.602261 PCI: 00:1d.0 cmd <- 06
1621 12:07:21.605219 PCI: 00:1e.0 subsystem <- 8086/a0a8
1622 12:07:21.609131 PCI: 00:1e.0 cmd <- 06
1623 12:07:21.612366 PCI: 00:1e.2 subsystem <- 8086/a0aa
1624 12:07:21.615049 PCI: 00:1e.2 cmd <- 06
1625 12:07:21.618892 PCI: 00:1e.3 subsystem <- 8086/a0ab
1626 12:07:21.618994 PCI: 00:1e.3 cmd <- 02
1627 12:07:21.625422 PCI: 00:1f.0 subsystem <- 8086/a087
1628 12:07:21.625547 PCI: 00:1f.0 cmd <- 407
1629 12:07:21.628867 PCI: 00:1f.3 subsystem <- 8086/a0c8
1630 12:07:21.632215 PCI: 00:1f.3 cmd <- 02
1631 12:07:21.635500 PCI: 00:1f.5 subsystem <- 8086/a0a4
1632 12:07:21.638716 PCI: 00:1f.5 cmd <- 406
1633 12:07:21.643323 PCI: 01:00.0 cmd <- 02
1634 12:07:21.647329 done.
1635 12:07:21.651289 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1636 12:07:21.654259 Initializing devices...
1637 12:07:21.657610 Root Device init
1638 12:07:21.660883 Chrome EC: Set SMI mask to 0x0000000000000000
1639 12:07:21.667403 Chrome EC: clear events_b mask to 0x0000000000000000
1640 12:07:21.673882 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1641 12:07:21.677322 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1642 12:07:21.683973 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1643 12:07:21.690462 Chrome EC: Set WAKE mask to 0x0000000000000000
1644 12:07:21.693913 fw_config match found: DB_USB=USB3_ACTIVE
1645 12:07:21.700612 Configure Right Type-C port orientation for retimer
1646 12:07:21.704014 Root Device init finished in 43 msecs
1647 12:07:21.706809 PCI: 00:00.0 init
1648 12:07:21.710460 CPU TDP = 9 Watts
1649 12:07:21.710544 CPU PL1 = 9 Watts
1650 12:07:21.713661 CPU PL2 = 40 Watts
1651 12:07:21.716991 CPU PL4 = 83 Watts
1652 12:07:21.720221 PCI: 00:00.0 init finished in 8 msecs
1653 12:07:21.720305 PCI: 00:02.0 init
1654 12:07:21.723554 GMA: Found VBT in CBFS
1655 12:07:21.726808 GMA: Found valid VBT in CBFS
1656 12:07:21.733579 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1657 12:07:21.740418 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1658 12:07:21.743491 PCI: 00:02.0 init finished in 18 msecs
1659 12:07:21.746847 PCI: 00:05.0 init
1660 12:07:21.750337 PCI: 00:05.0 init finished in 0 msecs
1661 12:07:21.753546 PCI: 00:08.0 init
1662 12:07:21.756963 PCI: 00:08.0 init finished in 0 msecs
1663 12:07:21.760432 PCI: 00:14.0 init
1664 12:07:21.763710 PCI: 00:14.0 init finished in 0 msecs
1665 12:07:21.767058 PCI: 00:14.2 init
1666 12:07:21.770396 PCI: 00:14.2 init finished in 0 msecs
1667 12:07:21.770486 PCI: 00:15.0 init
1668 12:07:21.773533 I2C bus 0 version 0x3230302a
1669 12:07:21.776805 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1670 12:07:21.783608 PCI: 00:15.0 init finished in 6 msecs
1671 12:07:21.783702 PCI: 00:15.1 init
1672 12:07:21.786999 I2C bus 1 version 0x3230302a
1673 12:07:21.790252 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1674 12:07:21.793568 PCI: 00:15.1 init finished in 6 msecs
1675 12:07:21.796890 PCI: 00:15.2 init
1676 12:07:21.800166 I2C bus 2 version 0x3230302a
1677 12:07:21.803590 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1678 12:07:21.807096 PCI: 00:15.2 init finished in 6 msecs
1679 12:07:21.810094 PCI: 00:15.3 init
1680 12:07:21.813546 I2C bus 3 version 0x3230302a
1681 12:07:21.816694 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1682 12:07:21.820048 PCI: 00:15.3 init finished in 6 msecs
1683 12:07:21.823211 PCI: 00:16.0 init
1684 12:07:21.826419 PCI: 00:16.0 init finished in 0 msecs
1685 12:07:21.829889 PCI: 00:19.1 init
1686 12:07:21.829977 I2C bus 5 version 0x3230302a
1687 12:07:21.836134 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1688 12:07:21.839981 PCI: 00:19.1 init finished in 6 msecs
1689 12:07:21.840069 PCI: 00:1d.0 init
1690 12:07:21.843413 Initializing PCH PCIe bridge.
1691 12:07:21.846820 PCI: 00:1d.0 init finished in 3 msecs
1692 12:07:21.850598 PCI: 00:1f.0 init
1693 12:07:21.854092 IOAPIC: Initializing IOAPIC at 0xfec00000
1694 12:07:21.860683 IOAPIC: Bootstrap Processor Local APIC = 0x00
1695 12:07:21.860784 IOAPIC: ID = 0x02
1696 12:07:21.863968 IOAPIC: Dumping registers
1697 12:07:21.867400 reg 0x0000: 0x02000000
1698 12:07:21.870615 reg 0x0001: 0x00770020
1699 12:07:21.870714 reg 0x0002: 0x00000000
1700 12:07:21.877113 PCI: 00:1f.0 init finished in 21 msecs
1701 12:07:21.877205 PCI: 00:1f.2 init
1702 12:07:21.880587 Disabling ACPI via APMC.
1703 12:07:21.885336 APMC done.
1704 12:07:21.888534 PCI: 00:1f.2 init finished in 6 msecs
1705 12:07:21.900140 PCI: 01:00.0 init
1706 12:07:21.903582 PCI: 01:00.0 init finished in 0 msecs
1707 12:07:21.906864 PNP: 0c09.0 init
1708 12:07:21.913691 Google Chrome EC uptime: 8.302 seconds
1709 12:07:21.916770 Google Chrome AP resets since EC boot: 1
1710 12:07:21.920743 Google Chrome most recent AP reset causes:
1711 12:07:21.923602 0.453: 32775 shutdown: entering G3
1712 12:07:21.930123 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1713 12:07:21.933695 PNP: 0c09.0 init finished in 24 msecs
1714 12:07:21.940368 Devices initialized
1715 12:07:21.943628 Show all devs... After init.
1716 12:07:21.946945 Root Device: enabled 1
1717 12:07:21.947033 DOMAIN: 0000: enabled 1
1718 12:07:21.950423 CPU_CLUSTER: 0: enabled 1
1719 12:07:21.953694 PCI: 00:00.0: enabled 1
1720 12:07:21.956971 PCI: 00:02.0: enabled 1
1721 12:07:21.957057 PCI: 00:04.0: enabled 1
1722 12:07:21.960336 PCI: 00:05.0: enabled 1
1723 12:07:21.963132 PCI: 00:06.0: enabled 0
1724 12:07:21.966572 PCI: 00:07.0: enabled 0
1725 12:07:21.966657 PCI: 00:07.1: enabled 0
1726 12:07:21.969879 PCI: 00:07.2: enabled 0
1727 12:07:21.973360 PCI: 00:07.3: enabled 0
1728 12:07:21.976625 PCI: 00:08.0: enabled 1
1729 12:07:21.976719 PCI: 00:09.0: enabled 0
1730 12:07:21.979905 PCI: 00:0a.0: enabled 0
1731 12:07:21.983255 PCI: 00:0d.0: enabled 1
1732 12:07:21.983342 PCI: 00:0d.1: enabled 0
1733 12:07:21.986807
1734 12:07:21.986893 PCI: 00:0d.2: enabled 0
1735 12:07:21.989979 PCI: 00:0d.3: enabled 0
1736 12:07:21.993495 PCI: 00:0e.0: enabled 0
1737 12:07:21.993581 PCI: 00:10.2: enabled 1
1738 12:07:21.996566 PCI: 00:10.6: enabled 0
1739 12:07:22.000156 PCI: 00:10.7: enabled 0
1740 12:07:22.003144 PCI: 00:12.0: enabled 0
1741 12:07:22.003228 PCI: 00:12.6: enabled 0
1742 12:07:22.006386 PCI: 00:13.0: enabled 0
1743 12:07:22.009905 PCI: 00:14.0: enabled 1
1744 12:07:22.013249 PCI: 00:14.1: enabled 0
1745 12:07:22.013333 PCI: 00:14.2: enabled 1
1746 12:07:22.016118 PCI: 00:14.3: enabled 1
1747 12:07:22.019352 PCI: 00:15.0: enabled 1
1748 12:07:22.022889 PCI: 00:15.1: enabled 1
1749 12:07:22.022968 PCI: 00:15.2: enabled 1
1750 12:07:22.025986 PCI: 00:15.3: enabled 1
1751 12:07:22.029719 PCI: 00:16.0: enabled 1
1752 12:07:22.033086 PCI: 00:16.1: enabled 0
1753 12:07:22.033170 PCI: 00:16.2: enabled 0
1754 12:07:22.036615 PCI: 00:16.3: enabled 0
1755 12:07:22.039467 PCI: 00:16.4: enabled 0
1756 12:07:22.039551 PCI: 00:16.5: enabled 0
1757 12:07:22.042822 PCI: 00:17.0: enabled 0
1758 12:07:22.045900 PCI: 00:19.0: enabled 0
1759 12:07:22.049357 PCI: 00:19.1: enabled 1
1760 12:07:22.049449 PCI: 00:19.2: enabled 0
1761 12:07:22.052728 PCI: 00:1c.0: enabled 1
1762 12:07:22.055897 PCI: 00:1c.1: enabled 0
1763 12:07:22.059361 PCI: 00:1c.2: enabled 0
1764 12:07:22.059445 PCI: 00:1c.3: enabled 0
1765 12:07:22.062744 PCI: 00:1c.4: enabled 0
1766 12:07:22.066009 PCI: 00:1c.5: enabled 0
1767 12:07:22.069482 PCI: 00:1c.6: enabled 1
1768 12:07:22.069573 PCI: 00:1c.7: enabled 0
1769 12:07:22.072770 PCI: 00:1d.0: enabled 1
1770 12:07:22.076241 PCI: 00:1d.1: enabled 0
1771 12:07:22.079011 PCI: 00:1d.2: enabled 1
1772 12:07:22.079097 PCI: 00:1d.3: enabled 0
1773 12:07:22.083062 PCI: 00:1e.0: enabled 1
1774 12:07:22.086377 PCI: 00:1e.1: enabled 0
1775 12:07:22.086472 PCI: 00:1e.2: enabled 1
1776 12:07:22.088985 PCI: 00:1e.3: enabled 1
1777 12:07:22.092367 PCI: 00:1f.0: enabled 1
1778 12:07:22.095649 PCI: 00:1f.1: enabled 0
1779 12:07:22.095736 PCI: 00:1f.2: enabled 1
1780 12:07:22.099587 PCI: 00:1f.3: enabled 1
1781 12:07:22.102803 PCI: 00:1f.4: enabled 0
1782 12:07:22.106223 PCI: 00:1f.5: enabled 1
1783 12:07:22.106309 PCI: 00:1f.6: enabled 0
1784 12:07:22.108838 PCI: 00:1f.7: enabled 0
1785 12:07:22.112362 APIC: 00: enabled 1
1786 12:07:22.112448 GENERIC: 0.0: enabled 1
1787 12:07:22.115607 GENERIC: 0.0: enabled 1
1788 12:07:22.118928 GENERIC: 1.0: enabled 1
1789 12:07:22.122221 GENERIC: 0.0: enabled 1
1790 12:07:22.122306 GENERIC: 1.0: enabled 1
1791 12:07:22.125537 USB0 port 0: enabled 1
1792 12:07:22.128863 GENERIC: 0.0: enabled 1
1793 12:07:22.131955 USB0 port 0: enabled 1
1794 12:07:22.132040 GENERIC: 0.0: enabled 1
1795 12:07:22.135219 I2C: 00:1a: enabled 1
1796 12:07:22.138557 I2C: 00:31: enabled 1
1797 12:07:22.138643 I2C: 00:32: enabled 1
1798 12:07:22.142015 I2C: 00:10: enabled 1
1799 12:07:22.145458 I2C: 00:15: enabled 1
1800 12:07:22.145548 GENERIC: 0.0: enabled 0
1801 12:07:22.148950 GENERIC: 1.0: enabled 0
1802 12:07:22.152234 GENERIC: 0.0: enabled 1
1803 12:07:22.155513 SPI: 00: enabled 1
1804 12:07:22.155618 SPI: 00: enabled 1
1805 12:07:22.158848 PNP: 0c09.0: enabled 1
1806 12:07:22.162397 GENERIC: 0.0: enabled 1
1807 12:07:22.162475 USB3 port 0: enabled 1
1808 12:07:22.165651 USB3 port 1: enabled 1
1809 12:07:22.168993 USB3 port 2: enabled 0
1810 12:07:22.169069 USB3 port 3: enabled 0
1811 12:07:22.171746 USB2 port 0: enabled 0
1812 12:07:22.175119 USB2 port 1: enabled 1
1813 12:07:22.175204 USB2 port 2: enabled 1
1814 12:07:22.178532
1815 12:07:22.178628 USB2 port 3: enabled 0
1816 12:07:22.181855 USB2 port 4: enabled 1
1817 12:07:22.185340 USB2 port 5: enabled 0
1818 12:07:22.185435 USB2 port 6: enabled 0
1819 12:07:22.188757 USB2 port 7: enabled 0
1820 12:07:22.191830 USB2 port 8: enabled 0
1821 12:07:22.191915 USB2 port 9: enabled 0
1822 12:07:22.195168 USB3 port 0: enabled 0
1823 12:07:22.198302 USB3 port 1: enabled 1
1824 12:07:22.201676 USB3 port 2: enabled 0
1825 12:07:22.201763 USB3 port 3: enabled 0
1826 12:07:22.205033 GENERIC: 0.0: enabled 1
1827 12:07:22.208322 GENERIC: 1.0: enabled 1
1828 12:07:22.208408 APIC: 01: enabled 1
1829 12:07:22.211671 APIC: 05: enabled 1
1830 12:07:22.215197 APIC: 07: enabled 1
1831 12:07:22.215283 APIC: 02: enabled 1
1832 12:07:22.218428 APIC: 04: enabled 1
1833 12:07:22.218514 APIC: 06: enabled 1
1834 12:07:22.221357 APIC: 03: enabled 1
1835 12:07:22.225255 PCI: 01:00.0: enabled 1
1836 12:07:22.228455 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1837 12:07:22.231561
1838 12:07:22.234786 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1839 12:07:22.238137 ELOG: NV offset 0xf30000 size 0x1000
1840 12:07:22.245526 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1841 12:07:22.252192 ELOG: Event(17) added with size 13 at 2023-01-24 12:07:22 UTC
1842 12:07:22.258242 ELOG: Event(92) added with size 9 at 2023-01-24 12:07:22 UTC
1843 12:07:22.265039 ELOG: Event(93) added with size 9 at 2023-01-24 12:07:22 UTC
1844 12:07:22.271800 ELOG: Event(9E) added with size 10 at 2023-01-24 12:07:22 UTC
1845 12:07:22.278532 ELOG: Event(9F) added with size 14 at 2023-01-24 12:07:22 UTC
1846 12:07:22.285108 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1847 12:07:22.288541 ELOG: Event(A1) added with size 10 at 2023-01-24 12:07:22 UTC
1848 12:07:22.291854
1849 12:07:22.298498 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1850 12:07:22.304804 ELOG: Event(A0) added with size 9 at 2023-01-24 12:07:22 UTC
1851 12:07:22.308243 elog_add_boot_reason: Logged dev mode boot
1852 12:07:22.315097 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1853 12:07:22.315182 Finalize devices...
1854 12:07:22.318340 Devices finalized
1855 12:07:22.324714 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1856 12:07:22.328049 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1857 12:07:22.334566 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1858 12:07:22.337915 ME: HFSTS1 : 0x80030055
1859 12:07:22.344552 ME: HFSTS2 : 0x30280116
1860 12:07:22.348085 ME: HFSTS3 : 0x00000050
1861 12:07:22.351515 ME: HFSTS4 : 0x00004000
1862 12:07:22.358039 ME: HFSTS5 : 0x00000000
1863 12:07:22.360796 ME: HFSTS6 : 0x40400006
1864 12:07:22.364791 ME: Manufacturing Mode : YES
1865 12:07:22.367637 ME: SPI Protection Mode Enabled : NO
1866 12:07:22.371033 ME: FW Partition Table : OK
1867 12:07:22.374356
1868 12:07:22.377657 ME: Bringup Loader Failure : NO
1869 12:07:22.381006 ME: Firmware Init Complete : NO
1870 12:07:22.384359 ME: Boot Options Present : NO
1871 12:07:22.387936 ME: Update In Progress : NO
1872 12:07:22.391138 ME: D0i3 Support : YES
1873 12:07:22.394088 ME: Low Power State Enabled : NO
1874 12:07:22.397992 ME: CPU Replaced : YES
1875 12:07:22.404501 ME: CPU Replacement Valid : YES
1876 12:07:22.407740 ME: Current Working State : 5
1877 12:07:22.410994 ME: Current Operation State : 1
1878 12:07:22.414199 ME: Current Operation Mode : 3
1879 12:07:22.417623 ME: Error Code : 0
1880 12:07:22.420956 ME: Enhanced Debug Mode : NO
1881 12:07:22.424155 ME: CPU Debug Disabled : YES
1882 12:07:22.427471 ME: TXT Support : NO
1883 12:07:22.433958 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1884 12:07:22.440526 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1885 12:07:22.443974 CBFS: 'fallback/slic' not found.
1886 12:07:22.450584 ACPI: Writing ACPI tables at 76b01000.
1887 12:07:22.450672 ACPI: * FACS
1888 12:07:22.454240 ACPI: * DSDT
1889 12:07:22.457292 Ramoops buffer: 0x100000@0x76a00000.
1890 12:07:22.460565 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1891 12:07:22.467327 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1892 12:07:22.470690 Google Chrome EC: version:
1893 12:07:22.473958 ro: voema_v2.0.10114-a447f03e46
1894 12:07:22.477314 rw: voema_v2.0.10132-7b2059e3bc
1895 12:07:22.477409 running image: 2
1896 12:07:22.483492 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1897 12:07:22.488023 ACPI: * FADT
1898 12:07:22.488105 SCI is IRQ9
1899 12:07:22.491670 ACPI: added table 1/32, length now 40
1900 12:07:22.494945
1901 12:07:22.495026 ACPI: * SSDT
1902 12:07:22.498329 Found 1 CPU(s) with 8 core(s) each.
1903 12:07:22.504744 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1904 12:07:22.508156 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1905 12:07:22.511930 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1906 12:07:22.515205 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1907 12:07:22.521409 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1908 12:07:22.527954 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1909 12:07:22.531550 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1910 12:07:22.538423 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1911 12:07:22.544835 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1912 12:07:22.548106 \_SB.PCI0.RP09: Added StorageD3Enable property
1913 12:07:22.551614 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1914 12:07:22.558187 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1915 12:07:22.564823 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1916 12:07:22.568230 PS2K: Passing 80 keymaps to kernel
1917 12:07:22.574414 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1918 12:07:22.581228 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1919 12:07:22.587779 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1920 12:07:22.594005 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1921 12:07:22.600663 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1922 12:07:22.607812 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1923 12:07:22.614047 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1924 12:07:22.620521 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1925 12:07:22.623920 ACPI: added table 2/32, length now 44
1926 12:07:22.627353 ACPI: * MCFG
1927 12:07:22.630745 ACPI: added table 3/32, length now 48
1928 12:07:22.630833 ACPI: * TPM2
1929 12:07:22.634029 TPM2 log created at 0x769f0000
1930 12:07:22.637265 ACPI: added table 4/32, length now 52
1931 12:07:22.640763 ACPI: * MADT
1932 12:07:22.640848 SCI is IRQ9
1933 12:07:22.643881 ACPI: added table 5/32, length now 56
1934 12:07:22.647349 current = 76b09850
1935 12:07:22.647429 ACPI: * DMAR
1936 12:07:22.654047 ACPI: added table 6/32, length now 60
1937 12:07:22.657308 ACPI: added table 7/32, length now 64
1938 12:07:22.657394 ACPI: * HPET
1939 12:07:22.660622 ACPI: added table 8/32, length now 68
1940 12:07:22.663886 ACPI: done.
1941 12:07:22.667326 ACPI tables: 35216 bytes.
1942 12:07:22.667407 smbios_write_tables: 769ef000
1943 12:07:22.670673
1944 12:07:22.674324 EC returned error result code 3
1945 12:07:22.676951 Couldn't obtain OEM name from CBI
1946 12:07:22.680296 Create SMBIOS type 16
1947 12:07:22.683785 Create SMBIOS type 17
1948 12:07:22.683873 GENERIC: 0.0 (WIFI Device)
1949 12:07:22.687025 SMBIOS tables: 1734 bytes.
1950 12:07:22.690334 Writing table forward entry at 0x00000500
1951 12:07:22.697198 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1952 12:07:22.700464 Writing coreboot table at 0x76b25000
1953 12:07:22.706919 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1954 12:07:22.713483 1. 0000000000001000-000000000009ffff: RAM
1955 12:07:22.716735 2. 00000000000a0000-00000000000fffff: RESERVED
1956 12:07:22.720812 3. 0000000000100000-00000000769eefff: RAM
1957 12:07:22.726897 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1958 12:07:22.733725 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1959 12:07:22.736888 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1960 12:07:22.743503 7. 0000000077000000-000000007fbfffff: RESERVED
1961 12:07:22.747237 8. 00000000c0000000-00000000cfffffff: RESERVED
1962 12:07:22.753376 9. 00000000f8000000-00000000f9ffffff: RESERVED
1963 12:07:22.756963 10. 00000000fb000000-00000000fb000fff: RESERVED
1964 12:07:22.763165 11. 00000000fe000000-00000000fe00ffff: RESERVED
1965 12:07:22.766509 12. 00000000fed80000-00000000fed87fff: RESERVED
1966 12:07:22.769924 13. 00000000fed90000-00000000fed92fff: RESERVED
1967 12:07:22.776790 14. 00000000feda0000-00000000feda1fff: RESERVED
1968 12:07:22.780302 15. 00000000fedc0000-00000000feddffff: RESERVED
1969 12:07:22.786344 16. 0000000100000000-00000004803fffff: RAM
1970 12:07:22.786443 Passing 4 GPIOs to payload:
1971 12:07:22.793205 NAME | PORT | POLARITY | VALUE
1972 12:07:22.799882 lid | undefined | high | high
1973 12:07:22.803330 power | undefined | high | low
1974 12:07:22.809456 oprom | undefined | high | low
1975 12:07:22.812810 EC in RW | 0x000000e5 | high | high
1976 12:07:22.819524 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1977 12:07:22.822914 coreboot table: 1576 bytes.
1978 12:07:22.826305 IMD ROOT 0. 0x76fff000 0x00001000
1979 12:07:22.829579 IMD SMALL 1. 0x76ffe000 0x00001000
1980 12:07:22.836512 FSP MEMORY 2. 0x76c4e000 0x003b0000
1981 12:07:22.840116 VPD 3. 0x76c4d000 0x00000367
1982 12:07:22.842769 RO MCACHE 4. 0x76c4c000 0x00000fdc
1983 12:07:22.846582 CONSOLE 5. 0x76c2c000 0x00020000
1984 12:07:22.849543 FMAP 6. 0x76c2b000 0x00000578
1985 12:07:22.852874 TIME STAMP 7. 0x76c2a000 0x00000910
1986 12:07:22.856071 VBOOT WORK 8. 0x76c16000 0x00014000
1987 12:07:22.859454 ROMSTG STCK 9. 0x76c15000 0x00001000
1988 12:07:22.866179 AFTER CAR 10. 0x76c0a000 0x0000b000
1989 12:07:22.869476 RAMSTAGE 11. 0x76b97000 0x00073000
1990 12:07:22.872757 REFCODE 12. 0x76b42000 0x00055000
1991 12:07:22.876193 SMM BACKUP 13. 0x76b32000 0x00010000
1992 12:07:22.879604 4f444749 14. 0x76b30000 0x00002000
1993 12:07:22.882334 EXT VBT15. 0x76b2d000 0x0000219f
1994 12:07:22.885566 COREBOOT 16. 0x76b25000 0x00008000
1995 12:07:22.888829 ACPI 17. 0x76b01000 0x00024000
1996 12:07:22.895740 ACPI GNVS 18. 0x76b00000 0x00001000
1997 12:07:22.898843 RAMOOPS 19. 0x76a00000 0x00100000
1998 12:07:22.902315 TPM2 TCGLOG20. 0x769f0000 0x00010000
1999 12:07:22.905866 SMBIOS 21. 0x769ef000 0x00000800
2000 12:07:22.905975 IMD small region:
2001 12:07:22.912451 IMD ROOT 0. 0x76ffec00 0x00000400
2002 12:07:22.915625 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2003 12:07:22.919130 POWER STATE 2. 0x76ffeb80 0x00000044
2004 12:07:22.922354 ROMSTAGE 3. 0x76ffeb60 0x00000004
2005 12:07:22.925927 MEM INFO 4. 0x76ffe980 0x000001e0
2006 12:07:22.931921 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
2007 12:07:22.935437 MTRR: Physical address space:
2008 12:07:22.942016 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2009 12:07:22.948499 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2010 12:07:22.955612 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2011 12:07:22.962262 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2012 12:07:22.965947 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2013 12:07:22.971857 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2014 12:07:22.978568 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
2015 12:07:22.982137 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 12:07:22.985376
2017 12:07:22.988347 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 12:07:22.992171 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 12:07:22.995613 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 12:07:22.998140 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 12:07:23.005020 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 12:07:23.008403 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 12:07:23.011812 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 12:07:23.015048 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 12:07:23.021895 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 12:07:23.025418 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 12:07:23.028125 call enable_fixed_mtrr()
2028 12:07:23.031360 CPU physical address size: 39 bits
2029 12:07:23.038315 MTRR: default type WB/UC MTRR counts: 6/7.
2030 12:07:23.041909 MTRR: WB selected as default type.
2031 12:07:23.048371 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2032 12:07:23.051778 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2033 12:07:23.058376 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2034 12:07:23.064714 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2035 12:07:23.071628 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2036 12:07:23.078172 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2037 12:07:23.085152 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 12:07:23.088341 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 12:07:23.091295 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 12:07:23.094600 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 12:07:23.101429 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 12:07:23.105002 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 12:07:23.108329 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 12:07:23.111629 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 12:07:23.118219 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 12:07:23.121652 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 12:07:23.124875 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 12:07:23.124960
2049 12:07:23.128391 MTRR check
2050 12:07:23.131774 call enable_fixed_mtrr()
2051 12:07:23.131855 Fixed MTRRs : Enabled
2052 12:07:23.135321 Variable MTRRs: Enabled
2053 12:07:23.135399
2054 12:07:23.138655 CPU physical address size: 39 bits
2055 12:07:23.146422 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
2056 12:07:23.149531 MTRR: Fixed MSR 0x250 0x0606060606060606
2057 12:07:23.155865 MTRR: Fixed MSR 0x250 0x0606060606060606
2058 12:07:23.159237 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 12:07:23.162969 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 12:07:23.166370 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 12:07:23.172873 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 12:07:23.176269 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 12:07:23.179749 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 12:07:23.182405 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 12:07:23.189127 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 12:07:23.192654 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 12:07:23.195928 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 12:07:23.203228 MTRR: Fixed MSR 0x258 0x0606060606060606
2069 12:07:23.203317 call enable_fixed_mtrr()
2070 12:07:23.210042 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 12:07:23.213176 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 12:07:23.216670 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 12:07:23.219744 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 12:07:23.226617 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 12:07:23.229869 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 12:07:23.233231 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 12:07:23.236036 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 12:07:23.243025 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 12:07:23.246468 CPU physical address size: 39 bits
2080 12:07:23.250439 call enable_fixed_mtrr()
2081 12:07:23.253747 MTRR: Fixed MSR 0x250 0x0606060606060606
2082 12:07:23.260560 MTRR: Fixed MSR 0x250 0x0606060606060606
2083 12:07:23.263766 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 12:07:23.266807 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 12:07:23.270342 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 12:07:23.277454 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 12:07:23.280600 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 12:07:23.283679 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 12:07:23.287048 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 12:07:23.293671 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 12:07:23.297168 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 12:07:23.299783 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 12:07:23.307164 MTRR: Fixed MSR 0x258 0x0606060606060606
2094 12:07:23.307278 call enable_fixed_mtrr()
2095 12:07:23.313537 MTRR: Fixed MSR 0x259 0x0000000000000000
2096 12:07:23.317249 MTRR: Fixed MSR 0x268 0x0606060606060606
2097 12:07:23.320370 MTRR: Fixed MSR 0x269 0x0606060606060606
2098 12:07:23.323819 MTRR: Fixed MSR 0x26a 0x0606060606060606
2099 12:07:23.329932 MTRR: Fixed MSR 0x26b 0x0606060606060606
2100 12:07:23.333208 MTRR: Fixed MSR 0x26c 0x0606060606060606
2101 12:07:23.336737 MTRR: Fixed MSR 0x26d 0x0606060606060606
2102 12:07:23.339977 MTRR: Fixed MSR 0x26e 0x0606060606060606
2103 12:07:23.346863 MTRR: Fixed MSR 0x26f 0x0606060606060606
2104 12:07:23.349710 CPU physical address size: 39 bits
2105 12:07:23.354583 call enable_fixed_mtrr()
2106 12:07:23.357884 MTRR: Fixed MSR 0x250 0x0606060606060606
2107 12:07:23.364411 MTRR: Fixed MSR 0x250 0x0606060606060606
2108 12:07:23.367755 MTRR: Fixed MSR 0x258 0x0606060606060606
2109 12:07:23.371115 MTRR: Fixed MSR 0x259 0x0000000000000000
2110 12:07:23.374423 MTRR: Fixed MSR 0x268 0x0606060606060606
2111 12:07:23.380619 MTRR: Fixed MSR 0x269 0x0606060606060606
2112 12:07:23.384170 MTRR: Fixed MSR 0x26a 0x0606060606060606
2113 12:07:23.387439 MTRR: Fixed MSR 0x26b 0x0606060606060606
2114 12:07:23.390972 MTRR: Fixed MSR 0x26c 0x0606060606060606
2115 12:07:23.396988 MTRR: Fixed MSR 0x26d 0x0606060606060606
2116 12:07:23.400608 MTRR: Fixed MSR 0x26e 0x0606060606060606
2117 12:07:23.403975 MTRR: Fixed MSR 0x26f 0x0606060606060606
2118 12:07:23.410902 MTRR: Fixed MSR 0x258 0x0606060606060606
2119 12:07:23.410992 call enable_fixed_mtrr()
2120 12:07:23.417568 MTRR: Fixed MSR 0x259 0x0000000000000000
2121 12:07:23.420715 MTRR: Fixed MSR 0x268 0x0606060606060606
2122 12:07:23.424335 MTRR: Fixed MSR 0x269 0x0606060606060606
2123 12:07:23.427364 MTRR: Fixed MSR 0x26a 0x0606060606060606
2124 12:07:23.434233 MTRR: Fixed MSR 0x26b 0x0606060606060606
2125 12:07:23.437112 MTRR: Fixed MSR 0x26c 0x0606060606060606
2126 12:07:23.440681 MTRR: Fixed MSR 0x26d 0x0606060606060606
2127 12:07:23.444205 MTRR: Fixed MSR 0x26e 0x0606060606060606
2128 12:07:23.450170 MTRR: Fixed MSR 0x26f 0x0606060606060606
2129 12:07:23.453604 CPU physical address size: 39 bits
2130 12:07:23.458403 call enable_fixed_mtrr()
2131 12:07:23.462841 Checking cr50 for pending updates
2132 12:07:23.466267 CPU physical address size: 39 bits
2133 12:07:23.470447 CPU physical address size: 39 bits
2134 12:07:23.474334 Reading cr50 TPM mode
2135 12:07:23.474426 CPU physical address size: 39 bits
2136 12:07:23.481612 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2137 12:07:23.492077 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2138 12:07:23.495442 Checking segment from ROM address 0xffc02b38
2139 12:07:23.498150 Checking segment from ROM address 0xffc02b54
2140 12:07:23.504998 Loading segment from ROM address 0xffc02b38
2141 12:07:23.505126 code (compression=0)
2142 12:07:23.515377 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2143 12:07:23.521492 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2144 12:07:23.524676
2145 12:07:23.524794 it's not compressed!
2146 12:07:23.665817 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2147 12:07:23.672449 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2148 12:07:23.678824 Loading segment from ROM address 0xffc02b54
2149 12:07:23.682693 Entry Point 0x30000000
2150 12:07:23.682784 Loaded segments
2151 12:07:23.689159 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2152 12:07:23.734360 Finalizing chipset.
2153 12:07:23.737828 Finalizing SMM.
2154 12:07:23.737925 APMC done.
2155 12:07:23.744059 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2156 12:07:23.747636 mp_park_aps done after 0 msecs.
2157 12:07:23.750327 Jumping to boot code at 0x30000000(0x76b25000)
2158 12:07:23.760740 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2159 12:07:23.760835
2160 12:07:23.760925
2161 12:07:23.761007
2162 12:07:23.764026 Starting depthcharge on Voema...
2163 12:07:23.764110
2164 12:07:23.764477 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2165 12:07:23.764593 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2166 12:07:23.764690 Setting prompt string to ['volteer:']
2167 12:07:23.764787 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2168 12:07:23.773986 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2169 12:07:23.774088
2170 12:07:23.780779 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2171 12:07:23.780924
2172 12:07:23.786751 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2173 12:07:23.786892
2174 12:07:23.790203 Failed to find eMMC card reader
2175 12:07:23.790322
2176 12:07:23.793510 Wipe memory regions:
2177 12:07:23.793625
2178 12:07:23.796882 [0x00000000001000, 0x000000000a0000)
2179 12:07:23.796993
2180 12:07:23.800353 [0x00000000100000, 0x00000030000000)
2181 12:07:23.800463
2182 12:07:23.837581 [0x00000032662db0, 0x000000769ef000)
2183 12:07:23.837725
2184 12:07:23.888172 [0x00000100000000, 0x00000480400000)
2185 12:07:23.888328
2186 12:07:24.497905 ec_init: CrosEC protocol v3 supported (256, 256)
2187 12:07:24.498046
2188 12:07:24.929488 R8152: Initializing
2189 12:07:24.929628
2190 12:07:24.932792 Version 6 (ocp_data = 5c30)
2191 12:07:24.932877
2192 12:07:24.936087 R8152: Done initializing
2193 12:07:24.936170
2194 12:07:24.939090 Adding net device
2195 12:07:24.939172
2196 12:07:25.243382 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2197 12:07:25.243548
2198 12:07:25.243652
2199 12:07:25.243720
2200 12:07:25.247155 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2202 12:07:25.347690 volteer: tftpboot 192.168.201.1 8853693/tftp-deploy-4v4hvemb/kernel/bzImage 8853693/tftp-deploy-4v4hvemb/kernel/cmdline 8853693/tftp-deploy-4v4hvemb/ramdisk/ramdisk.cpio.gz
2203 12:07:25.347890 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2204 12:07:25.348013 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2205 12:07:25.351844 tftpboot 192.168.201.1 8853693/tftp-deploy-4v4hvemb/kernel/bzImoy-4v4hvemb/kernel/cmdline 8853693/tftp-deploy-4v4hvemb/ramdisk/ramdisk.cpio.gz
2206 12:07:25.351952
2207 12:07:25.352026 Waiting for link
2208 12:07:25.352091
2209 12:07:25.555176 done.
2210 12:07:25.555318
2211 12:07:25.555403 MAC: 00:24:32:30:7e:22
2212 12:07:25.555470
2213 12:07:25.558609 Sending DHCP discover... done.
2214 12:07:25.558697
2215 12:07:25.561812 Waiting for reply... done.
2216 12:07:25.561897
2217 12:07:25.565073 Sending DHCP request... done.
2218 12:07:25.565155
2219 12:07:25.568345 Waiting for reply... done.
2220 12:07:25.568441
2221 12:07:25.571687 My ip is 192.168.201.21
2222 12:07:25.571772
2223 12:07:25.575168 The DHCP server ip is 192.168.201.1
2224 12:07:25.575274
2225 12:07:25.578566 TFTP server IP predefined by user: 192.168.201.1
2226 12:07:25.578648
2227 12:07:25.588960 Bootfile predefined by user: 8853693/tftp-deploy-4v4hvemb/kernel/bzImage
2228 12:07:25.589079
2229 12:07:25.591527 Sending tftp read request... done.
2230 12:07:25.591619
2231 12:07:25.595593 Waiting for the transfer...
2232 12:07:25.595694
2233 12:07:26.110274 00000000 ################################################################
2234 12:07:26.110424
2235 12:07:26.620584 00080000 ################################################################
2236 12:07:26.620743
2237 12:07:27.129957 00100000 ################################################################
2238 12:07:27.130103
2239 12:07:27.645398 00180000 ################################################################
2240 12:07:27.645540
2241 12:07:28.156782 00200000 ################################################################
2242 12:07:28.156922
2243 12:07:28.669754 00280000 ################################################################
2244 12:07:28.669905
2245 12:07:29.178909 00300000 ################################################################
2246 12:07:29.179045
2247 12:07:29.692314 00380000 ################################################################
2248 12:07:29.692453
2249 12:07:30.207609 00400000 ################################################################
2250 12:07:30.207765
2251 12:07:30.719895 00480000 ################################################################
2252 12:07:30.720049
2253 12:07:31.237298 00500000 ################################################################
2254 12:07:31.237485
2255 12:07:31.755710 00580000 ################################################################
2256 12:07:31.755869
2257 12:07:32.274232 00600000 ################################################################
2258 12:07:32.274372
2259 12:07:32.804183 00680000 ################################################################
2260 12:07:32.804329
2261 12:07:33.341465 00700000 ################################################################
2262 12:07:33.341652
2263 12:07:33.863730 00780000 ################################################################
2264 12:07:33.863873
2265 12:07:34.389566 00800000 ################################################################
2266 12:07:34.389732
2267 12:07:34.936076 00880000 ################################################################
2268 12:07:34.936214
2269 12:07:35.202959 00900000 ################################## done.
2270 12:07:35.203101
2271 12:07:35.206233 The bootfile was 9707520 bytes long.
2272 12:07:35.206322
2273 12:07:35.209043 Sending tftp read request... done.
2274 12:07:35.209131
2275 12:07:35.212304 Waiting for the transfer...
2276 12:07:35.212390
2277 12:07:35.751200 00000000 ################################################################
2278 12:07:35.751343
2279 12:07:36.290221 00080000 ################################################################
2280 12:07:36.290358
2281 12:07:36.834918 00100000 ################################################################
2282 12:07:36.835057
2283 12:07:37.375583 00180000 ################################################################
2284 12:07:37.375722
2285 12:07:37.927782 00200000 ################################################################
2286 12:07:37.927924
2287 12:07:38.475173 00280000 ################################################################
2288 12:07:38.475325
2289 12:07:39.024211 00300000 ################################################################
2290 12:07:39.024356
2291 12:07:39.575825 00380000 ################################################################
2292 12:07:39.575978
2293 12:07:40.125965 00400000 ################################################################
2294 12:07:40.126114
2295 12:07:40.640413 00480000 ################################################################
2296 12:07:40.640580
2297 12:07:40.913669 00500000 ################################## done.
2298 12:07:40.913816
2299 12:07:40.917156 Sending tftp read request... done.
2300 12:07:40.917244
2301 12:07:40.920646 Waiting for the transfer...
2302 12:07:40.920728
2303 12:07:40.920795 00000000 # done.
2304 12:07:40.920858
2305 12:07:40.930654 Command line loaded dynamically from TFTP file: 8853693/tftp-deploy-4v4hvemb/kernel/cmdline
2306 12:07:40.930744
2307 12:07:40.953576 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8853693/extract-nfsrootfs-w64f3q2l,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2308 12:07:40.953681
2309 12:07:40.960129 Shutting down all USB controllers.
2310 12:07:40.960217
2311 12:07:40.960285 Removing current net device
2312 12:07:40.960348
2313 12:07:40.963603 Finalizing coreboot
2314 12:07:40.963689
2315 12:07:40.970256 Exiting depthcharge with code 4 at timestamp: 25781972
2316 12:07:40.970346
2317 12:07:40.970425
2318 12:07:40.970511 Starting kernel ...
2319 12:07:40.970574
2320 12:07:40.970634
2321 12:07:40.970691
2322 12:07:40.971088 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2323 12:07:40.971215 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2324 12:07:40.971300 Setting prompt string to ['Linux version [0-9]']
2325 12:07:40.971396 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2326 12:07:40.971472 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2328 12:12:07.971437 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2330 12:12:07.971694 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2332 12:12:07.971880 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2335 12:12:07.972167 end: 2 depthcharge-action (duration 00:05:00) [common]
2337 12:12:07.972448 Cleaning after the job
2338 12:12:07.972536 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/ramdisk
2339 12:12:07.973055 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/kernel
2340 12:12:07.973790 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/nfsrootfs
2341 12:12:08.023255 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853693/tftp-deploy-4v4hvemb/modules
2342 12:12:08.023554 start: 4.1 power-off (timeout 00:00:30) [common]
2343 12:12:08.023714 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2344 12:12:08.043685 >> Command sent successfully.
2345 12:12:08.045625 Returned 0 in 0 seconds
2346 12:12:08.146413 end: 4.1 power-off (duration 00:00:00) [common]
2348 12:12:08.146796 start: 4.2 read-feedback (timeout 00:10:00) [common]
2349 12:12:08.147046 Listened to connection for namespace 'common' for up to 1s
2350 12:12:09.149484 Finalising connection for namespace 'common'
2351 12:12:09.149671 Disconnecting from shell: Finalise
2352 12:12:09.250412 end: 4.2 read-feedback (duration 00:00:01) [common]
2353 12:12:09.250604 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8853693
2354 12:12:09.404165 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8853693
2355 12:12:09.404368 JobError: Your job cannot terminate cleanly.