Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:07:00.435842 lava-dispatcher, installed at version: 2022.11
2 12:07:00.436032 start: 0 validate
3 12:07:00.436155 Start time: 2023-01-24 12:07:00.436147+00:00 (UTC)
4 12:07:00.436284 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:07:00.436411 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230120.0%2Fx86%2Frootfs.cpio.gz exists
6 12:07:00.444194 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:07:00.444352 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:07:00.445941 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:07:00.446094 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:07:00.453653 validate duration: 0.02
12 12:07:00.453893 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:07:00.453995 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:07:00.454142 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:07:00.454249 Not decompressing ramdisk as can be used compressed.
16 12:07:00.454332 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230120.0/x86/rootfs.cpio.gz
17 12:07:00.454396 saving as /var/lib/lava/dispatcher/tmp/8853702/tftp-deploy-odn9sxnu/ramdisk/rootfs.cpio.gz
18 12:07:00.454456 total size: 8423992 (8MB)
19 12:07:00.464855 progress 0% (0MB)
20 12:07:00.488753 progress 5% (0MB)
21 12:07:00.510509 progress 10% (0MB)
22 12:07:00.536688 progress 15% (1MB)
23 12:07:00.560558 progress 20% (1MB)
24 12:07:00.584862 progress 25% (2MB)
25 12:07:00.598599 progress 30% (2MB)
26 12:07:00.609861 progress 35% (2MB)
27 12:07:00.624094 progress 40% (3MB)
28 12:07:00.637362 progress 45% (3MB)
29 12:07:00.650903 progress 50% (4MB)
30 12:07:00.663127 progress 55% (4MB)
31 12:07:00.677616 progress 60% (4MB)
32 12:07:00.691393 progress 65% (5MB)
33 12:07:00.703125 progress 70% (5MB)
34 12:07:00.717948 progress 75% (6MB)
35 12:07:00.729509 progress 80% (6MB)
36 12:07:00.743244 progress 85% (6MB)
37 12:07:00.757932 progress 90% (7MB)
38 12:07:00.770351 progress 95% (7MB)
39 12:07:00.783532 progress 100% (8MB)
40 12:07:00.783734 8MB downloaded in 0.33s (24.40MB/s)
41 12:07:00.783942 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:07:00.784217 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:07:00.784322 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:07:00.784425 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:07:00.784546 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:07:00.784621 saving as /var/lib/lava/dispatcher/tmp/8853702/tftp-deploy-odn9sxnu/kernel/bzImage
48 12:07:00.784703 total size: 9707520 (9MB)
49 12:07:00.784784 No compression specified
50 12:07:00.800460 progress 0% (0MB)
51 12:07:00.852835 progress 5% (0MB)
52 12:07:00.907462 progress 10% (0MB)
53 12:07:00.978639 progress 15% (1MB)
54 12:07:01.056113 progress 20% (1MB)
55 12:07:01.135501 progress 25% (2MB)
56 12:07:01.198884 progress 30% (2MB)
57 12:07:01.272290 progress 35% (3MB)
58 12:07:01.329137 progress 40% (3MB)
59 12:07:01.371101 progress 45% (4MB)
60 12:07:01.418371 progress 50% (4MB)
61 12:07:01.470189 progress 55% (5MB)
62 12:07:01.540885 progress 60% (5MB)
63 12:07:01.604584 progress 65% (6MB)
64 12:07:01.660334 progress 70% (6MB)
65 12:07:01.727340 progress 75% (6MB)
66 12:07:01.789554 progress 80% (7MB)
67 12:07:01.861932 progress 85% (7MB)
68 12:07:01.937240 progress 90% (8MB)
69 12:07:02.019710 progress 95% (8MB)
70 12:07:02.089638 progress 100% (9MB)
71 12:07:02.089891 9MB downloaded in 1.31s (7.09MB/s)
72 12:07:02.090065 end: 1.2.1 http-download (duration 00:00:01) [common]
74 12:07:02.090337 end: 1.2 download-retry (duration 00:00:01) [common]
75 12:07:02.090430 start: 1.3 download-retry (timeout 00:09:58) [common]
76 12:07:02.090526 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 12:07:02.090634 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:07:02.090709 saving as /var/lib/lava/dispatcher/tmp/8853702/tftp-deploy-odn9sxnu/modules/modules.tar
79 12:07:02.090773 total size: 64588 (0MB)
80 12:07:02.090836 Using unxz to decompress xz
81 12:07:02.132966 progress 50% (0MB)
82 12:07:02.140431 progress 100% (0MB)
83 12:07:02.143163 0MB downloaded in 0.05s (1.18MB/s)
84 12:07:02.143462 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:07:02.143746 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:07:02.143852 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 12:07:02.143992 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 12:07:02.144115 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:07:02.144240 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 12:07:02.144423 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95
92 12:07:02.144540 makedir: /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin
93 12:07:02.144668 makedir: /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/tests
94 12:07:02.144784 makedir: /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/results
95 12:07:02.144895 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-add-keys
96 12:07:02.145043 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-add-sources
97 12:07:02.145164 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-background-process-start
98 12:07:02.145282 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-background-process-stop
99 12:07:02.145398 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-common-functions
100 12:07:02.145511 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-echo-ipv4
101 12:07:02.145628 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-install-packages
102 12:07:02.145754 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-installed-packages
103 12:07:02.145873 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-os-build
104 12:07:02.146001 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-probe-channel
105 12:07:02.146140 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-probe-ip
106 12:07:02.146250 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-target-ip
107 12:07:02.146360 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-target-mac
108 12:07:02.146482 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-target-storage
109 12:07:02.146602 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-test-case
110 12:07:02.146728 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-test-event
111 12:07:02.146847 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-test-feedback
112 12:07:02.146959 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-test-raise
113 12:07:02.147107 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-test-reference
114 12:07:02.147218 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-test-runner
115 12:07:02.147329 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-test-set
116 12:07:02.147468 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-test-shell
117 12:07:02.147597 Updating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-install-packages (oe)
118 12:07:02.147715 Updating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/bin/lava-installed-packages (oe)
119 12:07:02.147828 Creating /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/environment
120 12:07:02.147926 LAVA metadata
121 12:07:02.148023 - LAVA_JOB_ID=8853702
122 12:07:02.148099 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:07:02.148219 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 12:07:02.148291 skipped lava-vland-overlay
125 12:07:02.148370 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:07:02.148457 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 12:07:02.148547 skipped lava-multinode-overlay
128 12:07:02.148631 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:07:02.148719 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 12:07:02.148817 Loading test definitions
131 12:07:02.148918 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 12:07:02.149000 Using /lava-8853702 at stage 0
133 12:07:02.149321 uuid=8853702_1.4.2.3.1 testdef=None
134 12:07:02.149420 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:07:02.149514 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 12:07:02.150041 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:07:02.150334 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 12:07:02.150908 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:07:02.151161 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 12:07:02.151737 runner path: /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/0/tests/0_dmesg test_uuid 8853702_1.4.2.3.1
143 12:07:02.151917 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:07:02.152154 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 12:07:02.152257 Using /lava-8853702 at stage 1
147 12:07:02.152504 uuid=8853702_1.4.2.3.5 testdef=None
148 12:07:02.152595 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 12:07:02.152687 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 12:07:02.153168 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 12:07:02.153437 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 12:07:02.154078 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 12:07:02.154355 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 12:07:02.154971 runner path: /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/1/tests/1_bootrr test_uuid 8853702_1.4.2.3.5
157 12:07:02.155115 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 12:07:02.155358 Creating lava-test-runner.conf files
160 12:07:02.155423 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/0 for stage 0
161 12:07:02.155505 - 0_dmesg
162 12:07:02.155582 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853702/lava-overlay-fqy0sj95/lava-8853702/1 for stage 1
163 12:07:02.155666 - 1_bootrr
164 12:07:02.155758 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 12:07:02.155866 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 12:07:02.162672 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 12:07:02.162790 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 12:07:02.162885 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 12:07:02.162990 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 12:07:02.163092 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 12:07:02.355804 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 12:07:02.356158 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 12:07:02.356275 extracting modules file /var/lib/lava/dispatcher/tmp/8853702/tftp-deploy-odn9sxnu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853702/extract-overlay-ramdisk-jba1_6km/ramdisk
174 12:07:02.360630 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 12:07:02.360756 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 12:07:02.360848 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853702/compress-overlay-1cpa3g4a/overlay-1.4.2.4.tar.gz to ramdisk
177 12:07:02.360927 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853702/compress-overlay-1cpa3g4a/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8853702/extract-overlay-ramdisk-jba1_6km/ramdisk
178 12:07:02.365235 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 12:07:02.365363 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 12:07:02.365457 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 12:07:02.365564 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 12:07:02.365649 Building ramdisk /var/lib/lava/dispatcher/tmp/8853702/extract-overlay-ramdisk-jba1_6km/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8853702/extract-overlay-ramdisk-jba1_6km/ramdisk
183 12:07:02.434859 >> 48350 blocks
184 12:07:03.244176 rename /var/lib/lava/dispatcher/tmp/8853702/extract-overlay-ramdisk-jba1_6km/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8853702/tftp-deploy-odn9sxnu/ramdisk/ramdisk.cpio.gz
185 12:07:03.244592 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 12:07:03.244731 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 12:07:03.244835 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 12:07:03.244932 No mkimage arch provided, not using FIT.
189 12:07:03.245022 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 12:07:03.245120 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 12:07:03.245253 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 12:07:03.245364 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 12:07:03.245482 No LXC device requested
194 12:07:03.245578 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 12:07:03.245671 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 12:07:03.245761 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 12:07:03.245837 Checking files for TFTP limit of 4294967296 bytes.
198 12:07:03.246295 end: 1 tftp-deploy (duration 00:00:03) [common]
199 12:07:03.246422 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 12:07:03.246522 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 12:07:03.246653 substitutions:
202 12:07:03.246722 - {DTB}: None
203 12:07:03.246819 - {INITRD}: 8853702/tftp-deploy-odn9sxnu/ramdisk/ramdisk.cpio.gz
204 12:07:03.246896 - {KERNEL}: 8853702/tftp-deploy-odn9sxnu/kernel/bzImage
205 12:07:03.246999 - {LAVA_MAC}: None
206 12:07:03.247059 - {PRESEED_CONFIG}: None
207 12:07:03.247118 - {PRESEED_LOCAL}: None
208 12:07:03.247176 - {RAMDISK}: 8853702/tftp-deploy-odn9sxnu/ramdisk/ramdisk.cpio.gz
209 12:07:03.247235 - {ROOT_PART}: None
210 12:07:03.247292 - {ROOT}: None
211 12:07:03.247349 - {SERVER_IP}: 192.168.201.1
212 12:07:03.247406 - {TEE}: None
213 12:07:03.247463 Parsed boot commands:
214 12:07:03.247519 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 12:07:03.247676 Parsed boot commands: tftpboot 192.168.201.1 8853702/tftp-deploy-odn9sxnu/kernel/bzImage 8853702/tftp-deploy-odn9sxnu/kernel/cmdline 8853702/tftp-deploy-odn9sxnu/ramdisk/ramdisk.cpio.gz
216 12:07:03.247772 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 12:07:03.247867 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 12:07:03.247980 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 12:07:03.248075 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 12:07:03.248149 Not connected, no need to disconnect.
221 12:07:03.248231 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 12:07:03.248318 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 12:07:03.248399 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
224 12:07:03.251535 Setting prompt string to ['lava-test: # ']
225 12:07:03.251842 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 12:07:03.251955 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 12:07:03.252058 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 12:07:03.252152 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 12:07:03.252336 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
230 12:07:03.273274 >> Command sent successfully.
231 12:07:03.275422 Returned 0 in 0 seconds
232 12:07:03.376214 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 12:07:03.376852 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 12:07:03.376972 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 12:07:03.377070 Setting prompt string to 'Starting depthcharge on Helios...'
237 12:07:03.377151 Changing prompt to 'Starting depthcharge on Helios...'
238 12:07:03.377244 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 12:07:03.377539 [Enter `^Ec?' for help]
240 12:07:10.222561
241 12:07:10.222785
242 12:07:10.231801 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 12:07:10.235438 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 12:07:10.241643 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 12:07:10.245101 CPU: AES supported, TXT NOT supported, VT supported
246 12:07:10.251914 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 12:07:10.255605 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 12:07:10.261597 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 12:07:10.264983 VBOOT: Loading verstage.
250 12:07:10.268081 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 12:07:10.274687 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 12:07:10.281111 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 12:07:10.281207 CBFS @ c08000 size 3f8000
254 12:07:10.288209 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 12:07:10.291174 CBFS: Locating 'fallback/verstage'
256 12:07:10.295057 CBFS: Found @ offset 10fb80 size 1072c
257 12:07:10.298558
258 12:07:10.298711
259 12:07:10.308759 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 12:07:10.323284 Probing TPM: . done!
261 12:07:10.326286 TPM ready after 0 ms
262 12:07:10.329687 Connected to device vid:did:rid of 1ae0:0028:00
263 12:07:10.340085 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 12:07:10.343156 Initialized TPM device CR50 revision 0
265 12:07:10.385460 tlcl_send_startup: Startup return code is 0
266 12:07:10.385606 TPM: setup succeeded
267 12:07:10.398018 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 12:07:10.401936 Chrome EC: UHEPI supported
269 12:07:10.405095 Phase 1
270 12:07:10.408345 FMAP: area GBB found @ c05000 (12288 bytes)
271 12:07:10.414953 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 12:07:10.418411 Phase 2
273 12:07:10.418508 Phase 3
274 12:07:10.421333 FMAP: area GBB found @ c05000 (12288 bytes)
275 12:07:10.427972 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 12:07:10.434997 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
277 12:07:10.437970 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
278 12:07:10.444523 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 12:07:10.460724 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
280 12:07:10.463983 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
281 12:07:10.470686 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 12:07:10.475021 Phase 4
283 12:07:10.478463 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
284 12:07:10.484740 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 12:07:10.663989 VB2:vb2_rsa_verify_digest() Digest check failed!
286 12:07:10.667262 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 12:07:10.670833
288 12:07:10.670942 Saving nvdata
289 12:07:10.674337 Reboot requested (10020007)
290 12:07:10.677482 board_reset() called!
291 12:07:10.677587 full_reset() called!
292 12:07:15.188646
293 12:07:15.188803
294 12:07:15.198451 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
295 12:07:15.201867 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
296 12:07:15.208313 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
297 12:07:15.212035 CPU: AES supported, TXT NOT supported, VT supported
298 12:07:15.217896 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
299 12:07:15.221136 PCH: device id 0284 (rev 00) is Cometlake-U Premium
300 12:07:15.228221 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
301 12:07:15.230960 VBOOT: Loading verstage.
302 12:07:15.234405 FMAP: Found "FLASH" version 1.1 at 0xc04000.
303 12:07:15.241199 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
304 12:07:15.247805 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
305 12:07:15.247926 CBFS @ c08000 size 3f8000
306 12:07:15.254010 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
307 12:07:15.257279 CBFS: Locating 'fallback/verstage'
308 12:07:15.260792 CBFS: Found @ offset 10fb80 size 1072c
309 12:07:15.265009
310 12:07:15.265124
311 12:07:15.274834 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
312 12:07:15.289595 Probing TPM: . done!
313 12:07:15.292602 TPM ready after 0 ms
314 12:07:15.296009 Connected to device vid:did:rid of 1ae0:0028:00
315 12:07:15.306398 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
316 12:07:15.309976 Initialized TPM device CR50 revision 0
317 12:07:15.352477 tlcl_send_startup: Startup return code is 0
318 12:07:15.352626 TPM: setup succeeded
319 12:07:15.364884 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
320 12:07:15.368782 Chrome EC: UHEPI supported
321 12:07:15.372158 Phase 1
322 12:07:15.375554 FMAP: area GBB found @ c05000 (12288 bytes)
323 12:07:15.381833 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
324 12:07:15.388485 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
325 12:07:15.391780 Recovery requested (1009000e)
326 12:07:15.397506 Saving nvdata
327 12:07:15.403725 tlcl_extend: response is 0
328 12:07:15.412588 tlcl_extend: response is 0
329 12:07:15.420008 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
330 12:07:15.422833 CBFS @ c08000 size 3f8000
331 12:07:15.429410 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
332 12:07:15.432333 CBFS: Locating 'fallback/romstage'
333 12:07:15.435621 CBFS: Found @ offset 80 size 145fc
334 12:07:15.438847 Accumulated console time in verstage 98 ms
335 12:07:15.438928
336 12:07:15.442341
337 12:07:15.452061 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
338 12:07:15.458827 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 12:07:15.461988 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 12:07:15.465326 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
341 12:07:15.472095 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
342 12:07:15.475664 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
343 12:07:15.478671 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
344 12:07:15.481775 TCO_STS: 0000 0000
345 12:07:15.485182 GEN_PMCON: e0015238 00000200
346 12:07:15.488425 GBLRST_CAUSE: 00000000 00000000
347 12:07:15.488543 prev_sleep_state 5
348 12:07:15.491997
349 12:07:15.494964 Boot Count incremented to 44477
350 12:07:15.498307 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
351 12:07:15.501307 CBFS @ c08000 size 3f8000
352 12:07:15.507971 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
353 12:07:15.511403 CBFS: Locating 'fspm.bin'
354 12:07:15.514430 CBFS: Found @ offset 5ffc0 size 71000
355 12:07:15.517914 Chrome EC: UHEPI supported
356 12:07:15.524302 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
357 12:07:15.528875 Probing TPM: done!
358 12:07:15.535789 Connected to device vid:did:rid of 1ae0:0028:00
359 12:07:15.545925 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
360 12:07:15.551406 Initialized TPM device CR50 revision 0
361 12:07:15.560879 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
362 12:07:15.567032 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
363 12:07:15.570316 MRC cache found, size 1948
364 12:07:15.573699 bootmode is set to: 2
365 12:07:15.577103 PRMRR disabled by config.
366 12:07:15.577190 SPD INDEX = 1
367 12:07:15.580537
368 12:07:15.583514 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
369 12:07:15.587016 CBFS @ c08000 size 3f8000
370 12:07:15.593607 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
371 12:07:15.593701 CBFS: Locating 'spd.bin'
372 12:07:15.596851 CBFS: Found @ offset 5fb80 size 400
373 12:07:15.600039 SPD: module type is LPDDR3
374 12:07:15.603614 SPD: module part is
375 12:07:15.609972 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
376 12:07:15.613262 SPD: device width 4 bits, bus width 8 bits
377 12:07:15.616840 SPD: module size is 4096 MB (per channel)
378 12:07:15.620299 memory slot: 0 configuration done.
379 12:07:15.623194 memory slot: 2 configuration done.
380 12:07:15.675750 CBMEM:
381 12:07:15.678656 IMD: root @ 99fff000 254 entries.
382 12:07:15.682191 IMD: root @ 99ffec00 62 entries.
383 12:07:15.685453 External stage cache:
384 12:07:15.688467 IMD: root @ 9abff000 254 entries.
385 12:07:15.691800 IMD: root @ 9abfec00 62 entries.
386 12:07:15.698253 Chrome EC: clear events_b mask to 0x0000000020004000
387 12:07:15.711298 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
388 12:07:15.724229 tlcl_write: response is 0
389 12:07:15.733502 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 12:07:15.740159 MRC: TPM MRC hash updated successfully.
391 12:07:15.740254 2 DIMMs found
392 12:07:15.742945 SMM Memory Map
393 12:07:15.746214 SMRAM : 0x9a000000 0x1000000
394 12:07:15.749503 Subregion 0: 0x9a000000 0xa00000
395 12:07:15.753231 Subregion 1: 0x9aa00000 0x200000
396 12:07:15.756998 Subregion 2: 0x9ac00000 0x400000
397 12:07:15.759812 top_of_ram = 0x9a000000
398 12:07:15.763318 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
399 12:07:15.769578 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
400 12:07:15.772615 MTRR Range: Start=ff000000 End=0 (Size 1000000)
401 12:07:15.779480 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 12:07:15.782846 CBFS @ c08000 size 3f8000
403 12:07:15.786175 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 12:07:15.789154 CBFS: Locating 'fallback/postcar'
405 12:07:15.792529
406 12:07:15.795926 CBFS: Found @ offset 107000 size 4b44
407 12:07:15.802364 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
408 12:07:15.812610 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
409 12:07:15.815476 Processing 180 relocs. Offset value of 0x97c0c000
410 12:07:15.823994 Accumulated console time in romstage 286 ms
411 12:07:15.824126
412 12:07:15.824223
413 12:07:15.834052 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
414 12:07:15.840682 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
415 12:07:15.843999 CBFS @ c08000 size 3f8000
416 12:07:15.847454 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
417 12:07:15.853778 CBFS: Locating 'fallback/ramstage'
418 12:07:15.857379 CBFS: Found @ offset 43380 size 1b9e8
419 12:07:15.863611 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
420 12:07:15.895570 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
421 12:07:15.899296 Processing 3976 relocs. Offset value of 0x98db0000
422 12:07:15.905983 Accumulated console time in postcar 52 ms
423 12:07:15.906115
424 12:07:15.906186
425 12:07:15.915590 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
426 12:07:15.922326 FMAP: area RO_VPD found @ c00000 (16384 bytes)
427 12:07:15.925604 WARNING: RO_VPD is uninitialized or empty.
428 12:07:15.928908 FMAP: area RW_VPD found @ af8000 (8192 bytes)
429 12:07:15.935501 FMAP: area RW_VPD found @ af8000 (8192 bytes)
430 12:07:15.935594 Normal boot.
431 12:07:15.942086 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
432 12:07:15.945135 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 12:07:15.948937 CBFS @ c08000 size 3f8000
434 12:07:15.955126 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 12:07:15.958470 CBFS: Locating 'cpu_microcode_blob.bin'
436 12:07:15.962138 CBFS: Found @ offset 14700 size 2ec00
437 12:07:15.965347 microcode: sig=0x806ec pf=0x4 revision=0xc9
438 12:07:15.968283 Skip microcode update
439 12:07:15.974836 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 12:07:15.974940 CBFS @ c08000 size 3f8000
441 12:07:15.981289 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 12:07:15.984589 CBFS: Locating 'fsps.bin'
443 12:07:15.988171 CBFS: Found @ offset d1fc0 size 35000
444 12:07:16.014329 Detected 4 core, 8 thread CPU.
445 12:07:16.017416 Setting up SMI for CPU
446 12:07:16.020748 IED base = 0x9ac00000
447 12:07:16.020860 IED size = 0x00400000
448 12:07:16.024199 Will perform SMM setup.
449 12:07:16.030442 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
450 12:07:16.037016 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
451 12:07:16.043640 Processing 16 relocs. Offset value of 0x00030000
452 12:07:16.043757 Attempting to start 7 APs
453 12:07:16.049918 Waiting for 10ms after sending INIT.
454 12:07:16.063658 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
455 12:07:16.063762 done.
456 12:07:16.067101 AP: slot 6 apic_id 7.
457 12:07:16.070171 AP: slot 7 apic_id 6.
458 12:07:16.070253 AP: slot 1 apic_id 3.
459 12:07:16.074142 AP: slot 4 apic_id 2.
460 12:07:16.076797 Waiting for 2nd SIPI to complete...done.
461 12:07:16.080149 AP: slot 2 apic_id 5.
462 12:07:16.083508 AP: slot 5 apic_id 4.
463 12:07:16.089953 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
464 12:07:16.096460 Processing 13 relocs. Offset value of 0x00038000
465 12:07:16.103353 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
466 12:07:16.106550 Installing SMM handler to 0x9a000000
467 12:07:16.112851 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
468 12:07:16.119852 Processing 658 relocs. Offset value of 0x9a010000
469 12:07:16.126365 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
470 12:07:16.132481 Processing 13 relocs. Offset value of 0x9a008000
471 12:07:16.135744 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
472 12:07:16.142695 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
473 12:07:16.149163 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
474 12:07:16.155718 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
475 12:07:16.158898 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
476 12:07:16.165380 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
477 12:07:16.172118 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
478 12:07:16.178861 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
479 12:07:16.182121 Clearing SMI status registers
480 12:07:16.182229 SMI_STS: PM1
481 12:07:16.185492 PM1_STS: PWRBTN
482 12:07:16.185587 TCO_STS: SECOND_TO
483 12:07:16.189063 New SMBASE 0x9a000000
484 12:07:16.191724 In relocation handler: CPU 0
485 12:07:16.195003 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
486 12:07:16.201554 Writing SMRR. base = 0x9a000006, mask=0xff000800
487 12:07:16.201645 Relocation complete.
488 12:07:16.205219 New SMBASE 0x99fff400
489 12:07:16.208741 In relocation handler: CPU 3
490 12:07:16.211503 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
491 12:07:16.218104 Writing SMRR. base = 0x9a000006, mask=0xff000800
492 12:07:16.218193 Relocation complete.
493 12:07:16.221681 New SMBASE 0x99fff000
494 12:07:16.224713 In relocation handler: CPU 4
495 12:07:16.228178 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
496 12:07:16.234482 Writing SMRR. base = 0x9a000006, mask=0xff000800
497 12:07:16.234568 Relocation complete.
498 12:07:16.237913 New SMBASE 0x99fffc00
499 12:07:16.241027 In relocation handler: CPU 1
500 12:07:16.244424 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
501 12:07:16.251026 Writing SMRR. base = 0x9a000006, mask=0xff000800
502 12:07:16.251122 Relocation complete.
503 12:07:16.254168 New SMBASE 0x99fff800
504 12:07:16.257460 In relocation handler: CPU 2
505 12:07:16.260870 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
506 12:07:16.267037 Writing SMRR. base = 0x9a000006, mask=0xff000800
507 12:07:16.267136 Relocation complete.
508 12:07:16.270434 New SMBASE 0x99ffec00
509 12:07:16.273939 In relocation handler: CPU 5
510 12:07:16.277429 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
511 12:07:16.283960 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 12:07:16.284048 Relocation complete.
513 12:07:16.286927 New SMBASE 0x99ffe800
514 12:07:16.290075 In relocation handler: CPU 6
515 12:07:16.293517 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
516 12:07:16.299924 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 12:07:16.300018 Relocation complete.
518 12:07:16.303868 New SMBASE 0x99ffe400
519 12:07:16.306482 In relocation handler: CPU 7
520 12:07:16.310054 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
521 12:07:16.316692 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 12:07:16.316788 Relocation complete.
523 12:07:16.320142 Initializing CPU #0
524 12:07:16.322867 CPU: vendor Intel device 806ec
525 12:07:16.326279 CPU: family 06, model 8e, stepping 0c
526 12:07:16.329566 Clearing out pending MCEs
527 12:07:16.332774 Setting up local APIC...
528 12:07:16.332854 apic_id: 0x00 done.
529 12:07:16.336311 Turbo is available but hidden
530 12:07:16.339778 Turbo is available and visible
531 12:07:16.342684 VMX status: enabled
532 12:07:16.346417 IA32_FEATURE_CONTROL status: locked
533 12:07:16.349421 Skip microcode update
534 12:07:16.349510 CPU #0 initialized
535 12:07:16.353171 Initializing CPU #3
536 12:07:16.353250 Initializing CPU #2
537 12:07:16.356024
538 12:07:16.356107 Initializing CPU #4
539 12:07:16.359324 Initializing CPU #1
540 12:07:16.362682 CPU: vendor Intel device 806ec
541 12:07:16.366024 CPU: family 06, model 8e, stepping 0c
542 12:07:16.369659 CPU: vendor Intel device 806ec
543 12:07:16.372346 CPU: family 06, model 8e, stepping 0c
544 12:07:16.375906 Clearing out pending MCEs
545 12:07:16.379250 Clearing out pending MCEs
546 12:07:16.379344 Setting up local APIC...
547 12:07:16.382508 Initializing CPU #6
548 12:07:16.385708 Initializing CPU #7
549 12:07:16.388769 CPU: vendor Intel device 806ec
550 12:07:16.392898 CPU: family 06, model 8e, stepping 0c
551 12:07:16.395777 CPU: vendor Intel device 806ec
552 12:07:16.398792 CPU: family 06, model 8e, stepping 0c
553 12:07:16.402671 Clearing out pending MCEs
554 12:07:16.402758 Clearing out pending MCEs
555 12:07:16.405284 Setting up local APIC...
556 12:07:16.408795 Initializing CPU #5
557 12:07:16.411930 CPU: vendor Intel device 806ec
558 12:07:16.415306 CPU: family 06, model 8e, stepping 0c
559 12:07:16.418539 CPU: vendor Intel device 806ec
560 12:07:16.421660 CPU: family 06, model 8e, stepping 0c
561 12:07:16.425381 Clearing out pending MCEs
562 12:07:16.428457 Clearing out pending MCEs
563 12:07:16.428550 Setting up local APIC...
564 12:07:16.431914 CPU: vendor Intel device 806ec
565 12:07:16.435024 CPU: family 06, model 8e, stepping 0c
566 12:07:16.438239 Clearing out pending MCEs
567 12:07:16.441308 apic_id: 0x02 done.
568 12:07:16.444937 Setting up local APIC...
569 12:07:16.445036 Setting up local APIC...
570 12:07:16.448219 Setting up local APIC...
571 12:07:16.451094 apic_id: 0x01 done.
572 12:07:16.454649 Setting up local APIC...
573 12:07:16.454744 apic_id: 0x06 done.
574 12:07:16.458174 apic_id: 0x07 done.
575 12:07:16.461155 VMX status: enabled
576 12:07:16.461244 VMX status: enabled
577 12:07:16.464387 IA32_FEATURE_CONTROL status: locked
578 12:07:16.467750 IA32_FEATURE_CONTROL status: locked
579 12:07:16.471444 Skip microcode update
580 12:07:16.474780 Skip microcode update
581 12:07:16.474868 CPU #7 initialized
582 12:07:16.477498 CPU #6 initialized
583 12:07:16.480875 apic_id: 0x05 done.
584 12:07:16.480965 apic_id: 0x04 done.
585 12:07:16.484161 VMX status: enabled
586 12:07:16.487437 VMX status: enabled
587 12:07:16.490824 IA32_FEATURE_CONTROL status: locked
588 12:07:16.494278 IA32_FEATURE_CONTROL status: locked
589 12:07:16.494361 Skip microcode update
590 12:07:16.497555 Skip microcode update
591 12:07:16.501192 CPU #2 initialized
592 12:07:16.501272 CPU #5 initialized
593 12:07:16.503911 VMX status: enabled
594 12:07:16.506968 apic_id: 0x03 done.
595 12:07:16.510370 IA32_FEATURE_CONTROL status: locked
596 12:07:16.510450 VMX status: enabled
597 12:07:16.514152 Skip microcode update
598 12:07:16.516910 IA32_FEATURE_CONTROL status: locked
599 12:07:16.520274 CPU #4 initialized
600 12:07:16.520355 Skip microcode update
601 12:07:16.523439 VMX status: enabled
602 12:07:16.527373 CPU #1 initialized
603 12:07:16.530042 IA32_FEATURE_CONTROL status: locked
604 12:07:16.530132 Skip microcode update
605 12:07:16.533781 CPU #3 initialized
606 12:07:16.536957 bsp_do_flight_plan done after 457 msecs.
607 12:07:16.540491 CPU: frequency set to 4200 MHz
608 12:07:16.543239 Enabling SMIs.
609 12:07:16.543330 Locking SMM.
610 12:07:16.558984 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
611 12:07:16.561532 CBFS @ c08000 size 3f8000
612 12:07:16.568564 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
613 12:07:16.568662 CBFS: Locating 'vbt.bin'
614 12:07:16.572065 CBFS: Found @ offset 5f5c0 size 499
615 12:07:16.578328 Found a VBT of 4608 bytes after decompression
616 12:07:16.763259 Display FSP Version Info HOB
617 12:07:16.766190 Reference Code - CPU = 9.0.1e.30
618 12:07:16.769476 uCode Version = 0.0.0.ca
619 12:07:16.772331 TXT ACM version = ff.ff.ff.ffff
620 12:07:16.775686 Display FSP Version Info HOB
621 12:07:16.779233 Reference Code - ME = 9.0.1e.30
622 12:07:16.782076 MEBx version = 0.0.0.0
623 12:07:16.785502 ME Firmware Version = Consumer SKU
624 12:07:16.788829 Display FSP Version Info HOB
625 12:07:16.792299 Reference Code - CML PCH = 9.0.1e.30
626 12:07:16.795621 PCH-CRID Status = Disabled
627 12:07:16.798575 PCH-CRID Original Value = ff.ff.ff.ffff
628 12:07:16.802119 PCH-CRID New Value = ff.ff.ff.ffff
629 12:07:16.804909 OPROM - RST - RAID = ff.ff.ff.ffff
630 12:07:16.808552 ChipsetInit Base Version = ff.ff.ff.ffff
631 12:07:16.815244 ChipsetInit Oem Version = ff.ff.ff.ffff
632 12:07:16.815329 Display FSP Version Info HOB
633 12:07:16.821692 Reference Code - SA - System Agent = 9.0.1e.30
634 12:07:16.824550 Reference Code - MRC = 0.7.1.6c
635 12:07:16.828200 SA - PCIe Version = 9.0.1e.30
636 12:07:16.831217 SA-CRID Status = Disabled
637 12:07:16.834918 SA-CRID Original Value = 0.0.0.c
638 12:07:16.835008 SA-CRID New Value = 0.0.0.c
639 12:07:16.837783 OPROM - VBIOS = ff.ff.ff.ffff
640 12:07:16.841841 RTC Init
641 12:07:16.844739 Set power on after power failure.
642 12:07:16.844817 Disabling Deep S3
643 12:07:16.848060
644 12:07:16.848145 Disabling Deep S3
645 12:07:16.851613 Disabling Deep S4
646 12:07:16.851691 Disabling Deep S4
647 12:07:16.854553 Disabling Deep S5
648 12:07:16.854630 Disabling Deep S5
649 12:07:16.861303 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 195 exit 1
650 12:07:16.864792 Enumerating buses...
651 12:07:16.867996 Show all devs... Before device enumeration.
652 12:07:16.871161 Root Device: enabled 1
653 12:07:16.873990 CPU_CLUSTER: 0: enabled 1
654 12:07:16.874076 DOMAIN: 0000: enabled 1
655 12:07:16.877500 APIC: 00: enabled 1
656 12:07:16.880732 PCI: 00:00.0: enabled 1
657 12:07:16.880807 PCI: 00:02.0: enabled 1
658 12:07:16.884143
659 12:07:16.884242 PCI: 00:04.0: enabled 0
660 12:07:16.887247 PCI: 00:05.0: enabled 0
661 12:07:16.890409 PCI: 00:12.0: enabled 1
662 12:07:16.890496 PCI: 00:12.5: enabled 0
663 12:07:16.893856 PCI: 00:12.6: enabled 0
664 12:07:16.896927 PCI: 00:14.0: enabled 1
665 12:07:16.900306 PCI: 00:14.1: enabled 0
666 12:07:16.900384 PCI: 00:14.3: enabled 1
667 12:07:16.903393 PCI: 00:14.5: enabled 0
668 12:07:16.906531 PCI: 00:15.0: enabled 1
669 12:07:16.909758 PCI: 00:15.1: enabled 1
670 12:07:16.909873 PCI: 00:15.2: enabled 0
671 12:07:16.913100 PCI: 00:15.3: enabled 0
672 12:07:16.916230 PCI: 00:16.0: enabled 1
673 12:07:16.919781 PCI: 00:16.1: enabled 0
674 12:07:16.919867 PCI: 00:16.2: enabled 0
675 12:07:16.922682 PCI: 00:16.3: enabled 0
676 12:07:16.926305 PCI: 00:16.4: enabled 0
677 12:07:16.929469 PCI: 00:16.5: enabled 0
678 12:07:16.929556 PCI: 00:17.0: enabled 1
679 12:07:16.932835 PCI: 00:19.0: enabled 1
680 12:07:16.935949 PCI: 00:19.1: enabled 0
681 12:07:16.939611 PCI: 00:19.2: enabled 0
682 12:07:16.939698 PCI: 00:1a.0: enabled 0
683 12:07:16.942441 PCI: 00:1c.0: enabled 0
684 12:07:16.945800 PCI: 00:1c.1: enabled 0
685 12:07:16.949113 PCI: 00:1c.2: enabled 0
686 12:07:16.949203 PCI: 00:1c.3: enabled 0
687 12:07:16.951980 PCI: 00:1c.4: enabled 0
688 12:07:16.955357 PCI: 00:1c.5: enabled 0
689 12:07:16.958966 PCI: 00:1c.6: enabled 0
690 12:07:16.959045 PCI: 00:1c.7: enabled 0
691 12:07:16.962291 PCI: 00:1d.0: enabled 1
692 12:07:16.965352 PCI: 00:1d.1: enabled 0
693 12:07:16.968597 PCI: 00:1d.2: enabled 0
694 12:07:16.968694 PCI: 00:1d.3: enabled 0
695 12:07:16.971871 PCI: 00:1d.4: enabled 0
696 12:07:16.975276 PCI: 00:1d.5: enabled 1
697 12:07:16.978269 PCI: 00:1e.0: enabled 1
698 12:07:16.978358 PCI: 00:1e.1: enabled 0
699 12:07:16.981548 PCI: 00:1e.2: enabled 1
700 12:07:16.984697 PCI: 00:1e.3: enabled 1
701 12:07:16.988249 PCI: 00:1f.0: enabled 1
702 12:07:16.988337 PCI: 00:1f.1: enabled 1
703 12:07:16.991198 PCI: 00:1f.2: enabled 1
704 12:07:16.994659 PCI: 00:1f.3: enabled 1
705 12:07:16.997953 PCI: 00:1f.4: enabled 1
706 12:07:16.998056 PCI: 00:1f.5: enabled 1
707 12:07:17.001203 PCI: 00:1f.6: enabled 0
708 12:07:17.004542 USB0 port 0: enabled 1
709 12:07:17.004632 I2C: 00:15: enabled 1
710 12:07:17.007694
711 12:07:17.007775 I2C: 00:5d: enabled 1
712 12:07:17.010943 GENERIC: 0.0: enabled 1
713 12:07:17.014353 I2C: 00:1a: enabled 1
714 12:07:17.014437 I2C: 00:38: enabled 1
715 12:07:17.017197 I2C: 00:39: enabled 1
716 12:07:17.020798 I2C: 00:3a: enabled 1
717 12:07:17.020881 I2C: 00:3b: enabled 1
718 12:07:17.024176 PCI: 00:00.0: enabled 1
719 12:07:17.027267 SPI: 00: enabled 1
720 12:07:17.027348 SPI: 01: enabled 1
721 12:07:17.030352 PNP: 0c09.0: enabled 1
722 12:07:17.033546 USB2 port 0: enabled 1
723 12:07:17.033640 USB2 port 1: enabled 1
724 12:07:17.036944 USB2 port 2: enabled 0
725 12:07:17.040207 USB2 port 3: enabled 0
726 12:07:17.043320 USB2 port 5: enabled 0
727 12:07:17.043404 USB2 port 6: enabled 1
728 12:07:17.046874 USB2 port 9: enabled 1
729 12:07:17.050249 USB3 port 0: enabled 1
730 12:07:17.050337 USB3 port 1: enabled 1
731 12:07:17.053564 USB3 port 2: enabled 1
732 12:07:17.056408 USB3 port 3: enabled 1
733 12:07:17.059595 USB3 port 4: enabled 0
734 12:07:17.059679 APIC: 03: enabled 1
735 12:07:17.063028 APIC: 05: enabled 1
736 12:07:17.063118 APIC: 01: enabled 1
737 12:07:17.066458
738 12:07:17.066544 APIC: 02: enabled 1
739 12:07:17.069781 APIC: 04: enabled 1
740 12:07:17.069870 APIC: 07: enabled 1
741 12:07:17.072749 APIC: 06: enabled 1
742 12:07:17.076460 Compare with tree...
743 12:07:17.076552 Root Device: enabled 1
744 12:07:17.079598 CPU_CLUSTER: 0: enabled 1
745 12:07:17.082754 APIC: 00: enabled 1
746 12:07:17.086105 APIC: 03: enabled 1
747 12:07:17.086189 APIC: 05: enabled 1
748 12:07:17.089136 APIC: 01: enabled 1
749 12:07:17.092536 APIC: 02: enabled 1
750 12:07:17.092627 APIC: 04: enabled 1
751 12:07:17.095687 APIC: 07: enabled 1
752 12:07:17.098887 APIC: 06: enabled 1
753 12:07:17.098966 DOMAIN: 0000: enabled 1
754 12:07:17.102256 PCI: 00:00.0: enabled 1
755 12:07:17.105775 PCI: 00:02.0: enabled 1
756 12:07:17.109011 PCI: 00:04.0: enabled 0
757 12:07:17.112468 PCI: 00:05.0: enabled 0
758 12:07:17.112563 PCI: 00:12.0: enabled 1
759 12:07:17.115655 PCI: 00:12.5: enabled 0
760 12:07:17.119103 PCI: 00:12.6: enabled 0
761 12:07:17.121937 PCI: 00:14.0: enabled 1
762 12:07:17.125379 USB0 port 0: enabled 1
763 12:07:17.128176 USB2 port 0: enabled 1
764 12:07:17.128266 USB2 port 1: enabled 1
765 12:07:17.131615 USB2 port 2: enabled 0
766 12:07:17.134752 USB2 port 3: enabled 0
767 12:07:17.138087 USB2 port 5: enabled 0
768 12:07:17.141430 USB2 port 6: enabled 1
769 12:07:17.144791 USB2 port 9: enabled 1
770 12:07:17.144880 USB3 port 0: enabled 1
771 12:07:17.148207 USB3 port 1: enabled 1
772 12:07:17.151628 USB3 port 2: enabled 1
773 12:07:17.154596 USB3 port 3: enabled 1
774 12:07:17.158052 USB3 port 4: enabled 0
775 12:07:17.158141 PCI: 00:14.1: enabled 0
776 12:07:17.161064
777 12:07:17.161150 PCI: 00:14.3: enabled 1
778 12:07:17.164488 PCI: 00:14.5: enabled 0
779 12:07:17.167402 PCI: 00:15.0: enabled 1
780 12:07:17.170984 I2C: 00:15: enabled 1
781 12:07:17.171075 PCI: 00:15.1: enabled 1
782 12:07:17.174200
783 12:07:17.174290 I2C: 00:5d: enabled 1
784 12:07:17.177768 GENERIC: 0.0: enabled 1
785 12:07:17.181079 PCI: 00:15.2: enabled 0
786 12:07:17.184230 PCI: 00:15.3: enabled 0
787 12:07:17.184319 PCI: 00:16.0: enabled 1
788 12:07:17.187502
789 12:07:17.187591 PCI: 00:16.1: enabled 0
790 12:07:17.190463 PCI: 00:16.2: enabled 0
791 12:07:17.193818 PCI: 00:16.3: enabled 0
792 12:07:17.197261 PCI: 00:16.4: enabled 0
793 12:07:17.200478 PCI: 00:16.5: enabled 0
794 12:07:17.200598 PCI: 00:17.0: enabled 1
795 12:07:17.203761 PCI: 00:19.0: enabled 1
796 12:07:17.206704 I2C: 00:1a: enabled 1
797 12:07:17.210016 I2C: 00:38: enabled 1
798 12:07:17.210133 I2C: 00:39: enabled 1
799 12:07:17.213322 I2C: 00:3a: enabled 1
800 12:07:17.216564 I2C: 00:3b: enabled 1
801 12:07:17.219970 PCI: 00:19.1: enabled 0
802 12:07:17.223495 PCI: 00:19.2: enabled 0
803 12:07:17.223606 PCI: 00:1a.0: enabled 0
804 12:07:17.226077 PCI: 00:1c.0: enabled 0
805 12:07:17.229387 PCI: 00:1c.1: enabled 0
806 12:07:17.232648 PCI: 00:1c.2: enabled 0
807 12:07:17.235939 PCI: 00:1c.3: enabled 0
808 12:07:17.236028 PCI: 00:1c.4: enabled 0
809 12:07:17.239657 PCI: 00:1c.5: enabled 0
810 12:07:17.242413 PCI: 00:1c.6: enabled 0
811 12:07:17.246071 PCI: 00:1c.7: enabled 0
812 12:07:17.249167 PCI: 00:1d.0: enabled 1
813 12:07:17.249275 PCI: 00:1d.1: enabled 0
814 12:07:17.252691
815 12:07:17.252777 PCI: 00:1d.2: enabled 0
816 12:07:17.255581 PCI: 00:1d.3: enabled 0
817 12:07:17.259024 PCI: 00:1d.4: enabled 0
818 12:07:17.262344 PCI: 00:1d.5: enabled 1
819 12:07:17.265938 PCI: 00:00.0: enabled 1
820 12:07:17.266034 PCI: 00:1e.0: enabled 1
821 12:07:17.268441 PCI: 00:1e.1: enabled 0
822 12:07:17.272091 PCI: 00:1e.2: enabled 1
823 12:07:17.275536 SPI: 00: enabled 1
824 12:07:17.275634 PCI: 00:1e.3: enabled 1
825 12:07:17.278462
826 12:07:17.278545 SPI: 01: enabled 1
827 12:07:17.281906 PCI: 00:1f.0: enabled 1
828 12:07:17.285185 PNP: 0c09.0: enabled 1
829 12:07:17.288281 PCI: 00:1f.1: enabled 1
830 12:07:17.288362 PCI: 00:1f.2: enabled 1
831 12:07:17.291597 PCI: 00:1f.3: enabled 1
832 12:07:17.294640 PCI: 00:1f.4: enabled 1
833 12:07:17.297968 PCI: 00:1f.5: enabled 1
834 12:07:17.301222 PCI: 00:1f.6: enabled 0
835 12:07:17.301348 Root Device scanning...
836 12:07:17.304714 scan_static_bus for Root Device
837 12:07:17.307842 CPU_CLUSTER: 0 enabled
838 12:07:17.311208 DOMAIN: 0000 enabled
839 12:07:17.314764 DOMAIN: 0000 scanning...
840 12:07:17.317968 PCI: pci_scan_bus for bus 00
841 12:07:17.318073 PCI: 00:00.0 [8086/0000] ops
842 12:07:17.320937 PCI: 00:00.0 [8086/9b61] enabled
843 12:07:17.324221 PCI: 00:02.0 [8086/0000] bus ops
844 12:07:17.327299 PCI: 00:02.0 [8086/9b41] enabled
845 12:07:17.331268
846 12:07:17.334118 PCI: 00:04.0 [8086/1903] disabled
847 12:07:17.337197 PCI: 00:08.0 [8086/1911] enabled
848 12:07:17.340389 PCI: 00:12.0 [8086/02f9] enabled
849 12:07:17.343572 PCI: 00:14.0 [8086/0000] bus ops
850 12:07:17.346893 PCI: 00:14.0 [8086/02ed] enabled
851 12:07:17.350321 PCI: 00:14.2 [8086/02ef] enabled
852 12:07:17.353836 PCI: 00:14.3 [8086/02f0] enabled
853 12:07:17.356805 PCI: 00:15.0 [8086/0000] bus ops
854 12:07:17.360169 PCI: 00:15.0 [8086/02e8] enabled
855 12:07:17.363521 PCI: 00:15.1 [8086/0000] bus ops
856 12:07:17.366788 PCI: 00:15.1 [8086/02e9] enabled
857 12:07:17.370132 PCI: 00:16.0 [8086/0000] ops
858 12:07:17.373300 PCI: 00:16.0 [8086/02e0] enabled
859 12:07:17.376696 PCI: 00:17.0 [8086/0000] ops
860 12:07:17.379768 PCI: 00:17.0 [8086/02d3] enabled
861 12:07:17.382759 PCI: 00:19.0 [8086/0000] bus ops
862 12:07:17.386054 PCI: 00:19.0 [8086/02c5] enabled
863 12:07:17.389647 PCI: 00:1d.0 [8086/0000] bus ops
864 12:07:17.392703 PCI: 00:1d.0 [8086/02b0] enabled
865 12:07:17.396106 PCI: Static device PCI: 00:1d.5 not found, disabling it.
866 12:07:17.399538 PCI: 00:1e.0 [8086/0000] ops
867 12:07:17.402435 PCI: 00:1e.0 [8086/02a8] enabled
868 12:07:17.405748 PCI: 00:1e.2 [8086/0000] bus ops
869 12:07:17.408920 PCI: 00:1e.2 [8086/02aa] enabled
870 12:07:17.412342 PCI: 00:1e.3 [8086/0000] bus ops
871 12:07:17.415671 PCI: 00:1e.3 [8086/02ab] enabled
872 12:07:17.419115 PCI: 00:1f.0 [8086/0000] bus ops
873 12:07:17.422229 PCI: 00:1f.0 [8086/0284] enabled
874 12:07:17.428595 PCI: Static device PCI: 00:1f.1 not found, disabling it.
875 12:07:17.435699 PCI: Static device PCI: 00:1f.2 not found, disabling it.
876 12:07:17.438757 PCI: 00:1f.3 [8086/0000] bus ops
877 12:07:17.442105 PCI: 00:1f.3 [8086/02c8] enabled
878 12:07:17.444844 PCI: 00:1f.4 [8086/0000] bus ops
879 12:07:17.448289 PCI: 00:1f.4 [8086/02a3] enabled
880 12:07:17.451792 PCI: 00:1f.5 [8086/0000] bus ops
881 12:07:17.455131 PCI: 00:1f.5 [8086/02a4] enabled
882 12:07:17.457930 PCI: Leftover static devices:
883 12:07:17.458011 PCI: 00:05.0
884 12:07:17.461334 PCI: 00:12.5
885 12:07:17.461414 PCI: 00:12.6
886 12:07:17.464940 PCI: 00:14.1
887 12:07:17.465027 PCI: 00:14.5
888 12:07:17.465113 PCI: 00:15.2
889 12:07:17.467874 PCI: 00:15.3
890 12:07:17.467972 PCI: 00:16.1
891 12:07:17.471188 PCI: 00:16.2
892 12:07:17.471272 PCI: 00:16.3
893 12:07:17.471349 PCI: 00:16.4
894 12:07:17.474211
895 12:07:17.474296 PCI: 00:16.5
896 12:07:17.474363 PCI: 00:19.1
897 12:07:17.477729 PCI: 00:19.2
898 12:07:17.477815 PCI: 00:1a.0
899 12:07:17.481340 PCI: 00:1c.0
900 12:07:17.481423 PCI: 00:1c.1
901 12:07:17.481494 PCI: 00:1c.2
902 12:07:17.484220 PCI: 00:1c.3
903 12:07:17.484302 PCI: 00:1c.4
904 12:07:17.487663 PCI: 00:1c.5
905 12:07:17.487756 PCI: 00:1c.6
906 12:07:17.487824 PCI: 00:1c.7
907 12:07:17.490619
908 12:07:17.490709 PCI: 00:1d.1
909 12:07:17.490780 PCI: 00:1d.2
910 12:07:17.494164 PCI: 00:1d.3
911 12:07:17.494245 PCI: 00:1d.4
912 12:07:17.497565 PCI: 00:1d.5
913 12:07:17.497648 PCI: 00:1e.1
914 12:07:17.497718 PCI: 00:1f.1
915 12:07:17.500432 PCI: 00:1f.2
916 12:07:17.500513 PCI: 00:1f.6
917 12:07:17.503718 PCI: Check your devicetree.cb.
918 12:07:17.507222 PCI: 00:02.0 scanning...
919 12:07:17.510303 scan_generic_bus for PCI: 00:02.0
920 12:07:17.513737 scan_generic_bus for PCI: 00:02.0 done
921 12:07:17.520134 scan_bus: scanning of bus PCI: 00:02.0 took 10186 usecs
922 12:07:17.523453 PCI: 00:14.0 scanning...
923 12:07:17.526653 scan_static_bus for PCI: 00:14.0
924 12:07:17.529992 USB0 port 0 enabled
925 12:07:17.530094 USB0 port 0 scanning...
926 12:07:17.533284 scan_static_bus for USB0 port 0
927 12:07:17.536770 USB2 port 0 enabled
928 12:07:17.540081 USB2 port 1 enabled
929 12:07:17.540178 USB2 port 2 disabled
930 12:07:17.542685 USB2 port 3 disabled
931 12:07:17.545923 USB2 port 5 disabled
932 12:07:17.546003 USB2 port 6 enabled
933 12:07:17.549181 USB2 port 9 enabled
934 12:07:17.549284 USB3 port 0 enabled
935 12:07:17.552713 USB3 port 1 enabled
936 12:07:17.555842 USB3 port 2 enabled
937 12:07:17.555932 USB3 port 3 enabled
938 12:07:17.559223 USB3 port 4 disabled
939 12:07:17.562273 USB2 port 0 scanning...
940 12:07:17.566064 scan_static_bus for USB2 port 0
941 12:07:17.569520 scan_static_bus for USB2 port 0 done
942 12:07:17.575743 scan_bus: scanning of bus USB2 port 0 took 9686 usecs
943 12:07:17.575901 USB2 port 1 scanning...
944 12:07:17.579235 scan_static_bus for USB2 port 1
945 12:07:17.585252 scan_static_bus for USB2 port 1 done
946 12:07:17.588757 scan_bus: scanning of bus USB2 port 1 took 9688 usecs
947 12:07:17.591851 USB2 port 6 scanning...
948 12:07:17.595334 scan_static_bus for USB2 port 6
949 12:07:17.598506 scan_static_bus for USB2 port 6 done
950 12:07:17.604945 scan_bus: scanning of bus USB2 port 6 took 9697 usecs
951 12:07:17.607830 USB2 port 9 scanning...
952 12:07:17.611705 scan_static_bus for USB2 port 9
953 12:07:17.614556 scan_static_bus for USB2 port 9 done
954 12:07:17.617812 scan_bus: scanning of bus USB2 port 9 took 9706 usecs
955 12:07:17.621217 USB3 port 0 scanning...
956 12:07:17.624494 scan_static_bus for USB3 port 0
957 12:07:17.627809 scan_static_bus for USB3 port 0 done
958 12:07:17.634552 scan_bus: scanning of bus USB3 port 0 took 9694 usecs
959 12:07:17.637661 USB3 port 1 scanning...
960 12:07:17.640845 scan_static_bus for USB3 port 1
961 12:07:17.644129 scan_static_bus for USB3 port 1 done
962 12:07:17.650392 scan_bus: scanning of bus USB3 port 1 took 9695 usecs
963 12:07:17.650493 USB3 port 2 scanning...
964 12:07:17.653935 scan_static_bus for USB3 port 2
965 12:07:17.660451 scan_static_bus for USB3 port 2 done
966 12:07:17.663522 scan_bus: scanning of bus USB3 port 2 took 9688 usecs
967 12:07:17.667002 USB3 port 3 scanning...
968 12:07:17.670074 scan_static_bus for USB3 port 3
969 12:07:17.673220 scan_static_bus for USB3 port 3 done
970 12:07:17.679708 scan_bus: scanning of bus USB3 port 3 took 9705 usecs
971 12:07:17.683642 scan_static_bus for USB0 port 0 done
972 12:07:17.689510 scan_bus: scanning of bus USB0 port 0 took 155255 usecs
973 12:07:17.693312 scan_static_bus for PCI: 00:14.0 done
974 12:07:17.696320 scan_bus: scanning of bus PCI: 00:14.0 took 172855 usecs
975 12:07:17.699591 PCI: 00:15.0 scanning...
976 12:07:17.703105 scan_generic_bus for PCI: 00:15.0
977 12:07:17.709475 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
978 12:07:17.712747 scan_generic_bus for PCI: 00:15.0 done
979 12:07:17.715688 scan_bus: scanning of bus PCI: 00:15.0 took 14291 usecs
980 12:07:17.719017
981 12:07:17.719108 PCI: 00:15.1 scanning...
982 12:07:17.722270 scan_generic_bus for PCI: 00:15.1
983 12:07:17.729182 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
984 12:07:17.732107 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
985 12:07:17.735756 scan_generic_bus for PCI: 00:15.1 done
986 12:07:17.742242 scan_bus: scanning of bus PCI: 00:15.1 took 18595 usecs
987 12:07:17.745263 PCI: 00:19.0 scanning...
988 12:07:17.748523 scan_generic_bus for PCI: 00:19.0
989 12:07:17.752077 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
990 12:07:17.755522 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
991 12:07:17.761965 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
992 12:07:17.765033 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
993 12:07:17.768274 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
994 12:07:17.772021 scan_generic_bus for PCI: 00:19.0 done
995 12:07:17.777938 scan_bus: scanning of bus PCI: 00:19.0 took 30733 usecs
996 12:07:17.781633 PCI: 00:1d.0 scanning...
997 12:07:17.784237 do_pci_scan_bridge for PCI: 00:1d.0
998 12:07:17.787655 PCI: pci_scan_bus for bus 01
999 12:07:17.790893 PCI: 01:00.0 [1c5c/1327] enabled
1000 12:07:17.794253 Enabling Common Clock Configuration
1001 12:07:17.797385 L1 Sub-State supported from root port 29
1002 12:07:17.800812 L1 Sub-State Support = 0xf
1003 12:07:17.804220 CommonModeRestoreTime = 0x28
1004 12:07:17.807186 Power On Value = 0x16, Power On Scale = 0x0
1005 12:07:17.810356 ASPM: Enabled L1
1006 12:07:17.817213 scan_bus: scanning of bus PCI: 00:1d.0 took 32780 usecs
1007 12:07:17.817328 PCI: 00:1e.2 scanning...
1008 12:07:17.820541 scan_generic_bus for PCI: 00:1e.2
1009 12:07:17.823831
1010 12:07:17.827195 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1011 12:07:17.830505 scan_generic_bus for PCI: 00:1e.2 done
1012 12:07:17.836937 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
1013 12:07:17.837026 PCI: 00:1e.3 scanning...
1014 12:07:17.840220 scan_generic_bus for PCI: 00:1e.3
1015 12:07:17.846436 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1016 12:07:17.849858 scan_generic_bus for PCI: 00:1e.3 done
1017 12:07:17.856365 scan_bus: scanning of bus PCI: 00:1e.3 took 13994 usecs
1018 12:07:17.856459 PCI: 00:1f.0 scanning...
1019 12:07:17.859556 scan_static_bus for PCI: 00:1f.0
1020 12:07:17.863214 PNP: 0c09.0 enabled
1021 12:07:17.865924 scan_static_bus for PCI: 00:1f.0 done
1022 12:07:17.872682 scan_bus: scanning of bus PCI: 00:1f.0 took 12037 usecs
1023 12:07:17.876012 PCI: 00:1f.3 scanning...
1024 12:07:17.879312 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1025 12:07:17.882682 PCI: 00:1f.4 scanning...
1026 12:07:17.885706 scan_generic_bus for PCI: 00:1f.4
1027 12:07:17.892217 scan_generic_bus for PCI: 00:1f.4 done
1028 12:07:17.895888 scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
1029 12:07:17.898630 PCI: 00:1f.5 scanning...
1030 12:07:17.901959 scan_generic_bus for PCI: 00:1f.5
1031 12:07:17.905504 scan_generic_bus for PCI: 00:1f.5 done
1032 12:07:17.911674 scan_bus: scanning of bus PCI: 00:1f.5 took 10184 usecs
1033 12:07:17.918463 scan_bus: scanning of bus DOMAIN: 0000 took 604753 usecs
1034 12:07:17.921514 scan_static_bus for Root Device done
1035 12:07:17.928073 scan_bus: scanning of bus Root Device took 624606 usecs
1036 12:07:17.928159 done
1037 12:07:17.931539 Chrome EC: UHEPI supported
1038 12:07:17.937862 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1039 12:07:17.941067 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1040 12:07:17.947793 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1041 12:07:17.955011 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1042 12:07:17.958413 SPI flash protection: WPSW=0 SRP0=0
1043 12:07:17.964977 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1044 12:07:17.968200 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1045 12:07:17.971530 found VGA at PCI: 00:02.0
1046 12:07:17.974876 Setting up VGA for PCI: 00:02.0
1047 12:07:17.981207 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1048 12:07:17.984953 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1049 12:07:17.987984 Allocating resources...
1050 12:07:17.991181 Reading resources...
1051 12:07:17.994543 Root Device read_resources bus 0 link: 0
1052 12:07:17.997495 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1053 12:07:18.004502 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1054 12:07:18.007385 DOMAIN: 0000 read_resources bus 0 link: 0
1055 12:07:18.015167 PCI: 00:14.0 read_resources bus 0 link: 0
1056 12:07:18.018747 USB0 port 0 read_resources bus 0 link: 0
1057 12:07:18.026496 USB0 port 0 read_resources bus 0 link: 0 done
1058 12:07:18.029837 PCI: 00:14.0 read_resources bus 0 link: 0 done
1059 12:07:18.037573 PCI: 00:15.0 read_resources bus 1 link: 0
1060 12:07:18.040553 PCI: 00:15.0 read_resources bus 1 link: 0 done
1061 12:07:18.047226 PCI: 00:15.1 read_resources bus 2 link: 0
1062 12:07:18.050490 PCI: 00:15.1 read_resources bus 2 link: 0 done
1063 12:07:18.058364 PCI: 00:19.0 read_resources bus 3 link: 0
1064 12:07:18.064512 PCI: 00:19.0 read_resources bus 3 link: 0 done
1065 12:07:18.067702 PCI: 00:1d.0 read_resources bus 1 link: 0
1066 12:07:18.074748 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1067 12:07:18.077534 PCI: 00:1e.2 read_resources bus 4 link: 0
1068 12:07:18.084373 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1069 12:07:18.087253 PCI: 00:1e.3 read_resources bus 5 link: 0
1070 12:07:18.094020 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1071 12:07:18.097902 PCI: 00:1f.0 read_resources bus 0 link: 0
1072 12:07:18.103761 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1073 12:07:18.110634 DOMAIN: 0000 read_resources bus 0 link: 0 done
1074 12:07:18.113718 Root Device read_resources bus 0 link: 0 done
1075 12:07:18.116949 Done reading resources.
1076 12:07:18.123754 Show resources in subtree (Root Device)...After reading.
1077 12:07:18.126901 Root Device child on link 0 CPU_CLUSTER: 0
1078 12:07:18.129818 CPU_CLUSTER: 0 child on link 0 APIC: 00
1079 12:07:18.133497 APIC: 00
1080 12:07:18.133585 APIC: 03
1081 12:07:18.136552 APIC: 05
1082 12:07:18.136654 APIC: 01
1083 12:07:18.136752 APIC: 02
1084 12:07:18.139808 APIC: 04
1085 12:07:18.139899 APIC: 07
1086 12:07:18.139968 APIC: 06
1087 12:07:18.185632 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1088 12:07:18.186005 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1089 12:07:18.186095 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1090 12:07:18.186165 PCI: 00:00.0
1091 12:07:18.186884 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1092 12:07:18.189890 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1093 12:07:18.196108 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1094 12:07:18.202338 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1095 12:07:18.212217 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1096 12:07:18.221909 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1097 12:07:18.231624 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1098 12:07:18.242115 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1099 12:07:18.251269 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1100 12:07:18.257929 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1101 12:07:18.267597 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1102 12:07:18.277548 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1103 12:07:18.287153 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1104 12:07:18.297444 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1105 12:07:18.307127 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1106 12:07:18.317001 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1107 12:07:18.317090 PCI: 00:02.0
1108 12:07:18.326458 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1109 12:07:18.330030
1110 12:07:18.339574 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1111 12:07:18.345881 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1112 12:07:18.349065 PCI: 00:04.0
1113 12:07:18.349147 PCI: 00:08.0
1114 12:07:18.359135 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1115 12:07:18.362141 PCI: 00:12.0
1116 12:07:18.372051 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1117 12:07:18.375345 PCI: 00:14.0 child on link 0 USB0 port 0
1118 12:07:18.385159 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1119 12:07:18.391727 USB0 port 0 child on link 0 USB2 port 0
1120 12:07:18.391843 USB2 port 0
1121 12:07:18.394789 USB2 port 1
1122 12:07:18.394936 USB2 port 2
1123 12:07:18.398148 USB2 port 3
1124 12:07:18.398250 USB2 port 5
1125 12:07:18.401654 USB2 port 6
1126 12:07:18.401748 USB2 port 9
1127 12:07:18.404824 USB3 port 0
1128 12:07:18.404906 USB3 port 1
1129 12:07:18.407698
1130 12:07:18.407787 USB3 port 2
1131 12:07:18.411288 USB3 port 3
1132 12:07:18.411380 USB3 port 4
1133 12:07:18.414305 PCI: 00:14.2
1134 12:07:18.424257 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1135 12:07:18.433937 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1136 12:07:18.434027 PCI: 00:14.3
1137 12:07:18.443870 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1138 12:07:18.450652 PCI: 00:15.0 child on link 0 I2C: 01:15
1139 12:07:18.460310 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 12:07:18.460400 I2C: 01:15
1141 12:07:18.463953 PCI: 00:15.1 child on link 0 I2C: 02:5d
1142 12:07:18.473359 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1143 12:07:18.476360 I2C: 02:5d
1144 12:07:18.476445 GENERIC: 0.0
1145 12:07:18.479887 PCI: 00:16.0
1146 12:07:18.489269 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 12:07:18.492403 PCI: 00:17.0
1148 12:07:18.499687 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1149 12:07:18.508837 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1150 12:07:18.518727 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1151 12:07:18.525164 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1152 12:07:18.535162 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1153 12:07:18.541490 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1154 12:07:18.548420 PCI: 00:19.0 child on link 0 I2C: 03:1a
1155 12:07:18.557780 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 12:07:18.557870 I2C: 03:1a
1157 12:07:18.561113 I2C: 03:38
1158 12:07:18.561198 I2C: 03:39
1159 12:07:18.564691 I2C: 03:3a
1160 12:07:18.564774 I2C: 03:3b
1161 12:07:18.570905 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1162 12:07:18.577502 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1163 12:07:18.587341 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1164 12:07:18.597391 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1165 12:07:18.600346 PCI: 01:00.0
1166 12:07:18.609987 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 12:07:18.610095 PCI: 00:1e.0
1168 12:07:18.620438 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1169 12:07:18.623361
1170 12:07:18.632721 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1171 12:07:18.636168 PCI: 00:1e.2 child on link 0 SPI: 00
1172 12:07:18.646179 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1173 12:07:18.646265 SPI: 00
1174 12:07:18.649532 PCI: 00:1e.3 child on link 0 SPI: 01
1175 12:07:18.658996 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 12:07:18.662710 SPI: 01
1177 12:07:18.665376 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1178 12:07:18.675093 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1179 12:07:18.685459 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1180 12:07:18.685564 PNP: 0c09.0
1181 12:07:18.694712 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1182 12:07:18.694802 PCI: 00:1f.3
1183 12:07:18.704861 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1184 12:07:18.714050 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1185 12:07:18.717781 PCI: 00:1f.4
1186 12:07:18.727048 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1187 12:07:18.736945 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1188 12:07:18.737032 PCI: 00:1f.5
1189 12:07:18.747337 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1190 12:07:18.753376 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1191 12:07:18.759744 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1192 12:07:18.766500 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1193 12:07:18.770059 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1194 12:07:18.772901 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1195 12:07:18.776304 PCI: 00:17.0 18 * [0x60 - 0x67] io
1196 12:07:18.779280 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1197 12:07:18.789531 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1198 12:07:18.795570 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1199 12:07:18.802282 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1200 12:07:18.812387 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1201 12:07:18.818302 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1202 12:07:18.821840 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1203 12:07:18.828361 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1204 12:07:18.835101 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1205 12:07:18.838338 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1206 12:07:18.844482 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1207 12:07:18.847749 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1208 12:07:18.854249 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1209 12:07:18.858109 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1210 12:07:18.864530 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1211 12:07:18.867477 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1212 12:07:18.874286 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1213 12:07:18.877352 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1214 12:07:18.884363 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1215 12:07:18.887011 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1216 12:07:18.893681 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1217 12:07:18.896885 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1218 12:07:18.900376 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1219 12:07:18.904024
1220 12:07:18.906844 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1221 12:07:18.910301 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1222 12:07:18.913237
1223 12:07:18.916413 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1224 12:07:18.919789 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1225 12:07:18.926317 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1226 12:07:18.929601 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1227 12:07:18.936423 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1228 12:07:18.939876 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1229 12:07:18.949376 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1230 12:07:18.953009 avoid_fixed_resources: DOMAIN: 0000
1231 12:07:18.958933 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1232 12:07:18.965827 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1233 12:07:18.972495 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1234 12:07:18.979172 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1235 12:07:18.988832 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1236 12:07:18.994865 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1237 12:07:19.001550 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1238 12:07:19.011760 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1239 12:07:19.017961 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1240 12:07:19.025146 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1241 12:07:19.034141 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1242 12:07:19.040869 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1243 12:07:19.043871 Setting resources...
1244 12:07:19.050921 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1245 12:07:19.053595 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1246 12:07:19.057187 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1247 12:07:19.060394 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1248 12:07:19.063541 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1249 12:07:19.070220 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1250 12:07:19.076455 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1251 12:07:19.083268 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1252 12:07:19.089776 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1253 12:07:19.093251
1254 12:07:19.096301 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1255 12:07:19.102636 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1256 12:07:19.105982 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1257 12:07:19.112359 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1258 12:07:19.115937 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1259 12:07:19.122752 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1260 12:07:19.125474 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1261 12:07:19.131861 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1262 12:07:19.135595 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1263 12:07:19.141959 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1264 12:07:19.144845 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1265 12:07:19.152165 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1266 12:07:19.154981 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1267 12:07:19.158324 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1268 12:07:19.164737 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1269 12:07:19.167697 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1270 12:07:19.174764 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1271 12:07:19.177914 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1272 12:07:19.184358 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1273 12:07:19.187668 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1274 12:07:19.193909 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1275 12:07:19.197390 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1276 12:07:19.204150 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1277 12:07:19.210241 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1278 12:07:19.216756 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1279 12:07:19.226846 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1280 12:07:19.232980 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1281 12:07:19.236498 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1282 12:07:19.246247 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1283 12:07:19.249340 Root Device assign_resources, bus 0 link: 0
1284 12:07:19.252642 DOMAIN: 0000 assign_resources, bus 0 link: 0
1285 12:07:19.255982
1286 12:07:19.262451 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1287 12:07:19.272354 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1288 12:07:19.278817 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1289 12:07:19.288583 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1290 12:07:19.295084 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1291 12:07:19.305462 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1292 12:07:19.308318 PCI: 00:14.0 assign_resources, bus 0 link: 0
1293 12:07:19.311993 PCI: 00:14.0 assign_resources, bus 0 link: 0
1294 12:07:19.314837
1295 12:07:19.321805 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1296 12:07:19.327868 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1297 12:07:19.337879 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1298 12:07:19.344515 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1299 12:07:19.348152
1300 12:07:19.351324 PCI: 00:15.0 assign_resources, bus 1 link: 0
1301 12:07:19.354189 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 12:07:19.364045 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1303 12:07:19.367487 PCI: 00:15.1 assign_resources, bus 2 link: 0
1304 12:07:19.373845 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 12:07:19.380865 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1306 12:07:19.390237 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1307 12:07:19.396529 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1308 12:07:19.403231 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1309 12:07:19.412912 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1310 12:07:19.419674 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1311 12:07:19.429108 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1312 12:07:19.436016 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1313 12:07:19.439090 PCI: 00:19.0 assign_resources, bus 3 link: 0
1314 12:07:19.445912 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 12:07:19.455580 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1316 12:07:19.462334 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1317 12:07:19.471974 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1318 12:07:19.475602 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1319 12:07:19.485063 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1320 12:07:19.488606 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 12:07:19.497934 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1322 12:07:19.504735 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1323 12:07:19.511092 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1324 12:07:19.514320 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 12:07:19.523928 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1326 12:07:19.527272 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1327 12:07:19.533678 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 12:07:19.536883 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1329 12:07:19.543649 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 12:07:19.546865 LPC: Trying to open IO window from 800 size 1ff
1331 12:07:19.556761 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1332 12:07:19.562983 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1333 12:07:19.573077 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1334 12:07:19.579561 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1335 12:07:19.585724 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 12:07:19.589097 Root Device assign_resources, bus 0 link: 0
1337 12:07:19.592439 Done setting resources.
1338 12:07:19.598750 Show resources in subtree (Root Device)...After assigning values.
1339 12:07:19.602448 Root Device child on link 0 CPU_CLUSTER: 0
1340 12:07:19.605828 CPU_CLUSTER: 0 child on link 0 APIC: 00
1341 12:07:19.608751 APIC: 00
1342 12:07:19.608823 APIC: 03
1343 12:07:19.611745 APIC: 05
1344 12:07:19.611815 APIC: 01
1345 12:07:19.611876 APIC: 02
1346 12:07:19.615034 APIC: 04
1347 12:07:19.615105 APIC: 07
1348 12:07:19.615166 APIC: 06
1349 12:07:19.618558
1350 12:07:19.621575 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 12:07:19.631413 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 12:07:19.641020 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 12:07:19.644777 PCI: 00:00.0
1354 12:07:19.654015 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 12:07:19.661042 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 12:07:19.664137
1357 12:07:19.670854 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 12:07:19.680336 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 12:07:19.690499 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 12:07:19.699939 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 12:07:19.709592 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 12:07:19.719403 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 12:07:19.729230 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 12:07:19.736029 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 12:07:19.745721 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 12:07:19.755543 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 12:07:19.765533 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 12:07:19.775010 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 12:07:19.784931 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 12:07:19.795020 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 12:07:19.795111 PCI: 00:02.0
1372 12:07:19.804911 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 12:07:19.817773 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 12:07:19.825016 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 12:07:19.827841 PCI: 00:04.0
1376 12:07:19.827917 PCI: 00:08.0
1377 12:07:19.837634 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 12:07:19.840958 PCI: 00:12.0
1379 12:07:19.850846 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 12:07:19.854491 PCI: 00:14.0 child on link 0 USB0 port 0
1381 12:07:19.867502 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 12:07:19.870635 USB0 port 0 child on link 0 USB2 port 0
1383 12:07:19.873996 USB2 port 0
1384 12:07:19.874119 USB2 port 1
1385 12:07:19.876686 USB2 port 2
1386 12:07:19.876807 USB2 port 3
1387 12:07:19.880252 USB2 port 5
1388 12:07:19.880337 USB2 port 6
1389 12:07:19.883305 USB2 port 9
1390 12:07:19.883383 USB3 port 0
1391 12:07:19.886821 USB3 port 1
1392 12:07:19.886898 USB3 port 2
1393 12:07:19.889764 USB3 port 3
1394 12:07:19.889847 USB3 port 4
1395 12:07:19.892994 PCI: 00:14.2
1396 12:07:19.902944 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 12:07:19.912885 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 12:07:19.915843 PCI: 00:14.3
1399 12:07:19.926000 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 12:07:19.929083 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 12:07:19.939043 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 12:07:19.942310 I2C: 01:15
1403 12:07:19.945574 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 12:07:19.955476 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 12:07:19.958339 I2C: 02:5d
1406 12:07:19.958425 GENERIC: 0.0
1407 12:07:19.961982 PCI: 00:16.0
1408 12:07:19.971529 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 12:07:19.974547 PCI: 00:17.0
1410 12:07:19.984691 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 12:07:19.994467 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 12:07:20.004081 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 12:07:20.010415 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 12:07:20.020375 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 12:07:20.029814 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 12:07:20.036932 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 12:07:20.046337 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 12:07:20.046462 I2C: 03:1a
1419 12:07:20.049641 I2C: 03:38
1420 12:07:20.049713 I2C: 03:39
1421 12:07:20.052843 I2C: 03:3a
1422 12:07:20.052919 I2C: 03:3b
1423 12:07:20.059678 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 12:07:20.066043 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 12:07:20.075860 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 12:07:20.088906 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 12:07:20.088996 PCI: 01:00.0
1428 12:07:20.098227 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 12:07:20.101633 PCI: 00:1e.0
1430 12:07:20.111455 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 12:07:20.121150 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 12:07:20.127834 PCI: 00:1e.2 child on link 0 SPI: 00
1433 12:07:20.137588 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 12:07:20.137670 SPI: 00
1435 12:07:20.140635 PCI: 00:1e.3 child on link 0 SPI: 01
1436 12:07:20.153813 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 12:07:20.153900 SPI: 01
1438 12:07:20.156793 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 12:07:20.167054 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 12:07:20.176466 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 12:07:20.176555 PNP: 0c09.0
1442 12:07:20.186793 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 12:07:20.186879 PCI: 00:1f.3
1444 12:07:20.199817 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 12:07:20.209244 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 12:07:20.209364 PCI: 00:1f.4
1447 12:07:20.218999 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 12:07:20.229241 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 12:07:20.232036 PCI: 00:1f.5
1450 12:07:20.242006 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 12:07:20.245432 Done allocating resources.
1452 12:07:20.248218 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 12:07:20.251596 Enabling resources...
1454 12:07:20.258507 PCI: 00:00.0 subsystem <- 8086/9b61
1455 12:07:20.258587 PCI: 00:00.0 cmd <- 06
1456 12:07:20.261561 PCI: 00:02.0 subsystem <- 8086/9b41
1457 12:07:20.265118 PCI: 00:02.0 cmd <- 03
1458 12:07:20.268509 PCI: 00:08.0 cmd <- 06
1459 12:07:20.271875 PCI: 00:12.0 subsystem <- 8086/02f9
1460 12:07:20.274747 PCI: 00:12.0 cmd <- 02
1461 12:07:20.277898 PCI: 00:14.0 subsystem <- 8086/02ed
1462 12:07:20.281126 PCI: 00:14.0 cmd <- 02
1463 12:07:20.284586 PCI: 00:14.2 cmd <- 02
1464 12:07:20.287731 PCI: 00:14.3 subsystem <- 8086/02f0
1465 12:07:20.291347 PCI: 00:14.3 cmd <- 02
1466 12:07:20.294851 PCI: 00:15.0 subsystem <- 8086/02e8
1467 12:07:20.294931 PCI: 00:15.0 cmd <- 02
1468 12:07:20.297212
1469 12:07:20.300458 PCI: 00:15.1 subsystem <- 8086/02e9
1470 12:07:20.300545 PCI: 00:15.1 cmd <- 02
1471 12:07:20.307635 PCI: 00:16.0 subsystem <- 8086/02e0
1472 12:07:20.307715 PCI: 00:16.0 cmd <- 02
1473 12:07:20.310606 PCI: 00:17.0 subsystem <- 8086/02d3
1474 12:07:20.313961 PCI: 00:17.0 cmd <- 03
1475 12:07:20.317430 PCI: 00:19.0 subsystem <- 8086/02c5
1476 12:07:20.320827 PCI: 00:19.0 cmd <- 02
1477 12:07:20.323654 PCI: 00:1d.0 bridge ctrl <- 0013
1478 12:07:20.327230 PCI: 00:1d.0 subsystem <- 8086/02b0
1479 12:07:20.330208 PCI: 00:1d.0 cmd <- 06
1480 12:07:20.333807 PCI: 00:1e.0 subsystem <- 8086/02a8
1481 12:07:20.337055 PCI: 00:1e.0 cmd <- 06
1482 12:07:20.340163 PCI: 00:1e.2 subsystem <- 8086/02aa
1483 12:07:20.343525 PCI: 00:1e.2 cmd <- 06
1484 12:07:20.346490 PCI: 00:1e.3 subsystem <- 8086/02ab
1485 12:07:20.349770 PCI: 00:1e.3 cmd <- 02
1486 12:07:20.353006 PCI: 00:1f.0 subsystem <- 8086/0284
1487 12:07:20.356472 PCI: 00:1f.0 cmd <- 407
1488 12:07:20.359510 PCI: 00:1f.3 subsystem <- 8086/02c8
1489 12:07:20.363041 PCI: 00:1f.3 cmd <- 02
1490 12:07:20.366502 PCI: 00:1f.4 subsystem <- 8086/02a3
1491 12:07:20.369625 PCI: 00:1f.4 cmd <- 03
1492 12:07:20.373038 PCI: 00:1f.5 subsystem <- 8086/02a4
1493 12:07:20.373139 PCI: 00:1f.5 cmd <- 406
1494 12:07:20.383229 PCI: 01:00.0 cmd <- 02
1495 12:07:20.388896 done.
1496 12:07:20.398613 ME: Version: 14.0.39.1367
1497 12:07:20.404991 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1498 12:07:20.408009 Initializing devices...
1499 12:07:20.408089 Root Device init ...
1500 12:07:20.414422 Chrome EC: Set SMI mask to 0x0000000000000000
1501 12:07:20.417960 Chrome EC: clear events_b mask to 0x0000000000000000
1502 12:07:20.424644 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1503 12:07:20.431491 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1504 12:07:20.437733 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1505 12:07:20.441330 Chrome EC: Set WAKE mask to 0x0000000000000000
1506 12:07:20.444340 Root Device init finished in 35168 usecs
1507 12:07:20.447845
1508 12:07:20.447931 CPU_CLUSTER: 0 init ...
1509 12:07:20.453987 CPU_CLUSTER: 0 init finished in 2449 usecs
1510 12:07:20.459027 PCI: 00:00.0 init ...
1511 12:07:20.461956 CPU TDP: 15 Watts
1512 12:07:20.465380 CPU PL2 = 64 Watts
1513 12:07:20.468781 PCI: 00:00.0 init finished in 7077 usecs
1514 12:07:20.472170 PCI: 00:02.0 init ...
1515 12:07:20.475073 PCI: 00:02.0 init finished in 2254 usecs
1516 12:07:20.478551 PCI: 00:08.0 init ...
1517 12:07:20.482179 PCI: 00:08.0 init finished in 2254 usecs
1518 12:07:20.484770 PCI: 00:12.0 init ...
1519 12:07:20.488248 PCI: 00:12.0 init finished in 2254 usecs
1520 12:07:20.491796 PCI: 00:14.0 init ...
1521 12:07:20.494984 PCI: 00:14.0 init finished in 2253 usecs
1522 12:07:20.498264 PCI: 00:14.2 init ...
1523 12:07:20.501335 PCI: 00:14.2 init finished in 2252 usecs
1524 12:07:20.504741 PCI: 00:14.3 init ...
1525 12:07:20.507959 PCI: 00:14.3 init finished in 2270 usecs
1526 12:07:20.511286 PCI: 00:15.0 init ...
1527 12:07:20.514707 DW I2C bus 0 at 0xd121f000 (400 KHz)
1528 12:07:20.521376 PCI: 00:15.0 init finished in 5979 usecs
1529 12:07:20.521459 PCI: 00:15.1 init ...
1530 12:07:20.527799 DW I2C bus 1 at 0xd1220000 (400 KHz)
1531 12:07:20.530764 PCI: 00:15.1 init finished in 5976 usecs
1532 12:07:20.534130 PCI: 00:16.0 init ...
1533 12:07:20.537752 PCI: 00:16.0 init finished in 2252 usecs
1534 12:07:20.540499 PCI: 00:19.0 init ...
1535 12:07:20.543620 DW I2C bus 4 at 0xd1222000 (400 KHz)
1536 12:07:20.547187 PCI: 00:19.0 init finished in 5977 usecs
1537 12:07:20.550282 PCI: 00:1d.0 init ...
1538 12:07:20.553954 Initializing PCH PCIe bridge.
1539 12:07:20.556673 PCI: 00:1d.0 init finished in 5287 usecs
1540 12:07:20.560588 PCI: 00:1f.0 init ...
1541 12:07:20.564457 IOAPIC: Initializing IOAPIC at 0xfec00000
1542 12:07:20.570453 IOAPIC: Bootstrap Processor Local APIC = 0x00
1543 12:07:20.570533 IOAPIC: ID = 0x02
1544 12:07:20.574151 IOAPIC: Dumping registers
1545 12:07:20.577448 reg 0x0000: 0x02000000
1546 12:07:20.580136 reg 0x0001: 0x00770020
1547 12:07:20.583862 reg 0x0002: 0x00000000
1548 12:07:20.586680 PCI: 00:1f.0 init finished in 23536 usecs
1549 12:07:20.590049 PCI: 00:1f.4 init ...
1550 12:07:20.593288 PCI: 00:1f.4 init finished in 2264 usecs
1551 12:07:20.605286 PCI: 01:00.0 init ...
1552 12:07:20.608313 PCI: 01:00.0 init finished in 2252 usecs
1553 12:07:20.612469 PNP: 0c09.0 init ...
1554 12:07:20.615727 Google Chrome EC uptime: 11.142 seconds
1555 12:07:20.619137
1556 12:07:20.622515 Google Chrome AP resets since EC boot: 0
1557 12:07:20.625820 Google Chrome most recent AP reset causes:
1558 12:07:20.632388 Google Chrome EC reset flags at last EC boot: reset-pin
1559 12:07:20.635855 PNP: 0c09.0 init finished in 20608 usecs
1560 12:07:20.638555 Devices initialized
1561 12:07:20.642151 Show all devs... After init.
1562 12:07:20.642238 Root Device: enabled 1
1563 12:07:20.645185 CPU_CLUSTER: 0: enabled 1
1564 12:07:20.648765 DOMAIN: 0000: enabled 1
1565 12:07:20.652158 APIC: 00: enabled 1
1566 12:07:20.652240 PCI: 00:00.0: enabled 1
1567 12:07:20.654679 PCI: 00:02.0: enabled 1
1568 12:07:20.658236 PCI: 00:04.0: enabled 0
1569 12:07:20.661585 PCI: 00:05.0: enabled 0
1570 12:07:20.661667 PCI: 00:12.0: enabled 1
1571 12:07:20.664506 PCI: 00:12.5: enabled 0
1572 12:07:20.667983 PCI: 00:12.6: enabled 0
1573 12:07:20.668065 PCI: 00:14.0: enabled 1
1574 12:07:20.671304
1575 12:07:20.671388 PCI: 00:14.1: enabled 0
1576 12:07:20.674922 PCI: 00:14.3: enabled 1
1577 12:07:20.677554 PCI: 00:14.5: enabled 0
1578 12:07:20.677639 PCI: 00:15.0: enabled 1
1579 12:07:20.681107
1580 12:07:20.681188 PCI: 00:15.1: enabled 1
1581 12:07:20.684018 PCI: 00:15.2: enabled 0
1582 12:07:20.687716 PCI: 00:15.3: enabled 0
1583 12:07:20.687803 PCI: 00:16.0: enabled 1
1584 12:07:20.690532
1585 12:07:20.690615 PCI: 00:16.1: enabled 0
1586 12:07:20.694127 PCI: 00:16.2: enabled 0
1587 12:07:20.697312 PCI: 00:16.3: enabled 0
1588 12:07:20.697395 PCI: 00:16.4: enabled 0
1589 12:07:20.700747 PCI: 00:16.5: enabled 0
1590 12:07:20.703694 PCI: 00:17.0: enabled 1
1591 12:07:20.707362 PCI: 00:19.0: enabled 1
1592 12:07:20.707446 PCI: 00:19.1: enabled 0
1593 12:07:20.710666 PCI: 00:19.2: enabled 0
1594 12:07:20.713304 PCI: 00:1a.0: enabled 0
1595 12:07:20.716998 PCI: 00:1c.0: enabled 0
1596 12:07:20.717087 PCI: 00:1c.1: enabled 0
1597 12:07:20.720161 PCI: 00:1c.2: enabled 0
1598 12:07:20.723244 PCI: 00:1c.3: enabled 0
1599 12:07:20.726655 PCI: 00:1c.4: enabled 0
1600 12:07:20.726735 PCI: 00:1c.5: enabled 0
1601 12:07:20.730235 PCI: 00:1c.6: enabled 0
1602 12:07:20.733042 PCI: 00:1c.7: enabled 0
1603 12:07:20.736756 PCI: 00:1d.0: enabled 1
1604 12:07:20.736837 PCI: 00:1d.1: enabled 0
1605 12:07:20.739438 PCI: 00:1d.2: enabled 0
1606 12:07:20.742847 PCI: 00:1d.3: enabled 0
1607 12:07:20.745941 PCI: 00:1d.4: enabled 0
1608 12:07:20.746026 PCI: 00:1d.5: enabled 0
1609 12:07:20.749705 PCI: 00:1e.0: enabled 1
1610 12:07:20.752462 PCI: 00:1e.1: enabled 0
1611 12:07:20.756547 PCI: 00:1e.2: enabled 1
1612 12:07:20.756663 PCI: 00:1e.3: enabled 1
1613 12:07:20.759006 PCI: 00:1f.0: enabled 1
1614 12:07:20.762458 PCI: 00:1f.1: enabled 0
1615 12:07:20.765642 PCI: 00:1f.2: enabled 0
1616 12:07:20.765727 PCI: 00:1f.3: enabled 1
1617 12:07:20.769001 PCI: 00:1f.4: enabled 1
1618 12:07:20.772406 PCI: 00:1f.5: enabled 1
1619 12:07:20.775840 PCI: 00:1f.6: enabled 0
1620 12:07:20.775939 USB0 port 0: enabled 1
1621 12:07:20.778638 I2C: 01:15: enabled 1
1622 12:07:20.782228 I2C: 02:5d: enabled 1
1623 12:07:20.782312 GENERIC: 0.0: enabled 1
1624 12:07:20.785087
1625 12:07:20.785171 I2C: 03:1a: enabled 1
1626 12:07:20.788558 I2C: 03:38: enabled 1
1627 12:07:20.791842 I2C: 03:39: enabled 1
1628 12:07:20.791927 I2C: 03:3a: enabled 1
1629 12:07:20.795563 I2C: 03:3b: enabled 1
1630 12:07:20.798272 PCI: 00:00.0: enabled 1
1631 12:07:20.798356 SPI: 00: enabled 1
1632 12:07:20.801458 SPI: 01: enabled 1
1633 12:07:20.805005 PNP: 0c09.0: enabled 1
1634 12:07:20.805090 USB2 port 0: enabled 1
1635 12:07:20.807842 USB2 port 1: enabled 1
1636 12:07:20.811060 USB2 port 2: enabled 0
1637 12:07:20.811144 USB2 port 3: enabled 0
1638 12:07:20.814307 USB2 port 5: enabled 0
1639 12:07:20.817919 USB2 port 6: enabled 1
1640 12:07:20.821152 USB2 port 9: enabled 1
1641 12:07:20.821236 USB3 port 0: enabled 1
1642 12:07:20.824184 USB3 port 1: enabled 1
1643 12:07:20.827482 USB3 port 2: enabled 1
1644 12:07:20.827566 USB3 port 3: enabled 1
1645 12:07:20.831292 USB3 port 4: enabled 0
1646 12:07:20.833969 APIC: 03: enabled 1
1647 12:07:20.834059 APIC: 05: enabled 1
1648 12:07:20.837472 APIC: 01: enabled 1
1649 12:07:20.840624 APIC: 02: enabled 1
1650 12:07:20.840708 APIC: 04: enabled 1
1651 12:07:20.843830 APIC: 07: enabled 1
1652 12:07:20.847228 APIC: 06: enabled 1
1653 12:07:20.847312 PCI: 00:08.0: enabled 1
1654 12:07:20.850717 PCI: 00:14.2: enabled 1
1655 12:07:20.853623 PCI: 01:00.0: enabled 1
1656 12:07:20.857146 Disabling ACPI via APMC:
1657 12:07:20.860345 done.
1658 12:07:20.863626 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1659 12:07:20.866797 ELOG: NV offset 0xaf0000 size 0x4000
1660 12:07:20.873979 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1661 12:07:20.880941 ELOG: Event(17) added with size 13 at 2023-01-24 12:07:20 UTC
1662 12:07:20.887380 ELOG: Event(92) added with size 9 at 2023-01-24 12:07:20 UTC
1663 12:07:20.893782 ELOG: Event(93) added with size 9 at 2023-01-24 12:07:20 UTC
1664 12:07:20.900621 ELOG: Event(9A) added with size 9 at 2023-01-24 12:07:20 UTC
1665 12:07:20.907162 ELOG: Event(9E) added with size 10 at 2023-01-24 12:07:20 UTC
1666 12:07:20.913744 ELOG: Event(9F) added with size 14 at 2023-01-24 12:07:20 UTC
1667 12:07:20.919850 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1668 12:07:20.926432 ELOG: Event(A1) added with size 10 at 2023-01-24 12:07:20 UTC
1669 12:07:20.932929 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1670 12:07:20.939681 ELOG: Event(A0) added with size 9 at 2023-01-24 12:07:20 UTC
1671 12:07:20.942939 elog_add_boot_reason: Logged dev mode boot
1672 12:07:20.946267 Finalize devices...
1673 12:07:20.949289 PCI: 00:17.0 final
1674 12:07:20.949374 Devices finalized
1675 12:07:20.955602 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1676 12:07:20.958957 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1677 12:07:20.965694 ME: HFSTS1 : 0x90000245
1678 12:07:20.969182 ME: HFSTS2 : 0x3B850126
1679 12:07:20.972248 ME: HFSTS3 : 0x00000020
1680 12:07:20.975851 ME: HFSTS4 : 0x00004800
1681 12:07:20.981769 ME: HFSTS5 : 0x00000000
1682 12:07:20.985612 ME: HFSTS6 : 0x40400006
1683 12:07:20.988533 ME: Manufacturing Mode : NO
1684 12:07:20.991845 ME: FW Partition Table : OK
1685 12:07:20.995052 ME: Bringup Loader Failure : NO
1686 12:07:20.998318 ME: Firmware Init Complete : YES
1687 12:07:21.001503 ME: Boot Options Present : NO
1688 12:07:21.004927 ME: Update In Progress : NO
1689 12:07:21.008396 ME: D0i3 Support : YES
1690 12:07:21.011117 ME: Low Power State Enabled : NO
1691 12:07:21.014541 ME: CPU Replaced : NO
1692 12:07:21.017813 ME: CPU Replacement Valid : YES
1693 12:07:21.021292 ME: Current Working State : 5
1694 12:07:21.024674 ME: Current Operation State : 1
1695 12:07:21.028006 ME: Current Operation Mode : 0
1696 12:07:21.031370 ME: Error Code : 0
1697 12:07:21.034372 ME: CPU Debug Disabled : YES
1698 12:07:21.037423 ME: TXT Support : NO
1699 12:07:21.044344 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1700 12:07:21.047065 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 12:07:21.050459 CBFS @ c08000 size 3f8000
1702 12:07:21.057026 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 12:07:21.060490 CBFS: Locating 'fallback/dsdt.aml'
1704 12:07:21.063666 CBFS: Found @ offset 10bb80 size 3fa5
1705 12:07:21.070272 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 12:07:21.073209 CBFS @ c08000 size 3f8000
1707 12:07:21.079701 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 12:07:21.079783 CBFS: Locating 'fallback/slic'
1709 12:07:21.082884
1710 12:07:21.086039 CBFS: 'fallback/slic' not found.
1711 12:07:21.089510 ACPI: Writing ACPI tables at 99b3e000.
1712 12:07:21.093023 ACPI: * FACS
1713 12:07:21.093096 ACPI: * DSDT
1714 12:07:21.099412 Ramoops buffer: 0x100000@0x99a3d000.
1715 12:07:21.102628 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1716 12:07:21.106157 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1717 12:07:21.109337 Google Chrome EC: version:
1718 12:07:21.112957 ro: helios_v2.0.2659-56403530b
1719 12:07:21.115761 rw: helios_v2.0.2849-c41de27e7d
1720 12:07:21.119016 running image: 1
1721 12:07:21.122584 ACPI: * FADT
1722 12:07:21.122669 SCI is IRQ9
1723 12:07:21.129231 ACPI: added table 1/32, length now 40
1724 12:07:21.129325 ACPI: * SSDT
1725 12:07:21.132274 Found 1 CPU(s) with 8 core(s) each.
1726 12:07:21.135463 Error: Could not locate 'wifi_sar' in VPD.
1727 12:07:21.142131 Checking CBFS for default SAR values
1728 12:07:21.145376 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1729 12:07:21.148602 CBFS @ c08000 size 3f8000
1730 12:07:21.155121 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1731 12:07:21.158665 CBFS: Locating 'wifi_sar_defaults.hex'
1732 12:07:21.161903 CBFS: Found @ offset 5fac0 size 77
1733 12:07:21.164669 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1734 12:07:21.171974 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1735 12:07:21.174670 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1736 12:07:21.181126 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1737 12:07:21.184780 failed to find key in VPD: dsm_calib_r0_0
1738 12:07:21.194250 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1739 12:07:21.201133 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1740 12:07:21.204128 failed to find key in VPD: dsm_calib_r0_1
1741 12:07:21.210575 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1742 12:07:21.217443 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1743 12:07:21.220446 failed to find key in VPD: dsm_calib_r0_2
1744 12:07:21.229973 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1745 12:07:21.237167 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1746 12:07:21.239920 failed to find key in VPD: dsm_calib_r0_3
1747 12:07:21.249886 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1748 12:07:21.252688 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1749 12:07:21.259847 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1750 12:07:21.263196 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1751 12:07:21.266393 EC returned error result code 1
1752 12:07:21.269420 EC returned error result code 1
1753 12:07:21.272992 EC returned error result code 1
1754 12:07:21.279387 PS2K: Bad resp from EC. Vivaldi disabled!
1755 12:07:21.286056 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1756 12:07:21.288949 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1757 12:07:21.295744 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1758 12:07:21.298760 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1759 12:07:21.305675 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1760 12:07:21.312025 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1761 12:07:21.318919 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1762 12:07:21.325323 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1763 12:07:21.328460 ACPI: added table 2/32, length now 44
1764 12:07:21.328546 ACPI: * MCFG
1765 12:07:21.331701 ACPI: added table 3/32, length now 48
1766 12:07:21.335177 ACPI: * TPM2
1767 12:07:21.338059 TPM2 log created at 99a2d000
1768 12:07:21.341596 ACPI: added table 4/32, length now 52
1769 12:07:21.341684 ACPI: * MADT
1770 12:07:21.344508
1771 12:07:21.344588 SCI is IRQ9
1772 12:07:21.347896 ACPI: added table 5/32, length now 56
1773 12:07:21.351303 current = 99b43ac0
1774 12:07:21.351380 ACPI: * DMAR
1775 12:07:21.354271 ACPI: added table 6/32, length now 60
1776 12:07:21.357760 ACPI: * IGD OpRegion
1777 12:07:21.361310 GMA: Found VBT in CBFS
1778 12:07:21.364028 GMA: Found valid VBT in CBFS
1779 12:07:21.367613 ACPI: added table 7/32, length now 64
1780 12:07:21.367688 ACPI: * HPET
1781 12:07:21.373871 ACPI: added table 8/32, length now 68
1782 12:07:21.373949 ACPI: done.
1783 12:07:21.377213 ACPI tables: 31744 bytes.
1784 12:07:21.381378 smbios_write_tables: 99a2c000
1785 12:07:21.384179 EC returned error result code 3
1786 12:07:21.387487 Couldn't obtain OEM name from CBI
1787 12:07:21.390823 Create SMBIOS type 17
1788 12:07:21.393697 PCI: 00:00.0 (Intel Cannonlake)
1789 12:07:21.393786 PCI: 00:14.3 (Intel WiFi)
1790 12:07:21.397147 SMBIOS tables: 939 bytes.
1791 12:07:21.403362 Writing table forward entry at 0x00000500
1792 12:07:21.407056 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1793 12:07:21.413764 Writing coreboot table at 0x99b62000
1794 12:07:21.416716 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1795 12:07:21.423055 1. 0000000000001000-000000000009ffff: RAM
1796 12:07:21.426402 2. 00000000000a0000-00000000000fffff: RESERVED
1797 12:07:21.429902 3. 0000000000100000-0000000099a2bfff: RAM
1798 12:07:21.435902 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1799 12:07:21.442948 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1800 12:07:21.449435 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1801 12:07:21.452271 7. 000000009a000000-000000009f7fffff: RESERVED
1802 12:07:21.455835 8. 00000000e0000000-00000000efffffff: RESERVED
1803 12:07:21.462235 9. 00000000fc000000-00000000fc000fff: RESERVED
1804 12:07:21.465554 10. 00000000fe000000-00000000fe00ffff: RESERVED
1805 12:07:21.472365 11. 00000000fed10000-00000000fed17fff: RESERVED
1806 12:07:21.475229 12. 00000000fed80000-00000000fed83fff: RESERVED
1807 12:07:21.481639 13. 00000000fed90000-00000000fed91fff: RESERVED
1808 12:07:21.484992 14. 00000000feda0000-00000000feda1fff: RESERVED
1809 12:07:21.491736 15. 0000000100000000-000000045e7fffff: RAM
1810 12:07:21.494606 Graphics framebuffer located at 0xc0000000
1811 12:07:21.498277 Passing 5 GPIOs to payload:
1812 12:07:21.501550 NAME | PORT | POLARITY | VALUE
1813 12:07:21.507886 write protect | undefined | high | low
1814 12:07:21.514549 lid | undefined | high | high
1815 12:07:21.517914 power | undefined | high | low
1816 12:07:21.524144 oprom | undefined | high | low
1817 12:07:21.527595 EC in RW | 0x000000cb | high | low
1818 12:07:21.530956 Board ID: 4
1819 12:07:21.534140 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1820 12:07:21.537782 CBFS @ c08000 size 3f8000
1821 12:07:21.543966 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1822 12:07:21.550580 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56
1823 12:07:21.553862 coreboot table: 1492 bytes.
1824 12:07:21.556765 IMD ROOT 0. 99fff000 00001000
1825 12:07:21.560102 IMD SMALL 1. 99ffe000 00001000
1826 12:07:21.563289 FSP MEMORY 2. 99c4e000 003b0000
1827 12:07:21.566837 CONSOLE 3. 99c2e000 00020000
1828 12:07:21.570340 FMAP 4. 99c2d000 0000054e
1829 12:07:21.573280 TIME STAMP 5. 99c2c000 00000910
1830 12:07:21.576368 VBOOT WORK 6. 99c18000 00014000
1831 12:07:21.579913 MRC DATA 7. 99c16000 00001958
1832 12:07:21.583098 ROMSTG STCK 8. 99c15000 00001000
1833 12:07:21.586133 AFTER CAR 9. 99c0b000 0000a000
1834 12:07:21.589652 RAMSTAGE 10. 99baf000 0005c000
1835 12:07:21.592985 REFCODE 11. 99b7a000 00035000
1836 12:07:21.596448 SMM BACKUP 12. 99b6a000 00010000
1837 12:07:21.599253 COREBOOT 13. 99b62000 00008000
1838 12:07:21.602585 ACPI 14. 99b3e000 00024000
1839 12:07:21.605567 ACPI GNVS 15. 99b3d000 00001000
1840 12:07:21.609229 RAMOOPS 16. 99a3d000 00100000
1841 12:07:21.612083 TPM2 TCGLOG17. 99a2d000 00010000
1842 12:07:21.615354 SMBIOS 18. 99a2c000 00000800
1843 12:07:21.618552 IMD small region:
1844 12:07:21.621900 IMD ROOT 0. 99ffec00 00000400
1845 12:07:21.625625 FSP RUNTIME 1. 99ffebe0 00000004
1846 12:07:21.628461 EC HOSTEVENT 2. 99ffebc0 00000008
1847 12:07:21.632127 POWER STATE 3. 99ffeb80 00000040
1848 12:07:21.635079 ROMSTAGE 4. 99ffeb60 00000004
1849 12:07:21.638443 MEM INFO 5. 99ffe9a0 000001b9
1850 12:07:21.642077 VPD 6. 99ffe920 0000006c
1851 12:07:21.645641 MTRR: Physical address space:
1852 12:07:21.652048 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1853 12:07:21.658176 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1854 12:07:21.664737 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1855 12:07:21.670911 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1856 12:07:21.677994 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1857 12:07:21.684222 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1858 12:07:21.687805 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1859 12:07:21.691085
1860 12:07:21.693999 MTRR: Fixed MSR 0x250 0x0606060606060606
1861 12:07:21.697284 MTRR: Fixed MSR 0x258 0x0606060606060606
1862 12:07:21.700833 MTRR: Fixed MSR 0x259 0x0000000000000000
1863 12:07:21.703726 MTRR: Fixed MSR 0x268 0x0606060606060606
1864 12:07:21.710314 MTRR: Fixed MSR 0x269 0x0606060606060606
1865 12:07:21.713730 MTRR: Fixed MSR 0x26a 0x0606060606060606
1866 12:07:21.716851 MTRR: Fixed MSR 0x26b 0x0606060606060606
1867 12:07:21.720324 MTRR: Fixed MSR 0x26c 0x0606060606060606
1868 12:07:21.726462 MTRR: Fixed MSR 0x26d 0x0606060606060606
1869 12:07:21.730135 MTRR: Fixed MSR 0x26e 0x0606060606060606
1870 12:07:21.733456 MTRR: Fixed MSR 0x26f 0x0606060606060606
1871 12:07:21.736585 call enable_fixed_mtrr()
1872 12:07:21.739513 CPU physical address size: 39 bits
1873 12:07:21.746349 MTRR: default type WB/UC MTRR counts: 6/8.
1874 12:07:21.749816 MTRR: WB selected as default type.
1875 12:07:21.755901 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1876 12:07:21.762642 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1877 12:07:21.765972 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1878 12:07:21.772400 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1879 12:07:21.778874 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1880 12:07:21.785506 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1881 12:07:21.791826 MTRR: Fixed MSR 0x250 0x0606060606060606
1882 12:07:21.795237 MTRR: Fixed MSR 0x258 0x0606060606060606
1883 12:07:21.799122 MTRR: Fixed MSR 0x259 0x0000000000000000
1884 12:07:21.801730 MTRR: Fixed MSR 0x268 0x0606060606060606
1885 12:07:21.805203
1886 12:07:21.808064 MTRR: Fixed MSR 0x269 0x0606060606060606
1887 12:07:21.811613 MTRR: Fixed MSR 0x26a 0x0606060606060606
1888 12:07:21.814615 MTRR: Fixed MSR 0x26b 0x0606060606060606
1889 12:07:21.818010 MTRR: Fixed MSR 0x26c 0x0606060606060606
1890 12:07:21.821415
1891 12:07:21.824822 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 12:07:21.828284 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 12:07:21.830836 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 12:07:21.830921
1895 12:07:21.834596 MTRR check
1896 12:07:21.834682 Fixed MTRRs : Enabled
1897 12:07:21.837724
1898 12:07:21.837809 Variable MTRRs: Enabled
1899 12:07:21.837876
1900 12:07:21.841381 call enable_fixed_mtrr()
1901 12:07:21.847590 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 12:07:21.851199 CPU physical address size: 39 bits
1903 12:07:21.854451 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 12:07:21.860753 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 12:07:21.863831 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 12:07:21.867226 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 12:07:21.870765 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 12:07:21.877127 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 12:07:21.880153 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 12:07:21.883617 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 12:07:21.887076 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 12:07:21.893244 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 12:07:21.896869 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 12:07:21.899838 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 12:07:21.906554 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 12:07:21.909891 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 12:07:21.913058 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 12:07:21.916258 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 12:07:21.923246 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 12:07:21.926011 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 12:07:21.929236 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 12:07:21.932982 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 12:07:21.939161 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 12:07:21.942430 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 12:07:21.945828 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 12:07:21.948726 call enable_fixed_mtrr()
1927 12:07:21.952117 call enable_fixed_mtrr()
1928 12:07:21.955513 CBFS @ c08000 size 3f8000
1929 12:07:21.958574 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1930 12:07:21.962142 CBFS: Locating 'fallback/payload'
1931 12:07:21.965467 CPU physical address size: 39 bits
1932 12:07:21.971777 CPU physical address size: 39 bits
1933 12:07:21.974872 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 12:07:21.978397 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 12:07:21.981610 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 12:07:21.987947 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 12:07:21.991261 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 12:07:21.994666 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 12:07:21.998231 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 12:07:22.004360 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 12:07:22.007866 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 12:07:22.011176 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 12:07:22.013955 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 12:07:22.020938 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 12:07:22.023864 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 12:07:22.027835 call enable_fixed_mtrr()
1947 12:07:22.030447 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 12:07:22.033945 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 12:07:22.040726 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 12:07:22.043742 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 12:07:22.046897 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 12:07:22.050085 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 12:07:22.056474 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 12:07:22.059921 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 12:07:22.062999 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 12:07:22.066186 CPU physical address size: 39 bits
1957 12:07:22.070493 call enable_fixed_mtrr()
1958 12:07:22.073431 CBFS: Found @ offset 1c96c0 size 3f798
1959 12:07:22.076374 CPU physical address size: 39 bits
1960 12:07:22.082884 Checking segment from ROM address 0xffdd16f8
1961 12:07:22.086354 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 12:07:22.089333 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 12:07:22.092866 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 12:07:22.095944
1965 12:07:22.099179 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 12:07:22.102384 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 12:07:22.105435 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 12:07:22.112372 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 12:07:22.115262 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 12:07:22.118735 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 12:07:22.122027 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 12:07:22.128774 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 12:07:22.131946 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 12:07:22.135437 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 12:07:22.138174 call enable_fixed_mtrr()
1976 12:07:22.141563 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 12:07:22.144695 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 12:07:22.151830 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 12:07:22.155187 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 12:07:22.157849 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 12:07:22.160954 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 12:07:22.167788 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 12:07:22.170854 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 12:07:22.173972 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 12:07:22.177594 CPU physical address size: 39 bits
1986 12:07:22.180410 call enable_fixed_mtrr()
1987 12:07:22.187262 Checking segment from ROM address 0xffdd1714
1988 12:07:22.190944 CPU physical address size: 39 bits
1989 12:07:22.193682 Loading segment from ROM address 0xffdd16f8
1990 12:07:22.197134 code (compression=0)
1991 12:07:22.203616 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1992 12:07:22.213191 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1993 12:07:22.216750 it's not compressed!
1994 12:07:22.307415 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1995 12:07:22.314251 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1996 12:07:22.317146 Loading segment from ROM address 0xffdd1714
1997 12:07:22.320571
1998 12:07:22.320648 Entry Point 0x30000000
1999 12:07:22.323485 Loaded segments
2000 12:07:22.329872 Finalizing chipset.
2001 12:07:22.333277 Finalizing SMM.
2002 12:07:22.336384 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2003 12:07:22.339338 mp_park_aps done after 0 msecs.
2004 12:07:22.345986 Jumping to boot code at 30000000(99b62000)
2005 12:07:22.352431 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2006 12:07:22.352521
2007 12:07:22.352588
2008 12:07:22.352651
2009 12:07:22.355979 Starting depthcharge on Helios...
2010 12:07:22.356062
2011 12:07:22.356424 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2012 12:07:22.356525 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2013 12:07:22.356607 Setting prompt string to ['hatch:']
2014 12:07:22.356685 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2015 12:07:22.366273 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2016 12:07:22.366361
2017 12:07:22.372343 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2018 12:07:22.372429
2019 12:07:22.378662 board_setup: Info: eMMC controller not present; skipping
2020 12:07:22.378749
2021 12:07:22.382229 New NVMe Controller 0x30053ac0 @ 00:1d:00
2022 12:07:22.382322
2023 12:07:22.388562 board_setup: Info: SDHCI controller not present; skipping
2024 12:07:22.388648
2025 12:07:22.395279 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2026 12:07:22.395364
2027 12:07:22.395432 Wipe memory regions:
2028 12:07:22.395495
2029 12:07:22.398406 [0x00000000001000, 0x000000000a0000)
2030 12:07:22.401672
2031 12:07:22.404950 [0x00000000100000, 0x00000030000000)
2032 12:07:22.405035
2033 12:07:22.469313 [0x00000030657430, 0x00000099a2c000)
2034 12:07:22.469433
2035 12:07:22.602071 [0x00000100000000, 0x0000045e800000)
2036 12:07:22.602228
2037 12:07:24.519968 R8152: Initializing
2038 12:07:24.520164
2039 12:07:24.523372 Version 6 (ocp_data = 5c30)
2040 12:07:24.523483
2041 12:07:24.526258 R8152: Done initializing
2042 12:07:24.526369
2043 12:07:24.529971 Adding net device
2044 12:07:24.530102
2045 12:07:24.536594 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2046 12:07:24.536708
2047 12:07:24.536807
2048 12:07:24.536900
2049 12:07:24.537248 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2051 12:07:24.638053 hatch: tftpboot 192.168.201.1 8853702/tftp-deploy-odn9sxnu/kernel/bzImage 8853702/tftp-deploy-odn9sxnu/kernel/cmdline 8853702/tftp-deploy-odn9sxnu/ramdisk/ramdisk.cpio.gz
2052 12:07:24.638299 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2053 12:07:24.638425 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2054 12:07:24.642990 tftpboot 192.168.201.1 8853702/tftp-deploy-odn9sxnu/kernel/bzImoy-odn9sxnu/kernel/cmdline 8853702/tftp-deploy-odn9sxnu/ramdisk/ramdisk.cpio.gz
2055 12:07:24.643110
2056 12:07:24.643209 Waiting for link
2057 12:07:24.643300
2058 12:07:24.843377 done.
2059 12:07:24.843564
2060 12:07:24.843665 MAC: 00:24:32:50:21:91
2061 12:07:24.843762
2062 12:07:24.846889 Sending DHCP discover... done.
2063 12:07:24.847003
2064 12:07:24.849942 Waiting for reply... done.
2065 12:07:24.850075
2066 12:07:24.853288 Sending DHCP request... done.
2067 12:07:24.853401
2068 12:07:24.856352 Waiting for reply... done.
2069 12:07:24.856463
2070 12:07:24.859705 My ip is 192.168.201.14
2071 12:07:24.859815
2072 12:07:24.863075 The DHCP server ip is 192.168.201.1
2073 12:07:24.863188
2074 12:07:24.866464 TFTP server IP predefined by user: 192.168.201.1
2075 12:07:24.866575
2076 12:07:24.875777 Bootfile predefined by user: 8853702/tftp-deploy-odn9sxnu/kernel/bzImage
2077 12:07:24.875893
2078 12:07:24.879251 Sending tftp read request... done.
2079 12:07:24.879367
2080 12:07:24.883377 Waiting for the transfer...
2081 12:07:24.883489
2082 12:07:25.421489 00000000 ################################################################
2083 12:07:25.421667
2084 12:07:25.982505 00080000 ################################################################
2085 12:07:25.982673
2086 12:07:26.556245 00100000 ################################################################
2087 12:07:26.556416
2088 12:07:27.101181 00180000 ################################################################
2089 12:07:27.101353
2090 12:07:27.622705 00200000 ################################################################
2091 12:07:27.622873
2092 12:07:28.164990 00280000 ################################################################
2093 12:07:28.165126
2094 12:07:28.704541 00300000 ################################################################
2095 12:07:28.704676
2096 12:07:29.259752 00380000 ################################################################
2097 12:07:29.259890
2098 12:07:29.823492 00400000 ################################################################
2099 12:07:29.823640
2100 12:07:30.383167 00480000 ################################################################
2101 12:07:30.383317
2102 12:07:30.936032 00500000 ################################################################
2103 12:07:30.936186
2104 12:07:31.514193 00580000 ################################################################
2105 12:07:31.514345
2106 12:07:32.086539 00600000 ################################################################
2107 12:07:32.086683
2108 12:07:32.665991 00680000 ################################################################
2109 12:07:32.666160
2110 12:07:33.330225 00700000 ################################################################
2111 12:07:33.330865
2112 12:07:33.980206 00780000 ################################################################
2113 12:07:33.980350
2114 12:07:34.643662 00800000 ################################################################
2115 12:07:34.644184
2116 12:07:35.310734 00880000 ################################################################
2117 12:07:35.311241
2118 12:07:35.643890 00900000 ################################## done.
2119 12:07:35.644051
2120 12:07:35.647381 The bootfile was 9707520 bytes long.
2121 12:07:35.647515
2122 12:07:35.650411 Sending tftp read request... done.
2123 12:07:35.650527
2124 12:07:35.653965 Waiting for the transfer...
2125 12:07:35.654074
2126 12:07:36.239821 00000000 ################################################################
2127 12:07:36.240342
2128 12:07:36.910387 00080000 ################################################################
2129 12:07:36.910901
2130 12:07:37.549235 00100000 ################################################################
2131 12:07:37.549378
2132 12:07:38.128571 00180000 ################################################################
2133 12:07:38.128714
2134 12:07:38.718011 00200000 ################################################################
2135 12:07:38.718645
2136 12:07:39.374957 00280000 ################################################################
2137 12:07:39.375463
2138 12:07:40.024001 00300000 ################################################################
2139 12:07:40.024147
2140 12:07:40.588516 00380000 ################################################################
2141 12:07:40.588668
2142 12:07:41.122005 00400000 ################################################################
2143 12:07:41.122195
2144 12:07:41.662178 00480000 ################################################################
2145 12:07:41.662317
2146 12:07:42.176754 00500000 ################################################################
2147 12:07:42.176914
2148 12:07:42.720578 00580000 ################################################################
2149 12:07:42.720725
2150 12:07:43.233397 00600000 ################################################################
2151 12:07:43.233536
2152 12:07:43.781001 00680000 ################################################################
2153 12:07:43.781145
2154 12:07:44.302396 00700000 ################################################################
2155 12:07:44.302536
2156 12:07:44.823676 00780000 ################################################################
2157 12:07:44.823814
2158 12:07:45.017595 00800000 ######################## done.
2159 12:07:45.017730
2160 12:07:45.020479 Sending tftp read request... done.
2161 12:07:45.020565
2162 12:07:45.023974 Waiting for the transfer...
2163 12:07:45.024059
2164 12:07:45.024127 00000000 # done.
2165 12:07:45.024192
2166 12:07:45.033418 Command line loaded dynamically from TFTP file: 8853702/tftp-deploy-odn9sxnu/kernel/cmdline
2167 12:07:45.033517
2168 12:07:45.050243 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2169 12:07:45.050338
2170 12:07:45.056896 ec_init(0): CrosEC protocol v3 supported (256, 256)
2171 12:07:45.056976
2172 12:07:45.064693 Shutting down all USB controllers.
2173 12:07:45.064777
2174 12:07:45.068445 Removing current net device
2175 12:07:45.068531
2176 12:07:45.072479 Finalizing coreboot
2177 12:07:45.072563
2178 12:07:45.079004 Exiting depthcharge with code 4 at timestamp: 30074844
2179 12:07:45.079090
2180 12:07:45.079156
2181 12:07:45.079219 Starting kernel ...
2182 12:07:45.079279
2183 12:07:45.079337
2184 12:07:45.079394
2185 12:07:45.079780 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2186 12:07:45.079881 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2187 12:07:45.079956 Setting prompt string to ['Linux version [0-9]']
2188 12:07:45.080027 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 12:07:45.080096 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2191 12:12:03.080117 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2193 12:12:03.080360 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2195 12:12:03.080540 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2198 12:12:03.080822 end: 2 depthcharge-action (duration 00:05:00) [common]
2200 12:12:03.081059 Cleaning after the job
2201 12:12:03.081162 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853702/tftp-deploy-odn9sxnu/ramdisk
2202 12:12:03.081864 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853702/tftp-deploy-odn9sxnu/kernel
2203 12:12:03.082718 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853702/tftp-deploy-odn9sxnu/modules
2204 12:12:03.082943 start: 5.1 power-off (timeout 00:00:30) [common]
2205 12:12:03.083113 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2206 12:12:03.103257 >> Command sent successfully.
2207 12:12:03.105691 Returned 0 in 0 seconds
2208 12:12:03.206213 end: 5.1 power-off (duration 00:00:00) [common]
2210 12:12:03.206554 start: 5.2 read-feedback (timeout 00:10:00) [common]
2211 12:12:03.206821 Listened to connection for namespace 'common' for up to 1s
2212 12:12:04.210165 Finalising connection for namespace 'common'
2213 12:12:04.210418 Disconnecting from shell: Finalise
2214 12:12:04.311218 end: 5.2 read-feedback (duration 00:00:01) [common]
2215 12:12:04.311383 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8853702
2216 12:12:04.316275 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8853702
2217 12:12:04.316404 JobError: Your job cannot terminate cleanly.