Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:06:38.558122 lava-dispatcher, installed at version: 2022.11
2 12:06:38.558328 start: 0 validate
3 12:06:38.558471 Start time: 2023-01-24 12:06:38.558464+00:00 (UTC)
4 12:06:38.558609 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:06:38.558745 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
6 12:06:38.883954 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:06:38.884782 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:06:39.180682 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:06:39.181401 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:06:39.468351 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:06:39.469076 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:06:39.763560 validate duration: 1.21
14 12:06:39.763869 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:06:39.763980 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:06:39.764108 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:06:39.764222 Not decompressing ramdisk as can be used compressed.
18 12:06:39.764327 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230120.0/amd64/initrd.cpio.gz
19 12:06:39.764398 saving as /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/ramdisk/initrd.cpio.gz
20 12:06:39.764479 total size: 5432079 (5MB)
21 12:06:39.765730 progress 0% (0MB)
22 12:06:39.767454 progress 5% (0MB)
23 12:06:39.768948 progress 10% (0MB)
24 12:06:39.770466 progress 15% (0MB)
25 12:06:39.772056 progress 20% (1MB)
26 12:06:39.773595 progress 25% (1MB)
27 12:06:39.775009 progress 30% (1MB)
28 12:06:39.776630 progress 35% (1MB)
29 12:06:39.778094 progress 40% (2MB)
30 12:06:39.779553 progress 45% (2MB)
31 12:06:39.781005 progress 50% (2MB)
32 12:06:39.782576 progress 55% (2MB)
33 12:06:39.783981 progress 60% (3MB)
34 12:06:39.785427 progress 65% (3MB)
35 12:06:39.786998 progress 70% (3MB)
36 12:06:39.788453 progress 75% (3MB)
37 12:06:39.789856 progress 80% (4MB)
38 12:06:39.791258 progress 85% (4MB)
39 12:06:39.792868 progress 90% (4MB)
40 12:06:39.794273 progress 95% (4MB)
41 12:06:39.795695 progress 100% (5MB)
42 12:06:39.795970 5MB downloaded in 0.03s (164.53MB/s)
43 12:06:39.796169 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:06:39.796440 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:06:39.796536 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:06:39.796631 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:06:39.796743 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:06:39.796819 saving as /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/kernel/bzImage
50 12:06:39.796887 total size: 9707520 (9MB)
51 12:06:39.796955 No compression specified
52 12:06:41.799542 progress 0% (0MB)
53 12:06:41.805393 progress 5% (0MB)
54 12:06:41.808287 progress 10% (0MB)
55 12:06:41.810969 progress 15% (1MB)
56 12:06:41.813656 progress 20% (1MB)
57 12:06:41.816336 progress 25% (2MB)
58 12:06:41.818772 progress 30% (2MB)
59 12:06:41.821436 progress 35% (3MB)
60 12:06:41.824069 progress 40% (3MB)
61 12:06:41.826787 progress 45% (4MB)
62 12:06:41.829462 progress 50% (4MB)
63 12:06:41.831934 progress 55% (5MB)
64 12:06:41.834595 progress 60% (5MB)
65 12:06:41.837213 progress 65% (6MB)
66 12:06:41.839906 progress 70% (6MB)
67 12:06:41.842514 progress 75% (6MB)
68 12:06:41.844958 progress 80% (7MB)
69 12:06:41.847519 progress 85% (7MB)
70 12:06:41.850123 progress 90% (8MB)
71 12:06:41.852686 progress 95% (8MB)
72 12:06:41.855263 progress 100% (9MB)
73 12:06:41.855462 9MB downloaded in 2.06s (4.50MB/s)
74 12:06:41.855626 end: 1.2.1 http-download (duration 00:00:02) [common]
76 12:06:41.855888 end: 1.2 download-retry (duration 00:00:02) [common]
77 12:06:41.855986 start: 1.3 download-retry (timeout 00:09:58) [common]
78 12:06:41.856112 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 12:06:41.856243 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230120.0/amd64/full.rootfs.tar.xz
80 12:06:41.856317 saving as /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/nfsrootfs/full.rootfs.tar
81 12:06:41.856387 total size: 133327304 (127MB)
82 12:06:41.856454 Using unxz to decompress xz
83 12:06:41.860126 progress 0% (0MB)
84 12:06:42.226909 progress 5% (6MB)
85 12:06:42.625117 progress 10% (12MB)
86 12:06:42.943113 progress 15% (19MB)
87 12:06:43.168830 progress 20% (25MB)
88 12:06:43.457405 progress 25% (31MB)
89 12:06:43.840532 progress 30% (38MB)
90 12:06:44.227089 progress 35% (44MB)
91 12:06:44.660212 progress 40% (50MB)
92 12:06:45.077103 progress 45% (57MB)
93 12:06:45.473760 progress 50% (63MB)
94 12:06:45.885502 progress 55% (69MB)
95 12:06:46.283892 progress 60% (76MB)
96 12:06:46.679878 progress 65% (82MB)
97 12:06:47.078498 progress 70% (89MB)
98 12:06:47.477402 progress 75% (95MB)
99 12:06:47.960685 progress 80% (101MB)
100 12:06:48.436947 progress 85% (108MB)
101 12:06:48.740604 progress 90% (114MB)
102 12:06:49.119780 progress 95% (120MB)
103 12:06:49.552346 progress 100% (127MB)
104 12:06:49.559149 127MB downloaded in 7.70s (16.51MB/s)
105 12:06:49.559424 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:06:49.559716 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:06:49.559818 start: 1.4 download-retry (timeout 00:09:50) [common]
109 12:06:49.559913 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 12:06:49.560108 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:06:49.560214 saving as /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/modules/modules.tar
112 12:06:49.560284 total size: 64588 (0MB)
113 12:06:49.560357 Using unxz to decompress xz
114 12:06:49.563807 progress 50% (0MB)
115 12:06:49.564261 progress 100% (0MB)
116 12:06:49.568909 0MB downloaded in 0.01s (7.15MB/s)
117 12:06:49.569154 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:06:49.569440 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:06:49.569544 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
121 12:06:49.569649 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
122 12:06:50.922817 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8853681/extract-nfsrootfs-bychcu2l
123 12:06:50.923054 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 12:06:50.923205 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 12:06:50.923369 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52
126 12:06:50.923482 makedir: /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin
127 12:06:50.923575 makedir: /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/tests
128 12:06:50.923664 makedir: /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/results
129 12:06:50.923773 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-add-keys
130 12:06:50.923914 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-add-sources
131 12:06:50.924038 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-background-process-start
132 12:06:50.924263 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-background-process-stop
133 12:06:50.924387 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-common-functions
134 12:06:50.924507 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-echo-ipv4
135 12:06:50.924627 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-install-packages
136 12:06:50.924745 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-installed-packages
137 12:06:50.924862 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-os-build
138 12:06:50.925005 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-probe-channel
139 12:06:50.925179 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-probe-ip
140 12:06:50.925332 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-target-ip
141 12:06:50.925450 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-target-mac
142 12:06:50.925567 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-target-storage
143 12:06:50.925691 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-test-case
144 12:06:50.925812 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-test-event
145 12:06:50.925929 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-test-feedback
146 12:06:50.926046 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-test-raise
147 12:06:50.926163 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-test-reference
148 12:06:50.926279 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-test-runner
149 12:06:50.926395 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-test-set
150 12:06:50.926511 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-test-shell
151 12:06:50.926629 Updating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-install-packages (oe)
152 12:06:50.926751 Updating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/bin/lava-installed-packages (oe)
153 12:06:50.926857 Creating /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/environment
154 12:06:50.926949 LAVA metadata
155 12:06:50.927021 - LAVA_JOB_ID=8853681
156 12:06:50.927091 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:06:50.927197 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 12:06:50.927268 skipped lava-vland-overlay
159 12:06:50.927351 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:06:50.927441 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 12:06:50.927509 skipped lava-multinode-overlay
162 12:06:50.927590 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:06:50.927679 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 12:06:50.927756 Loading test definitions
165 12:06:50.927854 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
166 12:06:50.927931 Using /lava-8853681 at stage 0
167 12:06:50.928256 uuid=8853681_1.5.2.3.1 testdef=None
168 12:06:50.928356 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 12:06:50.928451 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
170 12:06:50.928962 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 12:06:50.929296 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
173 12:06:50.929910 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 12:06:50.930172 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
176 12:06:50.930753 runner path: /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/0/tests/0_dmesg test_uuid 8853681_1.5.2.3.1
177 12:06:50.930912 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 12:06:50.931169 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
180 12:06:50.931248 Using /lava-8853681 at stage 1
181 12:06:50.931506 uuid=8853681_1.5.2.3.5 testdef=None
182 12:06:50.931603 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 12:06:50.931698 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
184 12:06:50.932222 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 12:06:50.932469 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
187 12:06:50.933089 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 12:06:50.933350 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
190 12:06:50.933945 runner path: /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/1/tests/1_bootrr test_uuid 8853681_1.5.2.3.5
191 12:06:50.934098 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 12:06:50.934331 Creating lava-test-runner.conf files
194 12:06:50.934402 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/0 for stage 0
195 12:06:50.934493 - 0_dmesg
196 12:06:50.934574 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853681/lava-overlay-s2_0mf52/lava-8853681/1 for stage 1
197 12:06:50.934665 - 1_bootrr
198 12:06:50.934764 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 12:06:50.934858 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
200 12:06:50.941015 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 12:06:50.941131 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
202 12:06:50.941228 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 12:06:50.941323 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 12:06:50.941419 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
205 12:06:51.053652 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 12:06:51.054018 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
207 12:06:51.054138 extracting modules file /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853681/extract-nfsrootfs-bychcu2l
208 12:06:51.058451 extracting modules file /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853681/extract-overlay-ramdisk-blpsp4v5/ramdisk
209 12:06:51.062511 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 12:06:51.062631 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
211 12:06:51.062722 [common] Applying overlay to NFS
212 12:06:51.062799 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853681/compress-overlay-dobz87mv/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8853681/extract-nfsrootfs-bychcu2l
213 12:06:51.066843 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 12:06:51.066959 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
215 12:06:51.067061 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 12:06:51.067163 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
217 12:06:51.067249 Building ramdisk /var/lib/lava/dispatcher/tmp/8853681/extract-overlay-ramdisk-blpsp4v5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8853681/extract-overlay-ramdisk-blpsp4v5/ramdisk
218 12:06:51.104000 >> 24777 blocks
219 12:06:51.619474 rename /var/lib/lava/dispatcher/tmp/8853681/extract-overlay-ramdisk-blpsp4v5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/ramdisk/ramdisk.cpio.gz
220 12:06:51.619910 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 12:06:51.620055 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
222 12:06:51.620201 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
223 12:06:51.620310 No mkimage arch provided, not using FIT.
224 12:06:51.620409 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 12:06:51.620502 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 12:06:51.620611 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 12:06:51.620714 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
228 12:06:51.620802 No LXC device requested
229 12:06:51.620890 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 12:06:51.620990 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
231 12:06:51.621080 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 12:06:51.621158 Checking files for TFTP limit of 4294967296 bytes.
233 12:06:51.621562 end: 1 tftp-deploy (duration 00:00:12) [common]
234 12:06:51.621674 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 12:06:51.621781 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 12:06:51.621924 substitutions:
237 12:06:51.621998 - {DTB}: None
238 12:06:51.622071 - {INITRD}: 8853681/tftp-deploy-1xyegbzx/ramdisk/ramdisk.cpio.gz
239 12:06:51.622138 - {KERNEL}: 8853681/tftp-deploy-1xyegbzx/kernel/bzImage
240 12:06:51.622204 - {LAVA_MAC}: None
241 12:06:51.622268 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8853681/extract-nfsrootfs-bychcu2l
242 12:06:51.622334 - {NFS_SERVER_IP}: 192.168.201.1
243 12:06:51.622397 - {PRESEED_CONFIG}: None
244 12:06:51.622459 - {PRESEED_LOCAL}: None
245 12:06:51.622521 - {RAMDISK}: 8853681/tftp-deploy-1xyegbzx/ramdisk/ramdisk.cpio.gz
246 12:06:51.622590 - {ROOT_PART}: None
247 12:06:51.622662 - {ROOT}: None
248 12:06:51.622733 - {SERVER_IP}: 192.168.201.1
249 12:06:51.622860 - {TEE}: None
250 12:06:51.622961 Parsed boot commands:
251 12:06:51.623045 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 12:06:51.623291 Parsed boot commands: tftpboot 192.168.201.1 8853681/tftp-deploy-1xyegbzx/kernel/bzImage 8853681/tftp-deploy-1xyegbzx/kernel/cmdline 8853681/tftp-deploy-1xyegbzx/ramdisk/ramdisk.cpio.gz
253 12:06:51.623400 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 12:06:51.623503 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 12:06:51.623608 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 12:06:51.623704 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 12:06:51.623783 Not connected, no need to disconnect.
258 12:06:51.623870 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 12:06:51.623990 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 12:06:51.624079 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-2'
261 12:06:51.626954 Setting prompt string to ['lava-test: # ']
262 12:06:51.627268 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 12:06:51.627384 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 12:06:51.627489 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 12:06:51.627589 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 12:06:51.627788 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=reboot'
267 12:06:51.648798 >> Command sent successfully.
268 12:06:51.650914 Returned 0 in 0 seconds
269 12:06:51.752019 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 12:06:51.752652 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 12:06:51.752763 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 12:06:51.752862 Setting prompt string to 'Starting depthcharge on Magolor...'
274 12:06:51.752937 Changing prompt to 'Starting depthcharge on Magolor...'
275 12:06:51.753012 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
276 12:06:51.753332 [Enter `^Ec?' for help]
277 12:06:58.742395
278 12:06:58.742560
279 12:06:58.753343 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
280 12:06:58.756562 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
281 12:06:58.759971 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
282 12:06:58.766645 CPU: AES supported, TXT NOT supported, VT supported
283 12:06:58.770041 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
284 12:06:58.776439 PCH: device id 4d87 (rev 01) is Jasperlake Super
285 12:06:58.779766 IGD: device id 4e55 (rev 01) is Jasperlake GT4
286 12:06:58.783160 VBOOT: Loading verstage.
287 12:06:58.790160 FMAP: Found "FLASH" version 1.1 at 0xc04000.
288 12:06:58.793675 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
289 12:06:58.800643 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 12:06:58.803567 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
291 12:06:58.806962
292 12:06:58.807094
293 12:06:58.817052 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
294 12:06:58.831318 Probing TPM: . done!
295 12:06:58.834711 TPM ready after 0 ms
296 12:06:58.838304 Connected to device vid:did:rid of 1ae0:0028:00
297 12:06:58.849753 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
298 12:06:58.856957 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
299 12:06:58.909286 Initialized TPM device CR50 revision 0
300 12:06:58.919192 tlcl_send_startup: Startup return code is 0
301 12:06:58.919344 TPM: setup succeeded
302 12:06:58.934005 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
303 12:06:58.948021 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
304 12:06:58.964235 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
305 12:06:58.974378 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
306 12:06:58.977889 Chrome EC: UHEPI supported
307 12:06:58.981165 Phase 1
308 12:06:58.984457 FMAP: area GBB found @ c05000 (12288 bytes)
309 12:06:58.990748 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
310 12:06:58.997608 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
311 12:06:59.000925 Recovery requested (1009000e)
312 12:06:59.012011 TPM: Extending digest for VBOOT: boot mode into PCR 0
313 12:06:59.017884 tlcl_extend: response is 0
314 12:06:59.024581 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
315 12:06:59.033997 tlcl_extend: response is 0
316 12:06:59.041607 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 12:06:59.045827 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
318 12:06:59.052700 BS: verstage times (exec / console): total (unknown) / 124 ms
319 12:06:59.052804
320 12:06:59.052899
321 12:06:59.062009 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
322 12:06:59.069010 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
323 12:06:59.075665 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
324 12:06:59.078717 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
325 12:06:59.082023 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
326 12:06:59.088728 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
327 12:06:59.092007 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
328 12:06:59.095534 TCO_STS: 0000 0001
329 12:06:59.095643 GEN_PMCON: d0015038 00002200
330 12:06:59.098463 GBLRST_CAUSE: 00000000 00000000
331 12:06:59.101854 prev_sleep_state 5
332 12:06:59.105253 Boot Count incremented to 9365
333 12:06:59.111664 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 12:06:59.114890 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
335 12:06:59.118692 Chrome EC: UHEPI supported
336 12:06:59.125166 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
337 12:06:59.131588 Probing TPM: done!
338 12:06:59.138771 Connected to device vid:did:rid of 1ae0:0028:00
339 12:06:59.149128 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
340 12:06:59.157472 Initialized TPM device CR50 revision 0
341 12:06:59.168778 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
342 12:06:59.171539 MRC: Hash idx 0x100b comparison successful.
343 12:06:59.174891 MRC cache found, size 5458
344 12:06:59.178397 bootmode is set to: 2
345 12:06:59.181716 SPD INDEX = 0
346 12:06:59.185049 CBFS: Found 'spd.bin' @0x40c40 size 0x600
347 12:06:59.188184 SPD: module type is LPDDR4X
348 12:06:59.191565 SPD: module part number is MT53E512M32D2NP-046 WT:E
349 12:06:59.198542 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
350 12:06:59.204916 SPD: device width 16 bits, bus width 32 bits
351 12:06:59.208374 SPD: module size is 4096 MB (per channel)
352 12:06:59.211243 meminit_channels: DRAM half-populated
353 12:06:59.294166 CBMEM:
354 12:06:59.297415 IMD: root @ 0x76fff000 254 entries.
355 12:06:59.300892 IMD: root @ 0x76ffec00 62 entries.
356 12:06:59.304238 FMAP: area RO_VPD found @ c00000 (16384 bytes)
357 12:06:59.310484 WARNING: RO_VPD is uninitialized or empty.
358 12:06:59.314064 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
359 12:06:59.317936 External stage cache:
360 12:06:59.321067 IMD: root @ 0x7b3ff000 254 entries.
361 12:06:59.324063 IMD: root @ 0x7b3fec00 62 entries.
362 12:06:59.334463 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
363 12:06:59.340832 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
364 12:06:59.347156 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
365 12:06:59.356003 MRC: 'RECOVERY_MRC_CACHE' does not need update.
366 12:06:59.358840 cse_lite: Skip switching to RW in the recovery path
367 12:06:59.362195
368 12:06:59.362325 1 DIMMs found
369 12:06:59.362414 SMM Memory Map
370 12:06:59.365676 SMRAM : 0x7b000000 0x800000
371 12:06:59.368893 Subregion 0: 0x7b000000 0x200000
372 12:06:59.372267
373 12:06:59.375643 Subregion 1: 0x7b200000 0x200000
374 12:06:59.379264 Subregion 2: 0x7b400000 0x400000
375 12:06:59.379364 top_of_ram = 0x77000000
376 12:06:59.385902 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
377 12:06:59.392691 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
378 12:06:59.395650 MTRR Range: Start=ff000000 End=0 (Size 1000000)
379 12:06:59.402036 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
380 12:06:59.405390 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
381 12:06:59.417942 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
382 12:06:59.420900 Processing 188 relocs. Offset value of 0x74c0e000
383 12:06:59.424070
384 12:06:59.431339 BS: romstage times (exec / console): total (unknown) / 256 ms
385 12:06:59.435930
386 12:06:59.436053
387 12:06:59.446227 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
388 12:06:59.449170 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
389 12:06:59.456254 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
390 12:06:59.462553 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
391 12:06:59.518590 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
392 12:06:59.524959 Processing 4805 relocs. Offset value of 0x75da8000
393 12:06:59.528245 BS: postcar times (exec / console): total (unknown) / 42 ms
394 12:06:59.531643
395 12:06:59.531746
396 12:06:59.541444 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
397 12:06:59.541585 Normal boot
398 12:06:59.546452 EC returned error result code 3
399 12:06:59.549350 FW_CONFIG value is 0x204
400 12:06:59.552892 GENERIC: 0.0 disabled by fw_config
401 12:06:59.559806 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
402 12:06:59.562733 I2C: 00:10 disabled by fw_config
403 12:06:59.566319 I2C: 00:10 disabled by fw_config
404 12:06:59.569928 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
405 12:06:59.576254 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
406 12:06:59.579635 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
407 12:06:59.586570 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
408 12:06:59.589252 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
409 12:06:59.592787 I2C: 00:10 disabled by fw_config
410 12:06:59.599653 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
411 12:06:59.606358 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
412 12:06:59.609178 I2C: 00:1a disabled by fw_config
413 12:06:59.612661 I2C: 00:1a disabled by fw_config
414 12:06:59.619579 fw_config match found: AUDIO_AMP=UNPROVISIONED
415 12:06:59.622853 fw_config match found: AUDIO_AMP=UNPROVISIONED
416 12:06:59.626475 GENERIC: 0.0 disabled by fw_config
417 12:06:59.632685 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
418 12:06:59.635873 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
419 12:06:59.642580 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
420 12:06:59.646242 microcode: Update skipped, already up-to-date
421 12:06:59.649490 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
422 12:06:59.652482
423 12:06:59.678476 Detected 2 core, 2 thread CPU.
424 12:06:59.681395 Setting up SMI for CPU
425 12:06:59.684814 IED base = 0x7b400000
426 12:06:59.684932 IED size = 0x00400000
427 12:06:59.688138 Will perform SMM setup.
428 12:06:59.691508 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
429 12:06:59.701538 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 12:06:59.704817 Processing 16 relocs. Offset value of 0x00030000
431 12:06:59.708675 Attempting to start 1 APs
432 12:06:59.711983 Waiting for 10ms after sending INIT.
433 12:06:59.728346 Waiting for 1st SIPI to complete...done.
434 12:06:59.728539 AP: slot 1 apic_id 2.
435 12:06:59.734664 Waiting for 2nd SIPI to complete...done.
436 12:06:59.741523 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
437 12:06:59.748129 Processing 13 relocs. Offset value of 0x00038000
438 12:06:59.748299 Unable to locate Global NVS
439 12:06:59.758185 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
440 12:06:59.761557 Installing permanent SMM handler to 0x7b000000
441 12:06:59.771245 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
442 12:06:59.774717 Processing 704 relocs. Offset value of 0x7b010000
443 12:06:59.781265 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
444 12:06:59.784379
445 12:06:59.787878 Processing 13 relocs. Offset value of 0x7b008000
446 12:06:59.794623 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
447 12:06:59.797708 Unable to locate Global NVS
448 12:06:59.804278 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
449 12:06:59.807977 Clearing SMI status registers
450 12:06:59.808176 SMI_STS: PM1
451 12:06:59.811310 PM1_STS: PWRBTN
452 12:06:59.811468 TCO_STS: INTRD_DET
453 12:06:59.814201 GPE0 STD STS:
454 12:06:59.821067 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
455 12:06:59.824572 In relocation handler: CPU 0
456 12:06:59.828489 New SMBASE=0x7b000000 IEDBASE=0x7b400000
457 12:06:59.831854 Writing SMRR. base = 0x7b000006, mask=0xff800800
458 12:06:59.835624 Relocation complete.
459 12:06:59.842185 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
460 12:06:59.845539 In relocation handler: CPU 1
461 12:06:59.848708 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
462 12:06:59.855335 Writing SMRR. base = 0x7b000006, mask=0xff800800
463 12:06:59.855486 Relocation complete.
464 12:06:59.858615 Initializing CPU #0
465 12:06:59.861956 CPU: vendor Intel device 906c0
466 12:06:59.865630 CPU: family 06, model 9c, stepping 00
467 12:06:59.868636 Clearing out pending MCEs
468 12:06:59.872343 Setting up local APIC...
469 12:06:59.872495 apic_id: 0x00 done.
470 12:06:59.875317 Turbo is available but hidden
471 12:06:59.878534 Turbo is available and visible
472 12:06:59.885699 microcode: Update skipped, already up-to-date
473 12:06:59.885852 CPU #0 initialized
474 12:06:59.889167 Initializing CPU #1
475 12:06:59.892567 CPU: vendor Intel device 906c0
476 12:06:59.895673 CPU: family 06, model 9c, stepping 00
477 12:06:59.899099 Clearing out pending MCEs
478 12:06:59.902016 Setting up local APIC...
479 12:06:59.902149 apic_id: 0x02 done.
480 12:06:59.908596 microcode: Update skipped, already up-to-date
481 12:06:59.908744 CPU #1 initialized
482 12:06:59.911792 bsp_do_flight_plan done after 175 msecs.
483 12:06:59.915331 CPU: frequency set to 2800 MHz
484 12:06:59.918760 Enabling SMIs.
485 12:06:59.925127 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 87 / 289 ms
486 12:06:59.934724 Probing TPM: done!
487 12:06:59.941346 Connected to device vid:did:rid of 1ae0:0028:00
488 12:06:59.951650 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
489 12:06:59.954516 Initialized TPM device CR50 revision 0
490 12:06:59.958151 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
491 12:06:59.964833 Found a VBT of 7680 bytes after decompression
492 12:06:59.971317 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
493 12:07:00.006543 Detected 2 core, 2 thread CPU.
494 12:07:00.010114 Detected 2 core, 2 thread CPU.
495 12:07:00.372875 Display FSP Version Info HOB
496 12:07:00.376582 Reference Code - CPU = 8.7.22.30
497 12:07:00.379476 uCode Version = 24.0.0.1f
498 12:07:00.382375 TXT ACM version = ff.ff.ff.ffff
499 12:07:00.385949 Reference Code - ME = 8.7.22.30
500 12:07:00.389261 MEBx version = 0.0.0.0
501 12:07:00.392420 ME Firmware Version = Consumer SKU
502 12:07:00.395737 Reference Code - PCH = 8.7.22.30
503 12:07:00.399105 PCH-CRID Status = Disabled
504 12:07:00.402787 PCH-CRID Original Value = ff.ff.ff.ffff
505 12:07:00.406995 PCH-CRID New Value = ff.ff.ff.ffff
506 12:07:00.410583 OPROM - RST - RAID = ff.ff.ff.ffff
507 12:07:00.410715 PCH Hsio Version = 4.0.0.0
508 12:07:00.417061 Reference Code - SA - System Agent = 8.7.22.30
509 12:07:00.420933 Reference Code - MRC = 0.0.4.68
510 12:07:00.424440 SA - PCIe Version = 8.7.22.30
511 12:07:00.424576 SA-CRID Status = Disabled
512 12:07:00.427512 SA-CRID Original Value = 0.0.0.0
513 12:07:00.431509 SA-CRID New Value = 0.0.0.0
514 12:07:00.434213 OPROM - VBIOS = ff.ff.ff.ffff
515 12:07:00.441092 IO Manageability Engine FW Version = ff.ff.ff.ffff
516 12:07:00.444146 PHY Build Version = ff.ff.ff.ffff
517 12:07:00.447984 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
518 12:07:00.454351 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
519 12:07:00.457625 ITSS IRQ Polarities Before:
520 12:07:00.457757 IPC0: 0xffffffff
521 12:07:00.461442 IPC1: 0xffffffff
522 12:07:00.461569 IPC2: 0xffffffff
523 12:07:00.464325 IPC3: 0xffffffff
524 12:07:00.464454 ITSS IRQ Polarities After:
525 12:07:00.467548 IPC0: 0xffffffff
526 12:07:00.471194 IPC1: 0xffffffff
527 12:07:00.471331 IPC2: 0xffffffff
528 12:07:00.474737 IPC3: 0xffffffff
529 12:07:00.484443 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
530 12:07:00.491014 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
531 12:07:00.494123 Enumerating buses...
532 12:07:00.497492 Show all devs... Before device enumeration.
533 12:07:00.500927 Root Device: enabled 1
534 12:07:00.504006 CPU_CLUSTER: 0: enabled 1
535 12:07:00.504120 DOMAIN: 0000: enabled 1
536 12:07:00.507328 PCI: 00:00.0: enabled 1
537 12:07:00.510809 PCI: 00:02.0: enabled 1
538 12:07:00.514060 PCI: 00:04.0: enabled 1
539 12:07:00.514195 PCI: 00:05.0: enabled 1
540 12:07:00.517285 PCI: 00:09.0: enabled 0
541 12:07:00.520756 PCI: 00:12.6: enabled 0
542 12:07:00.520880 PCI: 00:14.0: enabled 1
543 12:07:00.524009
544 12:07:00.524118 PCI: 00:14.1: enabled 0
545 12:07:00.527413 PCI: 00:14.2: enabled 0
546 12:07:00.531031 PCI: 00:14.3: enabled 1
547 12:07:00.531122 PCI: 00:14.5: enabled 1
548 12:07:00.534397 PCI: 00:15.0: enabled 1
549 12:07:00.537322 PCI: 00:15.1: enabled 1
550 12:07:00.540875 PCI: 00:15.2: enabled 1
551 12:07:00.540978 PCI: 00:15.3: enabled 1
552 12:07:00.544189 PCI: 00:16.0: enabled 1
553 12:07:00.547477 PCI: 00:16.1: enabled 0
554 12:07:00.550725 PCI: 00:16.4: enabled 0
555 12:07:00.550859 PCI: 00:16.5: enabled 0
556 12:07:00.553814 PCI: 00:17.0: enabled 0
557 12:07:00.557608 PCI: 00:19.0: enabled 1
558 12:07:00.557735 PCI: 00:19.1: enabled 0
559 12:07:00.561030
560 12:07:00.561160 PCI: 00:19.2: enabled 1
561 12:07:00.564032 PCI: 00:1a.0: enabled 1
562 12:07:00.567382 PCI: 00:1c.0: enabled 0
563 12:07:00.567513 PCI: 00:1c.1: enabled 0
564 12:07:00.570616
565 12:07:00.570746 PCI: 00:1c.2: enabled 0
566 12:07:00.573691 PCI: 00:1c.3: enabled 0
567 12:07:00.577117 PCI: 00:1c.4: enabled 0
568 12:07:00.577243 PCI: 00:1c.5: enabled 0
569 12:07:00.580753 PCI: 00:1c.6: enabled 0
570 12:07:00.583606 PCI: 00:1c.7: enabled 1
571 12:07:00.587079 PCI: 00:1e.0: enabled 0
572 12:07:00.587208 PCI: 00:1e.1: enabled 0
573 12:07:00.590702 PCI: 00:1e.2: enabled 1
574 12:07:00.593741 PCI: 00:1e.3: enabled 0
575 12:07:00.597011 PCI: 00:1f.0: enabled 1
576 12:07:00.597140 PCI: 00:1f.1: enabled 1
577 12:07:00.599962 PCI: 00:1f.2: enabled 1
578 12:07:00.603333 PCI: 00:1f.3: enabled 1
579 12:07:00.606848 PCI: 00:1f.4: enabled 0
580 12:07:00.606947 PCI: 00:1f.5: enabled 1
581 12:07:00.610293 PCI: 00:1f.7: enabled 0
582 12:07:00.613423 GENERIC: 0.0: enabled 1
583 12:07:00.613540 GENERIC: 0.0: enabled 1
584 12:07:00.616861 USB0 port 0: enabled 1
585 12:07:00.620147 GENERIC: 0.0: enabled 1
586 12:07:00.623374 I2C: 00:2c: enabled 1
587 12:07:00.623472 I2C: 00:15: enabled 1
588 12:07:00.626638 GENERIC: 0.0: enabled 0
589 12:07:00.629852 I2C: 00:15: enabled 1
590 12:07:00.629950 I2C: 00:10: enabled 0
591 12:07:00.633190 I2C: 00:10: enabled 0
592 12:07:00.636557 I2C: 00:2c: enabled 1
593 12:07:00.636656 I2C: 00:40: enabled 1
594 12:07:00.640131 I2C: 00:10: enabled 1
595 12:07:00.643368 I2C: 00:39: enabled 1
596 12:07:00.643466 I2C: 00:36: enabled 1
597 12:07:00.646985 I2C: 00:10: enabled 0
598 12:07:00.650324 I2C: 00:0c: enabled 1
599 12:07:00.650421 I2C: 00:50: enabled 1
600 12:07:00.653741 I2C: 00:1a: enabled 1
601 12:07:00.656555 I2C: 00:1a: enabled 0
602 12:07:00.656652 I2C: 00:1a: enabled 0
603 12:07:00.659974 I2C: 00:28: enabled 1
604 12:07:00.663042 I2C: 00:29: enabled 1
605 12:07:00.666471 PCI: 00:00.0: enabled 1
606 12:07:00.666618 SPI: 00: enabled 1
607 12:07:00.669711 PNP: 0c09.0: enabled 1
608 12:07:00.673280 GENERIC: 0.0: enabled 0
609 12:07:00.673431 USB2 port 0: enabled 1
610 12:07:00.676633 USB2 port 1: enabled 1
611 12:07:00.680056 USB2 port 2: enabled 1
612 12:07:00.680239 USB2 port 3: enabled 1
613 12:07:00.682996 USB2 port 4: enabled 0
614 12:07:00.686851 USB2 port 5: enabled 1
615 12:07:00.686974 USB2 port 6: enabled 0
616 12:07:00.689789
617 12:07:00.689897 USB2 port 7: enabled 1
618 12:07:00.693320 USB3 port 0: enabled 1
619 12:07:00.696235 USB3 port 1: enabled 1
620 12:07:00.696351 USB3 port 2: enabled 1
621 12:07:00.699748 USB3 port 3: enabled 1
622 12:07:00.703308 APIC: 00: enabled 1
623 12:07:00.703452 APIC: 02: enabled 1
624 12:07:00.706662 Compare with tree...
625 12:07:00.709541 Root Device: enabled 1
626 12:07:00.709641 CPU_CLUSTER: 0: enabled 1
627 12:07:00.713440 APIC: 00: enabled 1
628 12:07:00.716232 APIC: 02: enabled 1
629 12:07:00.719675 DOMAIN: 0000: enabled 1
630 12:07:00.719779 PCI: 00:00.0: enabled 1
631 12:07:00.723199 PCI: 00:02.0: enabled 1
632 12:07:00.726760 PCI: 00:04.0: enabled 1
633 12:07:00.729523 GENERIC: 0.0: enabled 1
634 12:07:00.732859 PCI: 00:05.0: enabled 1
635 12:07:00.732986 GENERIC: 0.0: enabled 1
636 12:07:00.736370 PCI: 00:09.0: enabled 0
637 12:07:00.739396 PCI: 00:12.6: enabled 0
638 12:07:00.743006 PCI: 00:14.0: enabled 1
639 12:07:00.746365 USB0 port 0: enabled 1
640 12:07:00.746492 USB2 port 0: enabled 1
641 12:07:00.749890 USB2 port 1: enabled 1
642 12:07:00.752951 USB2 port 2: enabled 1
643 12:07:00.756444 USB2 port 3: enabled 1
644 12:07:00.759393 USB2 port 4: enabled 0
645 12:07:00.759519 USB2 port 5: enabled 1
646 12:07:00.763054 USB2 port 6: enabled 0
647 12:07:00.766449 USB2 port 7: enabled 1
648 12:07:00.769306 USB3 port 0: enabled 1
649 12:07:00.772783 USB3 port 1: enabled 1
650 12:07:00.776360 USB3 port 2: enabled 1
651 12:07:00.776496 USB3 port 3: enabled 1
652 12:07:00.779194 PCI: 00:14.1: enabled 0
653 12:07:00.782898 PCI: 00:14.2: enabled 0
654 12:07:00.785871 PCI: 00:14.3: enabled 1
655 12:07:00.789353 GENERIC: 0.0: enabled 1
656 12:07:00.789477 PCI: 00:14.5: enabled 1
657 12:07:00.792839 PCI: 00:15.0: enabled 1
658 12:07:00.795876 I2C: 00:2c: enabled 1
659 12:07:00.799243 I2C: 00:15: enabled 1
660 12:07:00.799384 PCI: 00:15.1: enabled 1
661 12:07:00.802783 PCI: 00:15.2: enabled 1
662 12:07:00.806188 GENERIC: 0.0: enabled 0
663 12:07:00.809507 I2C: 00:15: enabled 1
664 12:07:00.812499 I2C: 00:10: enabled 0
665 12:07:00.812609 I2C: 00:10: enabled 0
666 12:07:00.815940 I2C: 00:2c: enabled 1
667 12:07:00.819069 I2C: 00:40: enabled 1
668 12:07:00.822317 I2C: 00:10: enabled 1
669 12:07:00.822426 I2C: 00:39: enabled 1
670 12:07:00.825872 PCI: 00:15.3: enabled 1
671 12:07:00.829681 I2C: 00:36: enabled 1
672 12:07:00.832597 I2C: 00:10: enabled 0
673 12:07:00.832693 I2C: 00:0c: enabled 1
674 12:07:00.836015
675 12:07:00.836121 I2C: 00:50: enabled 1
676 12:07:00.839502 PCI: 00:16.0: enabled 1
677 12:07:00.842562 PCI: 00:16.1: enabled 0
678 12:07:00.845668 PCI: 00:16.4: enabled 0
679 12:07:00.845763 PCI: 00:16.5: enabled 0
680 12:07:00.849231 PCI: 00:17.0: enabled 0
681 12:07:00.852696 PCI: 00:19.0: enabled 1
682 12:07:00.855883 I2C: 00:1a: enabled 1
683 12:07:00.859513 I2C: 00:1a: enabled 0
684 12:07:00.859611 I2C: 00:1a: enabled 0
685 12:07:00.862419 I2C: 00:28: enabled 1
686 12:07:00.866051 I2C: 00:29: enabled 1
687 12:07:00.868944 PCI: 00:19.1: enabled 0
688 12:07:00.869041 PCI: 00:19.2: enabled 1
689 12:07:00.872556 PCI: 00:1a.0: enabled 1
690 12:07:00.876184 PCI: 00:1e.0: enabled 0
691 12:07:00.879239 PCI: 00:1e.1: enabled 0
692 12:07:00.882463 PCI: 00:1e.2: enabled 1
693 12:07:00.882559 SPI: 00: enabled 1
694 12:07:00.886168 PCI: 00:1e.3: enabled 0
695 12:07:00.889204 PCI: 00:1f.0: enabled 1
696 12:07:00.892743 PNP: 0c09.0: enabled 1
697 12:07:00.892844 PCI: 00:1f.1: enabled 1
698 12:07:00.895893 PCI: 00:1f.2: enabled 1
699 12:07:00.898908 PCI: 00:1f.3: enabled 1
700 12:07:00.902585 GENERIC: 0.0: enabled 0
701 12:07:00.905539 PCI: 00:1f.4: enabled 0
702 12:07:00.905670 PCI: 00:1f.5: enabled 1
703 12:07:00.909100 PCI: 00:1f.7: enabled 0
704 12:07:00.912534 Root Device scanning...
705 12:07:00.915539 scan_static_bus for Root Device
706 12:07:00.919071 CPU_CLUSTER: 0 enabled
707 12:07:00.919168 DOMAIN: 0000 enabled
708 12:07:00.922540 DOMAIN: 0000 scanning...
709 12:07:00.925524 PCI: pci_scan_bus for bus 00
710 12:07:00.929240 PCI: 00:00.0 [8086/0000] ops
711 12:07:00.932396 PCI: 00:00.0 [8086/4e22] enabled
712 12:07:00.935809 PCI: 00:02.0 [8086/0000] bus ops
713 12:07:00.939446 PCI: 00:02.0 [8086/4e55] enabled
714 12:07:00.942408 PCI: 00:04.0 [8086/0000] bus ops
715 12:07:00.945489 PCI: 00:04.0 [8086/4e03] enabled
716 12:07:00.949208 PCI: 00:05.0 [8086/0000] bus ops
717 12:07:00.952787 PCI: 00:05.0 [8086/4e19] enabled
718 12:07:00.955775 PCI: 00:08.0 [8086/4e11] enabled
719 12:07:00.959233 PCI: 00:14.0 [8086/0000] bus ops
720 12:07:00.962454 PCI: 00:14.0 [8086/4ded] enabled
721 12:07:00.965400 PCI: 00:14.2 [8086/4def] disabled
722 12:07:00.969347 PCI: 00:14.3 [8086/0000] bus ops
723 12:07:00.972188 PCI: 00:14.3 [8086/4df0] enabled
724 12:07:00.975823 PCI: 00:14.5 [8086/0000] ops
725 12:07:00.978671 PCI: 00:14.5 [8086/4df8] enabled
726 12:07:00.982368 PCI: 00:15.0 [8086/0000] bus ops
727 12:07:00.985440 PCI: 00:15.0 [8086/4de8] enabled
728 12:07:00.988590 PCI: 00:15.1 [8086/0000] bus ops
729 12:07:00.992330 PCI: 00:15.1 [8086/4de9] enabled
730 12:07:00.995471 PCI: 00:15.2 [8086/0000] bus ops
731 12:07:00.999019 PCI: 00:15.2 [8086/4dea] enabled
732 12:07:01.002003 PCI: 00:15.3 [8086/0000] bus ops
733 12:07:01.005751 PCI: 00:15.3 [8086/4deb] enabled
734 12:07:01.008738 PCI: 00:16.0 [8086/0000] ops
735 12:07:01.012223 PCI: 00:16.0 [8086/4de0] enabled
736 12:07:01.015249 PCI: 00:19.0 [8086/0000] bus ops
737 12:07:01.018864 PCI: 00:19.0 [8086/4dc5] enabled
738 12:07:01.018994 PCI: 00:19.2 [8086/0000] ops
739 12:07:01.022300
740 12:07:01.022427 PCI: 00:19.2 [8086/4dc7] enabled
741 12:07:01.025577
742 12:07:01.025708 PCI: 00:1a.0 [8086/0000] ops
743 12:07:01.029087 PCI: 00:1a.0 [8086/4dc4] enabled
744 12:07:01.032136 PCI: 00:1e.0 [8086/0000] ops
745 12:07:01.035718 PCI: 00:1e.0 [8086/4da8] disabled
746 12:07:01.038636 PCI: 00:1e.2 [8086/0000] bus ops
747 12:07:01.042197 PCI: 00:1e.2 [8086/4daa] enabled
748 12:07:01.045701 PCI: 00:1f.0 [8086/0000] bus ops
749 12:07:01.048705 PCI: 00:1f.0 [8086/4d87] enabled
750 12:07:01.055862 PCI: Static device PCI: 00:1f.1 not found, disabling it.
751 12:07:01.055992 RTC Init
752 12:07:01.058819 Set power on after power failure.
753 12:07:01.062514 Disabling Deep S3
754 12:07:01.065579 Disabling Deep S3
755 12:07:01.065710 Disabling Deep S4
756 12:07:01.068493 Disabling Deep S4
757 12:07:01.068618 Disabling Deep S5
758 12:07:01.072252 Disabling Deep S5
759 12:07:01.075371 PCI: 00:1f.2 [0000/0000] hidden
760 12:07:01.078903 PCI: 00:1f.3 [8086/0000] bus ops
761 12:07:01.083131 PCI: 00:1f.3 [8086/4dc8] enabled
762 12:07:01.083260 PCI: 00:1f.5 [8086/0000] bus ops
763 12:07:01.086249
764 12:07:01.086373 PCI: 00:1f.5 [8086/4da4] enabled
765 12:07:01.089788 PCI: Leftover static devices:
766 12:07:01.092920 PCI: 00:12.6
767 12:07:01.093046 PCI: 00:09.0
768 12:07:01.096588 PCI: 00:14.1
769 12:07:01.096715 PCI: 00:16.1
770 12:07:01.096834 PCI: 00:16.4
771 12:07:01.099676 PCI: 00:16.5
772 12:07:01.099802 PCI: 00:17.0
773 12:07:01.103287 PCI: 00:19.1
774 12:07:01.103411 PCI: 00:1e.1
775 12:07:01.103523 PCI: 00:1e.3
776 12:07:01.106321 PCI: 00:1f.1
777 12:07:01.106446 PCI: 00:1f.4
778 12:07:01.110070 PCI: 00:1f.7
779 12:07:01.113037 PCI: Check your devicetree.cb.
780 12:07:01.113161 PCI: 00:02.0 scanning...
781 12:07:01.116622 scan_generic_bus for PCI: 00:02.0
782 12:07:01.119681
783 12:07:01.123125 scan_generic_bus for PCI: 00:02.0 done
784 12:07:01.126340 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
785 12:07:01.129632 PCI: 00:04.0 scanning...
786 12:07:01.132725 scan_generic_bus for PCI: 00:04.0
787 12:07:01.136284 GENERIC: 0.0 enabled
788 12:07:01.139273 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
789 12:07:01.145932 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
790 12:07:01.149690 PCI: 00:05.0 scanning...
791 12:07:01.152816 scan_generic_bus for PCI: 00:05.0
792 12:07:01.152941 GENERIC: 0.0 enabled
793 12:07:01.159346 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
794 12:07:01.166107 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
795 12:07:01.166254 PCI: 00:14.0 scanning...
796 12:07:01.168940 scan_static_bus for PCI: 00:14.0
797 12:07:01.172512 USB0 port 0 enabled
798 12:07:01.175646 USB0 port 0 scanning...
799 12:07:01.179091 scan_static_bus for USB0 port 0
800 12:07:01.179220 USB2 port 0 enabled
801 12:07:01.182675 USB2 port 1 enabled
802 12:07:01.185879 USB2 port 2 enabled
803 12:07:01.186006 USB2 port 3 enabled
804 12:07:01.189419 USB2 port 4 disabled
805 12:07:01.192455 USB2 port 5 enabled
806 12:07:01.192579 USB2 port 6 disabled
807 12:07:01.195556 USB2 port 7 enabled
808 12:07:01.195681 USB3 port 0 enabled
809 12:07:01.199186 USB3 port 1 enabled
810 12:07:01.202253 USB3 port 2 enabled
811 12:07:01.202379 USB3 port 3 enabled
812 12:07:01.205697 USB2 port 0 scanning...
813 12:07:01.209290 scan_static_bus for USB2 port 0
814 12:07:01.212240 scan_static_bus for USB2 port 0 done
815 12:07:01.218977 scan_bus: bus USB2 port 0 finished in 6 msecs
816 12:07:01.219115 USB2 port 1 scanning...
817 12:07:01.222475 scan_static_bus for USB2 port 1
818 12:07:01.225252 scan_static_bus for USB2 port 1 done
819 12:07:01.232372 scan_bus: bus USB2 port 1 finished in 6 msecs
820 12:07:01.235624 USB2 port 2 scanning...
821 12:07:01.238642 scan_static_bus for USB2 port 2
822 12:07:01.242065 scan_static_bus for USB2 port 2 done
823 12:07:01.245234 scan_bus: bus USB2 port 2 finished in 6 msecs
824 12:07:01.248920 USB2 port 3 scanning...
825 12:07:01.251947 scan_static_bus for USB2 port 3
826 12:07:01.255674 scan_static_bus for USB2 port 3 done
827 12:07:01.258607 scan_bus: bus USB2 port 3 finished in 6 msecs
828 12:07:01.261697 USB2 port 5 scanning...
829 12:07:01.266012 scan_static_bus for USB2 port 5
830 12:07:01.269013 scan_static_bus for USB2 port 5 done
831 12:07:01.275707 scan_bus: bus USB2 port 5 finished in 6 msecs
832 12:07:01.275815 USB2 port 7 scanning...
833 12:07:01.278532 scan_static_bus for USB2 port 7
834 12:07:01.282165 scan_static_bus for USB2 port 7 done
835 12:07:01.288822 scan_bus: bus USB2 port 7 finished in 6 msecs
836 12:07:01.291774 USB3 port 0 scanning...
837 12:07:01.295453 scan_static_bus for USB3 port 0
838 12:07:01.298364 scan_static_bus for USB3 port 0 done
839 12:07:01.301700 scan_bus: bus USB3 port 0 finished in 6 msecs
840 12:07:01.305223 USB3 port 1 scanning...
841 12:07:01.308175 scan_static_bus for USB3 port 1
842 12:07:01.311710 scan_static_bus for USB3 port 1 done
843 12:07:01.315404 scan_bus: bus USB3 port 1 finished in 6 msecs
844 12:07:01.318272 USB3 port 2 scanning...
845 12:07:01.321992 scan_static_bus for USB3 port 2
846 12:07:01.324904 scan_static_bus for USB3 port 2 done
847 12:07:01.331723 scan_bus: bus USB3 port 2 finished in 6 msecs
848 12:07:01.331836 USB3 port 3 scanning...
849 12:07:01.335140 scan_static_bus for USB3 port 3
850 12:07:01.338306 scan_static_bus for USB3 port 3 done
851 12:07:01.341239
852 12:07:01.344690 scan_bus: bus USB3 port 3 finished in 6 msecs
853 12:07:01.347884 scan_static_bus for USB0 port 0 done
854 12:07:01.351429 scan_bus: bus USB0 port 0 finished in 172 msecs
855 12:07:01.358018 scan_static_bus for PCI: 00:14.0 done
856 12:07:01.361523 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
857 12:07:01.364556 PCI: 00:14.3 scanning...
858 12:07:01.368184 scan_static_bus for PCI: 00:14.3
859 12:07:01.371248 GENERIC: 0.0 enabled
860 12:07:01.374383 scan_static_bus for PCI: 00:14.3 done
861 12:07:01.378056 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
862 12:07:01.381649 PCI: 00:15.0 scanning...
863 12:07:01.384559 scan_static_bus for PCI: 00:15.0
864 12:07:01.384689 I2C: 00:2c enabled
865 12:07:01.387656
866 12:07:01.387766 I2C: 00:15 enabled
867 12:07:01.391306 scan_static_bus for PCI: 00:15.0 done
868 12:07:01.397463 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
869 12:07:01.397660 PCI: 00:15.1 scanning...
870 12:07:01.401150 scan_static_bus for PCI: 00:15.1
871 12:07:01.407790 scan_static_bus for PCI: 00:15.1 done
872 12:07:01.411407 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
873 12:07:01.414275 PCI: 00:15.2 scanning...
874 12:07:01.418076 scan_static_bus for PCI: 00:15.2
875 12:07:01.421194 GENERIC: 0.0 disabled
876 12:07:01.421357 I2C: 00:15 enabled
877 12:07:01.424563 I2C: 00:10 disabled
878 12:07:01.424709 I2C: 00:10 disabled
879 12:07:01.427542 I2C: 00:2c enabled
880 12:07:01.431166 I2C: 00:40 enabled
881 12:07:01.431354 I2C: 00:10 enabled
882 12:07:01.434250 I2C: 00:39 enabled
883 12:07:01.437797 scan_static_bus for PCI: 00:15.2 done
884 12:07:01.440653 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
885 12:07:01.444370 PCI: 00:15.3 scanning...
886 12:07:01.447486 scan_static_bus for PCI: 00:15.3
887 12:07:01.450929 I2C: 00:36 enabled
888 12:07:01.451120 I2C: 00:10 disabled
889 12:07:01.453978 I2C: 00:0c enabled
890 12:07:01.457635 I2C: 00:50 enabled
891 12:07:01.460586 scan_static_bus for PCI: 00:15.3 done
892 12:07:01.463744 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
893 12:07:01.467368 PCI: 00:19.0 scanning...
894 12:07:01.470265 scan_static_bus for PCI: 00:19.0
895 12:07:01.473865 I2C: 00:1a enabled
896 12:07:01.474012 I2C: 00:1a disabled
897 12:07:01.477104 I2C: 00:1a disabled
898 12:07:01.477233 I2C: 00:28 enabled
899 12:07:01.480750 I2C: 00:29 enabled
900 12:07:01.483818 scan_static_bus for PCI: 00:19.0 done
901 12:07:01.490255 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
902 12:07:01.490411 PCI: 00:1e.2 scanning...
903 12:07:01.493960 scan_generic_bus for PCI: 00:1e.2
904 12:07:01.496994 SPI: 00 enabled
905 12:07:01.503574 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
906 12:07:01.506724 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
907 12:07:01.510771 PCI: 00:1f.0 scanning...
908 12:07:01.514029 scan_static_bus for PCI: 00:1f.0
909 12:07:01.517000 PNP: 0c09.0 enabled
910 12:07:01.517098 PNP: 0c09.0 scanning...
911 12:07:01.520652 scan_static_bus for PNP: 0c09.0
912 12:07:01.523644 scan_static_bus for PNP: 0c09.0 done
913 12:07:01.526860
914 12:07:01.530372 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
915 12:07:01.533848 scan_static_bus for PCI: 00:1f.0 done
916 12:07:01.540392 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
917 12:07:01.540500 PCI: 00:1f.3 scanning...
918 12:07:01.543577 scan_static_bus for PCI: 00:1f.3
919 12:07:01.547030 GENERIC: 0.0 disabled
920 12:07:01.550133 scan_static_bus for PCI: 00:1f.3 done
921 12:07:01.556545 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
922 12:07:01.556677 PCI: 00:1f.5 scanning...
923 12:07:01.560030 scan_generic_bus for PCI: 00:1f.5
924 12:07:01.566658 scan_generic_bus for PCI: 00:1f.5 done
925 12:07:01.569613 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
926 12:07:01.573262 scan_bus: bus DOMAIN: 0000 finished in 647 msecs
927 12:07:01.579868 scan_static_bus for Root Device done
928 12:07:01.583046 scan_bus: bus Root Device finished in 666 msecs
929 12:07:01.583150 done
930 12:07:01.590175 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1087 ms
931 12:07:01.593127 Chrome EC: UHEPI supported
932 12:07:01.600044 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
933 12:07:01.606592 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
934 12:07:01.609726 SPI flash protection: WPSW=0 SRP0=1
935 12:07:01.613389 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
936 12:07:01.620000 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
937 12:07:01.622861 found VGA at PCI: 00:02.0
938 12:07:01.626516 Setting up VGA for PCI: 00:02.0
939 12:07:01.629498 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
940 12:07:01.636001 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
941 12:07:01.639372 Allocating resources...
942 12:07:01.639483 Reading resources...
943 12:07:01.642796 Root Device read_resources bus 0 link: 0
944 12:07:01.646575
945 12:07:01.649680 CPU_CLUSTER: 0 read_resources bus 0 link: 0
946 12:07:01.652700 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
947 12:07:01.660285 DOMAIN: 0000 read_resources bus 0 link: 0
948 12:07:01.664030 PCI: 00:04.0 read_resources bus 1 link: 0
949 12:07:01.667469 PCI: 00:04.0 read_resources bus 1 link: 0 done
950 12:07:01.674087 PCI: 00:05.0 read_resources bus 2 link: 0
951 12:07:01.677912 PCI: 00:05.0 read_resources bus 2 link: 0 done
952 12:07:01.681429 PCI: 00:14.0 read_resources bus 0 link: 0
953 12:07:01.688157 USB0 port 0 read_resources bus 0 link: 0
954 12:07:01.694947 USB0 port 0 read_resources bus 0 link: 0 done
955 12:07:01.698036 PCI: 00:14.0 read_resources bus 0 link: 0 done
956 12:07:01.701711 PCI: 00:14.3 read_resources bus 0 link: 0
957 12:07:01.757555 PCI: 00:14.3 read_resources bus 0 link: 0 done
958 12:07:01.757914 PCI: 00:15.0 read_resources bus 0 link: 0
959 12:07:01.758000 PCI: 00:15.0 read_resources bus 0 link: 0 done
960 12:07:01.758074 PCI: 00:15.2 read_resources bus 0 link: 0
961 12:07:01.758335 PCI: 00:15.2 read_resources bus 0 link: 0 done
962 12:07:01.758661 PCI: 00:15.3 read_resources bus 0 link: 0
963 12:07:01.758756 PCI: 00:15.3 read_resources bus 0 link: 0 done
964 12:07:01.759021
965 12:07:01.759098 PCI: 00:19.0 read_resources bus 0 link: 0
966 12:07:01.759361 PCI: 00:19.0 read_resources bus 0 link: 0 done
967 12:07:01.759441 PCI: 00:1e.2 read_resources bus 3 link: 0
968 12:07:01.759511 PCI: 00:1e.2 read_resources bus 3 link: 0 done
969 12:07:01.809729 PCI: 00:1f.0 read_resources bus 0 link: 0
970 12:07:01.810162 PCI: 00:1f.0 read_resources bus 0 link: 0 done
971 12:07:01.810262 PCI: 00:1f.3 read_resources bus 0 link: 0
972 12:07:01.810338 PCI: 00:1f.3 read_resources bus 0 link: 0 done
973 12:07:01.810407 DOMAIN: 0000 read_resources bus 0 link: 0 done
974 12:07:01.810474 Root Device read_resources bus 0 link: 0 done
975 12:07:01.810539 Done reading resources.
976 12:07:01.810794 Show resources in subtree (Root Device)...After reading.
977 12:07:01.810868 Root Device child on link 0 CPU_CLUSTER: 0
978 12:07:01.810933 CPU_CLUSTER: 0 child on link 0 APIC: 00
979 12:07:01.810997 APIC: 00
980 12:07:01.811059 APIC: 02
981 12:07:01.811121 DOMAIN: 0000 child on link 0 PCI: 00:00.0
982 12:07:01.853170 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
983 12:07:01.853533 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
984 12:07:01.853626 PCI: 00:00.0
985 12:07:01.853699 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
986 12:07:01.854184 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
987 12:07:01.860276 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
988 12:07:01.870594 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
989 12:07:01.877003 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
990 12:07:01.887354 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
991 12:07:01.896967 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
992 12:07:01.906704 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
993 12:07:01.917136 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
994 12:07:01.926716 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
995 12:07:01.933095 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
996 12:07:01.943448 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
997 12:07:01.953440 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
998 12:07:01.963524 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
999 12:07:01.969672 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1000 12:07:01.973186
1001 12:07:01.979920 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1002 12:07:01.989586 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1003 12:07:01.999748 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1004 12:07:02.009568 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1005 12:07:02.009676 PCI: 00:02.0
1006 12:07:02.022979 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1007 12:07:02.033156 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1008 12:07:02.039635 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1009 12:07:02.046219 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1010 12:07:02.056466 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1011 12:07:02.056589 GENERIC: 0.0
1012 12:07:02.059298 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1013 12:07:02.073007 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1014 12:07:02.073140 GENERIC: 0.0
1015 12:07:02.075891 PCI: 00:08.0
1016 12:07:02.086165 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 12:07:02.089003 PCI: 00:14.0 child on link 0 USB0 port 0
1018 12:07:02.099134 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1019 12:07:02.102112 USB0 port 0 child on link 0 USB2 port 0
1020 12:07:02.105780 USB2 port 0
1021 12:07:02.105884 USB2 port 1
1022 12:07:02.108905 USB2 port 2
1023 12:07:02.109009 USB2 port 3
1024 12:07:02.112577 USB2 port 4
1025 12:07:02.112703 USB2 port 5
1026 12:07:02.115712 USB2 port 6
1027 12:07:02.115810 USB2 port 7
1028 12:07:02.119422
1029 12:07:02.119520 USB3 port 0
1030 12:07:02.122451 USB3 port 1
1031 12:07:02.122552 USB3 port 2
1032 12:07:02.125446 USB3 port 3
1033 12:07:02.125572 PCI: 00:14.2
1034 12:07:02.129051 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1035 12:07:02.138664 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 12:07:02.142333 GENERIC: 0.0
1037 12:07:02.142433 PCI: 00:14.5
1038 12:07:02.145829
1039 12:07:02.152394 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1040 12:07:02.155639
1041 12:07:02.158994 PCI: 00:15.0 child on link 0 I2C: 00:2c
1042 12:07:02.168750 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1043 12:07:02.168887 I2C: 00:2c
1044 12:07:02.171842 I2C: 00:15
1045 12:07:02.171940 PCI: 00:15.1
1046 12:07:02.182158 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1047 12:07:02.188844 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1048 12:07:02.198367 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1049 12:07:02.198498 GENERIC: 0.0
1050 12:07:02.201857 I2C: 00:15
1051 12:07:02.201956 I2C: 00:10
1052 12:07:02.202033 I2C: 00:10
1053 12:07:02.205425
1054 12:07:02.205529 I2C: 00:2c
1055 12:07:02.205605 I2C: 00:40
1056 12:07:02.208538 I2C: 00:10
1057 12:07:02.208634 I2C: 00:39
1058 12:07:02.215095 PCI: 00:15.3 child on link 0 I2C: 00:36
1059 12:07:02.225398 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1060 12:07:02.225527 I2C: 00:36
1061 12:07:02.228636 I2C: 00:10
1062 12:07:02.228734 I2C: 00:0c
1063 12:07:02.232071 I2C: 00:50
1064 12:07:02.232169 PCI: 00:16.0
1065 12:07:02.242221 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1066 12:07:02.245150 PCI: 00:19.0 child on link 0 I2C: 00:1a
1067 12:07:02.255291 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1068 12:07:02.258457 I2C: 00:1a
1069 12:07:02.258558 I2C: 00:1a
1070 12:07:02.262042 I2C: 00:1a
1071 12:07:02.262138 I2C: 00:28
1072 12:07:02.264957 I2C: 00:29
1073 12:07:02.265053 PCI: 00:19.2
1074 12:07:02.275187 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1075 12:07:02.278764
1076 12:07:02.285346 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1077 12:07:02.288461
1078 12:07:02.288559 PCI: 00:1a.0
1079 12:07:02.298110 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1080 12:07:02.298222 PCI: 00:1e.0
1081 12:07:02.301637
1082 12:07:02.304634 PCI: 00:1e.2 child on link 0 SPI: 00
1083 12:07:02.314897 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1084 12:07:02.315010 SPI: 00
1085 12:07:02.318021 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1086 12:07:02.328237 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1087 12:07:02.331406 PNP: 0c09.0
1088 12:07:02.339167 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1089 12:07:02.339272 PCI: 00:1f.2
1090 12:07:02.349138 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1091 12:07:02.358867 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1092 12:07:02.362018 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1093 12:07:02.371992 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1094 12:07:02.382352 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1095 12:07:02.385351 GENERIC: 0.0
1096 12:07:02.385460 PCI: 00:1f.5
1097 12:07:02.395566 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1098 12:07:02.402014 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1099 12:07:02.405415
1100 12:07:02.411658 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1101 12:07:02.418353 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1102 12:07:02.425242 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1103 12:07:02.431735 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1104 12:07:02.438370 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1105 12:07:02.441894 DOMAIN: 0000: Resource ranges:
1106 12:07:02.444747 * Base: 1000, Size: 800, Tag: 100
1107 12:07:02.451886 * Base: 1900, Size: e700, Tag: 100
1108 12:07:02.454821 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1109 12:07:02.461304 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1110 12:07:02.467993 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1111 12:07:02.474646 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1112 12:07:02.478135
1113 12:07:02.484827 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1114 12:07:02.491483 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1115 12:07:02.498195 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1116 12:07:02.501249
1117 12:07:02.507908 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1118 12:07:02.514754 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1119 12:07:02.521462 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1120 12:07:02.531308 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1121 12:07:02.537919 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1122 12:07:02.544422 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1123 12:07:02.554295 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1124 12:07:02.561074 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1125 12:07:02.567194 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1126 12:07:02.577485 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1127 12:07:02.584083 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1128 12:07:02.590791 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1129 12:07:02.601058 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1130 12:07:02.607670 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1131 12:07:02.614282 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1132 12:07:02.623978 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1133 12:07:02.630192 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1134 12:07:02.633762 DOMAIN: 0000: Resource ranges:
1135 12:07:02.636974 * Base: 7fc00000, Size: 40400000, Tag: 200
1136 12:07:02.643471 * Base: d0000000, Size: 2b000000, Tag: 200
1137 12:07:02.647051 * Base: fb001000, Size: 2fff000, Tag: 200
1138 12:07:02.650084 * Base: fe010000, Size: 22000, Tag: 200
1139 12:07:02.653626 * Base: fe033000, Size: a4d000, Tag: 200
1140 12:07:02.659977 * Base: fea88000, Size: 2f8000, Tag: 200
1141 12:07:02.663596 * Base: fed88000, Size: 8000, Tag: 200
1142 12:07:02.666614 * Base: fed93000, Size: d000, Tag: 200
1143 12:07:02.670146 * Base: feda2000, Size: 125e000, Tag: 200
1144 12:07:02.676797 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1145 12:07:02.683618 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1146 12:07:02.690061 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1147 12:07:02.696835 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1148 12:07:02.702876 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1149 12:07:02.710073 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1150 12:07:02.716785 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1151 12:07:02.723298 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1152 12:07:02.729958 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1153 12:07:02.736448 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1154 12:07:02.743052 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1155 12:07:02.749755 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1156 12:07:02.756210 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1157 12:07:02.763333 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1158 12:07:02.769343 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1159 12:07:02.775897 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1160 12:07:02.783133 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1161 12:07:02.789360 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1162 12:07:02.796007 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1163 12:07:02.802644 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1164 12:07:02.809386 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1165 12:07:02.816206 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1166 12:07:02.822355 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1167 12:07:02.829161 Root Device assign_resources, bus 0 link: 0
1168 12:07:02.832196 DOMAIN: 0000 assign_resources, bus 0 link: 0
1169 12:07:02.842598 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1170 12:07:02.848656 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1171 12:07:02.855587 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1172 12:07:02.865747 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1173 12:07:02.868793 PCI: 00:04.0 assign_resources, bus 1 link: 0
1174 12:07:02.875670 PCI: 00:04.0 assign_resources, bus 1 link: 0
1175 12:07:02.882208 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1176 12:07:02.885119 PCI: 00:05.0 assign_resources, bus 2 link: 0
1177 12:07:02.888845
1178 12:07:02.892449 PCI: 00:05.0 assign_resources, bus 2 link: 0
1179 12:07:02.898894 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1180 12:07:02.908604 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1181 12:07:02.912241 PCI: 00:14.0 assign_resources, bus 0 link: 0
1182 12:07:02.915926 PCI: 00:14.0 assign_resources, bus 0 link: 0
1183 12:07:02.925959 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1184 12:07:02.929654 PCI: 00:14.3 assign_resources, bus 0 link: 0
1185 12:07:02.935698 PCI: 00:14.3 assign_resources, bus 0 link: 0
1186 12:07:02.942971 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1187 12:07:02.949111 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1188 12:07:02.952536
1189 12:07:02.955929 PCI: 00:15.0 assign_resources, bus 0 link: 0
1190 12:07:02.958882 PCI: 00:15.0 assign_resources, bus 0 link: 0
1191 12:07:02.969022 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1192 12:07:02.975742 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1193 12:07:02.982219 PCI: 00:15.2 assign_resources, bus 0 link: 0
1194 12:07:02.985370 PCI: 00:15.2 assign_resources, bus 0 link: 0
1195 12:07:02.992164 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1196 12:07:02.998819 PCI: 00:15.3 assign_resources, bus 0 link: 0
1197 12:07:03.001880 PCI: 00:15.3 assign_resources, bus 0 link: 0
1198 12:07:03.012309 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1199 12:07:03.018360 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1200 12:07:03.021649 PCI: 00:19.0 assign_resources, bus 0 link: 0
1201 12:07:03.025290
1202 12:07:03.028349 PCI: 00:19.0 assign_resources, bus 0 link: 0
1203 12:07:03.034910 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1204 12:07:03.044713 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1205 12:07:03.051940 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1206 12:07:03.058597 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1207 12:07:03.061475 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1208 12:07:03.064977 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1209 12:07:03.071888 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1210 12:07:03.075239 LPC: Trying to open IO window from 800 size 1ff
1211 12:07:03.085394 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1212 12:07:03.091703 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1213 12:07:03.098338 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1214 12:07:03.101848 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1215 12:07:03.108748 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1216 12:07:03.114776 DOMAIN: 0000 assign_resources, bus 0 link: 0
1217 12:07:03.118337 Root Device assign_resources, bus 0 link: 0
1218 12:07:03.121886 Done setting resources.
1219 12:07:03.128608 Show resources in subtree (Root Device)...After assigning values.
1220 12:07:03.131644 Root Device child on link 0 CPU_CLUSTER: 0
1221 12:07:03.134717 CPU_CLUSTER: 0 child on link 0 APIC: 00
1222 12:07:03.138312 APIC: 00
1223 12:07:03.138411 APIC: 02
1224 12:07:03.141434 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1225 12:07:03.145033
1226 12:07:03.151743 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1227 12:07:03.161315 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1228 12:07:03.164987 PCI: 00:00.0
1229 12:07:03.174667 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 12:07:03.181696 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1231 12:07:03.191269 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1232 12:07:03.201611 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1233 12:07:03.211366 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1234 12:07:03.221390 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1235 12:07:03.228133 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1236 12:07:03.231812
1237 12:07:03.237990 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1238 12:07:03.248150 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1239 12:07:03.257882 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1240 12:07:03.267956 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1241 12:07:03.277855 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1242 12:07:03.284595 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1243 12:07:03.294223 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1244 12:07:03.304101 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1245 12:07:03.314319 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1246 12:07:03.323989 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1247 12:07:03.334171 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1248 12:07:03.340955 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1249 12:07:03.343965 PCI: 00:02.0
1250 12:07:03.354344 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1251 12:07:03.364425 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1252 12:07:03.374014 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1253 12:07:03.377405 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1254 12:07:03.390575 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1255 12:07:03.390711 GENERIC: 0.0
1256 12:07:03.394291 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1257 12:07:03.407141 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1258 12:07:03.407267 GENERIC: 0.0
1259 12:07:03.410573 PCI: 00:08.0
1260 12:07:03.420471 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1261 12:07:03.423631 PCI: 00:14.0 child on link 0 USB0 port 0
1262 12:07:03.433971 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1263 12:07:03.440644 USB0 port 0 child on link 0 USB2 port 0
1264 12:07:03.440742 USB2 port 0
1265 12:07:03.443702 USB2 port 1
1266 12:07:03.443788 USB2 port 2
1267 12:07:03.447443 USB2 port 3
1268 12:07:03.447528 USB2 port 4
1269 12:07:03.450389 USB2 port 5
1270 12:07:03.450473 USB2 port 6
1271 12:07:03.453951 USB2 port 7
1272 12:07:03.454036 USB3 port 0
1273 12:07:03.457086 USB3 port 1
1274 12:07:03.457184 USB3 port 2
1275 12:07:03.460639 USB3 port 3
1276 12:07:03.460757 PCI: 00:14.2
1277 12:07:03.467125 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1278 12:07:03.476813 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1279 12:07:03.476936 GENERIC: 0.0
1280 12:07:03.480259 PCI: 00:14.5
1281 12:07:03.490579 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1282 12:07:03.493483 PCI: 00:15.0 child on link 0 I2C: 00:2c
1283 12:07:03.503202 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1284 12:07:03.506712 I2C: 00:2c
1285 12:07:03.506804 I2C: 00:15
1286 12:07:03.509866 PCI: 00:15.1
1287 12:07:03.520058 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1288 12:07:03.523116 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1289 12:07:03.533218 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1290 12:07:03.536418 GENERIC: 0.0
1291 12:07:03.536523 I2C: 00:15
1292 12:07:03.540022 I2C: 00:10
1293 12:07:03.540128 I2C: 00:10
1294 12:07:03.543187 I2C: 00:2c
1295 12:07:03.543285 I2C: 00:40
1296 12:07:03.546290 I2C: 00:10
1297 12:07:03.546386 I2C: 00:39
1298 12:07:03.553059 PCI: 00:15.3 child on link 0 I2C: 00:36
1299 12:07:03.563339 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1300 12:07:03.563470 I2C: 00:36
1301 12:07:03.566365 I2C: 00:10
1302 12:07:03.566467 I2C: 00:0c
1303 12:07:03.569807 I2C: 00:50
1304 12:07:03.569941 PCI: 00:16.0
1305 12:07:03.579765 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1306 12:07:03.582834 PCI: 00:19.0 child on link 0 I2C: 00:1a
1307 12:07:03.596060 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1308 12:07:03.596185 I2C: 00:1a
1309 12:07:03.599757 I2C: 00:1a
1310 12:07:03.599854 I2C: 00:1a
1311 12:07:03.599928 I2C: 00:28
1312 12:07:03.602875 I2C: 00:29
1313 12:07:03.602970 PCI: 00:19.2
1314 12:07:03.616264 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1315 12:07:03.626401 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1316 12:07:03.626518 PCI: 00:1a.0
1317 12:07:03.635970 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1318 12:07:03.639656
1319 12:07:03.639750 PCI: 00:1e.0
1320 12:07:03.642727 PCI: 00:1e.2 child on link 0 SPI: 00
1321 12:07:03.652912 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1322 12:07:03.655813 SPI: 00
1323 12:07:03.659802 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1324 12:07:03.669543 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1325 12:07:03.669674 PNP: 0c09.0
1326 12:07:03.679422 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1327 12:07:03.679591 PCI: 00:1f.2
1328 12:07:03.689260 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1329 12:07:03.699454 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1330 12:07:03.702472 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1331 12:07:03.712266 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1332 12:07:03.725643 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1333 12:07:03.725801 GENERIC: 0.0
1334 12:07:03.729221 PCI: 00:1f.5
1335 12:07:03.738873 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1336 12:07:03.738990 Done allocating resources.
1337 12:07:03.742005
1338 12:07:03.745686 BS: BS_DEV_RESOURCES run times (exec / console): 20 / 2101 ms
1339 12:07:03.748694 Enabling resources...
1340 12:07:03.752449 PCI: 00:00.0 subsystem <- 8086/4e22
1341 12:07:03.755426 PCI: 00:00.0 cmd <- 06
1342 12:07:03.759043 PCI: 00:02.0 subsystem <- 8086/4e55
1343 12:07:03.762075 PCI: 00:02.0 cmd <- 03
1344 12:07:03.765611 PCI: 00:04.0 subsystem <- 8086/4e03
1345 12:07:03.768700 PCI: 00:04.0 cmd <- 02
1346 12:07:03.772333 PCI: 00:05.0 bridge ctrl <- 0003
1347 12:07:03.775387 PCI: 00:05.0 subsystem <- 8086/4e19
1348 12:07:03.779051 PCI: 00:05.0 cmd <- 02
1349 12:07:03.779141 PCI: 00:08.0 cmd <- 06
1350 12:07:03.782346 PCI: 00:14.0 subsystem <- 8086/4ded
1351 12:07:03.785326
1352 12:07:03.785416 PCI: 00:14.0 cmd <- 02
1353 12:07:03.788869 PCI: 00:14.3 subsystem <- 8086/4df0
1354 12:07:03.791961 PCI: 00:14.3 cmd <- 02
1355 12:07:03.795520 PCI: 00:14.5 subsystem <- 8086/4df8
1356 12:07:03.799037 PCI: 00:14.5 cmd <- 06
1357 12:07:03.802062 PCI: 00:15.0 subsystem <- 8086/4de8
1358 12:07:03.805160 PCI: 00:15.0 cmd <- 02
1359 12:07:03.808713 PCI: 00:15.1 subsystem <- 8086/4de9
1360 12:07:03.812388 PCI: 00:15.1 cmd <- 02
1361 12:07:03.815381 PCI: 00:15.2 subsystem <- 8086/4dea
1362 12:07:03.815511 PCI: 00:15.2 cmd <- 02
1363 12:07:03.822139 PCI: 00:15.3 subsystem <- 8086/4deb
1364 12:07:03.822276 PCI: 00:15.3 cmd <- 02
1365 12:07:03.825748 PCI: 00:16.0 subsystem <- 8086/4de0
1366 12:07:03.828845 PCI: 00:16.0 cmd <- 02
1367 12:07:03.832493 PCI: 00:19.0 subsystem <- 8086/4dc5
1368 12:07:03.835444 PCI: 00:19.0 cmd <- 02
1369 12:07:03.838965 PCI: 00:19.2 subsystem <- 8086/4dc7
1370 12:07:03.841972 PCI: 00:19.2 cmd <- 06
1371 12:07:03.845609 PCI: 00:1a.0 subsystem <- 8086/4dc4
1372 12:07:03.848703 PCI: 00:1a.0 cmd <- 06
1373 12:07:03.852378 PCI: 00:1e.2 subsystem <- 8086/4daa
1374 12:07:03.855450 PCI: 00:1e.2 cmd <- 06
1375 12:07:03.858329 PCI: 00:1f.0 subsystem <- 8086/4d87
1376 12:07:03.858456 PCI: 00:1f.0 cmd <- 407
1377 12:07:03.865287 PCI: 00:1f.3 subsystem <- 8086/4dc8
1378 12:07:03.865421 PCI: 00:1f.3 cmd <- 02
1379 12:07:03.868661 PCI: 00:1f.5 subsystem <- 8086/4da4
1380 12:07:03.871686 PCI: 00:1f.5 cmd <- 406
1381 12:07:03.876382 done.
1382 12:07:03.879918 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1383 12:07:03.883330 Initializing devices...
1384 12:07:03.886385 Root Device init
1385 12:07:03.886514 mainboard: EC init
1386 12:07:03.893508 Chrome EC: Set SMI mask to 0x0000000000000000
1387 12:07:03.896365 Chrome EC: clear events_b mask to 0x0000000000000000
1388 12:07:03.903421 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1389 12:07:03.909558 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1390 12:07:03.916384 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1391 12:07:03.919947 Chrome EC: Set WAKE mask to 0x0000000000000000
1392 12:07:03.926821 Root Device init finished in 35 msecs
1393 12:07:03.926963 PCI: 00:00.0 init
1394 12:07:03.929790
1395 12:07:03.929918 CPU TDP = 6 Watts
1396 12:07:03.933258 CPU PL1 = 7 Watts
1397 12:07:03.936326 CPU PL2 = 12 Watts
1398 12:07:03.939942 PCI: 00:00.0 init finished in 6 msecs
1399 12:07:03.940079 PCI: 00:02.0 init
1400 12:07:03.942969 GMA: Found VBT in CBFS
1401 12:07:03.946476 GMA: Found valid VBT in CBFS
1402 12:07:03.952790 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1403 12:07:03.959582 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1404 12:07:03.963037 PCI: 00:02.0 init finished in 18 msecs
1405 12:07:03.966685 PCI: 00:08.0 init
1406 12:07:03.969646 PCI: 00:08.0 init finished in 0 msecs
1407 12:07:03.973271 PCI: 00:14.0 init
1408 12:07:03.976296 XHCI: Updated LFPS sampling OFF time to 9 ms
1409 12:07:03.979534 PCI: 00:14.0 init finished in 4 msecs
1410 12:07:03.982993 PCI: 00:15.0 init
1411 12:07:03.986093 I2C bus 0 version 0x3230302a
1412 12:07:03.989602 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1413 12:07:03.993378 PCI: 00:15.0 init finished in 6 msecs
1414 12:07:03.996453 PCI: 00:15.1 init
1415 12:07:04.000013 I2C bus 1 version 0x3230302a
1416 12:07:04.003042 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1417 12:07:04.006595 PCI: 00:15.1 init finished in 6 msecs
1418 12:07:04.006694 PCI: 00:15.2 init
1419 12:07:04.009719 I2C bus 2 version 0x3230302a
1420 12:07:04.012808 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1421 12:07:04.019402 PCI: 00:15.2 init finished in 6 msecs
1422 12:07:04.019506 PCI: 00:15.3 init
1423 12:07:04.022801 I2C bus 3 version 0x3230302a
1424 12:07:04.026041 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1425 12:07:04.029528 PCI: 00:15.3 init finished in 6 msecs
1426 12:07:04.032616 PCI: 00:16.0 init
1427 12:07:04.036322 PCI: 00:16.0 init finished in 0 msecs
1428 12:07:04.039887 PCI: 00:19.0 init
1429 12:07:04.042788 I2C bus 4 version 0x3230302a
1430 12:07:04.046379 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1431 12:07:04.049425 PCI: 00:19.0 init finished in 6 msecs
1432 12:07:04.052604 PCI: 00:1a.0 init
1433 12:07:04.056101 PCI: 00:1a.0 init finished in 0 msecs
1434 12:07:04.059262 PCI: 00:1f.0 init
1435 12:07:04.062864 IOAPIC: Initializing IOAPIC at 0xfec00000
1436 12:07:04.066588 IOAPIC: Bootstrap Processor Local APIC = 0x00
1437 12:07:04.069707 IOAPIC: ID = 0x02
1438 12:07:04.072686 IOAPIC: Dumping registers
1439 12:07:04.072790 reg 0x0000: 0x02000000
1440 12:07:04.076241 reg 0x0001: 0x00770020
1441 12:07:04.079250 reg 0x0002: 0x00000000
1442 12:07:04.082914 PCI: 00:1f.0 init finished in 21 msecs
1443 12:07:04.086230 PCI: 00:1f.2 init
1444 12:07:04.086333 Disabling ACPI via APMC.
1445 12:07:04.091782 APMC done.
1446 12:07:04.094818 PCI: 00:1f.2 init finished in 5 msecs
1447 12:07:04.106092 PNP: 0c09.0 init
1448 12:07:04.109128 Google Chrome EC uptime: 6.579 seconds
1449 12:07:04.115688 Google Chrome AP resets since EC boot: 0
1450 12:07:04.119247 Google Chrome most recent AP reset causes:
1451 12:07:04.122382 Google Chrome EC reset flags at last EC boot: reset-pin
1452 12:07:04.125898
1453 12:07:04.129579 PNP: 0c09.0 init finished in 18 msecs
1454 12:07:04.129677 Devices initialized
1455 12:07:04.132545 Show all devs... After init.
1456 12:07:04.135726 Root Device: enabled 1
1457 12:07:04.139178 CPU_CLUSTER: 0: enabled 1
1458 12:07:04.139276 DOMAIN: 0000: enabled 1
1459 12:07:04.142645
1460 12:07:04.142743 PCI: 00:00.0: enabled 1
1461 12:07:04.145811 PCI: 00:02.0: enabled 1
1462 12:07:04.149307 PCI: 00:04.0: enabled 1
1463 12:07:04.149405 PCI: 00:05.0: enabled 1
1464 12:07:04.152370 PCI: 00:09.0: enabled 0
1465 12:07:04.156024 PCI: 00:12.6: enabled 0
1466 12:07:04.159104 PCI: 00:14.0: enabled 1
1467 12:07:04.159200 PCI: 00:14.1: enabled 0
1468 12:07:04.162157 PCI: 00:14.2: enabled 0
1469 12:07:04.165704 PCI: 00:14.3: enabled 1
1470 12:07:04.169334 PCI: 00:14.5: enabled 1
1471 12:07:04.169435 PCI: 00:15.0: enabled 1
1472 12:07:04.172162 PCI: 00:15.1: enabled 1
1473 12:07:04.175750 PCI: 00:15.2: enabled 1
1474 12:07:04.178774 PCI: 00:15.3: enabled 1
1475 12:07:04.178872 PCI: 00:16.0: enabled 1
1476 12:07:04.182354 PCI: 00:16.1: enabled 0
1477 12:07:04.185880 PCI: 00:16.4: enabled 0
1478 12:07:04.185976 PCI: 00:16.5: enabled 0
1479 12:07:04.188903 PCI: 00:17.0: enabled 0
1480 12:07:04.192516 PCI: 00:19.0: enabled 1
1481 12:07:04.195904 PCI: 00:19.1: enabled 0
1482 12:07:04.196003 PCI: 00:19.2: enabled 1
1483 12:07:04.198918 PCI: 00:1a.0: enabled 1
1484 12:07:04.202393 PCI: 00:1c.0: enabled 0
1485 12:07:04.205302 PCI: 00:1c.1: enabled 0
1486 12:07:04.205431 PCI: 00:1c.2: enabled 0
1487 12:07:04.208726 PCI: 00:1c.3: enabled 0
1488 12:07:04.212092 PCI: 00:1c.4: enabled 0
1489 12:07:04.215316 PCI: 00:1c.5: enabled 0
1490 12:07:04.215441 PCI: 00:1c.6: enabled 0
1491 12:07:04.218839 PCI: 00:1c.7: enabled 1
1492 12:07:04.221849 PCI: 00:1e.0: enabled 0
1493 12:07:04.221948 PCI: 00:1e.1: enabled 0
1494 12:07:04.225681
1495 12:07:04.225778 PCI: 00:1e.2: enabled 1
1496 12:07:04.228640 PCI: 00:1e.3: enabled 0
1497 12:07:04.232215 PCI: 00:1f.0: enabled 1
1498 12:07:04.232311 PCI: 00:1f.1: enabled 0
1499 12:07:04.235276 PCI: 00:1f.2: enabled 1
1500 12:07:04.238469 PCI: 00:1f.3: enabled 1
1501 12:07:04.242049 PCI: 00:1f.4: enabled 0
1502 12:07:04.242145 PCI: 00:1f.5: enabled 1
1503 12:07:04.245045 PCI: 00:1f.7: enabled 0
1504 12:07:04.248640 GENERIC: 0.0: enabled 1
1505 12:07:04.251745 GENERIC: 0.0: enabled 1
1506 12:07:04.251843 USB0 port 0: enabled 1
1507 12:07:04.255508 GENERIC: 0.0: enabled 1
1508 12:07:04.258412 I2C: 00:2c: enabled 1
1509 12:07:04.258512 I2C: 00:15: enabled 1
1510 12:07:04.261687 GENERIC: 0.0: enabled 0
1511 12:07:04.265224 I2C: 00:15: enabled 1
1512 12:07:04.265320 I2C: 00:10: enabled 0
1513 12:07:04.268719 I2C: 00:10: enabled 0
1514 12:07:04.271900 I2C: 00:2c: enabled 1
1515 12:07:04.272002 I2C: 00:40: enabled 1
1516 12:07:04.275292
1517 12:07:04.275403 I2C: 00:10: enabled 1
1518 12:07:04.278193 I2C: 00:39: enabled 1
1519 12:07:04.281757 I2C: 00:36: enabled 1
1520 12:07:04.281856 I2C: 00:10: enabled 0
1521 12:07:04.284741 I2C: 00:0c: enabled 1
1522 12:07:04.288311 I2C: 00:50: enabled 1
1523 12:07:04.288407 I2C: 00:1a: enabled 1
1524 12:07:04.291789 I2C: 00:1a: enabled 0
1525 12:07:04.294910 I2C: 00:1a: enabled 0
1526 12:07:04.295006 I2C: 00:28: enabled 1
1527 12:07:04.298339 I2C: 00:29: enabled 1
1528 12:07:04.301379 PCI: 00:00.0: enabled 1
1529 12:07:04.301481 SPI: 00: enabled 1
1530 12:07:04.305011 PNP: 0c09.0: enabled 1
1531 12:07:04.308064 GENERIC: 0.0: enabled 0
1532 12:07:04.308165 USB2 port 0: enabled 1
1533 12:07:04.311580 USB2 port 1: enabled 1
1534 12:07:04.314623 USB2 port 2: enabled 1
1535 12:07:04.314723 USB2 port 3: enabled 1
1536 12:07:04.318381
1537 12:07:04.318484 USB2 port 4: enabled 0
1538 12:07:04.321885 USB2 port 5: enabled 1
1539 12:07:04.324722 USB2 port 6: enabled 0
1540 12:07:04.324819 USB2 port 7: enabled 1
1541 12:07:04.327902 USB3 port 0: enabled 1
1542 12:07:04.331434 USB3 port 1: enabled 1
1543 12:07:04.331559 USB3 port 2: enabled 1
1544 12:07:04.335091 USB3 port 3: enabled 1
1545 12:07:04.338035 APIC: 00: enabled 1
1546 12:07:04.338132 APIC: 02: enabled 1
1547 12:07:04.341234 PCI: 00:08.0: enabled 1
1548 12:07:04.348303 BS: BS_DEV_INIT run times (exec / console): 23 / 438 ms
1549 12:07:04.351400 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1550 12:07:04.354783 ELOG: NV offset 0xbfa000 size 0x1000
1551 12:07:04.362894 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1552 12:07:04.369534 ELOG: Event(17) added with size 13 at 2023-01-24 12:07:03 UTC
1553 12:07:04.376194 ELOG: Event(92) added with size 9 at 2023-01-24 12:07:03 UTC
1554 12:07:04.382800 ELOG: Event(93) added with size 9 at 2023-01-24 12:07:03 UTC
1555 12:07:04.389426 ELOG: Event(9E) added with size 10 at 2023-01-24 12:07:03 UTC
1556 12:07:04.395903 ELOG: Event(9F) added with size 14 at 2023-01-24 12:07:03 UTC
1557 12:07:04.399533 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1558 12:07:04.406011 ELOG: Event(A1) added with size 10 at 2023-01-24 12:07:03 UTC
1559 12:07:04.416360 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1560 12:07:04.419396 ELOG: Event(A0) added with size 9 at 2023-01-24 12:07:03 UTC
1561 12:07:04.425911 elog_add_boot_reason: Logged dev mode boot
1562 12:07:04.432615 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1563 12:07:04.432727 Finalize devices...
1564 12:07:04.435752 Devices finalized
1565 12:07:04.439354 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1566 12:07:04.445971 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1567 12:07:04.452602 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1568 12:07:04.455595 ME: HFSTS1 : 0x80030045
1569 12:07:04.459332 ME: HFSTS2 : 0x30280136
1570 12:07:04.462302 ME: HFSTS3 : 0x00000050
1571 12:07:04.469092 ME: HFSTS4 : 0x00004000
1572 12:07:04.472742 ME: HFSTS5 : 0x00000000
1573 12:07:04.475725 ME: HFSTS6 : 0x40400006
1574 12:07:04.479414 ME: Manufacturing Mode : NO
1575 12:07:04.482301 ME: FW Partition Table : OK
1576 12:07:04.485794 ME: Bringup Loader Failure : NO
1577 12:07:04.488850 ME: Firmware Init Complete : NO
1578 12:07:04.492527 ME: Boot Options Present : NO
1579 12:07:04.496090 ME: Update In Progress : NO
1580 12:07:04.499078 ME: D0i3 Support : YES
1581 12:07:04.502417 ME: Low Power State Enabled : NO
1582 12:07:04.505620 ME: CPU Replaced : YES
1583 12:07:04.508692 ME: CPU Replacement Valid : YES
1584 12:07:04.512388 ME: Current Working State : 5
1585 12:07:04.515714 ME: Current Operation State : 1
1586 12:07:04.518691 ME: Current Operation Mode : 3
1587 12:07:04.521842 ME: Error Code : 0
1588 12:07:04.525323 ME: CPU Debug Disabled : YES
1589 12:07:04.528948 ME: TXT Support : NO
1590 12:07:04.535660 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 78 ms
1591 12:07:04.541980 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1592 12:07:04.545595 ACPI: Writing ACPI tables at 76b27000.
1593 12:07:04.545697 ACPI: * FACS
1594 12:07:04.548699 ACPI: * DSDT
1595 12:07:04.552364 Ramoops buffer: 0x100000@0x76a26000.
1596 12:07:04.555342 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1597 12:07:04.561995 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1598 12:07:04.565098 Google Chrome EC: version:
1599 12:07:04.568725 ro: magolor_1.1.9999-103b6f9
1600 12:07:04.571772 rw: magolor_1.1.9999-103b6f9
1601 12:07:04.571907 running image: 1
1602 12:07:04.578407 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1603 12:07:04.582683 ACPI: * FADT
1604 12:07:04.582785 SCI is IRQ9
1605 12:07:04.585689 ACPI: added table 1/32, length now 40
1606 12:07:04.589293
1607 12:07:04.589391 ACPI: * SSDT
1608 12:07:04.592158 Found 1 CPU(s) with 2 core(s) each.
1609 12:07:04.595334 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1610 12:07:04.602491 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1611 12:07:04.605545 Could not locate 'wifi_sar' in VPD.
1612 12:07:04.608661 Checking CBFS for default SAR values
1613 12:07:04.615225 wifi_sar_defaults.hex has bad len in CBFS
1614 12:07:04.618851 failed from getting SAR limits!
1615 12:07:04.621886 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1616 12:07:04.628851 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1617 12:07:04.631969 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1618 12:07:04.638551 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1619 12:07:04.641796 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1620 12:07:04.648920 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1621 12:07:04.651965 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1622 12:07:04.658749 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1623 12:07:04.665440 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1624 12:07:04.672156 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1625 12:07:04.675155 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1626 12:07:04.682043 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1627 12:07:04.688463 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1628 12:07:04.692148 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1629 12:07:04.695029 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1630 12:07:04.703455 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1631 12:07:04.706832 PS2K: Passing 101 keymaps to kernel
1632 12:07:04.713807 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1633 12:07:04.720331 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1634 12:07:04.723421 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1635 12:07:04.730065 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1636 12:07:04.733542 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1637 12:07:04.740135 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1638 12:07:04.747396 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1639 12:07:04.750403 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1640 12:07:04.757124 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1641 12:07:04.763689 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1642 12:07:04.766888 ACPI: added table 2/32, length now 44
1643 12:07:04.769909 ACPI: * MCFG
1644 12:07:04.773643 ACPI: added table 3/32, length now 48
1645 12:07:04.773745 ACPI: * TPM2
1646 12:07:04.776773 TPM2 log created at 0x76a16000
1647 12:07:04.780353 ACPI: added table 4/32, length now 52
1648 12:07:04.783403 ACPI: * MADT
1649 12:07:04.783501 SCI is IRQ9
1650 12:07:04.787107 ACPI: added table 5/32, length now 56
1651 12:07:04.790110 current = 76b2d580
1652 12:07:04.790213 ACPI: * DMAR
1653 12:07:04.796710 ACPI: added table 6/32, length now 60
1654 12:07:04.800355 ACPI: added table 7/32, length now 64
1655 12:07:04.800459 ACPI: * HPET
1656 12:07:04.803738 ACPI: added table 8/32, length now 68
1657 12:07:04.806821 ACPI: done.
1658 12:07:04.809932 ACPI tables: 26304 bytes.
1659 12:07:04.810051 smbios_write_tables: 76a15000
1660 12:07:04.813363
1661 12:07:04.817059 EC returned error result code 3
1662 12:07:04.820006 Couldn't obtain OEM name from CBI
1663 12:07:04.820115 Create SMBIOS type 16
1664 12:07:04.823669 Create SMBIOS type 17
1665 12:07:04.826617 GENERIC: 0.0 (WIFI Device)
1666 12:07:04.830329 SMBIOS tables: 913 bytes.
1667 12:07:04.833322 Writing table forward entry at 0x00000500
1668 12:07:04.840055 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1669 12:07:04.843171 Writing coreboot table at 0x76b4b000
1670 12:07:04.849937 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1671 12:07:04.853716 1. 0000000000001000-000000000009ffff: RAM
1672 12:07:04.856719 2. 00000000000a0000-00000000000fffff: RESERVED
1673 12:07:04.860159
1674 12:07:04.863310 3. 0000000000100000-0000000076a14fff: RAM
1675 12:07:04.870247 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1676 12:07:04.873257 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1677 12:07:04.879766 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1678 12:07:04.883435 7. 0000000077000000-000000007fbfffff: RESERVED
1679 12:07:04.890043 8. 00000000c0000000-00000000cfffffff: RESERVED
1680 12:07:04.893066 9. 00000000fb000000-00000000fb000fff: RESERVED
1681 12:07:04.900071 10. 00000000fe000000-00000000fe00ffff: RESERVED
1682 12:07:04.903553 11. 00000000fea80000-00000000fea87fff: RESERVED
1683 12:07:04.906711 12. 00000000fed80000-00000000fed87fff: RESERVED
1684 12:07:04.913220 13. 00000000fed90000-00000000fed92fff: RESERVED
1685 12:07:04.916226 14. 00000000feda0000-00000000feda1fff: RESERVED
1686 12:07:04.923395 15. 0000000100000000-00000001803fffff: RAM
1687 12:07:04.923508 Passing 4 GPIOs to payload:
1688 12:07:04.929805 NAME | PORT | POLARITY | VALUE
1689 12:07:04.936071 lid | undefined | high | high
1690 12:07:04.939772 power | undefined | high | low
1691 12:07:04.946601 oprom | undefined | high | low
1692 12:07:04.949565 EC in RW | 0x000000b9 | high | low
1693 12:07:04.956327 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 40e8
1694 12:07:04.959948 coreboot table: 1504 bytes.
1695 12:07:04.962887 IMD ROOT 0. 0x76fff000 0x00001000
1696 12:07:04.966139 IMD SMALL 1. 0x76ffe000 0x00001000
1697 12:07:04.969759 FSP MEMORY 2. 0x76c4e000 0x003b0000
1698 12:07:04.972787
1699 12:07:04.976453 CONSOLE 3. 0x76c2e000 0x00020000
1700 12:07:04.979486 FMAP 4. 0x76c2d000 0x00000578
1701 12:07:04.983230 TIME STAMP 5. 0x76c2c000 0x00000910
1702 12:07:04.986111 VBOOT WORK 6. 0x76c18000 0x00014000
1703 12:07:04.989770 ROMSTG STCK 7. 0x76c17000 0x00001000
1704 12:07:04.992699 AFTER CAR 8. 0x76c0d000 0x0000a000
1705 12:07:04.996345 RAMSTAGE 9. 0x76ba7000 0x00066000
1706 12:07:04.999301 REFCODE 10. 0x76b67000 0x00040000
1707 12:07:05.006565 SMM BACKUP 11. 0x76b57000 0x00010000
1708 12:07:05.009456 4f444749 12. 0x76b55000 0x00002000
1709 12:07:05.013110 EXT VBT13. 0x76b53000 0x00001c43
1710 12:07:05.016256 COREBOOT 14. 0x76b4b000 0x00008000
1711 12:07:05.020009 ACPI 15. 0x76b27000 0x00024000
1712 12:07:05.022970 ACPI GNVS 16. 0x76b26000 0x00001000
1713 12:07:05.026539 RAMOOPS 17. 0x76a26000 0x00100000
1714 12:07:05.029352 TPM2 TCGLOG18. 0x76a16000 0x00010000
1715 12:07:05.032676 SMBIOS 19. 0x76a15000 0x00000800
1716 12:07:05.036164 IMD small region:
1717 12:07:05.039624 IMD ROOT 0. 0x76ffec00 0x00000400
1718 12:07:05.042699 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1719 12:07:05.046144 VPD 2. 0x76ffeb80 0x0000004c
1720 12:07:05.052848 POWER STATE 3. 0x76ffeb40 0x00000040
1721 12:07:05.055933 ROMSTAGE 4. 0x76ffeb20 0x00000004
1722 12:07:05.059437 MEM INFO 5. 0x76ffe940 0x000001e0
1723 12:07:05.066173 BS: BS_WRITE_TABLES run times (exec / console): 6 / 518 ms
1724 12:07:05.069193 MTRR: Physical address space:
1725 12:07:05.075973 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1726 12:07:05.079079 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1727 12:07:05.086408 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1728 12:07:05.092468 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1729 12:07:05.099088 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1730 12:07:05.105642 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1731 12:07:05.112703 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1732 12:07:05.116305 MTRR: Fixed MSR 0x250 0x0606060606060606
1733 12:07:05.119243 MTRR: Fixed MSR 0x258 0x0606060606060606
1734 12:07:05.125678 MTRR: Fixed MSR 0x259 0x0000000000000000
1735 12:07:05.129213 MTRR: Fixed MSR 0x268 0x0606060606060606
1736 12:07:05.132252 MTRR: Fixed MSR 0x269 0x0606060606060606
1737 12:07:05.135694 MTRR: Fixed MSR 0x26a 0x0606060606060606
1738 12:07:05.139039 MTRR: Fixed MSR 0x26b 0x0606060606060606
1739 12:07:05.142601
1740 12:07:05.145626 MTRR: Fixed MSR 0x26c 0x0606060606060606
1741 12:07:05.148576 MTRR: Fixed MSR 0x26d 0x0606060606060606
1742 12:07:05.152234 MTRR: Fixed MSR 0x26e 0x0606060606060606
1743 12:07:05.155289 MTRR: Fixed MSR 0x26f 0x0606060606060606
1744 12:07:05.159581 call enable_fixed_mtrr()
1745 12:07:05.162774 CPU physical address size: 39 bits
1746 12:07:05.169320 MTRR: default type WB/UC MTRR counts: 6/5.
1747 12:07:05.172936 MTRR: UC selected as default type.
1748 12:07:05.175939 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1749 12:07:05.179024
1750 12:07:05.182757 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1751 12:07:05.189359 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1752 12:07:05.195935 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1753 12:07:05.202684 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1754 12:07:05.202829
1755 12:07:05.205743 MTRR check
1756 12:07:05.205870 Fixed MTRRs : Enabled
1757 12:07:05.209248 Variable MTRRs: Enabled
1758 12:07:05.209376
1759 12:07:05.212183 MTRR: Fixed MSR 0x250 0x0606060606060606
1760 12:07:05.219306 MTRR: Fixed MSR 0x258 0x0606060606060606
1761 12:07:05.222270 MTRR: Fixed MSR 0x259 0x0000000000000000
1762 12:07:05.225887 MTRR: Fixed MSR 0x268 0x0606060606060606
1763 12:07:05.228845 MTRR: Fixed MSR 0x269 0x0606060606060606
1764 12:07:05.235750 MTRR: Fixed MSR 0x26a 0x0606060606060606
1765 12:07:05.239077 MTRR: Fixed MSR 0x26b 0x0606060606060606
1766 12:07:05.242074 MTRR: Fixed MSR 0x26c 0x0606060606060606
1767 12:07:05.245489 MTRR: Fixed MSR 0x26d 0x0606060606060606
1768 12:07:05.248941 MTRR: Fixed MSR 0x26e 0x0606060606060606
1769 12:07:05.255656 MTRR: Fixed MSR 0x26f 0x0606060606060606
1770 12:07:05.258692 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1771 12:07:05.262429
1772 12:07:05.262527 call enable_fixed_mtrr()
1773 12:07:05.266802 Checking cr50 for pending updates
1774 12:07:05.270337 CPU physical address size: 39 bits
1775 12:07:05.274001 Reading cr50 TPM mode
1776 12:07:05.283666 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1777 12:07:05.290790 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1778 12:07:05.294054 Checking segment from ROM address 0xfff9d5b8
1779 12:07:05.301185 Checking segment from ROM address 0xfff9d5d4
1780 12:07:05.304157 Loading segment from ROM address 0xfff9d5b8
1781 12:07:05.307905 code (compression=0)
1782 12:07:05.314255 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1783 12:07:05.323928 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1784 12:07:05.327446 it's not compressed!
1785 12:07:05.452137 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1786 12:07:05.458758 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1787 12:07:05.466655 Loading segment from ROM address 0xfff9d5d4
1788 12:07:05.469676 Entry Point 0x30000000
1789 12:07:05.469779 Loaded segments
1790 12:07:05.476246 BS: BS_PAYLOAD_LOAD run times (exec / console): 125 / 61 ms
1791 12:07:05.492728 Finalizing chipset.
1792 12:07:05.495623 Finalizing SMM.
1793 12:07:05.495726 APMC done.
1794 12:07:05.502376 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1795 12:07:05.505752 mp_park_aps done after 0 msecs.
1796 12:07:05.508864 Jumping to boot code at 0x30000000(0x76b4b000)
1797 12:07:05.518851 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1798 12:07:05.518993
1799 12:07:05.519077
1800 12:07:05.519153
1801 12:07:05.522316 Starting depthcharge on Magolor...
1802 12:07:05.522412
1803 12:07:05.522795 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
1804 12:07:05.522917 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
1805 12:07:05.523021 Setting prompt string to ['dedede:']
1806 12:07:05.523116 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:46)
1807 12:07:05.531980 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1808 12:07:05.532126
1809 12:07:05.538628 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1810 12:07:05.538734
1811 12:07:05.542352 fw_config match found: AUDIO_AMP=UNPROVISIONED
1812 12:07:05.542480
1813 12:07:05.545363 Wipe memory regions:
1814 12:07:05.545460
1815 12:07:05.548858 [0x00000000001000, 0x000000000a0000)
1816 12:07:05.548955
1817 12:07:05.551917 [0x00000000100000, 0x00000030000000)
1818 12:07:05.552014
1819 12:07:05.683792 [0x00000031062170, 0x00000076a15000)
1820 12:07:05.683952
1821 12:07:05.856762 [0x00000100000000, 0x00000180400000)
1822 12:07:05.856924
1823 12:07:06.920805 R8152: Initializing
1824 12:07:06.920973
1825 12:07:06.923767 Version 9 (ocp_data = 6010)
1826 12:07:06.923865
1827 12:07:06.927408 R8152: Done initializing
1828 12:07:06.927506
1829 12:07:06.930436 Adding net device
1830 12:07:06.930563
1831 12:07:06.934096 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1832 12:07:06.934188
1833 12:07:06.934292
1834 12:07:06.937051
1835 12:07:06.937355 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1837 12:07:07.038108 dedede: tftpboot 192.168.201.1 8853681/tftp-deploy-1xyegbzx/kernel/bzImage 8853681/tftp-deploy-1xyegbzx/kernel/cmdline 8853681/tftp-deploy-1xyegbzx/ramdisk/ramdisk.cpio.gz
1838 12:07:07.038305 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1839 12:07:07.038402 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1840 12:07:07.042729 tftpboot 192.168.201.1 8853681/tftp-deploy-1xyegbzx/kernel/bzImoy-1xyegbzx/kernel/cmdline 8853681/tftp-deploy-1xyegbzx/ramdisk/ramdisk.cpio.gz
1841 12:07:07.042830
1842 12:07:07.042904 Waiting for link
1843 12:07:07.042972
1844 12:07:07.244818 done.
1845 12:07:07.244986
1846 12:07:07.245065 MAC: 00:e0:4c:78:86:ac
1847 12:07:07.245137
1848 12:07:07.248314 Sending DHCP discover... done.
1849 12:07:07.248413
1850 12:07:07.251404 Waiting for reply... done.
1851 12:07:07.251502
1852 12:07:07.255023 Sending DHCP request... done.
1853 12:07:07.255123
1854 12:07:07.258030 Waiting for reply... done.
1855 12:07:07.258125
1856 12:07:07.261556 My ip is 192.168.201.16
1857 12:07:07.261651
1858 12:07:07.264496 The DHCP server ip is 192.168.201.1
1859 12:07:07.264594
1860 12:07:07.268069 TFTP server IP predefined by user: 192.168.201.1
1861 12:07:07.268203
1862 12:07:07.274738 Bootfile predefined by user: 8853681/tftp-deploy-1xyegbzx/kernel/bzImage
1863 12:07:07.274839
1864 12:07:07.278101 Sending tftp read request... done.
1865 12:07:07.278201
1866 12:07:07.281179 Waiting for the transfer...
1867 12:07:07.281278
1868 12:07:07.566542 00000000 ################################################################
1869 12:07:07.566735
1870 12:07:07.853996 00080000 ################################################################
1871 12:07:07.854204
1872 12:07:08.149990 00100000 ################################################################
1873 12:07:08.150195
1874 12:07:08.423710 00180000 ################################################################
1875 12:07:08.423876
1876 12:07:08.694599 00200000 ################################################################
1877 12:07:08.694761
1878 12:07:08.978702 00280000 ################################################################
1879 12:07:08.978871
1880 12:07:09.280949 00300000 ################################################################
1881 12:07:09.281113
1882 12:07:09.587224 00380000 ################################################################
1883 12:07:09.587440
1884 12:07:09.898523 00400000 ################################################################
1885 12:07:09.898696
1886 12:07:10.208878 00480000 ################################################################
1887 12:07:10.209040
1888 12:07:10.512627 00500000 ################################################################
1889 12:07:10.512787
1890 12:07:10.801646 00580000 ################################################################
1891 12:07:10.801827
1892 12:07:11.084879 00600000 ################################################################
1893 12:07:11.085039
1894 12:07:11.385596 00680000 ################################################################
1895 12:07:11.385791
1896 12:07:11.735314 00700000 ################################################################
1897 12:07:11.735476
1898 12:07:12.081205 00780000 ################################################################
1899 12:07:12.081373
1900 12:07:12.419163 00800000 ################################################################
1901 12:07:12.419326
1902 12:07:12.774118 00880000 ################################################################
1903 12:07:12.774280
1904 12:07:12.949989 00900000 ################################## done.
1905 12:07:12.950164
1906 12:07:12.953078 The bootfile was 9707520 bytes long.
1907 12:07:12.953171
1908 12:07:12.956160 Sending tftp read request... done.
1909 12:07:12.956245
1910 12:07:12.959808 Waiting for the transfer...
1911 12:07:12.959897
1912 12:07:13.296784 00000000 ################################################################
1913 12:07:13.296936
1914 12:07:13.621944 00080000 ################################################################
1915 12:07:13.622113
1916 12:07:13.940299 00100000 ################################################################
1917 12:07:13.940455
1918 12:07:14.256518 00180000 ################################################################
1919 12:07:14.256682
1920 12:07:14.564825 00200000 ################################################################
1921 12:07:14.564973
1922 12:07:14.843435 00280000 ################################################################
1923 12:07:14.843584
1924 12:07:15.109280 00300000 ################################################################
1925 12:07:15.109429
1926 12:07:15.385938 00380000 ################################################################
1927 12:07:15.386088
1928 12:07:15.671745 00400000 ################################################################
1929 12:07:15.671899
1930 12:07:15.968713 00480000 ################################################################
1931 12:07:15.968869
1932 12:07:16.132399 00500000 ################################## done.
1933 12:07:16.132552
1934 12:07:16.136033 Sending tftp read request... done.
1935 12:07:16.136139
1936 12:07:16.139102 Waiting for the transfer...
1937 12:07:16.139197
1938 12:07:16.139272 00000000 # done.
1939 12:07:16.139342
1940 12:07:16.149402 Command line loaded dynamically from TFTP file: 8853681/tftp-deploy-1xyegbzx/kernel/cmdline
1941 12:07:16.149498
1942 12:07:16.168927 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8853681/extract-nfsrootfs-bychcu2l,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1943 12:07:16.169032
1944 12:07:16.172562 ec_init: CrosEC protocol v3 supported (256, 256)
1945 12:07:16.172658
1946 12:07:16.182146 Shutting down all USB controllers.
1947 12:07:16.182241
1948 12:07:16.182316 Removing current net device
1949 12:07:16.182386
1950 12:07:16.185117 Finalizing coreboot
1951 12:07:16.185213
1952 12:07:16.191901 Exiting depthcharge with code 4 at timestamp: 17486503
1953 12:07:16.191997
1954 12:07:16.192081
1955 12:07:16.192153 Starting kernel ...
1956 12:07:16.192220
1957 12:07:16.192285
1958 12:07:16.192349
1959 12:07:16.192733 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
1960 12:07:16.192843 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
1961 12:07:16.192926 Setting prompt string to ['Linux version [0-9]']
1962 12:07:16.193006 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1963 12:07:16.193083 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1965 12:11:51.193235 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
1967 12:11:51.193716 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
1969 12:11:51.194082 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1972 12:11:51.194717 end: 2 depthcharge-action (duration 00:05:00) [common]
1974 12:11:51.195235 Cleaning after the job
1975 12:11:51.195432 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/ramdisk
1976 12:11:51.196407 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/kernel
1977 12:11:51.197810 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/nfsrootfs
1978 12:11:51.241072 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853681/tftp-deploy-1xyegbzx/modules
1979 12:11:51.241416 start: 5.1 power-off (timeout 00:00:30) [common]
1980 12:11:51.241599 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=off'
1981 12:11:51.262674 >> Command sent successfully.
1982 12:11:51.264722 Returned 0 in 0 seconds
1983 12:11:51.365547 end: 5.1 power-off (duration 00:00:00) [common]
1985 12:11:51.365907 start: 5.2 read-feedback (timeout 00:10:00) [common]
1986 12:11:51.366173 Listened to connection for namespace 'common' for up to 1s
1987 12:11:52.370624 Finalising connection for namespace 'common'
1988 12:11:52.370824 Disconnecting from shell: Finalise
1989 12:11:52.471604 end: 5.2 read-feedback (duration 00:00:01) [common]
1990 12:11:52.471777 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8853681
1991 12:11:52.574450 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8853681
1992 12:11:52.574663 JobError: Your job cannot terminate cleanly.