Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:07:04.094998 lava-dispatcher, installed at version: 2022.11
2 12:07:04.095194 start: 0 validate
3 12:07:04.095329 Start time: 2023-01-24 12:07:04.095321+00:00 (UTC)
4 12:07:04.095460 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:07:04.095593 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230120.0%2Famd64%2Frootfs.cpio.gz exists
6 12:07:04.405706 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:07:04.405882 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:07:04.413466 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:07:04.413611 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:07:04.704685 validate duration: 0.61
12 12:07:04.704954 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:07:04.705057 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:07:04.705152 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:07:04.705261 Not decompressing ramdisk as can be used compressed.
16 12:07:04.705346 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230120.0/amd64/rootfs.cpio.gz
17 12:07:04.705413 saving as /var/lib/lava/dispatcher/tmp/8853713/tftp-deploy-o0dl1m3r/ramdisk/rootfs.cpio.gz
18 12:07:04.705480 total size: 35738573 (34MB)
19 12:07:04.708224 progress 0% (0MB)
20 12:07:04.770330 progress 5% (1MB)
21 12:07:04.830498 progress 10% (3MB)
22 12:07:04.891556 progress 15% (5MB)
23 12:07:04.952022 progress 20% (6MB)
24 12:07:05.013307 progress 25% (8MB)
25 12:07:05.074344 progress 30% (10MB)
26 12:07:05.133494 progress 35% (11MB)
27 12:07:05.196284 progress 40% (13MB)
28 12:07:05.257179 progress 45% (15MB)
29 12:07:05.318586 progress 50% (17MB)
30 12:07:05.378249 progress 55% (18MB)
31 12:07:05.440506 progress 60% (20MB)
32 12:07:05.500029 progress 65% (22MB)
33 12:07:05.562247 progress 70% (23MB)
34 12:07:05.621146 progress 75% (25MB)
35 12:07:05.683169 progress 80% (27MB)
36 12:07:05.745950 progress 85% (29MB)
37 12:07:05.805111 progress 90% (30MB)
38 12:07:05.865166 progress 95% (32MB)
39 12:07:05.925366 progress 100% (34MB)
40 12:07:05.925743 34MB downloaded in 1.22s (27.93MB/s)
41 12:07:05.925941 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:07:05.926281 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:07:05.926374 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:07:05.926492 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:07:05.926617 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:07:05.926701 saving as /var/lib/lava/dispatcher/tmp/8853713/tftp-deploy-o0dl1m3r/kernel/bzImage
48 12:07:05.926765 total size: 9707520 (9MB)
49 12:07:05.926856 No compression specified
50 12:07:05.929565 progress 0% (0MB)
51 12:07:05.946013 progress 5% (0MB)
52 12:07:05.962915 progress 10% (0MB)
53 12:07:05.980224 progress 15% (1MB)
54 12:07:05.995547 progress 20% (1MB)
55 12:07:06.012672 progress 25% (2MB)
56 12:07:06.028022 progress 30% (2MB)
57 12:07:06.045317 progress 35% (3MB)
58 12:07:06.061391 progress 40% (3MB)
59 12:07:06.079362 progress 45% (4MB)
60 12:07:06.095817 progress 50% (4MB)
61 12:07:06.110591 progress 55% (5MB)
62 12:07:06.129115 progress 60% (5MB)
63 12:07:06.144085 progress 65% (6MB)
64 12:07:06.160648 progress 70% (6MB)
65 12:07:06.177341 progress 75% (6MB)
66 12:07:06.195017 progress 80% (7MB)
67 12:07:06.207690 progress 85% (7MB)
68 12:07:06.219350 progress 90% (8MB)
69 12:07:06.233031 progress 95% (8MB)
70 12:07:06.243818 progress 100% (9MB)
71 12:07:06.244016 9MB downloaded in 0.32s (29.18MB/s)
72 12:07:06.244169 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:07:06.244453 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:07:06.244554 start: 1.3 download-retry (timeout 00:09:58) [common]
76 12:07:06.244698 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 12:07:06.244820 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:07:06.244890 saving as /var/lib/lava/dispatcher/tmp/8853713/tftp-deploy-o0dl1m3r/modules/modules.tar
79 12:07:06.244953 total size: 64588 (0MB)
80 12:07:06.245016 Using unxz to decompress xz
81 12:07:06.250774 progress 50% (0MB)
82 12:07:06.251152 progress 100% (0MB)
83 12:07:06.255359 0MB downloaded in 0.01s (5.92MB/s)
84 12:07:06.255613 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:07:06.255939 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:07:06.256042 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 12:07:06.256140 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 12:07:06.256229 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:07:06.256317 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 12:07:06.256487 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw
92 12:07:06.256595 makedir: /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin
93 12:07:06.256681 makedir: /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/tests
94 12:07:06.256763 makedir: /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/results
95 12:07:06.256872 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-add-keys
96 12:07:06.257007 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-add-sources
97 12:07:06.257123 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-background-process-start
98 12:07:06.257237 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-background-process-stop
99 12:07:06.257368 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-common-functions
100 12:07:06.257560 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-echo-ipv4
101 12:07:06.257686 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-install-packages
102 12:07:06.257803 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-installed-packages
103 12:07:06.257914 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-os-build
104 12:07:06.258025 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-probe-channel
105 12:07:06.258136 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-probe-ip
106 12:07:06.258250 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-target-ip
107 12:07:06.258361 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-target-mac
108 12:07:06.258470 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-target-storage
109 12:07:06.258584 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-test-case
110 12:07:06.258699 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-test-event
111 12:07:06.258810 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-test-feedback
112 12:07:06.258923 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-test-raise
113 12:07:06.259035 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-test-reference
114 12:07:06.259159 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-test-runner
115 12:07:06.259278 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-test-set
116 12:07:06.259390 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-test-shell
117 12:07:06.259504 Updating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-install-packages (oe)
118 12:07:06.259618 Updating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/bin/lava-installed-packages (oe)
119 12:07:06.259719 Creating /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/environment
120 12:07:06.259808 LAVA metadata
121 12:07:06.259881 - LAVA_JOB_ID=8853713
122 12:07:06.259948 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:07:06.260052 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 12:07:06.260153 skipped lava-vland-overlay
125 12:07:06.260232 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:07:06.260319 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 12:07:06.260384 skipped lava-multinode-overlay
128 12:07:06.260462 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:07:06.260545 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 12:07:06.260620 Loading test definitions
131 12:07:06.260720 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 12:07:06.260796 Using /lava-8853713 at stage 0
133 12:07:06.261052 uuid=8853713_1.4.2.3.1 testdef=None
134 12:07:06.261145 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:07:06.261242 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 12:07:06.261808 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:07:06.262139 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 12:07:06.262822 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:07:06.263079 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 12:07:06.263598 runner path: /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/0/tests/0_cros-ec test_uuid 8853713_1.4.2.3.1
143 12:07:06.263745 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:07:06.263959 Creating lava-test-runner.conf files
146 12:07:06.264024 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853713/lava-overlay-ekq9v3yw/lava-8853713/0 for stage 0
147 12:07:06.264107 - 0_cros-ec
148 12:07:06.264206 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 12:07:06.264294 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
150 12:07:06.269404 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 12:07:06.269609 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
152 12:07:06.269701 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 12:07:06.269789 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 12:07:06.269879 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
155 12:07:07.024048 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 12:07:07.024401 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
157 12:07:07.024516 extracting modules file /var/lib/lava/dispatcher/tmp/8853713/tftp-deploy-o0dl1m3r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853713/extract-overlay-ramdisk-0pkkpc69/ramdisk
158 12:07:07.028676 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 12:07:07.028794 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
160 12:07:07.028882 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853713/compress-overlay-xxd_0vjw/overlay-1.4.2.4.tar.gz to ramdisk
161 12:07:07.028959 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853713/compress-overlay-xxd_0vjw/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8853713/extract-overlay-ramdisk-0pkkpc69/ramdisk
162 12:07:07.032048 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 12:07:07.032158 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
164 12:07:07.032252 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 12:07:07.032342 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
166 12:07:07.032419 Building ramdisk /var/lib/lava/dispatcher/tmp/8853713/extract-overlay-ramdisk-0pkkpc69/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8853713/extract-overlay-ramdisk-0pkkpc69/ramdisk
167 12:07:07.282028 >> 182673 blocks
168 12:07:10.506866 rename /var/lib/lava/dispatcher/tmp/8853713/extract-overlay-ramdisk-0pkkpc69/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8853713/tftp-deploy-o0dl1m3r/ramdisk/ramdisk.cpio.gz
169 12:07:10.507323 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 12:07:10.507456 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
171 12:07:10.507557 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
172 12:07:10.507654 No mkimage arch provided, not using FIT.
173 12:07:10.507745 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 12:07:10.507833 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 12:07:10.507930 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 12:07:10.508027 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
177 12:07:10.508114 No LXC device requested
178 12:07:10.508211 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 12:07:10.508313 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
180 12:07:10.508396 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 12:07:10.508477 Checking files for TFTP limit of 4294967296 bytes.
182 12:07:10.508872 end: 1 tftp-deploy (duration 00:00:06) [common]
183 12:07:10.508984 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 12:07:10.509090 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 12:07:10.509219 substitutions:
186 12:07:10.509308 - {DTB}: None
187 12:07:10.509406 - {INITRD}: 8853713/tftp-deploy-o0dl1m3r/ramdisk/ramdisk.cpio.gz
188 12:07:10.509498 - {KERNEL}: 8853713/tftp-deploy-o0dl1m3r/kernel/bzImage
189 12:07:10.509566 - {LAVA_MAC}: None
190 12:07:10.509635 - {PRESEED_CONFIG}: None
191 12:07:10.509696 - {PRESEED_LOCAL}: None
192 12:07:10.509754 - {RAMDISK}: 8853713/tftp-deploy-o0dl1m3r/ramdisk/ramdisk.cpio.gz
193 12:07:10.509811 - {ROOT_PART}: None
194 12:07:10.509877 - {ROOT}: None
195 12:07:10.509932 - {SERVER_IP}: 192.168.201.1
196 12:07:10.509988 - {TEE}: None
197 12:07:10.510055 Parsed boot commands:
198 12:07:10.510109 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 12:07:10.510272 Parsed boot commands: tftpboot 192.168.201.1 8853713/tftp-deploy-o0dl1m3r/kernel/bzImage 8853713/tftp-deploy-o0dl1m3r/kernel/cmdline 8853713/tftp-deploy-o0dl1m3r/ramdisk/ramdisk.cpio.gz
200 12:07:10.510364 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 12:07:10.510461 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 12:07:10.510555 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 12:07:10.510641 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 12:07:10.510707 Not connected, no need to disconnect.
205 12:07:10.510784 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 12:07:10.510866 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 12:07:10.510933 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
208 12:07:10.513724 Setting prompt string to ['lava-test: # ']
209 12:07:10.514013 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 12:07:10.514119 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 12:07:10.514214 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 12:07:10.514309 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 12:07:10.514481 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
214 12:07:10.536473 >> Command sent successfully.
215 12:07:10.538588 Returned 0 in 0 seconds
216 12:07:10.639372 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 12:07:10.639702 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 12:07:10.639800 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 12:07:10.639889 Setting prompt string to 'Starting depthcharge on Voema...'
221 12:07:10.639956 Changing prompt to 'Starting depthcharge on Voema...'
222 12:07:10.640023 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 12:07:10.640299 [Enter `^Ec?' for help]
224 12:07:18.088548
225 12:07:18.088724
226 12:07:18.098249 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 12:07:18.101948 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 12:07:18.108562 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 12:07:18.111547 CPU: AES supported, TXT NOT supported, VT supported
230 12:07:18.118368 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 12:07:18.121370 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 12:07:18.124848
233 12:07:18.128164 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
234 12:07:18.131617 VBOOT: Loading verstage.
235 12:07:18.134658 FMAP: Found "FLASH" version 1.1 at 0x1804000.
236 12:07:18.141360 FMAP: base = 0x0 size = 0x2000000 #areas = 32
237 12:07:18.144897 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
238 12:07:18.155597 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
239 12:07:18.161905 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
240 12:07:18.161992
241 12:07:18.162061
242 12:07:18.175067 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
243 12:07:18.188766 Probing TPM: . done!
244 12:07:18.192222 TPM ready after 0 ms
245 12:07:18.195907 Connected to device vid:did:rid of 1ae0:0028:00
246 12:07:18.206745 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
247 12:07:18.213745 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
248 12:07:18.217251 Initialized TPM device CR50 revision 0
249 12:07:18.269421 tlcl_send_startup: Startup return code is 0
250 12:07:18.269637 TPM: setup succeeded
251 12:07:18.284954 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
252 12:07:18.299868 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
253 12:07:18.312417 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
254 12:07:18.321899 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
255 12:07:18.325714 Chrome EC: UHEPI supported
256 12:07:18.328713 Phase 1
257 12:07:18.332390 FMAP: area GBB found @ 1805000 (458752 bytes)
258 12:07:18.338715 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
259 12:07:18.342080
260 12:07:18.348771 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
261 12:07:18.355602 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
262 12:07:18.361945 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
263 12:07:18.365681 Recovery requested (1009000e)
264 12:07:18.368495 TPM: Extending digest for VBOOT: boot mode into PCR 0
265 12:07:18.380330 tlcl_extend: response is 0
266 12:07:18.386871 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
267 12:07:18.396627 tlcl_extend: response is 0
268 12:07:18.403520 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
269 12:07:18.409999 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
270 12:07:18.417005 BS: verstage times (exec / console): total (unknown) / 142 ms
271 12:07:18.417097
272 12:07:18.417166
273 12:07:18.430229 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
274 12:07:18.433514 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
275 12:07:18.436459
276 12:07:18.439798 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
277 12:07:18.443238 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
278 12:07:18.449753 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
279 12:07:18.453747 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
280 12:07:18.456429 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
281 12:07:18.460196 TCO_STS: 0000 0000
282 12:07:18.463303 GEN_PMCON: d0015038 00002200
283 12:07:18.466478 GBLRST_CAUSE: 00000000 00000000
284 12:07:18.466567 HPR_CAUSE0: 00000000
285 12:07:18.470148 prev_sleep_state 5
286 12:07:18.473420 Boot Count incremented to 14989
287 12:07:18.480017 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
288 12:07:18.486604 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
289 12:07:18.493189 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
290 12:07:18.499776 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
291 12:07:18.504371 Chrome EC: UHEPI supported
292 12:07:18.510498 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
293 12:07:18.524016 Probing TPM: done!
294 12:07:18.531177 Connected to device vid:did:rid of 1ae0:0028:00
295 12:07:18.541068 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
296 12:07:18.544047 Initialized TPM device CR50 revision 0
297 12:07:18.558833 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
298 12:07:18.565288 MRC: Hash idx 0x100b comparison successful.
299 12:07:18.568541 MRC cache found, size faa8
300 12:07:18.568629 bootmode is set to: 2
301 12:07:18.571864 SPD index = 0
302 12:07:18.578955 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
303 12:07:18.581721 SPD: module type is LPDDR4X
304 12:07:18.585297 SPD: module part number is MT53E512M64D4NW-046
305 12:07:18.591898 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
306 12:07:18.595532 SPD: device width 16 bits, bus width 16 bits
307 12:07:18.601820 SPD: module size is 1024 MB (per channel)
308 12:07:19.034086 CBMEM:
309 12:07:19.037979 IMD: root @ 0x76fff000 254 entries.
310 12:07:19.041100 IMD: root @ 0x76ffec00 62 entries.
311 12:07:19.044377 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
312 12:07:19.051208 FMAP: area RW_VPD found @ f35000 (8192 bytes)
313 12:07:19.054099 External stage cache:
314 12:07:19.057167 IMD: root @ 0x7b3ff000 254 entries.
315 12:07:19.060843 IMD: root @ 0x7b3fec00 62 entries.
316 12:07:19.075898 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
317 12:07:19.082765 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
318 12:07:19.089410 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
319 12:07:19.103566 MRC: 'RECOVERY_MRC_CACHE' does not need update.
320 12:07:19.106676 cse_lite: Skip switching to RW in the recovery path
321 12:07:19.110537 8 DIMMs found
322 12:07:19.110625 SMM Memory Map
323 12:07:19.113879 SMRAM : 0x7b000000 0x800000
324 12:07:19.117467 Subregion 0: 0x7b000000 0x200000
325 12:07:19.120642 Subregion 1: 0x7b200000 0x200000
326 12:07:19.124385 Subregion 2: 0x7b400000 0x400000
327 12:07:19.127101 top_of_ram = 0x77000000
328 12:07:19.133787 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
329 12:07:19.137063 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
330 12:07:19.143745 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
331 12:07:19.146906 MTRR Range: Start=ff000000 End=0 (Size 1000000)
332 12:07:19.157154 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
333 12:07:19.163817 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
334 12:07:19.173446 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
335 12:07:19.176718 Processing 211 relocs. Offset value of 0x74c0b000
336 12:07:19.186073 BS: romstage times (exec / console): total (unknown) / 277 ms
337 12:07:19.192032
338 12:07:19.192130
339 12:07:19.202314 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
340 12:07:19.205764 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
341 12:07:19.215231 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
342 12:07:19.222230 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
343 12:07:19.228511 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
344 12:07:19.235190 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
345 12:07:19.282416 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
346 12:07:19.289311 Processing 5008 relocs. Offset value of 0x75d98000
347 12:07:19.292455 BS: postcar times (exec / console): total (unknown) / 59 ms
348 12:07:19.295689
349 12:07:19.295784
350 12:07:19.306006 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
351 12:07:19.306150 Normal boot
352 12:07:19.309908 FW_CONFIG value is 0x804c02
353 12:07:19.312849 PCI: 00:07.0 disabled by fw_config
354 12:07:19.316103 PCI: 00:07.1 disabled by fw_config
355 12:07:19.319345 PCI: 00:0d.2 disabled by fw_config
356 12:07:19.323238 PCI: 00:1c.7 disabled by fw_config
357 12:07:19.329217 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
358 12:07:19.336154 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
359 12:07:19.339290 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
360 12:07:19.342693 GENERIC: 0.0 disabled by fw_config
361 12:07:19.345869 GENERIC: 1.0 disabled by fw_config
362 12:07:19.352868 fw_config match found: DB_USB=USB3_ACTIVE
363 12:07:19.356594 fw_config match found: DB_USB=USB3_ACTIVE
364 12:07:19.359419 fw_config match found: DB_USB=USB3_ACTIVE
365 12:07:19.362651 fw_config match found: DB_USB=USB3_ACTIVE
366 12:07:19.369614 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 12:07:19.375939 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 12:07:19.383093 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 12:07:19.392753 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
370 12:07:19.396288 microcode: sig=0x806c1 pf=0x80 revision=0x86
371 12:07:19.402365 microcode: Update skipped, already up-to-date
372 12:07:19.408960 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
373 12:07:19.436481 Detected 4 core, 8 thread CPU.
374 12:07:19.439126 Setting up SMI for CPU
375 12:07:19.442838 IED base = 0x7b400000
376 12:07:19.442937 IED size = 0x00400000
377 12:07:19.446152 Will perform SMM setup.
378 12:07:19.452709 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
379 12:07:19.459203 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
380 12:07:19.466051 Processing 16 relocs. Offset value of 0x00030000
381 12:07:19.469473 Attempting to start 7 APs
382 12:07:19.472669 Waiting for 10ms after sending INIT.
383 12:07:19.488467 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
384 12:07:19.488559 done.
385 12:07:19.491461 AP: slot 2 apic_id 2.
386 12:07:19.494783 AP: slot 6 apic_id 3.
387 12:07:19.498091 Waiting for 2nd SIPI to complete...done.
388 12:07:19.501268 AP: slot 5 apic_id 6.
389 12:07:19.501354 AP: slot 4 apic_id 7.
390 12:07:19.505024 AP: slot 7 apic_id 4.
391 12:07:19.508153 AP: slot 3 apic_id 5.
392 12:07:19.514590 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
393 12:07:19.521494 Processing 13 relocs. Offset value of 0x00038000
394 12:07:19.521603 Unable to locate Global NVS
395 12:07:19.531232 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
396 12:07:19.534802 Installing permanent SMM handler to 0x7b000000
397 12:07:19.541382 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
398 12:07:19.547881 Processing 794 relocs. Offset value of 0x7b010000
399 12:07:19.555037 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
400 12:07:19.561223 Processing 13 relocs. Offset value of 0x7b008000
401 12:07:19.568277 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
402 12:07:19.571294 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
403 12:07:19.574545
404 12:07:19.577883 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
405 12:07:19.584520 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
406 12:07:19.591175 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
407 12:07:19.597691 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
408 12:07:19.601228 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
409 12:07:19.604634 Unable to locate Global NVS
410 12:07:19.611249 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
411 12:07:19.616272 Clearing SMI status registers
412 12:07:19.619163 SMI_STS: PM1
413 12:07:19.619258 PM1_STS: PWRBTN
414 12:07:19.629056 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
415 12:07:19.629212 In relocation handler: CPU 0
416 12:07:19.635860 New SMBASE=0x7b000000 IEDBASE=0x7b400000
417 12:07:19.639123 Writing SMRR. base = 0x7b000006, mask=0xff800c00
418 12:07:19.642688 Relocation complete.
419 12:07:19.649493 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
420 12:07:19.652561 In relocation handler: CPU 1
421 12:07:19.655736 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
422 12:07:19.659497 Relocation complete.
423 12:07:19.665713 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
424 12:07:19.669122 In relocation handler: CPU 2
425 12:07:19.672988 New SMBASE=0x7afff800 IEDBASE=0x7b400000
426 12:07:19.679189 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 12:07:19.679328 Relocation complete.
428 12:07:19.685460 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
429 12:07:19.689108 In relocation handler: CPU 3
430 12:07:19.693043 New SMBASE=0x7afff400 IEDBASE=0x7b400000
431 12:07:19.696037
432 12:07:19.696125 Relocation complete.
433 12:07:19.702156 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
434 12:07:19.705781 In relocation handler: CPU 7
435 12:07:19.709213 New SMBASE=0x7affe400 IEDBASE=0x7b400000
436 12:07:19.715731 Writing SMRR. base = 0x7b000006, mask=0xff800c00
437 12:07:19.718844 Relocation complete.
438 12:07:19.725470 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
439 12:07:19.728664 In relocation handler: CPU 6
440 12:07:19.732401 New SMBASE=0x7affe800 IEDBASE=0x7b400000
441 12:07:19.735644 Relocation complete.
442 12:07:19.742549 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
443 12:07:19.745400 In relocation handler: CPU 5
444 12:07:19.748683 New SMBASE=0x7affec00 IEDBASE=0x7b400000
445 12:07:19.752185 Writing SMRR. base = 0x7b000006, mask=0xff800c00
446 12:07:19.755603 Relocation complete.
447 12:07:19.762019 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
448 12:07:19.765374 In relocation handler: CPU 4
449 12:07:19.769193 New SMBASE=0x7afff000 IEDBASE=0x7b400000
450 12:07:19.772562 Relocation complete.
451 12:07:19.772649 Initializing CPU #0
452 12:07:19.775933 CPU: vendor Intel device 806c1
453 12:07:19.779400 CPU: family 06, model 8c, stepping 01
454 12:07:19.782802
455 12:07:19.782927 Clearing out pending MCEs
456 12:07:19.786457 Setting up local APIC...
457 12:07:19.789440 apic_id: 0x00 done.
458 12:07:19.793126 Turbo is available but hidden
459 12:07:19.796065 Turbo is available and visible
460 12:07:19.799388 microcode: Update skipped, already up-to-date
461 12:07:19.802837 CPU #0 initialized
462 12:07:19.802961 Initializing CPU #3
463 12:07:19.806166 Initializing CPU #7
464 12:07:19.806273 Initializing CPU #4
465 12:07:19.809607
466 12:07:19.809708 Initializing CPU #5
467 12:07:19.813015 CPU: vendor Intel device 806c1
468 12:07:19.815868 CPU: family 06, model 8c, stepping 01
469 12:07:19.819205 CPU: vendor Intel device 806c1
470 12:07:19.822781 CPU: family 06, model 8c, stepping 01
471 12:07:19.825803 Clearing out pending MCEs
472 12:07:19.829262 Initializing CPU #1
473 12:07:19.829349 Clearing out pending MCEs
474 12:07:19.832602
475 12:07:19.832689 Setting up local APIC...
476 12:07:19.836057 CPU: vendor Intel device 806c1
477 12:07:19.839237 CPU: family 06, model 8c, stepping 01
478 12:07:19.842571 CPU: vendor Intel device 806c1
479 12:07:19.846176 CPU: family 06, model 8c, stepping 01
480 12:07:19.849579 Initializing CPU #6
481 12:07:19.852689 Initializing CPU #2
482 12:07:19.856373 CPU: vendor Intel device 806c1
483 12:07:19.859529 CPU: family 06, model 8c, stepping 01
484 12:07:19.859617 Clearing out pending MCEs
485 12:07:19.862651
486 12:07:19.862738 Clearing out pending MCEs
487 12:07:19.865990 Setting up local APIC...
488 12:07:19.869104 Setting up local APIC...
489 12:07:19.872482 Setting up local APIC...
490 12:07:19.875826 CPU: vendor Intel device 806c1
491 12:07:19.879018 CPU: family 06, model 8c, stepping 01
492 12:07:19.879107 Clearing out pending MCEs
493 12:07:19.882376 Clearing out pending MCEs
494 12:07:19.885790 Setting up local APIC...
495 12:07:19.889084 apic_id: 0x06 done.
496 12:07:19.889170 apic_id: 0x07 done.
497 12:07:19.896016 microcode: Update skipped, already up-to-date
498 12:07:19.899511 microcode: Update skipped, already up-to-date
499 12:07:19.902759 CPU #5 initialized
500 12:07:19.902926 CPU #4 initialized
501 12:07:19.905876 apic_id: 0x04 done.
502 12:07:19.909503 apic_id: 0x05 done.
503 12:07:19.912389 microcode: Update skipped, already up-to-date
504 12:07:19.916006 microcode: Update skipped, already up-to-date
505 12:07:19.919446 CPU #7 initialized
506 12:07:19.919583 CPU #3 initialized
507 12:07:19.922594
508 12:07:19.922735 Setting up local APIC...
509 12:07:19.925976 CPU: vendor Intel device 806c1
510 12:07:19.929155 CPU: family 06, model 8c, stepping 01
511 12:07:19.932652 apic_id: 0x03 done.
512 12:07:19.935731 apic_id: 0x02 done.
513 12:07:19.939329 microcode: Update skipped, already up-to-date
514 12:07:19.942352 microcode: Update skipped, already up-to-date
515 12:07:19.946135 CPU #6 initialized
516 12:07:19.949232 CPU #2 initialized
517 12:07:19.949434 Clearing out pending MCEs
518 12:07:19.952625 Setting up local APIC...
519 12:07:19.955831 apic_id: 0x01 done.
520 12:07:19.959053 microcode: Update skipped, already up-to-date
521 12:07:19.962279 CPU #1 initialized
522 12:07:19.965638 bsp_do_flight_plan done after 464 msecs.
523 12:07:19.968653 CPU: frequency set to 4000 MHz
524 12:07:19.972451 Enabling SMIs.
525 12:07:19.975572 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
526 12:07:19.978794
527 12:07:19.993783 SATAXPCIE1 indicates PCIe NVMe is present
528 12:07:19.996918 Probing TPM: done!
529 12:07:20.000101 Connected to device vid:did:rid of 1ae0:0028:00
530 12:07:20.010533 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
531 12:07:20.013920 Initialized TPM device CR50 revision 0
532 12:07:20.017462 Enabling S0i3.4
533 12:07:20.023934 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
534 12:07:20.027159 Found a VBT of 8704 bytes after decompression
535 12:07:20.033836 cse_lite: CSE RO boot. HybridStorageMode disabled
536 12:07:20.040751 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
537 12:07:20.116610 FSPS returned 0
538 12:07:20.119888 Executing Phase 1 of FspMultiPhaseSiInit
539 12:07:20.129529 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
540 12:07:20.132895 port C0 DISC req: usage 1 usb3 1 usb2 5
541 12:07:20.136501 Raw Buffer output 0 00000511
542 12:07:20.139431 Raw Buffer output 1 00000000
543 12:07:20.143454 pmc_send_ipc_cmd succeeded
544 12:07:20.147273 port C1 DISC req: usage 1 usb3 2 usb2 3
545 12:07:20.149913
546 12:07:20.150342 Raw Buffer output 0 00000321
547 12:07:20.153564 Raw Buffer output 1 00000000
548 12:07:20.157660 pmc_send_ipc_cmd succeeded
549 12:07:20.162593 Detected 4 core, 8 thread CPU.
550 12:07:20.166138 Detected 4 core, 8 thread CPU.
551 12:07:20.399447 Display FSP Version Info HOB
552 12:07:20.402802 Reference Code - CPU = a.0.4c.31
553 12:07:20.406696 uCode Version = 0.0.0.86
554 12:07:20.409666 TXT ACM version = ff.ff.ff.ffff
555 12:07:20.413157 Reference Code - ME = a.0.4c.31
556 12:07:20.416221 MEBx version = 0.0.0.0
557 12:07:20.419988 ME Firmware Version = Consumer SKU
558 12:07:20.422839 Reference Code - PCH = a.0.4c.31
559 12:07:20.426163 PCH-CRID Status = Disabled
560 12:07:20.429225 PCH-CRID Original Value = ff.ff.ff.ffff
561 12:07:20.432808 PCH-CRID New Value = ff.ff.ff.ffff
562 12:07:20.435950 OPROM - RST - RAID = ff.ff.ff.ffff
563 12:07:20.440135 PCH Hsio Version = 4.0.0.0
564 12:07:20.443418 Reference Code - SA - System Agent = a.0.4c.31
565 12:07:20.446349 Reference Code - MRC = 2.0.0.1
566 12:07:20.449579 SA - PCIe Version = a.0.4c.31
567 12:07:20.452903 SA-CRID Status = Disabled
568 12:07:20.456382 SA-CRID Original Value = 0.0.0.1
569 12:07:20.460121 SA-CRID New Value = 0.0.0.1
570 12:07:20.463342 OPROM - VBIOS = ff.ff.ff.ffff
571 12:07:20.466296 IO Manageability Engine FW Version = 11.1.4.0
572 12:07:20.469577 PHY Build Version = 0.0.0.e0
573 12:07:20.473261 Thunderbolt(TM) FW Version = 0.0.0.0
574 12:07:20.479481 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
575 12:07:20.483081 ITSS IRQ Polarities Before:
576 12:07:20.483369 IPC0: 0xffffffff
577 12:07:20.486172 IPC1: 0xffffffff
578 12:07:20.486548 IPC2: 0xffffffff
579 12:07:20.489435 IPC3: 0xffffffff
580 12:07:20.493262 ITSS IRQ Polarities After:
581 12:07:20.493552 IPC0: 0xffffffff
582 12:07:20.496500 IPC1: 0xffffffff
583 12:07:20.496692 IPC2: 0xffffffff
584 12:07:20.500070 IPC3: 0xffffffff
585 12:07:20.502560 Found PCIe Root Port #9 at PCI: 00:1d.0.
586 12:07:20.516752 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
587 12:07:20.525977 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
588 12:07:20.539331 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
589 12:07:20.546116 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
590 12:07:20.546358 Enumerating buses...
591 12:07:20.552825 Show all devs... Before device enumeration.
592 12:07:20.552993 Root Device: enabled 1
593 12:07:20.555788 DOMAIN: 0000: enabled 1
594 12:07:20.559286 CPU_CLUSTER: 0: enabled 1
595 12:07:20.563167 PCI: 00:00.0: enabled 1
596 12:07:20.563386 PCI: 00:02.0: enabled 1
597 12:07:20.566096 PCI: 00:04.0: enabled 1
598 12:07:20.569369 PCI: 00:05.0: enabled 1
599 12:07:20.572214 PCI: 00:06.0: enabled 0
600 12:07:20.572366 PCI: 00:07.0: enabled 0
601 12:07:20.575972 PCI: 00:07.1: enabled 0
602 12:07:20.579717 PCI: 00:07.2: enabled 0
603 12:07:20.582489 PCI: 00:07.3: enabled 0
604 12:07:20.583044 PCI: 00:08.0: enabled 1
605 12:07:20.585700 PCI: 00:09.0: enabled 0
606 12:07:20.588904 PCI: 00:0a.0: enabled 0
607 12:07:20.592503 PCI: 00:0d.0: enabled 1
608 12:07:20.592860 PCI: 00:0d.1: enabled 0
609 12:07:20.596111 PCI: 00:0d.2: enabled 0
610 12:07:20.599195 PCI: 00:0d.3: enabled 0
611 12:07:20.599671 PCI: 00:0e.0: enabled 0
612 12:07:20.602797 PCI: 00:10.2: enabled 1
613 12:07:20.605976 PCI: 00:10.6: enabled 0
614 12:07:20.609050 PCI: 00:10.7: enabled 0
615 12:07:20.609585 PCI: 00:12.0: enabled 0
616 12:07:20.612616 PCI: 00:12.6: enabled 0
617 12:07:20.615842 PCI: 00:13.0: enabled 0
618 12:07:20.619093 PCI: 00:14.0: enabled 1
619 12:07:20.619600 PCI: 00:14.1: enabled 0
620 12:07:20.622578 PCI: 00:14.2: enabled 1
621 12:07:20.625468 PCI: 00:14.3: enabled 1
622 12:07:20.628980 PCI: 00:15.0: enabled 1
623 12:07:20.629073 PCI: 00:15.1: enabled 1
624 12:07:20.631938 PCI: 00:15.2: enabled 1
625 12:07:20.635488 PCI: 00:15.3: enabled 1
626 12:07:20.635593 PCI: 00:16.0: enabled 1
627 12:07:20.638868 PCI: 00:16.1: enabled 0
628 12:07:20.642251 PCI: 00:16.2: enabled 0
629 12:07:20.645435 PCI: 00:16.3: enabled 0
630 12:07:20.645537 PCI: 00:16.4: enabled 0
631 12:07:20.648960 PCI: 00:16.5: enabled 0
632 12:07:20.652353 PCI: 00:17.0: enabled 1
633 12:07:20.655336 PCI: 00:19.0: enabled 0
634 12:07:20.655422 PCI: 00:19.1: enabled 1
635 12:07:20.658834 PCI: 00:19.2: enabled 0
636 12:07:20.662115 PCI: 00:1c.0: enabled 1
637 12:07:20.665391 PCI: 00:1c.1: enabled 0
638 12:07:20.665483 PCI: 00:1c.2: enabled 0
639 12:07:20.668964 PCI: 00:1c.3: enabled 0
640 12:07:20.671907 PCI: 00:1c.4: enabled 0
641 12:07:20.671992 PCI: 00:1c.5: enabled 0
642 12:07:20.675521
643 12:07:20.675607 PCI: 00:1c.6: enabled 1
644 12:07:20.678547 PCI: 00:1c.7: enabled 0
645 12:07:20.682564 PCI: 00:1d.0: enabled 1
646 12:07:20.682649 PCI: 00:1d.1: enabled 0
647 12:07:20.685424 PCI: 00:1d.2: enabled 1
648 12:07:20.688495 PCI: 00:1d.3: enabled 0
649 12:07:20.692381 PCI: 00:1e.0: enabled 1
650 12:07:20.692480 PCI: 00:1e.1: enabled 0
651 12:07:20.695345 PCI: 00:1e.2: enabled 1
652 12:07:20.698850 PCI: 00:1e.3: enabled 1
653 12:07:20.702441 PCI: 00:1f.0: enabled 1
654 12:07:20.702559 PCI: 00:1f.1: enabled 0
655 12:07:20.705378 PCI: 00:1f.2: enabled 1
656 12:07:20.708418 PCI: 00:1f.3: enabled 1
657 12:07:20.712189 PCI: 00:1f.4: enabled 0
658 12:07:20.712332 PCI: 00:1f.5: enabled 1
659 12:07:20.715813 PCI: 00:1f.6: enabled 0
660 12:07:20.718814 PCI: 00:1f.7: enabled 0
661 12:07:20.718976 APIC: 00: enabled 1
662 12:07:20.722154 GENERIC: 0.0: enabled 1
663 12:07:20.725457 GENERIC: 0.0: enabled 1
664 12:07:20.728808 GENERIC: 1.0: enabled 1
665 12:07:20.729022 GENERIC: 0.0: enabled 1
666 12:07:20.731870 GENERIC: 1.0: enabled 1
667 12:07:20.735417 USB0 port 0: enabled 1
668 12:07:20.735673 GENERIC: 0.0: enabled 1
669 12:07:20.738711 USB0 port 0: enabled 1
670 12:07:20.742058 GENERIC: 0.0: enabled 1
671 12:07:20.745384 I2C: 00:1a: enabled 1
672 12:07:20.745726 I2C: 00:31: enabled 1
673 12:07:20.748710 I2C: 00:32: enabled 1
674 12:07:20.751882 I2C: 00:10: enabled 1
675 12:07:20.752202 I2C: 00:15: enabled 1
676 12:07:20.755219 GENERIC: 0.0: enabled 0
677 12:07:20.758569 GENERIC: 1.0: enabled 0
678 12:07:20.758890 GENERIC: 0.0: enabled 1
679 12:07:20.761809
680 12:07:20.762127 SPI: 00: enabled 1
681 12:07:20.765430 SPI: 00: enabled 1
682 12:07:20.765773 PNP: 0c09.0: enabled 1
683 12:07:20.768872 GENERIC: 0.0: enabled 1
684 12:07:20.771979 USB3 port 0: enabled 1
685 12:07:20.775678 USB3 port 1: enabled 1
686 12:07:20.775997 USB3 port 2: enabled 0
687 12:07:20.778716 USB3 port 3: enabled 0
688 12:07:20.781884 USB2 port 0: enabled 0
689 12:07:20.782200 USB2 port 1: enabled 1
690 12:07:20.785248 USB2 port 2: enabled 1
691 12:07:20.788522 USB2 port 3: enabled 0
692 12:07:20.788848 USB2 port 4: enabled 1
693 12:07:20.791892 USB2 port 5: enabled 0
694 12:07:20.794998 USB2 port 6: enabled 0
695 12:07:20.798708 USB2 port 7: enabled 0
696 12:07:20.799017 USB2 port 8: enabled 0
697 12:07:20.801832 USB2 port 9: enabled 0
698 12:07:20.805277 USB3 port 0: enabled 0
699 12:07:20.805660 USB3 port 1: enabled 1
700 12:07:20.808724 USB3 port 2: enabled 0
701 12:07:20.811805 USB3 port 3: enabled 0
702 12:07:20.815023 GENERIC: 0.0: enabled 1
703 12:07:20.815470 GENERIC: 1.0: enabled 1
704 12:07:20.818535 APIC: 01: enabled 1
705 12:07:20.822207 APIC: 02: enabled 1
706 12:07:20.822534 APIC: 05: enabled 1
707 12:07:20.825125 APIC: 07: enabled 1
708 12:07:20.825494 APIC: 06: enabled 1
709 12:07:20.828535 APIC: 03: enabled 1
710 12:07:20.831741 APIC: 04: enabled 1
711 12:07:20.832075 Compare with tree...
712 12:07:20.835167 Root Device: enabled 1
713 12:07:20.838314 DOMAIN: 0000: enabled 1
714 12:07:20.841775 PCI: 00:00.0: enabled 1
715 12:07:20.842092 PCI: 00:02.0: enabled 1
716 12:07:20.845408 PCI: 00:04.0: enabled 1
717 12:07:20.848282 GENERIC: 0.0: enabled 1
718 12:07:20.851704 PCI: 00:05.0: enabled 1
719 12:07:20.855217 PCI: 00:06.0: enabled 0
720 12:07:20.855700 PCI: 00:07.0: enabled 0
721 12:07:20.858433 GENERIC: 0.0: enabled 1
722 12:07:20.861836 PCI: 00:07.1: enabled 0
723 12:07:20.864903 GENERIC: 1.0: enabled 1
724 12:07:20.868278 PCI: 00:07.2: enabled 0
725 12:07:20.868706 GENERIC: 0.0: enabled 1
726 12:07:20.871551 PCI: 00:07.3: enabled 0
727 12:07:20.874983 GENERIC: 1.0: enabled 1
728 12:07:20.878332 PCI: 00:08.0: enabled 1
729 12:07:20.881506 PCI: 00:09.0: enabled 0
730 12:07:20.881724 PCI: 00:0a.0: enabled 0
731 12:07:20.885213 PCI: 00:0d.0: enabled 1
732 12:07:20.887875 USB0 port 0: enabled 1
733 12:07:20.891312 USB3 port 0: enabled 1
734 12:07:20.894596 USB3 port 1: enabled 1
735 12:07:20.894679 USB3 port 2: enabled 0
736 12:07:20.898354 USB3 port 3: enabled 0
737 12:07:20.901348 PCI: 00:0d.1: enabled 0
738 12:07:20.905001 PCI: 00:0d.2: enabled 0
739 12:07:20.907777 GENERIC: 0.0: enabled 1
740 12:07:20.907862 PCI: 00:0d.3: enabled 0
741 12:07:20.911216 PCI: 00:0e.0: enabled 0
742 12:07:20.914784 PCI: 00:10.2: enabled 1
743 12:07:20.917925 PCI: 00:10.6: enabled 0
744 12:07:20.921275 PCI: 00:10.7: enabled 0
745 12:07:20.921363 PCI: 00:12.0: enabled 0
746 12:07:20.924939 PCI: 00:12.6: enabled 0
747 12:07:20.927899 PCI: 00:13.0: enabled 0
748 12:07:20.930984 PCI: 00:14.0: enabled 1
749 12:07:20.934649 USB0 port 0: enabled 1
750 12:07:20.934735 USB2 port 0: enabled 0
751 12:07:20.937898 USB2 port 1: enabled 1
752 12:07:20.941751 USB2 port 2: enabled 1
753 12:07:20.944607 USB2 port 3: enabled 0
754 12:07:20.947780 USB2 port 4: enabled 1
755 12:07:20.951137 USB2 port 5: enabled 0
756 12:07:20.951224 USB2 port 6: enabled 0
757 12:07:20.954555 USB2 port 7: enabled 0
758 12:07:20.958493 USB2 port 8: enabled 0
759 12:07:20.961591 USB2 port 9: enabled 0
760 12:07:20.964757 USB3 port 0: enabled 0
761 12:07:20.965160 USB3 port 1: enabled 1
762 12:07:20.967835
763 12:07:20.968288 USB3 port 2: enabled 0
764 12:07:20.971644 USB3 port 3: enabled 0
765 12:07:20.975094 PCI: 00:14.1: enabled 0
766 12:07:20.978137 PCI: 00:14.2: enabled 1
767 12:07:20.981584 PCI: 00:14.3: enabled 1
768 12:07:20.982026 GENERIC: 0.0: enabled 1
769 12:07:20.984969 PCI: 00:15.0: enabled 1
770 12:07:20.987776 I2C: 00:1a: enabled 1
771 12:07:20.991740 I2C: 00:31: enabled 1
772 12:07:20.992213 I2C: 00:32: enabled 1
773 12:07:20.994555 PCI: 00:15.1: enabled 1
774 12:07:20.997946 I2C: 00:10: enabled 1
775 12:07:21.001242 PCI: 00:15.2: enabled 1
776 12:07:21.004568 PCI: 00:15.3: enabled 1
777 12:07:21.005133 PCI: 00:16.0: enabled 1
778 12:07:21.007974 PCI: 00:16.1: enabled 0
779 12:07:21.011356 PCI: 00:16.2: enabled 0
780 12:07:21.015134 PCI: 00:16.3: enabled 0
781 12:07:21.015641 PCI: 00:16.4: enabled 0
782 12:07:21.019020 PCI: 00:16.5: enabled 0
783 12:07:21.022061 PCI: 00:17.0: enabled 1
784 12:07:21.026021 PCI: 00:19.0: enabled 0
785 12:07:21.026422 PCI: 00:19.1: enabled 1
786 12:07:21.028811 I2C: 00:15: enabled 1
787 12:07:21.032325 PCI: 00:19.2: enabled 0
788 12:07:21.035485 PCI: 00:1d.0: enabled 1
789 12:07:21.038544 GENERIC: 0.0: enabled 1
790 12:07:21.038849 PCI: 00:1e.0: enabled 1
791 12:07:21.041953 PCI: 00:1e.1: enabled 0
792 12:07:21.045115 PCI: 00:1e.2: enabled 1
793 12:07:21.048654 SPI: 00: enabled 1
794 12:07:21.048739 PCI: 00:1e.3: enabled 1
795 12:07:21.052256 SPI: 00: enabled 1
796 12:07:21.055025 PCI: 00:1f.0: enabled 1
797 12:07:21.058377 PNP: 0c09.0: enabled 1
798 12:07:21.058462 PCI: 00:1f.1: enabled 0
799 12:07:21.110333
800 12:07:21.110766 PCI: 00:1f.2: enabled 1
801 12:07:21.111096 GENERIC: 0.0: enabled 1
802 12:07:21.111399 GENERIC: 0.0: enabled 1
803 12:07:21.111708 GENERIC: 1.0: enabled 1
804 12:07:21.112224 PCI: 00:1f.3: enabled 1
805 12:07:21.112448 PCI: 00:1f.4: enabled 0
806 12:07:21.112651 PCI: 00:1f.5: enabled 1
807 12:07:21.112848 PCI: 00:1f.6: enabled 0
808 12:07:21.113042 PCI: 00:1f.7: enabled 0
809 12:07:21.113233 CPU_CLUSTER: 0: enabled 1
810 12:07:21.113424 APIC: 00: enabled 1
811 12:07:21.113647 APIC: 01: enabled 1
812 12:07:21.113840 APIC: 02: enabled 1
813 12:07:21.114030 APIC: 05: enabled 1
814 12:07:21.114218 APIC: 07: enabled 1
815 12:07:21.114405 APIC: 06: enabled 1
816 12:07:21.114593 APIC: 03: enabled 1
817 12:07:21.115041 APIC: 04: enabled 1
818 12:07:21.115246 Root Device scanning...
819 12:07:21.118172 scan_static_bus for Root Device
820 12:07:21.118401 DOMAIN: 0000 enabled
821 12:07:21.118581 CPU_CLUSTER: 0 enabled
822 12:07:21.121334 DOMAIN: 0000 scanning...
823 12:07:21.121573 PCI: pci_scan_bus for bus 00
824 12:07:21.124732 PCI: 00:00.0 [8086/0000] ops
825 12:07:21.128148 PCI: 00:00.0 [8086/9a12] enabled
826 12:07:21.131831 PCI: 00:02.0 [8086/0000] bus ops
827 12:07:21.134540 PCI: 00:02.0 [8086/9a40] enabled
828 12:07:21.137963 PCI: 00:04.0 [8086/0000] bus ops
829 12:07:21.141452 PCI: 00:04.0 [8086/9a03] enabled
830 12:07:21.144891 PCI: 00:05.0 [8086/9a19] enabled
831 12:07:21.148498 PCI: 00:07.0 [0000/0000] hidden
832 12:07:21.151311 PCI: 00:08.0 [8086/9a11] enabled
833 12:07:21.154819 PCI: 00:0a.0 [8086/9a0d] disabled
834 12:07:21.158120 PCI: 00:0d.0 [8086/0000] bus ops
835 12:07:21.161656 PCI: 00:0d.0 [8086/9a13] enabled
836 12:07:21.165216 PCI: 00:14.0 [8086/0000] bus ops
837 12:07:21.168213 PCI: 00:14.0 [8086/a0ed] enabled
838 12:07:21.171582 PCI: 00:14.2 [8086/a0ef] enabled
839 12:07:21.174583 PCI: 00:14.3 [8086/0000] bus ops
840 12:07:21.178103 PCI: 00:14.3 [8086/a0f0] enabled
841 12:07:21.181214 PCI: 00:15.0 [8086/0000] bus ops
842 12:07:21.184527 PCI: 00:15.0 [8086/a0e8] enabled
843 12:07:21.187879 PCI: 00:15.1 [8086/0000] bus ops
844 12:07:21.191390 PCI: 00:15.1 [8086/a0e9] enabled
845 12:07:21.194577 PCI: 00:15.2 [8086/0000] bus ops
846 12:07:21.198380 PCI: 00:15.2 [8086/a0ea] enabled
847 12:07:21.201590 PCI: 00:15.3 [8086/0000] bus ops
848 12:07:21.204869 PCI: 00:15.3 [8086/a0eb] enabled
849 12:07:21.207931 PCI: 00:16.0 [8086/0000] ops
850 12:07:21.211203 PCI: 00:16.0 [8086/a0e0] enabled
851 12:07:21.218152 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 12:07:21.221268 PCI: 00:19.0 [8086/0000] bus ops
853 12:07:21.224735 PCI: 00:19.0 [8086/a0c5] disabled
854 12:07:21.228160 PCI: 00:19.1 [8086/0000] bus ops
855 12:07:21.231075 PCI: 00:19.1 [8086/a0c6] enabled
856 12:07:21.234883 PCI: 00:1d.0 [8086/0000] bus ops
857 12:07:21.238009 PCI: 00:1d.0 [8086/a0b0] enabled
858 12:07:21.241322 PCI: 00:1e.0 [8086/0000] ops
859 12:07:21.244333 PCI: 00:1e.0 [8086/a0a8] enabled
860 12:07:21.248216 PCI: 00:1e.2 [8086/0000] bus ops
861 12:07:21.251330 PCI: 00:1e.2 [8086/a0aa] enabled
862 12:07:21.254814 PCI: 00:1e.3 [8086/0000] bus ops
863 12:07:21.258118 PCI: 00:1e.3 [8086/a0ab] enabled
864 12:07:21.261878 PCI: 00:1f.0 [8086/0000] bus ops
865 12:07:21.264685 PCI: 00:1f.0 [8086/a087] enabled
866 12:07:21.264772 RTC Init
867 12:07:21.267794 Set power on after power failure.
868 12:07:21.271180 Disabling Deep S3
869 12:07:21.271273 Disabling Deep S3
870 12:07:21.274440 Disabling Deep S4
871 12:07:21.277962 Disabling Deep S4
872 12:07:21.278070 Disabling Deep S5
873 12:07:21.281382 Disabling Deep S5
874 12:07:21.284525 PCI: 00:1f.2 [0000/0000] hidden
875 12:07:21.288113 PCI: 00:1f.3 [8086/0000] bus ops
876 12:07:21.291264 PCI: 00:1f.3 [8086/a0c8] enabled
877 12:07:21.294654 PCI: 00:1f.5 [8086/0000] bus ops
878 12:07:21.297863 PCI: 00:1f.5 [8086/a0a4] enabled
879 12:07:21.301306 PCI: Leftover static devices:
880 12:07:21.301449 PCI: 00:10.2
881 12:07:21.301575 PCI: 00:10.6
882 12:07:21.304424 PCI: 00:10.7
883 12:07:21.304579 PCI: 00:06.0
884 12:07:21.308305 PCI: 00:07.1
885 12:07:21.308448 PCI: 00:07.2
886 12:07:21.308563 PCI: 00:07.3
887 12:07:21.311159 PCI: 00:09.0
888 12:07:21.311304 PCI: 00:0d.1
889 12:07:21.314603 PCI: 00:0d.2
890 12:07:21.314746 PCI: 00:0d.3
891 12:07:21.317709 PCI: 00:0e.0
892 12:07:21.317852 PCI: 00:12.0
893 12:07:21.317966 PCI: 00:12.6
894 12:07:21.321830 PCI: 00:13.0
895 12:07:21.322017 PCI: 00:14.1
896 12:07:21.324278 PCI: 00:16.1
897 12:07:21.324421 PCI: 00:16.2
898 12:07:21.324535 PCI: 00:16.3
899 12:07:21.328265 PCI: 00:16.4
900 12:07:21.328427 PCI: 00:16.5
901 12:07:21.331058 PCI: 00:17.0
902 12:07:21.331220 PCI: 00:19.2
903 12:07:21.331348 PCI: 00:1e.1
904 12:07:21.334921 PCI: 00:1f.1
905 12:07:21.335105 PCI: 00:1f.4
906 12:07:21.337970 PCI: 00:1f.6
907 12:07:21.338183 PCI: 00:1f.7
908 12:07:21.341299 PCI: Check your devicetree.cb.
909 12:07:21.344293 PCI: 00:02.0 scanning...
910 12:07:21.348137 scan_generic_bus for PCI: 00:02.0
911 12:07:21.351324 scan_generic_bus for PCI: 00:02.0 done
912 12:07:21.354316 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 12:07:21.357729
914 12:07:21.357823 PCI: 00:04.0 scanning...
915 12:07:21.360777 scan_generic_bus for PCI: 00:04.0
916 12:07:21.364458 GENERIC: 0.0 enabled
917 12:07:21.371068 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
918 12:07:21.374986 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
919 12:07:21.377947 PCI: 00:0d.0 scanning...
920 12:07:21.381031 scan_static_bus for PCI: 00:0d.0
921 12:07:21.384493 USB0 port 0 enabled
922 12:07:21.384939 USB0 port 0 scanning...
923 12:07:21.387852
924 12:07:21.391372 scan_static_bus for USB0 port 0
925 12:07:21.391849 USB3 port 0 enabled
926 12:07:21.394377 USB3 port 1 enabled
927 12:07:21.394828 USB3 port 2 disabled
928 12:07:21.397756 USB3 port 3 disabled
929 12:07:21.401386 USB3 port 0 scanning...
930 12:07:21.404120 scan_static_bus for USB3 port 0
931 12:07:21.407938 scan_static_bus for USB3 port 0 done
932 12:07:21.411083 scan_bus: bus USB3 port 0 finished in 6 msecs
933 12:07:21.414417 USB3 port 1 scanning...
934 12:07:21.417233 scan_static_bus for USB3 port 1
935 12:07:21.420659 scan_static_bus for USB3 port 1 done
936 12:07:21.427616 scan_bus: bus USB3 port 1 finished in 6 msecs
937 12:07:21.430840 scan_static_bus for USB0 port 0 done
938 12:07:21.433871 scan_bus: bus USB0 port 0 finished in 43 msecs
939 12:07:21.437867 scan_static_bus for PCI: 00:0d.0 done
940 12:07:21.444205 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
941 12:07:21.447626 PCI: 00:14.0 scanning...
942 12:07:21.450767 scan_static_bus for PCI: 00:14.0
943 12:07:21.450854 USB0 port 0 enabled
944 12:07:21.454162 USB0 port 0 scanning...
945 12:07:21.457894 scan_static_bus for USB0 port 0
946 12:07:21.461826 USB2 port 0 disabled
947 12:07:21.462144 USB2 port 1 enabled
948 12:07:21.464217 USB2 port 2 enabled
949 12:07:21.467285 USB2 port 3 disabled
950 12:07:21.467372 USB2 port 4 enabled
951 12:07:21.470470 USB2 port 5 disabled
952 12:07:21.470557 USB2 port 6 disabled
953 12:07:21.473829 USB2 port 7 disabled
954 12:07:21.476871 USB2 port 8 disabled
955 12:07:21.476959 USB2 port 9 disabled
956 12:07:21.480468 USB3 port 0 disabled
957 12:07:21.483998 USB3 port 1 enabled
958 12:07:21.484085 USB3 port 2 disabled
959 12:07:21.487631 USB3 port 3 disabled
960 12:07:21.490439 USB2 port 1 scanning...
961 12:07:21.494047 scan_static_bus for USB2 port 1
962 12:07:21.497496 scan_static_bus for USB2 port 1 done
963 12:07:21.500424 scan_bus: bus USB2 port 1 finished in 6 msecs
964 12:07:21.503760 USB2 port 2 scanning...
965 12:07:21.507076 scan_static_bus for USB2 port 2
966 12:07:21.510214 scan_static_bus for USB2 port 2 done
967 12:07:21.513865 scan_bus: bus USB2 port 2 finished in 6 msecs
968 12:07:21.517554
969 12:07:21.518036 USB2 port 4 scanning...
970 12:07:21.520527 scan_static_bus for USB2 port 4
971 12:07:21.524321 scan_static_bus for USB2 port 4 done
972 12:07:21.530524 scan_bus: bus USB2 port 4 finished in 6 msecs
973 12:07:21.530975 USB3 port 1 scanning...
974 12:07:21.534063
975 12:07:21.537257 scan_static_bus for USB3 port 1
976 12:07:21.541145 scan_static_bus for USB3 port 1 done
977 12:07:21.543948 scan_bus: bus USB3 port 1 finished in 6 msecs
978 12:07:21.547317 scan_static_bus for USB0 port 0 done
979 12:07:21.554011 scan_bus: bus USB0 port 0 finished in 93 msecs
980 12:07:21.557282 scan_static_bus for PCI: 00:14.0 done
981 12:07:21.560443 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
982 12:07:21.564174 PCI: 00:14.3 scanning...
983 12:07:21.566993 scan_static_bus for PCI: 00:14.3
984 12:07:21.570266 GENERIC: 0.0 enabled
985 12:07:21.573512 scan_static_bus for PCI: 00:14.3 done
986 12:07:21.576673 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
987 12:07:21.580210 PCI: 00:15.0 scanning...
988 12:07:21.583391 scan_static_bus for PCI: 00:15.0
989 12:07:21.586700 I2C: 00:1a enabled
990 12:07:21.587021 I2C: 00:31 enabled
991 12:07:21.590516 I2C: 00:32 enabled
992 12:07:21.594037 scan_static_bus for PCI: 00:15.0 done
993 12:07:21.597392 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
994 12:07:21.601041 PCI: 00:15.1 scanning...
995 12:07:21.603908 scan_static_bus for PCI: 00:15.1
996 12:07:21.607205 I2C: 00:10 enabled
997 12:07:21.610937 scan_static_bus for PCI: 00:15.1 done
998 12:07:21.614113 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
999 12:07:21.617130 PCI: 00:15.2 scanning...
1000 12:07:21.620571 scan_static_bus for PCI: 00:15.2
1001 12:07:21.624347 scan_static_bus for PCI: 00:15.2 done
1002 12:07:21.630177 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1003 12:07:21.630538 PCI: 00:15.3 scanning...
1004 12:07:21.634092 scan_static_bus for PCI: 00:15.3
1005 12:07:21.640816 scan_static_bus for PCI: 00:15.3 done
1006 12:07:21.644088 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1007 12:07:21.647573 PCI: 00:19.1 scanning...
1008 12:07:21.650680 scan_static_bus for PCI: 00:19.1
1009 12:07:21.650993 I2C: 00:15 enabled
1010 12:07:21.657160 scan_static_bus for PCI: 00:19.1 done
1011 12:07:21.660394 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1012 12:07:21.664081 PCI: 00:1d.0 scanning...
1013 12:07:21.667002 do_pci_scan_bridge for PCI: 00:1d.0
1014 12:07:21.670443 PCI: pci_scan_bus for bus 01
1015 12:07:21.674147 PCI: 01:00.0 [1c5c/174a] enabled
1016 12:07:21.676852 GENERIC: 0.0 enabled
1017 12:07:21.680364 Enabling Common Clock Configuration
1018 12:07:21.683674 L1 Sub-State supported from root port 29
1019 12:07:21.686835 L1 Sub-State Support = 0xf
1020 12:07:21.690115 CommonModeRestoreTime = 0x28
1021 12:07:21.693434 Power On Value = 0x16, Power On Scale = 0x0
1022 12:07:21.693546 ASPM: Enabled L1
1023 12:07:21.696686
1024 12:07:21.700106 PCIe: Max_Payload_Size adjusted to 128
1025 12:07:21.703457 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1026 12:07:21.706677 PCI: 00:1e.2 scanning...
1027 12:07:21.710324 scan_generic_bus for PCI: 00:1e.2
1028 12:07:21.710416 SPI: 00 enabled
1029 12:07:21.713608
1030 12:07:21.716983 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 12:07:21.723932 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 12:07:21.727004 PCI: 00:1e.3 scanning...
1033 12:07:21.730381 scan_generic_bus for PCI: 00:1e.3
1034 12:07:21.730880 SPI: 00 enabled
1035 12:07:21.736789 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 12:07:21.740277 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 12:07:21.743954 PCI: 00:1f.0 scanning...
1038 12:07:21.746796 scan_static_bus for PCI: 00:1f.0
1039 12:07:21.749953 PNP: 0c09.0 enabled
1040 12:07:21.753215 PNP: 0c09.0 scanning...
1041 12:07:21.756912 scan_static_bus for PNP: 0c09.0
1042 12:07:21.760140 scan_static_bus for PNP: 0c09.0 done
1043 12:07:21.763245 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 12:07:21.766877 scan_static_bus for PCI: 00:1f.0 done
1045 12:07:21.773131 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 12:07:21.773321 PCI: 00:1f.2 scanning...
1047 12:07:21.776451
1048 12:07:21.780013 scan_static_bus for PCI: 00:1f.2
1049 12:07:21.780219 GENERIC: 0.0 enabled
1050 12:07:21.783299 GENERIC: 0.0 scanning...
1051 12:07:21.786700 scan_static_bus for GENERIC: 0.0
1052 12:07:21.789793 GENERIC: 0.0 enabled
1053 12:07:21.789982 GENERIC: 1.0 enabled
1054 12:07:21.796405 scan_static_bus for GENERIC: 0.0 done
1055 12:07:21.799669 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1056 12:07:21.802867 scan_static_bus for PCI: 00:1f.2 done
1057 12:07:21.809742 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1058 12:07:21.809935 PCI: 00:1f.3 scanning...
1059 12:07:21.813101 scan_static_bus for PCI: 00:1f.3
1060 12:07:21.819472 scan_static_bus for PCI: 00:1f.3 done
1061 12:07:21.822605 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1062 12:07:21.826285 PCI: 00:1f.5 scanning...
1063 12:07:21.829732 scan_generic_bus for PCI: 00:1f.5
1064 12:07:21.833031 scan_generic_bus for PCI: 00:1f.5 done
1065 12:07:21.836311 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1066 12:07:21.842739 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1067 12:07:21.846329 scan_static_bus for Root Device done
1068 12:07:21.852671 scan_bus: bus Root Device finished in 737 msecs
1069 12:07:21.852778 done
1070 12:07:21.858921 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1071 12:07:21.862376 Chrome EC: UHEPI supported
1072 12:07:21.865639 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1073 12:07:21.872368 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1074 12:07:21.875997 SPI flash protection: WPSW=0 SRP0=0
1075 12:07:21.882433 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1076 12:07:21.888702 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1077 12:07:21.888980 found VGA at PCI: 00:02.0
1078 12:07:21.892250 Setting up VGA for PCI: 00:02.0
1079 12:07:21.898801 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1080 12:07:21.902204 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1081 12:07:21.905323 Allocating resources...
1082 12:07:21.908790 Reading resources...
1083 12:07:21.912460 Root Device read_resources bus 0 link: 0
1084 12:07:21.915425 DOMAIN: 0000 read_resources bus 0 link: 0
1085 12:07:21.922872 PCI: 00:04.0 read_resources bus 1 link: 0
1086 12:07:21.926378 PCI: 00:04.0 read_resources bus 1 link: 0 done
1087 12:07:21.933421 PCI: 00:0d.0 read_resources bus 0 link: 0
1088 12:07:21.936197 USB0 port 0 read_resources bus 0 link: 0
1089 12:07:21.943162 USB0 port 0 read_resources bus 0 link: 0 done
1090 12:07:21.946322 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1091 12:07:21.949366 PCI: 00:14.0 read_resources bus 0 link: 0
1092 12:07:21.956300 USB0 port 0 read_resources bus 0 link: 0
1093 12:07:21.959745 USB0 port 0 read_resources bus 0 link: 0 done
1094 12:07:21.966557 PCI: 00:14.0 read_resources bus 0 link: 0 done
1095 12:07:21.969745 PCI: 00:14.3 read_resources bus 0 link: 0
1096 12:07:21.976071 PCI: 00:14.3 read_resources bus 0 link: 0 done
1097 12:07:21.979710 PCI: 00:15.0 read_resources bus 0 link: 0
1098 12:07:21.986731 PCI: 00:15.0 read_resources bus 0 link: 0 done
1099 12:07:21.989849 PCI: 00:15.1 read_resources bus 0 link: 0
1100 12:07:21.996438 PCI: 00:15.1 read_resources bus 0 link: 0 done
1101 12:07:22.000281 PCI: 00:19.1 read_resources bus 0 link: 0
1102 12:07:22.006736 PCI: 00:19.1 read_resources bus 0 link: 0 done
1103 12:07:22.009948 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 12:07:22.016866 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 12:07:22.020041 PCI: 00:1e.2 read_resources bus 2 link: 0
1106 12:07:22.027389 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1107 12:07:22.030906 PCI: 00:1e.3 read_resources bus 3 link: 0
1108 12:07:22.037270 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1109 12:07:22.040547 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 12:07:22.046783 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 12:07:22.050760 PCI: 00:1f.2 read_resources bus 0 link: 0
1112 12:07:22.053767 GENERIC: 0.0 read_resources bus 0 link: 0
1113 12:07:22.060704 GENERIC: 0.0 read_resources bus 0 link: 0 done
1114 12:07:22.064202 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1115 12:07:22.071224 DOMAIN: 0000 read_resources bus 0 link: 0 done
1116 12:07:22.074211 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1117 12:07:22.080635 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1118 12:07:22.084312 Root Device read_resources bus 0 link: 0 done
1119 12:07:22.087559 Done reading resources.
1120 12:07:22.094310 Show resources in subtree (Root Device)...After reading.
1121 12:07:22.097756 Root Device child on link 0 DOMAIN: 0000
1122 12:07:22.100909 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1123 12:07:22.110968 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1124 12:07:22.120954 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1125 12:07:22.124320 PCI: 00:00.0
1126 12:07:22.130923 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1127 12:07:22.140669 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1128 12:07:22.150899 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1129 12:07:22.160877 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1130 12:07:22.170621 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1131 12:07:22.180760 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1132 12:07:22.187454 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1133 12:07:22.197156 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1134 12:07:22.207146 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1135 12:07:22.217248 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1136 12:07:22.227062 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1137 12:07:22.237252 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1138 12:07:22.243721 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1139 12:07:22.253576 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1140 12:07:22.263705 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1141 12:07:22.273618 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1142 12:07:22.283359 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1143 12:07:22.293156 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1144 12:07:22.300035 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1145 12:07:22.310092 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1146 12:07:22.313156 PCI: 00:02.0
1147 12:07:22.323330 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 12:07:22.333187 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1149 12:07:22.343360 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1150 12:07:22.346732 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1151 12:07:22.356860 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1152 12:07:22.357363 GENERIC: 0.0
1153 12:07:22.360004 PCI: 00:05.0
1154 12:07:22.370013 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1155 12:07:22.373409 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1156 12:07:22.377161 GENERIC: 0.0
1157 12:07:22.377639 PCI: 00:08.0
1158 12:07:22.386428 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 12:07:22.389510 PCI: 00:0a.0
1160 12:07:22.392967 PCI: 00:0d.0 child on link 0 USB0 port 0
1161 12:07:22.402874 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 12:07:22.409315 USB0 port 0 child on link 0 USB3 port 0
1163 12:07:22.409575 USB3 port 0
1164 12:07:22.412711 USB3 port 1
1165 12:07:22.412880 USB3 port 2
1166 12:07:22.416195 USB3 port 3
1167 12:07:22.419440 PCI: 00:14.0 child on link 0 USB0 port 0
1168 12:07:22.429361 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1169 12:07:22.433251 USB0 port 0 child on link 0 USB2 port 0
1170 12:07:22.436475 USB2 port 0
1171 12:07:22.437041 USB2 port 1
1172 12:07:22.439800 USB2 port 2
1173 12:07:22.443143 USB2 port 3
1174 12:07:22.443584 USB2 port 4
1175 12:07:22.446670 USB2 port 5
1176 12:07:22.447044 USB2 port 6
1177 12:07:22.449894 USB2 port 7
1178 12:07:22.450209 USB2 port 8
1179 12:07:22.453357 USB2 port 9
1180 12:07:22.453723 USB3 port 0
1181 12:07:22.456357 USB3 port 1
1182 12:07:22.456712 USB3 port 2
1183 12:07:22.459522 USB3 port 3
1184 12:07:22.459757 PCI: 00:14.2
1185 12:07:22.469393 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1186 12:07:22.479394 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1187 12:07:22.485997 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1188 12:07:22.495900 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 12:07:22.495990 GENERIC: 0.0
1190 12:07:22.499390 PCI: 00:15.0 child on link 0 I2C: 00:1a
1191 12:07:22.502610
1192 12:07:22.509379 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 12:07:22.512695 I2C: 00:1a
1194 12:07:22.512796 I2C: 00:31
1195 12:07:22.516099 I2C: 00:32
1196 12:07:22.519185 PCI: 00:15.1 child on link 0 I2C: 00:10
1197 12:07:22.529349 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 12:07:22.532721 I2C: 00:10
1199 12:07:22.532818 PCI: 00:15.2
1200 12:07:22.542680 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 12:07:22.546011 PCI: 00:15.3
1202 12:07:22.556180 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 12:07:22.556273 PCI: 00:16.0
1204 12:07:22.565815 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 12:07:22.569010 PCI: 00:19.0
1206 12:07:22.572416 PCI: 00:19.1 child on link 0 I2C: 00:15
1207 12:07:22.582815 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 12:07:22.583395 I2C: 00:15
1209 12:07:22.589333 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1210 12:07:22.595983 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1211 12:07:22.605941 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1212 12:07:22.615889 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1213 12:07:22.619156 GENERIC: 0.0
1214 12:07:22.619398 PCI: 01:00.0
1215 12:07:22.629603 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 12:07:22.639324 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1217 12:07:22.649152 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1218 12:07:22.649240 PCI: 00:1e.0
1219 12:07:22.662261 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1220 12:07:22.665393 PCI: 00:1e.2 child on link 0 SPI: 00
1221 12:07:22.675286 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 12:07:22.675374 SPI: 00
1223 12:07:22.678991 PCI: 00:1e.3 child on link 0 SPI: 00
1224 12:07:22.688712 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 12:07:22.691912 SPI: 00
1226 12:07:22.695427 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1227 12:07:22.705119 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1228 12:07:22.705221 PNP: 0c09.0
1229 12:07:22.715675 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1230 12:07:22.718953 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1231 12:07:22.728705 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1232 12:07:22.738669 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1233 12:07:22.741902 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1234 12:07:22.745755 GENERIC: 0.0
1235 12:07:22.745841 GENERIC: 1.0
1236 12:07:22.748854 PCI: 00:1f.3
1237 12:07:22.758713 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1238 12:07:22.768616 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1239 12:07:22.769069 PCI: 00:1f.5
1240 12:07:22.778859 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1241 12:07:22.782016 CPU_CLUSTER: 0 child on link 0 APIC: 00
1242 12:07:22.785265 APIC: 00
1243 12:07:22.785747 APIC: 01
1244 12:07:22.786102 APIC: 02
1245 12:07:22.788638
1246 12:07:22.789075 APIC: 05
1247 12:07:22.789427 APIC: 07
1248 12:07:22.791884 APIC: 06
1249 12:07:22.792325 APIC: 03
1250 12:07:22.792710 APIC: 04
1251 12:07:22.801788 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1252 12:07:22.805435 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1253 12:07:22.811920 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1254 12:07:22.818492 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1255 12:07:22.821785 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1256 12:07:22.828450 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1257 12:07:22.831751 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1258 12:07:22.838615 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1259 12:07:22.844906 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1260 12:07:22.854524 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1261 12:07:22.861976 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1262 12:07:22.868425 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1263 12:07:22.874925 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1264 12:07:22.881017 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1265 12:07:22.891354 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1266 12:07:22.891448 DOMAIN: 0000: Resource ranges:
1267 12:07:22.894779
1268 12:07:22.897847 * Base: 1000, Size: 800, Tag: 100
1269 12:07:22.901426 * Base: 1900, Size: e700, Tag: 100
1270 12:07:22.904885 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1271 12:07:22.911016 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1272 12:07:22.917768 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1273 12:07:22.928292 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1274 12:07:22.934460 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1275 12:07:22.941471 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1276 12:07:22.950887 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1277 12:07:22.957813 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1278 12:07:22.964353 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1279 12:07:22.974368 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1280 12:07:22.981188 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1281 12:07:22.987473 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1282 12:07:22.997742 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1283 12:07:23.004595 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1284 12:07:23.010814 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1285 12:07:23.017516 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1286 12:07:23.020767
1287 12:07:23.027521 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 12:07:23.034039 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 12:07:23.040524 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 12:07:23.050529 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1291 12:07:23.057318 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 12:07:23.063821 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 12:07:23.067478
1294 12:07:23.073888 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1295 12:07:23.080248 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1296 12:07:23.086935 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1297 12:07:23.091495 DOMAIN: 0000: Resource ranges:
1298 12:07:23.097202 * Base: 7fc00000, Size: 40400000, Tag: 200
1299 12:07:23.100532 * Base: d0000000, Size: 28000000, Tag: 200
1300 12:07:23.103892 * Base: fa000000, Size: 1000000, Tag: 200
1301 12:07:23.110842 * Base: fb001000, Size: 2fff000, Tag: 200
1302 12:07:23.113687 * Base: fe010000, Size: 2e000, Tag: 200
1303 12:07:23.116886 * Base: fe03f000, Size: d41000, Tag: 200
1304 12:07:23.120410 * Base: fed88000, Size: 8000, Tag: 200
1305 12:07:23.126970 * Base: fed93000, Size: d000, Tag: 200
1306 12:07:23.130592 * Base: feda2000, Size: 1e000, Tag: 200
1307 12:07:23.133760 * Base: fede0000, Size: 1220000, Tag: 200
1308 12:07:23.140518 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1309 12:07:23.146782 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1310 12:07:23.153463 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1311 12:07:23.160370 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1312 12:07:23.166921 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1313 12:07:23.173431 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1314 12:07:23.179931 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1315 12:07:23.187081 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1316 12:07:23.193692 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1317 12:07:23.200168 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1318 12:07:23.206821 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1319 12:07:23.213473 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1320 12:07:23.219642 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1321 12:07:23.226345 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1322 12:07:23.233368 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1323 12:07:23.239929 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1324 12:07:23.246761 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1325 12:07:23.253119 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1326 12:07:23.260232 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1327 12:07:23.266525 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1328 12:07:23.273317 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1329 12:07:23.279772 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1330 12:07:23.286277 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1331 12:07:23.292844 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1332 12:07:23.299723 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1333 12:07:23.302744 PCI: 00:1d.0: Resource ranges:
1334 12:07:23.309313 * Base: 7fc00000, Size: 100000, Tag: 200
1335 12:07:23.316075 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1336 12:07:23.322784 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1337 12:07:23.329027 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1338 12:07:23.335861 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1339 12:07:23.342658 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1340 12:07:23.348974 Root Device assign_resources, bus 0 link: 0
1341 12:07:23.352571 DOMAIN: 0000 assign_resources, bus 0 link: 0
1342 12:07:23.362351 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1343 12:07:23.369109 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1344 12:07:23.375850 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1345 12:07:23.385774 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1346 12:07:23.388767 PCI: 00:04.0 assign_resources, bus 1 link: 0
1347 12:07:23.395638 PCI: 00:04.0 assign_resources, bus 1 link: 0
1348 12:07:23.402237 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1349 12:07:23.412166 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1350 12:07:23.418950 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1351 12:07:23.422349 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1352 12:07:23.429588 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1353 12:07:23.436063 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1354 12:07:23.442220 PCI: 00:14.0 assign_resources, bus 0 link: 0
1355 12:07:23.445979 PCI: 00:14.0 assign_resources, bus 0 link: 0
1356 12:07:23.456025 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1357 12:07:23.462528 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1358 12:07:23.468843 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1359 12:07:23.472323
1360 12:07:23.476009 PCI: 00:14.3 assign_resources, bus 0 link: 0
1361 12:07:23.479075 PCI: 00:14.3 assign_resources, bus 0 link: 0
1362 12:07:23.488741 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1363 12:07:23.492409 PCI: 00:15.0 assign_resources, bus 0 link: 0
1364 12:07:23.498992 PCI: 00:15.0 assign_resources, bus 0 link: 0
1365 12:07:23.505241 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1366 12:07:23.508346 PCI: 00:15.1 assign_resources, bus 0 link: 0
1367 12:07:23.515311 PCI: 00:15.1 assign_resources, bus 0 link: 0
1368 12:07:23.522220 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1369 12:07:23.531692 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1370 12:07:23.538908 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1371 12:07:23.548889 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1372 12:07:23.552129 PCI: 00:19.1 assign_resources, bus 0 link: 0
1373 12:07:23.558599 PCI: 00:19.1 assign_resources, bus 0 link: 0
1374 12:07:23.565043 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1375 12:07:23.575149 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1376 12:07:23.585019 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1377 12:07:23.588323 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 12:07:23.598425 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1379 12:07:23.605138 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1380 12:07:23.611514 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1381 12:07:23.618132 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1382 12:07:23.625389 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1383 12:07:23.632179 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1384 12:07:23.635166 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1385 12:07:23.641596 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1386 12:07:23.645004
1387 12:07:23.648333 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1388 12:07:23.651352 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1389 12:07:23.658123 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1390 12:07:23.661473 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1391 12:07:23.668204 LPC: Trying to open IO window from 800 size 1ff
1392 12:07:23.674782 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1393 12:07:23.684782 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1394 12:07:23.691101 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1395 12:07:23.694401 DOMAIN: 0000 assign_resources, bus 0 link: 0
1396 12:07:23.701224 Root Device assign_resources, bus 0 link: 0
1397 12:07:23.704915 Done setting resources.
1398 12:07:23.711874 Show resources in subtree (Root Device)...After assigning values.
1399 12:07:23.714762 Root Device child on link 0 DOMAIN: 0000
1400 12:07:23.718355 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1401 12:07:23.727765 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1402 12:07:23.737794 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1403 12:07:23.738147 PCI: 00:00.0
1404 12:07:23.747600 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1405 12:07:23.758129 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1406 12:07:23.768147 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1407 12:07:23.777583 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1408 12:07:23.787947 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1409 12:07:23.794757 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1410 12:07:23.804399 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1411 12:07:23.814565 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1412 12:07:23.824270 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1413 12:07:23.834689 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1414 12:07:23.844469 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1415 12:07:23.850878 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1416 12:07:23.860499 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1417 12:07:23.870632 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1418 12:07:23.880573 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1419 12:07:23.890620 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1420 12:07:23.900405 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1421 12:07:23.907298 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1422 12:07:23.917395 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1423 12:07:23.927334 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1424 12:07:23.930397 PCI: 00:02.0
1425 12:07:23.940391 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1426 12:07:23.950179 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1427 12:07:23.960060 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1428 12:07:23.963583 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1429 12:07:23.973786 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1430 12:07:23.977010 GENERIC: 0.0
1431 12:07:23.977461 PCI: 00:05.0
1432 12:07:23.989956 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1433 12:07:23.993593 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1434 12:07:23.994045 GENERIC: 0.0
1435 12:07:23.996538 PCI: 00:08.0
1436 12:07:24.006802 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1437 12:07:24.010043 PCI: 00:0a.0
1438 12:07:24.013119 PCI: 00:0d.0 child on link 0 USB0 port 0
1439 12:07:24.022945 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1440 12:07:24.026752 USB0 port 0 child on link 0 USB3 port 0
1441 12:07:24.029787 USB3 port 0
1442 12:07:24.029980 USB3 port 1
1443 12:07:24.033445 USB3 port 2
1444 12:07:24.033652 USB3 port 3
1445 12:07:24.036367
1446 12:07:24.039973 PCI: 00:14.0 child on link 0 USB0 port 0
1447 12:07:24.049536 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1448 12:07:24.053474 USB0 port 0 child on link 0 USB2 port 0
1449 12:07:24.056105 USB2 port 0
1450 12:07:24.056297 USB2 port 1
1451 12:07:24.059575 USB2 port 2
1452 12:07:24.059769 USB2 port 3
1453 12:07:24.062867 USB2 port 4
1454 12:07:24.063100 USB2 port 5
1455 12:07:24.066176 USB2 port 6
1456 12:07:24.069696 USB2 port 7
1457 12:07:24.069877 USB2 port 8
1458 12:07:24.072785 USB2 port 9
1459 12:07:24.072967 USB3 port 0
1460 12:07:24.076346 USB3 port 1
1461 12:07:24.076539 USB3 port 2
1462 12:07:24.079624 USB3 port 3
1463 12:07:24.079803 PCI: 00:14.2
1464 12:07:24.089384 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1465 12:07:24.099422 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1466 12:07:24.106309 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1467 12:07:24.116565 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1468 12:07:24.116827 GENERIC: 0.0
1469 12:07:24.123348 PCI: 00:15.0 child on link 0 I2C: 00:1a
1470 12:07:24.132918 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1471 12:07:24.133256 I2C: 00:1a
1472 12:07:24.136442 I2C: 00:31
1473 12:07:24.136790 I2C: 00:32
1474 12:07:24.139968 PCI: 00:15.1 child on link 0 I2C: 00:10
1475 12:07:24.143164
1476 12:07:24.152968 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1477 12:07:24.153321 I2C: 00:10
1478 12:07:24.156189 PCI: 00:15.2
1479 12:07:24.166273 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1480 12:07:24.166626 PCI: 00:15.3
1481 12:07:24.176485 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1482 12:07:24.179665 PCI: 00:16.0
1483 12:07:24.189360 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1484 12:07:24.189755 PCI: 00:19.0
1485 12:07:24.196450 PCI: 00:19.1 child on link 0 I2C: 00:15
1486 12:07:24.206324 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1487 12:07:24.206708 I2C: 00:15
1488 12:07:24.212844 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1489 12:07:24.219369 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1490 12:07:24.232897 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1491 12:07:24.242503 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1492 12:07:24.245828 GENERIC: 0.0
1493 12:07:24.245931 PCI: 01:00.0
1494 12:07:24.255462 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1495 12:07:24.265372 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1496 12:07:24.268720
1497 12:07:24.279050 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1498 12:07:24.279162 PCI: 00:1e.0
1499 12:07:24.288875 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1500 12:07:24.292482
1501 12:07:24.295576 PCI: 00:1e.2 child on link 0 SPI: 00
1502 12:07:24.305257 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1503 12:07:24.305368 SPI: 00
1504 12:07:24.308530 PCI: 00:1e.3 child on link 0 SPI: 00
1505 12:07:24.322480 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1506 12:07:24.322622 SPI: 00
1507 12:07:24.325115 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1508 12:07:24.335530 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1509 12:07:24.335647 PNP: 0c09.0
1510 12:07:24.345083 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1511 12:07:24.348660 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1512 12:07:24.358739 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1513 12:07:24.368556 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1514 12:07:24.371824 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1515 12:07:24.375282 GENERIC: 0.0
1516 12:07:24.375372 GENERIC: 1.0
1517 12:07:24.378738 PCI: 00:1f.3
1518 12:07:24.388456 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1519 12:07:24.398254 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1520 12:07:24.401441 PCI: 00:1f.5
1521 12:07:24.411898 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1522 12:07:24.414951 CPU_CLUSTER: 0 child on link 0 APIC: 00
1523 12:07:24.418406 APIC: 00
1524 12:07:24.418494 APIC: 01
1525 12:07:24.418570 APIC: 02
1526 12:07:24.421426 APIC: 05
1527 12:07:24.421554 APIC: 07
1528 12:07:24.421625 APIC: 06
1529 12:07:24.424924 APIC: 03
1530 12:07:24.425011 APIC: 04
1531 12:07:24.428489 Done allocating resources.
1532 12:07:24.435080 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1533 12:07:24.441549 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1534 12:07:24.445152 Configure GPIOs for I2S audio on UP4.
1535 12:07:24.451457 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1536 12:07:24.454912 Enabling resources...
1537 12:07:24.458527 PCI: 00:00.0 subsystem <- 8086/9a12
1538 12:07:24.458617 PCI: 00:00.0 cmd <- 06
1539 12:07:24.461726
1540 12:07:24.464813 PCI: 00:02.0 subsystem <- 8086/9a40
1541 12:07:24.464900 PCI: 00:02.0 cmd <- 03
1542 12:07:24.471829 PCI: 00:04.0 subsystem <- 8086/9a03
1543 12:07:24.471926 PCI: 00:04.0 cmd <- 02
1544 12:07:24.474678 PCI: 00:05.0 subsystem <- 8086/9a19
1545 12:07:24.478326 PCI: 00:05.0 cmd <- 02
1546 12:07:24.481359 PCI: 00:08.0 subsystem <- 8086/9a11
1547 12:07:24.485018 PCI: 00:08.0 cmd <- 06
1548 12:07:24.488009 PCI: 00:0d.0 subsystem <- 8086/9a13
1549 12:07:24.491475 PCI: 00:0d.0 cmd <- 02
1550 12:07:24.494837 PCI: 00:14.0 subsystem <- 8086/a0ed
1551 12:07:24.497976 PCI: 00:14.0 cmd <- 02
1552 12:07:24.501289 PCI: 00:14.2 subsystem <- 8086/a0ef
1553 12:07:24.505018 PCI: 00:14.2 cmd <- 02
1554 12:07:24.508455 PCI: 00:14.3 subsystem <- 8086/a0f0
1555 12:07:24.508542 PCI: 00:14.3 cmd <- 02
1556 12:07:24.515270 PCI: 00:15.0 subsystem <- 8086/a0e8
1557 12:07:24.515440 PCI: 00:15.0 cmd <- 02
1558 12:07:24.518056 PCI: 00:15.1 subsystem <- 8086/a0e9
1559 12:07:24.521617 PCI: 00:15.1 cmd <- 02
1560 12:07:24.525043 PCI: 00:15.2 subsystem <- 8086/a0ea
1561 12:07:24.528332 PCI: 00:15.2 cmd <- 02
1562 12:07:24.532039 PCI: 00:15.3 subsystem <- 8086/a0eb
1563 12:07:24.534849 PCI: 00:15.3 cmd <- 02
1564 12:07:24.538097 PCI: 00:16.0 subsystem <- 8086/a0e0
1565 12:07:24.541652 PCI: 00:16.0 cmd <- 02
1566 12:07:24.545140 PCI: 00:19.1 subsystem <- 8086/a0c6
1567 12:07:24.548532 PCI: 00:19.1 cmd <- 02
1568 12:07:24.551546 PCI: 00:1d.0 bridge ctrl <- 0013
1569 12:07:24.554745 PCI: 00:1d.0 subsystem <- 8086/a0b0
1570 12:07:24.554832 PCI: 00:1d.0 cmd <- 06
1571 12:07:24.561940 PCI: 00:1e.0 subsystem <- 8086/a0a8
1572 12:07:24.562027 PCI: 00:1e.0 cmd <- 06
1573 12:07:24.564952 PCI: 00:1e.2 subsystem <- 8086/a0aa
1574 12:07:24.568533 PCI: 00:1e.2 cmd <- 06
1575 12:07:24.571490 PCI: 00:1e.3 subsystem <- 8086/a0ab
1576 12:07:24.574842 PCI: 00:1e.3 cmd <- 02
1577 12:07:24.578295 PCI: 00:1f.0 subsystem <- 8086/a087
1578 12:07:24.581293 PCI: 00:1f.0 cmd <- 407
1579 12:07:24.584804 PCI: 00:1f.3 subsystem <- 8086/a0c8
1580 12:07:24.588136 PCI: 00:1f.3 cmd <- 02
1581 12:07:24.591426 PCI: 00:1f.5 subsystem <- 8086/a0a4
1582 12:07:24.594821 PCI: 00:1f.5 cmd <- 406
1583 12:07:24.598115 PCI: 01:00.0 cmd <- 02
1584 12:07:24.603064 done.
1585 12:07:24.606256 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1586 12:07:24.609453 Initializing devices...
1587 12:07:24.612931 Root Device init
1588 12:07:24.615929 Chrome EC: Set SMI mask to 0x0000000000000000
1589 12:07:24.622735 Chrome EC: clear events_b mask to 0x0000000000000000
1590 12:07:24.629374 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1591 12:07:24.632923 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1592 12:07:24.639426 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1593 12:07:24.645821 Chrome EC: Set WAKE mask to 0x0000000000000000
1594 12:07:24.649437 fw_config match found: DB_USB=USB3_ACTIVE
1595 12:07:24.655805 Configure Right Type-C port orientation for retimer
1596 12:07:24.659466 Root Device init finished in 43 msecs
1597 12:07:24.663188 PCI: 00:00.0 init
1598 12:07:24.665895 CPU TDP = 9 Watts
1599 12:07:24.665980 CPU PL1 = 9 Watts
1600 12:07:24.669459 CPU PL2 = 40 Watts
1601 12:07:24.669595 CPU PL4 = 83 Watts
1602 12:07:24.672654 PCI: 00:00.0 init finished in 8 msecs
1603 12:07:24.676076 PCI: 00:02.0 init
1604 12:07:24.679412 GMA: Found VBT in CBFS
1605 12:07:24.682822 GMA: Found valid VBT in CBFS
1606 12:07:24.686171 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1607 12:07:24.696226 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1608 12:07:24.699279 PCI: 00:02.0 init finished in 18 msecs
1609 12:07:24.702558 PCI: 00:05.0 init
1610 12:07:24.706465 PCI: 00:05.0 init finished in 0 msecs
1611 12:07:24.706550 PCI: 00:08.0 init
1612 12:07:24.712644 PCI: 00:08.0 init finished in 0 msecs
1613 12:07:24.712730 PCI: 00:14.0 init
1614 12:07:24.718983 PCI: 00:14.0 init finished in 0 msecs
1615 12:07:24.719069 PCI: 00:14.2 init
1616 12:07:24.722700 PCI: 00:14.2 init finished in 0 msecs
1617 12:07:24.726599 PCI: 00:15.0 init
1618 12:07:24.729422 I2C bus 0 version 0x3230302a
1619 12:07:24.732736 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1620 12:07:24.736546 PCI: 00:15.0 init finished in 6 msecs
1621 12:07:24.739713 PCI: 00:15.1 init
1622 12:07:24.743062 I2C bus 1 version 0x3230302a
1623 12:07:24.745964 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1624 12:07:24.749629 PCI: 00:15.1 init finished in 6 msecs
1625 12:07:24.752929 PCI: 00:15.2 init
1626 12:07:24.753016 I2C bus 2 version 0x3230302a
1627 12:07:24.755952
1628 12:07:24.759842 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1629 12:07:24.762721 PCI: 00:15.2 init finished in 6 msecs
1630 12:07:24.762807 PCI: 00:15.3 init
1631 12:07:24.766476 I2C bus 3 version 0x3230302a
1632 12:07:24.769685 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1633 12:07:24.776188 PCI: 00:15.3 init finished in 6 msecs
1634 12:07:24.776276 PCI: 00:16.0 init
1635 12:07:24.779073 PCI: 00:16.0 init finished in 0 msecs
1636 12:07:24.783103 PCI: 00:19.1 init
1637 12:07:24.786719 I2C bus 5 version 0x3230302a
1638 12:07:24.789822 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1639 12:07:24.792929 PCI: 00:19.1 init finished in 6 msecs
1640 12:07:24.796325 PCI: 00:1d.0 init
1641 12:07:24.799680 Initializing PCH PCIe bridge.
1642 12:07:24.803161 PCI: 00:1d.0 init finished in 3 msecs
1643 12:07:24.806508 PCI: 00:1f.0 init
1644 12:07:24.809595 IOAPIC: Initializing IOAPIC at 0xfec00000
1645 12:07:24.813031 IOAPIC: Bootstrap Processor Local APIC = 0x00
1646 12:07:24.816548 IOAPIC: ID = 0x02
1647 12:07:24.819549 IOAPIC: Dumping registers
1648 12:07:24.823016 reg 0x0000: 0x02000000
1649 12:07:24.823104 reg 0x0001: 0x00770020
1650 12:07:24.826252 reg 0x0002: 0x00000000
1651 12:07:24.829828 PCI: 00:1f.0 init finished in 21 msecs
1652 12:07:24.832987 PCI: 00:1f.2 init
1653 12:07:24.836690 Disabling ACPI via APMC.
1654 12:07:24.839662 APMC done.
1655 12:07:24.843318 PCI: 00:1f.2 init finished in 5 msecs
1656 12:07:24.853936 PCI: 01:00.0 init
1657 12:07:24.857093 PCI: 01:00.0 init finished in 0 msecs
1658 12:07:24.860602 PNP: 0c09.0 init
1659 12:07:24.863920 Google Chrome EC uptime: 8.419 seconds
1660 12:07:24.870614 Google Chrome AP resets since EC boot: 1
1661 12:07:24.874069 Google Chrome most recent AP reset causes:
1662 12:07:24.876892 0.350: 32775 shutdown: entering G3
1663 12:07:24.883559 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1664 12:07:24.886885 PNP: 0c09.0 init finished in 22 msecs
1665 12:07:24.892558 Devices initialized
1666 12:07:24.896076 Show all devs... After init.
1667 12:07:24.899286 Root Device: enabled 1
1668 12:07:24.899373 DOMAIN: 0000: enabled 1
1669 12:07:24.902772 CPU_CLUSTER: 0: enabled 1
1670 12:07:24.905895 PCI: 00:00.0: enabled 1
1671 12:07:24.909680 PCI: 00:02.0: enabled 1
1672 12:07:24.909767 PCI: 00:04.0: enabled 1
1673 12:07:24.912564 PCI: 00:05.0: enabled 1
1674 12:07:24.916196 PCI: 00:06.0: enabled 0
1675 12:07:24.919324 PCI: 00:07.0: enabled 0
1676 12:07:24.919411 PCI: 00:07.1: enabled 0
1677 12:07:24.923141 PCI: 00:07.2: enabled 0
1678 12:07:24.925869 PCI: 00:07.3: enabled 0
1679 12:07:24.929035 PCI: 00:08.0: enabled 1
1680 12:07:24.929122 PCI: 00:09.0: enabled 0
1681 12:07:24.932583 PCI: 00:0a.0: enabled 0
1682 12:07:24.935592 PCI: 00:0d.0: enabled 1
1683 12:07:24.938904 PCI: 00:0d.1: enabled 0
1684 12:07:24.938989 PCI: 00:0d.2: enabled 0
1685 12:07:24.942748 PCI: 00:0d.3: enabled 0
1686 12:07:24.946117 PCI: 00:0e.0: enabled 0
1687 12:07:24.946273 PCI: 00:10.2: enabled 1
1688 12:07:24.949381 PCI: 00:10.6: enabled 0
1689 12:07:24.952146 PCI: 00:10.7: enabled 0
1690 12:07:24.956012 PCI: 00:12.0: enabled 0
1691 12:07:24.956097 PCI: 00:12.6: enabled 0
1692 12:07:24.959075 PCI: 00:13.0: enabled 0
1693 12:07:24.962223 PCI: 00:14.0: enabled 1
1694 12:07:24.965495 PCI: 00:14.1: enabled 0
1695 12:07:24.965602 PCI: 00:14.2: enabled 1
1696 12:07:24.968959 PCI: 00:14.3: enabled 1
1697 12:07:24.972383 PCI: 00:15.0: enabled 1
1698 12:07:24.975432 PCI: 00:15.1: enabled 1
1699 12:07:24.975516 PCI: 00:15.2: enabled 1
1700 12:07:24.978832 PCI: 00:15.3: enabled 1
1701 12:07:24.982043 PCI: 00:16.0: enabled 1
1702 12:07:24.982126 PCI: 00:16.1: enabled 0
1703 12:07:24.985773
1704 12:07:24.985858 PCI: 00:16.2: enabled 0
1705 12:07:24.989145 PCI: 00:16.3: enabled 0
1706 12:07:24.992249 PCI: 00:16.4: enabled 0
1707 12:07:24.992332 PCI: 00:16.5: enabled 0
1708 12:07:24.995756 PCI: 00:17.0: enabled 0
1709 12:07:24.999187 PCI: 00:19.0: enabled 0
1710 12:07:25.002300 PCI: 00:19.1: enabled 1
1711 12:07:25.002383 PCI: 00:19.2: enabled 0
1712 12:07:25.005416 PCI: 00:1c.0: enabled 1
1713 12:07:25.008911 PCI: 00:1c.1: enabled 0
1714 12:07:25.012071 PCI: 00:1c.2: enabled 0
1715 12:07:25.012155 PCI: 00:1c.3: enabled 0
1716 12:07:25.015346 PCI: 00:1c.4: enabled 0
1717 12:07:25.018873 PCI: 00:1c.5: enabled 0
1718 12:07:25.018972 PCI: 00:1c.6: enabled 1
1719 12:07:25.022507
1720 12:07:25.022591 PCI: 00:1c.7: enabled 0
1721 12:07:25.025410 PCI: 00:1d.0: enabled 1
1722 12:07:25.028830 PCI: 00:1d.1: enabled 0
1723 12:07:25.028914 PCI: 00:1d.2: enabled 1
1724 12:07:25.032135 PCI: 00:1d.3: enabled 0
1725 12:07:25.035593 PCI: 00:1e.0: enabled 1
1726 12:07:25.038652 PCI: 00:1e.1: enabled 0
1727 12:07:25.038737 PCI: 00:1e.2: enabled 1
1728 12:07:25.042366 PCI: 00:1e.3: enabled 1
1729 12:07:25.045411 PCI: 00:1f.0: enabled 1
1730 12:07:25.048833 PCI: 00:1f.1: enabled 0
1731 12:07:25.048918 PCI: 00:1f.2: enabled 1
1732 12:07:25.052095 PCI: 00:1f.3: enabled 1
1733 12:07:25.055853 PCI: 00:1f.4: enabled 0
1734 12:07:25.055938 PCI: 00:1f.5: enabled 1
1735 12:07:25.058971
1736 12:07:25.059056 PCI: 00:1f.6: enabled 0
1737 12:07:25.062541 PCI: 00:1f.7: enabled 0
1738 12:07:25.065373 APIC: 00: enabled 1
1739 12:07:25.065458 GENERIC: 0.0: enabled 1
1740 12:07:25.069027 GENERIC: 0.0: enabled 1
1741 12:07:25.072073 GENERIC: 1.0: enabled 1
1742 12:07:25.075736 GENERIC: 0.0: enabled 1
1743 12:07:25.075821 GENERIC: 1.0: enabled 1
1744 12:07:25.079339 USB0 port 0: enabled 1
1745 12:07:25.082308 GENERIC: 0.0: enabled 1
1746 12:07:25.082392 USB0 port 0: enabled 1
1747 12:07:25.085435 GENERIC: 0.0: enabled 1
1748 12:07:25.088816 I2C: 00:1a: enabled 1
1749 12:07:25.088900 I2C: 00:31: enabled 1
1750 12:07:25.092149 I2C: 00:32: enabled 1
1751 12:07:25.095432 I2C: 00:10: enabled 1
1752 12:07:25.095518 I2C: 00:15: enabled 1
1753 12:07:25.098711
1754 12:07:25.098796 GENERIC: 0.0: enabled 0
1755 12:07:25.102186 GENERIC: 1.0: enabled 0
1756 12:07:25.105820 GENERIC: 0.0: enabled 1
1757 12:07:25.105905 SPI: 00: enabled 1
1758 12:07:25.108761 SPI: 00: enabled 1
1759 12:07:25.112575 PNP: 0c09.0: enabled 1
1760 12:07:25.112659 GENERIC: 0.0: enabled 1
1761 12:07:25.115374 USB3 port 0: enabled 1
1762 12:07:25.118749 USB3 port 1: enabled 1
1763 12:07:25.118833 USB3 port 2: enabled 0
1764 12:07:25.122238 USB3 port 3: enabled 0
1765 12:07:25.125675 USB2 port 0: enabled 0
1766 12:07:25.128483 USB2 port 1: enabled 1
1767 12:07:25.128568 USB2 port 2: enabled 1
1768 12:07:25.131744 USB2 port 3: enabled 0
1769 12:07:25.135416 USB2 port 4: enabled 1
1770 12:07:25.135500 USB2 port 5: enabled 0
1771 12:07:25.138995 USB2 port 6: enabled 0
1772 12:07:25.142008 USB2 port 7: enabled 0
1773 12:07:25.142093 USB2 port 8: enabled 0
1774 12:07:25.145317
1775 12:07:25.145402 USB2 port 9: enabled 0
1776 12:07:25.148479 USB3 port 0: enabled 0
1777 12:07:25.151949 USB3 port 1: enabled 1
1778 12:07:25.152034 USB3 port 2: enabled 0
1779 12:07:25.155010 USB3 port 3: enabled 0
1780 12:07:25.158506 GENERIC: 0.0: enabled 1
1781 12:07:25.158592 GENERIC: 1.0: enabled 1
1782 12:07:25.162311
1783 12:07:25.162396 APIC: 01: enabled 1
1784 12:07:25.165683 APIC: 02: enabled 1
1785 12:07:25.165773 APIC: 05: enabled 1
1786 12:07:25.168527 APIC: 07: enabled 1
1787 12:07:25.171604 APIC: 06: enabled 1
1788 12:07:25.171689 APIC: 03: enabled 1
1789 12:07:25.174950 APIC: 04: enabled 1
1790 12:07:25.178359 PCI: 01:00.0: enabled 1
1791 12:07:25.181948 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1792 12:07:25.188321 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1793 12:07:25.191881 ELOG: NV offset 0xf30000 size 0x1000
1794 12:07:25.198664 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1795 12:07:25.205395 ELOG: Event(17) added with size 13 at 2023-01-24 12:07:25 UTC
1796 12:07:25.211539 ELOG: Event(92) added with size 9 at 2023-01-24 12:07:25 UTC
1797 12:07:25.218195 ELOG: Event(93) added with size 9 at 2023-01-24 12:07:25 UTC
1798 12:07:25.224833 ELOG: Event(9E) added with size 10 at 2023-01-24 12:07:25 UTC
1799 12:07:25.231700 ELOG: Event(9F) added with size 14 at 2023-01-24 12:07:25 UTC
1800 12:07:25.234688 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1801 12:07:25.241358 ELOG: Event(A1) added with size 10 at 2023-01-24 12:07:25 UTC
1802 12:07:25.251228 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1803 12:07:25.257995 ELOG: Event(A0) added with size 9 at 2023-01-24 12:07:25 UTC
1804 12:07:25.261222 elog_add_boot_reason: Logged dev mode boot
1805 12:07:25.267957 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1806 12:07:25.268044 Finalize devices...
1807 12:07:25.271178 Devices finalized
1808 12:07:25.274609 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1809 12:07:25.281958 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1810 12:07:25.288511 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1811 12:07:25.291445 ME: HFSTS1 : 0x80030055
1812 12:07:25.294817 ME: HFSTS2 : 0x30280116
1813 12:07:25.301263 ME: HFSTS3 : 0x00000050
1814 12:07:25.304699 ME: HFSTS4 : 0x00004000
1815 12:07:25.308037 ME: HFSTS5 : 0x00000000
1816 12:07:25.314656 ME: HFSTS6 : 0x00400006
1817 12:07:25.317983 ME: Manufacturing Mode : YES
1818 12:07:25.321387 ME: SPI Protection Mode Enabled : NO
1819 12:07:25.324834 ME: FW Partition Table : OK
1820 12:07:25.327903 ME: Bringup Loader Failure : NO
1821 12:07:25.331307 ME: Firmware Init Complete : NO
1822 12:07:25.337840 ME: Boot Options Present : NO
1823 12:07:25.341689 ME: Update In Progress : NO
1824 12:07:25.344789 ME: D0i3 Support : YES
1825 12:07:25.348073 ME: Low Power State Enabled : NO
1826 12:07:25.351283 ME: CPU Replaced : YES
1827 12:07:25.354377 ME: CPU Replacement Valid : YES
1828 12:07:25.358077 ME: Current Working State : 5
1829 12:07:25.361379 ME: Current Operation State : 1
1830 12:07:25.364833 ME: Current Operation Mode : 3
1831 12:07:25.371272 ME: Error Code : 0
1832 12:07:25.374793 ME: Enhanced Debug Mode : NO
1833 12:07:25.377889 ME: CPU Debug Disabled : YES
1834 12:07:25.381313 ME: TXT Support : NO
1835 12:07:25.387824 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1836 12:07:25.394382 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1837 12:07:25.397761 CBFS: 'fallback/slic' not found.
1838 12:07:25.401081 ACPI: Writing ACPI tables at 76b01000.
1839 12:07:25.404250 ACPI: * FACS
1840 12:07:25.404336 ACPI: * DSDT
1841 12:07:25.407793 Ramoops buffer: 0x100000@0x76a00000.
1842 12:07:25.414368 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1843 12:07:25.417578 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1844 12:07:25.421844 Google Chrome EC: version:
1845 12:07:25.425682 ro: voema_v2.0.7540-147f8d37d1
1846 12:07:25.428743 rw: voema_v2.0.7540-147f8d37d1
1847 12:07:25.431750 running image: 2
1848 12:07:25.438982 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1849 12:07:25.441787 ACPI: * FADT
1850 12:07:25.441873 SCI is IRQ9
1851 12:07:25.445199 ACPI: added table 1/32, length now 40
1852 12:07:25.448706 ACPI: * SSDT
1853 12:07:25.451976 Found 1 CPU(s) with 8 core(s) each.
1854 12:07:25.455309 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1855 12:07:25.462254 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1856 12:07:25.464875 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1857 12:07:25.468043 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1858 12:07:25.475042 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1859 12:07:25.481361 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1860 12:07:25.485024 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1861 12:07:25.491395 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1862 12:07:25.498290 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1863 12:07:25.501364 \_SB.PCI0.RP09: Added StorageD3Enable property
1864 12:07:25.504633 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1865 12:07:25.511453 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1866 12:07:25.518083 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1867 12:07:25.521446 PS2K: Passing 80 keymaps to kernel
1868 12:07:25.527930 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1869 12:07:25.534517 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1870 12:07:25.541061 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1871 12:07:25.547803 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1872 12:07:25.554531 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1873 12:07:25.560950 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1874 12:07:25.564568 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1875 12:07:25.567644
1876 12:07:25.570632 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1877 12:07:25.574212
1878 12:07:25.577652 ACPI: added table 2/32, length now 44
1879 12:07:25.577744 ACPI: * MCFG
1880 12:07:25.581219 ACPI: added table 3/32, length now 48
1881 12:07:25.584060 ACPI: * TPM2
1882 12:07:25.587488 TPM2 log created at 0x769f0000
1883 12:07:25.590742 ACPI: added table 4/32, length now 52
1884 12:07:25.590830 ACPI: * MADT
1885 12:07:25.594245 SCI is IRQ9
1886 12:07:25.597860 ACPI: added table 5/32, length now 56
1887 12:07:25.597946 current = 76b09850
1888 12:07:25.600991
1889 12:07:25.601079 ACPI: * DMAR
1890 12:07:25.604034 ACPI: added table 6/32, length now 60
1891 12:07:25.607197 ACPI: added table 7/32, length now 64
1892 12:07:25.610833 ACPI: * HPET
1893 12:07:25.613978 ACPI: added table 8/32, length now 68
1894 12:07:25.614066 ACPI: done.
1895 12:07:25.617191 ACPI tables: 35216 bytes.
1896 12:07:25.621000 smbios_write_tables: 769ef000
1897 12:07:25.624383 EC returned error result code 3
1898 12:07:25.627286 Couldn't obtain OEM name from CBI
1899 12:07:25.630482 Create SMBIOS type 16
1900 12:07:25.634058 Create SMBIOS type 17
1901 12:07:25.634144 GENERIC: 0.0 (WIFI Device)
1902 12:07:25.637402 SMBIOS tables: 1750 bytes.
1903 12:07:25.643693 Writing table forward entry at 0x00000500
1904 12:07:25.647006 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1905 12:07:25.653824 Writing coreboot table at 0x76b25000
1906 12:07:25.657256 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1907 12:07:25.663739 1. 0000000000001000-000000000009ffff: RAM
1908 12:07:25.666858 2. 00000000000a0000-00000000000fffff: RESERVED
1909 12:07:25.670815 3. 0000000000100000-00000000769eefff: RAM
1910 12:07:25.676957 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1911 12:07:25.683612 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1912 12:07:25.687275 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1913 12:07:25.693610 7. 0000000077000000-000000007fbfffff: RESERVED
1914 12:07:25.696892 8. 00000000c0000000-00000000cfffffff: RESERVED
1915 12:07:25.703513 9. 00000000f8000000-00000000f9ffffff: RESERVED
1916 12:07:25.706966 10. 00000000fb000000-00000000fb000fff: RESERVED
1917 12:07:25.713408 11. 00000000fe000000-00000000fe00ffff: RESERVED
1918 12:07:25.717034 12. 00000000fed80000-00000000fed87fff: RESERVED
1919 12:07:25.720001 13. 00000000fed90000-00000000fed92fff: RESERVED
1920 12:07:25.723882
1921 12:07:25.726885 14. 00000000feda0000-00000000feda1fff: RESERVED
1922 12:07:25.730042 15. 00000000fedc0000-00000000feddffff: RESERVED
1923 12:07:25.736856 16. 0000000100000000-00000002803fffff: RAM
1924 12:07:25.740140 Passing 4 GPIOs to payload:
1925 12:07:25.743376 NAME | PORT | POLARITY | VALUE
1926 12:07:25.750500 lid | undefined | high | high
1927 12:07:25.753358 power | undefined | high | low
1928 12:07:25.759961 oprom | undefined | high | low
1929 12:07:25.763500 EC in RW | 0x000000e5 | high | high
1930 12:07:25.766303
1931 12:07:25.769662 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 9395
1932 12:07:25.772919 coreboot table: 1576 bytes.
1933 12:07:25.776323 IMD ROOT 0. 0x76fff000 0x00001000
1934 12:07:25.783117 IMD SMALL 1. 0x76ffe000 0x00001000
1935 12:07:25.786496 FSP MEMORY 2. 0x76c4e000 0x003b0000
1936 12:07:25.789699 VPD 3. 0x76c4d000 0x00000367
1937 12:07:25.793106 RO MCACHE 4. 0x76c4c000 0x00000fdc
1938 12:07:25.796380 CONSOLE 5. 0x76c2c000 0x00020000
1939 12:07:25.800327 FMAP 6. 0x76c2b000 0x00000578
1940 12:07:25.803201 TIME STAMP 7. 0x76c2a000 0x00000910
1941 12:07:25.806556 VBOOT WORK 8. 0x76c16000 0x00014000
1942 12:07:25.809595 ROMSTG STCK 9. 0x76c15000 0x00001000
1943 12:07:25.816504 AFTER CAR 10. 0x76c0a000 0x0000b000
1944 12:07:25.820163 RAMSTAGE 11. 0x76b97000 0x00073000
1945 12:07:25.823118 REFCODE 12. 0x76b42000 0x00055000
1946 12:07:25.826286 SMM BACKUP 13. 0x76b32000 0x00010000
1947 12:07:25.830150 4f444749 14. 0x76b30000 0x00002000
1948 12:07:25.833239 EXT VBT15. 0x76b2d000 0x0000219f
1949 12:07:25.836621 COREBOOT 16. 0x76b25000 0x00008000
1950 12:07:25.839938 ACPI 17. 0x76b01000 0x00024000
1951 12:07:25.843491 ACPI GNVS 18. 0x76b00000 0x00001000
1952 12:07:25.849885 RAMOOPS 19. 0x76a00000 0x00100000
1953 12:07:25.853156 TPM2 TCGLOG20. 0x769f0000 0x00010000
1954 12:07:25.856728 SMBIOS 21. 0x769ef000 0x00000800
1955 12:07:25.856812 IMD small region:
1956 12:07:25.859631 IMD ROOT 0. 0x76ffec00 0x00000400
1957 12:07:25.862949
1958 12:07:25.866595 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1959 12:07:25.869663 POWER STATE 2. 0x76ffeb80 0x00000044
1960 12:07:25.873345 ROMSTAGE 3. 0x76ffeb60 0x00000004
1961 12:07:25.876720 MEM INFO 4. 0x76ffe980 0x000001e0
1962 12:07:25.883113 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1963 12:07:25.886265 MTRR: Physical address space:
1964 12:07:25.893190 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1965 12:07:25.899714 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1966 12:07:25.906658 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1967 12:07:25.909611 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1968 12:07:25.916364 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1969 12:07:25.923154 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1970 12:07:25.929512 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1971 12:07:25.932658 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 12:07:25.939548 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 12:07:25.942666 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 12:07:25.946179 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 12:07:25.949262 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 12:07:25.952656 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 12:07:25.956317
1978 12:07:25.959351 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 12:07:25.962623 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 12:07:25.966065 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 12:07:25.969206 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 12:07:25.975996 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 12:07:25.979172 call enable_fixed_mtrr()
1984 12:07:25.982729 CPU physical address size: 39 bits
1985 12:07:25.986012 MTRR: default type WB/UC MTRR counts: 6/6.
1986 12:07:25.989132 MTRR: UC selected as default type.
1987 12:07:25.995939 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1988 12:07:26.002417 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1989 12:07:26.009136 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1990 12:07:26.015743 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1991 12:07:26.022617 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1992 12:07:26.026251 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1993 12:07:26.029033
1994 12:07:26.029117
1995 12:07:26.029183 MTRR check
1996 12:07:26.032574 Fixed MTRRs : Enabled
1997 12:07:26.035634 Variable MTRRs: Enabled
1998 12:07:26.035719
1999 12:07:26.038980 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 12:07:26.042322 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 12:07:26.049086 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 12:07:26.052244 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 12:07:26.056033 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 12:07:26.058959 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 12:07:26.062788 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 12:07:26.065461
2007 12:07:26.068764 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 12:07:26.072357 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 12:07:26.075650 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 12:07:26.079111 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 12:07:26.088776 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2012 12:07:26.088862 call enable_fixed_mtrr()
2013 12:07:26.092513 Checking cr50 for pending updates
2014 12:07:26.096146 CPU physical address size: 39 bits
2015 12:07:26.099519 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 12:07:26.106552 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 12:07:26.110442 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 12:07:26.112762 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 12:07:26.116119 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 12:07:26.123043 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 12:07:26.126217 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 12:07:26.129423 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 12:07:26.132759 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 12:07:26.139464 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 12:07:26.142554 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 12:07:26.146275 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 12:07:26.152686 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 12:07:26.152772 call enable_fixed_mtrr()
2029 12:07:26.159447 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 12:07:26.162609 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 12:07:26.166259 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 12:07:26.169186 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 12:07:26.172983 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 12:07:26.179147 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 12:07:26.182516 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 12:07:26.185851 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 12:07:26.189157 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 12:07:26.193407 CPU physical address size: 39 bits
2039 12:07:26.200080 call enable_fixed_mtrr()
2040 12:07:26.203473 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 12:07:26.206864 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 12:07:26.210294 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 12:07:26.213514 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 12:07:26.216600
2045 12:07:26.220046 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 12:07:26.223506 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 12:07:26.227213 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 12:07:26.230206 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 12:07:26.236748 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 12:07:26.240116 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 12:07:26.243224 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 12:07:26.246561 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 12:07:26.254138 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 12:07:26.257353 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 12:07:26.260920 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 12:07:26.264139 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 12:07:26.270600 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 12:07:26.273952 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 12:07:26.277241 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 12:07:26.280670 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 12:07:26.287436 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 12:07:26.290630 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 12:07:26.294361 call enable_fixed_mtrr()
2064 12:07:26.297689 call enable_fixed_mtrr()
2065 12:07:26.297776 Reading cr50 TPM mode
2066 12:07:26.301479 CPU physical address size: 39 bits
2067 12:07:26.305187 CPU physical address size: 39 bits
2068 12:07:26.311380 BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms
2069 12:07:26.314889 MTRR: Fixed MSR 0x250 0x0606060606060606
2070 12:07:26.317997
2071 12:07:26.321322 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 12:07:26.324967 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 12:07:26.328061 MTRR: Fixed MSR 0x259 0x0000000000000000
2074 12:07:26.331369 MTRR: Fixed MSR 0x268 0x0606060606060606
2075 12:07:26.337947 MTRR: Fixed MSR 0x269 0x0606060606060606
2076 12:07:26.341428 MTRR: Fixed MSR 0x26a 0x0606060606060606
2077 12:07:26.344790 MTRR: Fixed MSR 0x26b 0x0606060606060606
2078 12:07:26.347833 MTRR: Fixed MSR 0x26c 0x0606060606060606
2079 12:07:26.354554 MTRR: Fixed MSR 0x26d 0x0606060606060606
2080 12:07:26.357811 MTRR: Fixed MSR 0x26e 0x0606060606060606
2081 12:07:26.361460 MTRR: Fixed MSR 0x26f 0x0606060606060606
2082 12:07:26.368008 MTRR: Fixed MSR 0x258 0x0606060606060606
2083 12:07:26.368094 call enable_fixed_mtrr()
2084 12:07:26.374338 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 12:07:26.377714 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 12:07:26.381429 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 12:07:26.384535 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 12:07:26.391465 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 12:07:26.394463 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 12:07:26.397706 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 12:07:26.401057 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 12:07:26.404503 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 12:07:26.407732
2094 12:07:26.411054 CPU physical address size: 39 bits
2095 12:07:26.414661 call enable_fixed_mtrr()
2096 12:07:26.417804 CPU physical address size: 39 bits
2097 12:07:26.424446 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2098 12:07:26.427588 CPU physical address size: 39 bits
2099 12:07:26.434647 Checking segment from ROM address 0xffc02b38
2100 12:07:26.437722 Checking segment from ROM address 0xffc02b54
2101 12:07:26.440988 Loading segment from ROM address 0xffc02b38
2102 12:07:26.444649 code (compression=0)
2103 12:07:26.454376 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2104 12:07:26.460816 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2105 12:07:26.464471 it's not compressed!
2106 12:07:26.602832 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2107 12:07:26.609668 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2108 12:07:26.616140 Loading segment from ROM address 0xffc02b54
2109 12:07:26.616231 Entry Point 0x30000000
2110 12:07:26.619712 Loaded segments
2111 12:07:26.626108 BS: BS_PAYLOAD_LOAD run times (exec / console): 244 / 63 ms
2112 12:07:26.668883 Finalizing chipset.
2113 12:07:26.672395 Finalizing SMM.
2114 12:07:26.672481 APMC done.
2115 12:07:26.679113 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2116 12:07:26.682575 mp_park_aps done after 0 msecs.
2117 12:07:26.685882 Jumping to boot code at 0x30000000(0x76b25000)
2118 12:07:26.695385 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2119 12:07:26.695472
2120 12:07:26.695540
2121 12:07:26.695602
2122 12:07:26.698792 Starting depthcharge on Voema...
2123 12:07:26.698878
2124 12:07:26.699225 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2125 12:07:26.699332 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2126 12:07:26.699419 Setting prompt string to ['volteer:']
2127 12:07:26.699499 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2128 12:07:26.709034 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2129 12:07:26.709121
2130 12:07:26.715595 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2131 12:07:26.715682
2132 12:07:26.718883 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2133 12:07:26.718970
2134 12:07:26.723134 Failed to find eMMC card reader
2135 12:07:26.723221
2136 12:07:26.726197 Wipe memory regions:
2137 12:07:26.726283
2138 12:07:26.729451 [0x00000000001000, 0x000000000a0000)
2139 12:07:26.729577
2140 12:07:26.732803 [0x00000000100000, 0x00000030000000)
2141 12:07:26.732891
2142 12:07:26.763663 [0x00000032662db0, 0x000000769ef000)
2143 12:07:26.763750
2144 12:07:26.801841 [0x00000100000000, 0x00000280400000)
2145 12:07:26.801934
2146 12:07:27.005293 ec_init: CrosEC protocol v3 supported (256, 256)
2147 12:07:27.005440
2148 12:07:27.012112 update_port_state: port C0 state: usb enable 1 mux conn 0
2149 12:07:27.012238
2150 12:07:27.018457 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2151 12:07:27.018545
2152 12:07:27.026779 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2153 12:07:27.026865
2154 12:07:27.029799 send_conn_disc_msg: pmc_send_cmd succeeded
2155 12:07:27.029885
2156 12:07:27.463624 R8152: Initializing
2157 12:07:27.463760
2158 12:07:27.466799 Version 9 (ocp_data = 6010)
2159 12:07:27.466887
2160 12:07:27.470349 R8152: Done initializing
2161 12:07:27.470435
2162 12:07:27.473321 Adding net device
2163 12:07:27.473408
2164 12:07:27.778408 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2165 12:07:27.778541
2166 12:07:27.778612
2167 12:07:27.778676
2168 12:07:27.781559 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2170 12:07:27.882316 volteer: tftpboot 192.168.201.1 8853713/tftp-deploy-o0dl1m3r/kernel/bzImage 8853713/tftp-deploy-o0dl1m3r/kernel/cmdline 8853713/tftp-deploy-o0dl1m3r/ramdisk/ramdisk.cpio.gz
2171 12:07:27.882494 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 12:07:27.882596 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2173 12:07:27.886748 tftpboot 192.168.201.1 8853713/tftp-deploy-o0dl1m3r/kernel/bzImaoy-o0dl1m3r/kernel/cmdline 8853713/tftp-deploy-o0dl1m3r/ramdisk/ramdisk.cpio.gz
2174 12:07:27.886838
2175 12:07:27.886906 Waiting for link
2176 12:07:27.886968
2177 12:07:28.091004 done.
2178 12:07:28.091139
2179 12:07:28.091210 MAC: 00:e0:4c:71:a6:42
2180 12:07:28.091276
2181 12:07:28.093746 Sending DHCP discover... done.
2182 12:07:28.093834
2183 12:07:28.096798 Waiting for reply... done.
2184 12:07:28.096885
2185 12:07:28.100258 Sending DHCP request... done.
2186 12:07:28.100345
2187 12:07:28.103610 Waiting for reply... done.
2188 12:07:28.103706
2189 12:07:28.107021 My ip is 192.168.201.18
2190 12:07:28.107108
2191 12:07:28.110177 The DHCP server ip is 192.168.201.1
2192 12:07:28.110263
2193 12:07:28.116693 TFTP server IP predefined by user: 192.168.201.1
2194 12:07:28.116781
2195 12:07:28.123492 Bootfile predefined by user: 8853713/tftp-deploy-o0dl1m3r/kernel/bzImage
2196 12:07:28.123579
2197 12:07:28.126916 Sending tftp read request... done.
2198 12:07:28.127003
2199 12:07:28.129660 Waiting for the transfer...
2200 12:07:28.129747
2201 12:07:28.400358 00000000 ################################################################
2202 12:07:28.400500
2203 12:07:28.660998 00080000 ################################################################
2204 12:07:28.661135
2205 12:07:28.921699 00100000 ################################################################
2206 12:07:28.921837
2207 12:07:29.175574 00180000 ################################################################
2208 12:07:29.175710
2209 12:07:29.416382 00200000 ################################################################
2210 12:07:29.416517
2211 12:07:29.689878 00280000 ################################################################
2212 12:07:29.690025
2213 12:07:29.957708 00300000 ################################################################
2214 12:07:29.957846
2215 12:07:30.220510 00380000 ################################################################
2216 12:07:30.220648
2217 12:07:30.502299 00400000 ################################################################
2218 12:07:30.502440
2219 12:07:30.774673 00480000 ################################################################
2220 12:07:30.774811
2221 12:07:31.028465 00500000 ################################################################
2222 12:07:31.028606
2223 12:07:31.278346 00580000 ################################################################
2224 12:07:31.278491
2225 12:07:31.540921 00600000 ################################################################
2226 12:07:31.541058
2227 12:07:31.829851 00680000 ################################################################
2228 12:07:31.829995
2229 12:07:32.104488 00700000 ################################################################
2230 12:07:32.104628
2231 12:07:32.347731 00780000 ################################################################
2232 12:07:32.347889
2233 12:07:32.612494 00800000 ################################################################
2234 12:07:32.612637
2235 12:07:32.861633 00880000 ################################################################
2236 12:07:32.861772
2237 12:07:32.995630 00900000 ################################## done.
2238 12:07:32.995760
2239 12:07:32.998893 The bootfile was 9707520 bytes long.
2240 12:07:32.998982
2241 12:07:33.002428 Sending tftp read request... done.
2242 12:07:33.002516
2243 12:07:33.005622 Waiting for the transfer...
2244 12:07:33.005709
2245 12:07:33.261432 00000000 ################################################################
2246 12:07:33.261642
2247 12:07:33.536182 00080000 ################################################################
2248 12:07:33.536326
2249 12:07:33.806561 00100000 ################################################################
2250 12:07:33.806690
2251 12:07:34.075380 00180000 ################################################################
2252 12:07:34.075510
2253 12:07:34.343476 00200000 ################################################################
2254 12:07:34.343631
2255 12:07:34.634592 00280000 ################################################################
2256 12:07:34.634751
2257 12:07:34.898322 00300000 ################################################################
2258 12:07:34.898454
2259 12:07:35.138897 00380000 ################################################################
2260 12:07:35.139037
2261 12:07:35.385402 00400000 ################################################################
2262 12:07:35.385568
2263 12:07:35.659096 00480000 ################################################################
2264 12:07:35.659257
2265 12:07:35.934159 00500000 ################################################################
2266 12:07:35.934304
2267 12:07:36.194524 00580000 ################################################################
2268 12:07:36.194670
2269 12:07:36.477732 00600000 ################################################################
2270 12:07:36.477884
2271 12:07:36.730843 00680000 ################################################################
2272 12:07:36.730988
2273 12:07:37.016034 00700000 ################################################################
2274 12:07:37.016179
2275 12:07:37.296697 00780000 ################################################################
2276 12:07:37.296852
2277 12:07:37.557490 00800000 ################################################################
2278 12:07:37.557631
2279 12:07:37.824670 00880000 ################################################################
2280 12:07:37.824816
2281 12:07:38.070536 00900000 ################################################################
2282 12:07:38.070673
2283 12:07:38.334456 00980000 ################################################################
2284 12:07:38.334599
2285 12:07:38.616131 00a00000 ################################################################
2286 12:07:38.616271
2287 12:07:38.862613 00a80000 ################################################################
2288 12:07:38.862753
2289 12:07:39.106305 00b00000 ################################################################
2290 12:07:39.106436
2291 12:07:39.351538 00b80000 ################################################################
2292 12:07:39.351699
2293 12:07:39.597915 00c00000 ################################################################
2294 12:07:39.598065
2295 12:07:39.843021 00c80000 ################################################################
2296 12:07:39.843163
2297 12:07:40.089822 00d00000 ################################################################
2298 12:07:40.089982
2299 12:07:40.332032 00d80000 ################################################################
2300 12:07:40.332176
2301 12:07:40.594425 00e00000 ################################################################
2302 12:07:40.594572
2303 12:07:40.850647 00e80000 ################################################################
2304 12:07:40.850788
2305 12:07:41.133248 00f00000 ################################################################
2306 12:07:41.133395
2307 12:07:41.408234 00f80000 ################################################################
2308 12:07:41.408372
2309 12:07:41.685036 01000000 ################################################################
2310 12:07:41.685182
2311 12:07:41.961678 01080000 ################################################################
2312 12:07:41.961811
2313 12:07:42.233361 01100000 ################################################################
2314 12:07:42.233547
2315 12:07:42.500182 01180000 ################################################################
2316 12:07:42.500312
2317 12:07:42.775689 01200000 ################################################################
2318 12:07:42.775833
2319 12:07:43.033262 01280000 ################################################################
2320 12:07:43.033399
2321 12:07:43.306045 01300000 ################################################################
2322 12:07:43.306188
2323 12:07:43.564270 01380000 ################################################################
2324 12:07:43.564423
2325 12:07:43.846319 01400000 ################################################################
2326 12:07:43.846464
2327 12:07:44.104103 01480000 ################################################################
2328 12:07:44.104243
2329 12:07:44.360704 01500000 ################################################################
2330 12:07:44.360845
2331 12:07:44.625895 01580000 ################################################################
2332 12:07:44.626037
2333 12:07:44.865860 01600000 ################################################################
2334 12:07:44.865993
2335 12:07:45.105536 01680000 ################################################################
2336 12:07:45.105679
2337 12:07:45.382131 01700000 ################################################################
2338 12:07:45.382270
2339 12:07:45.663149 01780000 ################################################################
2340 12:07:45.663291
2341 12:07:45.914993 01800000 ################################################################
2342 12:07:45.915127
2343 12:07:46.173752 01880000 ################################################################
2344 12:07:46.173887
2345 12:07:46.425765 01900000 ################################################################
2346 12:07:46.425899
2347 12:07:46.685800 01980000 ################################################################
2348 12:07:46.685945
2349 12:07:46.958835 01a00000 ################################################################
2350 12:07:46.958975
2351 12:07:47.234689 01a80000 ################################################################
2352 12:07:47.234827
2353 12:07:47.480310 01b00000 ################################################################
2354 12:07:47.480444
2355 12:07:47.735130 01b80000 ################################################################
2356 12:07:47.735270
2357 12:07:48.019622 01c00000 ################################################################
2358 12:07:48.019760
2359 12:07:48.270062 01c80000 ################################################################
2360 12:07:48.270199
2361 12:07:48.508615 01d00000 ################################################################
2362 12:07:48.508752
2363 12:07:48.780453 01d80000 ################################################################
2364 12:07:48.780593
2365 12:07:49.057523 01e00000 ################################################################
2366 12:07:49.057659
2367 12:07:49.328233 01e80000 ################################################################
2368 12:07:49.328375
2369 12:07:49.600034 01f00000 ################################################################
2370 12:07:49.600172
2371 12:07:49.854005 01f80000 ################################################################
2372 12:07:49.854142
2373 12:07:50.114185 02000000 ################################################################
2374 12:07:50.114322
2375 12:07:50.371531 02080000 ################################################################
2376 12:07:50.371671
2377 12:07:50.609897 02100000 ################################################################
2378 12:07:50.610034
2379 12:07:50.855547 02180000 ################################################################
2380 12:07:50.855682
2381 12:07:50.945713 02200000 ##################### done.
2382 12:07:50.945853
2383 12:07:50.949370 Sending tftp read request... done.
2384 12:07:50.949462
2385 12:07:50.952688 Waiting for the transfer...
2386 12:07:50.952772
2387 12:07:50.952856 00000000 # done.
2388 12:07:50.952923
2389 12:07:50.962595 Command line loaded dynamically from TFTP file: 8853713/tftp-deploy-o0dl1m3r/kernel/cmdline
2390 12:07:50.962696
2391 12:07:50.975664 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2392 12:07:50.975792
2393 12:07:50.985257 Shutting down all USB controllers.
2394 12:07:50.985410
2395 12:07:50.985540 Removing current net device
2396 12:07:50.985668
2397 12:07:50.988673 Finalizing coreboot
2398 12:07:50.988835
2399 12:07:50.995195 Exiting depthcharge with code 4 at timestamp: 32947933
2400 12:07:50.995382
2401 12:07:50.995564
2402 12:07:50.995714 Starting kernel ...
2403 12:07:50.995849
2404 12:07:50.996007
2405 12:07:50.996142
2406 12:07:50.996886 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2407 12:07:50.997157 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2408 12:07:50.997350 Setting prompt string to ['Linux version [0-9]']
2409 12:07:50.997563 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2410 12:07:50.997768 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2412 12:12:10.998107 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2414 12:12:11.000186 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2416 12:12:11.001146 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2419 12:12:11.002102 end: 2 depthcharge-action (duration 00:05:00) [common]
2421 12:12:11.002323 Cleaning after the job
2422 12:12:11.002410 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853713/tftp-deploy-o0dl1m3r/ramdisk
2423 12:12:11.004585 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853713/tftp-deploy-o0dl1m3r/kernel
2424 12:12:11.005249 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853713/tftp-deploy-o0dl1m3r/modules
2425 12:12:11.005439 start: 4.1 power-off (timeout 00:00:30) [common]
2426 12:12:11.005663 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2427 12:12:11.024849 >> Command sent successfully.
2428 12:12:11.026787 Returned 0 in 0 seconds
2429 12:12:11.127752 end: 4.1 power-off (duration 00:00:00) [common]
2431 12:12:11.129570 start: 4.2 read-feedback (timeout 00:10:00) [common]
2432 12:12:11.130841 Listened to connection for namespace 'common' for up to 1s
2433 12:12:12.133599 Finalising connection for namespace 'common'
2434 12:12:12.133812 Disconnecting from shell: Finalise
2435 12:12:12.234880 end: 4.2 read-feedback (duration 00:00:01) [common]
2436 12:12:12.235543 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8853713
2437 12:12:12.263517 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8853713
2438 12:12:12.263704 JobError: Your job cannot terminate cleanly.