Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:07:02.662784 lava-dispatcher, installed at version: 2022.11
2 12:07:02.662966 start: 0 validate
3 12:07:02.663096 Start time: 2023-01-24 12:07:02.663089+00:00 (UTC)
4 12:07:02.663223 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:07:02.663350 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
6 12:07:02.683127 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:07:02.683325 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:07:02.698364 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:07:02.698549 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:07:02.709023 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:07:02.709214 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:07:02.728049 validate duration: 0.06
14 12:07:02.729414 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:07:02.730111 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:07:02.730637 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:07:02.731154 Not decompressing ramdisk as can be used compressed.
18 12:07:02.731643 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230120.0/amd64/initrd.cpio.gz
19 12:07:02.732024 saving as /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/ramdisk/initrd.cpio.gz
20 12:07:02.732534 total size: 5432102 (5MB)
21 12:07:02.842251 progress 0% (0MB)
22 12:07:02.915543 progress 5% (0MB)
23 12:07:02.968865 progress 10% (0MB)
24 12:07:03.013159 progress 15% (0MB)
25 12:07:03.054048 progress 20% (1MB)
26 12:07:03.100070 progress 25% (1MB)
27 12:07:03.137426 progress 30% (1MB)
28 12:07:03.175067 progress 35% (1MB)
29 12:07:03.210708 progress 40% (2MB)
30 12:07:03.252844 progress 45% (2MB)
31 12:07:03.288598 progress 50% (2MB)
32 12:07:03.323940 progress 55% (2MB)
33 12:07:03.358553 progress 60% (3MB)
34 12:07:03.394400 progress 65% (3MB)
35 12:07:03.438415 progress 70% (3MB)
36 12:07:03.474405 progress 75% (3MB)
37 12:07:03.503178 progress 80% (4MB)
38 12:07:03.546601 progress 85% (4MB)
39 12:07:03.597522 progress 90% (4MB)
40 12:07:03.633138 progress 95% (4MB)
41 12:07:03.660206 progress 100% (5MB)
42 12:07:03.661786 5MB downloaded in 0.93s (5.57MB/s)
43 12:07:03.662599 end: 1.1.1 http-download (duration 00:00:01) [common]
45 12:07:03.664071 end: 1.1 download-retry (duration 00:00:01) [common]
46 12:07:03.664593 start: 1.2 download-retry (timeout 00:09:59) [common]
47 12:07:03.665103 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 12:07:03.665687 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:07:03.666096 saving as /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/kernel/bzImage
50 12:07:03.666461 total size: 9707520 (9MB)
51 12:07:03.666817 No compression specified
52 12:07:03.681350 progress 0% (0MB)
53 12:07:03.708935 progress 5% (0MB)
54 12:07:03.732679 progress 10% (0MB)
55 12:07:03.761239 progress 15% (1MB)
56 12:07:03.787949 progress 20% (1MB)
57 12:07:03.810889 progress 25% (2MB)
58 12:07:03.830433 progress 30% (2MB)
59 12:07:03.856108 progress 35% (3MB)
60 12:07:03.879753 progress 40% (3MB)
61 12:07:03.898966 progress 45% (4MB)
62 12:07:03.918080 progress 50% (4MB)
63 12:07:03.934798 progress 55% (5MB)
64 12:07:03.955079 progress 60% (5MB)
65 12:07:03.973584 progress 65% (6MB)
66 12:07:03.990562 progress 70% (6MB)
67 12:07:04.009817 progress 75% (6MB)
68 12:07:04.029530 progress 80% (7MB)
69 12:07:04.048249 progress 85% (7MB)
70 12:07:04.065973 progress 90% (8MB)
71 12:07:04.084676 progress 95% (8MB)
72 12:07:04.103180 progress 100% (9MB)
73 12:07:04.103414 9MB downloaded in 0.44s (21.19MB/s)
74 12:07:04.103572 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:07:04.103817 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:07:04.103910 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:07:04.104000 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:07:04.104104 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230120.0/amd64/full.rootfs.tar.xz
80 12:07:04.104174 saving as /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/nfsrootfs/full.rootfs.tar
81 12:07:04.104240 total size: 207188056 (197MB)
82 12:07:04.104304 Using unxz to decompress xz
83 12:07:04.148410 progress 0% (0MB)
84 12:07:05.807807 progress 5% (9MB)
85 12:07:07.203826 progress 10% (19MB)
86 12:07:08.535041 progress 15% (29MB)
87 12:07:09.899807 progress 20% (39MB)
88 12:07:11.271352 progress 25% (49MB)
89 12:07:12.469987 progress 30% (59MB)
90 12:07:13.216789 progress 35% (69MB)
91 12:07:13.815211 progress 40% (79MB)
92 12:07:14.378898 progress 45% (88MB)
93 12:07:14.981069 progress 50% (98MB)
94 12:07:15.626321 progress 55% (108MB)
95 12:07:16.334650 progress 60% (118MB)
96 12:07:16.493300 progress 65% (128MB)
97 12:07:16.649271 progress 70% (138MB)
98 12:07:16.747020 progress 75% (148MB)
99 12:07:16.823054 progress 80% (158MB)
100 12:07:16.896462 progress 85% (167MB)
101 12:07:16.997943 progress 90% (177MB)
102 12:07:17.267489 progress 95% (187MB)
103 12:07:17.859229 progress 100% (197MB)
104 12:07:17.865752 197MB downloaded in 13.76s (14.36MB/s)
105 12:07:17.866023 end: 1.3.1 http-download (duration 00:00:14) [common]
107 12:07:17.866298 end: 1.3 download-retry (duration 00:00:14) [common]
108 12:07:17.866393 start: 1.4 download-retry (timeout 00:09:45) [common]
109 12:07:17.866486 start: 1.4.1 http-download (timeout 00:09:45) [common]
110 12:07:17.866604 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:07:17.866678 saving as /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/modules/modules.tar
112 12:07:17.866742 total size: 64588 (0MB)
113 12:07:17.866809 Using unxz to decompress xz
114 12:07:17.871044 progress 50% (0MB)
115 12:07:17.871427 progress 100% (0MB)
116 12:07:17.875588 0MB downloaded in 0.01s (6.97MB/s)
117 12:07:17.875814 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:07:17.876083 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:07:17.876181 start: 1.5 prepare-tftp-overlay (timeout 00:09:45) [common]
121 12:07:17.876278 start: 1.5.1 extract-nfsrootfs (timeout 00:09:45) [common]
122 12:07:19.876143 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8853707/extract-nfsrootfs-yvnbfp90
123 12:07:19.876334 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:07:19.876440 start: 1.5.2 lava-overlay (timeout 00:09:43) [common]
125 12:07:19.876579 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql
126 12:07:19.876681 makedir: /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin
127 12:07:19.876766 makedir: /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/tests
128 12:07:19.876848 makedir: /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/results
129 12:07:19.876946 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-add-keys
130 12:07:19.877076 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-add-sources
131 12:07:19.877191 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-background-process-start
132 12:07:19.877304 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-background-process-stop
133 12:07:19.877415 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-common-functions
134 12:07:19.877706 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-echo-ipv4
135 12:07:19.877822 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-install-packages
136 12:07:19.877934 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-installed-packages
137 12:07:19.878045 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-os-build
138 12:07:19.878156 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-probe-channel
139 12:07:19.878265 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-probe-ip
140 12:07:19.878374 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-target-ip
141 12:07:19.878486 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-target-mac
142 12:07:19.878593 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-target-storage
143 12:07:19.878705 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-test-case
144 12:07:19.878817 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-test-event
145 12:07:19.878926 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-test-feedback
146 12:07:19.879035 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-test-raise
147 12:07:19.879145 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-test-reference
148 12:07:19.879253 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-test-runner
149 12:07:19.879362 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-test-set
150 12:07:19.879470 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-test-shell
151 12:07:19.879580 Updating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-add-keys (debian)
152 12:07:19.879692 Updating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-add-sources (debian)
153 12:07:19.879803 Updating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-install-packages (debian)
154 12:07:19.879913 Updating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-installed-packages (debian)
155 12:07:19.880023 Updating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/bin/lava-os-build (debian)
156 12:07:19.880118 Creating /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/environment
157 12:07:19.880202 LAVA metadata
158 12:07:19.880268 - LAVA_JOB_ID=8853707
159 12:07:19.880330 - LAVA_DISPATCHER_IP=192.168.201.1
160 12:07:19.880427 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:43) [common]
161 12:07:19.880493 skipped lava-vland-overlay
162 12:07:19.880567 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 12:07:19.880647 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:43) [common]
164 12:07:19.880708 skipped lava-multinode-overlay
165 12:07:19.880781 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 12:07:19.880862 start: 1.5.2.3 test-definition (timeout 00:09:43) [common]
167 12:07:19.880933 Loading test definitions
168 12:07:19.881028 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:43) [common]
169 12:07:19.881099 Using /lava-8853707 at stage 0
170 12:07:19.881334 uuid=8853707_1.5.2.3.1 testdef=None
171 12:07:19.881423 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 12:07:19.881547 start: 1.5.2.3.2 test-overlay (timeout 00:09:43) [common]
173 12:07:19.881977 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 12:07:19.882212 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:43) [common]
176 12:07:19.882698 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 12:07:19.882941 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:43) [common]
179 12:07:19.883403 runner path: /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/0/tests/0_timesync-off test_uuid 8853707_1.5.2.3.1
180 12:07:19.883549 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 12:07:19.883784 start: 1.5.2.3.5 git-repo-action (timeout 00:09:43) [common]
183 12:07:19.883858 Using /lava-8853707 at stage 0
184 12:07:19.883953 Fetching tests from https://github.com/kernelci/test-definitions.git
185 12:07:19.884037 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/0/tests/1_kselftest-rtc'
186 12:07:24.535854 Running '/usr/bin/git checkout kernelci.org
187 12:07:24.672260 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
188 12:07:24.673038 uuid=8853707_1.5.2.3.5 testdef=None
189 12:07:24.673198 end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
191 12:07:24.673446 start: 1.5.2.3.6 test-overlay (timeout 00:09:38) [common]
192 12:07:24.674212 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 12:07:24.674450 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:38) [common]
195 12:07:24.675348 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 12:07:24.675653 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:38) [common]
198 12:07:24.676638 runner path: /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/0/tests/1_kselftest-rtc test_uuid 8853707_1.5.2.3.5
199 12:07:24.676729 BOARD='asus-C436FA-Flip-hatch'
200 12:07:24.676797 BRANCH='cip-gitlab'
201 12:07:24.676859 SKIPFILE='skipfile-lkft.yaml'
202 12:07:24.676921 SKIP_INSTALL='True'
203 12:07:24.676980 TESTPROG_URL='None'
204 12:07:24.677038 TST_CASENAME=''
205 12:07:24.677095 TST_CMDFILES='rtc'
206 12:07:24.677224 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
208 12:07:24.677437 Creating lava-test-runner.conf files
209 12:07:24.677547 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853707/lava-overlay-tv4ssrql/lava-8853707/0 for stage 0
210 12:07:24.677650 - 0_timesync-off
211 12:07:24.677716 - 1_kselftest-rtc
212 12:07:24.677807 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
213 12:07:24.677895 start: 1.5.2.4 compress-overlay (timeout 00:09:38) [common]
214 12:07:32.176526 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
215 12:07:32.176685 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:31) [common]
216 12:07:32.176779 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
217 12:07:32.176887 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
218 12:07:32.176980 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:31) [common]
219 12:07:32.279941 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
220 12:07:32.280283 start: 1.5.4 extract-modules (timeout 00:09:30) [common]
221 12:07:32.280394 extracting modules file /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853707/extract-nfsrootfs-yvnbfp90
222 12:07:32.284742 extracting modules file /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853707/extract-overlay-ramdisk-l7bzrxju/ramdisk
223 12:07:32.288514 end: 1.5.4 extract-modules (duration 00:00:00) [common]
224 12:07:32.288627 start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
225 12:07:32.288714 [common] Applying overlay to NFS
226 12:07:32.288801 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853707/compress-overlay-9bo7cres/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8853707/extract-nfsrootfs-yvnbfp90
227 12:07:32.759195 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
228 12:07:32.759363 start: 1.5.6 configure-preseed-file (timeout 00:09:30) [common]
229 12:07:32.759463 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
230 12:07:32.759558 start: 1.5.7 compress-ramdisk (timeout 00:09:30) [common]
231 12:07:32.759654 Building ramdisk /var/lib/lava/dispatcher/tmp/8853707/extract-overlay-ramdisk-l7bzrxju/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8853707/extract-overlay-ramdisk-l7bzrxju/ramdisk
232 12:07:32.793206 >> 24777 blocks
233 12:07:33.261166 rename /var/lib/lava/dispatcher/tmp/8853707/extract-overlay-ramdisk-l7bzrxju/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/ramdisk/ramdisk.cpio.gz
234 12:07:33.261635 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
235 12:07:33.261762 start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
236 12:07:33.261870 start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
237 12:07:33.261969 No mkimage arch provided, not using FIT.
238 12:07:33.262061 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
239 12:07:33.262148 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
240 12:07:33.262252 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
241 12:07:33.262349 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
242 12:07:33.262430 No LXC device requested
243 12:07:33.262515 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
244 12:07:33.262610 start: 1.7 deploy-device-env (timeout 00:09:29) [common]
245 12:07:33.262695 end: 1.7 deploy-device-env (duration 00:00:00) [common]
246 12:07:33.262771 Checking files for TFTP limit of 4294967296 bytes.
247 12:07:33.263147 end: 1 tftp-deploy (duration 00:00:31) [common]
248 12:07:33.263257 start: 2 depthcharge-action (timeout 00:05:00) [common]
249 12:07:33.263354 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
250 12:07:33.263486 substitutions:
251 12:07:33.263558 - {DTB}: None
252 12:07:33.263625 - {INITRD}: 8853707/tftp-deploy-x_5l6max/ramdisk/ramdisk.cpio.gz
253 12:07:33.263688 - {KERNEL}: 8853707/tftp-deploy-x_5l6max/kernel/bzImage
254 12:07:33.263750 - {LAVA_MAC}: None
255 12:07:33.263810 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8853707/extract-nfsrootfs-yvnbfp90
256 12:07:33.263871 - {NFS_SERVER_IP}: 192.168.201.1
257 12:07:33.263930 - {PRESEED_CONFIG}: None
258 12:07:33.263991 - {PRESEED_LOCAL}: None
259 12:07:33.264050 - {RAMDISK}: 8853707/tftp-deploy-x_5l6max/ramdisk/ramdisk.cpio.gz
260 12:07:33.264108 - {ROOT_PART}: None
261 12:07:33.264167 - {ROOT}: None
262 12:07:33.264225 - {SERVER_IP}: 192.168.201.1
263 12:07:33.264283 - {TEE}: None
264 12:07:33.264341 Parsed boot commands:
265 12:07:33.264398 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
266 12:07:33.264556 Parsed boot commands: tftpboot 192.168.201.1 8853707/tftp-deploy-x_5l6max/kernel/bzImage 8853707/tftp-deploy-x_5l6max/kernel/cmdline 8853707/tftp-deploy-x_5l6max/ramdisk/ramdisk.cpio.gz
267 12:07:33.264652 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
268 12:07:33.264742 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
269 12:07:33.264843 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
270 12:07:33.264939 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
271 12:07:33.265014 Not connected, no need to disconnect.
272 12:07:33.265093 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
273 12:07:33.265177 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
274 12:07:33.265247 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
275 12:07:33.267965 Setting prompt string to ['lava-test: # ']
276 12:07:33.268259 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
277 12:07:33.268365 end: 2.2.1 reset-connection (duration 00:00:00) [common]
278 12:07:33.268463 start: 2.2.2 reset-device (timeout 00:05:00) [common]
279 12:07:33.268559 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
280 12:07:33.268740 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
281 12:07:33.288008 >> Command sent successfully.
282 12:07:33.289976 Returned 0 in 0 seconds
283 12:07:33.390726 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
285 12:07:33.391050 end: 2.2.2 reset-device (duration 00:00:00) [common]
286 12:07:33.391159 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
287 12:07:33.391247 Setting prompt string to 'Starting depthcharge on Helios...'
288 12:07:33.391331 Changing prompt to 'Starting depthcharge on Helios...'
289 12:07:33.391403 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
290 12:07:33.391679 [Enter `^Ec?' for help]
291 12:07:40.165322
292 12:07:40.165479
293 12:07:40.176045 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 12:07:40.179253 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 12:07:40.185717 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 12:07:40.189038 CPU: AES supported, TXT NOT supported, VT supported
297 12:07:40.195861 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 12:07:40.198904 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 12:07:40.205581 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 12:07:40.208981 VBOOT: Loading verstage.
301 12:07:40.212274 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 12:07:40.218807 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 12:07:40.222670 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 12:07:40.225412 CBFS @ c08000 size 3f8000
305 12:07:40.232520 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 12:07:40.235368 CBFS: Locating 'fallback/verstage'
307 12:07:40.239336 CBFS: Found @ offset 10fb80 size 1072c
308 12:07:40.239423
309 12:07:40.242492
310 12:07:40.252548 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 12:07:40.266185 Probing TPM: . done!
312 12:07:40.270023 TPM ready after 0 ms
313 12:07:40.273015 Connected to device vid:did:rid of 1ae0:0028:00
314 12:07:40.283204 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
315 12:07:40.286545 Initialized TPM device CR50 revision 0
316 12:07:40.330109 tlcl_send_startup: Startup return code is 0
317 12:07:40.330206 TPM: setup succeeded
318 12:07:40.342971 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 12:07:40.346542 Chrome EC: UHEPI supported
320 12:07:40.350047 Phase 1
321 12:07:40.353440 FMAP: area GBB found @ c05000 (12288 bytes)
322 12:07:40.359990 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
323 12:07:40.360072 Phase 2
324 12:07:40.363537 Phase 3
325 12:07:40.367017 FMAP: area GBB found @ c05000 (12288 bytes)
326 12:07:40.373414 VB2:vb2_report_dev_firmware() This is developer signed firmware
327 12:07:40.380036 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 12:07:40.383212 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
329 12:07:40.389998 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 12:07:40.405620 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 12:07:40.408638 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
332 12:07:40.415569 VB2:vb2_verify_fw_preamble() Verifying preamble.
333 12:07:40.419877 Phase 4
334 12:07:40.423144 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
335 12:07:40.429608 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
336 12:07:40.609384 VB2:vb2_rsa_verify_digest() Digest check failed!
337 12:07:40.612620 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
338 12:07:40.616030
339 12:07:40.616119 Saving nvdata
340 12:07:40.619135 Reboot requested (10020007)
341 12:07:40.622297 board_reset() called!
342 12:07:40.622386 full_reset() called!
343 12:07:45.132309
344 12:07:45.132453
345 12:07:45.142084 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
346 12:07:45.145085 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
347 12:07:45.151856 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
348 12:07:45.155085 CPU: AES supported, TXT NOT supported, VT supported
349 12:07:45.161799 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
350 12:07:45.165077 PCH: device id 0284 (rev 00) is Cometlake-U Premium
351 12:07:45.171699 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
352 12:07:45.175360 VBOOT: Loading verstage.
353 12:07:45.178223 FMAP: Found "FLASH" version 1.1 at 0xc04000.
354 12:07:45.185398 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
355 12:07:45.191817 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
356 12:07:45.191902 CBFS @ c08000 size 3f8000
357 12:07:45.198277 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
358 12:07:45.201751 CBFS: Locating 'fallback/verstage'
359 12:07:45.205209 CBFS: Found @ offset 10fb80 size 1072c
360 12:07:45.209195
361 12:07:45.209283
362 12:07:45.219296 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
363 12:07:45.233414 Probing TPM: . done!
364 12:07:45.236849 TPM ready after 0 ms
365 12:07:45.240700 Connected to device vid:did:rid of 1ae0:0028:00
366 12:07:45.250308 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
367 12:07:45.253712 Initialized TPM device CR50 revision 0
368 12:07:45.297416 tlcl_send_startup: Startup return code is 0
369 12:07:45.297517 TPM: setup succeeded
370 12:07:45.310287 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
371 12:07:45.313629 Chrome EC: UHEPI supported
372 12:07:45.316974 Phase 1
373 12:07:45.320432 FMAP: area GBB found @ c05000 (12288 bytes)
374 12:07:45.327285 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
375 12:07:45.334179 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
376 12:07:45.337384 Recovery requested (1009000e)
377 12:07:45.342634 Saving nvdata
378 12:07:45.349112 tlcl_extend: response is 0
379 12:07:45.358229 tlcl_extend: response is 0
380 12:07:45.364595 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
381 12:07:45.367934 CBFS @ c08000 size 3f8000
382 12:07:45.374865 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
383 12:07:45.378448 CBFS: Locating 'fallback/romstage'
384 12:07:45.381283 CBFS: Found @ offset 80 size 145fc
385 12:07:45.384480 Accumulated console time in verstage 99 ms
386 12:07:45.384557
387 12:07:45.384624
388 12:07:45.397916 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
389 12:07:45.404776 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
390 12:07:45.408318 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
391 12:07:45.411377 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
392 12:07:45.418204 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
393 12:07:45.421017 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
394 12:07:45.424601 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
395 12:07:45.428130 TCO_STS: 0000 0000
396 12:07:45.431209 GEN_PMCON: e0015238 00000200
397 12:07:45.434344 GBLRST_CAUSE: 00000000 00000000
398 12:07:45.434426 prev_sleep_state 5
399 12:07:45.437888 Boot Count incremented to 52411
400 12:07:45.444594 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 12:07:45.448047 CBFS @ c08000 size 3f8000
402 12:07:45.454558 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 12:07:45.454644 CBFS: Locating 'fspm.bin'
404 12:07:45.457605 CBFS: Found @ offset 5ffc0 size 71000
405 12:07:45.461937 Chrome EC: UHEPI supported
406 12:07:45.469134 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
407 12:07:45.474361 Probing TPM: done!
408 12:07:45.481338 Connected to device vid:did:rid of 1ae0:0028:00
409 12:07:45.491051 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
410 12:07:45.497040 Initialized TPM device CR50 revision 0
411 12:07:45.506411 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
412 12:07:45.512451 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
413 12:07:45.515942 MRC cache found, size 1948
414 12:07:45.519272 bootmode is set to: 2
415 12:07:45.522741 PRMRR disabled by config.
416 12:07:45.522827 SPD INDEX = 1
417 12:07:45.529055 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
418 12:07:45.532668 CBFS @ c08000 size 3f8000
419 12:07:45.536050 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
420 12:07:45.539331
421 12:07:45.539419 CBFS: Locating 'spd.bin'
422 12:07:45.542540 CBFS: Found @ offset 5fb80 size 400
423 12:07:45.545686 SPD: module type is LPDDR3
424 12:07:45.549087 SPD: module part is
425 12:07:45.555962 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
426 12:07:45.558922 SPD: device width 4 bits, bus width 8 bits
427 12:07:45.562309 SPD: module size is 4096 MB (per channel)
428 12:07:45.565671 memory slot: 0 configuration done.
429 12:07:45.569164 memory slot: 2 configuration done.
430 12:07:45.620616 CBMEM:
431 12:07:45.624176 IMD: root @ 99fff000 254 entries.
432 12:07:45.627395 IMD: root @ 99ffec00 62 entries.
433 12:07:45.630650 External stage cache:
434 12:07:45.633889 IMD: root @ 9abff000 254 entries.
435 12:07:45.637348 IMD: root @ 9abfec00 62 entries.
436 12:07:45.640333 Chrome EC: clear events_b mask to 0x0000000020004000
437 12:07:45.656585 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
438 12:07:45.670017 tlcl_write: response is 0
439 12:07:45.678796 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
440 12:07:45.685206 MRC: TPM MRC hash updated successfully.
441 12:07:45.685296 2 DIMMs found
442 12:07:45.688599 SMM Memory Map
443 12:07:45.691992 SMRAM : 0x9a000000 0x1000000
444 12:07:45.695096 Subregion 0: 0x9a000000 0xa00000
445 12:07:45.698764 Subregion 1: 0x9aa00000 0x200000
446 12:07:45.702050 Subregion 2: 0x9ac00000 0x400000
447 12:07:45.705122 top_of_ram = 0x9a000000
448 12:07:45.708469 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
449 12:07:45.715218 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
450 12:07:45.718070 MTRR Range: Start=ff000000 End=0 (Size 1000000)
451 12:07:45.725267 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
452 12:07:45.728353 CBFS @ c08000 size 3f8000
453 12:07:45.731517 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
454 12:07:45.735381 CBFS: Locating 'fallback/postcar'
455 12:07:45.742066 CBFS: Found @ offset 107000 size 4b44
456 12:07:45.744697 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
457 12:07:45.757781 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
458 12:07:45.760777 Processing 180 relocs. Offset value of 0x97c0c000
459 12:07:45.769451 Accumulated console time in romstage 286 ms
460 12:07:45.769549
461 12:07:45.769617
462 12:07:45.779415 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
463 12:07:45.786245 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 12:07:45.789065 CBFS @ c08000 size 3f8000
465 12:07:45.792550 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 12:07:45.799084 CBFS: Locating 'fallback/ramstage'
467 12:07:45.802741 CBFS: Found @ offset 43380 size 1b9e8
468 12:07:45.809389 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
469 12:07:45.840860 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
470 12:07:45.844258 Processing 3976 relocs. Offset value of 0x98db0000
471 12:07:45.851007 Accumulated console time in postcar 52 ms
472 12:07:45.851093
473 12:07:45.851164
474 12:07:45.861003 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
475 12:07:45.868011 FMAP: area RO_VPD found @ c00000 (16384 bytes)
476 12:07:45.871064 WARNING: RO_VPD is uninitialized or empty.
477 12:07:45.874166 FMAP: area RW_VPD found @ af8000 (8192 bytes)
478 12:07:45.880716 FMAP: area RW_VPD found @ af8000 (8192 bytes)
479 12:07:45.880796 Normal boot.
480 12:07:45.887334 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
481 12:07:45.890767 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
482 12:07:45.894021 CBFS @ c08000 size 3f8000
483 12:07:45.900700 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
484 12:07:45.904380 CBFS: Locating 'cpu_microcode_blob.bin'
485 12:07:45.907341 CBFS: Found @ offset 14700 size 2ec00
486 12:07:45.910670 microcode: sig=0x806ec pf=0x4 revision=0xc9
487 12:07:45.914052 Skip microcode update
488 12:07:45.917303 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
489 12:07:45.920521
490 12:07:45.920608 CBFS @ c08000 size 3f8000
491 12:07:45.927110 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
492 12:07:45.930821 CBFS: Locating 'fsps.bin'
493 12:07:45.933838 CBFS: Found @ offset d1fc0 size 35000
494 12:07:45.958979 Detected 4 core, 8 thread CPU.
495 12:07:45.962247 Setting up SMI for CPU
496 12:07:45.966165 IED base = 0x9ac00000
497 12:07:45.966253 IED size = 0x00400000
498 12:07:45.969404 Will perform SMM setup.
499 12:07:45.976021 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
500 12:07:45.982450 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
501 12:07:45.985445 Processing 16 relocs. Offset value of 0x00030000
502 12:07:45.989422 Attempting to start 7 APs
503 12:07:45.992709 Waiting for 10ms after sending INIT.
504 12:07:46.008802 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
505 12:07:46.008890 done.
506 12:07:46.012313 AP: slot 7 apic_id 7.
507 12:07:46.015686 AP: slot 6 apic_id 6.
508 12:07:46.015760 AP: slot 4 apic_id 5.
509 12:07:46.018691 AP: slot 5 apic_id 4.
510 12:07:46.022056 AP: slot 2 apic_id 3.
511 12:07:46.022131 AP: slot 1 apic_id 2.
512 12:07:46.029015 Waiting for 2nd SIPI to complete...done.
513 12:07:46.035165 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
514 12:07:46.039375 Processing 13 relocs. Offset value of 0x00038000
515 12:07:46.045309 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
516 12:07:46.052214 Installing SMM handler to 0x9a000000
517 12:07:46.058659 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
518 12:07:46.061683 Processing 658 relocs. Offset value of 0x9a010000
519 12:07:46.072108 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
520 12:07:46.075830 Processing 13 relocs. Offset value of 0x9a008000
521 12:07:46.081803 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
522 12:07:46.088380 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
523 12:07:46.091670 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
524 12:07:46.098248 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
525 12:07:46.105190 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
526 12:07:46.111830 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
527 12:07:46.115064 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
528 12:07:46.121416 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
529 12:07:46.125046 Clearing SMI status registers
530 12:07:46.128307 SMI_STS: PM1
531 12:07:46.128394 PM1_STS: PWRBTN
532 12:07:46.131829 TCO_STS: SECOND_TO
533 12:07:46.134718 New SMBASE 0x9a000000
534 12:07:46.138198 In relocation handler: CPU 0
535 12:07:46.141301 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
536 12:07:46.144735 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 12:07:46.148095 Relocation complete.
538 12:07:46.151517 New SMBASE 0x99fff400
539 12:07:46.151605 In relocation handler: CPU 3
540 12:07:46.158126 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
541 12:07:46.161451 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 12:07:46.164718 Relocation complete.
543 12:07:46.164809 New SMBASE 0x99ffec00
544 12:07:46.168313
545 12:07:46.168400 In relocation handler: CPU 5
546 12:07:46.174865 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
547 12:07:46.178022 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 12:07:46.181257 Relocation complete.
549 12:07:46.181345 New SMBASE 0x99fff000
550 12:07:46.184985 In relocation handler: CPU 4
551 12:07:46.191690 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
552 12:07:46.194486 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 12:07:46.197808 Relocation complete.
554 12:07:46.197895 New SMBASE 0x99ffe400
555 12:07:46.201587 In relocation handler: CPU 7
556 12:07:46.204660 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
557 12:07:46.208384
558 12:07:46.211630 Writing SMRR. base = 0x9a000006, mask=0xff000800
559 12:07:46.214471 Relocation complete.
560 12:07:46.214547 New SMBASE 0x99ffe800
561 12:07:46.218135 In relocation handler: CPU 6
562 12:07:46.221128 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
563 12:07:46.227653 Writing SMRR. base = 0x9a000006, mask=0xff000800
564 12:07:46.231153 Relocation complete.
565 12:07:46.231233 New SMBASE 0x99fffc00
566 12:07:46.234881 In relocation handler: CPU 1
567 12:07:46.237865 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
568 12:07:46.244611 Writing SMRR. base = 0x9a000006, mask=0xff000800
569 12:07:46.247698 Relocation complete.
570 12:07:46.247773 New SMBASE 0x99fff800
571 12:07:46.250882 In relocation handler: CPU 2
572 12:07:46.254468 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
573 12:07:46.260934 Writing SMRR. base = 0x9a000006, mask=0xff000800
574 12:07:46.261014 Relocation complete.
575 12:07:46.264478 Initializing CPU #0
576 12:07:46.267693 CPU: vendor Intel device 806ec
577 12:07:46.271371 CPU: family 06, model 8e, stepping 0c
578 12:07:46.274547 Clearing out pending MCEs
579 12:07:46.277426 Setting up local APIC...
580 12:07:46.277536 apic_id: 0x00 done.
581 12:07:46.281001 Turbo is available but hidden
582 12:07:46.284145 Turbo is available and visible
583 12:07:46.287510 VMX status: enabled
584 12:07:46.291198 IA32_FEATURE_CONTROL status: locked
585 12:07:46.294192 Skip microcode update
586 12:07:46.294276 CPU #0 initialized
587 12:07:46.297375 Initializing CPU #3
588 12:07:46.297450 Initializing CPU #7
589 12:07:46.300723 Initializing CPU #6
590 12:07:46.304258 CPU: vendor Intel device 806ec
591 12:07:46.307497 CPU: family 06, model 8e, stepping 0c
592 12:07:46.310858 CPU: vendor Intel device 806ec
593 12:07:46.314372 CPU: family 06, model 8e, stepping 0c
594 12:07:46.317442 Clearing out pending MCEs
595 12:07:46.321008 Clearing out pending MCEs
596 12:07:46.323890 Setting up local APIC...
597 12:07:46.323971 Initializing CPU #1
598 12:07:46.327479 Initializing CPU #2
599 12:07:46.330507 CPU: vendor Intel device 806ec
600 12:07:46.334230 CPU: family 06, model 8e, stepping 0c
601 12:07:46.337265 CPU: vendor Intel device 806ec
602 12:07:46.341009 CPU: family 06, model 8e, stepping 0c
603 12:07:46.343860 Clearing out pending MCEs
604 12:07:46.347263 Clearing out pending MCEs
605 12:07:46.347336 Setting up local APIC...
606 12:07:46.350667 Initializing CPU #4
607 12:07:46.354153 Initializing CPU #5
608 12:07:46.354225 apic_id: 0x07 done.
609 12:07:46.357221 Setting up local APIC...
610 12:07:46.360927 apic_id: 0x02 done.
611 12:07:46.361001 Setting up local APIC...
612 12:07:46.363884 CPU: vendor Intel device 806ec
613 12:07:46.366919 CPU: family 06, model 8e, stepping 0c
614 12:07:46.370238
615 12:07:46.370312 Clearing out pending MCEs
616 12:07:46.373614 VMX status: enabled
617 12:07:46.377058 apic_id: 0x03 done.
618 12:07:46.380715 IA32_FEATURE_CONTROL status: locked
619 12:07:46.380801 VMX status: enabled
620 12:07:46.383983 Skip microcode update
621 12:07:46.386940 IA32_FEATURE_CONTROL status: locked
622 12:07:46.390342 CPU #1 initialized
623 12:07:46.390428 Skip microcode update
624 12:07:46.393423 apic_id: 0x06 done.
625 12:07:46.396917 VMX status: enabled
626 12:07:46.397003 VMX status: enabled
627 12:07:46.400280 IA32_FEATURE_CONTROL status: locked
628 12:07:46.403502 Setting up local APIC...
629 12:07:46.407101 CPU: vendor Intel device 806ec
630 12:07:46.410283 CPU: family 06, model 8e, stepping 0c
631 12:07:46.413754 CPU: vendor Intel device 806ec
632 12:07:46.417156 CPU: family 06, model 8e, stepping 0c
633 12:07:46.420297 Clearing out pending MCEs
634 12:07:46.423572 Clearing out pending MCEs
635 12:07:46.426963 Setting up local APIC...
636 12:07:46.427049 apic_id: 0x01 done.
637 12:07:46.430095 CPU #2 initialized
638 12:07:46.433661 IA32_FEATURE_CONTROL status: locked
639 12:07:46.436967 Skip microcode update
640 12:07:46.437052 Skip microcode update
641 12:07:46.440393 CPU #7 initialized
642 12:07:46.440479 CPU #6 initialized
643 12:07:46.443619 VMX status: enabled
644 12:07:46.446961 apic_id: 0x04 done.
645 12:07:46.447047 Setting up local APIC...
646 12:07:46.450086 IA32_FEATURE_CONTROL status: locked
647 12:07:46.453229
648 12:07:46.453315 VMX status: enabled
649 12:07:46.456522 apic_id: 0x05 done.
650 12:07:46.460028 IA32_FEATURE_CONTROL status: locked
651 12:07:46.460114 VMX status: enabled
652 12:07:46.463440 Skip microcode update
653 12:07:46.466530 IA32_FEATURE_CONTROL status: locked
654 12:07:46.469811 CPU #5 initialized
655 12:07:46.469908 Skip microcode update
656 12:07:46.473282 Skip microcode update
657 12:07:46.476413 CPU #4 initialized
658 12:07:46.476502 CPU #3 initialized
659 12:07:46.483252 bsp_do_flight_plan done after 452 msecs.
660 12:07:46.483338 CPU: frequency set to 4200 MHz
661 12:07:46.486643
662 12:07:46.486729 Enabling SMIs.
663 12:07:46.486798 Locking SMM.
664 12:07:46.502897 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
665 12:07:46.506233 CBFS @ c08000 size 3f8000
666 12:07:46.512670 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
667 12:07:46.512756 CBFS: Locating 'vbt.bin'
668 12:07:46.516058 CBFS: Found @ offset 5f5c0 size 499
669 12:07:46.522505 Found a VBT of 4608 bytes after decompression
670 12:07:46.703823 Display FSP Version Info HOB
671 12:07:46.706993 Reference Code - CPU = 9.0.1e.30
672 12:07:46.710144 uCode Version = 0.0.0.ca
673 12:07:46.713542 TXT ACM version = ff.ff.ff.ffff
674 12:07:46.716777 Display FSP Version Info HOB
675 12:07:46.720148 Reference Code - ME = 9.0.1e.30
676 12:07:46.723590 MEBx version = 0.0.0.0
677 12:07:46.726738 ME Firmware Version = Consumer SKU
678 12:07:46.730450 Display FSP Version Info HOB
679 12:07:46.733343 Reference Code - CML PCH = 9.0.1e.30
680 12:07:46.736608 PCH-CRID Status = Disabled
681 12:07:46.740087 PCH-CRID Original Value = ff.ff.ff.ffff
682 12:07:46.743594 PCH-CRID New Value = ff.ff.ff.ffff
683 12:07:46.746556 OPROM - RST - RAID = ff.ff.ff.ffff
684 12:07:46.749975 ChipsetInit Base Version = ff.ff.ff.ffff
685 12:07:46.753296 ChipsetInit Oem Version = ff.ff.ff.ffff
686 12:07:46.756734 Display FSP Version Info HOB
687 12:07:46.763447 Reference Code - SA - System Agent = 9.0.1e.30
688 12:07:46.766693 Reference Code - MRC = 0.7.1.6c
689 12:07:46.766781 SA - PCIe Version = 9.0.1e.30
690 12:07:46.770119 SA-CRID Status = Disabled
691 12:07:46.773079 SA-CRID Original Value = 0.0.0.c
692 12:07:46.776788 SA-CRID New Value = 0.0.0.c
693 12:07:46.779904 OPROM - VBIOS = ff.ff.ff.ffff
694 12:07:46.783257 RTC Init
695 12:07:46.786404 Set power on after power failure.
696 12:07:46.786487 Disabling Deep S3
697 12:07:46.789741 Disabling Deep S3
698 12:07:46.789818 Disabling Deep S4
699 12:07:46.792925 Disabling Deep S4
700 12:07:46.793007 Disabling Deep S5
701 12:07:46.796464 Disabling Deep S5
702 12:07:46.802807 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
703 12:07:46.802898 Enumerating buses...
704 12:07:46.809526 Show all devs... Before device enumeration.
705 12:07:46.809607 Root Device: enabled 1
706 12:07:46.812756 CPU_CLUSTER: 0: enabled 1
707 12:07:46.816339 DOMAIN: 0000: enabled 1
708 12:07:46.819768 APIC: 00: enabled 1
709 12:07:46.819857 PCI: 00:00.0: enabled 1
710 12:07:46.823399 PCI: 00:02.0: enabled 1
711 12:07:46.826253 PCI: 00:04.0: enabled 0
712 12:07:46.829510 PCI: 00:05.0: enabled 0
713 12:07:46.829613 PCI: 00:12.0: enabled 1
714 12:07:46.832976 PCI: 00:12.5: enabled 0
715 12:07:46.836095 PCI: 00:12.6: enabled 0
716 12:07:46.836174 PCI: 00:14.0: enabled 1
717 12:07:46.839102 PCI: 00:14.1: enabled 0
718 12:07:46.842630 PCI: 00:14.3: enabled 1
719 12:07:46.846050 PCI: 00:14.5: enabled 0
720 12:07:46.846133 PCI: 00:15.0: enabled 1
721 12:07:46.849365 PCI: 00:15.1: enabled 1
722 12:07:46.853005 PCI: 00:15.2: enabled 0
723 12:07:46.855784 PCI: 00:15.3: enabled 0
724 12:07:46.855866 PCI: 00:16.0: enabled 1
725 12:07:46.859228 PCI: 00:16.1: enabled 0
726 12:07:46.862684 PCI: 00:16.2: enabled 0
727 12:07:46.866293 PCI: 00:16.3: enabled 0
728 12:07:46.866374 PCI: 00:16.4: enabled 0
729 12:07:46.869700 PCI: 00:16.5: enabled 0
730 12:07:46.872758 PCI: 00:17.0: enabled 1
731 12:07:46.872842 PCI: 00:19.0: enabled 1
732 12:07:46.875859 PCI: 00:19.1: enabled 0
733 12:07:46.879296 PCI: 00:19.2: enabled 0
734 12:07:46.882488 PCI: 00:1a.0: enabled 0
735 12:07:46.882582 PCI: 00:1c.0: enabled 0
736 12:07:46.885770 PCI: 00:1c.1: enabled 0
737 12:07:46.889822 PCI: 00:1c.2: enabled 0
738 12:07:46.892515 PCI: 00:1c.3: enabled 0
739 12:07:46.892600 PCI: 00:1c.4: enabled 0
740 12:07:46.895753 PCI: 00:1c.5: enabled 0
741 12:07:46.899169 PCI: 00:1c.6: enabled 0
742 12:07:46.899249 PCI: 00:1c.7: enabled 0
743 12:07:46.902610
744 12:07:46.902686 PCI: 00:1d.0: enabled 1
745 12:07:46.905883 PCI: 00:1d.1: enabled 0
746 12:07:46.909123 PCI: 00:1d.2: enabled 0
747 12:07:46.909198 PCI: 00:1d.3: enabled 0
748 12:07:46.912499 PCI: 00:1d.4: enabled 0
749 12:07:46.915713 PCI: 00:1d.5: enabled 1
750 12:07:46.919335 PCI: 00:1e.0: enabled 1
751 12:07:46.919421 PCI: 00:1e.1: enabled 0
752 12:07:46.922426 PCI: 00:1e.2: enabled 1
753 12:07:46.925866 PCI: 00:1e.3: enabled 1
754 12:07:46.929112 PCI: 00:1f.0: enabled 1
755 12:07:46.929198 PCI: 00:1f.1: enabled 1
756 12:07:46.932116 PCI: 00:1f.2: enabled 1
757 12:07:46.936067 PCI: 00:1f.3: enabled 1
758 12:07:46.938998 PCI: 00:1f.4: enabled 1
759 12:07:46.939084 PCI: 00:1f.5: enabled 1
760 12:07:46.942237 PCI: 00:1f.6: enabled 0
761 12:07:46.945468 USB0 port 0: enabled 1
762 12:07:46.945592 I2C: 00:15: enabled 1
763 12:07:46.949282 I2C: 00:5d: enabled 1
764 12:07:46.952852 GENERIC: 0.0: enabled 1
765 12:07:46.952938 I2C: 00:1a: enabled 1
766 12:07:46.956248 I2C: 00:38: enabled 1
767 12:07:46.959113 I2C: 00:39: enabled 1
768 12:07:46.959200 I2C: 00:3a: enabled 1
769 12:07:46.962390 I2C: 00:3b: enabled 1
770 12:07:46.965693 PCI: 00:00.0: enabled 1
771 12:07:46.965779 SPI: 00: enabled 1
772 12:07:46.969270 SPI: 01: enabled 1
773 12:07:46.972715 PNP: 0c09.0: enabled 1
774 12:07:46.972801 USB2 port 0: enabled 1
775 12:07:46.975687 USB2 port 1: enabled 1
776 12:07:46.978788 USB2 port 2: enabled 0
777 12:07:46.982261 USB2 port 3: enabled 0
778 12:07:46.982347 USB2 port 5: enabled 0
779 12:07:46.985687 USB2 port 6: enabled 1
780 12:07:46.988774 USB2 port 9: enabled 1
781 12:07:46.988860 USB3 port 0: enabled 1
782 12:07:46.992477 USB3 port 1: enabled 1
783 12:07:46.995399 USB3 port 2: enabled 1
784 12:07:46.995485 USB3 port 3: enabled 1
785 12:07:46.998723 USB3 port 4: enabled 0
786 12:07:47.002842 APIC: 02: enabled 1
787 12:07:47.002928 APIC: 03: enabled 1
788 12:07:47.005910 APIC: 01: enabled 1
789 12:07:47.009192 APIC: 05: enabled 1
790 12:07:47.009278 APIC: 04: enabled 1
791 12:07:47.012109 APIC: 06: enabled 1
792 12:07:47.012196 APIC: 07: enabled 1
793 12:07:47.015493 Compare with tree...
794 12:07:47.018811 Root Device: enabled 1
795 12:07:47.022180 CPU_CLUSTER: 0: enabled 1
796 12:07:47.022267 APIC: 00: enabled 1
797 12:07:47.025620 APIC: 02: enabled 1
798 12:07:47.028997 APIC: 03: enabled 1
799 12:07:47.029083 APIC: 01: enabled 1
800 12:07:47.032414 APIC: 05: enabled 1
801 12:07:47.035594 APIC: 04: enabled 1
802 12:07:47.035683 APIC: 06: enabled 1
803 12:07:47.038912 APIC: 07: enabled 1
804 12:07:47.042419 DOMAIN: 0000: enabled 1
805 12:07:47.045972 PCI: 00:00.0: enabled 1
806 12:07:47.046058 PCI: 00:02.0: enabled 1
807 12:07:47.048959 PCI: 00:04.0: enabled 0
808 12:07:47.051914 PCI: 00:05.0: enabled 0
809 12:07:47.055300 PCI: 00:12.0: enabled 1
810 12:07:47.058750 PCI: 00:12.5: enabled 0
811 12:07:47.058836 PCI: 00:12.6: enabled 0
812 12:07:47.062284 PCI: 00:14.0: enabled 1
813 12:07:47.065403 USB0 port 0: enabled 1
814 12:07:47.068821 USB2 port 0: enabled 1
815 12:07:47.072013 USB2 port 1: enabled 1
816 12:07:47.072098 USB2 port 2: enabled 0
817 12:07:47.075494 USB2 port 3: enabled 0
818 12:07:47.078654 USB2 port 5: enabled 0
819 12:07:47.081961 USB2 port 6: enabled 1
820 12:07:47.085195 USB2 port 9: enabled 1
821 12:07:47.085281 USB3 port 0: enabled 1
822 12:07:47.088720
823 12:07:47.088830 USB3 port 1: enabled 1
824 12:07:47.091903 USB3 port 2: enabled 1
825 12:07:47.095533 USB3 port 3: enabled 1
826 12:07:47.098343 USB3 port 4: enabled 0
827 12:07:47.101681 PCI: 00:14.1: enabled 0
828 12:07:47.101767 PCI: 00:14.3: enabled 1
829 12:07:47.105395 PCI: 00:14.5: enabled 0
830 12:07:47.108765 PCI: 00:15.0: enabled 1
831 12:07:47.112008 I2C: 00:15: enabled 1
832 12:07:47.115260 PCI: 00:15.1: enabled 1
833 12:07:47.115346 I2C: 00:5d: enabled 1
834 12:07:47.118631 GENERIC: 0.0: enabled 1
835 12:07:47.121980 PCI: 00:15.2: enabled 0
836 12:07:47.125120 PCI: 00:15.3: enabled 0
837 12:07:47.125205 PCI: 00:16.0: enabled 1
838 12:07:47.128777 PCI: 00:16.1: enabled 0
839 12:07:47.131516 PCI: 00:16.2: enabled 0
840 12:07:47.135594 PCI: 00:16.3: enabled 0
841 12:07:47.138138 PCI: 00:16.4: enabled 0
842 12:07:47.138224 PCI: 00:16.5: enabled 0
843 12:07:47.141630 PCI: 00:17.0: enabled 1
844 12:07:47.145643 PCI: 00:19.0: enabled 1
845 12:07:47.148538 I2C: 00:1a: enabled 1
846 12:07:47.151443 I2C: 00:38: enabled 1
847 12:07:47.151534 I2C: 00:39: enabled 1
848 12:07:47.154977 I2C: 00:3a: enabled 1
849 12:07:47.158464 I2C: 00:3b: enabled 1
850 12:07:47.161497 PCI: 00:19.1: enabled 0
851 12:07:47.161590 PCI: 00:19.2: enabled 0
852 12:07:47.164834 PCI: 00:1a.0: enabled 0
853 12:07:47.168676 PCI: 00:1c.0: enabled 0
854 12:07:47.171452 PCI: 00:1c.1: enabled 0
855 12:07:47.174904 PCI: 00:1c.2: enabled 0
856 12:07:47.174980 PCI: 00:1c.3: enabled 0
857 12:07:47.179094 PCI: 00:1c.4: enabled 0
858 12:07:47.181675 PCI: 00:1c.5: enabled 0
859 12:07:47.184917 PCI: 00:1c.6: enabled 0
860 12:07:47.188023 PCI: 00:1c.7: enabled 0
861 12:07:47.188104 PCI: 00:1d.0: enabled 1
862 12:07:47.191698 PCI: 00:1d.1: enabled 0
863 12:07:47.194998 PCI: 00:1d.2: enabled 0
864 12:07:47.198017 PCI: 00:1d.3: enabled 0
865 12:07:47.198097 PCI: 00:1d.4: enabled 0
866 12:07:47.201618
867 12:07:47.201698 PCI: 00:1d.5: enabled 1
868 12:07:47.204999 PCI: 00:00.0: enabled 1
869 12:07:47.207869 PCI: 00:1e.0: enabled 1
870 12:07:47.211233 PCI: 00:1e.1: enabled 0
871 12:07:47.211318 PCI: 00:1e.2: enabled 1
872 12:07:47.214636 SPI: 00: enabled 1
873 12:07:47.217989 PCI: 00:1e.3: enabled 1
874 12:07:47.221285 SPI: 01: enabled 1
875 12:07:47.221361 PCI: 00:1f.0: enabled 1
876 12:07:47.224826 PNP: 0c09.0: enabled 1
877 12:07:47.228100 PCI: 00:1f.1: enabled 1
878 12:07:47.231257 PCI: 00:1f.2: enabled 1
879 12:07:47.234750 PCI: 00:1f.3: enabled 1
880 12:07:47.234841 PCI: 00:1f.4: enabled 1
881 12:07:47.238150 PCI: 00:1f.5: enabled 1
882 12:07:47.241673 PCI: 00:1f.6: enabled 0
883 12:07:47.244950 Root Device scanning...
884 12:07:47.247994 scan_static_bus for Root Device
885 12:07:47.248083 CPU_CLUSTER: 0 enabled
886 12:07:47.251368 DOMAIN: 0000 enabled
887 12:07:47.254776 DOMAIN: 0000 scanning...
888 12:07:47.258513 PCI: pci_scan_bus for bus 00
889 12:07:47.261389 PCI: 00:00.0 [8086/0000] ops
890 12:07:47.264704 PCI: 00:00.0 [8086/9b61] enabled
891 12:07:47.268396 PCI: 00:02.0 [8086/0000] bus ops
892 12:07:47.270989 PCI: 00:02.0 [8086/9b41] enabled
893 12:07:47.274522 PCI: 00:04.0 [8086/1903] disabled
894 12:07:47.277977 PCI: 00:08.0 [8086/1911] enabled
895 12:07:47.280913 PCI: 00:12.0 [8086/02f9] enabled
896 12:07:47.284435 PCI: 00:14.0 [8086/0000] bus ops
897 12:07:47.287699 PCI: 00:14.0 [8086/02ed] enabled
898 12:07:47.291062 PCI: 00:14.2 [8086/02ef] enabled
899 12:07:47.294287 PCI: 00:14.3 [8086/02f0] enabled
900 12:07:47.297705 PCI: 00:15.0 [8086/0000] bus ops
901 12:07:47.301159 PCI: 00:15.0 [8086/02e8] enabled
902 12:07:47.304475 PCI: 00:15.1 [8086/0000] bus ops
903 12:07:47.307803 PCI: 00:15.1 [8086/02e9] enabled
904 12:07:47.310763 PCI: 00:16.0 [8086/0000] ops
905 12:07:47.314563 PCI: 00:16.0 [8086/02e0] enabled
906 12:07:47.317842 PCI: 00:17.0 [8086/0000] ops
907 12:07:47.321201 PCI: 00:17.0 [8086/02d3] enabled
908 12:07:47.324365 PCI: 00:19.0 [8086/0000] bus ops
909 12:07:47.327715 PCI: 00:19.0 [8086/02c5] enabled
910 12:07:47.331076 PCI: 00:1d.0 [8086/0000] bus ops
911 12:07:47.334544 PCI: 00:1d.0 [8086/02b0] enabled
912 12:07:47.337205 PCI: Static device PCI: 00:1d.5 not found, disabling it.
913 12:07:47.340960 PCI: 00:1e.0 [8086/0000] ops
914 12:07:47.343958 PCI: 00:1e.0 [8086/02a8] enabled
915 12:07:47.347236 PCI: 00:1e.2 [8086/0000] bus ops
916 12:07:47.350988 PCI: 00:1e.2 [8086/02aa] enabled
917 12:07:47.354008 PCI: 00:1e.3 [8086/0000] bus ops
918 12:07:47.357429 PCI: 00:1e.3 [8086/02ab] enabled
919 12:07:47.360640 PCI: 00:1f.0 [8086/0000] bus ops
920 12:07:47.364372 PCI: 00:1f.0 [8086/0284] enabled
921 12:07:47.370727 PCI: Static device PCI: 00:1f.1 not found, disabling it.
922 12:07:47.377361 PCI: Static device PCI: 00:1f.2 not found, disabling it.
923 12:07:47.380568 PCI: 00:1f.3 [8086/0000] bus ops
924 12:07:47.384138 PCI: 00:1f.3 [8086/02c8] enabled
925 12:07:47.387200 PCI: 00:1f.4 [8086/0000] bus ops
926 12:07:47.390697 PCI: 00:1f.4 [8086/02a3] enabled
927 12:07:47.394186 PCI: 00:1f.5 [8086/0000] bus ops
928 12:07:47.397272 PCI: 00:1f.5 [8086/02a4] enabled
929 12:07:47.400566 PCI: Leftover static devices:
930 12:07:47.400655 PCI: 00:05.0
931 12:07:47.400737 PCI: 00:12.5
932 12:07:47.403887 PCI: 00:12.6
933 12:07:47.403983 PCI: 00:14.1
934 12:07:47.407104 PCI: 00:14.5
935 12:07:47.407188 PCI: 00:15.2
936 12:07:47.407256 PCI: 00:15.3
937 12:07:47.410416 PCI: 00:16.1
938 12:07:47.410500 PCI: 00:16.2
939 12:07:47.413637 PCI: 00:16.3
940 12:07:47.413720 PCI: 00:16.4
941 12:07:47.413786 PCI: 00:16.5
942 12:07:47.417049
943 12:07:47.417126 PCI: 00:19.1
944 12:07:47.417192 PCI: 00:19.2
945 12:07:47.420179 PCI: 00:1a.0
946 12:07:47.420259 PCI: 00:1c.0
947 12:07:47.423392 PCI: 00:1c.1
948 12:07:47.423466 PCI: 00:1c.2
949 12:07:47.423529 PCI: 00:1c.3
950 12:07:47.426998 PCI: 00:1c.4
951 12:07:47.427075 PCI: 00:1c.5
952 12:07:47.430022 PCI: 00:1c.6
953 12:07:47.430135 PCI: 00:1c.7
954 12:07:47.430200 PCI: 00:1d.1
955 12:07:47.433752 PCI: 00:1d.2
956 12:07:47.433840 PCI: 00:1d.3
957 12:07:47.437010 PCI: 00:1d.4
958 12:07:47.437098 PCI: 00:1d.5
959 12:07:47.437168 PCI: 00:1e.1
960 12:07:47.440103
961 12:07:47.440192 PCI: 00:1f.1
962 12:07:47.440274 PCI: 00:1f.2
963 12:07:47.443863 PCI: 00:1f.6
964 12:07:47.446738 PCI: Check your devicetree.cb.
965 12:07:47.446826 PCI: 00:02.0 scanning...
966 12:07:47.450091 scan_generic_bus for PCI: 00:02.0
967 12:07:47.453883
968 12:07:47.456845 scan_generic_bus for PCI: 00:02.0 done
969 12:07:47.460089 scan_bus: scanning of bus PCI: 00:02.0 took 10189 usecs
970 12:07:47.463689 PCI: 00:14.0 scanning...
971 12:07:47.466784 scan_static_bus for PCI: 00:14.0
972 12:07:47.470394 USB0 port 0 enabled
973 12:07:47.473355 USB0 port 0 scanning...
974 12:07:47.476660 scan_static_bus for USB0 port 0
975 12:07:47.476748 USB2 port 0 enabled
976 12:07:47.480094 USB2 port 1 enabled
977 12:07:47.480183 USB2 port 2 disabled
978 12:07:47.483262
979 12:07:47.483356 USB2 port 3 disabled
980 12:07:47.486976 USB2 port 5 disabled
981 12:07:47.487056 USB2 port 6 enabled
982 12:07:47.489949 USB2 port 9 enabled
983 12:07:47.493340 USB3 port 0 enabled
984 12:07:47.493445 USB3 port 1 enabled
985 12:07:47.497298 USB3 port 2 enabled
986 12:07:47.497385 USB3 port 3 enabled
987 12:07:47.500170 USB3 port 4 disabled
988 12:07:47.503589 USB2 port 0 scanning...
989 12:07:47.506476 scan_static_bus for USB2 port 0
990 12:07:47.510102 scan_static_bus for USB2 port 0 done
991 12:07:47.516533 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
992 12:07:47.516621 USB2 port 1 scanning...
993 12:07:47.519935 scan_static_bus for USB2 port 1
994 12:07:47.526560 scan_static_bus for USB2 port 1 done
995 12:07:47.530137 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
996 12:07:47.532965 USB2 port 6 scanning...
997 12:07:47.536479 scan_static_bus for USB2 port 6
998 12:07:47.539739 scan_static_bus for USB2 port 6 done
999 12:07:47.546460 scan_bus: scanning of bus USB2 port 6 took 9705 usecs
1000 12:07:47.546548 USB2 port 9 scanning...
1001 12:07:47.550204 scan_static_bus for USB2 port 9
1002 12:07:47.556504 scan_static_bus for USB2 port 9 done
1003 12:07:47.559899 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
1004 12:07:47.563504 USB3 port 0 scanning...
1005 12:07:47.566891 scan_static_bus for USB3 port 0
1006 12:07:47.570083 scan_static_bus for USB3 port 0 done
1007 12:07:47.576295 scan_bus: scanning of bus USB3 port 0 took 9690 usecs
1008 12:07:47.576384 USB3 port 1 scanning...
1009 12:07:47.580519 scan_static_bus for USB3 port 1
1010 12:07:47.586850 scan_static_bus for USB3 port 1 done
1011 12:07:47.589789 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
1012 12:07:47.593142 USB3 port 2 scanning...
1013 12:07:47.596332 scan_static_bus for USB3 port 2
1014 12:07:47.599803 scan_static_bus for USB3 port 2 done
1015 12:07:47.606258 scan_bus: scanning of bus USB3 port 2 took 9708 usecs
1016 12:07:47.606346 USB3 port 3 scanning...
1017 12:07:47.610002 scan_static_bus for USB3 port 3
1018 12:07:47.616418 scan_static_bus for USB3 port 3 done
1019 12:07:47.619676 scan_bus: scanning of bus USB3 port 3 took 9698 usecs
1020 12:07:47.623400 scan_static_bus for USB0 port 0 done
1021 12:07:47.629998 scan_bus: scanning of bus USB0 port 0 took 155360 usecs
1022 12:07:47.633335 scan_static_bus for PCI: 00:14.0 done
1023 12:07:47.639771 scan_bus: scanning of bus PCI: 00:14.0 took 172976 usecs
1024 12:07:47.643223 PCI: 00:15.0 scanning...
1025 12:07:47.646511 scan_generic_bus for PCI: 00:15.0
1026 12:07:47.649492 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1027 12:07:47.653187 scan_generic_bus for PCI: 00:15.0 done
1028 12:07:47.659995 scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
1029 12:07:47.660083 PCI: 00:15.1 scanning...
1030 12:07:47.662846
1031 12:07:47.666302 scan_generic_bus for PCI: 00:15.1
1032 12:07:47.669591 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1033 12:07:47.672862 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1034 12:07:47.676160 scan_generic_bus for PCI: 00:15.1 done
1035 12:07:47.682583 scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs
1036 12:07:47.686135 PCI: 00:19.0 scanning...
1037 12:07:47.689737 scan_generic_bus for PCI: 00:19.0
1038 12:07:47.692739 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1039 12:07:47.696135 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1040 12:07:47.703027 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1041 12:07:47.706330 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1042 12:07:47.709341 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1043 12:07:47.712644 scan_generic_bus for PCI: 00:19.0 done
1044 12:07:47.719065 scan_bus: scanning of bus PCI: 00:19.0 took 30721 usecs
1045 12:07:47.722330 PCI: 00:1d.0 scanning...
1046 12:07:47.725543 do_pci_scan_bridge for PCI: 00:1d.0
1047 12:07:47.728832 PCI: pci_scan_bus for bus 01
1048 12:07:47.732554 PCI: 01:00.0 [1c5c/1327] enabled
1049 12:07:47.735710 Enabling Common Clock Configuration
1050 12:07:47.739038 L1 Sub-State supported from root port 29
1051 12:07:47.742399 L1 Sub-State Support = 0xf
1052 12:07:47.746037 CommonModeRestoreTime = 0x28
1053 12:07:47.748850 Power On Value = 0x16, Power On Scale = 0x0
1054 12:07:47.752356 ASPM: Enabled L1
1055 12:07:47.755633 scan_bus: scanning of bus PCI: 00:1d.0 took 32786 usecs
1056 12:07:47.758914 PCI: 00:1e.2 scanning...
1057 12:07:47.762717 scan_generic_bus for PCI: 00:1e.2
1058 12:07:47.765660 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1059 12:07:47.772358 scan_generic_bus for PCI: 00:1e.2 done
1060 12:07:47.775887 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
1061 12:07:47.779285 PCI: 00:1e.3 scanning...
1062 12:07:47.782229 scan_generic_bus for PCI: 00:1e.3
1063 12:07:47.785474 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1064 12:07:47.789310 scan_generic_bus for PCI: 00:1e.3 done
1065 12:07:47.792496
1066 12:07:47.796012 scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs
1067 12:07:47.798672 PCI: 00:1f.0 scanning...
1068 12:07:47.802218 scan_static_bus for PCI: 00:1f.0
1069 12:07:47.805504 PNP: 0c09.0 enabled
1070 12:07:47.808929 scan_static_bus for PCI: 00:1f.0 done
1071 12:07:47.811969 scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs
1072 12:07:47.815706 PCI: 00:1f.3 scanning...
1073 12:07:47.822540 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1074 12:07:47.825291 PCI: 00:1f.4 scanning...
1075 12:07:47.829014 scan_generic_bus for PCI: 00:1f.4
1076 12:07:47.831859 scan_generic_bus for PCI: 00:1f.4 done
1077 12:07:47.838667 scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs
1078 12:07:47.838749 PCI: 00:1f.5 scanning...
1079 12:07:47.842473 scan_generic_bus for PCI: 00:1f.5
1080 12:07:47.845671
1081 12:07:47.848751 scan_generic_bus for PCI: 00:1f.5 done
1082 12:07:47.852318 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1083 12:07:47.858958 scan_bus: scanning of bus DOMAIN: 0000 took 605001 usecs
1084 12:07:47.861969 scan_static_bus for Root Device done
1085 12:07:47.868810 scan_bus: scanning of bus Root Device took 624887 usecs
1086 12:07:47.868889 done
1087 12:07:47.872184 Chrome EC: UHEPI supported
1088 12:07:47.878660 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1089 12:07:47.885136 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1090 12:07:47.888605 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1091 12:07:47.897081 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1092 12:07:47.900069 SPI flash protection: WPSW=0 SRP0=0
1093 12:07:47.906498 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1094 12:07:47.909888 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1095 12:07:47.913605 found VGA at PCI: 00:02.0
1096 12:07:47.916823 Setting up VGA for PCI: 00:02.0
1097 12:07:47.923325 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1098 12:07:47.926743 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1099 12:07:47.930264 Allocating resources...
1100 12:07:47.933332 Reading resources...
1101 12:07:47.936471 Root Device read_resources bus 0 link: 0
1102 12:07:47.940069 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1103 12:07:47.946464 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1104 12:07:47.949718 DOMAIN: 0000 read_resources bus 0 link: 0
1105 12:07:47.956864 PCI: 00:14.0 read_resources bus 0 link: 0
1106 12:07:47.960307 USB0 port 0 read_resources bus 0 link: 0
1107 12:07:47.968462 USB0 port 0 read_resources bus 0 link: 0 done
1108 12:07:47.971653 PCI: 00:14.0 read_resources bus 0 link: 0 done
1109 12:07:47.979114 PCI: 00:15.0 read_resources bus 1 link: 0
1110 12:07:47.982151 PCI: 00:15.0 read_resources bus 1 link: 0 done
1111 12:07:47.988921 PCI: 00:15.1 read_resources bus 2 link: 0
1112 12:07:47.992225 PCI: 00:15.1 read_resources bus 2 link: 0 done
1113 12:07:47.999675 PCI: 00:19.0 read_resources bus 3 link: 0
1114 12:07:48.006217 PCI: 00:19.0 read_resources bus 3 link: 0 done
1115 12:07:48.009626 PCI: 00:1d.0 read_resources bus 1 link: 0
1116 12:07:48.016189 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1117 12:07:48.019986 PCI: 00:1e.2 read_resources bus 4 link: 0
1118 12:07:48.026160 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1119 12:07:48.029455 PCI: 00:1e.3 read_resources bus 5 link: 0
1120 12:07:48.036404 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1121 12:07:48.039627 PCI: 00:1f.0 read_resources bus 0 link: 0
1122 12:07:48.046339 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1123 12:07:48.049976 DOMAIN: 0000 read_resources bus 0 link: 0 done
1124 12:07:48.052846
1125 12:07:48.056409 Root Device read_resources bus 0 link: 0 done
1126 12:07:48.059728 Done reading resources.
1127 12:07:48.063333 Show resources in subtree (Root Device)...After reading.
1128 12:07:48.069511 Root Device child on link 0 CPU_CLUSTER: 0
1129 12:07:48.072951 CPU_CLUSTER: 0 child on link 0 APIC: 00
1130 12:07:48.073043 APIC: 00
1131 12:07:48.076325 APIC: 02
1132 12:07:48.076413 APIC: 03
1133 12:07:48.076482 APIC: 01
1134 12:07:48.079782 APIC: 05
1135 12:07:48.079870 APIC: 04
1136 12:07:48.083123 APIC: 06
1137 12:07:48.083211 APIC: 07
1138 12:07:48.086465 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1139 12:07:48.097018 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1140 12:07:48.152355 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1141 12:07:48.152459 PCI: 00:00.0
1142 12:07:48.153069 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1143 12:07:48.153338 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1144 12:07:48.153614 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1145 12:07:48.154000 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1146 12:07:48.202492 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1147 12:07:48.202768 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1148 12:07:48.203645 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1149 12:07:48.203921 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1150 12:07:48.204937 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1151 12:07:48.205208 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1152 12:07:48.252672 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1153 12:07:48.253054 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1154 12:07:48.253797 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1155 12:07:48.254071 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1156 12:07:48.254813 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1157 12:07:48.288328 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1158 12:07:48.288416 PCI: 00:02.0
1159 12:07:48.288924 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1160 12:07:48.289191 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1161 12:07:48.292526 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1162 12:07:48.292613 PCI: 00:04.0
1163 12:07:48.295846 PCI: 00:08.0
1164 12:07:48.302631 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:07:48.302718 PCI: 00:12.0
1166 12:07:48.312337 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 12:07:48.319358 PCI: 00:14.0 child on link 0 USB0 port 0
1168 12:07:48.329057 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1169 12:07:48.332345 USB0 port 0 child on link 0 USB2 port 0
1170 12:07:48.332432 USB2 port 0
1171 12:07:48.335891 USB2 port 1
1172 12:07:48.335978 USB2 port 2
1173 12:07:48.339218
1174 12:07:48.339304 USB2 port 3
1175 12:07:48.342510 USB2 port 5
1176 12:07:48.342597 USB2 port 6
1177 12:07:48.345913 USB2 port 9
1178 12:07:48.345999 USB3 port 0
1179 12:07:48.349008 USB3 port 1
1180 12:07:48.349094 USB3 port 2
1181 12:07:48.352621 USB3 port 3
1182 12:07:48.352708 USB3 port 4
1183 12:07:48.356049 PCI: 00:14.2
1184 12:07:48.365796 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1185 12:07:48.375793 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 12:07:48.375881 PCI: 00:14.3
1187 12:07:48.385445 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 12:07:48.392022 PCI: 00:15.0 child on link 0 I2C: 01:15
1189 12:07:48.402185 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:07:48.402276 I2C: 01:15
1191 12:07:48.405663 PCI: 00:15.1 child on link 0 I2C: 02:5d
1192 12:07:48.415179 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 12:07:48.418682 I2C: 02:5d
1194 12:07:48.418767 GENERIC: 0.0
1195 12:07:48.421752 PCI: 00:16.0
1196 12:07:48.431750 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:07:48.431838 PCI: 00:17.0
1198 12:07:48.441802 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1199 12:07:48.451767 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1200 12:07:48.458672 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1201 12:07:48.468301 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1202 12:07:48.475102 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1203 12:07:48.485058 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1204 12:07:48.488114 PCI: 00:19.0 child on link 0 I2C: 03:1a
1205 12:07:48.498498 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 12:07:48.501376 I2C: 03:1a
1207 12:07:48.501462 I2C: 03:38
1208 12:07:48.504799 I2C: 03:39
1209 12:07:48.504885 I2C: 03:3a
1210 12:07:48.507912 I2C: 03:3b
1211 12:07:48.511604 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1212 12:07:48.521781 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1213 12:07:48.531103 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1214 12:07:48.538096 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1215 12:07:48.541287 PCI: 01:00.0
1216 12:07:48.551143 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 12:07:48.551231 PCI: 00:1e.0
1218 12:07:48.564471 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1219 12:07:48.574558 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1220 12:07:48.577437 PCI: 00:1e.2 child on link 0 SPI: 00
1221 12:07:48.588033 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 12:07:48.588120 SPI: 00
1223 12:07:48.591811 PCI: 00:1e.3 child on link 0 SPI: 01
1224 12:07:48.601151 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 12:07:48.604586 SPI: 01
1226 12:07:48.607635 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1227 12:07:48.617623 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1228 12:07:48.624002 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1229 12:07:48.627292 PNP: 0c09.0
1230 12:07:48.637110 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1231 12:07:48.637199 PCI: 00:1f.3
1232 12:07:48.647448 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1233 12:07:48.657103 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1234 12:07:48.660247 PCI: 00:1f.4
1235 12:07:48.667134 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1236 12:07:48.677107 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1237 12:07:48.680381 PCI: 00:1f.5
1238 12:07:48.690233 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 12:07:48.693848 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1240 12:07:48.696881
1241 12:07:48.700170 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1242 12:07:48.707332 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1243 12:07:48.713587 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1244 12:07:48.716953 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1245 12:07:48.720014 PCI: 00:17.0 18 * [0x60 - 0x67] io
1246 12:07:48.723421 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1247 12:07:48.730108 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1248 12:07:48.736640 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1249 12:07:48.743236 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1250 12:07:48.753065 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1251 12:07:48.759878 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1252 12:07:48.763308 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 12:07:48.769675 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1254 12:07:48.776546 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1255 12:07:48.780053 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1256 12:07:48.786654 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1257 12:07:48.789860 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1258 12:07:48.796456 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1259 12:07:48.799727 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1260 12:07:48.806387 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1261 12:07:48.809701 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1262 12:07:48.816438 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1263 12:07:48.819171 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1264 12:07:48.822592 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1265 12:07:48.829187 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1266 12:07:48.832904 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1267 12:07:48.839356 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1268 12:07:48.842767 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1269 12:07:48.849276 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1270 12:07:48.852678 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1271 12:07:48.859077 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1272 12:07:48.862670 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1273 12:07:48.869223 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1274 12:07:48.872184 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1275 12:07:48.878893 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1276 12:07:48.882174 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1277 12:07:48.892085 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1278 12:07:48.895804 avoid_fixed_resources: DOMAIN: 0000
1279 12:07:48.901992 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1280 12:07:48.905465 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1281 12:07:48.915625 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1282 12:07:48.921880 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1283 12:07:48.928902 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1284 12:07:48.938440 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1285 12:07:48.944975 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1286 12:07:48.951718 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1287 12:07:48.958448 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1288 12:07:48.962063
1289 12:07:48.968480 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1290 12:07:48.975092 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1291 12:07:48.981626 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1292 12:07:48.985345 Setting resources...
1293 12:07:48.991563 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1294 12:07:48.995102 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1295 12:07:48.998332 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1296 12:07:49.001765 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1297 12:07:49.008452 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1298 12:07:49.011354 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1299 12:07:49.018008 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1300 12:07:49.024784 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1301 12:07:49.034546 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1302 12:07:49.037866 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1303 12:07:49.044708 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1304 12:07:49.048302 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1305 12:07:49.051604 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1306 12:07:49.054876
1307 12:07:49.058026 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1308 12:07:49.061098 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1309 12:07:49.067656 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1310 12:07:49.070969 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1311 12:07:49.077968 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1312 12:07:49.081410 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1313 12:07:49.088264 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1314 12:07:49.090949 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1315 12:07:49.097819 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1316 12:07:49.101038 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1317 12:07:49.107760 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1318 12:07:49.110896 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1319 12:07:49.117721 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1320 12:07:49.120903 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1321 12:07:49.127614 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1322 12:07:49.131092 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1323 12:07:49.134042 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1324 12:07:49.140844 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1325 12:07:49.144062 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1326 12:07:49.153994 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1327 12:07:49.160618 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1328 12:07:49.167187 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1329 12:07:49.174163 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1330 12:07:49.180789 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1331 12:07:49.187405 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1332 12:07:49.190640 Root Device assign_resources, bus 0 link: 0
1333 12:07:49.197380 DOMAIN: 0000 assign_resources, bus 0 link: 0
1334 12:07:49.203686 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1335 12:07:49.213981 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1336 12:07:49.220413 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1337 12:07:49.230359 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1338 12:07:49.236956 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1339 12:07:49.246922 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1340 12:07:49.250433 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 12:07:49.253641 PCI: 00:14.0 assign_resources, bus 0 link: 0
1342 12:07:49.263759 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1343 12:07:49.270217 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1344 12:07:49.280126 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1345 12:07:49.286996 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1346 12:07:49.293735 PCI: 00:15.0 assign_resources, bus 1 link: 0
1347 12:07:49.297056 PCI: 00:15.0 assign_resources, bus 1 link: 0
1348 12:07:49.306557 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1349 12:07:49.309898 PCI: 00:15.1 assign_resources, bus 2 link: 0
1350 12:07:49.313118 PCI: 00:15.1 assign_resources, bus 2 link: 0
1351 12:07:49.323321 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1352 12:07:49.330032 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1353 12:07:49.339989 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1354 12:07:49.347092 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1355 12:07:49.353386 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1356 12:07:49.363365 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1357 12:07:49.370060 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1358 12:07:49.376772 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1359 12:07:49.382949 PCI: 00:19.0 assign_resources, bus 3 link: 0
1360 12:07:49.386626 PCI: 00:19.0 assign_resources, bus 3 link: 0
1361 12:07:49.396309 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1362 12:07:49.406687 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 12:07:49.413065 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1364 12:07:49.416011 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 12:07:49.426370 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1366 12:07:49.429726 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1367 12:07:49.439757 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1368 12:07:49.446314 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1369 12:07:49.452747 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1370 12:07:49.455928 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1371 12:07:49.466186 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1372 12:07:49.469294 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1373 12:07:49.472465 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1374 12:07:49.479294 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1375 12:07:49.482685 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 12:07:49.489467 LPC: Trying to open IO window from 800 size 1ff
1377 12:07:49.495803 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1378 12:07:49.505923 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1379 12:07:49.512315 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1380 12:07:49.522047 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1381 12:07:49.525680 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 12:07:49.532107 Root Device assign_resources, bus 0 link: 0
1383 12:07:49.532191 Done setting resources.
1384 12:07:49.538890 Show resources in subtree (Root Device)...After assigning values.
1385 12:07:49.545316 Root Device child on link 0 CPU_CLUSTER: 0
1386 12:07:49.548776 CPU_CLUSTER: 0 child on link 0 APIC: 00
1387 12:07:49.548862 APIC: 00
1388 12:07:49.552132 APIC: 02
1389 12:07:49.552222 APIC: 03
1390 12:07:49.552293 APIC: 01
1391 12:07:49.555375 APIC: 05
1392 12:07:49.555461 APIC: 04
1393 12:07:49.558849 APIC: 06
1394 12:07:49.558947 APIC: 07
1395 12:07:49.562124 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 12:07:49.572076 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1397 12:07:49.585141 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1398 12:07:49.585229 PCI: 00:00.0
1399 12:07:49.594718 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 12:07:49.604817 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 12:07:49.614688 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 12:07:49.621427 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 12:07:49.624925
1404 12:07:49.631442 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1405 12:07:49.641547 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1406 12:07:49.650841 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1407 12:07:49.660821 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1408 12:07:49.670821 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1409 12:07:49.677534 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1410 12:07:49.687251 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1411 12:07:49.697082 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1412 12:07:49.707132 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1413 12:07:49.717178 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1414 12:07:49.726809 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1415 12:07:49.733412 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1416 12:07:49.737088
1417 12:07:49.737176 PCI: 00:02.0
1418 12:07:49.747296 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1419 12:07:49.756493 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1420 12:07:49.766502 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1421 12:07:49.770244 PCI: 00:04.0
1422 12:07:49.770332 PCI: 00:08.0
1423 12:07:49.779793 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1424 12:07:49.783317 PCI: 00:12.0
1425 12:07:49.793225 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1426 12:07:49.796348 PCI: 00:14.0 child on link 0 USB0 port 0
1427 12:07:49.806626 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1428 12:07:49.812816 USB0 port 0 child on link 0 USB2 port 0
1429 12:07:49.812895 USB2 port 0
1430 12:07:49.816092 USB2 port 1
1431 12:07:49.816171 USB2 port 2
1432 12:07:49.819439 USB2 port 3
1433 12:07:49.819514 USB2 port 5
1434 12:07:49.822867 USB2 port 6
1435 12:07:49.822945 USB2 port 9
1436 12:07:49.826350 USB3 port 0
1437 12:07:49.829233 USB3 port 1
1438 12:07:49.829304 USB3 port 2
1439 12:07:49.832561 USB3 port 3
1440 12:07:49.832655 USB3 port 4
1441 12:07:49.835925 PCI: 00:14.2
1442 12:07:49.845693 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1443 12:07:49.855726 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1444 12:07:49.855830 PCI: 00:14.3
1445 12:07:49.865810 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1446 12:07:49.869216
1447 12:07:49.872547 PCI: 00:15.0 child on link 0 I2C: 01:15
1448 12:07:49.882270 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1449 12:07:49.882360 I2C: 01:15
1450 12:07:49.888748 PCI: 00:15.1 child on link 0 I2C: 02:5d
1451 12:07:49.898921 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1452 12:07:49.899010 I2C: 02:5d
1453 12:07:49.902016 GENERIC: 0.0
1454 12:07:49.902103 PCI: 00:16.0
1455 12:07:49.912413 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1456 12:07:49.915452 PCI: 00:17.0
1457 12:07:49.924952 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1458 12:07:49.934994 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1459 12:07:49.945028 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1460 12:07:49.954889 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1461 12:07:49.961436 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1462 12:07:49.971249 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1463 12:07:49.978002 PCI: 00:19.0 child on link 0 I2C: 03:1a
1464 12:07:49.987988 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1465 12:07:49.988077 I2C: 03:1a
1466 12:07:49.991333 I2C: 03:38
1467 12:07:49.991423 I2C: 03:39
1468 12:07:49.994835 I2C: 03:3a
1469 12:07:49.994922 I2C: 03:3b
1470 12:07:50.001368 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1471 12:07:50.007573 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1472 12:07:50.017636 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1473 12:07:50.030697 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1474 12:07:50.030813 PCI: 01:00.0
1475 12:07:50.040542 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1476 12:07:50.043983 PCI: 00:1e.0
1477 12:07:50.053956 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1478 12:07:50.063669 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1479 12:07:50.067120 PCI: 00:1e.2 child on link 0 SPI: 00
1480 12:07:50.080244 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1481 12:07:50.080325 SPI: 00
1482 12:07:50.083985 PCI: 00:1e.3 child on link 0 SPI: 01
1483 12:07:50.093423 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1484 12:07:50.096607 SPI: 01
1485 12:07:50.100131 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1486 12:07:50.109816 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1487 12:07:50.116262 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1488 12:07:50.119677 PNP: 0c09.0
1489 12:07:50.129977 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1490 12:07:50.130056 PCI: 00:1f.3
1491 12:07:50.139543 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1492 12:07:50.149239 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1493 12:07:50.152951 PCI: 00:1f.4
1494 12:07:50.162378 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1495 12:07:50.172638 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1496 12:07:50.172726 PCI: 00:1f.5
1497 12:07:50.182509 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1498 12:07:50.185594 Done allocating resources.
1499 12:07:50.192190 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1500 12:07:50.195562 Enabling resources...
1501 12:07:50.199215 PCI: 00:00.0 subsystem <- 8086/9b61
1502 12:07:50.202141 PCI: 00:00.0 cmd <- 06
1503 12:07:50.205745 PCI: 00:02.0 subsystem <- 8086/9b41
1504 12:07:50.209095 PCI: 00:02.0 cmd <- 03
1505 12:07:50.209182 PCI: 00:08.0 cmd <- 06
1506 12:07:50.215340 PCI: 00:12.0 subsystem <- 8086/02f9
1507 12:07:50.215427 PCI: 00:12.0 cmd <- 02
1508 12:07:50.218566 PCI: 00:14.0 subsystem <- 8086/02ed
1509 12:07:50.222260 PCI: 00:14.0 cmd <- 02
1510 12:07:50.225259 PCI: 00:14.2 cmd <- 02
1511 12:07:50.228916 PCI: 00:14.3 subsystem <- 8086/02f0
1512 12:07:50.231848 PCI: 00:14.3 cmd <- 02
1513 12:07:50.235136 PCI: 00:15.0 subsystem <- 8086/02e8
1514 12:07:50.238444 PCI: 00:15.0 cmd <- 02
1515 12:07:50.241934 PCI: 00:15.1 subsystem <- 8086/02e9
1516 12:07:50.245008 PCI: 00:15.1 cmd <- 02
1517 12:07:50.248420 PCI: 00:16.0 subsystem <- 8086/02e0
1518 12:07:50.251519 PCI: 00:16.0 cmd <- 02
1519 12:07:50.254981 PCI: 00:17.0 subsystem <- 8086/02d3
1520 12:07:50.255070 PCI: 00:17.0 cmd <- 03
1521 12:07:50.258158
1522 12:07:50.261699 PCI: 00:19.0 subsystem <- 8086/02c5
1523 12:07:50.261786 PCI: 00:19.0 cmd <- 02
1524 12:07:50.264860 PCI: 00:1d.0 bridge ctrl <- 0013
1525 12:07:50.271458 PCI: 00:1d.0 subsystem <- 8086/02b0
1526 12:07:50.271546 PCI: 00:1d.0 cmd <- 06
1527 12:07:50.274765 PCI: 00:1e.0 subsystem <- 8086/02a8
1528 12:07:50.278213
1529 12:07:50.278301 PCI: 00:1e.0 cmd <- 06
1530 12:07:50.281592 PCI: 00:1e.2 subsystem <- 8086/02aa
1531 12:07:50.284717 PCI: 00:1e.2 cmd <- 06
1532 12:07:50.287725 PCI: 00:1e.3 subsystem <- 8086/02ab
1533 12:07:50.291263 PCI: 00:1e.3 cmd <- 02
1534 12:07:50.294437 PCI: 00:1f.0 subsystem <- 8086/0284
1535 12:07:50.297790 PCI: 00:1f.0 cmd <- 407
1536 12:07:50.301217 PCI: 00:1f.3 subsystem <- 8086/02c8
1537 12:07:50.304758 PCI: 00:1f.3 cmd <- 02
1538 12:07:50.307922 PCI: 00:1f.4 subsystem <- 8086/02a3
1539 12:07:50.310953 PCI: 00:1f.4 cmd <- 03
1540 12:07:50.314305 PCI: 00:1f.5 subsystem <- 8086/02a4
1541 12:07:50.317467 PCI: 00:1f.5 cmd <- 406
1542 12:07:50.325469 PCI: 01:00.0 cmd <- 02
1543 12:07:50.330481 done.
1544 12:07:50.343562 ME: Version: 14.0.39.1367
1545 12:07:50.349930 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1546 12:07:50.353263 Initializing devices...
1547 12:07:50.353351 Root Device init ...
1548 12:07:50.360043 Chrome EC: Set SMI mask to 0x0000000000000000
1549 12:07:50.363204 Chrome EC: clear events_b mask to 0x0000000000000000
1550 12:07:50.370059 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1551 12:07:50.376479 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1552 12:07:50.383091 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1553 12:07:50.386289 Chrome EC: Set WAKE mask to 0x0000000000000000
1554 12:07:50.389511 Root Device init finished in 35165 usecs
1555 12:07:50.393771 CPU_CLUSTER: 0 init ...
1556 12:07:50.396749 CPU_CLUSTER: 0 init finished in 2447 usecs
1557 12:07:50.399872
1558 12:07:50.403971 PCI: 00:00.0 init ...
1559 12:07:50.407726 CPU TDP: 15 Watts
1560 12:07:50.411258 CPU PL2 = 64 Watts
1561 12:07:50.414103 PCI: 00:00.0 init finished in 7079 usecs
1562 12:07:50.417597 PCI: 00:02.0 init ...
1563 12:07:50.420780 PCI: 00:02.0 init finished in 2252 usecs
1564 12:07:50.424343 PCI: 00:08.0 init ...
1565 12:07:50.427483 PCI: 00:08.0 init finished in 2251 usecs
1566 12:07:50.430646 PCI: 00:12.0 init ...
1567 12:07:50.433915 PCI: 00:12.0 init finished in 2243 usecs
1568 12:07:50.437697 PCI: 00:14.0 init ...
1569 12:07:50.440602 PCI: 00:14.0 init finished in 2252 usecs
1570 12:07:50.443980 PCI: 00:14.2 init ...
1571 12:07:50.447283 PCI: 00:14.2 init finished in 2252 usecs
1572 12:07:50.450543 PCI: 00:14.3 init ...
1573 12:07:50.453864 PCI: 00:14.3 init finished in 2270 usecs
1574 12:07:50.457511 PCI: 00:15.0 init ...
1575 12:07:50.460456 DW I2C bus 0 at 0xd121f000 (400 KHz)
1576 12:07:50.463830 PCI: 00:15.0 init finished in 5966 usecs
1577 12:07:50.467323 PCI: 00:15.1 init ...
1578 12:07:50.470695 DW I2C bus 1 at 0xd1220000 (400 KHz)
1579 12:07:50.473907 PCI: 00:15.1 init finished in 5974 usecs
1580 12:07:50.477525 PCI: 00:16.0 init ...
1581 12:07:50.480438 PCI: 00:16.0 init finished in 2242 usecs
1582 12:07:50.484508 PCI: 00:19.0 init ...
1583 12:07:50.487836 DW I2C bus 4 at 0xd1222000 (400 KHz)
1584 12:07:50.491062 PCI: 00:19.0 init finished in 5977 usecs
1585 12:07:50.494457
1586 12:07:50.494548 PCI: 00:1d.0 init ...
1587 12:07:50.497577 Initializing PCH PCIe bridge.
1588 12:07:50.501076 PCI: 00:1d.0 init finished in 5274 usecs
1589 12:07:50.505860 PCI: 00:1f.0 init ...
1590 12:07:50.509220 IOAPIC: Initializing IOAPIC at 0xfec00000
1591 12:07:50.516063 IOAPIC: Bootstrap Processor Local APIC = 0x00
1592 12:07:50.516145 IOAPIC: ID = 0x02
1593 12:07:50.519231 IOAPIC: Dumping registers
1594 12:07:50.522473 reg 0x0000: 0x02000000
1595 12:07:50.525570 reg 0x0001: 0x00770020
1596 12:07:50.525654 reg 0x0002: 0x00000000
1597 12:07:50.532897 PCI: 00:1f.0 init finished in 23540 usecs
1598 12:07:50.536269 PCI: 00:1f.4 init ...
1599 12:07:50.539140 PCI: 00:1f.4 init finished in 2262 usecs
1600 12:07:50.550038 PCI: 01:00.0 init ...
1601 12:07:50.553701 PCI: 01:00.0 init finished in 2252 usecs
1602 12:07:50.557900 PNP: 0c09.0 init ...
1603 12:07:50.560973 Google Chrome EC uptime: 11.097 seconds
1604 12:07:50.568170 Google Chrome AP resets since EC boot: 0
1605 12:07:50.570868 Google Chrome most recent AP reset causes:
1606 12:07:50.577771 Google Chrome EC reset flags at last EC boot: reset-pin
1607 12:07:50.581081 PNP: 0c09.0 init finished in 20598 usecs
1608 12:07:50.584444 Devices initialized
1609 12:07:50.584562 Show all devs... After init.
1610 12:07:50.587825 Root Device: enabled 1
1611 12:07:50.590659 CPU_CLUSTER: 0: enabled 1
1612 12:07:50.594133 DOMAIN: 0000: enabled 1
1613 12:07:50.594220 APIC: 00: enabled 1
1614 12:07:50.597740 PCI: 00:00.0: enabled 1
1615 12:07:50.600991 PCI: 00:02.0: enabled 1
1616 12:07:50.603940 PCI: 00:04.0: enabled 0
1617 12:07:50.604027 PCI: 00:05.0: enabled 0
1618 12:07:50.607291 PCI: 00:12.0: enabled 1
1619 12:07:50.610691 PCI: 00:12.5: enabled 0
1620 12:07:50.610778 PCI: 00:12.6: enabled 0
1621 12:07:50.614117 PCI: 00:14.0: enabled 1
1622 12:07:50.617950 PCI: 00:14.1: enabled 0
1623 12:07:50.621194 PCI: 00:14.3: enabled 1
1624 12:07:50.621280 PCI: 00:14.5: enabled 0
1625 12:07:50.624038 PCI: 00:15.0: enabled 1
1626 12:07:50.627454 PCI: 00:15.1: enabled 1
1627 12:07:50.630726 PCI: 00:15.2: enabled 0
1628 12:07:50.630814 PCI: 00:15.3: enabled 0
1629 12:07:50.633740 PCI: 00:16.0: enabled 1
1630 12:07:50.637152 PCI: 00:16.1: enabled 0
1631 12:07:50.640644 PCI: 00:16.2: enabled 0
1632 12:07:50.640733 PCI: 00:16.3: enabled 0
1633 12:07:50.643595 PCI: 00:16.4: enabled 0
1634 12:07:50.646982 PCI: 00:16.5: enabled 0
1635 12:07:50.647064 PCI: 00:17.0: enabled 1
1636 12:07:50.650293
1637 12:07:50.650374 PCI: 00:19.0: enabled 1
1638 12:07:50.653845 PCI: 00:19.1: enabled 0
1639 12:07:50.656896 PCI: 00:19.2: enabled 0
1640 12:07:50.656970 PCI: 00:1a.0: enabled 0
1641 12:07:50.660622 PCI: 00:1c.0: enabled 0
1642 12:07:50.663841 PCI: 00:1c.1: enabled 0
1643 12:07:50.666752 PCI: 00:1c.2: enabled 0
1644 12:07:50.666834 PCI: 00:1c.3: enabled 0
1645 12:07:50.670193 PCI: 00:1c.4: enabled 0
1646 12:07:50.673591 PCI: 00:1c.5: enabled 0
1647 12:07:50.676635 PCI: 00:1c.6: enabled 0
1648 12:07:50.676724 PCI: 00:1c.7: enabled 0
1649 12:07:50.680314 PCI: 00:1d.0: enabled 1
1650 12:07:50.683840 PCI: 00:1d.1: enabled 0
1651 12:07:50.686896 PCI: 00:1d.2: enabled 0
1652 12:07:50.686979 PCI: 00:1d.3: enabled 0
1653 12:07:50.690439 PCI: 00:1d.4: enabled 0
1654 12:07:50.693400 PCI: 00:1d.5: enabled 0
1655 12:07:50.693507 PCI: 00:1e.0: enabled 1
1656 12:07:50.696667 PCI: 00:1e.1: enabled 0
1657 12:07:50.700380 PCI: 00:1e.2: enabled 1
1658 12:07:50.703414 PCI: 00:1e.3: enabled 1
1659 12:07:50.703505 PCI: 00:1f.0: enabled 1
1660 12:07:50.706756 PCI: 00:1f.1: enabled 0
1661 12:07:50.710164 PCI: 00:1f.2: enabled 0
1662 12:07:50.713403 PCI: 00:1f.3: enabled 1
1663 12:07:50.713494 PCI: 00:1f.4: enabled 1
1664 12:07:50.717128 PCI: 00:1f.5: enabled 1
1665 12:07:50.719738 PCI: 00:1f.6: enabled 0
1666 12:07:50.723442 USB0 port 0: enabled 1
1667 12:07:50.723520 I2C: 01:15: enabled 1
1668 12:07:50.726281 I2C: 02:5d: enabled 1
1669 12:07:50.729652 GENERIC: 0.0: enabled 1
1670 12:07:50.729729 I2C: 03:1a: enabled 1
1671 12:07:50.733519 I2C: 03:38: enabled 1
1672 12:07:50.736453 I2C: 03:39: enabled 1
1673 12:07:50.736541 I2C: 03:3a: enabled 1
1674 12:07:50.739648 I2C: 03:3b: enabled 1
1675 12:07:50.743137 PCI: 00:00.0: enabled 1
1676 12:07:50.743233 SPI: 00: enabled 1
1677 12:07:50.746525 SPI: 01: enabled 1
1678 12:07:50.750072 PNP: 0c09.0: enabled 1
1679 12:07:50.750158 USB2 port 0: enabled 1
1680 12:07:50.752868 USB2 port 1: enabled 1
1681 12:07:50.756451 USB2 port 2: enabled 0
1682 12:07:50.756538 USB2 port 3: enabled 0
1683 12:07:50.759355 USB2 port 5: enabled 0
1684 12:07:50.762789 USB2 port 6: enabled 1
1685 12:07:50.766262 USB2 port 9: enabled 1
1686 12:07:50.766358 USB3 port 0: enabled 1
1687 12:07:50.769367 USB3 port 1: enabled 1
1688 12:07:50.772616 USB3 port 2: enabled 1
1689 12:07:50.772703 USB3 port 3: enabled 1
1690 12:07:50.776213 USB3 port 4: enabled 0
1691 12:07:50.779385 APIC: 02: enabled 1
1692 12:07:50.779471 APIC: 03: enabled 1
1693 12:07:50.782705 APIC: 01: enabled 1
1694 12:07:50.786192 APIC: 05: enabled 1
1695 12:07:50.786308 APIC: 04: enabled 1
1696 12:07:50.789140 APIC: 06: enabled 1
1697 12:07:50.789235 APIC: 07: enabled 1
1698 12:07:50.792593 PCI: 00:08.0: enabled 1
1699 12:07:50.795799 PCI: 00:14.2: enabled 1
1700 12:07:50.798919 PCI: 01:00.0: enabled 1
1701 12:07:50.802442 Disabling ACPI via APMC:
1702 12:07:50.802528 done.
1703 12:07:50.809094 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1704 12:07:50.812690 ELOG: NV offset 0xaf0000 size 0x4000
1705 12:07:50.819227 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1706 12:07:50.825945 ELOG: Event(17) added with size 13 at 2023-01-24 12:07:50 UTC
1707 12:07:50.832683 ELOG: Event(92) added with size 9 at 2023-01-24 12:07:50 UTC
1708 12:07:50.839194 ELOG: Event(93) added with size 9 at 2023-01-24 12:07:50 UTC
1709 12:07:50.845995 ELOG: Event(9A) added with size 9 at 2023-01-24 12:07:50 UTC
1710 12:07:50.852758 ELOG: Event(9E) added with size 10 at 2023-01-24 12:07:50 UTC
1711 12:07:50.859367 ELOG: Event(9F) added with size 14 at 2023-01-24 12:07:50 UTC
1712 12:07:50.862781 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1713 12:07:50.869747 ELOG: Event(A1) added with size 10 at 2023-01-24 12:07:50 UTC
1714 12:07:50.879525 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1715 12:07:50.886106 ELOG: Event(A0) added with size 9 at 2023-01-24 12:07:50 UTC
1716 12:07:50.889324 elog_add_boot_reason: Logged dev mode boot
1717 12:07:50.889411 Finalize devices...
1718 12:07:50.892730
1719 12:07:50.892817 PCI: 00:17.0 final
1720 12:07:50.896264 Devices finalized
1721 12:07:50.899458 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1722 12:07:50.906506 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1723 12:07:50.909186 ME: HFSTS1 : 0x90000245
1724 12:07:50.912523 ME: HFSTS2 : 0x3B850126
1725 12:07:50.919383 ME: HFSTS3 : 0x00000020
1726 12:07:50.922623 ME: HFSTS4 : 0x00004800
1727 12:07:50.926220 ME: HFSTS5 : 0x00000000
1728 12:07:50.928943 ME: HFSTS6 : 0x40400006
1729 12:07:50.932310 ME: Manufacturing Mode : NO
1730 12:07:50.935743 ME: FW Partition Table : OK
1731 12:07:50.939119 ME: Bringup Loader Failure : NO
1732 12:07:50.942530 ME: Firmware Init Complete : YES
1733 12:07:50.945661 ME: Boot Options Present : NO
1734 12:07:50.948864 ME: Update In Progress : NO
1735 12:07:50.952527 ME: D0i3 Support : YES
1736 12:07:50.955663 ME: Low Power State Enabled : NO
1737 12:07:50.959166 ME: CPU Replaced : NO
1738 12:07:50.962658 ME: CPU Replacement Valid : YES
1739 12:07:50.965445 ME: Current Working State : 5
1740 12:07:50.968744 ME: Current Operation State : 1
1741 12:07:50.972289 ME: Current Operation Mode : 0
1742 12:07:50.975478 ME: Error Code : 0
1743 12:07:50.978687 ME: CPU Debug Disabled : YES
1744 12:07:50.982034 ME: TXT Support : NO
1745 12:07:50.988648 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1746 12:07:50.995345 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1747 12:07:50.995530 CBFS @ c08000 size 3f8000
1748 12:07:51.001960 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1749 12:07:51.005332 CBFS: Locating 'fallback/dsdt.aml'
1750 12:07:51.008885 CBFS: Found @ offset 10bb80 size 3fa5
1751 12:07:51.015393 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1752 12:07:51.018816 CBFS @ c08000 size 3f8000
1753 12:07:51.022128 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1754 12:07:51.025239 CBFS: Locating 'fallback/slic'
1755 12:07:51.030882 CBFS: 'fallback/slic' not found.
1756 12:07:51.037440 ACPI: Writing ACPI tables at 99b3e000.
1757 12:07:51.037972 ACPI: * FACS
1758 12:07:51.041234 ACPI: * DSDT
1759 12:07:51.043802 Ramoops buffer: 0x100000@0x99a3d000.
1760 12:07:51.047036 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1761 12:07:51.053845 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1762 12:07:51.057004 Google Chrome EC: version:
1763 12:07:51.060260 ro: helios_v2.0.2659-56403530b
1764 12:07:51.063428 rw: helios_v2.0.2849-c41de27e7d
1765 12:07:51.064059 running image: 1
1766 12:07:51.068229 ACPI: * FADT
1767 12:07:51.068726 SCI is IRQ9
1768 12:07:51.071318 ACPI: added table 1/32, length now 40
1769 12:07:51.074526
1770 12:07:51.074979 ACPI: * SSDT
1771 12:07:51.078247 Found 1 CPU(s) with 8 core(s) each.
1772 12:07:51.081306 Error: Could not locate 'wifi_sar' in VPD.
1773 12:07:51.087576 Checking CBFS for default SAR values
1774 12:07:51.090986 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1775 12:07:51.094476 CBFS @ c08000 size 3f8000
1776 12:07:51.100926 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1777 12:07:51.104563 CBFS: Locating 'wifi_sar_defaults.hex'
1778 12:07:51.107831 CBFS: Found @ offset 5fac0 size 77
1779 12:07:51.111032 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1780 12:07:51.117710 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1781 12:07:51.120880 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1782 12:07:51.127658 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1783 12:07:51.131087 failed to find key in VPD: dsm_calib_r0_0
1784 12:07:51.140873 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1785 12:07:51.143985 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1786 12:07:51.147244 failed to find key in VPD: dsm_calib_r0_1
1787 12:07:51.157375 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1788 12:07:51.163771 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1789 12:07:51.167120 failed to find key in VPD: dsm_calib_r0_2
1790 12:07:51.177133 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1791 12:07:51.180320 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1792 12:07:51.187032 failed to find key in VPD: dsm_calib_r0_3
1793 12:07:51.193846 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1794 12:07:51.200140 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1795 12:07:51.203578 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1796 12:07:51.207084 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1797 12:07:51.211031 EC returned error result code 1
1798 12:07:51.214701 EC returned error result code 1
1799 12:07:51.218162
1800 12:07:51.221600 EC returned error result code 1
1801 12:07:51.224352 PS2K: Bad resp from EC. Vivaldi disabled!
1802 12:07:51.231066 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1803 12:07:51.234501 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1804 12:07:51.241316 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1805 12:07:51.244426 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1806 12:07:51.250940 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1807 12:07:51.257737 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1808 12:07:51.264224 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1809 12:07:51.270988 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1810 12:07:51.274225 ACPI: added table 2/32, length now 44
1811 12:07:51.274718 ACPI: * MCFG
1812 12:07:51.277176 ACPI: added table 3/32, length now 48
1813 12:07:51.280938 ACPI: * TPM2
1814 12:07:51.284339 TPM2 log created at 99a2d000
1815 12:07:51.287464 ACPI: added table 4/32, length now 52
1816 12:07:51.287957 ACPI: * MADT
1817 12:07:51.290839 SCI is IRQ9
1818 12:07:51.294211 ACPI: added table 5/32, length now 56
1819 12:07:51.294709 current = 99b43ac0
1820 12:07:51.297115 ACPI: * DMAR
1821 12:07:51.300804 ACPI: added table 6/32, length now 60
1822 12:07:51.303883 ACPI: * IGD OpRegion
1823 12:07:51.307032 GMA: Found VBT in CBFS
1824 12:07:51.307528 GMA: Found valid VBT in CBFS
1825 12:07:51.314292 ACPI: added table 7/32, length now 64
1826 12:07:51.314896 ACPI: * HPET
1827 12:07:51.317237 ACPI: added table 8/32, length now 68
1828 12:07:51.320585 ACPI: done.
1829 12:07:51.321083 ACPI tables: 31744 bytes.
1830 12:07:51.323757 smbios_write_tables: 99a2c000
1831 12:07:51.327422 EC returned error result code 3
1832 12:07:51.330617 Couldn't obtain OEM name from CBI
1833 12:07:51.334196 Create SMBIOS type 17
1834 12:07:51.337584 PCI: 00:00.0 (Intel Cannonlake)
1835 12:07:51.341081 PCI: 00:14.3 (Intel WiFi)
1836 12:07:51.344534 SMBIOS tables: 939 bytes.
1837 12:07:51.348033 Writing table forward entry at 0x00000500
1838 12:07:51.354071 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1839 12:07:51.357378 Writing coreboot table at 0x99b62000
1840 12:07:51.364299 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1841 12:07:51.367203 1. 0000000000001000-000000000009ffff: RAM
1842 12:07:51.371369 2. 00000000000a0000-00000000000fffff: RESERVED
1843 12:07:51.377341 3. 0000000000100000-0000000099a2bfff: RAM
1844 12:07:51.383756 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1845 12:07:51.386989 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1846 12:07:51.393753 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1847 12:07:51.397298 7. 000000009a000000-000000009f7fffff: RESERVED
1848 12:07:51.403744 8. 00000000e0000000-00000000efffffff: RESERVED
1849 12:07:51.407002 9. 00000000fc000000-00000000fc000fff: RESERVED
1850 12:07:51.413545 10. 00000000fe000000-00000000fe00ffff: RESERVED
1851 12:07:51.417575 11. 00000000fed10000-00000000fed17fff: RESERVED
1852 12:07:51.420314 12. 00000000fed80000-00000000fed83fff: RESERVED
1853 12:07:51.427135 13. 00000000fed90000-00000000fed91fff: RESERVED
1854 12:07:51.430614 14. 00000000feda0000-00000000feda1fff: RESERVED
1855 12:07:51.436598 15. 0000000100000000-000000045e7fffff: RAM
1856 12:07:51.439902 Graphics framebuffer located at 0xc0000000
1857 12:07:51.443538 Passing 5 GPIOs to payload:
1858 12:07:51.446768 NAME | PORT | POLARITY | VALUE
1859 12:07:51.453833 write protect | undefined | high | low
1860 12:07:51.460145 lid | undefined | high | high
1861 12:07:51.463621 power | undefined | high | low
1862 12:07:51.469785 oprom | undefined | high | low
1863 12:07:51.473321 EC in RW | 0x000000cb | high | low
1864 12:07:51.476543 Board ID: 4
1865 12:07:51.479769 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1866 12:07:51.483128 CBFS @ c08000 size 3f8000
1867 12:07:51.490030 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1868 12:07:51.496171 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1869 12:07:51.496720 coreboot table: 1492 bytes.
1870 12:07:51.499966 IMD ROOT 0. 99fff000 00001000
1871 12:07:51.502845 IMD SMALL 1. 99ffe000 00001000
1872 12:07:51.506041
1873 12:07:51.506659 FSP MEMORY 2. 99c4e000 003b0000
1874 12:07:51.509716
1875 12:07:51.510258 CONSOLE 3. 99c2e000 00020000
1876 12:07:51.513098
1877 12:07:51.513668 FMAP 4. 99c2d000 0000054e
1878 12:07:51.516102
1879 12:07:51.519506 TIME STAMP 5. 99c2c000 00000910
1880 12:07:51.522659 VBOOT WORK 6. 99c18000 00014000
1881 12:07:51.526370 MRC DATA 7. 99c16000 00001958
1882 12:07:51.529533 ROMSTG STCK 8. 99c15000 00001000
1883 12:07:51.532776 AFTER CAR 9. 99c0b000 0000a000
1884 12:07:51.535758 RAMSTAGE 10. 99baf000 0005c000
1885 12:07:51.539380 REFCODE 11. 99b7a000 00035000
1886 12:07:51.542765 SMM BACKUP 12. 99b6a000 00010000
1887 12:07:51.546232 COREBOOT 13. 99b62000 00008000
1888 12:07:51.549734 ACPI 14. 99b3e000 00024000
1889 12:07:51.552680 ACPI GNVS 15. 99b3d000 00001000
1890 12:07:51.556311 RAMOOPS 16. 99a3d000 00100000
1891 12:07:51.559135 TPM2 TCGLOG17. 99a2d000 00010000
1892 12:07:51.562559 SMBIOS 18. 99a2c000 00000800
1893 12:07:51.563103 IMD small region:
1894 12:07:51.565916 IMD ROOT 0. 99ffec00 00000400
1895 12:07:51.569447 FSP RUNTIME 1. 99ffebe0 00000004
1896 12:07:51.572844 EC HOSTEVENT 2. 99ffebc0 00000008
1897 12:07:51.576349 POWER STATE 3. 99ffeb80 00000040
1898 12:07:51.579422 ROMSTAGE 4. 99ffeb60 00000004
1899 12:07:51.582618 MEM INFO 5. 99ffe9a0 000001b9
1900 12:07:51.585866
1901 12:07:51.589234 VPD 6. 99ffe920 0000006c
1902 12:07:51.589753 MTRR: Physical address space:
1903 12:07:51.595873 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1904 12:07:51.602168 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1905 12:07:51.609267 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1906 12:07:51.616002 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1907 12:07:51.622636 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1908 12:07:51.628803 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1909 12:07:51.635563 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1910 12:07:51.639161 MTRR: Fixed MSR 0x250 0x0606060606060606
1911 12:07:51.642267 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 12:07:51.645735 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 12:07:51.652439 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 12:07:51.655408 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 12:07:51.658671 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 12:07:51.661827 MTRR: Fixed MSR 0x26b 0x0606060606060606
1917 12:07:51.668643 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 12:07:51.672262 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 12:07:51.675628 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 12:07:51.678542 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 12:07:51.682003 call enable_fixed_mtrr()
1922 12:07:51.685415 CPU physical address size: 39 bits
1923 12:07:51.692459 MTRR: default type WB/UC MTRR counts: 6/8.
1924 12:07:51.695431 MTRR: WB selected as default type.
1925 12:07:51.701926 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1926 12:07:51.705445 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1927 12:07:51.712299 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1928 12:07:51.718570 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1929 12:07:51.725251 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1930 12:07:51.731793 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1931 12:07:51.734726 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 12:07:51.741592 MTRR: Fixed MSR 0x258 0x0606060606060606
1933 12:07:51.744641 MTRR: Fixed MSR 0x259 0x0000000000000000
1934 12:07:51.748274 MTRR: Fixed MSR 0x268 0x0606060606060606
1935 12:07:51.751597 MTRR: Fixed MSR 0x269 0x0606060606060606
1936 12:07:51.758400 MTRR: Fixed MSR 0x26a 0x0606060606060606
1937 12:07:51.761391 MTRR: Fixed MSR 0x26b 0x0606060606060606
1938 12:07:51.764876 MTRR: Fixed MSR 0x26c 0x0606060606060606
1939 12:07:51.768058 MTRR: Fixed MSR 0x26d 0x0606060606060606
1940 12:07:51.774920 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 12:07:51.778308 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 12:07:51.778811
1943 12:07:51.779210 MTRR check
1944 12:07:51.781129 Fixed MTRRs : Enabled
1945 12:07:51.784803 Variable MTRRs: Enabled
1946 12:07:51.785452
1947 12:07:51.787790 call enable_fixed_mtrr()
1948 12:07:51.791361 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1949 12:07:51.794803 CPU physical address size: 39 bits
1950 12:07:51.801603 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1951 12:07:51.804771 CBFS @ c08000 size 3f8000
1952 12:07:51.808164 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1953 12:07:51.814749 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 12:07:51.818399 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 12:07:51.821560 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 12:07:51.824933 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 12:07:51.831506 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 12:07:51.835135 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 12:07:51.838066 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 12:07:51.841032 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 12:07:51.844533 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 12:07:51.847986
1963 12:07:51.851571 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 12:07:51.854569 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 12:07:51.857917 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 12:07:51.864443 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 12:07:51.865043 call enable_fixed_mtrr()
1968 12:07:51.871151 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 12:07:51.874491 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 12:07:51.877571 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 12:07:51.881227 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 12:07:51.884053 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 12:07:51.887575
1974 12:07:51.890599 MTRR: Fixed MSR 0x26c 0x0606060606060606
1975 12:07:51.894158 MTRR: Fixed MSR 0x26d 0x0606060606060606
1976 12:07:51.897293 MTRR: Fixed MSR 0x26e 0x0606060606060606
1977 12:07:51.900669 MTRR: Fixed MSR 0x26f 0x0606060606060606
1978 12:07:51.907360 CPU physical address size: 39 bits
1979 12:07:51.907870 call enable_fixed_mtrr()
1980 12:07:51.910578
1981 12:07:51.913919 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 12:07:51.917163 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 12:07:51.920681 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 12:07:51.923730 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 12:07:51.930762 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 12:07:51.933749 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 12:07:51.937058 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 12:07:51.940388 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 12:07:51.946866 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 12:07:51.950677 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 12:07:51.953355 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 12:07:51.956791 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 12:07:51.963918 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 12:07:51.964506 call enable_fixed_mtrr()
1995 12:07:51.970095 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 12:07:51.973543 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 12:07:51.976929 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 12:07:51.980175 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 12:07:51.986893 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 12:07:51.990147 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 12:07:51.993198 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 12:07:51.996842 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 12:07:52.003683 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 12:07:52.006102 CPU physical address size: 39 bits
2005 12:07:52.009842 call enable_fixed_mtrr()
2006 12:07:52.013194 CBFS: Locating 'fallback/payload'
2007 12:07:52.016287 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 12:07:52.019940 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 12:07:52.022893 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 12:07:52.029896 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 12:07:52.033140 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 12:07:52.035824 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 12:07:52.039219 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 12:07:52.046430 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 12:07:52.049618 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 12:07:52.052802 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 12:07:52.055969 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 12:07:52.062799 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 12:07:52.063386 call enable_fixed_mtrr()
2020 12:07:52.069519 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 12:07:52.072939 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 12:07:52.076351 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 12:07:52.079522 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 12:07:52.083328 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 12:07:52.085820
2026 12:07:52.089400 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 12:07:52.092373 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 12:07:52.095816 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 12:07:52.098882 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 12:07:52.105589 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 12:07:52.109436 CPU physical address size: 39 bits
2032 12:07:52.112297 call enable_fixed_mtrr()
2033 12:07:52.115707 CPU physical address size: 39 bits
2034 12:07:52.118907 CPU physical address size: 39 bits
2035 12:07:52.122206 CBFS: Found @ offset 1c96c0 size 3f798
2036 12:07:52.125642 CPU physical address size: 39 bits
2037 12:07:52.128738 Checking segment from ROM address 0xffdd16f8
2038 12:07:52.135838 Checking segment from ROM address 0xffdd1714
2039 12:07:52.138941 Loading segment from ROM address 0xffdd16f8
2040 12:07:52.142028 code (compression=0)
2041 12:07:52.148763 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2042 12:07:52.158747 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2043 12:07:52.162056 it's not compressed!
2044 12:07:52.253295 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2045 12:07:52.259340 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2046 12:07:52.262480 Loading segment from ROM address 0xffdd1714
2047 12:07:52.265932 Entry Point 0x30000000
2048 12:07:52.269430 Loaded segments
2049 12:07:52.275345 Finalizing chipset.
2050 12:07:52.278318 Finalizing SMM.
2051 12:07:52.281776 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2052 12:07:52.285272 mp_park_aps done after 0 msecs.
2053 12:07:52.291599 Jumping to boot code at 30000000(99b62000)
2054 12:07:52.298362 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2055 12:07:52.298980
2056 12:07:52.299588
2057 12:07:52.300030
2058 12:07:52.301630 Starting depthcharge on Helios...
2059 12:07:52.302154
2060 12:07:52.303506 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2061 12:07:52.304160 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2062 12:07:52.304821 Setting prompt string to ['hatch:']
2063 12:07:52.305348 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2064 12:07:52.311369 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2065 12:07:52.311868
2066 12:07:52.317892 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2067 12:07:52.318510
2068 12:07:52.324662 board_setup: Info: eMMC controller not present; skipping
2069 12:07:52.325243
2070 12:07:52.327450 New NVMe Controller 0x30053ac0 @ 00:1d:00
2071 12:07:52.327944
2072 12:07:52.334304 board_setup: Info: SDHCI controller not present; skipping
2073 12:07:52.334897
2074 12:07:52.340655 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2075 12:07:52.341233
2076 12:07:52.341673 Wipe memory regions:
2077 12:07:52.342047
2078 12:07:52.344486 [0x00000000001000, 0x000000000a0000)
2079 12:07:52.344978
2080 12:07:52.347640 [0x00000000100000, 0x00000030000000)
2081 12:07:52.350404
2082 12:07:52.417351 [0x00000030657430, 0x00000099a2c000)
2083 12:07:52.417974
2084 12:07:52.557775 [0x00000100000000, 0x0000045e800000)
2085 12:07:52.558373
2086 12:07:53.940103 R8152: Initializing
2087 12:07:53.940741
2088 12:07:53.942642 Version 9 (ocp_data = 6010)
2089 12:07:53.943277
2090 12:07:53.947327 R8152: Done initializing
2091 12:07:53.947994
2092 12:07:53.950671 Adding net device
2093 12:07:53.951175
2094 12:07:54.559644 R8152: Initializing
2095 12:07:54.560231
2096 12:07:54.563168 Version 6 (ocp_data = 5c30)
2097 12:07:54.563656
2098 12:07:54.566283 R8152: Done initializing
2099 12:07:54.566369
2100 12:07:54.569297 net_add_device: Attemp to include the same device
2101 12:07:54.573092
2102 12:07:54.580313 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2103 12:07:54.580496
2104 12:07:54.580589
2105 12:07:54.580676
2106 12:07:54.580994 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2108 12:07:54.682264 hatch: tftpboot 192.168.201.1 8853707/tftp-deploy-x_5l6max/kernel/bzImage 8853707/tftp-deploy-x_5l6max/kernel/cmdline 8853707/tftp-deploy-x_5l6max/ramdisk/ramdisk.cpio.gz
2109 12:07:54.683002 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2110 12:07:54.683565 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2111 12:07:54.687947 tftpboot 192.168.201.1 8853707/tftp-deploy-x_5l6max/kernel/bzImy-x_5l6max/kernel/cmdline 8853707/tftp-deploy-x_5l6max/ramdisk/ramdisk.cpio.gz
2112 12:07:54.688456
2113 12:07:54.688846 Waiting for link
2114 12:07:54.689206
2115 12:07:54.889035 done.
2116 12:07:54.889669
2117 12:07:54.890082 MAC: 00:24:32:50:1a:5f
2118 12:07:54.890525
2119 12:07:54.892153 Sending DHCP discover... done.
2120 12:07:54.892716
2121 12:07:54.895849 Waiting for reply... done.
2122 12:07:54.896490
2123 12:07:54.898460 Sending DHCP request... done.
2124 12:07:54.898958
2125 12:07:54.902448 Waiting for reply... done.
2126 12:07:54.903045
2127 12:07:54.905349 My ip is 192.168.201.21
2128 12:07:54.905881
2129 12:07:54.908675 The DHCP server ip is 192.168.201.1
2130 12:07:54.909270
2131 12:07:54.911885 TFTP server IP predefined by user: 192.168.201.1
2132 12:07:54.912387
2133 12:07:54.918383 Bootfile predefined by user: 8853707/tftp-deploy-x_5l6max/kernel/bzImage
2134 12:07:54.918981
2135 12:07:54.922132 Sending tftp read request... done.
2136 12:07:54.922721
2137 12:07:54.929391 Waiting for the transfer...
2138 12:07:54.930037
2139 12:07:55.647923 00000000 ################################################################
2140 12:07:55.648537
2141 12:07:56.360396 00080000 ################################################################
2142 12:07:56.360943
2143 12:07:57.073662 00100000 ################################################################
2144 12:07:57.074266
2145 12:07:57.772916 00180000 ################################################################
2146 12:07:57.773469
2147 12:07:58.409764 00200000 ################################################################
2148 12:07:58.409919
2149 12:07:58.977689 00280000 ################################################################
2150 12:07:58.977841
2151 12:07:59.577106 00300000 ################################################################
2152 12:07:59.577736
2153 12:08:00.237549 00380000 ################################################################
2154 12:08:00.238175
2155 12:08:00.933366 00400000 ################################################################
2156 12:08:00.933567
2157 12:08:01.612186 00480000 ################################################################
2158 12:08:01.612343
2159 12:08:02.263767 00500000 ################################################################
2160 12:08:02.264311
2161 12:08:02.882395 00580000 ################################################################
2162 12:08:02.882551
2163 12:08:03.453992 00600000 ################################################################
2164 12:08:03.454147
2165 12:08:04.064912 00680000 ################################################################
2166 12:08:04.065069
2167 12:08:04.655145 00700000 ################################################################
2168 12:08:04.655302
2169 12:08:05.314654 00780000 ################################################################
2170 12:08:05.315305
2171 12:08:06.032967 00800000 ################################################################
2172 12:08:06.033609
2173 12:08:06.728293 00880000 ################################################################
2174 12:08:06.728919
2175 12:08:07.093378 00900000 ################################## done.
2176 12:08:07.093938
2177 12:08:07.096767 The bootfile was 9707520 bytes long.
2178 12:08:07.097253
2179 12:08:07.100595 Sending tftp read request... done.
2180 12:08:07.101257
2181 12:08:07.103781 Waiting for the transfer...
2182 12:08:07.104325
2183 12:08:07.806070 00000000 ################################################################
2184 12:08:07.806668
2185 12:08:08.528518 00080000 ################################################################
2186 12:08:08.529147
2187 12:08:09.253540 00100000 ################################################################
2188 12:08:09.254164
2189 12:08:09.990900 00180000 ################################################################
2190 12:08:09.991547
2191 12:08:10.714538 00200000 ################################################################
2192 12:08:10.715191
2193 12:08:11.438688 00280000 ################################################################
2194 12:08:11.439306
2195 12:08:12.168145 00300000 ################################################################
2196 12:08:12.168786
2197 12:08:12.883081 00380000 ################################################################
2198 12:08:12.883671
2199 12:08:13.597017 00400000 ################################################################
2200 12:08:13.597683
2201 12:08:14.323632 00480000 ################################################################
2202 12:08:14.324255
2203 12:08:14.705658 00500000 ################################### done.
2204 12:08:14.706283
2205 12:08:14.708862 Sending tftp read request... done.
2206 12:08:14.709356
2207 12:08:14.712328 Waiting for the transfer...
2208 12:08:14.712820
2209 12:08:14.713211 00000000 # done.
2210 12:08:14.713622
2211 12:08:14.722400 Command line loaded dynamically from TFTP file: 8853707/tftp-deploy-x_5l6max/kernel/cmdline
2212 12:08:14.723016
2213 12:08:14.748968 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8853707/extract-nfsrootfs-yvnbfp90,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2214 12:08:14.749625
2215 12:08:14.755224 ec_init(0): CrosEC protocol v3 supported (256, 256)
2216 12:08:14.755809
2217 12:08:14.762620 Shutting down all USB controllers.
2218 12:08:14.763218
2219 12:08:14.763617 Removing current net device
2220 12:08:14.763986
2221 12:08:14.770172 Finalizing coreboot
2222 12:08:14.770778
2223 12:08:14.776772 Exiting depthcharge with code 4 at timestamp: 29826557
2224 12:08:14.777370
2225 12:08:14.777804
2226 12:08:14.778168 Starting kernel ...
2227 12:08:14.778521
2228 12:08:14.778866
2229 12:08:14.780212 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2230 12:08:14.780749 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2231 12:08:14.781173 Setting prompt string to ['Linux version [0-9]']
2232 12:08:14.781604 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2233 12:08:14.782009 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2234 12:08:14.782974
2236 12:12:32.781688 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2238 12:12:32.782854 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2240 12:12:32.783733 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2243 12:12:32.785194 end: 2 depthcharge-action (duration 00:05:00) [common]
2245 12:12:32.786120 Cleaning after the job
2246 12:12:32.786206 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/ramdisk
2247 12:12:32.786668 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/kernel
2248 12:12:32.787328 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/nfsrootfs
2249 12:12:32.825290 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853707/tftp-deploy-x_5l6max/modules
2250 12:12:32.825665 start: 4.1 power-off (timeout 00:00:30) [common]
2251 12:12:32.825829 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2252 12:12:32.844865 >> Command sent successfully.
2253 12:12:32.846807 Returned 0 in 0 seconds
2254 12:12:32.948136 end: 4.1 power-off (duration 00:00:00) [common]
2256 12:12:32.949734 start: 4.2 read-feedback (timeout 00:10:00) [common]
2257 12:12:32.950936 Listened to connection for namespace 'common' for up to 1s
2258 12:12:33.229661 Listened to connection for namespace 'common' for up to 1s
2259 12:12:33.232860 Listened to connection for namespace 'common' for up to 1s
2260 12:12:33.236333 Listened to connection for namespace 'common' for up to 1s
2261 12:12:33.239340 Listened to connection for namespace 'common' for up to 1s
2262 12:12:33.242560 Listened to connection for namespace 'common' for up to 1s
2263 12:12:33.246534 Listened to connection for namespace 'common' for up to 1s
2264 12:12:33.250116 Listened to connection for namespace 'common' for up to 1s
2265 12:12:33.253717 Listened to connection for namespace 'common' for up to 1s
2266 12:12:33.256269 Listened to connection for namespace 'common' for up to 1s
2267 12:12:33.259851 Listened to connection for namespace 'common' for up to 1s
2268 12:12:33.262980 Listened to connection for namespace 'common' for up to 1s
2269 12:12:33.267198 Listened to connection for namespace 'common' for up to 1s
2270 12:12:33.271210 Listened to connection for namespace 'common' for up to 1s
2271 12:12:33.274358 Listened to connection for namespace 'common' for up to 1s
2272 12:12:33.953952 Finalising connection for namespace 'common'
2273 12:12:33.954674 Disconnecting from shell: Finalise
2274 12:12:33.955114
2275 12:12:34.056857 end: 4.2 read-feedback (duration 00:00:01) [common]
2276 12:12:34.057535 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8853707
2277 12:12:34.223964 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8853707
2278 12:12:34.224162 JobError: Your job cannot terminate cleanly.