Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:06:59.584483 lava-dispatcher, installed at version: 2022.11
2 12:06:59.584677 start: 0 validate
3 12:06:59.584806 Start time: 2023-01-24 12:06:59.584799+00:00 (UTC)
4 12:06:59.584938 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:06:59.585065 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
6 12:06:59.874643 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:06:59.874816 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:06:59.876376 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:06:59.876502 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:07:00.168214 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:07:00.168393 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.270-cip89-39-g43ce130174aa%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:07:00.171679 validate duration: 0.59
14 12:07:00.171957 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:07:00.172064 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:07:00.172158 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:07:00.172263 Not decompressing ramdisk as can be used compressed.
18 12:07:00.172349 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230120.0/amd64/initrd.cpio.gz
19 12:07:00.172421 saving as /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/ramdisk/initrd.cpio.gz
20 12:07:00.172487 total size: 5432131 (5MB)
21 12:07:00.175952 progress 0% (0MB)
22 12:07:00.188912 progress 5% (0MB)
23 12:07:00.200468 progress 10% (0MB)
24 12:07:00.207147 progress 15% (0MB)
25 12:07:00.217697 progress 20% (1MB)
26 12:07:00.225780 progress 25% (1MB)
27 12:07:00.233708 progress 30% (1MB)
28 12:07:00.243398 progress 35% (1MB)
29 12:07:00.253464 progress 40% (2MB)
30 12:07:00.272700 progress 45% (2MB)
31 12:07:00.286902 progress 50% (2MB)
32 12:07:00.304207 progress 55% (2MB)
33 12:07:00.319557 progress 60% (3MB)
34 12:07:00.339788 progress 65% (3MB)
35 12:07:00.353870 progress 70% (3MB)
36 12:07:00.369838 progress 75% (3MB)
37 12:07:00.385214 progress 80% (4MB)
38 12:07:00.401980 progress 85% (4MB)
39 12:07:00.421940 progress 90% (4MB)
40 12:07:00.435001 progress 95% (4MB)
41 12:07:00.453383 progress 100% (5MB)
42 12:07:00.453715 5MB downloaded in 0.28s (18.42MB/s)
43 12:07:00.453889 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:07:00.454150 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:07:00.454253 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:07:00.454347 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:07:00.454466 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:07:00.454539 saving as /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/kernel/bzImage
50 12:07:00.454611 total size: 9707520 (9MB)
51 12:07:00.454677 No compression specified
52 12:07:00.469530 progress 0% (0MB)
53 12:07:00.490286 progress 5% (0MB)
54 12:07:00.515021 progress 10% (0MB)
55 12:07:00.538993 progress 15% (1MB)
56 12:07:00.557074 progress 20% (1MB)
57 12:07:00.573672 progress 25% (2MB)
58 12:07:00.598003 progress 30% (2MB)
59 12:07:00.626411 progress 35% (3MB)
60 12:07:00.669303 progress 40% (3MB)
61 12:07:00.705384 progress 45% (4MB)
62 12:07:00.740656 progress 50% (4MB)
63 12:07:00.778618 progress 55% (5MB)
64 12:07:00.813804 progress 60% (5MB)
65 12:07:00.861854 progress 65% (6MB)
66 12:07:00.916919 progress 70% (6MB)
67 12:07:00.981818 progress 75% (6MB)
68 12:07:01.035607 progress 80% (7MB)
69 12:07:01.103247 progress 85% (7MB)
70 12:07:01.172442 progress 90% (8MB)
71 12:07:01.246650 progress 95% (8MB)
72 12:07:01.315446 progress 100% (9MB)
73 12:07:01.315703 9MB downloaded in 0.86s (10.75MB/s)
74 12:07:01.315875 end: 1.2.1 http-download (duration 00:00:01) [common]
76 12:07:01.316123 end: 1.2 download-retry (duration 00:00:01) [common]
77 12:07:01.316217 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:07:01.316308 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:07:01.316420 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230120.0/amd64/full.rootfs.tar.xz
80 12:07:01.316489 saving as /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/nfsrootfs/full.rootfs.tar
81 12:07:01.316553 total size: 123909728 (118MB)
82 12:07:01.316617 Using unxz to decompress xz
83 12:07:01.345896 progress 0% (0MB)
84 12:07:01.900749 progress 5% (5MB)
85 12:07:02.600054 progress 10% (11MB)
86 12:07:03.514256 progress 15% (17MB)
87 12:07:04.271495 progress 20% (23MB)
88 12:07:05.273026 progress 25% (29MB)
89 12:07:06.415324 progress 30% (35MB)
90 12:07:07.186052 progress 35% (41MB)
91 12:07:07.994405 progress 40% (47MB)
92 12:07:08.798643 progress 45% (53MB)
93 12:07:09.657066 progress 50% (59MB)
94 12:07:10.482955 progress 55% (65MB)
95 12:07:11.342576 progress 60% (70MB)
96 12:07:12.020305 progress 65% (76MB)
97 12:07:12.706949 progress 70% (82MB)
98 12:07:13.256507 progress 75% (88MB)
99 12:07:13.786907 progress 80% (94MB)
100 12:07:14.287171 progress 85% (100MB)
101 12:07:14.799819 progress 90% (106MB)
102 12:07:15.238862 progress 95% (112MB)
103 12:07:15.632239 progress 100% (118MB)
104 12:07:15.637939 118MB downloaded in 14.32s (8.25MB/s)
105 12:07:15.638297 end: 1.3.1 http-download (duration 00:00:14) [common]
107 12:07:15.638590 end: 1.3 download-retry (duration 00:00:14) [common]
108 12:07:15.638698 start: 1.4 download-retry (timeout 00:09:45) [common]
109 12:07:15.638844 start: 1.4.1 http-download (timeout 00:09:45) [common]
110 12:07:15.638981 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.270-cip89-39-g43ce130174aa/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:07:15.639058 saving as /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/modules/modules.tar
112 12:07:15.639134 total size: 64588 (0MB)
113 12:07:15.639200 Using unxz to decompress xz
114 12:07:15.932063 progress 50% (0MB)
115 12:07:15.932704 progress 100% (0MB)
116 12:07:15.937140 0MB downloaded in 0.30s (0.21MB/s)
117 12:07:15.937502 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:07:15.937962 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:07:15.938131 start: 1.5 prepare-tftp-overlay (timeout 00:09:44) [common]
121 12:07:15.938307 start: 1.5.1 extract-nfsrootfs (timeout 00:09:44) [common]
122 12:07:17.701473 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8853700/extract-nfsrootfs-wpi8yiz8
123 12:07:17.701674 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:07:17.701778 start: 1.5.2 lava-overlay (timeout 00:09:42) [common]
125 12:07:17.701923 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh
126 12:07:17.702026 makedir: /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin
127 12:07:17.702116 makedir: /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/tests
128 12:07:17.702200 makedir: /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/results
129 12:07:17.702383 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-add-keys
130 12:07:17.702516 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-add-sources
131 12:07:17.702638 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-background-process-start
132 12:07:17.702757 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-background-process-stop
133 12:07:17.702871 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-common-functions
134 12:07:17.702984 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-echo-ipv4
135 12:07:17.703097 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-install-packages
136 12:07:17.703209 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-installed-packages
137 12:07:17.703320 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-os-build
138 12:07:17.703431 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-probe-channel
139 12:07:17.703562 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-probe-ip
140 12:07:17.703679 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-target-ip
141 12:07:17.703791 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-target-mac
142 12:07:17.703903 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-target-storage
143 12:07:17.704034 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-test-case
144 12:07:17.704164 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-test-event
145 12:07:17.704296 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-test-feedback
146 12:07:17.704413 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-test-raise
147 12:07:17.704526 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-test-reference
148 12:07:17.704639 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-test-runner
149 12:07:17.704751 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-test-set
150 12:07:17.704861 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-test-shell
151 12:07:17.704973 Updating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-install-packages (oe)
152 12:07:17.705096 Updating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/bin/lava-installed-packages (oe)
153 12:07:17.705195 Creating /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/environment
154 12:07:17.705285 LAVA metadata
155 12:07:17.705354 - LAVA_JOB_ID=8853700
156 12:07:17.705420 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:07:17.705523 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:42) [common]
158 12:07:17.705591 skipped lava-vland-overlay
159 12:07:17.705670 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:07:17.705754 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:42) [common]
161 12:07:17.705818 skipped lava-multinode-overlay
162 12:07:17.705895 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:07:17.705978 start: 1.5.2.3 test-definition (timeout 00:09:42) [common]
164 12:07:17.706051 Loading test definitions
165 12:07:17.706144 start: 1.5.2.3.1 git-repo-action (timeout 00:09:42) [common]
166 12:07:17.706223 Using /lava-8853700 at stage 0
167 12:07:17.706322 Fetching tests from https://github.com/kernelci/test-definitions
168 12:07:17.706405 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/0/tests/0_ltp-timers'
169 12:07:24.795615 Running '/usr/bin/git checkout kernelci.org
170 12:07:24.941160 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 12:07:24.941947 uuid=8853700_1.5.2.3.1 testdef=None
172 12:07:24.942130 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
174 12:07:24.942415 start: 1.5.2.3.2 test-overlay (timeout 00:09:35) [common]
175 12:07:24.943084 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 12:07:24.943324 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:35) [common]
178 12:07:24.944363 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 12:07:24.944665 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:35) [common]
181 12:07:24.945639 runner path: /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/0/tests/0_ltp-timers test_uuid 8853700_1.5.2.3.1
182 12:07:24.945747 GRP_TEST='TMR'
183 12:07:24.945817 SKIPFILE='skipfile-lkft.yaml'
184 12:07:24.945897 SKIP_INSTALL='true'
185 12:07:24.945960 TST_CMDFILES=''
186 12:07:24.946099 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 12:07:24.946402 Creating lava-test-runner.conf files
189 12:07:24.946478 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8853700/lava-overlay-_h2_n6dh/lava-8853700/0 for stage 0
190 12:07:24.946587 - 0_ltp-timers
191 12:07:24.946751 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
192 12:07:24.946890 start: 1.5.2.4 compress-overlay (timeout 00:09:35) [common]
193 12:07:32.775199 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
194 12:07:32.775368 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:27) [common]
195 12:07:32.775472 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 12:07:32.775582 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
197 12:07:32.775682 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:27) [common]
198 12:07:32.880837 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 12:07:32.881217 start: 1.5.4 extract-modules (timeout 00:09:27) [common]
200 12:07:32.881357 extracting modules file /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853700/extract-nfsrootfs-wpi8yiz8
201 12:07:32.885669 extracting modules file /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8853700/extract-overlay-ramdisk-y5omqmn1/ramdisk
202 12:07:32.889703 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 12:07:32.889849 start: 1.5.5 apply-overlay-tftp (timeout 00:09:27) [common]
204 12:07:32.889948 [common] Applying overlay to NFS
205 12:07:32.890044 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8853700/compress-overlay-cdmobz_4/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8853700/extract-nfsrootfs-wpi8yiz8
206 12:07:33.364915 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 12:07:33.365085 start: 1.5.6 configure-preseed-file (timeout 00:09:27) [common]
208 12:07:33.365188 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 12:07:33.365282 start: 1.5.7 compress-ramdisk (timeout 00:09:27) [common]
210 12:07:33.365369 Building ramdisk /var/lib/lava/dispatcher/tmp/8853700/extract-overlay-ramdisk-y5omqmn1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8853700/extract-overlay-ramdisk-y5omqmn1/ramdisk
211 12:07:33.401064 >> 24777 blocks
212 12:07:33.901218 rename /var/lib/lava/dispatcher/tmp/8853700/extract-overlay-ramdisk-y5omqmn1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/ramdisk/ramdisk.cpio.gz
213 12:07:33.901630 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 12:07:33.901760 start: 1.5.8 prepare-kernel (timeout 00:09:26) [common]
215 12:07:33.901879 start: 1.5.8.1 prepare-fit (timeout 00:09:26) [common]
216 12:07:33.901983 No mkimage arch provided, not using FIT.
217 12:07:33.902078 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 12:07:33.902168 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 12:07:33.902284 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
220 12:07:33.902381 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:26) [common]
221 12:07:33.902466 No LXC device requested
222 12:07:33.902552 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 12:07:33.902644 start: 1.7 deploy-device-env (timeout 00:09:26) [common]
224 12:07:33.902730 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 12:07:33.902804 Checking files for TFTP limit of 4294967296 bytes.
226 12:07:33.903209 end: 1 tftp-deploy (duration 00:00:34) [common]
227 12:07:33.903318 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 12:07:33.903419 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 12:07:33.903549 substitutions:
230 12:07:33.903622 - {DTB}: None
231 12:07:33.903691 - {INITRD}: 8853700/tftp-deploy-7bmz_yk6/ramdisk/ramdisk.cpio.gz
232 12:07:33.903756 - {KERNEL}: 8853700/tftp-deploy-7bmz_yk6/kernel/bzImage
233 12:07:33.903820 - {LAVA_MAC}: None
234 12:07:33.903881 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8853700/extract-nfsrootfs-wpi8yiz8
235 12:07:33.903943 - {NFS_SERVER_IP}: 192.168.201.1
236 12:07:33.904003 - {PRESEED_CONFIG}: None
237 12:07:33.904063 - {PRESEED_LOCAL}: None
238 12:07:33.904122 - {RAMDISK}: 8853700/tftp-deploy-7bmz_yk6/ramdisk/ramdisk.cpio.gz
239 12:07:33.904181 - {ROOT_PART}: None
240 12:07:33.904239 - {ROOT}: None
241 12:07:33.904302 - {SERVER_IP}: 192.168.201.1
242 12:07:33.904365 - {TEE}: None
243 12:07:33.904424 Parsed boot commands:
244 12:07:33.904481 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 12:07:33.904638 Parsed boot commands: tftpboot 192.168.201.1 8853700/tftp-deploy-7bmz_yk6/kernel/bzImage 8853700/tftp-deploy-7bmz_yk6/kernel/cmdline 8853700/tftp-deploy-7bmz_yk6/ramdisk/ramdisk.cpio.gz
246 12:07:33.904735 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 12:07:33.904830 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 12:07:33.904933 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 12:07:33.905032 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 12:07:33.905107 Not connected, no need to disconnect.
251 12:07:33.905189 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 12:07:33.905276 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 12:07:33.905349 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
254 12:07:33.908104 Setting prompt string to ['lava-test: # ']
255 12:07:33.908428 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 12:07:33.908554 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 12:07:33.908660 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 12:07:33.908759 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 12:07:33.908945 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
260 12:07:33.928823 >> Command sent successfully.
261 12:07:33.931015 Returned 0 in 0 seconds
262 12:07:34.031795 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 12:07:34.032128 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 12:07:34.032232 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 12:07:34.032328 Setting prompt string to 'Starting depthcharge on Helios...'
267 12:07:34.032407 Changing prompt to 'Starting depthcharge on Helios...'
268 12:07:34.032493 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 12:07:34.032765 [Enter `^Ec?' for help]
270 12:07:40.403519
271 12:07:40.403678
272 12:07:40.413801 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 12:07:40.416774 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 12:07:40.423549 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 12:07:40.426693 CPU: AES supported, TXT NOT supported, VT supported
276 12:07:40.433550 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 12:07:40.437034 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 12:07:40.443515 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 12:07:40.446593 VBOOT: Loading verstage.
280 12:07:40.449930 FMAP: Found "FLASH" version 1.1 at 0xc04000.
281 12:07:40.456580 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 12:07:40.460023 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 12:07:40.463044
284 12:07:40.463124 CBFS @ c08000 size 3f8000
285 12:07:40.469774 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
286 12:07:40.473235 CBFS: Locating 'fallback/verstage'
287 12:07:40.476360 CBFS: Found @ offset 10fb80 size 1072c
288 12:07:40.480333
289 12:07:40.480415
290 12:07:40.490237 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
291 12:07:40.504568 Probing TPM: . done!
292 12:07:40.507760 TPM ready after 0 ms
293 12:07:40.511258 Connected to device vid:did:rid of 1ae0:0028:00
294 12:07:40.521451 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
295 12:07:40.524899 Initialized TPM device CR50 revision 0
296 12:07:40.567267 tlcl_send_startup: Startup return code is 0
297 12:07:40.567389 TPM: setup succeeded
298 12:07:40.580138 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
299 12:07:40.583808 Chrome EC: UHEPI supported
300 12:07:40.587077 Phase 1
301 12:07:40.590475 FMAP: area GBB found @ c05000 (12288 bytes)
302 12:07:40.596910 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
303 12:07:40.600050 Phase 2
304 12:07:40.600138 Phase 3
305 12:07:40.603588 FMAP: area GBB found @ c05000 (12288 bytes)
306 12:07:40.610239 VB2:vb2_report_dev_firmware() This is developer signed firmware
307 12:07:40.616567 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 12:07:40.619984 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 12:07:40.626134 VB2:vb2_verify_keyblock() Checking keyblock signature...
310 12:07:40.642674 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 12:07:40.645690 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
312 12:07:40.652365 VB2:vb2_verify_fw_preamble() Verifying preamble.
313 12:07:40.656639 Phase 4
314 12:07:40.659935 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
315 12:07:40.666602 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
316 12:07:40.669816
317 12:07:40.846174 VB2:vb2_rsa_verify_digest() Digest check failed!
318 12:07:40.852830 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
319 12:07:40.852924 Saving nvdata
320 12:07:40.855905 Reboot requested (10020007)
321 12:07:40.859703 board_reset() called!
322 12:07:40.859847 full_reset() called!
323 12:07:45.371023
324 12:07:45.371170
325 12:07:45.380896 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
326 12:07:45.383994 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
327 12:07:45.390690 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
328 12:07:45.393854 CPU: AES supported, TXT NOT supported, VT supported
329 12:07:45.400367 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
330 12:07:45.403633 PCH: device id 0284 (rev 00) is Cometlake-U Premium
331 12:07:45.407127
332 12:07:45.410085 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
333 12:07:45.413681 VBOOT: Loading verstage.
334 12:07:45.420123 FMAP: Found "FLASH" version 1.1 at 0xc04000.
335 12:07:45.423467 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
336 12:07:45.429890 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
337 12:07:45.429976 CBFS @ c08000 size 3f8000
338 12:07:45.436339 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
339 12:07:45.439789 CBFS: Locating 'fallback/verstage'
340 12:07:45.443133 CBFS: Found @ offset 10fb80 size 1072c
341 12:07:45.446196
342 12:07:45.446315
343 12:07:45.446387
344 12:07:45.456090 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
345 12:07:45.472073 Probing TPM: . done!
346 12:07:45.475222 TPM ready after 0 ms
347 12:07:45.478700 Connected to device vid:did:rid of 1ae0:0028:00
348 12:07:45.488802 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
349 12:07:45.492241 Initialized TPM device CR50 revision 0
350 12:07:45.534189 tlcl_send_startup: Startup return code is 0
351 12:07:45.534311 TPM: setup succeeded
352 12:07:45.546983 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
353 12:07:45.551037 Chrome EC: UHEPI supported
354 12:07:45.554461 Phase 1
355 12:07:45.557443 FMAP: area GBB found @ c05000 (12288 bytes)
356 12:07:45.564003 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
357 12:07:45.570597 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
358 12:07:45.574054 Recovery requested (1009000e)
359 12:07:45.579988 Saving nvdata
360 12:07:45.586492 tlcl_extend: response is 0
361 12:07:45.594950 tlcl_extend: response is 0
362 12:07:45.601636 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
363 12:07:45.605075 CBFS @ c08000 size 3f8000
364 12:07:45.611617 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
365 12:07:45.615060 CBFS: Locating 'fallback/romstage'
366 12:07:45.618171 CBFS: Found @ offset 80 size 145fc
367 12:07:45.621615 Accumulated console time in verstage 99 ms
368 12:07:45.621695
369 12:07:45.621762
370 12:07:45.634667 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
371 12:07:45.641243 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
372 12:07:45.644481 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
373 12:07:45.648126 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
374 12:07:45.654766 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
375 12:07:45.657821 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
376 12:07:45.661250 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
377 12:07:45.664541 TCO_STS: 0000 0000
378 12:07:45.667729 GEN_PMCON: e0015238 00000200
379 12:07:45.670673 GBLRST_CAUSE: 00000000 00000000
380 12:07:45.670765 prev_sleep_state 5
381 12:07:45.674638 Boot Count incremented to 45092
382 12:07:45.681587 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
383 12:07:45.684998 CBFS @ c08000 size 3f8000
384 12:07:45.691416 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
385 12:07:45.691537 CBFS: Locating 'fspm.bin'
386 12:07:45.694771 CBFS: Found @ offset 5ffc0 size 71000
387 12:07:45.697864
388 12:07:45.701377 Chrome EC: UHEPI supported
389 12:07:45.707774 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 12:07:45.711215 Probing TPM: done!
391 12:07:45.718089 Connected to device vid:did:rid of 1ae0:0028:00
392 12:07:45.728038 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
393 12:07:45.734257 Initialized TPM device CR50 revision 0
394 12:07:45.742971 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 12:07:45.749622 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 12:07:45.752871
397 12:07:45.753400 MRC cache found, size 1948
398 12:07:45.756016 bootmode is set to: 2
399 12:07:45.759252 PRMRR disabled by config.
400 12:07:45.762592 SPD INDEX = 1
401 12:07:45.765979 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 12:07:45.769117 CBFS @ c08000 size 3f8000
403 12:07:45.775873 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 12:07:45.776460 CBFS: Locating 'spd.bin'
405 12:07:45.779123 CBFS: Found @ offset 5fb80 size 400
406 12:07:45.782342
407 12:07:45.782826 SPD: module type is LPDDR3
408 12:07:45.785697 SPD: module part is
409 12:07:45.792208 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
410 12:07:45.795731 SPD: device width 4 bits, bus width 8 bits
411 12:07:45.798917 SPD: module size is 4096 MB (per channel)
412 12:07:45.802046 memory slot: 0 configuration done.
413 12:07:45.808846 memory slot: 2 configuration done.
414 12:07:45.857314 CBMEM:
415 12:07:45.860710 IMD: root @ 99fff000 254 entries.
416 12:07:45.863751 IMD: root @ 99ffec00 62 entries.
417 12:07:45.867341 External stage cache:
418 12:07:45.870546 IMD: root @ 9abff000 254 entries.
419 12:07:45.873771 IMD: root @ 9abfec00 62 entries.
420 12:07:45.880545 Chrome EC: clear events_b mask to 0x0000000020004000
421 12:07:45.893384 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 12:07:45.903485 tlcl_write: response is 0
423 12:07:45.915410 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 12:07:45.921947 MRC: TPM MRC hash updated successfully.
425 12:07:45.922497 2 DIMMs found
426 12:07:45.925427 SMM Memory Map
427 12:07:45.928782 SMRAM : 0x9a000000 0x1000000
428 12:07:45.931854 Subregion 0: 0x9a000000 0xa00000
429 12:07:45.935302 Subregion 1: 0x9aa00000 0x200000
430 12:07:45.938675 Subregion 2: 0x9ac00000 0x400000
431 12:07:45.941925 top_of_ram = 0x9a000000
432 12:07:45.945021 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
433 12:07:45.951783 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
434 12:07:45.955241 MTRR Range: Start=ff000000 End=0 (Size 1000000)
435 12:07:45.961922 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 12:07:45.965176 CBFS @ c08000 size 3f8000
437 12:07:45.968391 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 12:07:45.971787 CBFS: Locating 'fallback/postcar'
439 12:07:45.978106 CBFS: Found @ offset 107000 size 4b44
440 12:07:45.984988 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
441 12:07:45.994886 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
442 12:07:45.997722 Processing 180 relocs. Offset value of 0x97c0c000
443 12:07:46.005919 Accumulated console time in romstage 286 ms
444 12:07:46.006520
445 12:07:46.007096
446 12:07:46.015719 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
447 12:07:46.022540 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 12:07:46.025766 CBFS @ c08000 size 3f8000
449 12:07:46.029077 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 12:07:46.032401
451 12:07:46.035271 CBFS: Locating 'fallback/ramstage'
452 12:07:46.038720 CBFS: Found @ offset 43380 size 1b9e8
453 12:07:46.045284 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
454 12:07:46.077264 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
455 12:07:46.083931 Processing 3976 relocs. Offset value of 0x98db0000
456 12:07:46.086974 Accumulated console time in postcar 52 ms
457 12:07:46.087428
458 12:07:46.087786
459 12:07:46.097010 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
460 12:07:46.103499 FMAP: area RO_VPD found @ c00000 (16384 bytes)
461 12:07:46.106886 WARNING: RO_VPD is uninitialized or empty.
462 12:07:46.110158 FMAP: area RW_VPD found @ af8000 (8192 bytes)
463 12:07:46.116866 FMAP: area RW_VPD found @ af8000 (8192 bytes)
464 12:07:46.117321 Normal boot.
465 12:07:46.123342 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
466 12:07:46.126724 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
467 12:07:46.130065 CBFS @ c08000 size 3f8000
468 12:07:46.136520 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
469 12:07:46.139805 CBFS: Locating 'cpu_microcode_blob.bin'
470 12:07:46.143390 CBFS: Found @ offset 14700 size 2ec00
471 12:07:46.146435 microcode: sig=0x806ec pf=0x4 revision=0xc9
472 12:07:46.149849 Skip microcode update
473 12:07:46.156406 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
474 12:07:46.156962 CBFS @ c08000 size 3f8000
475 12:07:46.163035 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
476 12:07:46.166076 CBFS: Locating 'fsps.bin'
477 12:07:46.169325 CBFS: Found @ offset d1fc0 size 35000
478 12:07:46.195673 Detected 4 core, 8 thread CPU.
479 12:07:46.198727 Setting up SMI for CPU
480 12:07:46.202077 IED base = 0x9ac00000
481 12:07:46.202567 IED size = 0x00400000
482 12:07:46.205536 Will perform SMM setup.
483 12:07:46.212112 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
484 12:07:46.218558 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
485 12:07:46.221894 Processing 16 relocs. Offset value of 0x00030000
486 12:07:46.225618 Attempting to start 7 APs
487 12:07:46.229021 Waiting for 10ms after sending INIT.
488 12:07:46.245414 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
489 12:07:46.245957 done.
490 12:07:46.248419 AP: slot 2 apic_id 3.
491 12:07:46.252035 AP: slot 1 apic_id 2.
492 12:07:46.252605 AP: slot 7 apic_id 6.
493 12:07:46.254999 AP: slot 6 apic_id 7.
494 12:07:46.258695 AP: slot 4 apic_id 5.
495 12:07:46.259265 AP: slot 5 apic_id 4.
496 12:07:46.261607
497 12:07:46.264988 Waiting for 2nd SIPI to complete...done.
498 12:07:46.271680 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
499 12:07:46.278149 Processing 13 relocs. Offset value of 0x00038000
500 12:07:46.284572 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
501 12:07:46.287916 Installing SMM handler to 0x9a000000
502 12:07:46.294461 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
503 12:07:46.301070 Processing 658 relocs. Offset value of 0x9a010000
504 12:07:46.307651 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
505 12:07:46.311058 Processing 13 relocs. Offset value of 0x9a008000
506 12:07:46.317580 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
507 12:07:46.324278 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
508 12:07:46.330765 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
509 12:07:46.334201 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
510 12:07:46.340756 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
511 12:07:46.347350 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
512 12:07:46.354104 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
513 12:07:46.360492 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
514 12:07:46.364030 Clearing SMI status registers
515 12:07:46.364623 SMI_STS: PM1
516 12:07:46.367305 PM1_STS: PWRBTN
517 12:07:46.367876 TCO_STS: SECOND_TO
518 12:07:46.370383 New SMBASE 0x9a000000
519 12:07:46.373761 In relocation handler: CPU 0
520 12:07:46.376980 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
521 12:07:46.383470 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 12:07:46.383973 Relocation complete.
523 12:07:46.386864 New SMBASE 0x99fff400
524 12:07:46.390182 In relocation handler: CPU 3
525 12:07:46.393416 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
526 12:07:46.400185 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 12:07:46.400688 Relocation complete.
528 12:07:46.403342 New SMBASE 0x99fff800
529 12:07:46.406684 In relocation handler: CPU 2
530 12:07:46.410123 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
531 12:07:46.416561 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 12:07:46.417064 Relocation complete.
533 12:07:46.419537 New SMBASE 0x99fffc00
534 12:07:46.422859 In relocation handler: CPU 1
535 12:07:46.426321 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
536 12:07:46.429838 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 12:07:46.433090
538 12:07:46.433591 Relocation complete.
539 12:07:46.436098 New SMBASE 0x99ffe400
540 12:07:46.439218 In relocation handler: CPU 7
541 12:07:46.442673 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
542 12:07:46.445910 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 12:07:46.449303 Relocation complete.
544 12:07:46.452721 New SMBASE 0x99ffe800
545 12:07:46.455823 In relocation handler: CPU 6
546 12:07:46.459123 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
547 12:07:46.462562 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 12:07:46.465555 Relocation complete.
549 12:07:46.469113 New SMBASE 0x99ffec00
550 12:07:46.472205 In relocation handler: CPU 5
551 12:07:46.475672 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
552 12:07:46.479011 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 12:07:46.482281 Relocation complete.
554 12:07:46.485463 New SMBASE 0x99fff000
555 12:07:46.488945 In relocation handler: CPU 4
556 12:07:46.492300 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
557 12:07:46.495332 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 12:07:46.498674 Relocation complete.
559 12:07:46.502203 Initializing CPU #0
560 12:07:46.505241 CPU: vendor Intel device 806ec
561 12:07:46.508650 CPU: family 06, model 8e, stepping 0c
562 12:07:46.512115 Clearing out pending MCEs
563 12:07:46.512631 Setting up local APIC...
564 12:07:46.515128 apic_id: 0x00 done.
565 12:07:46.518476 Turbo is available but hidden
566 12:07:46.521866 Turbo is available and visible
567 12:07:46.522402 VMX status: enabled
568 12:07:46.525217
569 12:07:46.528543 IA32_FEATURE_CONTROL status: locked
570 12:07:46.529078 Skip microcode update
571 12:07:46.531792 CPU #0 initialized
572 12:07:46.534973 Initializing CPU #3
573 12:07:46.535427 Initializing CPU #7
574 12:07:46.538321 CPU: vendor Intel device 806ec
575 12:07:46.541648 CPU: family 06, model 8e, stepping 0c
576 12:07:46.544827 Clearing out pending MCEs
577 12:07:46.548165 Initializing CPU #1
578 12:07:46.548672 Initializing CPU #2
579 12:07:46.551751 CPU: vendor Intel device 806ec
580 12:07:46.554723 CPU: family 06, model 8e, stepping 0c
581 12:07:46.558259 CPU: vendor Intel device 806ec
582 12:07:46.561270 CPU: family 06, model 8e, stepping 0c
583 12:07:46.564942
584 12:07:46.565605 Clearing out pending MCEs
585 12:07:46.567863 Clearing out pending MCEs
586 12:07:46.571288 Setting up local APIC...
587 12:07:46.574723 Setting up local APIC...
588 12:07:46.575228 Initializing CPU #5
589 12:07:46.577719 Initializing CPU #4
590 12:07:46.581004 CPU: vendor Intel device 806ec
591 12:07:46.584320 CPU: family 06, model 8e, stepping 0c
592 12:07:46.587507 CPU: vendor Intel device 806ec
593 12:07:46.590939 CPU: family 06, model 8e, stepping 0c
594 12:07:46.594322 Clearing out pending MCEs
595 12:07:46.597679 Clearing out pending MCEs
596 12:07:46.598124 Setting up local APIC...
597 12:07:46.600955 apic_id: 0x01 done.
598 12:07:46.604215 Initializing CPU #6
599 12:07:46.607483 CPU: vendor Intel device 806ec
600 12:07:46.610790 CPU: family 06, model 8e, stepping 0c
601 12:07:46.613967 CPU: vendor Intel device 806ec
602 12:07:46.617271 CPU: family 06, model 8e, stepping 0c
603 12:07:46.620432 Clearing out pending MCEs
604 12:07:46.620878 Clearing out pending MCEs
605 12:07:46.623852
606 12:07:46.624302 Setting up local APIC...
607 12:07:46.627354 apic_id: 0x03 done.
608 12:07:46.630368 Setting up local APIC...
609 12:07:46.630817 VMX status: enabled
610 12:07:46.633895 apic_id: 0x02 done.
611 12:07:46.637006 VMX status: enabled
612 12:07:46.637450 VMX status: enabled
613 12:07:46.640329 IA32_FEATURE_CONTROL status: locked
614 12:07:46.643768 IA32_FEATURE_CONTROL status: locked
615 12:07:46.646733 Skip microcode update
616 12:07:46.650209 apic_id: 0x06 done.
617 12:07:46.650689 Setting up local APIC...
618 12:07:46.656936 IA32_FEATURE_CONTROL status: locked
619 12:07:46.657383 VMX status: enabled
620 12:07:46.660081 apic_id: 0x07 done.
621 12:07:46.663519 IA32_FEATURE_CONTROL status: locked
622 12:07:46.667075 VMX status: enabled
623 12:07:46.667522 Skip microcode update
624 12:07:46.670125 IA32_FEATURE_CONTROL status: locked
625 12:07:46.673477 CPU #7 initialized
626 12:07:46.676841 Skip microcode update
627 12:07:46.677291 CPU #2 initialized
628 12:07:46.679941 Skip microcode update
629 12:07:46.680400 apic_id: 0x04 done.
630 12:07:46.683264
631 12:07:46.683712 Setting up local APIC...
632 12:07:46.686467 CPU #1 initialized
633 12:07:46.686952 VMX status: enabled
634 12:07:46.689713 apic_id: 0x05 done.
635 12:07:46.693053 IA32_FEATURE_CONTROL status: locked
636 12:07:46.696465 VMX status: enabled
637 12:07:46.699841 Skip microcode update
638 12:07:46.702850 IA32_FEATURE_CONTROL status: locked
639 12:07:46.703303 CPU #5 initialized
640 12:07:46.706315 Skip microcode update
641 12:07:46.706767 CPU #6 initialized
642 12:07:46.709697
643 12:07:46.710148 CPU #4 initialized
644 12:07:46.712738 Skip microcode update
645 12:07:46.713187 CPU #3 initialized
646 12:07:46.719431 bsp_do_flight_plan done after 452 msecs.
647 12:07:46.722459 CPU: frequency set to 4200 MHz
648 12:07:46.722929 Enabling SMIs.
649 12:07:46.725881 Locking SMM.
650 12:07:46.739205 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
651 12:07:46.742309 CBFS @ c08000 size 3f8000
652 12:07:46.749136 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
653 12:07:46.749639 CBFS: Locating 'vbt.bin'
654 12:07:46.755662 CBFS: Found @ offset 5f5c0 size 499
655 12:07:46.758780 Found a VBT of 4608 bytes after decompression
656 12:07:46.941930 Display FSP Version Info HOB
657 12:07:46.945339 Reference Code - CPU = 9.0.1e.30
658 12:07:46.948290 uCode Version = 0.0.0.ca
659 12:07:46.951849 TXT ACM version = ff.ff.ff.ffff
660 12:07:46.955161 Display FSP Version Info HOB
661 12:07:46.958308 Reference Code - ME = 9.0.1e.30
662 12:07:46.961573 MEBx version = 0.0.0.0
663 12:07:46.964714 ME Firmware Version = Consumer SKU
664 12:07:46.968190 Display FSP Version Info HOB
665 12:07:46.971301 Reference Code - CML PCH = 9.0.1e.30
666 12:07:46.974448 PCH-CRID Status = Disabled
667 12:07:46.977809 PCH-CRID Original Value = ff.ff.ff.ffff
668 12:07:46.981054 PCH-CRID New Value = ff.ff.ff.ffff
669 12:07:46.984265 OPROM - RST - RAID = ff.ff.ff.ffff
670 12:07:46.987652 ChipsetInit Base Version = ff.ff.ff.ffff
671 12:07:46.994337 ChipsetInit Oem Version = ff.ff.ff.ffff
672 12:07:46.994798 Display FSP Version Info HOB
673 12:07:47.000705 Reference Code - SA - System Agent = 9.0.1e.30
674 12:07:47.004060 Reference Code - MRC = 0.7.1.6c
675 12:07:47.007173 SA - PCIe Version = 9.0.1e.30
676 12:07:47.010579 SA-CRID Status = Disabled
677 12:07:47.013649 SA-CRID Original Value = 0.0.0.c
678 12:07:47.014277 SA-CRID New Value = 0.0.0.c
679 12:07:47.016978 OPROM - VBIOS = ff.ff.ff.ffff
680 12:07:47.020874 RTC Init
681 12:07:47.023855 Set power on after power failure.
682 12:07:47.024310 Disabling Deep S3
683 12:07:47.027186
684 12:07:47.027637 Disabling Deep S3
685 12:07:47.030257 Disabling Deep S4
686 12:07:47.030712 Disabling Deep S4
687 12:07:47.033792 Disabling Deep S5
688 12:07:47.034274 Disabling Deep S5
689 12:07:47.040045 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
690 12:07:47.043468 Enumerating buses...
691 12:07:47.046791 Show all devs... Before device enumeration.
692 12:07:47.049827 Root Device: enabled 1
693 12:07:47.053275 CPU_CLUSTER: 0: enabled 1
694 12:07:47.053723 DOMAIN: 0000: enabled 1
695 12:07:47.056687 APIC: 00: enabled 1
696 12:07:47.060091 PCI: 00:00.0: enabled 1
697 12:07:47.060545 PCI: 00:02.0: enabled 1
698 12:07:47.062988
699 12:07:47.063434 PCI: 00:04.0: enabled 0
700 12:07:47.066375 PCI: 00:05.0: enabled 0
701 12:07:47.069878 PCI: 00:12.0: enabled 1
702 12:07:47.070359 PCI: 00:12.5: enabled 0
703 12:07:47.073072 PCI: 00:12.6: enabled 0
704 12:07:47.076334 PCI: 00:14.0: enabled 1
705 12:07:47.079489 PCI: 00:14.1: enabled 0
706 12:07:47.080017 PCI: 00:14.3: enabled 1
707 12:07:47.082927 PCI: 00:14.5: enabled 0
708 12:07:47.086068 PCI: 00:15.0: enabled 1
709 12:07:47.089433 PCI: 00:15.1: enabled 1
710 12:07:47.089898 PCI: 00:15.2: enabled 0
711 12:07:47.092882 PCI: 00:15.3: enabled 0
712 12:07:47.095784 PCI: 00:16.0: enabled 1
713 12:07:47.099327 PCI: 00:16.1: enabled 0
714 12:07:47.099799 PCI: 00:16.2: enabled 0
715 12:07:47.102163 PCI: 00:16.3: enabled 0
716 12:07:47.105782 PCI: 00:16.4: enabled 0
717 12:07:47.109147 PCI: 00:16.5: enabled 0
718 12:07:47.109744 PCI: 00:17.0: enabled 1
719 12:07:47.112274 PCI: 00:19.0: enabled 1
720 12:07:47.115606 PCI: 00:19.1: enabled 0
721 12:07:47.118713 PCI: 00:19.2: enabled 0
722 12:07:47.119174 PCI: 00:1a.0: enabled 0
723 12:07:47.122209 PCI: 00:1c.0: enabled 0
724 12:07:47.125184 PCI: 00:1c.1: enabled 0
725 12:07:47.128698 PCI: 00:1c.2: enabled 0
726 12:07:47.129220 PCI: 00:1c.3: enabled 0
727 12:07:47.131881 PCI: 00:1c.4: enabled 0
728 12:07:47.135210 PCI: 00:1c.5: enabled 0
729 12:07:47.138189 PCI: 00:1c.6: enabled 0
730 12:07:47.138775 PCI: 00:1c.7: enabled 0
731 12:07:47.141577 PCI: 00:1d.0: enabled 1
732 12:07:47.144644 PCI: 00:1d.1: enabled 0
733 12:07:47.148048 PCI: 00:1d.2: enabled 0
734 12:07:47.148506 PCI: 00:1d.3: enabled 0
735 12:07:47.151493 PCI: 00:1d.4: enabled 0
736 12:07:47.154511 PCI: 00:1d.5: enabled 1
737 12:07:47.157955 PCI: 00:1e.0: enabled 1
738 12:07:47.158533 PCI: 00:1e.1: enabled 0
739 12:07:47.160973 PCI: 00:1e.2: enabled 1
740 12:07:47.164247 PCI: 00:1e.3: enabled 1
741 12:07:47.167398 PCI: 00:1f.0: enabled 1
742 12:07:47.167486 PCI: 00:1f.1: enabled 1
743 12:07:47.170538 PCI: 00:1f.2: enabled 1
744 12:07:47.173677 PCI: 00:1f.3: enabled 1
745 12:07:47.177140 PCI: 00:1f.4: enabled 1
746 12:07:47.177228 PCI: 00:1f.5: enabled 1
747 12:07:47.180159 PCI: 00:1f.6: enabled 0
748 12:07:47.183680 USB0 port 0: enabled 1
749 12:07:47.183768 I2C: 00:15: enabled 1
750 12:07:47.187075 I2C: 00:5d: enabled 1
751 12:07:47.190105 GENERIC: 0.0: enabled 1
752 12:07:47.193063 I2C: 00:1a: enabled 1
753 12:07:47.193152 I2C: 00:38: enabled 1
754 12:07:47.196461 I2C: 00:39: enabled 1
755 12:07:47.199961 I2C: 00:3a: enabled 1
756 12:07:47.200047 I2C: 00:3b: enabled 1
757 12:07:47.203267 PCI: 00:00.0: enabled 1
758 12:07:47.206235 SPI: 00: enabled 1
759 12:07:47.206323 SPI: 01: enabled 1
760 12:07:47.209729 PNP: 0c09.0: enabled 1
761 12:07:47.212923 USB2 port 0: enabled 1
762 12:07:47.213028 USB2 port 1: enabled 1
763 12:07:47.216261 USB2 port 2: enabled 0
764 12:07:47.219710 USB2 port 3: enabled 0
765 12:07:47.222739 USB2 port 5: enabled 0
766 12:07:47.222825 USB2 port 6: enabled 1
767 12:07:47.226127 USB2 port 9: enabled 1
768 12:07:47.229178 USB3 port 0: enabled 1
769 12:07:47.229266 USB3 port 1: enabled 1
770 12:07:47.232642 USB3 port 2: enabled 1
771 12:07:47.235746 USB3 port 3: enabled 1
772 12:07:47.239111 USB3 port 4: enabled 0
773 12:07:47.239193 APIC: 02: enabled 1
774 12:07:47.242294 APIC: 03: enabled 1
775 12:07:47.242375 APIC: 01: enabled 1
776 12:07:47.245667 APIC: 05: enabled 1
777 12:07:47.248658 APIC: 04: enabled 1
778 12:07:47.248738 APIC: 07: enabled 1
779 12:07:47.251988 APIC: 06: enabled 1
780 12:07:47.255124 Compare with tree...
781 12:07:47.255205 Root Device: enabled 1
782 12:07:47.258495 CPU_CLUSTER: 0: enabled 1
783 12:07:47.261970 APIC: 00: enabled 1
784 12:07:47.265010 APIC: 02: enabled 1
785 12:07:47.265094 APIC: 03: enabled 1
786 12:07:47.268152 APIC: 01: enabled 1
787 12:07:47.271532 APIC: 05: enabled 1
788 12:07:47.271611 APIC: 04: enabled 1
789 12:07:47.274725 APIC: 07: enabled 1
790 12:07:47.278247 APIC: 06: enabled 1
791 12:07:47.278354 DOMAIN: 0000: enabled 1
792 12:07:47.281346 PCI: 00:00.0: enabled 1
793 12:07:47.284797 PCI: 00:02.0: enabled 1
794 12:07:47.287980 PCI: 00:04.0: enabled 0
795 12:07:47.291350 PCI: 00:05.0: enabled 0
796 12:07:47.291445 PCI: 00:12.0: enabled 1
797 12:07:47.294324 PCI: 00:12.5: enabled 0
798 12:07:47.297648 PCI: 00:12.6: enabled 0
799 12:07:47.301072 PCI: 00:14.0: enabled 1
800 12:07:47.304378 USB0 port 0: enabled 1
801 12:07:47.304467 USB2 port 0: enabled 1
802 12:07:47.307698
803 12:07:47.307786 USB2 port 1: enabled 1
804 12:07:47.310987 USB2 port 2: enabled 0
805 12:07:47.314036 USB2 port 3: enabled 0
806 12:07:47.317578 USB2 port 5: enabled 0
807 12:07:47.320601 USB2 port 6: enabled 1
808 12:07:47.320688 USB2 port 9: enabled 1
809 12:07:47.324081
810 12:07:47.324170 USB3 port 0: enabled 1
811 12:07:47.327257 USB3 port 1: enabled 1
812 12:07:47.330390 USB3 port 2: enabled 1
813 12:07:47.333902 USB3 port 3: enabled 1
814 12:07:47.336981 USB3 port 4: enabled 0
815 12:07:47.337069 PCI: 00:14.1: enabled 0
816 12:07:47.340475 PCI: 00:14.3: enabled 1
817 12:07:47.343328 PCI: 00:14.5: enabled 0
818 12:07:47.346854 PCI: 00:15.0: enabled 1
819 12:07:47.349989 I2C: 00:15: enabled 1
820 12:07:47.350077 PCI: 00:15.1: enabled 1
821 12:07:47.353409
822 12:07:47.353497 I2C: 00:5d: enabled 1
823 12:07:47.356306 GENERIC: 0.0: enabled 1
824 12:07:47.359725 PCI: 00:15.2: enabled 0
825 12:07:47.363187 PCI: 00:15.3: enabled 0
826 12:07:47.366178 PCI: 00:16.0: enabled 1
827 12:07:47.366304 PCI: 00:16.1: enabled 0
828 12:07:47.369585 PCI: 00:16.2: enabled 0
829 12:07:47.372721 PCI: 00:16.3: enabled 0
830 12:07:47.376023 PCI: 00:16.4: enabled 0
831 12:07:47.379080 PCI: 00:16.5: enabled 0
832 12:07:47.379171 PCI: 00:17.0: enabled 1
833 12:07:47.382621 PCI: 00:19.0: enabled 1
834 12:07:47.385650 I2C: 00:1a: enabled 1
835 12:07:47.389017 I2C: 00:38: enabled 1
836 12:07:47.389105 I2C: 00:39: enabled 1
837 12:07:47.392413
838 12:07:47.392511 I2C: 00:3a: enabled 1
839 12:07:47.395464 I2C: 00:3b: enabled 1
840 12:07:47.398768 PCI: 00:19.1: enabled 0
841 12:07:47.402137 PCI: 00:19.2: enabled 0
842 12:07:47.402241 PCI: 00:1a.0: enabled 0
843 12:07:47.405411 PCI: 00:1c.0: enabled 0
844 12:07:47.408681 PCI: 00:1c.1: enabled 0
845 12:07:47.411794 PCI: 00:1c.2: enabled 0
846 12:07:47.415209 PCI: 00:1c.3: enabled 0
847 12:07:47.415288 PCI: 00:1c.4: enabled 0
848 12:07:47.418226
849 12:07:47.418334 PCI: 00:1c.5: enabled 0
850 12:07:47.421676 PCI: 00:1c.6: enabled 0
851 12:07:47.425197 PCI: 00:1c.7: enabled 0
852 12:07:47.428310 PCI: 00:1d.0: enabled 1
853 12:07:47.428397 PCI: 00:1d.1: enabled 0
854 12:07:47.431709
855 12:07:47.431796 PCI: 00:1d.2: enabled 0
856 12:07:47.434991 PCI: 00:1d.3: enabled 0
857 12:07:47.437904 PCI: 00:1d.4: enabled 0
858 12:07:47.441231 PCI: 00:1d.5: enabled 1
859 12:07:47.444507 PCI: 00:00.0: enabled 1
860 12:07:47.444593 PCI: 00:1e.0: enabled 1
861 12:07:47.447926 PCI: 00:1e.1: enabled 0
862 12:07:47.450936 PCI: 00:1e.2: enabled 1
863 12:07:47.454279 SPI: 00: enabled 1
864 12:07:47.454366 PCI: 00:1e.3: enabled 1
865 12:07:47.457746 SPI: 01: enabled 1
866 12:07:47.460837 PCI: 00:1f.0: enabled 1
867 12:07:47.464024 PNP: 0c09.0: enabled 1
868 12:07:47.467379 PCI: 00:1f.1: enabled 1
869 12:07:47.467473 PCI: 00:1f.2: enabled 1
870 12:07:47.470759 PCI: 00:1f.3: enabled 1
871 12:07:47.473819 PCI: 00:1f.4: enabled 1
872 12:07:47.477192 PCI: 00:1f.5: enabled 1
873 12:07:47.480624 PCI: 00:1f.6: enabled 0
874 12:07:47.480716 Root Device scanning...
875 12:07:47.483844 scan_static_bus for Root Device
876 12:07:47.487157 CPU_CLUSTER: 0 enabled
877 12:07:47.490386 DOMAIN: 0000 enabled
878 12:07:47.493389 DOMAIN: 0000 scanning...
879 12:07:47.496933 PCI: pci_scan_bus for bus 00
880 12:07:47.497021 PCI: 00:00.0 [8086/0000] ops
881 12:07:47.500074 PCI: 00:00.0 [8086/9b61] enabled
882 12:07:47.503504
883 12:07:47.503591 PCI: 00:02.0 [8086/0000] bus ops
884 12:07:47.506569
885 12:07:47.509847 PCI: 00:02.0 [8086/9b41] enabled
886 12:07:47.512952 PCI: 00:04.0 [8086/1903] disabled
887 12:07:47.516320 PCI: 00:08.0 [8086/1911] enabled
888 12:07:47.519845 PCI: 00:12.0 [8086/02f9] enabled
889 12:07:47.522878 PCI: 00:14.0 [8086/0000] bus ops
890 12:07:47.526191 PCI: 00:14.0 [8086/02ed] enabled
891 12:07:47.529297 PCI: 00:14.2 [8086/02ef] enabled
892 12:07:47.532724 PCI: 00:14.3 [8086/02f0] enabled
893 12:07:47.536102 PCI: 00:15.0 [8086/0000] bus ops
894 12:07:47.539122 PCI: 00:15.0 [8086/02e8] enabled
895 12:07:47.542626 PCI: 00:15.1 [8086/0000] bus ops
896 12:07:47.546060 PCI: 00:15.1 [8086/02e9] enabled
897 12:07:47.549014 PCI: 00:16.0 [8086/0000] ops
898 12:07:47.552279 PCI: 00:16.0 [8086/02e0] enabled
899 12:07:47.555773 PCI: 00:17.0 [8086/0000] ops
900 12:07:47.559091 PCI: 00:17.0 [8086/02d3] enabled
901 12:07:47.562127 PCI: 00:19.0 [8086/0000] bus ops
902 12:07:47.565453 PCI: 00:19.0 [8086/02c5] enabled
903 12:07:47.568880 PCI: 00:1d.0 [8086/0000] bus ops
904 12:07:47.572029 PCI: 00:1d.0 [8086/02b0] enabled
905 12:07:47.575563 PCI: Static device PCI: 00:1d.5 not found, disabling it.
906 12:07:47.578496 PCI: 00:1e.0 [8086/0000] ops
907 12:07:47.581916 PCI: 00:1e.0 [8086/02a8] enabled
908 12:07:47.584927 PCI: 00:1e.2 [8086/0000] bus ops
909 12:07:47.588430 PCI: 00:1e.2 [8086/02aa] enabled
910 12:07:47.591445 PCI: 00:1e.3 [8086/0000] bus ops
911 12:07:47.594966 PCI: 00:1e.3 [8086/02ab] enabled
912 12:07:47.598110 PCI: 00:1f.0 [8086/0000] bus ops
913 12:07:47.601348 PCI: 00:1f.0 [8086/0284] enabled
914 12:07:47.607821 PCI: Static device PCI: 00:1f.1 not found, disabling it.
915 12:07:47.614445 PCI: Static device PCI: 00:1f.2 not found, disabling it.
916 12:07:47.617852 PCI: 00:1f.3 [8086/0000] bus ops
917 12:07:47.620957 PCI: 00:1f.3 [8086/02c8] enabled
918 12:07:47.624331 PCI: 00:1f.4 [8086/0000] bus ops
919 12:07:47.627475 PCI: 00:1f.4 [8086/02a3] enabled
920 12:07:47.630868 PCI: 00:1f.5 [8086/0000] bus ops
921 12:07:47.633984 PCI: 00:1f.5 [8086/02a4] enabled
922 12:07:47.637325 PCI: Leftover static devices:
923 12:07:47.637419 PCI: 00:05.0
924 12:07:47.640757 PCI: 00:12.5
925 12:07:47.640844 PCI: 00:12.6
926 12:07:47.643807 PCI: 00:14.1
927 12:07:47.643894 PCI: 00:14.5
928 12:07:47.643963 PCI: 00:15.2
929 12:07:47.647329 PCI: 00:15.3
930 12:07:47.647416 PCI: 00:16.1
931 12:07:47.650178 PCI: 00:16.2
932 12:07:47.650303 PCI: 00:16.3
933 12:07:47.653571 PCI: 00:16.4
934 12:07:47.653660 PCI: 00:16.5
935 12:07:47.653729 PCI: 00:19.1
936 12:07:47.656810 PCI: 00:19.2
937 12:07:47.656897 PCI: 00:1a.0
938 12:07:47.660257 PCI: 00:1c.0
939 12:07:47.660345 PCI: 00:1c.1
940 12:07:47.660414 PCI: 00:1c.2
941 12:07:47.663168 PCI: 00:1c.3
942 12:07:47.663257 PCI: 00:1c.4
943 12:07:47.666504 PCI: 00:1c.5
944 12:07:47.666592 PCI: 00:1c.6
945 12:07:47.669915 PCI: 00:1c.7
946 12:07:47.670002 PCI: 00:1d.1
947 12:07:47.670071 PCI: 00:1d.2
948 12:07:47.673170 PCI: 00:1d.3
949 12:07:47.673258 PCI: 00:1d.4
950 12:07:47.676553 PCI: 00:1d.5
951 12:07:47.676640 PCI: 00:1e.1
952 12:07:47.676708 PCI: 00:1f.1
953 12:07:47.679467 PCI: 00:1f.2
954 12:07:47.679560 PCI: 00:1f.6
955 12:07:47.682923 PCI: Check your devicetree.cb.
956 12:07:47.686054 PCI: 00:02.0 scanning...
957 12:07:47.689543 scan_generic_bus for PCI: 00:02.0
958 12:07:47.692622 scan_generic_bus for PCI: 00:02.0 done
959 12:07:47.699205 scan_bus: scanning of bus PCI: 00:02.0 took 10195 usecs
960 12:07:47.702702 PCI: 00:14.0 scanning...
961 12:07:47.705862 scan_static_bus for PCI: 00:14.0
962 12:07:47.709118 USB0 port 0 enabled
963 12:07:47.709211 USB0 port 0 scanning...
964 12:07:47.712395 scan_static_bus for USB0 port 0
965 12:07:47.715741 USB2 port 0 enabled
966 12:07:47.719040 USB2 port 1 enabled
967 12:07:47.719150 USB2 port 2 disabled
968 12:07:47.722149 USB2 port 3 disabled
969 12:07:47.725528 USB2 port 5 disabled
970 12:07:47.725657 USB2 port 6 enabled
971 12:07:47.728938 USB2 port 9 enabled
972 12:07:47.729067 USB3 port 0 enabled
973 12:07:47.732294 USB3 port 1 enabled
974 12:07:47.735323 USB3 port 2 enabled
975 12:07:47.735488 USB3 port 3 enabled
976 12:07:47.738725 USB3 port 4 disabled
977 12:07:47.742197 USB2 port 0 scanning...
978 12:07:47.745221 scan_static_bus for USB2 port 0
979 12:07:47.748548 scan_static_bus for USB2 port 0 done
980 12:07:47.755179 scan_bus: scanning of bus USB2 port 0 took 9710 usecs
981 12:07:47.755525 USB2 port 1 scanning...
982 12:07:47.758350 scan_static_bus for USB2 port 1
983 12:07:47.765340 scan_static_bus for USB2 port 1 done
984 12:07:47.768291 scan_bus: scanning of bus USB2 port 1 took 9710 usecs
985 12:07:47.771631 USB2 port 6 scanning...
986 12:07:47.774975 scan_static_bus for USB2 port 6
987 12:07:47.778282 scan_static_bus for USB2 port 6 done
988 12:07:47.784687 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
989 12:07:47.787754 USB2 port 9 scanning...
990 12:07:47.791074 scan_static_bus for USB2 port 9
991 12:07:47.794493 scan_static_bus for USB2 port 9 done
992 12:07:47.797632 scan_bus: scanning of bus USB2 port 9 took 9713 usecs
993 12:07:47.801074 USB3 port 0 scanning...
994 12:07:47.804055 scan_static_bus for USB3 port 0
995 12:07:47.807493 scan_static_bus for USB3 port 0 done
996 12:07:47.813909 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
997 12:07:47.817218 USB3 port 1 scanning...
998 12:07:47.820564 scan_static_bus for USB3 port 1
999 12:07:47.824029 scan_static_bus for USB3 port 1 done
1000 12:07:47.830309 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
1001 12:07:47.830774 USB3 port 2 scanning...
1002 12:07:47.833830 scan_static_bus for USB3 port 2
1003 12:07:47.837127 scan_static_bus for USB3 port 2 done
1004 12:07:47.843476 scan_bus: scanning of bus USB3 port 2 took 9701 usecs
1005 12:07:47.846996 USB3 port 3 scanning...
1006 12:07:47.850153 scan_static_bus for USB3 port 3
1007 12:07:47.853533 scan_static_bus for USB3 port 3 done
1008 12:07:47.859898 scan_bus: scanning of bus USB3 port 3 took 9709 usecs
1009 12:07:47.863288 scan_static_bus for USB0 port 0 done
1010 12:07:47.869688 scan_bus: scanning of bus USB0 port 0 took 155440 usecs
1011 12:07:47.873086 scan_static_bus for PCI: 00:14.0 done
1012 12:07:47.876139 scan_bus: scanning of bus PCI: 00:14.0 took 173069 usecs
1013 12:07:47.879526 PCI: 00:15.0 scanning...
1014 12:07:47.882740 scan_generic_bus for PCI: 00:15.0
1015 12:07:47.889316 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1016 12:07:47.892763 scan_generic_bus for PCI: 00:15.0 done
1017 12:07:47.895971 scan_bus: scanning of bus PCI: 00:15.0 took 14293 usecs
1018 12:07:47.898899
1019 12:07:47.899341 PCI: 00:15.1 scanning...
1020 12:07:47.902432 scan_generic_bus for PCI: 00:15.1
1021 12:07:47.908962 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1022 12:07:47.912271 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1023 12:07:47.915635 scan_generic_bus for PCI: 00:15.1 done
1024 12:07:47.921905 scan_bus: scanning of bus PCI: 00:15.1 took 18605 usecs
1025 12:07:47.925185 PCI: 00:19.0 scanning...
1026 12:07:47.928590 scan_generic_bus for PCI: 00:19.0
1027 12:07:47.931970 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1028 12:07:47.935095 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1029 12:07:47.941473 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1030 12:07:47.944958 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1031 12:07:47.947950 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1032 12:07:47.951310 scan_generic_bus for PCI: 00:19.0 done
1033 12:07:47.958079 scan_bus: scanning of bus PCI: 00:19.0 took 30751 usecs
1034 12:07:47.961520 PCI: 00:1d.0 scanning...
1035 12:07:47.964428 do_pci_scan_bridge for PCI: 00:1d.0
1036 12:07:47.967844 PCI: pci_scan_bus for bus 01
1037 12:07:47.970855 PCI: 01:00.0 [1c5c/1327] enabled
1038 12:07:47.974098 Enabling Common Clock Configuration
1039 12:07:47.977461 L1 Sub-State supported from root port 29
1040 12:07:47.980670 L1 Sub-State Support = 0xf
1041 12:07:47.984147 CommonModeRestoreTime = 0x28
1042 12:07:47.987148 Power On Value = 0x16, Power On Scale = 0x0
1043 12:07:47.990582 ASPM: Enabled L1
1044 12:07:47.997100 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1045 12:07:47.997549 PCI: 00:1e.2 scanning...
1046 12:07:48.000158 scan_generic_bus for PCI: 00:1e.2
1047 12:07:48.003580
1048 12:07:48.006765 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 12:07:48.010183 scan_generic_bus for PCI: 00:1e.2 done
1050 12:07:48.016849 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1051 12:07:48.017298 PCI: 00:1e.3 scanning...
1052 12:07:48.020101 scan_generic_bus for PCI: 00:1e.3
1053 12:07:48.026723 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 12:07:48.030149 scan_generic_bus for PCI: 00:1e.3 done
1055 12:07:48.033274 scan_bus: scanning of bus PCI: 00:1e.3 took 13993 usecs
1056 12:07:48.036618 PCI: 00:1f.0 scanning...
1057 12:07:48.039663 scan_static_bus for PCI: 00:1f.0
1058 12:07:48.043074 PNP: 0c09.0 enabled
1059 12:07:48.046382 scan_static_bus for PCI: 00:1f.0 done
1060 12:07:48.052889 scan_bus: scanning of bus PCI: 00:1f.0 took 12063 usecs
1061 12:07:48.056210 PCI: 00:1f.3 scanning...
1062 12:07:48.059584 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1063 12:07:48.062628 PCI: 00:1f.4 scanning...
1064 12:07:48.065845 scan_generic_bus for PCI: 00:1f.4
1065 12:07:48.069403 scan_generic_bus for PCI: 00:1f.4 done
1066 12:07:48.075822 scan_bus: scanning of bus PCI: 00:1f.4 took 10200 usecs
1067 12:07:48.079295 PCI: 00:1f.5 scanning...
1068 12:07:48.082368 scan_generic_bus for PCI: 00:1f.5
1069 12:07:48.085685 scan_generic_bus for PCI: 00:1f.5 done
1070 12:07:48.092214 scan_bus: scanning of bus PCI: 00:1f.5 took 10181 usecs
1071 12:07:48.098728 scan_bus: scanning of bus DOMAIN: 0000 took 605272 usecs
1072 12:07:48.101784 scan_static_bus for Root Device done
1073 12:07:48.108169 scan_bus: scanning of bus Root Device took 625139 usecs
1074 12:07:48.108632 done
1075 12:07:48.111653 Chrome EC: UHEPI supported
1076 12:07:48.118482 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 12:07:48.121319 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 12:07:48.127810 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 12:07:48.134927 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 12:07:48.138335 SPI flash protection: WPSW=0 SRP0=0
1081 12:07:48.144869 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 12:07:48.148047 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1083 12:07:48.151572 found VGA at PCI: 00:02.0
1084 12:07:48.154664 Setting up VGA for PCI: 00:02.0
1085 12:07:48.161295 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 12:07:48.164704 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 12:07:48.167791 Allocating resources...
1088 12:07:48.171203 Reading resources...
1089 12:07:48.174643 Root Device read_resources bus 0 link: 0
1090 12:07:48.177399 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 12:07:48.184147 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 12:07:48.187402 DOMAIN: 0000 read_resources bus 0 link: 0
1093 12:07:48.195372 PCI: 00:14.0 read_resources bus 0 link: 0
1094 12:07:48.198387 USB0 port 0 read_resources bus 0 link: 0
1095 12:07:48.206800 USB0 port 0 read_resources bus 0 link: 0 done
1096 12:07:48.209930 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 12:07:48.217583 PCI: 00:15.0 read_resources bus 1 link: 0
1098 12:07:48.220575 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 12:07:48.227200 PCI: 00:15.1 read_resources bus 2 link: 0
1100 12:07:48.230770 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 12:07:48.237998 PCI: 00:19.0 read_resources bus 3 link: 0
1102 12:07:48.244889 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 12:07:48.247792 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 12:07:48.254433 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 12:07:48.257932 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 12:07:48.264408 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 12:07:48.267485 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 12:07:48.274263 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 12:07:48.277326 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 12:07:48.284059 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 12:07:48.290607 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 12:07:48.294052 Root Device read_resources bus 0 link: 0 done
1113 12:07:48.297382 Done reading resources.
1114 12:07:48.303989 Show resources in subtree (Root Device)...After reading.
1115 12:07:48.306928 Root Device child on link 0 CPU_CLUSTER: 0
1116 12:07:48.310531 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 12:07:48.313527 APIC: 00
1118 12:07:48.313992 APIC: 02
1119 12:07:48.314415 APIC: 03
1120 12:07:48.316855
1121 12:07:48.317308 APIC: 01
1122 12:07:48.317669 APIC: 05
1123 12:07:48.320216 APIC: 04
1124 12:07:48.320672 APIC: 07
1125 12:07:48.321028 APIC: 06
1126 12:07:48.326632 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1127 12:07:48.379825 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1128 12:07:48.380299 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1129 12:07:48.380667 PCI: 00:00.0
1130 12:07:48.381428 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1131 12:07:48.381922 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1132 12:07:48.382493 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1133 12:07:48.384114 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1134 12:07:48.394042 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1135 12:07:48.403796 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1136 12:07:48.413608 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1137 12:07:48.420135 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1138 12:07:48.430092 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1139 12:07:48.439669 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1140 12:07:48.449621 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1141 12:07:48.459054 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1142 12:07:48.468925 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1143 12:07:48.478739 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1144 12:07:48.488427 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1145 12:07:48.495141 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1146 12:07:48.498173 PCI: 00:02.0
1147 12:07:48.508166 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 12:07:48.517775 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1149 12:07:48.527874 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1150 12:07:48.528334 PCI: 00:04.0
1151 12:07:48.531095 PCI: 00:08.0
1152 12:07:48.540911 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1153 12:07:48.541371 PCI: 00:12.0
1154 12:07:48.550384 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 12:07:48.557140 PCI: 00:14.0 child on link 0 USB0 port 0
1156 12:07:48.566863 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1157 12:07:48.570073 USB0 port 0 child on link 0 USB2 port 0
1158 12:07:48.573400 USB2 port 0
1159 12:07:48.573871 USB2 port 1
1160 12:07:48.576731 USB2 port 2
1161 12:07:48.577187 USB2 port 3
1162 12:07:48.579772 USB2 port 5
1163 12:07:48.580219 USB2 port 6
1164 12:07:48.583051 USB2 port 9
1165 12:07:48.583560 USB3 port 0
1166 12:07:48.586257
1167 12:07:48.586769 USB3 port 1
1168 12:07:48.589630 USB3 port 2
1169 12:07:48.590112 USB3 port 3
1170 12:07:48.592887 USB3 port 4
1171 12:07:48.593342 PCI: 00:14.2
1172 12:07:48.602976 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1173 12:07:48.612595 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1174 12:07:48.616026 PCI: 00:14.3
1175 12:07:48.625704 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 12:07:48.628689 PCI: 00:15.0 child on link 0 I2C: 01:15
1177 12:07:48.638691 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 12:07:48.642050 I2C: 01:15
1179 12:07:48.645201 PCI: 00:15.1 child on link 0 I2C: 02:5d
1180 12:07:48.655300 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 12:07:48.655749 I2C: 02:5d
1182 12:07:48.658319 GENERIC: 0.0
1183 12:07:48.658761 PCI: 00:16.0
1184 12:07:48.668170 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 12:07:48.671283 PCI: 00:17.0
1186 12:07:48.681104 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1187 12:07:48.690887 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1188 12:07:48.697455 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1189 12:07:48.707265 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1190 12:07:48.713751 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1191 12:07:48.723586 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1192 12:07:48.726938 PCI: 00:19.0 child on link 0 I2C: 03:1a
1193 12:07:48.736633 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:07:48.739814 I2C: 03:1a
1195 12:07:48.740266 I2C: 03:38
1196 12:07:48.743053 I2C: 03:39
1197 12:07:48.743510 I2C: 03:3a
1198 12:07:48.746006 I2C: 03:3b
1199 12:07:48.749402 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1200 12:07:48.759550 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1201 12:07:48.769369 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1202 12:07:48.775766 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1203 12:07:48.778715
1204 12:07:48.779171 PCI: 01:00.0
1205 12:07:48.788635 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1206 12:07:48.791984 PCI: 00:1e.0
1207 12:07:48.801781 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 12:07:48.811584 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1209 12:07:48.814940 PCI: 00:1e.2 child on link 0 SPI: 00
1210 12:07:48.824575 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 12:07:48.827629 SPI: 00
1212 12:07:48.831067 PCI: 00:1e.3 child on link 0 SPI: 01
1213 12:07:48.840970 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:07:48.841461 SPI: 01
1215 12:07:48.847369 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1216 12:07:48.853879 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1217 12:07:48.863617 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1218 12:07:48.867205 PNP: 0c09.0
1219 12:07:48.873471 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1220 12:07:48.876741 PCI: 00:1f.3
1221 12:07:48.886676 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 12:07:48.896309 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1223 12:07:48.896769 PCI: 00:1f.4
1224 12:07:48.906068 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1225 12:07:48.915840 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1226 12:07:48.919320 PCI: 00:1f.5
1227 12:07:48.929087 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1228 12:07:48.935391 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1229 12:07:48.938687 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1230 12:07:48.948560 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1231 12:07:48.951583 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1232 12:07:48.955133 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1233 12:07:48.958462 PCI: 00:17.0 18 * [0x60 - 0x67] io
1234 12:07:48.961579 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1235 12:07:48.968282 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1236 12:07:48.974811 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1237 12:07:48.981317 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1238 12:07:48.991125 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1239 12:07:48.997708 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1240 12:07:49.000785 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1241 12:07:49.010752 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1242 12:07:49.013712 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1243 12:07:49.020244 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1244 12:07:49.023750 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1245 12:07:49.030285 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1246 12:07:49.033322 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1247 12:07:49.039919 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1248 12:07:49.043006 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1249 12:07:49.049763 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1250 12:07:49.053023 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1251 12:07:49.059532 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1252 12:07:49.062913 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1253 12:07:49.069445 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1254 12:07:49.072738 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1255 12:07:49.075898 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1256 12:07:49.079216
1257 12:07:49.082579 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1258 12:07:49.085534 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1259 12:07:49.089020
1260 12:07:49.092436 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1261 12:07:49.095659 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1262 12:07:49.102140 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1263 12:07:49.105432 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1264 12:07:49.111755 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1265 12:07:49.115068 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1266 12:07:49.121597 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1267 12:07:49.131312 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1268 12:07:49.134829 avoid_fixed_resources: DOMAIN: 0000
1269 12:07:49.137804 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1270 12:07:49.144614 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1271 12:07:49.154408 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1272 12:07:49.160820 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1273 12:07:49.167266 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1274 12:07:49.177055 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1275 12:07:49.183506 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1276 12:07:49.190081 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1277 12:07:49.199718 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1278 12:07:49.206486 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1279 12:07:49.212992 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1280 12:07:49.219624 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1281 12:07:49.222783
1282 12:07:49.223390 Setting resources...
1283 12:07:49.229177 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1284 12:07:49.232551 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1285 12:07:49.239045 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1286 12:07:49.242269 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1287 12:07:49.245552 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1288 12:07:49.252259 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1289 12:07:49.258723 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1290 12:07:49.265185 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1291 12:07:49.271942 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1292 12:07:49.278340 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1293 12:07:49.281685 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1294 12:07:49.288164 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1295 12:07:49.291545 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1296 12:07:49.298093 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1297 12:07:49.301341 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1298 12:07:49.307910 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1299 12:07:49.311256 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1300 12:07:49.317521 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1301 12:07:49.320927 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1302 12:07:49.327475 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1303 12:07:49.330498 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1304 12:07:49.333906 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1305 12:07:49.337230
1306 12:07:49.340142 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 12:07:49.343589 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 12:07:49.346804
1309 12:07:49.349933 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1310 12:07:49.353315 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1311 12:07:49.356594
1312 12:07:49.360056 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1313 12:07:49.363038 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1314 12:07:49.369529 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1315 12:07:49.372935 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1316 12:07:49.379377 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1317 12:07:49.382826 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1318 12:07:49.392571 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1319 12:07:49.399091 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1320 12:07:49.405425 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1321 12:07:49.415452 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1322 12:07:49.418665 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1323 12:07:49.425318 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1324 12:07:49.431818 Root Device assign_resources, bus 0 link: 0
1325 12:07:49.434900 DOMAIN: 0000 assign_resources, bus 0 link: 0
1326 12:07:49.444771 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1327 12:07:49.451289 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1328 12:07:49.460977 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1329 12:07:49.467499 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1330 12:07:49.477366 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1331 12:07:49.484110 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1332 12:07:49.490585 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 12:07:49.493795 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 12:07:49.503403 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1335 12:07:49.510039 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1336 12:07:49.519591 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1337 12:07:49.526275 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1338 12:07:49.532880 PCI: 00:15.0 assign_resources, bus 1 link: 0
1339 12:07:49.535956 PCI: 00:15.0 assign_resources, bus 1 link: 0
1340 12:07:49.545803 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1341 12:07:49.549161 PCI: 00:15.1 assign_resources, bus 2 link: 0
1342 12:07:49.552096 PCI: 00:15.1 assign_resources, bus 2 link: 0
1343 12:07:49.562300 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1344 12:07:49.568896 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1345 12:07:49.578619 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1346 12:07:49.584729 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1347 12:07:49.594469 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1348 12:07:49.601105 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1349 12:07:49.607364 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1350 12:07:49.617486 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1351 12:07:49.620477 PCI: 00:19.0 assign_resources, bus 3 link: 0
1352 12:07:49.627033 PCI: 00:19.0 assign_resources, bus 3 link: 0
1353 12:07:49.633892 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1354 12:07:49.643456 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1355 12:07:49.653226 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1356 12:07:49.656465 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 12:07:49.663194 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1358 12:07:49.666615
1359 12:07:49.669632 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1360 12:07:49.676530 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1361 12:07:49.679456
1362 12:07:49.685991 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1363 12:07:49.689187 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1364 12:07:49.695903 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1365 12:07:49.702557 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1366 12:07:49.708965 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1367 12:07:49.712003 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1368 12:07:49.718741 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1369 12:07:49.722172 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1370 12:07:49.728594 LPC: Trying to open IO window from 800 size 1ff
1371 12:07:49.735339 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1372 12:07:49.744948 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1373 12:07:49.751564 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1374 12:07:49.761287 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1375 12:07:49.764724 DOMAIN: 0000 assign_resources, bus 0 link: 0
1376 12:07:49.771336 Root Device assign_resources, bus 0 link: 0
1377 12:07:49.771785 Done setting resources.
1378 12:07:49.777674 Show resources in subtree (Root Device)...After assigning values.
1379 12:07:49.784357 Root Device child on link 0 CPU_CLUSTER: 0
1380 12:07:49.787312 CPU_CLUSTER: 0 child on link 0 APIC: 00
1381 12:07:49.787858 APIC: 00
1382 12:07:49.790800 APIC: 02
1383 12:07:49.791374 APIC: 03
1384 12:07:49.793915 APIC: 01
1385 12:07:49.794404 APIC: 05
1386 12:07:49.794873 APIC: 04
1387 12:07:49.797305 APIC: 07
1388 12:07:49.797751 APIC: 06
1389 12:07:49.800636 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1390 12:07:49.810368 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1391 12:07:49.823323 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1392 12:07:49.823780 PCI: 00:00.0
1393 12:07:49.833357 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1394 12:07:49.842732 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1395 12:07:49.852793 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1396 12:07:49.862668 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1397 12:07:49.872356 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1398 12:07:49.881816 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1399 12:07:49.888390 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1400 12:07:49.891827
1401 12:07:49.898282 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1402 12:07:49.908202 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1403 12:07:49.917869 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1404 12:07:49.927645 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1405 12:07:49.937335 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1406 12:07:49.947382 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1407 12:07:49.956888 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1408 12:07:49.963601 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1409 12:07:49.973547 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1410 12:07:49.976590 PCI: 00:02.0
1411 12:07:49.986363 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1412 12:07:49.996194 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1413 12:07:50.006044 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1414 12:07:50.009508 PCI: 00:04.0
1415 12:07:50.009597 PCI: 00:08.0
1416 12:07:50.018952 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1417 12:07:50.022467 PCI: 00:12.0
1418 12:07:50.032186 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1419 12:07:50.035478 PCI: 00:14.0 child on link 0 USB0 port 0
1420 12:07:50.045549 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1421 12:07:50.052003 USB0 port 0 child on link 0 USB2 port 0
1422 12:07:50.052104 USB2 port 0
1423 12:07:50.055062 USB2 port 1
1424 12:07:50.055148 USB2 port 2
1425 12:07:50.058473 USB2 port 3
1426 12:07:50.058560 USB2 port 5
1427 12:07:50.061658 USB2 port 6
1428 12:07:50.061752 USB2 port 9
1429 12:07:50.064877 USB3 port 0
1430 12:07:50.068536 USB3 port 1
1431 12:07:50.068637 USB3 port 2
1432 12:07:50.071649 USB3 port 3
1433 12:07:50.071757 USB3 port 4
1434 12:07:50.074941 PCI: 00:14.2
1435 12:07:50.084583 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1436 12:07:50.094140 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1437 12:07:50.094266 PCI: 00:14.3
1438 12:07:50.097551
1439 12:07:50.107337 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1440 12:07:50.110864 PCI: 00:15.0 child on link 0 I2C: 01:15
1441 12:07:50.120510 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1442 12:07:50.123569 I2C: 01:15
1443 12:07:50.127104 PCI: 00:15.1 child on link 0 I2C: 02:5d
1444 12:07:50.136742 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1445 12:07:50.140028 I2C: 02:5d
1446 12:07:50.140106 GENERIC: 0.0
1447 12:07:50.143430 PCI: 00:16.0
1448 12:07:50.153230 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1449 12:07:50.153310 PCI: 00:17.0
1450 12:07:50.163044 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1451 12:07:50.172835 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1452 12:07:50.175880
1453 12:07:50.182408 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1454 12:07:50.192310 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1455 12:07:50.201846 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1456 12:07:50.211656 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1457 12:07:50.215030 PCI: 00:19.0 child on link 0 I2C: 03:1a
1458 12:07:50.224830 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1459 12:07:50.227987 I2C: 03:1a
1460 12:07:50.228074 I2C: 03:38
1461 12:07:50.231339 I2C: 03:39
1462 12:07:50.231427 I2C: 03:3a
1463 12:07:50.234740 I2C: 03:3b
1464 12:07:50.237813 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1465 12:07:50.247833 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1466 12:07:50.257690 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1467 12:07:50.267368 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1468 12:07:50.270598 PCI: 01:00.0
1469 12:07:50.280205 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1470 12:07:50.283775 PCI: 00:1e.0
1471 12:07:50.293591 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1472 12:07:50.303011 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1473 12:07:50.306405 PCI: 00:1e.2 child on link 0 SPI: 00
1474 12:07:50.316307 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1475 12:07:50.319688 SPI: 00
1476 12:07:50.322796 PCI: 00:1e.3 child on link 0 SPI: 01
1477 12:07:50.332603 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1478 12:07:50.335990 SPI: 01
1479 12:07:50.338999 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1480 12:07:50.348810 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1481 12:07:50.355413 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1482 12:07:50.358723 PNP: 0c09.0
1483 12:07:50.368492 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1484 12:07:50.368581 PCI: 00:1f.3
1485 12:07:50.378169 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1486 12:07:50.388133 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1487 12:07:50.391242 PCI: 00:1f.4
1488 12:07:50.400966 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1489 12:07:50.410889 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1490 12:07:50.410980 PCI: 00:1f.5
1491 12:07:50.423846 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1492 12:07:50.423934 Done allocating resources.
1493 12:07:50.430508 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1494 12:07:50.433839 Enabling resources...
1495 12:07:50.436901 PCI: 00:00.0 subsystem <- 8086/9b61
1496 12:07:50.440391 PCI: 00:00.0 cmd <- 06
1497 12:07:50.443388 PCI: 00:02.0 subsystem <- 8086/9b41
1498 12:07:50.446801 PCI: 00:02.0 cmd <- 03
1499 12:07:50.450025 PCI: 00:08.0 cmd <- 06
1500 12:07:50.453464 PCI: 00:12.0 subsystem <- 8086/02f9
1501 12:07:50.456536 PCI: 00:12.0 cmd <- 02
1502 12:07:50.459860 PCI: 00:14.0 subsystem <- 8086/02ed
1503 12:07:50.463026 PCI: 00:14.0 cmd <- 02
1504 12:07:50.463114 PCI: 00:14.2 cmd <- 02
1505 12:07:50.469598 PCI: 00:14.3 subsystem <- 8086/02f0
1506 12:07:50.469685 PCI: 00:14.3 cmd <- 02
1507 12:07:50.472825 PCI: 00:15.0 subsystem <- 8086/02e8
1508 12:07:50.476007 PCI: 00:15.0 cmd <- 02
1509 12:07:50.479365 PCI: 00:15.1 subsystem <- 8086/02e9
1510 12:07:50.482491 PCI: 00:15.1 cmd <- 02
1511 12:07:50.485934 PCI: 00:16.0 subsystem <- 8086/02e0
1512 12:07:50.489474 PCI: 00:16.0 cmd <- 02
1513 12:07:50.492472 PCI: 00:17.0 subsystem <- 8086/02d3
1514 12:07:50.495796 PCI: 00:17.0 cmd <- 03
1515 12:07:50.499178 PCI: 00:19.0 subsystem <- 8086/02c5
1516 12:07:50.502117 PCI: 00:19.0 cmd <- 02
1517 12:07:50.505573 PCI: 00:1d.0 bridge ctrl <- 0013
1518 12:07:50.508620 PCI: 00:1d.0 subsystem <- 8086/02b0
1519 12:07:50.511984 PCI: 00:1d.0 cmd <- 06
1520 12:07:50.515274 PCI: 00:1e.0 subsystem <- 8086/02a8
1521 12:07:50.518754 PCI: 00:1e.0 cmd <- 06
1522 12:07:50.521855 PCI: 00:1e.2 subsystem <- 8086/02aa
1523 12:07:50.525168 PCI: 00:1e.2 cmd <- 06
1524 12:07:50.528593 PCI: 00:1e.3 subsystem <- 8086/02ab
1525 12:07:50.531596 PCI: 00:1e.3 cmd <- 02
1526 12:07:50.534795 PCI: 00:1f.0 subsystem <- 8086/0284
1527 12:07:50.534880 PCI: 00:1f.0 cmd <- 407
1528 12:07:50.538197
1529 12:07:50.541175 PCI: 00:1f.3 subsystem <- 8086/02c8
1530 12:07:50.541252 PCI: 00:1f.3 cmd <- 02
1531 12:07:50.548195 PCI: 00:1f.4 subsystem <- 8086/02a3
1532 12:07:50.548282 PCI: 00:1f.4 cmd <- 03
1533 12:07:50.551518 PCI: 00:1f.5 subsystem <- 8086/02a4
1534 12:07:50.554572 PCI: 00:1f.5 cmd <- 406
1535 12:07:50.564472 PCI: 01:00.0 cmd <- 02
1536 12:07:50.569331 done.
1537 12:07:50.581247 ME: Version: 14.0.39.1367
1538 12:07:50.587764 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1539 12:07:50.591258 Initializing devices...
1540 12:07:50.591348 Root Device init ...
1541 12:07:50.597693 Chrome EC: Set SMI mask to 0x0000000000000000
1542 12:07:50.601193 Chrome EC: clear events_b mask to 0x0000000000000000
1543 12:07:50.604131
1544 12:07:50.607490 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1545 12:07:50.613979 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1546 12:07:50.620366 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1547 12:07:50.623776 Chrome EC: Set WAKE mask to 0x0000000000000000
1548 12:07:50.630128 Root Device init finished in 35256 usecs
1549 12:07:50.633555 CPU_CLUSTER: 0 init ...
1550 12:07:50.636910 CPU_CLUSTER: 0 init finished in 2448 usecs
1551 12:07:50.642125 PCI: 00:00.0 init ...
1552 12:07:50.645199 CPU TDP: 15 Watts
1553 12:07:50.648566 CPU PL2 = 64 Watts
1554 12:07:50.651906 PCI: 00:00.0 init finished in 7077 usecs
1555 12:07:50.655332 PCI: 00:02.0 init ...
1556 12:07:50.658228 PCI: 00:02.0 init finished in 2253 usecs
1557 12:07:50.661570 PCI: 00:08.0 init ...
1558 12:07:50.664932 PCI: 00:08.0 init finished in 2251 usecs
1559 12:07:50.668339 PCI: 00:12.0 init ...
1560 12:07:50.671270 PCI: 00:12.0 init finished in 2252 usecs
1561 12:07:50.674551 PCI: 00:14.0 init ...
1562 12:07:50.677905 PCI: 00:14.0 init finished in 2252 usecs
1563 12:07:50.681249 PCI: 00:14.2 init ...
1564 12:07:50.684270 PCI: 00:14.2 init finished in 2252 usecs
1565 12:07:50.687644 PCI: 00:14.3 init ...
1566 12:07:50.690772 PCI: 00:14.3 init finished in 2269 usecs
1567 12:07:50.694195 PCI: 00:15.0 init ...
1568 12:07:50.697675 DW I2C bus 0 at 0xd121f000 (400 KHz)
1569 12:07:50.704111 PCI: 00:15.0 init finished in 5975 usecs
1570 12:07:50.704193 PCI: 00:15.1 init ...
1571 12:07:50.707509 DW I2C bus 1 at 0xd1220000 (400 KHz)
1572 12:07:50.710572
1573 12:07:50.714026 PCI: 00:15.1 init finished in 5975 usecs
1574 12:07:50.717199 PCI: 00:16.0 init ...
1575 12:07:50.720396 PCI: 00:16.0 init finished in 2243 usecs
1576 12:07:50.723825 PCI: 00:19.0 init ...
1577 12:07:50.726875 DW I2C bus 4 at 0xd1222000 (400 KHz)
1578 12:07:50.730122 PCI: 00:19.0 init finished in 5977 usecs
1579 12:07:50.733596 PCI: 00:1d.0 init ...
1580 12:07:50.737015 Initializing PCH PCIe bridge.
1581 12:07:50.740047 PCI: 00:1d.0 init finished in 5284 usecs
1582 12:07:50.743719 PCI: 00:1f.0 init ...
1583 12:07:50.747108 IOAPIC: Initializing IOAPIC at 0xfec00000
1584 12:07:50.753483 IOAPIC: Bootstrap Processor Local APIC = 0x00
1585 12:07:50.753565 IOAPIC: ID = 0x02
1586 12:07:50.756853 IOAPIC: Dumping registers
1587 12:07:50.759901 reg 0x0000: 0x02000000
1588 12:07:50.763353 reg 0x0001: 0x00770020
1589 12:07:50.766467 reg 0x0002: 0x00000000
1590 12:07:50.769943 PCI: 00:1f.0 init finished in 23542 usecs
1591 12:07:50.773038 PCI: 00:1f.4 init ...
1592 12:07:50.776498 PCI: 00:1f.4 init finished in 2262 usecs
1593 12:07:50.788253 PCI: 01:00.0 init ...
1594 12:07:50.791223 PCI: 01:00.0 init finished in 2243 usecs
1595 12:07:50.795852 PNP: 0c09.0 init ...
1596 12:07:50.798902 Google Chrome EC uptime: 11.054 seconds
1597 12:07:50.802155
1598 12:07:50.805504 Google Chrome AP resets since EC boot: 0
1599 12:07:50.808514 Google Chrome most recent AP reset causes:
1600 12:07:50.815381 Google Chrome EC reset flags at last EC boot: reset-pin
1601 12:07:50.818462 PNP: 0c09.0 init finished in 20570 usecs
1602 12:07:50.821790 Devices initialized
1603 12:07:50.825084 Show all devs... After init.
1604 12:07:50.825171 Root Device: enabled 1
1605 12:07:50.828682 CPU_CLUSTER: 0: enabled 1
1606 12:07:50.831647 DOMAIN: 0000: enabled 1
1607 12:07:50.831740 APIC: 00: enabled 1
1608 12:07:50.835072 PCI: 00:00.0: enabled 1
1609 12:07:50.838139 PCI: 00:02.0: enabled 1
1610 12:07:50.841619 PCI: 00:04.0: enabled 0
1611 12:07:50.841704 PCI: 00:05.0: enabled 0
1612 12:07:50.844868 PCI: 00:12.0: enabled 1
1613 12:07:50.847977 PCI: 00:12.5: enabled 0
1614 12:07:50.851196 PCI: 00:12.6: enabled 0
1615 12:07:50.851282 PCI: 00:14.0: enabled 1
1616 12:07:50.854626 PCI: 00:14.1: enabled 0
1617 12:07:50.857675 PCI: 00:14.3: enabled 1
1618 12:07:50.861125 PCI: 00:14.5: enabled 0
1619 12:07:50.861211 PCI: 00:15.0: enabled 1
1620 12:07:50.864222 PCI: 00:15.1: enabled 1
1621 12:07:50.867409 PCI: 00:15.2: enabled 0
1622 12:07:50.870756 PCI: 00:15.3: enabled 0
1623 12:07:50.870842 PCI: 00:16.0: enabled 1
1624 12:07:50.874137 PCI: 00:16.1: enabled 0
1625 12:07:50.877509 PCI: 00:16.2: enabled 0
1626 12:07:50.880484 PCI: 00:16.3: enabled 0
1627 12:07:50.880571 PCI: 00:16.4: enabled 0
1628 12:07:50.883714 PCI: 00:16.5: enabled 0
1629 12:07:50.887165 PCI: 00:17.0: enabled 1
1630 12:07:50.890186 PCI: 00:19.0: enabled 1
1631 12:07:50.890309 PCI: 00:19.1: enabled 0
1632 12:07:50.893675 PCI: 00:19.2: enabled 0
1633 12:07:50.897074 PCI: 00:1a.0: enabled 0
1634 12:07:50.900089 PCI: 00:1c.0: enabled 0
1635 12:07:50.900175 PCI: 00:1c.1: enabled 0
1636 12:07:50.903509 PCI: 00:1c.2: enabled 0
1637 12:07:50.906856 PCI: 00:1c.3: enabled 0
1638 12:07:50.909959 PCI: 00:1c.4: enabled 0
1639 12:07:50.910045 PCI: 00:1c.5: enabled 0
1640 12:07:50.913328 PCI: 00:1c.6: enabled 0
1641 12:07:50.916367 PCI: 00:1c.7: enabled 0
1642 12:07:50.919856 PCI: 00:1d.0: enabled 1
1643 12:07:50.919942 PCI: 00:1d.1: enabled 0
1644 12:07:50.923241 PCI: 00:1d.2: enabled 0
1645 12:07:50.926183 PCI: 00:1d.3: enabled 0
1646 12:07:50.929698 PCI: 00:1d.4: enabled 0
1647 12:07:50.929784 PCI: 00:1d.5: enabled 0
1648 12:07:50.933066 PCI: 00:1e.0: enabled 1
1649 12:07:50.936100 PCI: 00:1e.1: enabled 0
1650 12:07:50.936186 PCI: 00:1e.2: enabled 1
1651 12:07:50.939428
1652 12:07:50.939514 PCI: 00:1e.3: enabled 1
1653 12:07:50.942769 PCI: 00:1f.0: enabled 1
1654 12:07:50.945741 PCI: 00:1f.1: enabled 0
1655 12:07:50.945827 PCI: 00:1f.2: enabled 0
1656 12:07:50.949193 PCI: 00:1f.3: enabled 1
1657 12:07:50.952268 PCI: 00:1f.4: enabled 1
1658 12:07:50.955622 PCI: 00:1f.5: enabled 1
1659 12:07:50.955708 PCI: 00:1f.6: enabled 0
1660 12:07:50.958969 USB0 port 0: enabled 1
1661 12:07:50.962498 I2C: 01:15: enabled 1
1662 12:07:50.965511 I2C: 02:5d: enabled 1
1663 12:07:50.965597 GENERIC: 0.0: enabled 1
1664 12:07:50.969015 I2C: 03:1a: enabled 1
1665 12:07:50.972044 I2C: 03:38: enabled 1
1666 12:07:50.972131 I2C: 03:39: enabled 1
1667 12:07:50.975418 I2C: 03:3a: enabled 1
1668 12:07:50.978452 I2C: 03:3b: enabled 1
1669 12:07:50.978538 PCI: 00:00.0: enabled 1
1670 12:07:50.981732 SPI: 00: enabled 1
1671 12:07:50.985081 SPI: 01: enabled 1
1672 12:07:50.985166 PNP: 0c09.0: enabled 1
1673 12:07:50.988424 USB2 port 0: enabled 1
1674 12:07:50.991912 USB2 port 1: enabled 1
1675 12:07:50.991998 USB2 port 2: enabled 0
1676 12:07:50.994885 USB2 port 3: enabled 0
1677 12:07:50.998186 USB2 port 5: enabled 0
1678 12:07:51.001718 USB2 port 6: enabled 1
1679 12:07:51.001804 USB2 port 9: enabled 1
1680 12:07:51.004681 USB3 port 0: enabled 1
1681 12:07:51.008093 USB3 port 1: enabled 1
1682 12:07:51.008180 USB3 port 2: enabled 1
1683 12:07:51.011532 USB3 port 3: enabled 1
1684 12:07:51.014523 USB3 port 4: enabled 0
1685 12:07:51.017845 APIC: 02: enabled 1
1686 12:07:51.017931 APIC: 03: enabled 1
1687 12:07:51.020980 APIC: 01: enabled 1
1688 12:07:51.021067 APIC: 05: enabled 1
1689 12:07:51.024453 APIC: 04: enabled 1
1690 12:07:51.027560 APIC: 07: enabled 1
1691 12:07:51.027646 APIC: 06: enabled 1
1692 12:07:51.030720 PCI: 00:08.0: enabled 1
1693 12:07:51.034017 PCI: 00:14.2: enabled 1
1694 12:07:51.037170 PCI: 01:00.0: enabled 1
1695 12:07:51.040997 Disabling ACPI via APMC:
1696 12:07:51.041084 done.
1697 12:07:51.047484 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1698 12:07:51.050498 ELOG: NV offset 0xaf0000 size 0x4000
1699 12:07:51.057008 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1700 12:07:51.063664 ELOG: Event(17) added with size 13 at 2023-01-24 12:07:51 UTC
1701 12:07:51.070422 POST: Unexpected post code in previous boot: 0x25
1702 12:07:51.076960 ELOG: Event(A3) added with size 11 at 2023-01-24 12:07:51 UTC
1703 12:07:51.083346 ELOG: Event(A6) added with size 13 at 2023-01-24 12:07:51 UTC
1704 12:07:51.090061 ELOG: Event(92) added with size 9 at 2023-01-24 12:07:51 UTC
1705 12:07:51.096505 ELOG: Event(93) added with size 9 at 2023-01-24 12:07:51 UTC
1706 12:07:51.099884 ELOG: Event(9A) added with size 9 at 2023-01-24 12:07:51 UTC
1707 12:07:51.106678 ELOG: Event(9E) added with size 10 at 2023-01-24 12:07:51 UTC
1708 12:07:51.112900 ELOG: Event(9F) added with size 14 at 2023-01-24 12:07:51 UTC
1709 12:07:51.119679 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1710 12:07:51.126069 ELOG: Event(A1) added with size 10 at 2023-01-24 12:07:51 UTC
1711 12:07:51.132765 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1712 12:07:51.139291 ELOG: Event(A0) added with size 9 at 2023-01-24 12:07:51 UTC
1713 12:07:51.145926 elog_add_boot_reason: Logged dev mode boot
1714 12:07:51.146012 Finalize devices...
1715 12:07:51.148918 PCI: 00:17.0 final
1716 12:07:51.149016 Devices finalized
1717 12:07:51.155662 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1718 12:07:51.162007 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1719 12:07:51.165519 ME: HFSTS1 : 0x90000245
1720 12:07:51.168545 ME: HFSTS2 : 0x3B850126
1721 12:07:51.171999 ME: HFSTS3 : 0x00000020
1722 12:07:51.178489 ME: HFSTS4 : 0x00004800
1723 12:07:51.181627 ME: HFSTS5 : 0x00000000
1724 12:07:51.184964 ME: HFSTS6 : 0x40400006
1725 12:07:51.188024 ME: Manufacturing Mode : NO
1726 12:07:51.191743 ME: FW Partition Table : OK
1727 12:07:51.194718 ME: Bringup Loader Failure : NO
1728 12:07:51.198094 ME: Firmware Init Complete : YES
1729 12:07:51.201152 ME: Boot Options Present : NO
1730 12:07:51.204565 ME: Update In Progress : NO
1731 12:07:51.207629 ME: D0i3 Support : YES
1732 12:07:51.211073 ME: Low Power State Enabled : NO
1733 12:07:51.214157 ME: CPU Replaced : NO
1734 12:07:51.217568 ME: CPU Replacement Valid : YES
1735 12:07:51.220864 ME: Current Working State : 5
1736 12:07:51.224053 ME: Current Operation State : 1
1737 12:07:51.227511 ME: Current Operation Mode : 0
1738 12:07:51.230582 ME: Error Code : 0
1739 12:07:51.234040 ME: CPU Debug Disabled : YES
1740 12:07:51.237108 ME: TXT Support : NO
1741 12:07:51.243510 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1742 12:07:51.249901 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1743 12:07:51.253314 CBFS @ c08000 size 3f8000
1744 12:07:51.256792 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1745 12:07:51.259746 CBFS: Locating 'fallback/dsdt.aml'
1746 12:07:51.266509 CBFS: Found @ offset 10bb80 size 3fa5
1747 12:07:51.269541 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 12:07:51.272985 CBFS @ c08000 size 3f8000
1749 12:07:51.279367 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 12:07:51.282862 CBFS: Locating 'fallback/slic'
1751 12:07:51.285838 CBFS: 'fallback/slic' not found.
1752 12:07:51.292319 ACPI: Writing ACPI tables at 99b3e000.
1753 12:07:51.292408 ACPI: * FACS
1754 12:07:51.295832 ACPI: * DSDT
1755 12:07:51.298911 Ramoops buffer: 0x100000@0x99a3d000.
1756 12:07:51.302234 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1757 12:07:51.308748 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1758 12:07:51.311834 Google Chrome EC: version:
1759 12:07:51.315191 ro: helios_v2.0.2659-56403530b
1760 12:07:51.318157 rw: helios_v2.0.2849-c41de27e7d
1761 12:07:51.318272 running image: 1
1762 12:07:51.322761 ACPI: * FADT
1763 12:07:51.322841 SCI is IRQ9
1764 12:07:51.329582 ACPI: added table 1/32, length now 40
1765 12:07:51.329689 ACPI: * SSDT
1766 12:07:51.332901 Found 1 CPU(s) with 8 core(s) each.
1767 12:07:51.336071 Error: Could not locate 'wifi_sar' in VPD.
1768 12:07:51.339191
1769 12:07:51.342678 Checking CBFS for default SAR values
1770 12:07:51.345934 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1771 12:07:51.349123 CBFS @ c08000 size 3f8000
1772 12:07:51.355687 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1773 12:07:51.359122 CBFS: Locating 'wifi_sar_defaults.hex'
1774 12:07:51.362152 CBFS: Found @ offset 5fac0 size 77
1775 12:07:51.365492 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1776 12:07:51.372055 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1777 12:07:51.375554 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1778 12:07:51.382100 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1779 12:07:51.385145 failed to find key in VPD: dsm_calib_r0_0
1780 12:07:51.395150 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1781 12:07:51.398161 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1782 12:07:51.401507
1783 12:07:51.404957 failed to find key in VPD: dsm_calib_r0_1
1784 12:07:51.411368 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1785 12:07:51.417752 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1786 12:07:51.421237 failed to find key in VPD: dsm_calib_r0_2
1787 12:07:51.430860 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1788 12:07:51.437652 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1789 12:07:51.440989 failed to find key in VPD: dsm_calib_r0_3
1790 12:07:51.450532 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1791 12:07:51.454037 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1792 12:07:51.460378 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1793 12:07:51.463726 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1794 12:07:51.467323 EC returned error result code 1
1795 12:07:51.470326 EC returned error result code 1
1796 12:07:51.473265 EC returned error result code 1
1797 12:07:51.476779
1798 12:07:51.479898 PS2K: Bad resp from EC. Vivaldi disabled!
1799 12:07:51.486783 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1800 12:07:51.489740 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1801 12:07:51.496294 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1802 12:07:51.499500 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1803 12:07:51.506305 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1804 12:07:51.512845 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1805 12:07:51.519253 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1806 12:07:51.525932 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1807 12:07:51.529015 ACPI: added table 2/32, length now 44
1808 12:07:51.529518 ACPI: * MCFG
1809 12:07:51.532405 ACPI: added table 3/32, length now 48
1810 12:07:51.535358 ACPI: * TPM2
1811 12:07:51.538873 TPM2 log created at 99a2d000
1812 12:07:51.541909 ACPI: added table 4/32, length now 52
1813 12:07:51.542387 ACPI: * MADT
1814 12:07:51.545362
1815 12:07:51.545810 SCI is IRQ9
1816 12:07:51.548814 ACPI: added table 5/32, length now 56
1817 12:07:51.551825 current = 99b43ac0
1818 12:07:51.552336 ACPI: * DMAR
1819 12:07:51.555123 ACPI: added table 6/32, length now 60
1820 12:07:51.558100 ACPI: * IGD OpRegion
1821 12:07:51.561619 GMA: Found VBT in CBFS
1822 12:07:51.564943 GMA: Found valid VBT in CBFS
1823 12:07:51.568131 ACPI: added table 7/32, length now 64
1824 12:07:51.568597 ACPI: * HPET
1825 12:07:51.571476 ACPI: added table 8/32, length now 68
1826 12:07:51.574949 ACPI: done.
1827 12:07:51.578190 ACPI tables: 31744 bytes.
1828 12:07:51.581308 smbios_write_tables: 99a2c000
1829 12:07:51.584682 EC returned error result code 3
1830 12:07:51.587995 Couldn't obtain OEM name from CBI
1831 12:07:51.591188 Create SMBIOS type 17
1832 12:07:51.594568 PCI: 00:00.0 (Intel Cannonlake)
1833 12:07:51.595116 PCI: 00:14.3 (Intel WiFi)
1834 12:07:51.597674 SMBIOS tables: 939 bytes.
1835 12:07:51.604192 Writing table forward entry at 0x00000500
1836 12:07:51.607509 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1837 12:07:51.610917 Writing coreboot table at 0x99b62000
1838 12:07:51.613901
1839 12:07:51.617359 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1840 12:07:51.623995 1. 0000000000001000-000000000009ffff: RAM
1841 12:07:51.627169 2. 00000000000a0000-00000000000fffff: RESERVED
1842 12:07:51.630298 3. 0000000000100000-0000000099a2bfff: RAM
1843 12:07:51.636736 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1844 12:07:51.643175 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1845 12:07:51.650075 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1846 12:07:51.653212 7. 000000009a000000-000000009f7fffff: RESERVED
1847 12:07:51.656650 8. 00000000e0000000-00000000efffffff: RESERVED
1848 12:07:51.663026 9. 00000000fc000000-00000000fc000fff: RESERVED
1849 12:07:51.666287 10. 00000000fe000000-00000000fe00ffff: RESERVED
1850 12:07:51.672883 11. 00000000fed10000-00000000fed17fff: RESERVED
1851 12:07:51.676261 12. 00000000fed80000-00000000fed83fff: RESERVED
1852 12:07:51.682742 13. 00000000fed90000-00000000fed91fff: RESERVED
1853 12:07:51.685651 14. 00000000feda0000-00000000feda1fff: RESERVED
1854 12:07:51.688854 15. 0000000100000000-000000045e7fffff: RAM
1855 12:07:51.691837
1856 12:07:51.695210 Graphics framebuffer located at 0xc0000000
1857 12:07:51.698470 Passing 5 GPIOs to payload:
1858 12:07:51.701643 NAME | PORT | POLARITY | VALUE
1859 12:07:51.708415 write protect | undefined | high | low
1860 12:07:51.714833 lid | undefined | high | high
1861 12:07:51.717986 power | undefined | high | low
1862 12:07:51.724539 oprom | undefined | high | low
1863 12:07:51.728014 EC in RW | 0x000000cb | high | low
1864 12:07:51.731012 Board ID: 4
1865 12:07:51.734412 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1866 12:07:51.737798 CBFS @ c08000 size 3f8000
1867 12:07:51.744221 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1868 12:07:51.750679 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1869 12:07:51.753972 coreboot table: 1492 bytes.
1870 12:07:51.757341 IMD ROOT 0. 99fff000 00001000
1871 12:07:51.760432 IMD SMALL 1. 99ffe000 00001000
1872 12:07:51.763768 FSP MEMORY 2. 99c4e000 003b0000
1873 12:07:51.767149 CONSOLE 3. 99c2e000 00020000
1874 12:07:51.770158 FMAP 4. 99c2d000 0000054e
1875 12:07:51.773529 TIME STAMP 5. 99c2c000 00000910
1876 12:07:51.776901 VBOOT WORK 6. 99c18000 00014000
1877 12:07:51.780005 MRC DATA 7. 99c16000 00001958
1878 12:07:51.783044 ROMSTG STCK 8. 99c15000 00001000
1879 12:07:51.786399 AFTER CAR 9. 99c0b000 0000a000
1880 12:07:51.789800 RAMSTAGE 10. 99baf000 0005c000
1881 12:07:51.793099 REFCODE 11. 99b7a000 00035000
1882 12:07:51.796214 SMM BACKUP 12. 99b6a000 00010000
1883 12:07:51.799535 COREBOOT 13. 99b62000 00008000
1884 12:07:51.802775 ACPI 14. 99b3e000 00024000
1885 12:07:51.806111 ACPI GNVS 15. 99b3d000 00001000
1886 12:07:51.809169 RAMOOPS 16. 99a3d000 00100000
1887 12:07:51.812647 TPM2 TCGLOG17. 99a2d000 00010000
1888 12:07:51.816066 SMBIOS 18. 99a2c000 00000800
1889 12:07:51.819134 IMD small region:
1890 12:07:51.822503 IMD ROOT 0. 99ffec00 00000400
1891 12:07:51.825545 FSP RUNTIME 1. 99ffebe0 00000004
1892 12:07:51.828989 EC HOSTEVENT 2. 99ffebc0 00000008
1893 12:07:51.832376 POWER STATE 3. 99ffeb80 00000040
1894 12:07:51.835434 ROMSTAGE 4. 99ffeb60 00000004
1895 12:07:51.838827 MEM INFO 5. 99ffe9a0 000001b9
1896 12:07:51.842003 VPD 6. 99ffe920 0000006c
1897 12:07:51.845353 MTRR: Physical address space:
1898 12:07:51.851915 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1899 12:07:51.858341 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1900 12:07:51.864851 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1901 12:07:51.871597 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1902 12:07:51.878202 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1903 12:07:51.884575 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1904 12:07:51.891108 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1905 12:07:51.894288 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 12:07:51.897785 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 12:07:51.900800 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 12:07:51.904191 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 12:07:51.907404
1910 12:07:51.910629 MTRR: Fixed MSR 0x269 0x0606060606060606
1911 12:07:51.913941 MTRR: Fixed MSR 0x26a 0x0606060606060606
1912 12:07:51.917229 MTRR: Fixed MSR 0x26b 0x0606060606060606
1913 12:07:51.920418 MTRR: Fixed MSR 0x26c 0x0606060606060606
1914 12:07:51.923888
1915 12:07:51.926980 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 12:07:51.930510 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 12:07:51.933690 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 12:07:51.937165 call enable_fixed_mtrr()
1919 12:07:51.940279 CPU physical address size: 39 bits
1920 12:07:51.947081 MTRR: default type WB/UC MTRR counts: 6/8.
1921 12:07:51.950039 MTRR: WB selected as default type.
1922 12:07:51.956554 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1923 12:07:51.959931 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1924 12:07:51.963409
1925 12:07:51.966530 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1926 12:07:51.973264 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1927 12:07:51.979533 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1928 12:07:51.986323 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1929 12:07:51.992824 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 12:07:51.995945 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:07:51.999238 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:07:52.002682 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:07:52.009222 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:07:52.012311 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:07:52.015535 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:07:52.018856 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:07:52.025379 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:07:52.028429 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:07:52.031541 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:07:52.032011
1941 12:07:52.034901 MTRR check
1942 12:07:52.035365 Fixed MTRRs : Enabled
1943 12:07:52.038182
1944 12:07:52.038697 Variable MTRRs: Enabled
1945 12:07:52.039084
1946 12:07:52.041363 call enable_fixed_mtrr()
1947 12:07:52.048063 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1948 12:07:52.051350 CPU physical address size: 39 bits
1949 12:07:52.054399 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1950 12:07:52.060903 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 12:07:52.064248 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 12:07:52.067428 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 12:07:52.070656 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 12:07:52.077326 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 12:07:52.080657 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 12:07:52.084093 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 12:07:52.087025 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 12:07:52.093658 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 12:07:52.096629 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 12:07:52.100131 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 12:07:52.103185 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 12:07:52.109684 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 12:07:52.113119 call enable_fixed_mtrr()
1964 12:07:52.116599 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 12:07:52.119856 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 12:07:52.122791 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 12:07:52.129381 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 12:07:52.132403 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 12:07:52.135903 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 12:07:52.139155 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 12:07:52.145599 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 12:07:52.149009 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 12:07:52.152000 CPU physical address size: 39 bits
1974 12:07:52.155466 call enable_fixed_mtrr()
1975 12:07:52.158569 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 12:07:52.162086 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 12:07:52.168332 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 12:07:52.171800 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 12:07:52.175204 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 12:07:52.178199 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 12:07:52.184917 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 12:07:52.188072 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 12:07:52.191376 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 12:07:52.194556 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 12:07:52.201075 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 12:07:52.204493 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 12:07:52.207432 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 12:07:52.210994 call enable_fixed_mtrr()
1989 12:07:52.214249 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 12:07:52.220921 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 12:07:52.224138 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 12:07:52.227301 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 12:07:52.230667 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 12:07:52.237238 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 12:07:52.240261 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 12:07:52.243783 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 12:07:52.246865 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 12:07:52.253542 CPU physical address size: 39 bits
1999 12:07:52.253995 call enable_fixed_mtrr()
2000 12:07:52.259735 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 12:07:52.263104 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 12:07:52.266639 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 12:07:52.269537 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 12:07:52.276138 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 12:07:52.279457 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 12:07:52.282716 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 12:07:52.285978 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 12:07:52.292238 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 12:07:52.295746 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 12:07:52.298864 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 12:07:52.302190 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 12:07:52.308698 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 12:07:52.311936 call enable_fixed_mtrr()
2014 12:07:52.315284 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 12:07:52.318247 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 12:07:52.321665 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 12:07:52.328042 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 12:07:52.331556 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 12:07:52.334544 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 12:07:52.337930 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 12:07:52.344403 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 12:07:52.347904 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 12:07:52.350887 CBFS @ c08000 size 3f8000
2024 12:07:52.354167 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2025 12:07:52.357275 CBFS: Locating 'fallback/payload'
2026 12:07:52.360830 CPU physical address size: 39 bits
2027 12:07:52.363978
2028 12:07:52.364067 call enable_fixed_mtrr()
2029 12:07:52.367282 CBFS: Found @ offset 1c96c0 size 3f798
2030 12:07:52.373835 CPU physical address size: 39 bits
2031 12:07:52.377154 CPU physical address size: 39 bits
2032 12:07:52.380105 CPU physical address size: 39 bits
2033 12:07:52.383459 Checking segment from ROM address 0xffdd16f8
2034 12:07:52.389912 Checking segment from ROM address 0xffdd1714
2035 12:07:52.393302 Loading segment from ROM address 0xffdd16f8
2036 12:07:52.396404 code (compression=0)
2037 12:07:52.402938 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2038 12:07:52.412763 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2039 12:07:52.412852 it's not compressed!
2040 12:07:52.415981
2041 12:07:52.506615 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2042 12:07:52.513310 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2043 12:07:52.516648 Loading segment from ROM address 0xffdd1714
2044 12:07:52.519910 Entry Point 0x30000000
2045 12:07:52.522943 Loaded segments
2046 12:07:52.528864 Finalizing chipset.
2047 12:07:52.531949 Finalizing SMM.
2048 12:07:52.535312 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2049 12:07:52.538737 mp_park_aps done after 0 msecs.
2050 12:07:52.545128 Jumping to boot code at 30000000(99b62000)
2051 12:07:52.551661 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2052 12:07:52.551750
2053 12:07:52.551820
2054 12:07:52.551885
2055 12:07:52.554769 Starting depthcharge on Helios...
2056 12:07:52.554857
2057 12:07:52.555238 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2058 12:07:52.555341 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2059 12:07:52.555429 Setting prompt string to ['hatch:']
2060 12:07:52.555526 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2061 12:07:52.564657 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2062 12:07:52.564750
2063 12:07:52.571196 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2064 12:07:52.571284
2065 12:07:52.577966 board_setup: Info: eMMC controller not present; skipping
2066 12:07:52.578071
2067 12:07:52.580968 New NVMe Controller 0x30053ac0 @ 00:1d:00
2068 12:07:52.581056
2069 12:07:52.587743 board_setup: Info: SDHCI controller not present; skipping
2070 12:07:52.587859
2071 12:07:52.593943 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2072 12:07:52.594047
2073 12:07:52.594117 Wipe memory regions:
2074 12:07:52.594182
2075 12:07:52.600625 [0x00000000001000, 0x000000000a0000)
2076 12:07:52.600713
2077 12:07:52.603721 [0x00000000100000, 0x00000030000000)
2078 12:07:52.603809
2079 12:07:52.669788 [0x00000030657430, 0x00000099a2c000)
2080 12:07:52.669927
2081 12:07:52.810315 [0x00000100000000, 0x0000045e800000)
2082 12:07:52.810453
2083 12:07:54.192997 R8152: Initializing
2084 12:07:54.193145
2085 12:07:54.196041 Version 9 (ocp_data = 6010)
2086 12:07:54.196132
2087 12:07:54.200322 R8152: Done initializing
2088 12:07:54.200413
2089 12:07:54.203662 Adding net device
2090 12:07:54.203753
2091 12:07:54.807995 R8152: Initializing
2092 12:07:54.808139
2093 12:07:54.811314 Version 6 (ocp_data = 5c30)
2094 12:07:54.811406
2095 12:07:54.814525 R8152: Done initializing
2096 12:07:54.814612
2097 12:07:54.821237 net_add_device: Attemp to include the same device
2098 12:07:54.821326
2099 12:07:54.827843 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2100 12:07:54.827945
2101 12:07:54.828024
2102 12:07:54.828091
2103 12:07:54.828378 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2105 12:07:54.929133 hatch: tftpboot 192.168.201.1 8853700/tftp-deploy-7bmz_yk6/kernel/bzImage 8853700/tftp-deploy-7bmz_yk6/kernel/cmdline 8853700/tftp-deploy-7bmz_yk6/ramdisk/ramdisk.cpio.gz
2106 12:07:54.929297 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2107 12:07:54.929390 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2108 12:07:54.933353 tftpboot 192.168.201.1 8853700/tftp-deploy-7bmz_yk6/kernel/bzImoy-7bmz_yk6/kernel/cmdline 8853700/tftp-deploy-7bmz_yk6/ramdisk/ramdisk.cpio.gz
2109 12:07:54.933446
2110 12:07:54.933517 Waiting for link
2111 12:07:54.933584
2112 12:07:55.134188 done.
2113 12:07:55.134390
2114 12:07:55.134491 MAC: 00:24:32:30:7f:7f
2115 12:07:55.134576
2116 12:07:55.137325 Sending DHCP discover... done.
2117 12:07:55.137414
2118 12:07:55.140713 Waiting for reply... done.
2119 12:07:55.140801
2120 12:07:55.143748 Sending DHCP request... done.
2121 12:07:55.143848
2122 12:07:55.147171 Waiting for reply... done.
2123 12:07:55.147254
2124 12:07:55.150498 My ip is 192.168.201.15
2125 12:07:55.150574
2126 12:07:55.153821 The DHCP server ip is 192.168.201.1
2127 12:07:55.153894
2128 12:07:55.156798 TFTP server IP predefined by user: 192.168.201.1
2129 12:07:55.156874
2130 12:07:55.163558 Bootfile predefined by user: 8853700/tftp-deploy-7bmz_yk6/kernel/bzImage
2131 12:07:55.163637
2132 12:07:55.166974 Sending tftp read request... done.
2133 12:07:55.169870
2134 12:07:55.173581 Waiting for the transfer...
2135 12:07:55.173663
2136 12:07:55.699606 00000000 ################################################################
2137 12:07:55.699760
2138 12:07:56.217937 00080000 ################################################################
2139 12:07:56.218089
2140 12:07:56.739909 00100000 ################################################################
2141 12:07:56.740061
2142 12:07:57.260762 00180000 ################################################################
2143 12:07:57.260911
2144 12:07:57.787982 00200000 ################################################################
2145 12:07:57.788141
2146 12:07:58.321041 00280000 ################################################################
2147 12:07:58.321246
2148 12:07:58.845061 00300000 ################################################################
2149 12:07:58.845219
2150 12:07:59.363396 00380000 ################################################################
2151 12:07:59.363541
2152 12:07:59.883474 00400000 ################################################################
2153 12:07:59.883625
2154 12:08:00.410692 00480000 ################################################################
2155 12:08:00.410869
2156 12:08:00.944860 00500000 ################################################################
2157 12:08:00.945016
2158 12:08:01.481030 00580000 ################################################################
2159 12:08:01.481177
2160 12:08:02.026822 00600000 ################################################################
2161 12:08:02.026967
2162 12:08:02.580215 00680000 ################################################################
2163 12:08:02.580364
2164 12:08:03.104507 00700000 ################################################################
2165 12:08:03.104674
2166 12:08:03.647698 00780000 ################################################################
2167 12:08:03.647843
2168 12:08:04.231572 00800000 ################################################################
2169 12:08:04.231716
2170 12:08:04.748991 00880000 ################################################################
2171 12:08:04.749183
2172 12:08:05.014629 00900000 ################################## done.
2173 12:08:05.014779
2174 12:08:05.018031 The bootfile was 9707520 bytes long.
2175 12:08:05.018128
2176 12:08:05.021504 Sending tftp read request... done.
2177 12:08:05.021592
2178 12:08:05.024400 Waiting for the transfer...
2179 12:08:05.024488
2180 12:08:05.542401 00000000 ################################################################
2181 12:08:05.542548
2182 12:08:06.051017 00080000 ################################################################
2183 12:08:06.051161
2184 12:08:06.571771 00100000 ################################################################
2185 12:08:06.571930
2186 12:08:07.111438 00180000 ################################################################
2187 12:08:07.111596
2188 12:08:07.743126 00200000 ################################################################
2189 12:08:07.743699
2190 12:08:08.257745 00280000 ################################################################
2191 12:08:08.257886
2192 12:08:08.847802 00300000 ################################################################
2193 12:08:08.848394
2194 12:08:09.493876 00380000 ################################################################
2195 12:08:09.494448
2196 12:08:10.141119 00400000 ################################################################
2197 12:08:10.141672
2198 12:08:10.787651 00480000 ################################################################
2199 12:08:10.788249
2200 12:08:11.130593 00500000 ################################## done.
2201 12:08:11.131140
2202 12:08:11.133875 Sending tftp read request... done.
2203 12:08:11.134367
2204 12:08:11.137163 Waiting for the transfer...
2205 12:08:11.137643
2206 12:08:11.138033 00000000 # done.
2207 12:08:11.138458
2208 12:08:11.147141 Command line loaded dynamically from TFTP file: 8853700/tftp-deploy-7bmz_yk6/kernel/cmdline
2209 12:08:11.147588
2210 12:08:11.169893 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8853700/extract-nfsrootfs-wpi8yiz8,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2211 12:08:11.170548
2212 12:08:11.176165 ec_init(0): CrosEC protocol v3 supported (256, 256)
2213 12:08:11.176756
2214 12:08:11.183849 Shutting down all USB controllers.
2215 12:08:11.184341
2216 12:08:11.184730 Removing current net device
2217 12:08:11.185093
2218 12:08:11.191267 Finalizing coreboot
2219 12:08:11.191767
2220 12:08:11.197805 Exiting depthcharge with code 4 at timestamp: 25987859
2221 12:08:11.198422
2222 12:08:11.198819
2223 12:08:11.199184 Starting kernel ...
2224 12:08:11.199533
2225 12:08:11.200859 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2226 12:08:11.201408 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2227 12:08:11.201838 Setting prompt string to ['Linux version [0-9]']
2228 12:08:11.202279 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2229 12:08:11.202705 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2230 12:08:11.203679
2231 12:08:11.204125
2233 12:12:34.201664 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2235 12:12:34.201883 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2237 12:12:34.202048 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2240 12:12:34.202356 end: 2 depthcharge-action (duration 00:05:00) [common]
2242 12:12:34.202590 Cleaning after the job
2243 12:12:34.202680 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/ramdisk
2244 12:12:34.203185 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/kernel
2245 12:12:34.203847 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/nfsrootfs
2246 12:12:34.250927 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8853700/tftp-deploy-7bmz_yk6/modules
2247 12:12:34.251255 start: 4.1 power-off (timeout 00:00:30) [common]
2248 12:12:34.251430 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2249 12:12:34.272249 >> Command sent successfully.
2250 12:12:34.274324 Returned 0 in 0 seconds
2251 12:12:34.375119 end: 4.1 power-off (duration 00:00:00) [common]
2253 12:12:34.375464 start: 4.2 read-feedback (timeout 00:10:00) [common]
2254 12:12:34.375714 Listened to connection for namespace 'common' for up to 1s
2255 12:12:35.378275 Finalising connection for namespace 'common'
2256 12:12:35.378463 Disconnecting from shell: Finalise
2257 12:12:35.479215 end: 4.2 read-feedback (duration 00:00:01) [common]
2258 12:12:35.479386 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8853700
2259 12:12:35.632037 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8853700
2260 12:12:35.632260 JobError: Your job cannot terminate cleanly.