Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:15:55.392885 lava-dispatcher, installed at version: 2022.11
2 11:15:55.393070 start: 0 validate
3 11:15:55.393198 Start time: 2023-02-06 11:15:55.393191+00:00 (UTC)
4 11:15:55.393326 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:15:55.393454 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230127.0%2Fx86%2Frootfs.cpio.gz exists
6 11:15:55.684257 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:15:55.685085 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.271-cip90-81-g5d0e00d43751%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:15:55.701722 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:15:55.702324 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.271-cip90-81-g5d0e00d43751%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:15:55.712201 validate duration: 0.32
12 11:15:55.713059 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:15:55.713463 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:15:55.713827 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:15:55.714191 Not decompressing ramdisk as can be used compressed.
16 11:15:55.714710 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230127.0/x86/rootfs.cpio.gz
17 11:15:55.714901 saving as /var/lib/lava/dispatcher/tmp/9033973/tftp-deploy-58zo98uk/ramdisk/rootfs.cpio.gz
18 11:15:55.715077 total size: 8423634 (8MB)
19 11:15:55.739443 progress 0% (0MB)
20 11:15:55.777835 progress 5% (0MB)
21 11:15:55.807884 progress 10% (0MB)
22 11:15:55.839660 progress 15% (1MB)
23 11:15:55.879483 progress 20% (1MB)
24 11:15:55.911350 progress 25% (2MB)
25 11:15:55.946602 progress 30% (2MB)
26 11:15:55.977418 progress 35% (2MB)
27 11:15:56.009367 progress 40% (3MB)
28 11:15:56.052578 progress 45% (3MB)
29 11:15:56.086166 progress 50% (4MB)
30 11:15:56.128257 progress 55% (4MB)
31 11:15:56.165547 progress 60% (4MB)
32 11:15:56.201059 progress 65% (5MB)
33 11:15:56.222542 progress 70% (5MB)
34 11:15:56.263799 progress 75% (6MB)
35 11:15:56.296384 progress 80% (6MB)
36 11:15:56.333022 progress 85% (6MB)
37 11:15:56.362337 progress 90% (7MB)
38 11:15:56.388682 progress 95% (7MB)
39 11:15:56.414674 progress 100% (8MB)
40 11:15:56.414915 8MB downloaded in 0.70s (11.48MB/s)
41 11:15:56.415086 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:15:56.415340 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:15:56.415431 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:15:56.415519 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:15:56.415627 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.271-cip90-81-g5d0e00d43751/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:15:56.415721 saving as /var/lib/lava/dispatcher/tmp/9033973/tftp-deploy-58zo98uk/kernel/bzImage
48 11:15:56.415801 total size: 9707520 (9MB)
49 11:15:56.415862 No compression specified
50 11:15:56.419201 progress 0% (0MB)
51 11:15:56.452069 progress 5% (0MB)
52 11:15:56.480127 progress 10% (0MB)
53 11:15:56.511375 progress 15% (1MB)
54 11:15:56.544051 progress 20% (1MB)
55 11:15:56.575180 progress 25% (2MB)
56 11:15:56.603909 progress 30% (2MB)
57 11:15:56.638266 progress 35% (3MB)
58 11:15:56.671778 progress 40% (3MB)
59 11:15:56.704679 progress 45% (4MB)
60 11:15:56.738169 progress 50% (4MB)
61 11:15:56.763624 progress 55% (5MB)
62 11:15:56.799990 progress 60% (5MB)
63 11:15:56.831225 progress 65% (6MB)
64 11:15:56.866934 progress 70% (6MB)
65 11:15:56.901836 progress 75% (6MB)
66 11:15:56.927636 progress 80% (7MB)
67 11:15:56.949483 progress 85% (7MB)
68 11:15:56.972037 progress 90% (8MB)
69 11:15:56.992558 progress 95% (8MB)
70 11:15:57.013303 progress 100% (9MB)
71 11:15:57.013561 9MB downloaded in 0.60s (15.49MB/s)
72 11:15:57.013727 end: 1.2.1 http-download (duration 00:00:01) [common]
74 11:15:57.013971 end: 1.2 download-retry (duration 00:00:01) [common]
75 11:15:57.014062 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:15:57.014150 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:15:57.014258 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.271-cip90-81-g5d0e00d43751/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:15:57.014328 saving as /var/lib/lava/dispatcher/tmp/9033973/tftp-deploy-58zo98uk/modules/modules.tar
79 11:15:57.014391 total size: 64664 (0MB)
80 11:15:57.014452 Using unxz to decompress xz
81 11:15:57.310350 progress 50% (0MB)
82 11:15:57.315880 progress 100% (0MB)
83 11:15:57.318264 0MB downloaded in 0.30s (0.20MB/s)
84 11:15:57.318516 end: 1.3.1 http-download (duration 00:00:00) [common]
86 11:15:57.318806 end: 1.3 download-retry (duration 00:00:00) [common]
87 11:15:57.318916 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 11:15:57.319022 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 11:15:57.319123 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 11:15:57.319217 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 11:15:57.319415 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze
92 11:15:57.319546 makedir: /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin
93 11:15:57.319641 makedir: /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/tests
94 11:15:57.319742 makedir: /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/results
95 11:15:57.319858 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-add-keys
96 11:15:57.319998 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-add-sources
97 11:15:57.320125 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-background-process-start
98 11:15:57.320249 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-background-process-stop
99 11:15:57.320365 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-common-functions
100 11:15:57.320486 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-echo-ipv4
101 11:15:57.320601 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-install-packages
102 11:15:57.320724 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-installed-packages
103 11:15:57.320842 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-os-build
104 11:15:57.320957 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-probe-channel
105 11:15:57.321074 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-probe-ip
106 11:15:57.321187 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-target-ip
107 11:15:57.321301 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-target-mac
108 11:15:57.321431 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-target-storage
109 11:15:57.321553 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-test-case
110 11:15:57.321673 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-test-event
111 11:15:57.321791 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-test-feedback
112 11:15:57.321904 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-test-raise
113 11:15:57.322024 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-test-reference
114 11:15:57.322136 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-test-runner
115 11:15:57.322256 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-test-set
116 11:15:57.322373 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-test-shell
117 11:15:57.322489 Updating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-install-packages (oe)
118 11:15:57.322612 Updating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/bin/lava-installed-packages (oe)
119 11:15:57.322714 Creating /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/environment
120 11:15:57.322811 LAVA metadata
121 11:15:57.322884 - LAVA_JOB_ID=9033973
122 11:15:57.322961 - LAVA_DISPATCHER_IP=192.168.201.1
123 11:15:57.323065 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 11:15:57.323138 skipped lava-vland-overlay
125 11:15:57.323221 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 11:15:57.323310 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 11:15:57.323379 skipped lava-multinode-overlay
128 11:15:57.323459 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 11:15:57.323570 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 11:15:57.323650 Loading test definitions
131 11:15:57.323797 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 11:15:57.323878 Using /lava-9033973 at stage 0
133 11:15:57.324167 uuid=9033973_1.4.2.3.1 testdef=None
134 11:15:57.324263 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 11:15:57.324366 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 11:15:57.324881 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 11:15:57.325131 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 11:15:57.325752 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 11:15:57.326008 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 11:15:57.326580 runner path: /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/0/tests/0_dmesg test_uuid 9033973_1.4.2.3.1
143 11:15:57.326738 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 11:15:57.326984 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 11:15:57.327068 Using /lava-9033973 at stage 1
147 11:15:57.327319 uuid=9033973_1.4.2.3.5 testdef=None
148 11:15:57.327417 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 11:15:57.327516 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 11:15:57.328002 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 11:15:57.328246 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 11:15:57.328846 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 11:15:57.329101 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 11:15:57.329706 runner path: /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/1/tests/1_bootrr test_uuid 9033973_1.4.2.3.5
157 11:15:57.329856 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 11:15:57.330089 Creating lava-test-runner.conf files
160 11:15:57.330158 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/0 for stage 0
161 11:15:57.330242 - 0_dmesg
162 11:15:57.330330 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9033973/lava-overlay-hrncvdze/lava-9033973/1 for stage 1
163 11:15:57.330417 - 1_bootrr
164 11:15:57.330518 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 11:15:57.330608 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 11:15:57.337049 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 11:15:57.337163 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 11:15:57.337266 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 11:15:57.337359 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 11:15:57.337454 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 11:15:57.522853 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 11:15:57.523205 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 11:15:57.523328 extracting modules file /var/lib/lava/dispatcher/tmp/9033973/tftp-deploy-58zo98uk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9033973/extract-overlay-ramdisk-xd1iysll/ramdisk
174 11:15:57.527892 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 11:15:57.528015 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 11:15:57.528111 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9033973/compress-overlay-bjcvbb9t/overlay-1.4.2.4.tar.gz to ramdisk
177 11:15:57.528186 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9033973/compress-overlay-bjcvbb9t/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9033973/extract-overlay-ramdisk-xd1iysll/ramdisk
178 11:15:57.532383 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 11:15:57.532508 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 11:15:57.532605 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 11:15:57.532707 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 11:15:57.532789 Building ramdisk /var/lib/lava/dispatcher/tmp/9033973/extract-overlay-ramdisk-xd1iysll/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9033973/extract-overlay-ramdisk-xd1iysll/ramdisk
183 11:15:57.597840 >> 48350 blocks
184 11:15:58.358350 rename /var/lib/lava/dispatcher/tmp/9033973/extract-overlay-ramdisk-xd1iysll/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9033973/tftp-deploy-58zo98uk/ramdisk/ramdisk.cpio.gz
185 11:15:58.358779 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 11:15:58.358916 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 11:15:58.359027 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 11:15:58.359125 No mkimage arch provided, not using FIT.
189 11:15:58.359225 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 11:15:58.359318 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 11:15:58.359432 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 11:15:58.359532 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 11:15:58.359622 No LXC device requested
194 11:15:58.359739 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 11:15:58.359862 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 11:15:58.359954 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 11:15:58.360044 Checking files for TFTP limit of 4294967296 bytes.
198 11:15:58.360463 end: 1 tftp-deploy (duration 00:00:03) [common]
199 11:15:58.360582 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 11:15:58.360680 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 11:15:58.360822 substitutions:
202 11:15:58.360896 - {DTB}: None
203 11:15:58.360963 - {INITRD}: 9033973/tftp-deploy-58zo98uk/ramdisk/ramdisk.cpio.gz
204 11:15:58.361031 - {KERNEL}: 9033973/tftp-deploy-58zo98uk/kernel/bzImage
205 11:15:58.361106 - {LAVA_MAC}: None
206 11:15:58.361178 - {PRESEED_CONFIG}: None
207 11:15:58.361234 - {PRESEED_LOCAL}: None
208 11:15:58.361291 - {RAMDISK}: 9033973/tftp-deploy-58zo98uk/ramdisk/ramdisk.cpio.gz
209 11:15:58.361347 - {ROOT_PART}: None
210 11:15:58.361408 - {ROOT}: None
211 11:15:58.361464 - {SERVER_IP}: 192.168.201.1
212 11:15:58.361529 - {TEE}: None
213 11:15:58.361604 Parsed boot commands:
214 11:15:58.361662 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 11:15:58.361825 Parsed boot commands: tftpboot 192.168.201.1 9033973/tftp-deploy-58zo98uk/kernel/bzImage 9033973/tftp-deploy-58zo98uk/kernel/cmdline 9033973/tftp-deploy-58zo98uk/ramdisk/ramdisk.cpio.gz
216 11:15:58.361924 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 11:15:58.362027 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 11:15:58.362125 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 11:15:58.362228 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 11:15:58.362305 Not connected, no need to disconnect.
221 11:15:58.362391 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 11:15:58.362484 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 11:15:58.362554 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
224 11:15:58.365591 Setting prompt string to ['lava-test: # ']
225 11:15:58.365895 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 11:15:58.366007 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 11:15:58.366161 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 11:15:58.366269 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 11:15:58.366701 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
230 11:16:07.730473 >> Command sent successfully.
231 11:16:07.739357 Returned 0 in 9 seconds
232 11:16:07.841098 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 11:16:07.842639 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 11:16:07.843164 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 11:16:07.843608 Setting prompt string to 'Starting depthcharge on Voema...'
237 11:16:07.843997 Changing prompt to 'Starting depthcharge on Voema...'
238 11:16:07.844361 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 11:16:07.845587 [Enter `^Ec?' for help]
240 11:16:07.846015
241 11:16:07.846433
242 11:16:07.846796 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 11:16:07.847146 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 11:16:07.847494 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 11:16:07.847844 CPU: AES supported, TXT NOT supported, VT supported
246 11:16:07.848163 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 11:16:07.848469 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 11:16:07.848772 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 11:16:07.849068 VBOOT: Loading verstage.
250 11:16:07.849364 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 11:16:07.849662 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 11:16:07.849959 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 11:16:07.850256 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 11:16:07.850554 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 11:16:07.850847
256 11:16:07.851134
257 11:16:07.851427 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 11:16:07.851747 Probing TPM: . done!
259 11:16:07.852047 TPM ready after 0 ms
260 11:16:07.852342 Connected to device vid:did:rid of 1ae0:0028:00
261 11:16:07.852636 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
262 11:16:07.852946 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 11:16:07.853241 Initialized TPM device CR50 revision 0
264 11:16:07.853536 tlcl_send_startup: Startup return code is 0
265 11:16:07.853830 TPM: setup succeeded
266 11:16:07.854125 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 11:16:07.854419 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 11:16:07.854714 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 11:16:07.855011 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 11:16:07.855310 Chrome EC: UHEPI supported
271 11:16:07.855600 Phase 1
272 11:16:07.855929 FMAP: area GBB found @ 1805000 (458752 bytes)
273 11:16:07.856231 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 11:16:07.856524 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 11:16:07.856816 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 11:16:07.857111 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 11:16:07.857442 Recovery requested (1009000e)
278 11:16:07.857742 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 11:16:07.858034 tlcl_extend: response is 0
280 11:16:07.858387 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 11:16:07.858760 tlcl_extend: response is 0
282 11:16:07.859183 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 11:16:07.859644 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 11:16:07.860163 BS: verstage times (exec / console): total (unknown) / 142 ms
285 11:16:07.860482
286 11:16:07.860779
287 11:16:07.861075 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 11:16:07.861396 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 11:16:07.861704 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 11:16:07.862003 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 11:16:07.862301 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 11:16:07.862598 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 11:16:07.862891 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 11:16:07.863185 TCO_STS: 0000 0000
295 11:16:07.863479 GEN_PMCON: d0015038 00002200
296 11:16:07.863809 GBLRST_CAUSE: 00000000 00000000
297 11:16:07.864113 HPR_CAUSE0: 00000000
298 11:16:07.864408 prev_sleep_state 5
299 11:16:07.864703 Boot Count incremented to 15325
300 11:16:07.864996 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 11:16:07.865294 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 11:16:07.865590 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 11:16:07.865888 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 11:16:07.866188 Chrome EC: UHEPI supported
305 11:16:07.866481 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 11:16:07.866777 Probing TPM: done!
307 11:16:07.867410 Connected to device vid:did:rid of 1ae0:0028:00
308 11:16:07.867797 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
309 11:16:07.868118 Initialized TPM device CR50 revision 0
310 11:16:07.876580 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 11:16:07.882652 MRC: Hash idx 0x100b comparison successful.
312 11:16:07.885841 MRC cache found, size faa8
313 11:16:07.886288 bootmode is set to: 2
314 11:16:07.889577 SPD index = 0
315 11:16:07.896006 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 11:16:07.899334 SPD: module type is LPDDR4X
317 11:16:07.902360 SPD: module part number is MT53E512M64D4NW-046
318 11:16:07.909146 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 11:16:07.912671 SPD: device width 16 bits, bus width 16 bits
320 11:16:07.919082 SPD: module size is 1024 MB (per channel)
321 11:16:08.352405 CBMEM:
322 11:16:08.355766 IMD: root @ 0x76fff000 254 entries.
323 11:16:08.359337 IMD: root @ 0x76ffec00 62 entries.
324 11:16:08.362946 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 11:16:08.368745 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 11:16:08.371716 External stage cache:
327 11:16:08.375090 IMD: root @ 0x7b3ff000 254 entries.
328 11:16:08.378823 IMD: root @ 0x7b3fec00 62 entries.
329 11:16:08.394236 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 11:16:08.400595 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 11:16:08.407495 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 11:16:08.422416 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 11:16:08.426018 cse_lite: Skip switching to RW in the recovery path
334 11:16:08.429332 8 DIMMs found
335 11:16:08.429775 SMM Memory Map
336 11:16:08.432513 SMRAM : 0x7b000000 0x800000
337 11:16:08.436081 Subregion 0: 0x7b000000 0x200000
338 11:16:08.439107 Subregion 1: 0x7b200000 0x200000
339 11:16:08.442468 Subregion 2: 0x7b400000 0x400000
340 11:16:08.446464 top_of_ram = 0x77000000
341 11:16:08.452157 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 11:16:08.456046 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 11:16:08.462397 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 11:16:08.466537 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 11:16:08.476313 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 11:16:08.481951 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 11:16:08.492198 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 11:16:08.495524 Processing 211 relocs. Offset value of 0x74c0b000
349 11:16:08.504331 BS: romstage times (exec / console): total (unknown) / 277 ms
350 11:16:08.510477
351 11:16:08.511168
352 11:16:08.520286 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 11:16:08.523733 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 11:16:08.533946 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 11:16:08.540255 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 11:16:08.546650 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 11:16:08.553085 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 11:16:08.600611 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 11:16:08.607298 Processing 5008 relocs. Offset value of 0x75d98000
360 11:16:08.610159 BS: postcar times (exec / console): total (unknown) / 59 ms
361 11:16:08.614157
362 11:16:08.614600
363 11:16:08.623502 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 11:16:08.624123 Normal boot
365 11:16:08.626752 FW_CONFIG value is 0x804c02
366 11:16:08.630255 PCI: 00:07.0 disabled by fw_config
367 11:16:08.633419 PCI: 00:07.1 disabled by fw_config
368 11:16:08.637099 PCI: 00:0d.2 disabled by fw_config
369 11:16:08.640061 PCI: 00:1c.7 disabled by fw_config
370 11:16:08.646499 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 11:16:08.653387 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 11:16:08.656872 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 11:16:08.660593 GENERIC: 0.0 disabled by fw_config
374 11:16:08.667151 GENERIC: 1.0 disabled by fw_config
375 11:16:08.670034 fw_config match found: DB_USB=USB3_ACTIVE
376 11:16:08.673528 fw_config match found: DB_USB=USB3_ACTIVE
377 11:16:08.677024 fw_config match found: DB_USB=USB3_ACTIVE
378 11:16:08.683364 fw_config match found: DB_USB=USB3_ACTIVE
379 11:16:08.686373 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 11:16:08.693363 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 11:16:08.703035 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 11:16:08.709638 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 11:16:08.713265 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 11:16:08.719660 microcode: Update skipped, already up-to-date
385 11:16:08.726729 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 11:16:08.753669 Detected 4 core, 8 thread CPU.
387 11:16:08.757446 Setting up SMI for CPU
388 11:16:08.760503 IED base = 0x7b400000
389 11:16:08.760949 IED size = 0x00400000
390 11:16:08.763766 Will perform SMM setup.
391 11:16:08.770740 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 11:16:08.777885 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 11:16:08.783628 Processing 16 relocs. Offset value of 0x00030000
394 11:16:08.786993 Attempting to start 7 APs
395 11:16:08.790398 Waiting for 10ms after sending INIT.
396 11:16:08.805800 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 11:16:08.809284 AP: slot 5 apic_id 6.
398 11:16:08.813184 AP: slot 4 apic_id 7.
399 11:16:08.813629 AP: slot 2 apic_id 3.
400 11:16:08.815917 AP: slot 3 apic_id 4.
401 11:16:08.819417 AP: slot 7 apic_id 5.
402 11:16:08.819888 AP: slot 6 apic_id 2.
403 11:16:08.820251 done.
404 11:16:08.825774 Waiting for 2nd SIPI to complete...done.
405 11:16:08.832564 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 11:16:08.839119 Processing 13 relocs. Offset value of 0x00038000
407 11:16:08.842702 Unable to locate Global NVS
408 11:16:08.849560 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 11:16:08.852806 Installing permanent SMM handler to 0x7b000000
410 11:16:08.863047 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 11:16:08.865914 Processing 794 relocs. Offset value of 0x7b010000
412 11:16:08.876467 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 11:16:08.879160 Processing 13 relocs. Offset value of 0x7b008000
414 11:16:08.885920 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 11:16:08.892125 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 11:16:08.895576 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 11:16:08.902392 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 11:16:08.908656 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 11:16:08.915199 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 11:16:08.922166 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 11:16:08.922841 Unable to locate Global NVS
422 11:16:08.932103 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 11:16:08.935954 Clearing SMI status registers
424 11:16:08.936399 SMI_STS: PM1
425 11:16:08.938410 PM1_STS: PWRBTN
426 11:16:08.945546 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 11:16:08.948328 In relocation handler: CPU 0
428 11:16:08.951658 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 11:16:08.958255 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 11:16:08.961839 Relocation complete.
431 11:16:08.968259 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 11:16:08.971434 In relocation handler: CPU 1
433 11:16:08.974622 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 11:16:08.978391 Relocation complete.
435 11:16:08.984674 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
436 11:16:08.987736 In relocation handler: CPU 4
437 11:16:08.991245 New SMBASE=0x7afff000 IEDBASE=0x7b400000
438 11:16:08.994890 Relocation complete.
439 11:16:09.000930 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
440 11:16:09.004130 In relocation handler: CPU 5
441 11:16:09.007573 New SMBASE=0x7affec00 IEDBASE=0x7b400000
442 11:16:09.011020 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 11:16:09.013981 Relocation complete.
444 11:16:09.020655 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
445 11:16:09.024630 In relocation handler: CPU 3
446 11:16:09.027781 New SMBASE=0x7afff400 IEDBASE=0x7b400000
447 11:16:09.034405 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 11:16:09.034721 Relocation complete.
449 11:16:09.044121 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
450 11:16:09.047580 In relocation handler: CPU 7
451 11:16:09.050654 New SMBASE=0x7affe400 IEDBASE=0x7b400000
452 11:16:09.050971 Relocation complete.
453 11:16:09.061179 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
454 11:16:09.063902 In relocation handler: CPU 6
455 11:16:09.067002 New SMBASE=0x7affe800 IEDBASE=0x7b400000
456 11:16:09.070486 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 11:16:09.073858 Relocation complete.
458 11:16:09.080333 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
459 11:16:09.083641 In relocation handler: CPU 2
460 11:16:09.087618 New SMBASE=0x7afff800 IEDBASE=0x7b400000
461 11:16:09.091629 Relocation complete.
462 11:16:09.091972 Initializing CPU #0
463 11:16:09.094539 CPU: vendor Intel device 806c1
464 11:16:09.098147 CPU: family 06, model 8c, stepping 01
465 11:16:09.100714 Clearing out pending MCEs
466 11:16:09.104030 Setting up local APIC...
467 11:16:09.107481 apic_id: 0x00 done.
468 11:16:09.110539 Turbo is available but hidden
469 11:16:09.114149 Turbo is available and visible
470 11:16:09.117009 microcode: Update skipped, already up-to-date
471 11:16:09.121066 CPU #0 initialized
472 11:16:09.121426 Initializing CPU #3
473 11:16:09.123832 Initializing CPU #2
474 11:16:09.127354 Initializing CPU #6
475 11:16:09.127673 CPU: vendor Intel device 806c1
476 11:16:09.134485 CPU: family 06, model 8c, stepping 01
477 11:16:09.137169 CPU: vendor Intel device 806c1
478 11:16:09.140878 CPU: family 06, model 8c, stepping 01
479 11:16:09.143893 Clearing out pending MCEs
480 11:16:09.144250 Clearing out pending MCEs
481 11:16:09.147266 Setting up local APIC...
482 11:16:09.150393 Initializing CPU #7
483 11:16:09.153685 CPU: vendor Intel device 806c1
484 11:16:09.157528 CPU: family 06, model 8c, stepping 01
485 11:16:09.160627 CPU: vendor Intel device 806c1
486 11:16:09.163872 CPU: family 06, model 8c, stepping 01
487 11:16:09.166966 Clearing out pending MCEs
488 11:16:09.167287 Clearing out pending MCEs
489 11:16:09.170900 Setting up local APIC...
490 11:16:09.173788 apic_id: 0x03 done.
491 11:16:09.177275 Setting up local APIC...
492 11:16:09.177599 apic_id: 0x04 done.
493 11:16:09.179976 Setting up local APIC...
494 11:16:09.183330 Initializing CPU #1
495 11:16:09.183648 apic_id: 0x02 done.
496 11:16:09.189952 microcode: Update skipped, already up-to-date
497 11:16:09.193743 microcode: Update skipped, already up-to-date
498 11:16:09.197769 apic_id: 0x05 done.
499 11:16:09.199971 CPU: vendor Intel device 806c1
500 11:16:09.203460 CPU: family 06, model 8c, stepping 01
501 11:16:09.203806 CPU #3 initialized
502 11:16:09.210398 microcode: Update skipped, already up-to-date
503 11:16:09.210722 Initializing CPU #5
504 11:16:09.213768 Initializing CPU #4
505 11:16:09.216616 CPU: vendor Intel device 806c1
506 11:16:09.219949 CPU: family 06, model 8c, stepping 01
507 11:16:09.223173 CPU: vendor Intel device 806c1
508 11:16:09.226546 CPU: family 06, model 8c, stepping 01
509 11:16:09.230044 Clearing out pending MCEs
510 11:16:09.233366 Clearing out pending MCEs
511 11:16:09.236852 Setting up local APIC...
512 11:16:09.237164 Clearing out pending MCEs
513 11:16:09.239861 apic_id: 0x06 done.
514 11:16:09.243356 Setting up local APIC...
515 11:16:09.246735 microcode: Update skipped, already up-to-date
516 11:16:09.250009 CPU #2 initialized
517 11:16:09.250332 CPU #6 initialized
518 11:16:09.256446 microcode: Update skipped, already up-to-date
519 11:16:09.259687 apic_id: 0x07 done.
520 11:16:09.260021 CPU #5 initialized
521 11:16:09.262556 microcode: Update skipped, already up-to-date
522 11:16:09.266264 Setting up local APIC...
523 11:16:09.269612 CPU #4 initialized
524 11:16:09.270028 apic_id: 0x01 done.
525 11:16:09.272588 CPU #7 initialized
526 11:16:09.275843 microcode: Update skipped, already up-to-date
527 11:16:09.279381 CPU #1 initialized
528 11:16:09.282993 bsp_do_flight_plan done after 455 msecs.
529 11:16:09.286155 CPU: frequency set to 4000 MHz
530 11:16:09.289657 Enabling SMIs.
531 11:16:09.296849 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 11:16:09.310891 SATAXPCIE1 indicates PCIe NVMe is present
533 11:16:09.314675 Probing TPM: done!
534 11:16:09.318070 Connected to device vid:did:rid of 1ae0:0028:00
535 11:16:09.328403 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
536 11:16:09.331372 Initialized TPM device CR50 revision 0
537 11:16:09.334976 Enabling S0i3.4
538 11:16:09.341529 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 11:16:09.345098 Found a VBT of 8704 bytes after decompression
540 11:16:09.351678 cse_lite: CSE RO boot. HybridStorageMode disabled
541 11:16:09.358330 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 11:16:09.433922 FSPS returned 0
543 11:16:09.437163 Executing Phase 1 of FspMultiPhaseSiInit
544 11:16:09.447164 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 11:16:09.450608 port C0 DISC req: usage 1 usb3 1 usb2 5
546 11:16:09.453732 Raw Buffer output 0 00000511
547 11:16:09.457309 Raw Buffer output 1 00000000
548 11:16:09.461174 pmc_send_ipc_cmd succeeded
549 11:16:09.467622 port C1 DISC req: usage 1 usb3 2 usb2 3
550 11:16:09.468195 Raw Buffer output 0 00000321
551 11:16:09.471214 Raw Buffer output 1 00000000
552 11:16:09.475186 pmc_send_ipc_cmd succeeded
553 11:16:09.480086 Detected 4 core, 8 thread CPU.
554 11:16:09.484030 Detected 4 core, 8 thread CPU.
555 11:16:09.717417 Display FSP Version Info HOB
556 11:16:09.720177 Reference Code - CPU = a.0.4c.31
557 11:16:09.724460 uCode Version = 0.0.0.86
558 11:16:09.726884 TXT ACM version = ff.ff.ff.ffff
559 11:16:09.730149 Reference Code - ME = a.0.4c.31
560 11:16:09.733850 MEBx version = 0.0.0.0
561 11:16:09.737258 ME Firmware Version = Consumer SKU
562 11:16:09.740158 Reference Code - PCH = a.0.4c.31
563 11:16:09.743484 PCH-CRID Status = Disabled
564 11:16:09.746863 PCH-CRID Original Value = ff.ff.ff.ffff
565 11:16:09.750808 PCH-CRID New Value = ff.ff.ff.ffff
566 11:16:09.753426 OPROM - RST - RAID = ff.ff.ff.ffff
567 11:16:09.756705 PCH Hsio Version = 4.0.0.0
568 11:16:09.759836 Reference Code - SA - System Agent = a.0.4c.31
569 11:16:09.763926 Reference Code - MRC = 2.0.0.1
570 11:16:09.767029 SA - PCIe Version = a.0.4c.31
571 11:16:09.770793 SA-CRID Status = Disabled
572 11:16:09.773616 SA-CRID Original Value = 0.0.0.1
573 11:16:09.776744 SA-CRID New Value = 0.0.0.1
574 11:16:09.779791 OPROM - VBIOS = ff.ff.ff.ffff
575 11:16:09.783625 IO Manageability Engine FW Version = 11.1.4.0
576 11:16:09.787000 PHY Build Version = 0.0.0.e0
577 11:16:09.789730 Thunderbolt(TM) FW Version = 0.0.0.0
578 11:16:09.796346 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 11:16:09.799996 ITSS IRQ Polarities Before:
580 11:16:09.800437 IPC0: 0xffffffff
581 11:16:09.803025 IPC1: 0xffffffff
582 11:16:09.803563 IPC2: 0xffffffff
583 11:16:09.806759 IPC3: 0xffffffff
584 11:16:09.810129 ITSS IRQ Polarities After:
585 11:16:09.810576 IPC0: 0xffffffff
586 11:16:09.813149 IPC1: 0xffffffff
587 11:16:09.813599 IPC2: 0xffffffff
588 11:16:09.816454 IPC3: 0xffffffff
589 11:16:09.819606 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 11:16:09.832606 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 11:16:09.842948 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 11:16:09.855800 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 11:16:09.862565 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
594 11:16:09.865803 Enumerating buses...
595 11:16:09.869207 Show all devs... Before device enumeration.
596 11:16:09.872271 Root Device: enabled 1
597 11:16:09.875820 DOMAIN: 0000: enabled 1
598 11:16:09.876269 CPU_CLUSTER: 0: enabled 1
599 11:16:09.879130 PCI: 00:00.0: enabled 1
600 11:16:09.883237 PCI: 00:02.0: enabled 1
601 11:16:09.886117 PCI: 00:04.0: enabled 1
602 11:16:09.886719 PCI: 00:05.0: enabled 1
603 11:16:09.889147 PCI: 00:06.0: enabled 0
604 11:16:09.892446 PCI: 00:07.0: enabled 0
605 11:16:09.892893 PCI: 00:07.1: enabled 0
606 11:16:09.895619 PCI: 00:07.2: enabled 0
607 11:16:09.899292 PCI: 00:07.3: enabled 0
608 11:16:09.902091 PCI: 00:08.0: enabled 1
609 11:16:09.902539 PCI: 00:09.0: enabled 0
610 11:16:09.905693 PCI: 00:0a.0: enabled 0
611 11:16:09.909170 PCI: 00:0d.0: enabled 1
612 11:16:09.912318 PCI: 00:0d.1: enabled 0
613 11:16:09.912769 PCI: 00:0d.2: enabled 0
614 11:16:09.915491 PCI: 00:0d.3: enabled 0
615 11:16:09.918769 PCI: 00:0e.0: enabled 0
616 11:16:09.922349 PCI: 00:10.2: enabled 1
617 11:16:09.922861 PCI: 00:10.6: enabled 0
618 11:16:09.925433 PCI: 00:10.7: enabled 0
619 11:16:09.928714 PCI: 00:12.0: enabled 0
620 11:16:09.931833 PCI: 00:12.6: enabled 0
621 11:16:09.932280 PCI: 00:13.0: enabled 0
622 11:16:09.935806 PCI: 00:14.0: enabled 1
623 11:16:09.938734 PCI: 00:14.1: enabled 0
624 11:16:09.942716 PCI: 00:14.2: enabled 1
625 11:16:09.943295 PCI: 00:14.3: enabled 1
626 11:16:09.945095 PCI: 00:15.0: enabled 1
627 11:16:09.948704 PCI: 00:15.1: enabled 1
628 11:16:09.949155 PCI: 00:15.2: enabled 1
629 11:16:09.952184 PCI: 00:15.3: enabled 1
630 11:16:09.954969 PCI: 00:16.0: enabled 1
631 11:16:09.958741 PCI: 00:16.1: enabled 0
632 11:16:09.959298 PCI: 00:16.2: enabled 0
633 11:16:09.961960 PCI: 00:16.3: enabled 0
634 11:16:09.965941 PCI: 00:16.4: enabled 0
635 11:16:09.968801 PCI: 00:16.5: enabled 0
636 11:16:09.969249 PCI: 00:17.0: enabled 1
637 11:16:09.971841 PCI: 00:19.0: enabled 0
638 11:16:09.975081 PCI: 00:19.1: enabled 1
639 11:16:09.979006 PCI: 00:19.2: enabled 0
640 11:16:09.979557 PCI: 00:1c.0: enabled 1
641 11:16:09.981738 PCI: 00:1c.1: enabled 0
642 11:16:09.985002 PCI: 00:1c.2: enabled 0
643 11:16:09.988357 PCI: 00:1c.3: enabled 0
644 11:16:09.988813 PCI: 00:1c.4: enabled 0
645 11:16:09.991625 PCI: 00:1c.5: enabled 0
646 11:16:09.994868 PCI: 00:1c.6: enabled 1
647 11:16:09.995315 PCI: 00:1c.7: enabled 0
648 11:16:09.998172 PCI: 00:1d.0: enabled 1
649 11:16:10.001594 PCI: 00:1d.1: enabled 0
650 11:16:10.004730 PCI: 00:1d.2: enabled 1
651 11:16:10.005177 PCI: 00:1d.3: enabled 0
652 11:16:10.008240 PCI: 00:1e.0: enabled 1
653 11:16:10.011738 PCI: 00:1e.1: enabled 0
654 11:16:10.014748 PCI: 00:1e.2: enabled 1
655 11:16:10.015205 PCI: 00:1e.3: enabled 1
656 11:16:10.017988 PCI: 00:1f.0: enabled 1
657 11:16:10.021224 PCI: 00:1f.1: enabled 0
658 11:16:10.024681 PCI: 00:1f.2: enabled 1
659 11:16:10.025136 PCI: 00:1f.3: enabled 1
660 11:16:10.028207 PCI: 00:1f.4: enabled 0
661 11:16:10.031434 PCI: 00:1f.5: enabled 1
662 11:16:10.034574 PCI: 00:1f.6: enabled 0
663 11:16:10.035022 PCI: 00:1f.7: enabled 0
664 11:16:10.037867 APIC: 00: enabled 1
665 11:16:10.041360 GENERIC: 0.0: enabled 1
666 11:16:10.041854 GENERIC: 0.0: enabled 1
667 11:16:10.044405 GENERIC: 1.0: enabled 1
668 11:16:10.048009 GENERIC: 0.0: enabled 1
669 11:16:10.051070 GENERIC: 1.0: enabled 1
670 11:16:10.051516 USB0 port 0: enabled 1
671 11:16:10.054591 GENERIC: 0.0: enabled 1
672 11:16:10.057811 USB0 port 0: enabled 1
673 11:16:10.058256 GENERIC: 0.0: enabled 1
674 11:16:10.061465 I2C: 00:1a: enabled 1
675 11:16:10.064405 I2C: 00:31: enabled 1
676 11:16:10.068106 I2C: 00:32: enabled 1
677 11:16:10.068661 I2C: 00:10: enabled 1
678 11:16:10.071170 I2C: 00:15: enabled 1
679 11:16:10.074066 GENERIC: 0.0: enabled 0
680 11:16:10.074513 GENERIC: 1.0: enabled 0
681 11:16:10.077847 GENERIC: 0.0: enabled 1
682 11:16:10.082101 SPI: 00: enabled 1
683 11:16:10.082652 SPI: 00: enabled 1
684 11:16:10.084357 PNP: 0c09.0: enabled 1
685 11:16:10.087718 GENERIC: 0.0: enabled 1
686 11:16:10.088186 USB3 port 0: enabled 1
687 11:16:10.090852 USB3 port 1: enabled 1
688 11:16:10.094388 USB3 port 2: enabled 0
689 11:16:10.097462 USB3 port 3: enabled 0
690 11:16:10.097909 USB2 port 0: enabled 0
691 11:16:10.101463 USB2 port 1: enabled 1
692 11:16:10.103642 USB2 port 2: enabled 1
693 11:16:10.104122 USB2 port 3: enabled 0
694 11:16:10.107374 USB2 port 4: enabled 1
695 11:16:10.110698 USB2 port 5: enabled 0
696 11:16:10.113829 USB2 port 6: enabled 0
697 11:16:10.114301 USB2 port 7: enabled 0
698 11:16:10.117209 USB2 port 8: enabled 0
699 11:16:10.121187 USB2 port 9: enabled 0
700 11:16:10.121633 USB3 port 0: enabled 0
701 11:16:10.123769 USB3 port 1: enabled 1
702 11:16:10.127297 USB3 port 2: enabled 0
703 11:16:10.130688 USB3 port 3: enabled 0
704 11:16:10.131134 GENERIC: 0.0: enabled 1
705 11:16:10.133844 GENERIC: 1.0: enabled 1
706 11:16:10.137160 APIC: 01: enabled 1
707 11:16:10.137660 APIC: 03: enabled 1
708 11:16:10.140654 APIC: 04: enabled 1
709 11:16:10.141104 APIC: 07: enabled 1
710 11:16:10.144238 APIC: 06: enabled 1
711 11:16:10.147224 APIC: 02: enabled 1
712 11:16:10.147666 APIC: 05: enabled 1
713 11:16:10.150500 Compare with tree...
714 11:16:10.153607 Root Device: enabled 1
715 11:16:10.154051 DOMAIN: 0000: enabled 1
716 11:16:10.157004 PCI: 00:00.0: enabled 1
717 11:16:10.160186 PCI: 00:02.0: enabled 1
718 11:16:10.163879 PCI: 00:04.0: enabled 1
719 11:16:10.167309 GENERIC: 0.0: enabled 1
720 11:16:10.167885 PCI: 00:05.0: enabled 1
721 11:16:10.170487 PCI: 00:06.0: enabled 0
722 11:16:10.173972 PCI: 00:07.0: enabled 0
723 11:16:10.177252 GENERIC: 0.0: enabled 1
724 11:16:10.180225 PCI: 00:07.1: enabled 0
725 11:16:10.183567 GENERIC: 1.0: enabled 1
726 11:16:10.184036 PCI: 00:07.2: enabled 0
727 11:16:10.186891 GENERIC: 0.0: enabled 1
728 11:16:10.190146 PCI: 00:07.3: enabled 0
729 11:16:10.193470 GENERIC: 1.0: enabled 1
730 11:16:10.196656 PCI: 00:08.0: enabled 1
731 11:16:10.197105 PCI: 00:09.0: enabled 0
732 11:16:10.199951 PCI: 00:0a.0: enabled 0
733 11:16:10.203507 PCI: 00:0d.0: enabled 1
734 11:16:10.206591 USB0 port 0: enabled 1
735 11:16:10.210132 USB3 port 0: enabled 1
736 11:16:10.210581 USB3 port 1: enabled 1
737 11:16:10.213542 USB3 port 2: enabled 0
738 11:16:10.217139 USB3 port 3: enabled 0
739 11:16:10.220458 PCI: 00:0d.1: enabled 0
740 11:16:10.223550 PCI: 00:0d.2: enabled 0
741 11:16:10.224058 GENERIC: 0.0: enabled 1
742 11:16:10.226687 PCI: 00:0d.3: enabled 0
743 11:16:10.230923 PCI: 00:0e.0: enabled 0
744 11:16:10.233598 PCI: 00:10.2: enabled 1
745 11:16:10.236539 PCI: 00:10.6: enabled 0
746 11:16:10.236985 PCI: 00:10.7: enabled 0
747 11:16:10.239811 PCI: 00:12.0: enabled 0
748 11:16:10.242925 PCI: 00:12.6: enabled 0
749 11:16:10.246414 PCI: 00:13.0: enabled 0
750 11:16:10.249850 PCI: 00:14.0: enabled 1
751 11:16:10.250296 USB0 port 0: enabled 1
752 11:16:10.253027 USB2 port 0: enabled 0
753 11:16:10.256614 USB2 port 1: enabled 1
754 11:16:10.259792 USB2 port 2: enabled 1
755 11:16:10.262907 USB2 port 3: enabled 0
756 11:16:10.266217 USB2 port 4: enabled 1
757 11:16:10.266847 USB2 port 5: enabled 0
758 11:16:10.269648 USB2 port 6: enabled 0
759 11:16:10.273136 USB2 port 7: enabled 0
760 11:16:10.276113 USB2 port 8: enabled 0
761 11:16:10.279492 USB2 port 9: enabled 0
762 11:16:10.282911 USB3 port 0: enabled 0
763 11:16:10.283362 USB3 port 1: enabled 1
764 11:16:10.286721 USB3 port 2: enabled 0
765 11:16:10.289692 USB3 port 3: enabled 0
766 11:16:10.292446 PCI: 00:14.1: enabled 0
767 11:16:10.296143 PCI: 00:14.2: enabled 1
768 11:16:10.296597 PCI: 00:14.3: enabled 1
769 11:16:10.299063 GENERIC: 0.0: enabled 1
770 11:16:10.302412 PCI: 00:15.0: enabled 1
771 11:16:10.305902 I2C: 00:1a: enabled 1
772 11:16:10.309537 I2C: 00:31: enabled 1
773 11:16:10.309989 I2C: 00:32: enabled 1
774 11:16:10.312405 PCI: 00:15.1: enabled 1
775 11:16:10.315523 I2C: 00:10: enabled 1
776 11:16:10.319060 PCI: 00:15.2: enabled 1
777 11:16:10.323191 PCI: 00:15.3: enabled 1
778 11:16:10.323773 PCI: 00:16.0: enabled 1
779 11:16:10.326618 PCI: 00:16.1: enabled 0
780 11:16:10.330209 PCI: 00:16.2: enabled 0
781 11:16:10.330693 PCI: 00:16.3: enabled 0
782 11:16:10.333438 PCI: 00:16.4: enabled 0
783 11:16:10.336700 PCI: 00:16.5: enabled 0
784 11:16:10.340160 PCI: 00:17.0: enabled 1
785 11:16:10.343274 PCI: 00:19.0: enabled 0
786 11:16:10.343762 PCI: 00:19.1: enabled 1
787 11:16:10.347312 I2C: 00:15: enabled 1
788 11:16:10.349763 PCI: 00:19.2: enabled 0
789 11:16:10.353406 PCI: 00:1d.0: enabled 1
790 11:16:10.356445 GENERIC: 0.0: enabled 1
791 11:16:10.356898 PCI: 00:1e.0: enabled 1
792 11:16:10.359717 PCI: 00:1e.1: enabled 0
793 11:16:10.363430 PCI: 00:1e.2: enabled 1
794 11:16:10.413218 SPI: 00: enabled 1
795 11:16:10.413866 PCI: 00:1e.3: enabled 1
796 11:16:10.414385 SPI: 00: enabled 1
797 11:16:10.414922 PCI: 00:1f.0: enabled 1
798 11:16:10.415558 PNP: 0c09.0: enabled 1
799 11:16:10.416461 PCI: 00:1f.1: enabled 0
800 11:16:10.416885 PCI: 00:1f.2: enabled 1
801 11:16:10.417355 GENERIC: 0.0: enabled 1
802 11:16:10.417831 GENERIC: 0.0: enabled 1
803 11:16:10.418275 GENERIC: 1.0: enabled 1
804 11:16:10.418717 PCI: 00:1f.3: enabled 1
805 11:16:10.419156 PCI: 00:1f.4: enabled 0
806 11:16:10.419586 PCI: 00:1f.5: enabled 1
807 11:16:10.420054 PCI: 00:1f.6: enabled 0
808 11:16:10.420489 PCI: 00:1f.7: enabled 0
809 11:16:10.420922 CPU_CLUSTER: 0: enabled 1
810 11:16:10.421347 APIC: 00: enabled 1
811 11:16:10.422128 APIC: 01: enabled 1
812 11:16:10.422530 APIC: 03: enabled 1
813 11:16:10.422973 APIC: 04: enabled 1
814 11:16:10.465694 APIC: 07: enabled 1
815 11:16:10.466337 APIC: 06: enabled 1
816 11:16:10.466847 APIC: 02: enabled 1
817 11:16:10.467717 APIC: 05: enabled 1
818 11:16:10.468162 Root Device scanning...
819 11:16:10.468636 scan_static_bus for Root Device
820 11:16:10.469086 DOMAIN: 0000 enabled
821 11:16:10.469524 CPU_CLUSTER: 0 enabled
822 11:16:10.469957 DOMAIN: 0000 scanning...
823 11:16:10.470390 PCI: pci_scan_bus for bus 00
824 11:16:10.470783 PCI: 00:00.0 [8086/0000] ops
825 11:16:10.471178 PCI: 00:00.0 [8086/9a12] enabled
826 11:16:10.471565 PCI: 00:02.0 [8086/0000] bus ops
827 11:16:10.471981 PCI: 00:02.0 [8086/9a40] enabled
828 11:16:10.472699 PCI: 00:04.0 [8086/0000] bus ops
829 11:16:10.473061 PCI: 00:04.0 [8086/9a03] enabled
830 11:16:10.473465 PCI: 00:05.0 [8086/9a19] enabled
831 11:16:10.473855 PCI: 00:07.0 [0000/0000] hidden
832 11:16:10.511486 PCI: 00:08.0 [8086/9a11] enabled
833 11:16:10.512674 PCI: 00:0a.0 [8086/9a0d] disabled
834 11:16:10.513126 PCI: 00:0d.0 [8086/0000] bus ops
835 11:16:10.513604 PCI: 00:0d.0 [8086/9a13] enabled
836 11:16:10.514061 PCI: 00:14.0 [8086/0000] bus ops
837 11:16:10.514511 PCI: 00:14.0 [8086/a0ed] enabled
838 11:16:10.514953 PCI: 00:14.2 [8086/a0ef] enabled
839 11:16:10.515395 PCI: 00:14.3 [8086/0000] bus ops
840 11:16:10.515872 PCI: 00:14.3 [8086/a0f0] enabled
841 11:16:10.516728 PCI: 00:15.0 [8086/0000] bus ops
842 11:16:10.517154 PCI: 00:15.0 [8086/a0e8] enabled
843 11:16:10.517622 PCI: 00:15.1 [8086/0000] bus ops
844 11:16:10.518065 PCI: 00:15.1 [8086/a0e9] enabled
845 11:16:10.518504 PCI: 00:15.2 [8086/0000] bus ops
846 11:16:10.518934 PCI: 00:15.2 [8086/a0ea] enabled
847 11:16:10.519731 PCI: 00:15.3 [8086/0000] bus ops
848 11:16:10.522874 PCI: 00:15.3 [8086/a0eb] enabled
849 11:16:10.526540 PCI: 00:16.0 [8086/0000] ops
850 11:16:10.529432 PCI: 00:16.0 [8086/a0e0] enabled
851 11:16:10.537618 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 11:16:10.539599 PCI: 00:19.0 [8086/0000] bus ops
853 11:16:10.543024 PCI: 00:19.0 [8086/a0c5] disabled
854 11:16:10.545934 PCI: 00:19.1 [8086/0000] bus ops
855 11:16:10.549721 PCI: 00:19.1 [8086/a0c6] enabled
856 11:16:10.552399 PCI: 00:1d.0 [8086/0000] bus ops
857 11:16:10.555461 PCI: 00:1d.0 [8086/a0b0] enabled
858 11:16:10.558858 PCI: 00:1e.0 [8086/0000] ops
859 11:16:10.562565 PCI: 00:1e.0 [8086/a0a8] enabled
860 11:16:10.565837 PCI: 00:1e.2 [8086/0000] bus ops
861 11:16:10.568687 PCI: 00:1e.2 [8086/a0aa] enabled
862 11:16:10.572410 PCI: 00:1e.3 [8086/0000] bus ops
863 11:16:10.575965 PCI: 00:1e.3 [8086/a0ab] enabled
864 11:16:10.578866 PCI: 00:1f.0 [8086/0000] bus ops
865 11:16:10.582169 PCI: 00:1f.0 [8086/a087] enabled
866 11:16:10.582756 RTC Init
867 11:16:10.585484 Set power on after power failure.
868 11:16:10.588632 Disabling Deep S3
869 11:16:10.591722 Disabling Deep S3
870 11:16:10.592285 Disabling Deep S4
871 11:16:10.595297 Disabling Deep S4
872 11:16:10.595810 Disabling Deep S5
873 11:16:10.599620 Disabling Deep S5
874 11:16:10.602475 PCI: 00:1f.2 [0000/0000] hidden
875 11:16:10.604931 PCI: 00:1f.3 [8086/0000] bus ops
876 11:16:10.609310 PCI: 00:1f.3 [8086/a0c8] enabled
877 11:16:10.611819 PCI: 00:1f.5 [8086/0000] bus ops
878 11:16:10.615336 PCI: 00:1f.5 [8086/a0a4] enabled
879 11:16:10.618280 PCI: Leftover static devices:
880 11:16:10.618809 PCI: 00:10.2
881 11:16:10.621695 PCI: 00:10.6
882 11:16:10.622187 PCI: 00:10.7
883 11:16:10.622578 PCI: 00:06.0
884 11:16:10.624820 PCI: 00:07.1
885 11:16:10.625311 PCI: 00:07.2
886 11:16:10.628311 PCI: 00:07.3
887 11:16:10.628884 PCI: 00:09.0
888 11:16:10.632203 PCI: 00:0d.1
889 11:16:10.632870 PCI: 00:0d.2
890 11:16:10.633292 PCI: 00:0d.3
891 11:16:10.635207 PCI: 00:0e.0
892 11:16:10.635754 PCI: 00:12.0
893 11:16:10.638261 PCI: 00:12.6
894 11:16:10.638783 PCI: 00:13.0
895 11:16:10.639266 PCI: 00:14.1
896 11:16:10.641575 PCI: 00:16.1
897 11:16:10.642026 PCI: 00:16.2
898 11:16:10.645075 PCI: 00:16.3
899 11:16:10.645526 PCI: 00:16.4
900 11:16:10.645884 PCI: 00:16.5
901 11:16:10.648010 PCI: 00:17.0
902 11:16:10.648463 PCI: 00:19.2
903 11:16:10.651537 PCI: 00:1e.1
904 11:16:10.652146 PCI: 00:1f.1
905 11:16:10.654873 PCI: 00:1f.4
906 11:16:10.655423 PCI: 00:1f.6
907 11:16:10.655927 PCI: 00:1f.7
908 11:16:10.658486 PCI: Check your devicetree.cb.
909 11:16:10.661351 PCI: 00:02.0 scanning...
910 11:16:10.665006 scan_generic_bus for PCI: 00:02.0
911 11:16:10.667892 scan_generic_bus for PCI: 00:02.0 done
912 11:16:10.674971 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 11:16:10.677754 PCI: 00:04.0 scanning...
914 11:16:10.681538 scan_generic_bus for PCI: 00:04.0
915 11:16:10.682108 GENERIC: 0.0 enabled
916 11:16:10.687919 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 11:16:10.694623 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 11:16:10.695097 PCI: 00:0d.0 scanning...
919 11:16:10.698300 scan_static_bus for PCI: 00:0d.0
920 11:16:10.701287 USB0 port 0 enabled
921 11:16:10.704553 USB0 port 0 scanning...
922 11:16:10.707681 scan_static_bus for USB0 port 0
923 11:16:10.708161 USB3 port 0 enabled
924 11:16:10.710836 USB3 port 1 enabled
925 11:16:10.714681 USB3 port 2 disabled
926 11:16:10.715172 USB3 port 3 disabled
927 11:16:10.717839 USB3 port 0 scanning...
928 11:16:10.721155 scan_static_bus for USB3 port 0
929 11:16:10.724136 scan_static_bus for USB3 port 0 done
930 11:16:10.730910 scan_bus: bus USB3 port 0 finished in 6 msecs
931 11:16:10.731441 USB3 port 1 scanning...
932 11:16:10.734290 scan_static_bus for USB3 port 1
933 11:16:10.740975 scan_static_bus for USB3 port 1 done
934 11:16:10.743774 scan_bus: bus USB3 port 1 finished in 6 msecs
935 11:16:10.747479 scan_static_bus for USB0 port 0 done
936 11:16:10.753891 scan_bus: bus USB0 port 0 finished in 43 msecs
937 11:16:10.757499 scan_static_bus for PCI: 00:0d.0 done
938 11:16:10.760523 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 11:16:10.763743 PCI: 00:14.0 scanning...
940 11:16:10.767505 scan_static_bus for PCI: 00:14.0
941 11:16:10.770356 USB0 port 0 enabled
942 11:16:10.770903 USB0 port 0 scanning...
943 11:16:10.773617 scan_static_bus for USB0 port 0
944 11:16:10.777437 USB2 port 0 disabled
945 11:16:10.780661 USB2 port 1 enabled
946 11:16:10.781111 USB2 port 2 enabled
947 11:16:10.783987 USB2 port 3 disabled
948 11:16:10.786987 USB2 port 4 enabled
949 11:16:10.787530 USB2 port 5 disabled
950 11:16:10.790284 USB2 port 6 disabled
951 11:16:10.790731 USB2 port 7 disabled
952 11:16:10.793468 USB2 port 8 disabled
953 11:16:10.797305 USB2 port 9 disabled
954 11:16:10.797870 USB3 port 0 disabled
955 11:16:10.800171 USB3 port 1 enabled
956 11:16:10.803535 USB3 port 2 disabled
957 11:16:10.804149 USB3 port 3 disabled
958 11:16:10.807191 USB2 port 1 scanning...
959 11:16:10.809981 scan_static_bus for USB2 port 1
960 11:16:10.813952 scan_static_bus for USB2 port 1 done
961 11:16:10.819671 scan_bus: bus USB2 port 1 finished in 6 msecs
962 11:16:10.820203 USB2 port 2 scanning...
963 11:16:10.823468 scan_static_bus for USB2 port 2
964 11:16:10.831261 scan_static_bus for USB2 port 2 done
965 11:16:10.833417 scan_bus: bus USB2 port 2 finished in 6 msecs
966 11:16:10.836686 USB2 port 4 scanning...
967 11:16:10.840361 scan_static_bus for USB2 port 4
968 11:16:10.843533 scan_static_bus for USB2 port 4 done
969 11:16:10.846859 scan_bus: bus USB2 port 4 finished in 6 msecs
970 11:16:10.850563 USB3 port 1 scanning...
971 11:16:10.853740 scan_static_bus for USB3 port 1
972 11:16:10.856507 scan_static_bus for USB3 port 1 done
973 11:16:10.863005 scan_bus: bus USB3 port 1 finished in 6 msecs
974 11:16:10.866457 scan_static_bus for USB0 port 0 done
975 11:16:10.870052 scan_bus: bus USB0 port 0 finished in 93 msecs
976 11:16:10.872866 scan_static_bus for PCI: 00:14.0 done
977 11:16:10.880125 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 11:16:10.883432 PCI: 00:14.3 scanning...
979 11:16:10.886505 scan_static_bus for PCI: 00:14.3
980 11:16:10.887109 GENERIC: 0.0 enabled
981 11:16:10.889810 scan_static_bus for PCI: 00:14.3 done
982 11:16:10.896298 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 11:16:10.900046 PCI: 00:15.0 scanning...
984 11:16:10.900605 scan_static_bus for PCI: 00:15.0
985 11:16:10.903867 I2C: 00:1a enabled
986 11:16:10.906939 I2C: 00:31 enabled
987 11:16:10.907393 I2C: 00:32 enabled
988 11:16:10.910200 scan_static_bus for PCI: 00:15.0 done
989 11:16:10.916807 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 11:16:10.917267 PCI: 00:15.1 scanning...
991 11:16:10.921053 scan_static_bus for PCI: 00:15.1
992 11:16:10.923713 I2C: 00:10 enabled
993 11:16:10.927055 scan_static_bus for PCI: 00:15.1 done
994 11:16:10.934354 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 11:16:10.934814 PCI: 00:15.2 scanning...
996 11:16:10.937242 scan_static_bus for PCI: 00:15.2
997 11:16:10.943557 scan_static_bus for PCI: 00:15.2 done
998 11:16:10.946706 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 11:16:10.950624 PCI: 00:15.3 scanning...
1000 11:16:10.953938 scan_static_bus for PCI: 00:15.3
1001 11:16:10.957207 scan_static_bus for PCI: 00:15.3 done
1002 11:16:10.960675 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 11:16:10.963471 PCI: 00:19.1 scanning...
1004 11:16:10.967055 scan_static_bus for PCI: 00:19.1
1005 11:16:10.970617 I2C: 00:15 enabled
1006 11:16:10.973484 scan_static_bus for PCI: 00:19.1 done
1007 11:16:10.979760 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 11:16:10.980274 PCI: 00:1d.0 scanning...
1009 11:16:10.983234 do_pci_scan_bridge for PCI: 00:1d.0
1010 11:16:10.986224 PCI: pci_scan_bus for bus 01
1011 11:16:10.989607 PCI: 01:00.0 [1c5c/174a] enabled
1012 11:16:10.992752 GENERIC: 0.0 enabled
1013 11:16:10.996255 Enabling Common Clock Configuration
1014 11:16:11.003331 L1 Sub-State supported from root port 29
1015 11:16:11.003964 L1 Sub-State Support = 0xf
1016 11:16:11.006414 CommonModeRestoreTime = 0x28
1017 11:16:11.012577 Power On Value = 0x16, Power On Scale = 0x0
1018 11:16:11.013080 ASPM: Enabled L1
1019 11:16:11.016044 PCIe: Max_Payload_Size adjusted to 128
1020 11:16:11.022777 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 11:16:11.025861 PCI: 00:1e.2 scanning...
1022 11:16:11.028797 scan_generic_bus for PCI: 00:1e.2
1023 11:16:11.029326 SPI: 00 enabled
1024 11:16:11.035961 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 11:16:11.038805 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 11:16:11.043383 PCI: 00:1e.3 scanning...
1027 11:16:11.045437 scan_generic_bus for PCI: 00:1e.3
1028 11:16:11.049046 SPI: 00 enabled
1029 11:16:11.055080 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 11:16:11.059016 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 11:16:11.062467 PCI: 00:1f.0 scanning...
1032 11:16:11.064945 scan_static_bus for PCI: 00:1f.0
1033 11:16:11.068551 PNP: 0c09.0 enabled
1034 11:16:11.069004 PNP: 0c09.0 scanning...
1035 11:16:11.071545 scan_static_bus for PNP: 0c09.0
1036 11:16:11.078957 scan_static_bus for PNP: 0c09.0 done
1037 11:16:11.082058 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 11:16:11.085296 scan_static_bus for PCI: 00:1f.0 done
1039 11:16:11.091622 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 11:16:11.092239 PCI: 00:1f.2 scanning...
1041 11:16:11.095405 scan_static_bus for PCI: 00:1f.2
1042 11:16:11.098253 GENERIC: 0.0 enabled
1043 11:16:11.101760 GENERIC: 0.0 scanning...
1044 11:16:11.104879 scan_static_bus for GENERIC: 0.0
1045 11:16:11.108910 GENERIC: 0.0 enabled
1046 11:16:11.109466 GENERIC: 1.0 enabled
1047 11:16:11.111509 scan_static_bus for GENERIC: 0.0 done
1048 11:16:11.118524 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 11:16:11.121654 scan_static_bus for PCI: 00:1f.2 done
1050 11:16:11.124975 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 11:16:11.128243 PCI: 00:1f.3 scanning...
1052 11:16:11.131032 scan_static_bus for PCI: 00:1f.3
1053 11:16:11.134467 scan_static_bus for PCI: 00:1f.3 done
1054 11:16:11.141698 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 11:16:11.144418 PCI: 00:1f.5 scanning...
1056 11:16:11.148087 scan_generic_bus for PCI: 00:1f.5
1057 11:16:11.151858 scan_generic_bus for PCI: 00:1f.5 done
1058 11:16:11.154735 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 11:16:11.161078 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1060 11:16:11.164181 scan_static_bus for Root Device done
1061 11:16:11.167317 scan_bus: bus Root Device finished in 736 msecs
1062 11:16:11.171075 done
1063 11:16:11.174219 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 11:16:11.177784 Chrome EC: UHEPI supported
1065 11:16:11.184090 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 11:16:11.190924 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 11:16:11.193883 SPI flash protection: WPSW=0 SRP0=0
1068 11:16:11.201036 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 11:16:11.203717 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 11:16:11.206898 found VGA at PCI: 00:02.0
1071 11:16:11.210984 Setting up VGA for PCI: 00:02.0
1072 11:16:11.217398 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 11:16:11.220814 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 11:16:11.223531 Allocating resources...
1075 11:16:11.226865 Reading resources...
1076 11:16:11.230145 Root Device read_resources bus 0 link: 0
1077 11:16:11.233273 DOMAIN: 0000 read_resources bus 0 link: 0
1078 11:16:11.240241 PCI: 00:04.0 read_resources bus 1 link: 0
1079 11:16:11.243802 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 11:16:11.250721 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 11:16:11.253917 USB0 port 0 read_resources bus 0 link: 0
1082 11:16:11.260750 USB0 port 0 read_resources bus 0 link: 0 done
1083 11:16:11.263485 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 11:16:11.270357 PCI: 00:14.0 read_resources bus 0 link: 0
1085 11:16:11.273968 USB0 port 0 read_resources bus 0 link: 0
1086 11:16:11.280401 USB0 port 0 read_resources bus 0 link: 0 done
1087 11:16:11.283251 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 11:16:11.289961 PCI: 00:14.3 read_resources bus 0 link: 0
1089 11:16:11.294095 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 11:16:11.300155 PCI: 00:15.0 read_resources bus 0 link: 0
1091 11:16:11.302989 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 11:16:11.310270 PCI: 00:15.1 read_resources bus 0 link: 0
1093 11:16:11.313139 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 11:16:11.320131 PCI: 00:19.1 read_resources bus 0 link: 0
1095 11:16:11.323284 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 11:16:11.330262 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 11:16:11.332949 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 11:16:11.339804 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 11:16:11.343415 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 11:16:11.349850 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 11:16:11.352850 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 11:16:11.360076 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 11:16:11.362806 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 11:16:11.369497 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 11:16:11.372961 GENERIC: 0.0 read_resources bus 0 link: 0
1106 11:16:11.379847 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 11:16:11.382424 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 11:16:11.389528 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 11:16:11.392391 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 11:16:11.398996 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 11:16:11.402490 Root Device read_resources bus 0 link: 0 done
1112 11:16:11.405469 Done reading resources.
1113 11:16:11.412878 Show resources in subtree (Root Device)...After reading.
1114 11:16:11.415461 Root Device child on link 0 DOMAIN: 0000
1115 11:16:11.419326 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 11:16:11.429603 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 11:16:11.438690 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 11:16:11.441933 PCI: 00:00.0
1119 11:16:11.449170 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 11:16:11.459138 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 11:16:11.468809 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 11:16:11.478441 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 11:16:11.488240 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 11:16:11.498520 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 11:16:11.504888 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 11:16:11.515309 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 11:16:11.525084 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 11:16:11.534512 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 11:16:11.544778 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 11:16:11.554716 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 11:16:11.561772 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 11:16:11.571461 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 11:16:11.581189 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 11:16:11.590949 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 11:16:11.601314 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 11:16:11.611180 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 11:16:11.617544 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 11:16:11.627775 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 11:16:11.631110 PCI: 00:02.0
1140 11:16:11.640653 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 11:16:11.650866 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 11:16:11.660922 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 11:16:11.663591 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 11:16:11.674036 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 11:16:11.677031 GENERIC: 0.0
1146 11:16:11.677495 PCI: 00:05.0
1147 11:16:11.687173 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 11:16:11.693524 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 11:16:11.693982 GENERIC: 0.0
1150 11:16:11.696702 PCI: 00:08.0
1151 11:16:11.707310 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 11:16:11.707890 PCI: 00:0a.0
1153 11:16:11.713394 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 11:16:11.723485 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 11:16:11.726623 USB0 port 0 child on link 0 USB3 port 0
1156 11:16:11.727165 USB3 port 0
1157 11:16:11.730071 USB3 port 1
1158 11:16:11.730525 USB3 port 2
1159 11:16:11.733670 USB3 port 3
1160 11:16:11.736953 PCI: 00:14.0 child on link 0 USB0 port 0
1161 11:16:11.746540 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 11:16:11.753150 USB0 port 0 child on link 0 USB2 port 0
1163 11:16:11.753706 USB2 port 0
1164 11:16:11.756546 USB2 port 1
1165 11:16:11.757004 USB2 port 2
1166 11:16:11.759726 USB2 port 3
1167 11:16:11.760186 USB2 port 4
1168 11:16:11.762813 USB2 port 5
1169 11:16:11.763268 USB2 port 6
1170 11:16:11.767442 USB2 port 7
1171 11:16:11.769785 USB2 port 8
1172 11:16:11.770379 USB2 port 9
1173 11:16:11.772839 USB3 port 0
1174 11:16:11.773294 USB3 port 1
1175 11:16:11.776197 USB3 port 2
1176 11:16:11.776650 USB3 port 3
1177 11:16:11.779190 PCI: 00:14.2
1178 11:16:11.789461 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 11:16:11.799075 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 11:16:11.802664 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 11:16:11.812476 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 11:16:11.816211 GENERIC: 0.0
1183 11:16:11.818990 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 11:16:11.828903 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 11:16:11.829353 I2C: 00:1a
1186 11:16:11.832313 I2C: 00:31
1187 11:16:11.832760 I2C: 00:32
1188 11:16:11.839412 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 11:16:11.848665 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 11:16:11.849149 I2C: 00:10
1191 11:16:11.853059 PCI: 00:15.2
1192 11:16:11.861772 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 11:16:11.862307 PCI: 00:15.3
1194 11:16:11.871614 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 11:16:11.874995 PCI: 00:16.0
1196 11:16:11.885291 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 11:16:11.885741 PCI: 00:19.0
1198 11:16:11.891907 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 11:16:11.901666 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 11:16:11.902257 I2C: 00:15
1201 11:16:11.905500 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 11:16:11.914597 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 11:16:11.924762 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 11:16:11.934278 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 11:16:11.934851 GENERIC: 0.0
1206 11:16:11.937819 PCI: 01:00.0
1207 11:16:11.947493 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 11:16:11.957645 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 11:16:11.967366 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 11:16:11.967608 PCI: 00:1e.0
1211 11:16:11.977455 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 11:16:11.984205 PCI: 00:1e.2 child on link 0 SPI: 00
1213 11:16:11.993594 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 11:16:11.993836 SPI: 00
1215 11:16:11.996943 PCI: 00:1e.3 child on link 0 SPI: 00
1216 11:16:12.006677 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 11:16:12.010425 SPI: 00
1218 11:16:12.013647 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 11:16:12.023565 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 11:16:12.023977 PNP: 0c09.0
1221 11:16:12.033233 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 11:16:12.036747 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 11:16:12.046994 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 11:16:12.056296 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 11:16:12.060122 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 11:16:12.063291 GENERIC: 0.0
1227 11:16:12.063838 GENERIC: 1.0
1228 11:16:12.066161 PCI: 00:1f.3
1229 11:16:12.076498 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 11:16:12.086271 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 11:16:12.086721 PCI: 00:1f.5
1232 11:16:12.096066 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 11:16:12.099155 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 11:16:12.102785 APIC: 00
1235 11:16:12.103150 APIC: 01
1236 11:16:12.105680 APIC: 03
1237 11:16:12.105997 APIC: 04
1238 11:16:12.106248 APIC: 07
1239 11:16:12.109130 APIC: 06
1240 11:16:12.109445 APIC: 02
1241 11:16:12.112800 APIC: 05
1242 11:16:12.118966 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 11:16:12.125662 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 11:16:12.128711 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 11:16:12.135183 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 11:16:12.142468 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 11:16:12.145125 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 11:16:12.148402 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 11:16:12.155457 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 11:16:12.164744 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 11:16:12.171574 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 11:16:12.178374 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 11:16:12.185936 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 11:16:12.191234 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 11:16:12.198404 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 11:16:12.208335 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 11:16:12.211921 DOMAIN: 0000: Resource ranges:
1258 11:16:12.214769 * Base: 1000, Size: 800, Tag: 100
1259 11:16:12.218112 * Base: 1900, Size: e700, Tag: 100
1260 11:16:12.224727 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 11:16:12.231603 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 11:16:12.237659 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 11:16:12.244435 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 11:16:12.251408 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 11:16:12.260998 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 11:16:12.267791 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 11:16:12.274389 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 11:16:12.283970 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 11:16:12.290985 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 11:16:12.297708 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 11:16:12.307504 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 11:16:12.313811 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 11:16:12.321116 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 11:16:12.330392 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 11:16:12.337024 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 11:16:12.344064 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 11:16:12.353872 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 11:16:12.360065 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 11:16:12.366838 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 11:16:12.376621 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 11:16:12.383103 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 11:16:12.389738 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 11:16:12.399783 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 11:16:12.406352 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 11:16:12.409602 DOMAIN: 0000: Resource ranges:
1286 11:16:12.413079 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 11:16:12.420200 * Base: d0000000, Size: 28000000, Tag: 200
1288 11:16:12.422933 * Base: fa000000, Size: 1000000, Tag: 200
1289 11:16:12.426191 * Base: fb001000, Size: 2fff000, Tag: 200
1290 11:16:12.429953 * Base: fe010000, Size: 2e000, Tag: 200
1291 11:16:12.436568 * Base: fe03f000, Size: d41000, Tag: 200
1292 11:16:12.439575 * Base: fed88000, Size: 8000, Tag: 200
1293 11:16:12.442599 * Base: fed93000, Size: d000, Tag: 200
1294 11:16:12.446203 * Base: feda2000, Size: 1e000, Tag: 200
1295 11:16:12.452736 * Base: fede0000, Size: 1220000, Tag: 200
1296 11:16:12.456295 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 11:16:12.462508 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 11:16:12.469530 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 11:16:12.475958 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 11:16:12.482391 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 11:16:12.488709 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 11:16:12.495560 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 11:16:12.502000 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 11:16:12.508708 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 11:16:12.515455 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 11:16:12.522035 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 11:16:12.528625 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 11:16:12.535448 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 11:16:12.541820 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 11:16:12.548761 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 11:16:12.555433 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 11:16:12.561241 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 11:16:12.568515 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 11:16:12.574825 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 11:16:12.581318 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 11:16:12.587636 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 11:16:12.594694 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 11:16:12.601108 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 11:16:12.611012 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 11:16:12.617488 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 11:16:12.621176 PCI: 00:1d.0: Resource ranges:
1322 11:16:12.624076 * Base: 7fc00000, Size: 100000, Tag: 200
1323 11:16:12.630592 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 11:16:12.637756 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 11:16:12.644571 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 11:16:12.654102 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 11:16:12.660824 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 11:16:12.663875 Root Device assign_resources, bus 0 link: 0
1329 11:16:12.671388 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 11:16:12.677078 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 11:16:12.687978 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 11:16:12.693835 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 11:16:12.703834 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 11:16:12.707543 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 11:16:12.713913 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 11:16:12.720211 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 11:16:12.730485 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 11:16:12.736983 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 11:16:12.740272 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 11:16:12.746834 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 11:16:12.753053 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 11:16:12.759716 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 11:16:12.763113 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 11:16:12.772846 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 11:16:12.779443 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 11:16:12.789846 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 11:16:12.792621 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 11:16:12.795861 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 11:16:12.805911 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 11:16:12.809215 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 11:16:12.816023 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 11:16:12.822222 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 11:16:12.829445 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 11:16:12.832016 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 11:16:12.841798 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 11:16:12.848454 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 11:16:12.858283 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 11:16:12.865015 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 11:16:12.868921 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 11:16:12.874879 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 11:16:12.881734 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 11:16:12.894754 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 11:16:12.901543 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 11:16:12.904476 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 11:16:12.914529 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 11:16:12.921430 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 11:16:12.931120 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 11:16:12.934784 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 11:16:12.944506 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 11:16:12.947284 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 11:16:12.954112 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 11:16:12.960866 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 11:16:12.963999 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 11:16:12.970617 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 11:16:12.973552 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 11:16:12.980207 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 11:16:12.983748 LPC: Trying to open IO window from 800 size 1ff
1378 11:16:12.993811 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 11:16:13.000064 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 11:16:13.009943 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 11:16:13.013080 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 11:16:13.019652 Root Device assign_resources, bus 0 link: 0
1383 11:16:13.019789 Done setting resources.
1384 11:16:13.026559 Show resources in subtree (Root Device)...After assigning values.
1385 11:16:13.033330 Root Device child on link 0 DOMAIN: 0000
1386 11:16:13.036724 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 11:16:13.046528 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 11:16:13.056110 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 11:16:13.056197 PCI: 00:00.0
1390 11:16:13.066184 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 11:16:13.076549 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 11:16:13.085851 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 11:16:13.095384 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 11:16:13.105536 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 11:16:13.112418 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 11:16:13.121453 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 11:16:13.132310 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 11:16:13.141860 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 11:16:13.151988 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 11:16:13.161350 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 11:16:13.168920 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 11:16:13.178450 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 11:16:13.187509 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 11:16:13.197674 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 11:16:13.207888 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 11:16:13.217614 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 11:16:13.227708 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 11:16:13.233746 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 11:16:13.243554 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 11:16:13.246870 PCI: 00:02.0
1411 11:16:13.256801 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 11:16:13.266550 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 11:16:13.276881 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 11:16:13.283039 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 11:16:13.292892 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 11:16:13.292981 GENERIC: 0.0
1417 11:16:13.296278 PCI: 00:05.0
1418 11:16:13.306846 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 11:16:13.309929 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 11:16:13.312841 GENERIC: 0.0
1421 11:16:13.312928 PCI: 00:08.0
1422 11:16:13.325996 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 11:16:13.326086 PCI: 00:0a.0
1424 11:16:13.329291 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 11:16:13.342499 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 11:16:13.345970 USB0 port 0 child on link 0 USB3 port 0
1427 11:16:13.346058 USB3 port 0
1428 11:16:13.348949 USB3 port 1
1429 11:16:13.349037 USB3 port 2
1430 11:16:13.352844 USB3 port 3
1431 11:16:13.355588 PCI: 00:14.0 child on link 0 USB0 port 0
1432 11:16:13.368781 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 11:16:13.372136 USB0 port 0 child on link 0 USB2 port 0
1434 11:16:13.372224 USB2 port 0
1435 11:16:13.376194 USB2 port 1
1436 11:16:13.376282 USB2 port 2
1437 11:16:13.378679 USB2 port 3
1438 11:16:13.382061 USB2 port 4
1439 11:16:13.382148 USB2 port 5
1440 11:16:13.385530 USB2 port 6
1441 11:16:13.385618 USB2 port 7
1442 11:16:13.388970 USB2 port 8
1443 11:16:13.389056 USB2 port 9
1444 11:16:13.392254 USB3 port 0
1445 11:16:13.392342 USB3 port 1
1446 11:16:13.395278 USB3 port 2
1447 11:16:13.395364 USB3 port 3
1448 11:16:13.398953 PCI: 00:14.2
1449 11:16:13.408488 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 11:16:13.418528 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 11:16:13.421755 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 11:16:13.434939 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 11:16:13.435028 GENERIC: 0.0
1454 11:16:13.438328 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 11:16:13.451295 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 11:16:13.451391 I2C: 00:1a
1457 11:16:13.454619 I2C: 00:31
1458 11:16:13.454705 I2C: 00:32
1459 11:16:13.458759 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 11:16:13.467865 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 11:16:13.470998 I2C: 00:10
1462 11:16:13.471083 PCI: 00:15.2
1463 11:16:13.484091 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 11:16:13.484179 PCI: 00:15.3
1465 11:16:13.493843 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 11:16:13.497609 PCI: 00:16.0
1467 11:16:13.506973 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 11:16:13.507063 PCI: 00:19.0
1469 11:16:13.513861 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 11:16:13.523913 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 11:16:13.524000 I2C: 00:15
1472 11:16:13.530422 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 11:16:13.540246 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 11:16:13.550305 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 11:16:13.559907 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 11:16:13.563504 GENERIC: 0.0
1477 11:16:13.563591 PCI: 01:00.0
1478 11:16:13.573034 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 11:16:13.586591 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 11:16:13.596531 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 11:16:13.596619 PCI: 00:1e.0
1482 11:16:13.609064 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 11:16:13.612463 PCI: 00:1e.2 child on link 0 SPI: 00
1484 11:16:13.622456 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 11:16:13.622543 SPI: 00
1486 11:16:13.628825 PCI: 00:1e.3 child on link 0 SPI: 00
1487 11:16:13.639647 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 11:16:13.639771 SPI: 00
1489 11:16:13.645314 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 11:16:13.652337 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 11:16:13.655542 PNP: 0c09.0
1492 11:16:13.661991 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 11:16:13.668608 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 11:16:13.678471 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 11:16:13.685441 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 11:16:13.691911 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 11:16:13.691996 GENERIC: 0.0
1498 11:16:13.694802 GENERIC: 1.0
1499 11:16:13.694886 PCI: 00:1f.3
1500 11:16:13.704778 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 11:16:13.718057 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 11:16:13.718143 PCI: 00:1f.5
1503 11:16:13.727920 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 11:16:13.734929 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 11:16:13.735029 APIC: 00
1506 11:16:13.735099 APIC: 01
1507 11:16:13.738065 APIC: 03
1508 11:16:13.738165 APIC: 04
1509 11:16:13.741347 APIC: 07
1510 11:16:13.741446 APIC: 06
1511 11:16:13.741543 APIC: 02
1512 11:16:13.744601 APIC: 05
1513 11:16:13.747579 Done allocating resources.
1514 11:16:13.751099 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 11:16:13.757929 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 11:16:13.761699 Configure GPIOs for I2S audio on UP4.
1517 11:16:13.768919 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 11:16:13.771856 Enabling resources...
1519 11:16:13.775132 PCI: 00:00.0 subsystem <- 8086/9a12
1520 11:16:13.778350 PCI: 00:00.0 cmd <- 06
1521 11:16:13.781786 PCI: 00:02.0 subsystem <- 8086/9a40
1522 11:16:13.785321 PCI: 00:02.0 cmd <- 03
1523 11:16:13.788492 PCI: 00:04.0 subsystem <- 8086/9a03
1524 11:16:13.792008 PCI: 00:04.0 cmd <- 02
1525 11:16:13.795117 PCI: 00:05.0 subsystem <- 8086/9a19
1526 11:16:13.795203 PCI: 00:05.0 cmd <- 02
1527 11:16:13.801603 PCI: 00:08.0 subsystem <- 8086/9a11
1528 11:16:13.801689 PCI: 00:08.0 cmd <- 06
1529 11:16:13.804917 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 11:16:13.808449 PCI: 00:0d.0 cmd <- 02
1531 11:16:13.811515 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 11:16:13.814704 PCI: 00:14.0 cmd <- 02
1533 11:16:13.818168 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 11:16:13.821514 PCI: 00:14.2 cmd <- 02
1535 11:16:13.824579 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 11:16:13.828093 PCI: 00:14.3 cmd <- 02
1537 11:16:13.831861 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 11:16:13.834557 PCI: 00:15.0 cmd <- 02
1539 11:16:13.837779 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 11:16:13.841324 PCI: 00:15.1 cmd <- 02
1541 11:16:13.845107 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 11:16:13.847675 PCI: 00:15.2 cmd <- 02
1543 11:16:13.850726 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 11:16:13.850812 PCI: 00:15.3 cmd <- 02
1545 11:16:13.858096 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 11:16:13.858182 PCI: 00:16.0 cmd <- 02
1547 11:16:13.860910 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 11:16:13.864113 PCI: 00:19.1 cmd <- 02
1549 11:16:13.867478 PCI: 00:1d.0 bridge ctrl <- 0013
1550 11:16:13.871259 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 11:16:13.874176 PCI: 00:1d.0 cmd <- 06
1552 11:16:13.877567 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 11:16:13.880477 PCI: 00:1e.0 cmd <- 06
1554 11:16:13.884059 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 11:16:13.887481 PCI: 00:1e.2 cmd <- 06
1556 11:16:13.890509 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 11:16:13.893958 PCI: 00:1e.3 cmd <- 02
1558 11:16:13.897253 PCI: 00:1f.0 subsystem <- 8086/a087
1559 11:16:13.900810 PCI: 00:1f.0 cmd <- 407
1560 11:16:13.903967 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 11:16:13.906930 PCI: 00:1f.3 cmd <- 02
1562 11:16:13.910450 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 11:16:13.910536 PCI: 00:1f.5 cmd <- 406
1564 11:16:13.916123 PCI: 01:00.0 cmd <- 02
1565 11:16:13.920647 done.
1566 11:16:13.923653 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 11:16:13.927128 Initializing devices...
1568 11:16:13.930956 Root Device init
1569 11:16:13.933564 Chrome EC: Set SMI mask to 0x0000000000000000
1570 11:16:13.940127 Chrome EC: clear events_b mask to 0x0000000000000000
1571 11:16:13.946796 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 11:16:13.950030 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 11:16:13.957245 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 11:16:13.963722 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 11:16:13.966834 fw_config match found: DB_USB=USB3_ACTIVE
1576 11:16:13.973726 Configure Right Type-C port orientation for retimer
1577 11:16:13.976535 Root Device init finished in 42 msecs
1578 11:16:13.979948 PCI: 00:00.0 init
1579 11:16:13.983514 CPU TDP = 9 Watts
1580 11:16:13.983599 CPU PL1 = 9 Watts
1581 11:16:13.986609 CPU PL2 = 40 Watts
1582 11:16:13.986695 CPU PL4 = 83 Watts
1583 11:16:13.989805 PCI: 00:00.0 init finished in 8 msecs
1584 11:16:13.993897 PCI: 00:02.0 init
1585 11:16:13.996641 GMA: Found VBT in CBFS
1586 11:16:14.000002 GMA: Found valid VBT in CBFS
1587 11:16:14.003317 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 11:16:14.013183 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 11:16:14.016849 PCI: 00:02.0 init finished in 18 msecs
1590 11:16:14.019894 PCI: 00:05.0 init
1591 11:16:14.023806 PCI: 00:05.0 init finished in 0 msecs
1592 11:16:14.026383 PCI: 00:08.0 init
1593 11:16:14.029705 PCI: 00:08.0 init finished in 0 msecs
1594 11:16:14.033506 PCI: 00:14.0 init
1595 11:16:14.036380 PCI: 00:14.0 init finished in 0 msecs
1596 11:16:14.036466 PCI: 00:14.2 init
1597 11:16:14.039880 PCI: 00:14.2 init finished in 0 msecs
1598 11:16:14.043435 PCI: 00:15.0 init
1599 11:16:14.047146 I2C bus 0 version 0x3230302a
1600 11:16:14.050128 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 11:16:14.053755 PCI: 00:15.0 init finished in 6 msecs
1602 11:16:14.056676 PCI: 00:15.1 init
1603 11:16:14.060426 I2C bus 1 version 0x3230302a
1604 11:16:14.063233 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 11:16:14.066755 PCI: 00:15.1 init finished in 6 msecs
1606 11:16:14.070130 PCI: 00:15.2 init
1607 11:16:14.073193 I2C bus 2 version 0x3230302a
1608 11:16:14.076445 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 11:16:14.079621 PCI: 00:15.2 init finished in 6 msecs
1610 11:16:14.082955 PCI: 00:15.3 init
1611 11:16:14.083041 I2C bus 3 version 0x3230302a
1612 11:16:14.089442 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 11:16:14.093147 PCI: 00:15.3 init finished in 6 msecs
1614 11:16:14.093278 PCI: 00:16.0 init
1615 11:16:14.099606 PCI: 00:16.0 init finished in 0 msecs
1616 11:16:14.099700 PCI: 00:19.1 init
1617 11:16:14.102571 I2C bus 5 version 0x3230302a
1618 11:16:14.106286 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 11:16:14.112385 PCI: 00:19.1 init finished in 6 msecs
1620 11:16:14.112473 PCI: 00:1d.0 init
1621 11:16:14.115650 Initializing PCH PCIe bridge.
1622 11:16:14.119499 PCI: 00:1d.0 init finished in 3 msecs
1623 11:16:14.122836 PCI: 00:1f.0 init
1624 11:16:14.126495 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 11:16:14.132855 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 11:16:14.132944 IOAPIC: ID = 0x02
1627 11:16:14.136992 IOAPIC: Dumping registers
1628 11:16:14.139514 reg 0x0000: 0x02000000
1629 11:16:14.143145 reg 0x0001: 0x00770020
1630 11:16:14.143233 reg 0x0002: 0x00000000
1631 11:16:14.149245 PCI: 00:1f.0 init finished in 21 msecs
1632 11:16:14.149334 PCI: 00:1f.2 init
1633 11:16:14.152701 Disabling ACPI via APMC.
1634 11:16:14.157301 APMC done.
1635 11:16:14.161077 PCI: 00:1f.2 init finished in 6 msecs
1636 11:16:14.172945 PCI: 01:00.0 init
1637 11:16:14.176285 PCI: 01:00.0 init finished in 0 msecs
1638 11:16:14.179356 PNP: 0c09.0 init
1639 11:16:14.182921 Google Chrome EC uptime: 8.431 seconds
1640 11:16:14.188972 Google Chrome AP resets since EC boot: 1
1641 11:16:14.192654 Google Chrome most recent AP reset causes:
1642 11:16:14.195806 0.350: 32775 shutdown: entering G3
1643 11:16:14.202238 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1644 11:16:14.205932 PNP: 0c09.0 init finished in 22 msecs
1645 11:16:14.211684 Devices initialized
1646 11:16:14.214985 Show all devs... After init.
1647 11:16:14.218198 Root Device: enabled 1
1648 11:16:14.218286 DOMAIN: 0000: enabled 1
1649 11:16:14.221415 CPU_CLUSTER: 0: enabled 1
1650 11:16:14.224518 PCI: 00:00.0: enabled 1
1651 11:16:14.228127 PCI: 00:02.0: enabled 1
1652 11:16:14.228228 PCI: 00:04.0: enabled 1
1653 11:16:14.231329 PCI: 00:05.0: enabled 1
1654 11:16:14.234214 PCI: 00:06.0: enabled 0
1655 11:16:14.237748 PCI: 00:07.0: enabled 0
1656 11:16:14.237836 PCI: 00:07.1: enabled 0
1657 11:16:14.240928 PCI: 00:07.2: enabled 0
1658 11:16:14.244401 PCI: 00:07.3: enabled 0
1659 11:16:14.247548 PCI: 00:08.0: enabled 1
1660 11:16:14.247636 PCI: 00:09.0: enabled 0
1661 11:16:14.251273 PCI: 00:0a.0: enabled 0
1662 11:16:14.254116 PCI: 00:0d.0: enabled 1
1663 11:16:14.257623 PCI: 00:0d.1: enabled 0
1664 11:16:14.257710 PCI: 00:0d.2: enabled 0
1665 11:16:14.261002 PCI: 00:0d.3: enabled 0
1666 11:16:14.264062 PCI: 00:0e.0: enabled 0
1667 11:16:14.267587 PCI: 00:10.2: enabled 1
1668 11:16:14.267675 PCI: 00:10.6: enabled 0
1669 11:16:14.270770 PCI: 00:10.7: enabled 0
1670 11:16:14.274124 PCI: 00:12.0: enabled 0
1671 11:16:14.277666 PCI: 00:12.6: enabled 0
1672 11:16:14.277803 PCI: 00:13.0: enabled 0
1673 11:16:14.280742 PCI: 00:14.0: enabled 1
1674 11:16:14.283638 PCI: 00:14.1: enabled 0
1675 11:16:14.287190 PCI: 00:14.2: enabled 1
1676 11:16:14.287278 PCI: 00:14.3: enabled 1
1677 11:16:14.290748 PCI: 00:15.0: enabled 1
1678 11:16:14.294221 PCI: 00:15.1: enabled 1
1679 11:16:14.294309 PCI: 00:15.2: enabled 1
1680 11:16:14.296991 PCI: 00:15.3: enabled 1
1681 11:16:14.300475 PCI: 00:16.0: enabled 1
1682 11:16:14.303961 PCI: 00:16.1: enabled 0
1683 11:16:14.304049 PCI: 00:16.2: enabled 0
1684 11:16:14.306848 PCI: 00:16.3: enabled 0
1685 11:16:14.310041 PCI: 00:16.4: enabled 0
1686 11:16:14.313555 PCI: 00:16.5: enabled 0
1687 11:16:14.313643 PCI: 00:17.0: enabled 0
1688 11:16:14.316859 PCI: 00:19.0: enabled 0
1689 11:16:14.320099 PCI: 00:19.1: enabled 1
1690 11:16:14.323524 PCI: 00:19.2: enabled 0
1691 11:16:14.323612 PCI: 00:1c.0: enabled 1
1692 11:16:14.326952 PCI: 00:1c.1: enabled 0
1693 11:16:14.330401 PCI: 00:1c.2: enabled 0
1694 11:16:14.333754 PCI: 00:1c.3: enabled 0
1695 11:16:14.333842 PCI: 00:1c.4: enabled 0
1696 11:16:14.336775 PCI: 00:1c.5: enabled 0
1697 11:16:14.340073 PCI: 00:1c.6: enabled 1
1698 11:16:14.343348 PCI: 00:1c.7: enabled 0
1699 11:16:14.343435 PCI: 00:1d.0: enabled 1
1700 11:16:14.346684 PCI: 00:1d.1: enabled 0
1701 11:16:14.349738 PCI: 00:1d.2: enabled 1
1702 11:16:14.349825 PCI: 00:1d.3: enabled 0
1703 11:16:14.353293 PCI: 00:1e.0: enabled 1
1704 11:16:14.356437 PCI: 00:1e.1: enabled 0
1705 11:16:14.360028 PCI: 00:1e.2: enabled 1
1706 11:16:14.360116 PCI: 00:1e.3: enabled 1
1707 11:16:14.363088 PCI: 00:1f.0: enabled 1
1708 11:16:14.366810 PCI: 00:1f.1: enabled 0
1709 11:16:14.370385 PCI: 00:1f.2: enabled 1
1710 11:16:14.370473 PCI: 00:1f.3: enabled 1
1711 11:16:14.372975 PCI: 00:1f.4: enabled 0
1712 11:16:14.376489 PCI: 00:1f.5: enabled 1
1713 11:16:14.380175 PCI: 00:1f.6: enabled 0
1714 11:16:14.380263 PCI: 00:1f.7: enabled 0
1715 11:16:14.383157 APIC: 00: enabled 1
1716 11:16:14.386659 GENERIC: 0.0: enabled 1
1717 11:16:14.386747 GENERIC: 0.0: enabled 1
1718 11:16:14.389433 GENERIC: 1.0: enabled 1
1719 11:16:14.393227 GENERIC: 0.0: enabled 1
1720 11:16:14.395861 GENERIC: 1.0: enabled 1
1721 11:16:14.395947 USB0 port 0: enabled 1
1722 11:16:14.400124 GENERIC: 0.0: enabled 1
1723 11:16:14.403107 USB0 port 0: enabled 1
1724 11:16:14.406173 GENERIC: 0.0: enabled 1
1725 11:16:14.406258 I2C: 00:1a: enabled 1
1726 11:16:14.409411 I2C: 00:31: enabled 1
1727 11:16:14.412318 I2C: 00:32: enabled 1
1728 11:16:14.412403 I2C: 00:10: enabled 1
1729 11:16:14.415665 I2C: 00:15: enabled 1
1730 11:16:14.419634 GENERIC: 0.0: enabled 0
1731 11:16:14.419756 GENERIC: 1.0: enabled 0
1732 11:16:14.422701 GENERIC: 0.0: enabled 1
1733 11:16:14.425723 SPI: 00: enabled 1
1734 11:16:14.425809 SPI: 00: enabled 1
1735 11:16:14.429272 PNP: 0c09.0: enabled 1
1736 11:16:14.432193 GENERIC: 0.0: enabled 1
1737 11:16:14.436042 USB3 port 0: enabled 1
1738 11:16:14.436129 USB3 port 1: enabled 1
1739 11:16:14.439148 USB3 port 2: enabled 0
1740 11:16:14.442611 USB3 port 3: enabled 0
1741 11:16:14.442697 USB2 port 0: enabled 0
1742 11:16:14.446142 USB2 port 1: enabled 1
1743 11:16:14.448974 USB2 port 2: enabled 1
1744 11:16:14.453054 USB2 port 3: enabled 0
1745 11:16:14.453141 USB2 port 4: enabled 1
1746 11:16:14.455482 USB2 port 5: enabled 0
1747 11:16:14.459038 USB2 port 6: enabled 0
1748 11:16:14.459124 USB2 port 7: enabled 0
1749 11:16:14.462071 USB2 port 8: enabled 0
1750 11:16:14.465768 USB2 port 9: enabled 0
1751 11:16:14.465854 USB3 port 0: enabled 0
1752 11:16:14.468926 USB3 port 1: enabled 1
1753 11:16:14.472481 USB3 port 2: enabled 0
1754 11:16:14.475412 USB3 port 3: enabled 0
1755 11:16:14.475497 GENERIC: 0.0: enabled 1
1756 11:16:14.478828 GENERIC: 1.0: enabled 1
1757 11:16:14.482098 APIC: 01: enabled 1
1758 11:16:14.482185 APIC: 03: enabled 1
1759 11:16:14.485372 APIC: 04: enabled 1
1760 11:16:14.489062 APIC: 07: enabled 1
1761 11:16:14.489148 APIC: 06: enabled 1
1762 11:16:14.491996 APIC: 02: enabled 1
1763 11:16:14.492081 APIC: 05: enabled 1
1764 11:16:14.495136 PCI: 01:00.0: enabled 1
1765 11:16:14.501796 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1766 11:16:14.505299 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 11:16:14.508236 ELOG: NV offset 0xf30000 size 0x1000
1768 11:16:14.516720 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 11:16:14.523251 ELOG: Event(17) added with size 13 at 2023-02-06 11:16:13 UTC
1770 11:16:14.529779 ELOG: Event(92) added with size 9 at 2023-02-06 11:16:13 UTC
1771 11:16:14.536747 ELOG: Event(93) added with size 9 at 2023-02-06 11:16:13 UTC
1772 11:16:14.542899 ELOG: Event(9E) added with size 10 at 2023-02-06 11:16:13 UTC
1773 11:16:14.549398 ELOG: Event(9F) added with size 14 at 2023-02-06 11:16:13 UTC
1774 11:16:14.555969 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1775 11:16:14.563197 ELOG: Event(A1) added with size 10 at 2023-02-06 11:16:13 UTC
1776 11:16:14.566082 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1777 11:16:14.572455 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1778 11:16:14.575715 Finalize devices...
1779 11:16:14.575802 Devices finalized
1780 11:16:14.583104 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1781 11:16:14.588923 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1782 11:16:14.592420 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1783 11:16:14.599241 ME: HFSTS1 : 0x80030055
1784 11:16:14.602770 ME: HFSTS2 : 0x30280116
1785 11:16:14.605466 ME: HFSTS3 : 0x00000050
1786 11:16:14.612082 ME: HFSTS4 : 0x00004000
1787 11:16:14.615376 ME: HFSTS5 : 0x00000000
1788 11:16:14.622451 ME: HFSTS6 : 0x00400006
1789 11:16:14.625912 ME: Manufacturing Mode : YES
1790 11:16:14.629402 ME: SPI Protection Mode Enabled : NO
1791 11:16:14.632479 ME: FW Partition Table : OK
1792 11:16:14.635414 ME: Bringup Loader Failure : NO
1793 11:16:14.638583 ME: Firmware Init Complete : NO
1794 11:16:14.642100 ME: Boot Options Present : NO
1795 11:16:14.645699 ME: Update In Progress : NO
1796 11:16:14.652059 ME: D0i3 Support : YES
1797 11:16:14.655148 ME: Low Power State Enabled : NO
1798 11:16:14.658847 ME: CPU Replaced : YES
1799 11:16:14.662137 ME: CPU Replacement Valid : YES
1800 11:16:14.665845 ME: Current Working State : 5
1801 11:16:14.668217 ME: Current Operation State : 1
1802 11:16:14.672048 ME: Current Operation Mode : 3
1803 11:16:14.675078 ME: Error Code : 0
1804 11:16:14.678456 ME: Enhanced Debug Mode : NO
1805 11:16:14.685152 ME: CPU Debug Disabled : YES
1806 11:16:14.688238 ME: TXT Support : NO
1807 11:16:14.694772 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1808 11:16:14.701750 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1809 11:16:14.705482 CBFS: 'fallback/slic' not found.
1810 11:16:14.708619 ACPI: Writing ACPI tables at 76b01000.
1811 11:16:14.711808 ACPI: * FACS
1812 11:16:14.711895 ACPI: * DSDT
1813 11:16:14.715231 Ramoops buffer: 0x100000@0x76a00000.
1814 11:16:14.721432 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1815 11:16:14.725007 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1816 11:16:14.727795 Google Chrome EC: version:
1817 11:16:14.731493 ro: voema_v2.0.7540-147f8d37d1
1818 11:16:14.734594 rw: voema_v2.0.7540-147f8d37d1
1819 11:16:14.737819 running image: 2
1820 11:16:14.744840 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1821 11:16:14.747987 ACPI: * FADT
1822 11:16:14.748074 SCI is IRQ9
1823 11:16:14.750706 ACPI: added table 1/32, length now 40
1824 11:16:14.754191 ACPI: * SSDT
1825 11:16:14.757622 Found 1 CPU(s) with 8 core(s) each.
1826 11:16:14.761174 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1827 11:16:14.767237 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1828 11:16:14.771121 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1829 11:16:14.774140 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1830 11:16:14.780876 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1831 11:16:14.787494 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1832 11:16:14.790917 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1833 11:16:14.797203 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1834 11:16:14.803966 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1835 11:16:14.807271 \_SB.PCI0.RP09: Added StorageD3Enable property
1836 11:16:14.810825 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1837 11:16:14.817284 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1838 11:16:14.823558 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1839 11:16:14.827035 PS2K: Passing 80 keymaps to kernel
1840 11:16:14.833503 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1841 11:16:14.840300 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1842 11:16:14.847303 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1843 11:16:14.853624 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1844 11:16:14.860514 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1845 11:16:14.867108 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1846 11:16:14.870363 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1847 11:16:14.876782 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1848 11:16:14.883248 ACPI: added table 2/32, length now 44
1849 11:16:14.883336 ACPI: * MCFG
1850 11:16:14.886783 ACPI: added table 3/32, length now 48
1851 11:16:14.890060 ACPI: * TPM2
1852 11:16:14.892979 TPM2 log created at 0x769f0000
1853 11:16:14.896551 ACPI: added table 4/32, length now 52
1854 11:16:14.896639 ACPI: * MADT
1855 11:16:14.899652 SCI is IRQ9
1856 11:16:14.902731 ACPI: added table 5/32, length now 56
1857 11:16:14.906198 current = 76b09850
1858 11:16:14.906286 ACPI: * DMAR
1859 11:16:14.909971 ACPI: added table 6/32, length now 60
1860 11:16:14.912874 ACPI: added table 7/32, length now 64
1861 11:16:14.916218 ACPI: * HPET
1862 11:16:14.919602 ACPI: added table 8/32, length now 68
1863 11:16:14.919696 ACPI: done.
1864 11:16:14.923003 ACPI tables: 35216 bytes.
1865 11:16:14.926047 smbios_write_tables: 769ef000
1866 11:16:14.929215 EC returned error result code 3
1867 11:16:14.935871 Couldn't obtain OEM name from CBI
1868 11:16:14.935960 Create SMBIOS type 16
1869 11:16:14.939666 Create SMBIOS type 17
1870 11:16:14.942732 GENERIC: 0.0 (WIFI Device)
1871 11:16:14.946010 SMBIOS tables: 1750 bytes.
1872 11:16:14.949445 Writing table forward entry at 0x00000500
1873 11:16:14.955465 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1874 11:16:14.959400 Writing coreboot table at 0x76b25000
1875 11:16:14.965299 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1876 11:16:14.968527 1. 0000000000001000-000000000009ffff: RAM
1877 11:16:14.975563 2. 00000000000a0000-00000000000fffff: RESERVED
1878 11:16:14.978675 3. 0000000000100000-00000000769eefff: RAM
1879 11:16:14.985402 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1880 11:16:14.988440 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1881 11:16:14.995074 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1882 11:16:14.999152 7. 0000000077000000-000000007fbfffff: RESERVED
1883 11:16:15.005527 8. 00000000c0000000-00000000cfffffff: RESERVED
1884 11:16:15.008805 9. 00000000f8000000-00000000f9ffffff: RESERVED
1885 11:16:15.015230 10. 00000000fb000000-00000000fb000fff: RESERVED
1886 11:16:15.018279 11. 00000000fe000000-00000000fe00ffff: RESERVED
1887 11:16:15.025854 12. 00000000fed80000-00000000fed87fff: RESERVED
1888 11:16:15.028009 13. 00000000fed90000-00000000fed92fff: RESERVED
1889 11:16:15.031832 14. 00000000feda0000-00000000feda1fff: RESERVED
1890 11:16:15.038077 15. 00000000fedc0000-00000000feddffff: RESERVED
1891 11:16:15.041686 16. 0000000100000000-00000002803fffff: RAM
1892 11:16:15.045151 Passing 4 GPIOs to payload:
1893 11:16:15.051474 NAME | PORT | POLARITY | VALUE
1894 11:16:15.055314 lid | undefined | high | high
1895 11:16:15.061350 power | undefined | high | low
1896 11:16:15.065021 oprom | undefined | high | low
1897 11:16:15.071040 EC in RW | 0x000000e5 | high | high
1898 11:16:15.078140 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 578a
1899 11:16:15.081118 coreboot table: 1576 bytes.
1900 11:16:15.084832 IMD ROOT 0. 0x76fff000 0x00001000
1901 11:16:15.087892 IMD SMALL 1. 0x76ffe000 0x00001000
1902 11:16:15.091401 FSP MEMORY 2. 0x76c4e000 0x003b0000
1903 11:16:15.094250 VPD 3. 0x76c4d000 0x00000367
1904 11:16:15.101176 RO MCACHE 4. 0x76c4c000 0x00000fdc
1905 11:16:15.104211 CONSOLE 5. 0x76c2c000 0x00020000
1906 11:16:15.107660 FMAP 6. 0x76c2b000 0x00000578
1907 11:16:15.111571 TIME STAMP 7. 0x76c2a000 0x00000910
1908 11:16:15.114403 VBOOT WORK 8. 0x76c16000 0x00014000
1909 11:16:15.117450 ROMSTG STCK 9. 0x76c15000 0x00001000
1910 11:16:15.120648 AFTER CAR 10. 0x76c0a000 0x0000b000
1911 11:16:15.124121 RAMSTAGE 11. 0x76b97000 0x00073000
1912 11:16:15.130328 REFCODE 12. 0x76b42000 0x00055000
1913 11:16:15.134099 SMM BACKUP 13. 0x76b32000 0x00010000
1914 11:16:15.137000 4f444749 14. 0x76b30000 0x00002000
1915 11:16:15.140394 EXT VBT15. 0x76b2d000 0x0000219f
1916 11:16:15.143834 COREBOOT 16. 0x76b25000 0x00008000
1917 11:16:15.146809 ACPI 17. 0x76b01000 0x00024000
1918 11:16:15.150239 ACPI GNVS 18. 0x76b00000 0x00001000
1919 11:16:15.153548 RAMOOPS 19. 0x76a00000 0x00100000
1920 11:16:15.157158 TPM2 TCGLOG20. 0x769f0000 0x00010000
1921 11:16:15.163490 SMBIOS 21. 0x769ef000 0x00000800
1922 11:16:15.163578 IMD small region:
1923 11:16:15.166731 IMD ROOT 0. 0x76ffec00 0x00000400
1924 11:16:15.173372 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1925 11:16:15.176833 POWER STATE 2. 0x76ffeb80 0x00000044
1926 11:16:15.179966 ROMSTAGE 3. 0x76ffeb60 0x00000004
1927 11:16:15.183855 MEM INFO 4. 0x76ffe980 0x000001e0
1928 11:16:15.189861 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1929 11:16:15.193428 MTRR: Physical address space:
1930 11:16:15.199835 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1931 11:16:15.206605 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1932 11:16:15.209600 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1933 11:16:15.216558 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1934 11:16:15.222882 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1935 11:16:15.229339 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1936 11:16:15.236308 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1937 11:16:15.239796 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 11:16:15.246193 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 11:16:15.249424 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 11:16:15.252799 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 11:16:15.255886 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 11:16:15.262345 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 11:16:15.266191 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 11:16:15.269459 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 11:16:15.272490 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 11:16:15.275972 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 11:16:15.282641 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 11:16:15.285804 call enable_fixed_mtrr()
1949 11:16:15.288774 CPU physical address size: 39 bits
1950 11:16:15.292198 MTRR: default type WB/UC MTRR counts: 6/6.
1951 11:16:15.296094 MTRR: UC selected as default type.
1952 11:16:15.302146 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1953 11:16:15.309010 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1954 11:16:15.315567 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1955 11:16:15.322527 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1956 11:16:15.328580 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1957 11:16:15.335119 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1958 11:16:15.338539 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 11:16:15.345480 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 11:16:15.348730 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 11:16:15.352189 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 11:16:15.355232 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 11:16:15.361545 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 11:16:15.365027 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 11:16:15.368056 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 11:16:15.371505 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 11:16:15.374744 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 11:16:15.381501 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 11:16:15.381590
1970 11:16:15.381660 MTRR check
1971 11:16:15.384567 call enable_fixed_mtrr()
1972 11:16:15.387885 Fixed MTRRs : Enabled
1973 11:16:15.391347 Variable MTRRs: Enabled
1974 11:16:15.391435
1975 11:16:15.394934 CPU physical address size: 39 bits
1976 11:16:15.401627 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1977 11:16:15.404358 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 11:16:15.408076 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 11:16:15.414510 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 11:16:15.417902 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 11:16:15.421344 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 11:16:15.424546 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 11:16:15.430880 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 11:16:15.434528 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 11:16:15.437477 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 11:16:15.440842 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 11:16:15.447548 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 11:16:15.450901 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 11:16:15.454675 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 11:16:15.457734 call enable_fixed_mtrr()
1991 11:16:15.461021 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 11:16:15.467039 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 11:16:15.470888 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 11:16:15.474262 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 11:16:15.477231 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 11:16:15.483613 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 11:16:15.487042 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 11:16:15.490803 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 11:16:15.493654 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 11:16:15.498144 CPU physical address size: 39 bits
2001 11:16:15.504565 call enable_fixed_mtrr()
2002 11:16:15.507895 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 11:16:15.510904 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 11:16:15.514350 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 11:16:15.520850 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 11:16:15.524583 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 11:16:15.527578 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 11:16:15.531336 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 11:16:15.534541 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 11:16:15.541209 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 11:16:15.544549 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 11:16:15.548197 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 11:16:15.550990 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 11:16:15.558349 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 11:16:15.558438 call enable_fixed_mtrr()
2016 11:16:15.565357 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 11:16:15.568261 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 11:16:15.571895 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 11:16:15.575075 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 11:16:15.581565 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 11:16:15.585238 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 11:16:15.588962 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 11:16:15.591696 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 11:16:15.598106 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 11:16:15.601781 CPU physical address size: 39 bits
2026 11:16:15.604806 call enable_fixed_mtrr()
2027 11:16:15.608445 Checking cr50 for pending updates
2028 11:16:15.612137 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 11:16:15.615392 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 11:16:15.622333 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 11:16:15.625571 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 11:16:15.628522 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 11:16:15.631984 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 11:16:15.638583 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 11:16:15.641814 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 11:16:15.645610 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 11:16:15.648975 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 11:16:15.651593 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 11:16:15.658613 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 11:16:15.661802 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 11:16:15.665148 call enable_fixed_mtrr()
2042 11:16:15.668514 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 11:16:15.674910 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 11:16:15.678111 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 11:16:15.681490 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 11:16:15.684797 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 11:16:15.691396 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 11:16:15.695020 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 11:16:15.697905 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 11:16:15.701133 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 11:16:15.705031 CPU physical address size: 39 bits
2052 11:16:15.712259 call enable_fixed_mtrr()
2053 11:16:15.712344 Reading cr50 TPM mode
2054 11:16:15.715926 CPU physical address size: 39 bits
2055 11:16:15.719271 CPU physical address size: 39 bits
2056 11:16:15.725927 BS: BS_PAYLOAD_LOAD entry times (exec / console): 310 / 6 ms
2057 11:16:15.728854 CPU physical address size: 39 bits
2058 11:16:15.735774 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2059 11:16:15.742747 Checking segment from ROM address 0xffc02b38
2060 11:16:15.745523 Checking segment from ROM address 0xffc02b54
2061 11:16:15.748825 Loading segment from ROM address 0xffc02b38
2062 11:16:15.752449 code (compression=0)
2063 11:16:15.762697 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2064 11:16:15.768734 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2065 11:16:15.772022 it's not compressed!
2066 11:16:15.910353 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2067 11:16:15.917410 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2068 11:16:15.924054 Loading segment from ROM address 0xffc02b54
2069 11:16:15.927026 Entry Point 0x30000000
2070 11:16:15.927112 Loaded segments
2071 11:16:15.933748 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2072 11:16:15.976343 Finalizing chipset.
2073 11:16:15.979908 Finalizing SMM.
2074 11:16:15.980008 APMC done.
2075 11:16:15.986467 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2076 11:16:15.990068 mp_park_aps done after 0 msecs.
2077 11:16:15.993626 Jumping to boot code at 0x30000000(0x76b25000)
2078 11:16:16.003424 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2079 11:16:16.003512
2080 11:16:16.003588
2081 11:16:16.006129
2082 11:16:16.006217 Starting depthcharge on Voema...
2083 11:16:16.006574 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2084 11:16:16.006682 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2085 11:16:16.006764 Setting prompt string to ['volteer:']
2086 11:16:16.006842 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2087 11:16:16.009634
2088 11:16:16.016122 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2089 11:16:16.016207
2090 11:16:16.022926 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2091 11:16:16.023010
2092 11:16:16.029786 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2093 11:16:16.029871
2094 11:16:16.032769 Failed to find eMMC card reader
2095 11:16:16.032855
2096 11:16:16.032921 Wipe memory regions:
2097 11:16:16.036035
2098 11:16:16.039196 [0x00000000001000, 0x000000000a0000)
2099 11:16:16.039280
2100 11:16:16.042630 [0x00000000100000, 0x00000030000000)
2101 11:16:16.068073
2102 11:16:16.071322 [0x00000032662db0, 0x000000769ef000)
2103 11:16:16.106104
2104 11:16:16.109576 [0x00000100000000, 0x00000280400000)
2105 11:16:16.310327
2106 11:16:16.313282 ec_init: CrosEC protocol v3 supported (256, 256)
2107 11:16:16.313371
2108 11:16:16.319899 update_port_state: port C0 state: usb enable 1 mux conn 0
2109 11:16:16.319985
2110 11:16:16.330142 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2111 11:16:16.333343
2112 11:16:16.337040 pmc_check_ipc_sts: STS_BUSY done after 1515 us
2113 11:16:16.337125
2114 11:16:16.340265 send_conn_disc_msg: pmc_send_cmd succeeded
2115 11:16:16.771284
2116 11:16:16.771432 R8152: Initializing
2117 11:16:16.771502
2118 11:16:16.774363 Version 6 (ocp_data = 5c30)
2119 11:16:16.774448
2120 11:16:16.777817 R8152: Done initializing
2121 11:16:16.777902
2122 11:16:16.781611 Adding net device
2123 11:16:17.082255
2124 11:16:17.085677 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2125 11:16:17.085820
2126 11:16:17.085901
2127 11:16:17.085963
2128 11:16:17.088976 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2130 11:16:17.189757 volteer: tftpboot 192.168.201.1 9033973/tftp-deploy-58zo98uk/kernel/bzImage 9033973/tftp-deploy-58zo98uk/kernel/cmdline 9033973/tftp-deploy-58zo98uk/ramdisk/ramdisk.cpio.gz
2131 11:16:17.189941 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 11:16:17.190057 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2133 11:16:17.194691 tftpboot 192.168.201.1 9033973/tftp-deploy-58zo98uk/kernel/bzImoy-58zo98uk/kernel/cmdline 9033973/tftp-deploy-58zo98uk/ramdisk/ramdisk.cpio.gz
2134 11:16:17.194780
2135 11:16:17.194847 Waiting for link
2136 11:16:17.397797
2137 11:16:17.397934 done.
2138 11:16:17.398002
2139 11:16:17.398066 MAC: 00:24:32:30:79:42
2140 11:16:17.398128
2141 11:16:17.400387 Sending DHCP discover... done.
2142 11:16:17.400473
2143 11:16:17.404354 Waiting for reply... done.
2144 11:16:17.404439
2145 11:16:17.407226 Sending DHCP request... done.
2146 11:16:17.407326
2147 11:16:17.410782 Waiting for reply... done.
2148 11:16:17.410866
2149 11:16:17.413728 My ip is 192.168.201.13
2150 11:16:17.413812
2151 11:16:17.417329 The DHCP server ip is 192.168.201.1
2152 11:16:17.417414
2153 11:16:17.424031 TFTP server IP predefined by user: 192.168.201.1
2154 11:16:17.424116
2155 11:16:17.430330 Bootfile predefined by user: 9033973/tftp-deploy-58zo98uk/kernel/bzImage
2156 11:16:17.430415
2157 11:16:17.433361 Sending tftp read request... done.
2158 11:16:17.433446
2159 11:16:17.436663 Waiting for the transfer...
2160 11:16:17.436747
2161 11:16:18.008524 00000000 ################################################################
2162 11:16:18.008672
2163 11:16:18.577714 00080000 ################################################################
2164 11:16:18.577864
2165 11:16:19.149145 00100000 ################################################################
2166 11:16:19.149300
2167 11:16:19.709765 00180000 ################################################################
2168 11:16:19.709916
2169 11:16:20.269368 00200000 ################################################################
2170 11:16:20.269521
2171 11:16:20.846231 00280000 ################################################################
2172 11:16:20.846421
2173 11:16:21.473059 00300000 ################################################################
2174 11:16:21.473567
2175 11:16:22.189003 00380000 ################################################################
2176 11:16:22.189582
2177 11:16:22.903233 00400000 ################################################################
2178 11:16:22.903811
2179 11:16:23.617016 00480000 ################################################################
2180 11:16:23.617626
2181 11:16:24.314041 00500000 ################################################################
2182 11:16:24.314586
2183 11:16:25.027927 00580000 ################################################################
2184 11:16:25.028502
2185 11:16:25.748508 00600000 ################################################################
2186 11:16:25.749075
2187 11:16:26.463592 00680000 ################################################################
2188 11:16:26.464233
2189 11:16:27.180799 00700000 ################################################################
2190 11:16:27.181355
2191 11:16:27.901680 00780000 ################################################################
2192 11:16:27.902271
2193 11:16:28.585513 00800000 ################################################################
2194 11:16:28.586176
2195 11:16:29.288544 00880000 ################################################################
2196 11:16:29.289108
2197 11:16:29.654461 00900000 ################################## done.
2198 11:16:29.655061
2199 11:16:29.657633 The bootfile was 9707520 bytes long.
2200 11:16:29.658185
2201 11:16:29.660663 Sending tftp read request... done.
2202 11:16:29.661164
2203 11:16:29.664175 Waiting for the transfer...
2204 11:16:29.664673
2205 11:16:30.381487 00000000 ################################################################
2206 11:16:30.382038
2207 11:16:31.105407 00080000 ################################################################
2208 11:16:31.105998
2209 11:16:31.831794 00100000 ################################################################
2210 11:16:31.832366
2211 11:16:32.552883 00180000 ################################################################
2212 11:16:32.553526
2213 11:16:33.264421 00200000 ################################################################
2214 11:16:33.265109
2215 11:16:33.966687 00280000 ################################################################
2216 11:16:33.967307
2217 11:16:34.622383 00300000 ################################################################
2218 11:16:34.622916
2219 11:16:35.303905 00380000 ################################################################
2220 11:16:35.304556
2221 11:16:35.973635 00400000 ################################################################
2222 11:16:35.974193
2223 11:16:36.635753 00480000 ################################################################
2224 11:16:36.635893
2225 11:16:37.277963 00500000 ################################################################
2226 11:16:37.278511
2227 11:16:37.950362 00580000 ################################################################
2228 11:16:37.950956
2229 11:16:38.627889 00600000 ################################################################
2230 11:16:38.628414
2231 11:16:39.309323 00680000 ################################################################
2232 11:16:39.309847
2233 11:16:39.979523 00700000 ################################################################
2234 11:16:39.980122
2235 11:16:40.678241 00780000 ################################################################
2236 11:16:40.678851
2237 11:16:40.943643 00800000 ######################## done.
2238 11:16:40.944263
2239 11:16:40.946791 Sending tftp read request... done.
2240 11:16:40.947298
2241 11:16:40.950469 Waiting for the transfer...
2242 11:16:40.950965
2243 11:16:40.951357 00000000 # done.
2244 11:16:40.951777
2245 11:16:40.960188 Command line loaded dynamically from TFTP file: 9033973/tftp-deploy-58zo98uk/kernel/cmdline
2246 11:16:40.960795
2247 11:16:40.973662 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2248 11:16:40.977504
2249 11:16:40.980822 Shutting down all USB controllers.
2250 11:16:40.981287
2251 11:16:40.981654 Removing current net device
2252 11:16:40.982006
2253 11:16:40.984214 Finalizing coreboot
2254 11:16:40.984682
2255 11:16:40.990495 Exiting depthcharge with code 4 at timestamp: 33625567
2256 11:16:40.991016
2257 11:16:40.991396
2258 11:16:40.991780 Starting kernel ...
2259 11:16:40.992132
2260 11:16:40.992467
2261 11:16:40.993740 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2262 11:16:40.994280 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2263 11:16:40.994681 Setting prompt string to ['Linux version [0-9]']
2264 11:16:40.995066 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2265 11:16:40.995447 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2267 11:20:57.995394 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2269 11:20:57.996609 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2271 11:20:57.997486 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2274 11:20:57.999007 end: 2 depthcharge-action (duration 00:05:00) [common]
2276 11:20:58.000118 Cleaning after the job
2277 11:20:58.000207 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9033973/tftp-deploy-58zo98uk/ramdisk
2278 11:20:58.000880 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9033973/tftp-deploy-58zo98uk/kernel
2279 11:20:58.001548 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9033973/tftp-deploy-58zo98uk/modules
2280 11:20:58.001740 start: 5.1 power-off (timeout 00:00:30) [common]
2281 11:20:58.001887 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2282 11:21:00.183147 >> Command sent successfully.
2283 11:21:00.192967 Returned 0 in 2 seconds
2284 11:21:00.294811 end: 5.1 power-off (duration 00:00:02) [common]
2286 11:21:00.296479 start: 5.2 read-feedback (timeout 00:09:58) [common]
2287 11:21:00.297752 Listened to connection for namespace 'common' for up to 1s
2288 11:21:01.300153 Finalising connection for namespace 'common'
2289 11:21:01.300909 Disconnecting from shell: Finalise
2290 11:21:01.301378
2291 11:21:01.402937 end: 5.2 read-feedback (duration 00:00:01) [common]
2292 11:21:01.403590 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9033973
2293 11:21:01.412081 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9033973
2294 11:21:01.412211 JobError: Your job cannot terminate cleanly.