Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 11:15:33.986238 lava-dispatcher, installed at version: 2022.11
2 11:15:33.986410 start: 0 validate
3 11:15:33.986534 Start time: 2023-02-06 11:15:33.986526+00:00 (UTC)
4 11:15:33.986658 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:15:33.986787 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230127.0%2Famd64%2Finitrd.cpio.gz exists
6 11:15:33.990168 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:15:33.990290 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.271-cip90-81-g5d0e00d43751%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:15:36.997192 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:15:36.997396 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230127.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:15:37.000270 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:15:37.000449 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.271-cip90-81-g5d0e00d43751%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:15:37.003886 validate duration: 3.02
14 11:15:37.004188 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:15:37.004326 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:15:37.004434 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:15:37.004559 Not decompressing ramdisk as can be used compressed.
18 11:15:37.004771 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230127.0/amd64/initrd.cpio.gz
19 11:15:37.004855 saving as /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/ramdisk/initrd.cpio.gz
20 11:15:37.004932 total size: 5432117 (5MB)
21 11:15:37.007508 progress 0% (0MB)
22 11:15:37.010568 progress 5% (0MB)
23 11:15:37.012462 progress 10% (0MB)
24 11:15:37.014557 progress 15% (0MB)
25 11:15:37.017305 progress 20% (1MB)
26 11:15:37.019260 progress 25% (1MB)
27 11:15:37.021422 progress 30% (1MB)
28 11:15:37.024119 progress 35% (1MB)
29 11:15:37.026504 progress 40% (2MB)
30 11:15:37.028946 progress 45% (2MB)
31 11:15:37.030836 progress 50% (2MB)
32 11:15:37.033445 progress 55% (2MB)
33 11:15:37.035948 progress 60% (3MB)
34 11:15:37.037852 progress 65% (3MB)
35 11:15:37.040476 progress 70% (3MB)
36 11:15:37.042417 progress 75% (3MB)
37 11:15:37.044689 progress 80% (4MB)
38 11:15:37.046815 progress 85% (4MB)
39 11:15:37.049542 progress 90% (4MB)
40 11:15:37.051791 progress 95% (4MB)
41 11:15:37.053875 progress 100% (5MB)
42 11:15:37.054154 5MB downloaded in 0.05s (105.26MB/s)
43 11:15:37.054320 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:15:37.054589 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:15:37.054685 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:15:37.054781 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:15:37.054887 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.271-cip90-81-g5d0e00d43751/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:15:37.054963 saving as /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/kernel/bzImage
50 11:15:37.055032 total size: 9707520 (9MB)
51 11:15:37.055097 No compression specified
52 11:15:37.058145 progress 0% (0MB)
53 11:15:37.065819 progress 5% (0MB)
54 11:15:37.073846 progress 10% (0MB)
55 11:15:37.083095 progress 15% (1MB)
56 11:15:37.090883 progress 20% (1MB)
57 11:15:37.099361 progress 25% (2MB)
58 11:15:37.107248 progress 30% (2MB)
59 11:15:37.116302 progress 35% (3MB)
60 11:15:37.124744 progress 40% (3MB)
61 11:15:37.132007 progress 45% (4MB)
62 11:15:37.141443 progress 50% (4MB)
63 11:15:37.148697 progress 55% (5MB)
64 11:15:37.157332 progress 60% (5MB)
65 11:15:37.165194 progress 65% (6MB)
66 11:15:37.173582 progress 70% (6MB)
67 11:15:37.181711 progress 75% (6MB)
68 11:15:37.189804 progress 80% (7MB)
69 11:15:37.198186 progress 85% (7MB)
70 11:15:37.206293 progress 90% (8MB)
71 11:15:37.215297 progress 95% (8MB)
72 11:15:37.222826 progress 100% (9MB)
73 11:15:37.223030 9MB downloaded in 0.17s (55.11MB/s)
74 11:15:37.223185 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:15:37.223431 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:15:37.223521 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:15:37.223609 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:15:37.223716 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230127.0/amd64/full.rootfs.tar.xz
80 11:15:37.223785 saving as /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/nfsrootfs/full.rootfs.tar
81 11:15:37.223849 total size: 133355208 (127MB)
82 11:15:37.223912 Using unxz to decompress xz
83 11:15:37.235684 progress 0% (0MB)
84 11:15:37.588090 progress 5% (6MB)
85 11:15:37.972854 progress 10% (12MB)
86 11:15:38.283480 progress 15% (19MB)
87 11:15:38.498397 progress 20% (25MB)
88 11:15:38.763832 progress 25% (31MB)
89 11:15:39.143181 progress 30% (38MB)
90 11:15:39.512835 progress 35% (44MB)
91 11:15:39.927340 progress 40% (50MB)
92 11:15:40.352047 progress 45% (57MB)
93 11:15:40.727718 progress 50% (63MB)
94 11:15:41.113264 progress 55% (69MB)
95 11:15:41.499041 progress 60% (76MB)
96 11:15:41.877211 progress 65% (82MB)
97 11:15:42.250677 progress 70% (89MB)
98 11:15:42.638564 progress 75% (95MB)
99 11:15:43.104903 progress 80% (101MB)
100 11:15:43.556071 progress 85% (108MB)
101 11:15:43.834062 progress 90% (114MB)
102 11:15:44.203003 progress 95% (120MB)
103 11:15:44.611667 progress 100% (127MB)
104 11:15:44.617980 127MB downloaded in 7.39s (17.20MB/s)
105 11:15:44.618289 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:15:44.618581 end: 1.3 download-retry (duration 00:00:07) [common]
108 11:15:44.618678 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:15:44.618772 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:15:44.618896 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.271-cip90-81-g5d0e00d43751/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:15:44.618974 saving as /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/modules/modules.tar
112 11:15:44.619039 total size: 64664 (0MB)
113 11:15:44.619105 Using unxz to decompress xz
114 11:15:44.645318 progress 50% (0MB)
115 11:15:44.651521 progress 100% (0MB)
116 11:15:44.654041 0MB downloaded in 0.03s (1.76MB/s)
117 11:15:44.654324 end: 1.4.1 http-download (duration 00:00:00) [common]
119 11:15:44.654753 end: 1.4 download-retry (duration 00:00:00) [common]
120 11:15:44.654872 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 11:15:44.655027 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 11:15:45.939187 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9033931/extract-nfsrootfs-r4fytwwa
123 11:15:45.939393 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 11:15:45.939500 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 11:15:45.939640 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_
126 11:15:45.939742 makedir: /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin
127 11:15:45.939829 makedir: /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/tests
128 11:15:45.939912 makedir: /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/results
129 11:15:45.940011 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-add-keys
130 11:15:45.940141 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-add-sources
131 11:15:45.940259 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-background-process-start
132 11:15:45.940375 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-background-process-stop
133 11:15:45.940489 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-common-functions
134 11:15:45.940601 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-echo-ipv4
135 11:15:45.940713 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-install-packages
136 11:15:45.940825 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-installed-packages
137 11:15:45.940936 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-os-build
138 11:15:45.941048 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-probe-channel
139 11:15:45.941159 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-probe-ip
140 11:15:45.941270 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-target-ip
141 11:15:45.941383 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-target-mac
142 11:15:45.941493 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-target-storage
143 11:15:45.941606 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-test-case
144 11:15:45.941719 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-test-event
145 11:15:45.941828 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-test-feedback
146 11:15:45.941938 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-test-raise
147 11:15:45.942047 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-test-reference
148 11:15:45.942195 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-test-runner
149 11:15:45.942307 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-test-set
150 11:15:45.942418 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-test-shell
151 11:15:45.942530 Updating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-install-packages (oe)
152 11:15:45.942645 Updating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/bin/lava-installed-packages (oe)
153 11:15:45.942744 Creating /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/environment
154 11:15:45.942830 LAVA metadata
155 11:15:45.942898 - LAVA_JOB_ID=9033931
156 11:15:45.942963 - LAVA_DISPATCHER_IP=192.168.201.1
157 11:15:45.943066 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 11:15:45.943136 skipped lava-vland-overlay
159 11:15:45.943215 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 11:15:45.943306 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 11:15:45.943374 skipped lava-multinode-overlay
162 11:15:45.943452 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 11:15:45.943538 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 11:15:45.943612 Loading test definitions
165 11:15:45.943704 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 11:15:45.943777 Using /lava-9033931 at stage 0
167 11:15:45.944037 uuid=9033931_1.5.2.3.1 testdef=None
168 11:15:45.944131 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 11:15:45.944223 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 11:15:45.944698 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 11:15:45.944940 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 11:15:45.945510 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 11:15:45.945755 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 11:15:45.946651 runner path: /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/0/tests/0_dmesg test_uuid 9033931_1.5.2.3.1
177 11:15:45.946798 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 11:15:45.947039 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 11:15:45.947114 Using /lava-9033931 at stage 1
181 11:15:45.947362 uuid=9033931_1.5.2.3.5 testdef=None
182 11:15:45.947453 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 11:15:45.947544 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 11:15:45.947991 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 11:15:45.948224 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 11:15:45.948802 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 11:15:45.949045 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 11:15:45.949599 runner path: /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/1/tests/1_bootrr test_uuid 9033931_1.5.2.3.5
191 11:15:45.949743 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 11:15:45.949960 Creating lava-test-runner.conf files
194 11:15:45.950026 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/0 for stage 0
195 11:15:45.950109 - 0_dmesg
196 11:15:45.950226 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9033931/lava-overlay-uq8khf3_/lava-9033931/1 for stage 1
197 11:15:45.950310 - 1_bootrr
198 11:15:45.950401 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 11:15:45.950489 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 11:15:45.955963 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 11:15:45.956069 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 11:15:45.956161 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 11:15:45.956252 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 11:15:45.956343 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 11:15:46.058950 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 11:15:46.059298 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 11:15:46.059420 extracting modules file /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9033931/extract-nfsrootfs-r4fytwwa
208 11:15:46.063596 extracting modules file /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9033931/extract-overlay-ramdisk-47jdizqa/ramdisk
209 11:15:46.067375 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 11:15:46.067491 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 11:15:46.067580 [common] Applying overlay to NFS
212 11:15:46.067652 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9033931/compress-overlay-eezhszni/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9033931/extract-nfsrootfs-r4fytwwa
213 11:15:46.071564 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 11:15:46.071675 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 11:15:46.071775 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 11:15:46.071874 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 11:15:46.071961 Building ramdisk /var/lib/lava/dispatcher/tmp/9033931/extract-overlay-ramdisk-47jdizqa/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9033931/extract-overlay-ramdisk-47jdizqa/ramdisk
218 11:15:46.105376 >> 24777 blocks
219 11:15:46.583489 rename /var/lib/lava/dispatcher/tmp/9033931/extract-overlay-ramdisk-47jdizqa/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/ramdisk/ramdisk.cpio.gz
220 11:15:46.584033 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 11:15:46.584234 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
222 11:15:46.584408 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
223 11:15:46.584569 No mkimage arch provided, not using FIT.
224 11:15:46.584728 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 11:15:46.584885 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 11:15:46.585062 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 11:15:46.585221 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
228 11:15:46.585361 No LXC device requested
229 11:15:46.585509 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 11:15:46.585667 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
231 11:15:46.585816 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 11:15:46.585946 Checking files for TFTP limit of 4294967296 bytes.
233 11:15:46.586555 end: 1 tftp-deploy (duration 00:00:10) [common]
234 11:15:46.586731 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 11:15:46.586893 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 11:15:46.587105 substitutions:
237 11:15:46.587227 - {DTB}: None
238 11:15:46.587346 - {INITRD}: 9033931/tftp-deploy-cs3pjyhe/ramdisk/ramdisk.cpio.gz
239 11:15:46.587461 - {KERNEL}: 9033931/tftp-deploy-cs3pjyhe/kernel/bzImage
240 11:15:46.587574 - {LAVA_MAC}: None
241 11:15:46.587687 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9033931/extract-nfsrootfs-r4fytwwa
242 11:15:46.587803 - {NFS_SERVER_IP}: 192.168.201.1
243 11:15:46.587917 - {PRESEED_CONFIG}: None
244 11:15:46.588033 - {PRESEED_LOCAL}: None
245 11:15:46.588146 - {RAMDISK}: 9033931/tftp-deploy-cs3pjyhe/ramdisk/ramdisk.cpio.gz
246 11:15:46.588259 - {ROOT_PART}: None
247 11:15:46.588372 - {ROOT}: None
248 11:15:46.588486 - {SERVER_IP}: 192.168.201.1
249 11:15:46.588599 - {TEE}: None
250 11:15:46.588710 Parsed boot commands:
251 11:15:46.588820 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 11:15:46.589070 Parsed boot commands: tftpboot 192.168.201.1 9033931/tftp-deploy-cs3pjyhe/kernel/bzImage 9033931/tftp-deploy-cs3pjyhe/kernel/cmdline 9033931/tftp-deploy-cs3pjyhe/ramdisk/ramdisk.cpio.gz
253 11:15:46.589229 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 11:15:46.589385 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 11:15:46.589552 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 11:15:46.589710 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 11:15:46.589839 Not connected, no need to disconnect.
258 11:15:46.589984 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 11:15:46.590146 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 11:15:46.590275 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-0'
261 11:15:46.593905 Setting prompt string to ['lava-test: # ']
262 11:15:46.594326 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 11:15:46.594505 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 11:15:46.594669 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 11:15:46.594830 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 11:15:46.595129 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
267 11:15:55.931345 >> Command sent successfully.
268 11:15:55.933457 Returned 0 in 9 seconds
269 11:15:56.034734 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
271 11:15:56.036451 end: 2.2.2 reset-device (duration 00:00:09) [common]
272 11:15:56.037009 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
273 11:15:56.037466 Setting prompt string to 'Starting depthcharge on Voema...'
274 11:15:56.037833 Changing prompt to 'Starting depthcharge on Voema...'
275 11:15:56.038257 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 11:15:56.040064 [Enter `^Ec?' for help]
277 11:15:56.040533
278 11:15:56.040974
279 11:15:56.041332 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 11:15:56.041690 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 11:15:56.042257 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 11:15:56.042703 CPU: AES supported, TXT NOT supported, VT supported
283 11:15:56.043042 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 11:15:56.043367 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 11:15:56.043686 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 11:15:56.044000 VBOOT: Loading verstage.
287 11:15:56.044306 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 11:15:56.044617 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 11:15:56.044926 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 11:15:56.045234 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 11:15:56.045543 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 11:15:56.045848
293 11:15:56.046179
294 11:15:56.046499 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 11:15:56.046811 Probing TPM: . done!
296 11:15:56.047114 TPM ready after 0 ms
297 11:15:56.047418 Connected to device vid:did:rid of 1ae0:0028:00
298 11:15:56.047721 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 11:15:56.048042 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 11:15:56.048348 Initialized TPM device CR50 revision 0
301 11:15:56.048651 tlcl_send_startup: Startup return code is 0
302 11:15:56.048997 TPM: setup succeeded
303 11:15:56.049505 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 11:15:56.049968 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 11:15:56.050327 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 11:15:56.050636 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 11:15:56.050941 Chrome EC: UHEPI supported
308 11:15:56.051389 Phase 1
309 11:15:56.051868 FMAP: area GBB found @ 1805000 (458752 bytes)
310 11:15:56.052353 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 11:15:56.052689 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 11:15:56.053017 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 11:15:56.053345 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 11:15:56.053686 Recovery requested (1009000e)
315 11:15:56.053994 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 11:15:56.054330 tlcl_extend: response is 0
317 11:15:56.054776 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 11:15:56.055271 tlcl_extend: response is 0
319 11:15:56.055698 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 11:15:56.056290 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 11:15:56.056886 BS: verstage times (exec / console): total (unknown) / 142 ms
322 11:15:56.057262
323 11:15:56.057576
324 11:15:56.057891 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 11:15:56.058241 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 11:15:56.058711 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 11:15:56.059050 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 11:15:56.059344 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 11:15:56.059564 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 11:15:56.059783 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
331 11:15:56.059998 TCO_STS: 0000 0000
332 11:15:56.060216 GEN_PMCON: d0015038 00002200
333 11:15:56.060434 GBLRST_CAUSE: 00000000 00000000
334 11:15:56.060650 HPR_CAUSE0: 00000000
335 11:15:56.060960 prev_sleep_state 5
336 11:15:56.061279 Boot Count incremented to 15943
337 11:15:56.061959 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 11:15:56.062312 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 11:15:56.062560 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 11:15:56.066594 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 11:15:56.069684 Chrome EC: UHEPI supported
342 11:15:56.076732 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 11:15:56.088065 Probing TPM: done!
344 11:15:56.096048 Connected to device vid:did:rid of 1ae0:0028:00
345 11:15:56.103042 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
346 11:15:56.111752 Initialized TPM device CR50 revision 0
347 11:15:56.121815 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 11:15:56.128560 MRC: Hash idx 0x100b comparison successful.
349 11:15:56.131797 MRC cache found, size faa8
350 11:15:56.132258 bootmode is set to: 2
351 11:15:56.134864 SPD index = 0
352 11:15:56.141902 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 11:15:56.145148 SPD: module type is LPDDR4X
354 11:15:56.148710 SPD: module part number is MT53E512M64D4NW-046
355 11:15:56.155185 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
356 11:15:56.158094 SPD: device width 16 bits, bus width 16 bits
357 11:15:56.164912 SPD: module size is 1024 MB (per channel)
358 11:15:56.595994 CBMEM:
359 11:15:56.599844 IMD: root @ 0x76fff000 254 entries.
360 11:15:56.602716 IMD: root @ 0x76ffec00 62 entries.
361 11:15:56.605759 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 11:15:56.612221 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 11:15:56.615455 External stage cache:
364 11:15:56.618986 IMD: root @ 0x7b3ff000 254 entries.
365 11:15:56.622706 IMD: root @ 0x7b3fec00 62 entries.
366 11:15:56.637669 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 11:15:56.644685 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 11:15:56.651267 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 11:15:56.665456 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 11:15:56.672293 cse_lite: Skip switching to RW in the recovery path
371 11:15:56.672740 8 DIMMs found
372 11:15:56.673142 SMM Memory Map
373 11:15:56.675079 SMRAM : 0x7b000000 0x800000
374 11:15:56.679060 Subregion 0: 0x7b000000 0x200000
375 11:15:56.681937 Subregion 1: 0x7b200000 0x200000
376 11:15:56.685684 Subregion 2: 0x7b400000 0x400000
377 11:15:56.689134 top_of_ram = 0x77000000
378 11:15:56.695495 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 11:15:56.698895 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 11:15:56.705203 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 11:15:56.708687 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 11:15:56.719106 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 11:15:56.725959 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 11:15:56.735137 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 11:15:56.738931 Processing 211 relocs. Offset value of 0x74c0b000
386 11:15:56.747814 BS: romstage times (exec / console): total (unknown) / 277 ms
387 11:15:56.753914
388 11:15:56.754393
389 11:15:56.763646 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 11:15:56.767228 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 11:15:56.777260 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 11:15:56.783381 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 11:15:56.790053 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 11:15:56.796811 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 11:15:56.843603 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 11:15:56.850294 Processing 5008 relocs. Offset value of 0x75d98000
397 11:15:56.853555 BS: postcar times (exec / console): total (unknown) / 59 ms
398 11:15:56.856967
399 11:15:56.857418
400 11:15:56.866923 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 11:15:56.867427 Normal boot
402 11:15:56.870810 FW_CONFIG value is 0x804c02
403 11:15:56.874068 PCI: 00:07.0 disabled by fw_config
404 11:15:56.877983 PCI: 00:07.1 disabled by fw_config
405 11:15:56.881003 PCI: 00:0d.2 disabled by fw_config
406 11:15:56.883865 PCI: 00:1c.7 disabled by fw_config
407 11:15:56.890469 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 11:15:56.897271 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 11:15:56.900063 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 11:15:56.903735 GENERIC: 0.0 disabled by fw_config
411 11:15:56.910406 GENERIC: 1.0 disabled by fw_config
412 11:15:56.913791 fw_config match found: DB_USB=USB3_ACTIVE
413 11:15:56.917170 fw_config match found: DB_USB=USB3_ACTIVE
414 11:15:56.920629 fw_config match found: DB_USB=USB3_ACTIVE
415 11:15:56.926694 fw_config match found: DB_USB=USB3_ACTIVE
416 11:15:56.930107 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 11:15:56.937101 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 11:15:56.946691 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 11:15:56.954051 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 11:15:56.957365 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 11:15:56.963116 microcode: Update skipped, already up-to-date
422 11:15:56.969544 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 11:15:56.997714 Detected 4 core, 8 thread CPU.
424 11:15:57.000241 Setting up SMI for CPU
425 11:15:57.004790 IED base = 0x7b400000
426 11:15:57.005351 IED size = 0x00400000
427 11:15:57.007471 Will perform SMM setup.
428 11:15:57.013567 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
429 11:15:57.020187 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 11:15:57.026857 Processing 16 relocs. Offset value of 0x00030000
431 11:15:57.030319 Attempting to start 7 APs
432 11:15:57.033683 Waiting for 10ms after sending INIT.
433 11:15:57.049383 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
434 11:15:57.052556 AP: slot 4 apic_id 7.
435 11:15:57.056552 AP: slot 5 apic_id 6.
436 11:15:57.056929 AP: slot 6 apic_id 2.
437 11:15:57.060054 AP: slot 2 apic_id 3.
438 11:15:57.063001 AP: slot 3 apic_id 5.
439 11:15:57.063431 AP: slot 7 apic_id 4.
440 11:15:57.063761 done.
441 11:15:57.069198 Waiting for 2nd SIPI to complete...done.
442 11:15:57.075986 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 11:15:57.082629 Processing 13 relocs. Offset value of 0x00038000
444 11:15:57.085769 Unable to locate Global NVS
445 11:15:57.092576 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 11:15:57.096294 Installing permanent SMM handler to 0x7b000000
447 11:15:57.105695 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 11:15:57.108845 Processing 794 relocs. Offset value of 0x7b010000
449 11:15:57.119234 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 11:15:57.122569 Processing 13 relocs. Offset value of 0x7b008000
451 11:15:57.129638 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 11:15:57.135897 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 11:15:57.138824 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 11:15:57.145989 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 11:15:57.152405 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 11:15:57.158966 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 11:15:57.165635 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 11:15:57.166021 Unable to locate Global NVS
459 11:15:57.175252 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 11:15:57.179174 Clearing SMI status registers
461 11:15:57.179629 SMI_STS: PM1
462 11:15:57.182369 PM1_STS: PWRBTN
463 11:15:57.188988 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 11:15:57.192376 In relocation handler: CPU 0
465 11:15:57.195457 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 11:15:57.201962 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 11:15:57.202468 Relocation complete.
468 11:15:57.211977 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 11:15:57.215848 In relocation handler: CPU 1
470 11:15:57.218653 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 11:15:57.219122 Relocation complete.
472 11:15:57.228444 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
473 11:15:57.228923 In relocation handler: CPU 6
474 11:15:57.234890 New SMBASE=0x7affe800 IEDBASE=0x7b400000
475 11:15:57.238274 Writing SMRR. base = 0x7b000006, mask=0xff800c00
476 11:15:57.242181 Relocation complete.
477 11:15:57.248435 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
478 11:15:57.251706 In relocation handler: CPU 2
479 11:15:57.254917 New SMBASE=0x7afff800 IEDBASE=0x7b400000
480 11:15:57.258360 Relocation complete.
481 11:15:57.264557 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
482 11:15:57.267931 In relocation handler: CPU 4
483 11:15:57.271364 New SMBASE=0x7afff000 IEDBASE=0x7b400000
484 11:15:57.274693 Relocation complete.
485 11:15:57.281413 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
486 11:15:57.284442 In relocation handler: CPU 5
487 11:15:57.288003 New SMBASE=0x7affec00 IEDBASE=0x7b400000
488 11:15:57.294265 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 11:15:57.294512 Relocation complete.
490 11:15:57.301425 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
491 11:15:57.304292 In relocation handler: CPU 3
492 11:15:57.310893 New SMBASE=0x7afff400 IEDBASE=0x7b400000
493 11:15:57.311166 Relocation complete.
494 11:15:57.317230 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
495 11:15:57.320844 In relocation handler: CPU 7
496 11:15:57.327344 New SMBASE=0x7affe400 IEDBASE=0x7b400000
497 11:15:57.331165 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 11:15:57.334105 Relocation complete.
499 11:15:57.334373 Initializing CPU #0
500 11:15:57.338087 CPU: vendor Intel device 806c1
501 11:15:57.341651 CPU: family 06, model 8c, stepping 01
502 11:15:57.345220 Clearing out pending MCEs
503 11:15:57.348413 Setting up local APIC...
504 11:15:57.348664 apic_id: 0x00 done.
505 11:15:57.352327 Turbo is available but hidden
506 11:15:57.355076 Turbo is available and visible
507 11:15:57.361979 microcode: Update skipped, already up-to-date
508 11:15:57.362197 CPU #0 initialized
509 11:15:57.365502 Initializing CPU #1
510 11:15:57.368711 Initializing CPU #7
511 11:15:57.368938 Initializing CPU #3
512 11:15:57.371609 CPU: vendor Intel device 806c1
513 11:15:57.374676 CPU: family 06, model 8c, stepping 01
514 11:15:57.378060 CPU: vendor Intel device 806c1
515 11:15:57.381202 CPU: family 06, model 8c, stepping 01
516 11:15:57.384928 Clearing out pending MCEs
517 11:15:57.387924 Clearing out pending MCEs
518 11:15:57.391503 Setting up local APIC...
519 11:15:57.391737 Initializing CPU #5
520 11:15:57.394688 Initializing CPU #4
521 11:15:57.397758 CPU: vendor Intel device 806c1
522 11:15:57.401391 CPU: family 06, model 8c, stepping 01
523 11:15:57.404567 CPU: vendor Intel device 806c1
524 11:15:57.408201 CPU: family 06, model 8c, stepping 01
525 11:15:57.411308 Clearing out pending MCEs
526 11:15:57.414343 Clearing out pending MCEs
527 11:15:57.418215 Setting up local APIC...
528 11:15:57.418297 Initializing CPU #6
529 11:15:57.421244 apic_id: 0x04 done.
530 11:15:57.424445 Setting up local APIC...
531 11:15:57.424544 Setting up local APIC...
532 11:15:57.428339 CPU: vendor Intel device 806c1
533 11:15:57.431287 CPU: family 06, model 8c, stepping 01
534 11:15:57.434277 CPU: vendor Intel device 806c1
535 11:15:57.441756 CPU: family 06, model 8c, stepping 01
536 11:15:57.441881 Initializing CPU #2
537 11:15:57.444412 Clearing out pending MCEs
538 11:15:57.447671 CPU: vendor Intel device 806c1
539 11:15:57.452219 CPU: family 06, model 8c, stepping 01
540 11:15:57.455559 Setting up local APIC...
541 11:15:57.455730 apic_id: 0x06 done.
542 11:15:57.457442 apic_id: 0x07 done.
543 11:15:57.461166 microcode: Update skipped, already up-to-date
544 11:15:57.467336 microcode: Update skipped, already up-to-date
545 11:15:57.467505 CPU #5 initialized
546 11:15:57.471436 CPU #4 initialized
547 11:15:57.474316 Clearing out pending MCEs
548 11:15:57.474481 apic_id: 0x02 done.
549 11:15:57.477430 Setting up local APIC...
550 11:15:57.484143 microcode: Update skipped, already up-to-date
551 11:15:57.484303 apic_id: 0x03 done.
552 11:15:57.487812 CPU #6 initialized
553 11:15:57.490558 microcode: Update skipped, already up-to-date
554 11:15:57.494296 apic_id: 0x05 done.
555 11:15:57.497381 microcode: Update skipped, already up-to-date
556 11:15:57.504169 microcode: Update skipped, already up-to-date
557 11:15:57.504289 CPU #7 initialized
558 11:15:57.507263 CPU #3 initialized
559 11:15:57.510767 Clearing out pending MCEs
560 11:15:57.510857 CPU #2 initialized
561 11:15:57.513823 Setting up local APIC...
562 11:15:57.517561 apic_id: 0x01 done.
563 11:15:57.520993 microcode: Update skipped, already up-to-date
564 11:15:57.524024 CPU #1 initialized
565 11:15:57.527481 bsp_do_flight_plan done after 455 msecs.
566 11:15:57.530443 CPU: frequency set to 4000 MHz
567 11:15:57.530526 Enabling SMIs.
568 11:15:57.537042 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
569 11:15:57.554500 SATAXPCIE1 indicates PCIe NVMe is present
570 11:15:57.557767 Probing TPM: done!
571 11:15:57.560893 Connected to device vid:did:rid of 1ae0:0028:00
572 11:15:57.571309 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
573 11:15:57.574717 Initialized TPM device CR50 revision 0
574 11:15:57.578364 Enabling S0i3.4
575 11:15:57.584708 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 11:15:57.587994 Found a VBT of 8704 bytes after decompression
577 11:15:57.594424 cse_lite: CSE RO boot. HybridStorageMode disabled
578 11:15:57.601318 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 11:15:57.677021 FSPS returned 0
580 11:15:57.680199 Executing Phase 1 of FspMultiPhaseSiInit
581 11:15:57.690425 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 11:15:57.693194 port C0 DISC req: usage 1 usb3 1 usb2 5
583 11:15:57.696595 Raw Buffer output 0 00000511
584 11:15:57.700341 Raw Buffer output 1 00000000
585 11:15:57.703340 pmc_send_ipc_cmd succeeded
586 11:15:57.709986 port C1 DISC req: usage 1 usb3 2 usb2 3
587 11:15:57.710079 Raw Buffer output 0 00000321
588 11:15:57.713893 Raw Buffer output 1 00000000
589 11:15:57.717789 pmc_send_ipc_cmd succeeded
590 11:15:57.723238 Detected 4 core, 8 thread CPU.
591 11:15:57.726939 Detected 4 core, 8 thread CPU.
592 11:15:57.960661 Display FSP Version Info HOB
593 11:15:57.963566 Reference Code - CPU = a.0.4c.31
594 11:15:57.966763 uCode Version = 0.0.0.86
595 11:15:57.970261 TXT ACM version = ff.ff.ff.ffff
596 11:15:57.973636 Reference Code - ME = a.0.4c.31
597 11:15:57.977313 MEBx version = 0.0.0.0
598 11:15:57.980100 ME Firmware Version = Consumer SKU
599 11:15:57.983341 Reference Code - PCH = a.0.4c.31
600 11:15:57.986542 PCH-CRID Status = Disabled
601 11:15:57.990165 PCH-CRID Original Value = ff.ff.ff.ffff
602 11:15:57.993493 PCH-CRID New Value = ff.ff.ff.ffff
603 11:15:57.996607 OPROM - RST - RAID = ff.ff.ff.ffff
604 11:15:58.000021 PCH Hsio Version = 4.0.0.0
605 11:15:58.003487 Reference Code - SA - System Agent = a.0.4c.31
606 11:15:58.006592 Reference Code - MRC = 2.0.0.1
607 11:15:58.009679 SA - PCIe Version = a.0.4c.31
608 11:15:58.013956 SA-CRID Status = Disabled
609 11:15:58.016623 SA-CRID Original Value = 0.0.0.1
610 11:15:58.019523 SA-CRID New Value = 0.0.0.1
611 11:15:58.022807 OPROM - VBIOS = ff.ff.ff.ffff
612 11:15:58.026821 IO Manageability Engine FW Version = 11.1.4.0
613 11:15:58.029672 PHY Build Version = 0.0.0.e0
614 11:15:58.032559 Thunderbolt(TM) FW Version = 0.0.0.0
615 11:15:58.039389 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 11:15:58.043104 ITSS IRQ Polarities Before:
617 11:15:58.043192 IPC0: 0xffffffff
618 11:15:58.046712 IPC1: 0xffffffff
619 11:15:58.046800 IPC2: 0xffffffff
620 11:15:58.049438 IPC3: 0xffffffff
621 11:15:58.053419 ITSS IRQ Polarities After:
622 11:15:58.053508 IPC0: 0xffffffff
623 11:15:58.055915 IPC1: 0xffffffff
624 11:15:58.056004 IPC2: 0xffffffff
625 11:15:58.059100 IPC3: 0xffffffff
626 11:15:58.062949 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 11:15:58.076573 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 11:15:58.085609 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 11:15:58.099015 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 11:15:58.105991 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
631 11:15:58.109096 Enumerating buses...
632 11:15:58.112205 Show all devs... Before device enumeration.
633 11:15:58.116379 Root Device: enabled 1
634 11:15:58.116468 DOMAIN: 0000: enabled 1
635 11:15:58.119003 CPU_CLUSTER: 0: enabled 1
636 11:15:58.122286 PCI: 00:00.0: enabled 1
637 11:15:58.125328 PCI: 00:02.0: enabled 1
638 11:15:58.125416 PCI: 00:04.0: enabled 1
639 11:15:58.129396 PCI: 00:05.0: enabled 1
640 11:15:58.132771 PCI: 00:06.0: enabled 0
641 11:15:58.135817 PCI: 00:07.0: enabled 0
642 11:15:58.135905 PCI: 00:07.1: enabled 0
643 11:15:58.138979 PCI: 00:07.2: enabled 0
644 11:15:58.142388 PCI: 00:07.3: enabled 0
645 11:15:58.145339 PCI: 00:08.0: enabled 1
646 11:15:58.145427 PCI: 00:09.0: enabled 0
647 11:15:58.148971 PCI: 00:0a.0: enabled 0
648 11:15:58.151819 PCI: 00:0d.0: enabled 1
649 11:15:58.155845 PCI: 00:0d.1: enabled 0
650 11:15:58.155933 PCI: 00:0d.2: enabled 0
651 11:15:58.159039 PCI: 00:0d.3: enabled 0
652 11:15:58.162304 PCI: 00:0e.0: enabled 0
653 11:15:58.165052 PCI: 00:10.2: enabled 1
654 11:15:58.165140 PCI: 00:10.6: enabled 0
655 11:15:58.169030 PCI: 00:10.7: enabled 0
656 11:15:58.172171 PCI: 00:12.0: enabled 0
657 11:15:58.172259 PCI: 00:12.6: enabled 0
658 11:15:58.175366 PCI: 00:13.0: enabled 0
659 11:15:58.178949 PCI: 00:14.0: enabled 1
660 11:15:58.182301 PCI: 00:14.1: enabled 0
661 11:15:58.182388 PCI: 00:14.2: enabled 1
662 11:15:58.185439 PCI: 00:14.3: enabled 1
663 11:15:58.188817 PCI: 00:15.0: enabled 1
664 11:15:58.192478 PCI: 00:15.1: enabled 1
665 11:15:58.192586 PCI: 00:15.2: enabled 1
666 11:15:58.195430 PCI: 00:15.3: enabled 1
667 11:15:58.198325 PCI: 00:16.0: enabled 1
668 11:15:58.201934 PCI: 00:16.1: enabled 0
669 11:15:58.202022 PCI: 00:16.2: enabled 0
670 11:15:58.205073 PCI: 00:16.3: enabled 0
671 11:15:58.208489 PCI: 00:16.4: enabled 0
672 11:15:58.212136 PCI: 00:16.5: enabled 0
673 11:15:58.212224 PCI: 00:17.0: enabled 1
674 11:15:58.215310 PCI: 00:19.0: enabled 0
675 11:15:58.218283 PCI: 00:19.1: enabled 1
676 11:15:58.218371 PCI: 00:19.2: enabled 0
677 11:15:58.221496 PCI: 00:1c.0: enabled 1
678 11:15:58.225642 PCI: 00:1c.1: enabled 0
679 11:15:58.228328 PCI: 00:1c.2: enabled 0
680 11:15:58.228416 PCI: 00:1c.3: enabled 0
681 11:15:58.232611 PCI: 00:1c.4: enabled 0
682 11:15:58.234968 PCI: 00:1c.5: enabled 0
683 11:15:58.238329 PCI: 00:1c.6: enabled 1
684 11:15:58.238417 PCI: 00:1c.7: enabled 0
685 11:15:58.241861 PCI: 00:1d.0: enabled 1
686 11:15:58.245081 PCI: 00:1d.1: enabled 0
687 11:15:58.249010 PCI: 00:1d.2: enabled 1
688 11:15:58.249098 PCI: 00:1d.3: enabled 0
689 11:15:58.251442 PCI: 00:1e.0: enabled 1
690 11:15:58.254931 PCI: 00:1e.1: enabled 0
691 11:15:58.257904 PCI: 00:1e.2: enabled 1
692 11:15:58.257992 PCI: 00:1e.3: enabled 1
693 11:15:58.261981 PCI: 00:1f.0: enabled 1
694 11:15:58.265335 PCI: 00:1f.1: enabled 0
695 11:15:58.265424 PCI: 00:1f.2: enabled 1
696 11:15:58.268389 PCI: 00:1f.3: enabled 1
697 11:15:58.271829 PCI: 00:1f.4: enabled 0
698 11:15:58.275070 PCI: 00:1f.5: enabled 1
699 11:15:58.275158 PCI: 00:1f.6: enabled 0
700 11:15:58.278364 PCI: 00:1f.7: enabled 0
701 11:15:58.283066 APIC: 00: enabled 1
702 11:15:58.284889 GENERIC: 0.0: enabled 1
703 11:15:58.284984 GENERIC: 0.0: enabled 1
704 11:15:58.288016 GENERIC: 1.0: enabled 1
705 11:15:58.292276 GENERIC: 0.0: enabled 1
706 11:15:58.292365 GENERIC: 1.0: enabled 1
707 11:15:58.294425 USB0 port 0: enabled 1
708 11:15:58.297894 GENERIC: 0.0: enabled 1
709 11:15:58.301287 USB0 port 0: enabled 1
710 11:15:58.301376 GENERIC: 0.0: enabled 1
711 11:15:58.304978 I2C: 00:1a: enabled 1
712 11:15:58.308369 I2C: 00:31: enabled 1
713 11:15:58.308469 I2C: 00:32: enabled 1
714 11:15:58.311319 I2C: 00:10: enabled 1
715 11:15:58.314488 I2C: 00:15: enabled 1
716 11:15:58.314575 GENERIC: 0.0: enabled 0
717 11:15:58.318267 GENERIC: 1.0: enabled 0
718 11:15:58.321528 GENERIC: 0.0: enabled 1
719 11:15:58.324709 SPI: 00: enabled 1
720 11:15:58.324798 SPI: 00: enabled 1
721 11:15:58.327876 PNP: 0c09.0: enabled 1
722 11:15:58.331098 GENERIC: 0.0: enabled 1
723 11:15:58.331187 USB3 port 0: enabled 1
724 11:15:58.335056 USB3 port 1: enabled 1
725 11:15:58.337863 USB3 port 2: enabled 0
726 11:15:58.337954 USB3 port 3: enabled 0
727 11:15:58.341179 USB2 port 0: enabled 0
728 11:15:58.344745 USB2 port 1: enabled 1
729 11:15:58.344833 USB2 port 2: enabled 1
730 11:15:58.347984 USB2 port 3: enabled 0
731 11:15:58.351163 USB2 port 4: enabled 1
732 11:15:58.354311 USB2 port 5: enabled 0
733 11:15:58.354399 USB2 port 6: enabled 0
734 11:15:58.357688 USB2 port 7: enabled 0
735 11:15:58.361282 USB2 port 8: enabled 0
736 11:15:58.361369 USB2 port 9: enabled 0
737 11:15:58.364331 USB3 port 0: enabled 0
738 11:15:58.367559 USB3 port 1: enabled 1
739 11:15:58.371046 USB3 port 2: enabled 0
740 11:15:58.371134 USB3 port 3: enabled 0
741 11:15:58.374251 GENERIC: 0.0: enabled 1
742 11:15:58.377881 GENERIC: 1.0: enabled 1
743 11:15:58.377970 APIC: 01: enabled 1
744 11:15:58.381280 APIC: 03: enabled 1
745 11:15:58.384439 APIC: 05: enabled 1
746 11:15:58.384527 APIC: 07: enabled 1
747 11:15:58.388069 APIC: 06: enabled 1
748 11:15:58.388157 APIC: 02: enabled 1
749 11:15:58.391205 APIC: 04: enabled 1
750 11:15:58.394254 Compare with tree...
751 11:15:58.394341 Root Device: enabled 1
752 11:15:58.398074 DOMAIN: 0000: enabled 1
753 11:15:58.401966 PCI: 00:00.0: enabled 1
754 11:15:58.404472 PCI: 00:02.0: enabled 1
755 11:15:58.407829 PCI: 00:04.0: enabled 1
756 11:15:58.407921 GENERIC: 0.0: enabled 1
757 11:15:58.411983 PCI: 00:05.0: enabled 1
758 11:15:58.414246 PCI: 00:06.0: enabled 0
759 11:15:58.418079 PCI: 00:07.0: enabled 0
760 11:15:58.421139 GENERIC: 0.0: enabled 1
761 11:15:58.421226 PCI: 00:07.1: enabled 0
762 11:15:58.424087 GENERIC: 1.0: enabled 1
763 11:15:58.427496 PCI: 00:07.2: enabled 0
764 11:15:58.431360 GENERIC: 0.0: enabled 1
765 11:15:58.434197 PCI: 00:07.3: enabled 0
766 11:15:58.434330 GENERIC: 1.0: enabled 1
767 11:15:58.437451 PCI: 00:08.0: enabled 1
768 11:15:58.441486 PCI: 00:09.0: enabled 0
769 11:15:58.443949 PCI: 00:0a.0: enabled 0
770 11:15:58.447390 PCI: 00:0d.0: enabled 1
771 11:15:58.447479 USB0 port 0: enabled 1
772 11:15:58.451142 USB3 port 0: enabled 1
773 11:15:58.454054 USB3 port 1: enabled 1
774 11:15:58.457683 USB3 port 2: enabled 0
775 11:15:58.461032 USB3 port 3: enabled 0
776 11:15:58.461121 PCI: 00:0d.1: enabled 0
777 11:15:58.463890 PCI: 00:0d.2: enabled 0
778 11:15:58.467770 GENERIC: 0.0: enabled 1
779 11:15:58.470584 PCI: 00:0d.3: enabled 0
780 11:15:58.474522 PCI: 00:0e.0: enabled 0
781 11:15:58.474616 PCI: 00:10.2: enabled 1
782 11:15:58.477416 PCI: 00:10.6: enabled 0
783 11:15:58.480571 PCI: 00:10.7: enabled 0
784 11:15:58.484009 PCI: 00:12.0: enabled 0
785 11:15:58.486994 PCI: 00:12.6: enabled 0
786 11:15:58.487085 PCI: 00:13.0: enabled 0
787 11:15:58.490391 PCI: 00:14.0: enabled 1
788 11:15:58.493641 USB0 port 0: enabled 1
789 11:15:58.497398 USB2 port 0: enabled 0
790 11:15:58.500859 USB2 port 1: enabled 1
791 11:15:58.503793 USB2 port 2: enabled 1
792 11:15:58.503883 USB2 port 3: enabled 0
793 11:15:58.507076 USB2 port 4: enabled 1
794 11:15:58.510139 USB2 port 5: enabled 0
795 11:15:58.514546 USB2 port 6: enabled 0
796 11:15:58.517171 USB2 port 7: enabled 0
797 11:15:58.517260 USB2 port 8: enabled 0
798 11:15:58.520420 USB2 port 9: enabled 0
799 11:15:58.524030 USB3 port 0: enabled 0
800 11:15:58.526707 USB3 port 1: enabled 1
801 11:15:58.530120 USB3 port 2: enabled 0
802 11:15:58.533380 USB3 port 3: enabled 0
803 11:15:58.533470 PCI: 00:14.1: enabled 0
804 11:15:58.537205 PCI: 00:14.2: enabled 1
805 11:15:58.540152 PCI: 00:14.3: enabled 1
806 11:15:58.543604 GENERIC: 0.0: enabled 1
807 11:15:58.546643 PCI: 00:15.0: enabled 1
808 11:15:58.546732 I2C: 00:1a: enabled 1
809 11:15:58.550269 I2C: 00:31: enabled 1
810 11:15:58.553619 I2C: 00:32: enabled 1
811 11:15:58.557647 PCI: 00:15.1: enabled 1
812 11:15:58.560094 I2C: 00:10: enabled 1
813 11:15:58.560183 PCI: 00:15.2: enabled 1
814 11:15:58.564234 PCI: 00:15.3: enabled 1
815 11:15:58.566618 PCI: 00:16.0: enabled 1
816 11:15:58.570074 PCI: 00:16.1: enabled 0
817 11:15:58.573334 PCI: 00:16.2: enabled 0
818 11:15:58.573430 PCI: 00:16.3: enabled 0
819 11:15:58.577261 PCI: 00:16.4: enabled 0
820 11:15:58.579772 PCI: 00:16.5: enabled 0
821 11:15:58.583894 PCI: 00:17.0: enabled 1
822 11:15:58.583984 PCI: 00:19.0: enabled 0
823 11:15:58.587605 PCI: 00:19.1: enabled 1
824 11:15:58.590929 I2C: 00:15: enabled 1
825 11:15:58.591018 PCI: 00:19.2: enabled 0
826 11:15:58.594449 PCI: 00:1d.0: enabled 1
827 11:15:58.598426 GENERIC: 0.0: enabled 1
828 11:15:58.600939 PCI: 00:1e.0: enabled 1
829 11:15:58.604457 PCI: 00:1e.1: enabled 0
830 11:15:58.604547 PCI: 00:1e.2: enabled 1
831 11:15:58.654688 SPI: 00: enabled 1
832 11:15:58.654815 PCI: 00:1e.3: enabled 1
833 11:15:58.655135 SPI: 00: enabled 1
834 11:15:58.655218 PCI: 00:1f.0: enabled 1
835 11:15:58.655287 PNP: 0c09.0: enabled 1
836 11:15:58.655538 PCI: 00:1f.1: enabled 0
837 11:15:58.655612 PCI: 00:1f.2: enabled 1
838 11:15:58.655863 GENERIC: 0.0: enabled 1
839 11:15:58.655935 GENERIC: 0.0: enabled 1
840 11:15:58.656202 GENERIC: 1.0: enabled 1
841 11:15:58.656298 PCI: 00:1f.3: enabled 1
842 11:15:58.656644 PCI: 00:1f.4: enabled 0
843 11:15:58.656733 PCI: 00:1f.5: enabled 1
844 11:15:58.656803 PCI: 00:1f.6: enabled 0
845 11:15:58.657231 PCI: 00:1f.7: enabled 0
846 11:15:58.657320 CPU_CLUSTER: 0: enabled 1
847 11:15:58.658082 APIC: 00: enabled 1
848 11:15:58.658207 APIC: 01: enabled 1
849 11:15:58.658278 APIC: 03: enabled 1
850 11:15:58.662127 APIC: 05: enabled 1
851 11:15:58.662273 APIC: 07: enabled 1
852 11:15:58.662361 APIC: 06: enabled 1
853 11:15:58.665199 APIC: 02: enabled 1
854 11:15:58.665289 APIC: 04: enabled 1
855 11:15:58.669100 Root Device scanning...
856 11:15:58.672442 scan_static_bus for Root Device
857 11:15:58.676403 DOMAIN: 0000 enabled
858 11:15:58.679335 CPU_CLUSTER: 0 enabled
859 11:15:58.679424 DOMAIN: 0000 scanning...
860 11:15:58.682124 PCI: pci_scan_bus for bus 00
861 11:15:58.685661 PCI: 00:00.0 [8086/0000] ops
862 11:15:58.689196 PCI: 00:00.0 [8086/9a12] enabled
863 11:15:58.692222 PCI: 00:02.0 [8086/0000] bus ops
864 11:15:58.695316 PCI: 00:02.0 [8086/9a40] enabled
865 11:15:58.698551 PCI: 00:04.0 [8086/0000] bus ops
866 11:15:58.701982 PCI: 00:04.0 [8086/9a03] enabled
867 11:15:58.705488 PCI: 00:05.0 [8086/9a19] enabled
868 11:15:58.709138 PCI: 00:07.0 [0000/0000] hidden
869 11:15:58.711887 PCI: 00:08.0 [8086/9a11] enabled
870 11:15:58.715455 PCI: 00:0a.0 [8086/9a0d] disabled
871 11:15:58.718563 PCI: 00:0d.0 [8086/0000] bus ops
872 11:15:58.721610 PCI: 00:0d.0 [8086/9a13] enabled
873 11:15:58.725248 PCI: 00:14.0 [8086/0000] bus ops
874 11:15:58.728387 PCI: 00:14.0 [8086/a0ed] enabled
875 11:15:58.731897 PCI: 00:14.2 [8086/a0ef] enabled
876 11:15:58.735439 PCI: 00:14.3 [8086/0000] bus ops
877 11:15:58.738641 PCI: 00:14.3 [8086/a0f0] enabled
878 11:15:58.742326 PCI: 00:15.0 [8086/0000] bus ops
879 11:15:58.745053 PCI: 00:15.0 [8086/a0e8] enabled
880 11:15:58.748545 PCI: 00:15.1 [8086/0000] bus ops
881 11:15:58.752399 PCI: 00:15.1 [8086/a0e9] enabled
882 11:15:58.756520 PCI: 00:15.2 [8086/0000] bus ops
883 11:15:58.758556 PCI: 00:15.2 [8086/a0ea] enabled
884 11:15:58.761984 PCI: 00:15.3 [8086/0000] bus ops
885 11:15:58.766417 PCI: 00:15.3 [8086/a0eb] enabled
886 11:15:58.768297 PCI: 00:16.0 [8086/0000] ops
887 11:15:58.771446 PCI: 00:16.0 [8086/a0e0] enabled
888 11:15:58.779010 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 11:15:58.781861 PCI: 00:19.0 [8086/0000] bus ops
890 11:15:58.784719 PCI: 00:19.0 [8086/a0c5] disabled
891 11:15:58.788031 PCI: 00:19.1 [8086/0000] bus ops
892 11:15:58.792710 PCI: 00:19.1 [8086/a0c6] enabled
893 11:15:58.794799 PCI: 00:1d.0 [8086/0000] bus ops
894 11:15:58.797851 PCI: 00:1d.0 [8086/a0b0] enabled
895 11:15:58.801843 PCI: 00:1e.0 [8086/0000] ops
896 11:15:58.804507 PCI: 00:1e.0 [8086/a0a8] enabled
897 11:15:58.808023 PCI: 00:1e.2 [8086/0000] bus ops
898 11:15:58.811263 PCI: 00:1e.2 [8086/a0aa] enabled
899 11:15:58.814828 PCI: 00:1e.3 [8086/0000] bus ops
900 11:15:58.818046 PCI: 00:1e.3 [8086/a0ab] enabled
901 11:15:58.821929 PCI: 00:1f.0 [8086/0000] bus ops
902 11:15:58.824336 PCI: 00:1f.0 [8086/a087] enabled
903 11:15:58.824430 RTC Init
904 11:15:58.831271 Set power on after power failure.
905 11:15:58.831361 Disabling Deep S3
906 11:15:58.834436 Disabling Deep S3
907 11:15:58.834515 Disabling Deep S4
908 11:15:58.837750 Disabling Deep S4
909 11:15:58.837828 Disabling Deep S5
910 11:15:58.841074 Disabling Deep S5
911 11:15:58.844399 PCI: 00:1f.2 [0000/0000] hidden
912 11:15:58.847590 PCI: 00:1f.3 [8086/0000] bus ops
913 11:15:58.851229 PCI: 00:1f.3 [8086/a0c8] enabled
914 11:15:58.854621 PCI: 00:1f.5 [8086/0000] bus ops
915 11:15:58.858049 PCI: 00:1f.5 [8086/a0a4] enabled
916 11:15:58.861436 PCI: Leftover static devices:
917 11:15:58.861525 PCI: 00:10.2
918 11:15:58.864706 PCI: 00:10.6
919 11:15:58.864801 PCI: 00:10.7
920 11:15:58.864904 PCI: 00:06.0
921 11:15:58.867944 PCI: 00:07.1
922 11:15:58.868033 PCI: 00:07.2
923 11:15:58.871137 PCI: 00:07.3
924 11:15:58.871238 PCI: 00:09.0
925 11:15:58.874822 PCI: 00:0d.1
926 11:15:58.874914 PCI: 00:0d.2
927 11:15:58.874984 PCI: 00:0d.3
928 11:15:58.877722 PCI: 00:0e.0
929 11:15:58.877811 PCI: 00:12.0
930 11:15:58.880846 PCI: 00:12.6
931 11:15:58.880936 PCI: 00:13.0
932 11:15:58.881006 PCI: 00:14.1
933 11:15:58.884381 PCI: 00:16.1
934 11:15:58.884470 PCI: 00:16.2
935 11:15:58.887422 PCI: 00:16.3
936 11:15:58.887511 PCI: 00:16.4
937 11:15:58.890588 PCI: 00:16.5
938 11:15:58.890677 PCI: 00:17.0
939 11:15:58.890747 PCI: 00:19.2
940 11:15:58.894152 PCI: 00:1e.1
941 11:15:58.894249 PCI: 00:1f.1
942 11:15:58.897830 PCI: 00:1f.4
943 11:15:58.897919 PCI: 00:1f.6
944 11:15:58.897990 PCI: 00:1f.7
945 11:15:58.901775 PCI: Check your devicetree.cb.
946 11:15:58.904133 PCI: 00:02.0 scanning...
947 11:15:58.907876 scan_generic_bus for PCI: 00:02.0
948 11:15:58.910975 scan_generic_bus for PCI: 00:02.0 done
949 11:15:58.917811 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 11:15:58.920531 PCI: 00:04.0 scanning...
951 11:15:58.923590 scan_generic_bus for PCI: 00:04.0
952 11:15:58.923680 GENERIC: 0.0 enabled
953 11:15:58.931010 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 11:15:58.937315 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 11:15:58.937406 PCI: 00:0d.0 scanning...
956 11:15:58.940711 scan_static_bus for PCI: 00:0d.0
957 11:15:58.943855 USB0 port 0 enabled
958 11:15:58.947325 USB0 port 0 scanning...
959 11:15:58.950843 scan_static_bus for USB0 port 0
960 11:15:58.954168 USB3 port 0 enabled
961 11:15:58.954257 USB3 port 1 enabled
962 11:15:58.957475 USB3 port 2 disabled
963 11:15:58.957564 USB3 port 3 disabled
964 11:15:58.960521 USB3 port 0 scanning...
965 11:15:58.963797 scan_static_bus for USB3 port 0
966 11:15:58.966869 scan_static_bus for USB3 port 0 done
967 11:15:58.974313 scan_bus: bus USB3 port 0 finished in 6 msecs
968 11:15:58.977276 USB3 port 1 scanning...
969 11:15:58.980223 scan_static_bus for USB3 port 1
970 11:15:58.983681 scan_static_bus for USB3 port 1 done
971 11:15:58.987132 scan_bus: bus USB3 port 1 finished in 6 msecs
972 11:15:58.990073 scan_static_bus for USB0 port 0 done
973 11:15:58.996904 scan_bus: bus USB0 port 0 finished in 43 msecs
974 11:15:59.000297 scan_static_bus for PCI: 00:0d.0 done
975 11:15:59.003796 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 11:15:59.006654 PCI: 00:14.0 scanning...
977 11:15:59.009728 scan_static_bus for PCI: 00:14.0
978 11:15:59.013089 USB0 port 0 enabled
979 11:15:59.013177 USB0 port 0 scanning...
980 11:15:59.017034 scan_static_bus for USB0 port 0
981 11:15:59.019846 USB2 port 0 disabled
982 11:15:59.023436 USB2 port 1 enabled
983 11:15:59.023525 USB2 port 2 enabled
984 11:15:59.026408 USB2 port 3 disabled
985 11:15:59.029902 USB2 port 4 enabled
986 11:15:59.029990 USB2 port 5 disabled
987 11:15:59.033049 USB2 port 6 disabled
988 11:15:59.036515 USB2 port 7 disabled
989 11:15:59.036603 USB2 port 8 disabled
990 11:15:59.039956 USB2 port 9 disabled
991 11:15:59.042811 USB3 port 0 disabled
992 11:15:59.042904 USB3 port 1 enabled
993 11:15:59.046593 USB3 port 2 disabled
994 11:15:59.046682 USB3 port 3 disabled
995 11:15:59.049886 USB2 port 1 scanning...
996 11:15:59.053280 scan_static_bus for USB2 port 1
997 11:15:59.056279 scan_static_bus for USB2 port 1 done
998 11:15:59.063085 scan_bus: bus USB2 port 1 finished in 6 msecs
999 11:15:59.063176 USB2 port 2 scanning...
1000 11:15:59.066814 scan_static_bus for USB2 port 2
1001 11:15:59.073193 scan_static_bus for USB2 port 2 done
1002 11:15:59.076431 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 11:15:59.079451 USB2 port 4 scanning...
1004 11:15:59.082976 scan_static_bus for USB2 port 4
1005 11:15:59.086653 scan_static_bus for USB2 port 4 done
1006 11:15:59.089459 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 11:15:59.092580 USB3 port 1 scanning...
1008 11:15:59.096335 scan_static_bus for USB3 port 1
1009 11:15:59.099299 scan_static_bus for USB3 port 1 done
1010 11:15:59.106606 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 11:15:59.109243 scan_static_bus for USB0 port 0 done
1012 11:15:59.112557 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 11:15:59.116109 scan_static_bus for PCI: 00:14.0 done
1014 11:15:59.122609 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1015 11:15:59.122699 PCI: 00:14.3 scanning...
1016 11:15:59.126051 scan_static_bus for PCI: 00:14.3
1017 11:15:59.129221 GENERIC: 0.0 enabled
1018 11:15:59.132969 scan_static_bus for PCI: 00:14.3 done
1019 11:15:59.139102 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 11:15:59.139191 PCI: 00:15.0 scanning...
1021 11:15:59.143329 scan_static_bus for PCI: 00:15.0
1022 11:15:59.146441 I2C: 00:1a enabled
1023 11:15:59.149396 I2C: 00:31 enabled
1024 11:15:59.149486 I2C: 00:32 enabled
1025 11:15:59.152787 scan_static_bus for PCI: 00:15.0 done
1026 11:15:59.159959 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 11:15:59.163234 PCI: 00:15.1 scanning...
1028 11:15:59.166911 scan_static_bus for PCI: 00:15.1
1029 11:15:59.167006 I2C: 00:10 enabled
1030 11:15:59.169781 scan_static_bus for PCI: 00:15.1 done
1031 11:15:59.176374 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 11:15:59.176463 PCI: 00:15.2 scanning...
1033 11:15:59.179692 scan_static_bus for PCI: 00:15.2
1034 11:15:59.186654 scan_static_bus for PCI: 00:15.2 done
1035 11:15:59.190073 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 11:15:59.193444 PCI: 00:15.3 scanning...
1037 11:15:59.196708 scan_static_bus for PCI: 00:15.3
1038 11:15:59.200180 scan_static_bus for PCI: 00:15.3 done
1039 11:15:59.203096 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 11:15:59.206449 PCI: 00:19.1 scanning...
1041 11:15:59.209808 scan_static_bus for PCI: 00:19.1
1042 11:15:59.213091 I2C: 00:15 enabled
1043 11:15:59.216375 scan_static_bus for PCI: 00:19.1 done
1044 11:15:59.220563 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 11:15:59.223319 PCI: 00:1d.0 scanning...
1046 11:15:59.226755 do_pci_scan_bridge for PCI: 00:1d.0
1047 11:15:59.229600 PCI: pci_scan_bus for bus 01
1048 11:15:59.233191 PCI: 01:00.0 [1c5c/174a] enabled
1049 11:15:59.236442 GENERIC: 0.0 enabled
1050 11:15:59.239444 Enabling Common Clock Configuration
1051 11:15:59.243100 L1 Sub-State supported from root port 29
1052 11:15:59.246337 L1 Sub-State Support = 0xf
1053 11:15:59.249500 CommonModeRestoreTime = 0x28
1054 11:15:59.252676 Power On Value = 0x16, Power On Scale = 0x0
1055 11:15:59.256156 ASPM: Enabled L1
1056 11:15:59.259116 PCIe: Max_Payload_Size adjusted to 128
1057 11:15:59.265966 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 11:15:59.266056 PCI: 00:1e.2 scanning...
1059 11:15:59.272425 scan_generic_bus for PCI: 00:1e.2
1060 11:15:59.272515 SPI: 00 enabled
1061 11:15:59.279031 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 11:15:59.282590 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 11:15:59.285604 PCI: 00:1e.3 scanning...
1064 11:15:59.289009 scan_generic_bus for PCI: 00:1e.3
1065 11:15:59.292369 SPI: 00 enabled
1066 11:15:59.295734 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 11:15:59.303094 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 11:15:59.306258 PCI: 00:1f.0 scanning...
1069 11:15:59.308942 scan_static_bus for PCI: 00:1f.0
1070 11:15:59.309029 PNP: 0c09.0 enabled
1071 11:15:59.312195 PNP: 0c09.0 scanning...
1072 11:15:59.316417 scan_static_bus for PNP: 0c09.0
1073 11:15:59.318978 scan_static_bus for PNP: 0c09.0 done
1074 11:15:59.325782 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 11:15:59.328823 scan_static_bus for PCI: 00:1f.0 done
1076 11:15:59.332324 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 11:15:59.335247 PCI: 00:1f.2 scanning...
1078 11:15:59.338652 scan_static_bus for PCI: 00:1f.2
1079 11:15:59.342078 GENERIC: 0.0 enabled
1080 11:15:59.345256 GENERIC: 0.0 scanning...
1081 11:15:59.348761 scan_static_bus for GENERIC: 0.0
1082 11:15:59.348850 GENERIC: 0.0 enabled
1083 11:15:59.351760 GENERIC: 1.0 enabled
1084 11:15:59.355472 scan_static_bus for GENERIC: 0.0 done
1085 11:15:59.361796 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 11:15:59.365374 scan_static_bus for PCI: 00:1f.2 done
1087 11:15:59.368532 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 11:15:59.372930 PCI: 00:1f.3 scanning...
1089 11:15:59.375578 scan_static_bus for PCI: 00:1f.3
1090 11:15:59.378651 scan_static_bus for PCI: 00:1f.3 done
1091 11:15:59.385133 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 11:15:59.385223 PCI: 00:1f.5 scanning...
1093 11:15:59.388166 scan_generic_bus for PCI: 00:1f.5
1094 11:15:59.394731 scan_generic_bus for PCI: 00:1f.5 done
1095 11:15:59.398770 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 11:15:59.401673 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1097 11:15:59.408644 scan_static_bus for Root Device done
1098 11:15:59.411986 scan_bus: bus Root Device finished in 737 msecs
1099 11:15:59.412075 done
1100 11:15:59.418538 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1101 11:15:59.421756 Chrome EC: UHEPI supported
1102 11:15:59.428827 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 11:15:59.434801 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 11:15:59.438039 SPI flash protection: WPSW=0 SRP0=0
1105 11:15:59.441833 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 11:15:59.447708 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1107 11:15:59.451136 found VGA at PCI: 00:02.0
1108 11:15:59.455405 Setting up VGA for PCI: 00:02.0
1109 11:15:59.458099 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 11:15:59.464337 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 11:15:59.467678 Allocating resources...
1112 11:15:59.467769 Reading resources...
1113 11:15:59.474365 Root Device read_resources bus 0 link: 0
1114 11:15:59.477618 DOMAIN: 0000 read_resources bus 0 link: 0
1115 11:15:59.481055 PCI: 00:04.0 read_resources bus 1 link: 0
1116 11:15:59.488154 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 11:15:59.491585 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 11:15:59.497839 USB0 port 0 read_resources bus 0 link: 0
1119 11:15:59.501573 USB0 port 0 read_resources bus 0 link: 0 done
1120 11:15:59.507579 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 11:15:59.512302 PCI: 00:14.0 read_resources bus 0 link: 0
1122 11:15:59.514576 USB0 port 0 read_resources bus 0 link: 0
1123 11:15:59.522810 USB0 port 0 read_resources bus 0 link: 0 done
1124 11:15:59.525210 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 11:15:59.532353 PCI: 00:14.3 read_resources bus 0 link: 0
1126 11:15:59.535821 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 11:15:59.542107 PCI: 00:15.0 read_resources bus 0 link: 0
1128 11:15:59.546279 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 11:15:59.552238 PCI: 00:15.1 read_resources bus 0 link: 0
1130 11:15:59.555516 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 11:15:59.562901 PCI: 00:19.1 read_resources bus 0 link: 0
1132 11:15:59.566056 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 11:15:59.573290 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 11:15:59.576337 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 11:15:59.583066 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 11:15:59.586062 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 11:15:59.592890 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 11:15:59.596285 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 11:15:59.602897 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 11:15:59.606537 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 11:15:59.612372 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 11:15:59.616317 GENERIC: 0.0 read_resources bus 0 link: 0
1143 11:15:59.622580 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 11:15:59.625405 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 11:15:59.632132 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 11:15:59.635413 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 11:15:59.642190 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 11:15:59.645847 Root Device read_resources bus 0 link: 0 done
1149 11:15:59.648994 Done reading resources.
1150 11:15:59.655878 Show resources in subtree (Root Device)...After reading.
1151 11:15:59.658725 Root Device child on link 0 DOMAIN: 0000
1152 11:15:59.662238 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 11:15:59.672103 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 11:15:59.681825 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 11:15:59.681919 PCI: 00:00.0
1156 11:15:59.692069 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 11:15:59.702072 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 11:15:59.711638 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 11:15:59.722088 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 11:15:59.731679 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 11:15:59.741444 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 11:15:59.748522 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 11:15:59.758068 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 11:15:59.768833 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 11:15:59.778358 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 11:15:59.787951 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 11:15:59.794599 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 11:15:59.804344 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 11:15:59.814723 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 11:15:59.824918 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 11:15:59.834318 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 11:15:59.844345 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 11:15:59.854838 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 11:15:59.861293 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 11:15:59.870807 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 11:15:59.874512 PCI: 00:02.0
1177 11:15:59.884180 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 11:15:59.893763 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 11:15:59.904279 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 11:15:59.907109 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 11:15:59.917513 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 11:15:59.921205 GENERIC: 0.0
1183 11:15:59.921294 PCI: 00:05.0
1184 11:15:59.931225 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 11:15:59.934125 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 11:15:59.937234 GENERIC: 0.0
1187 11:15:59.940312 PCI: 00:08.0
1188 11:15:59.949972 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 11:15:59.950061 PCI: 00:0a.0
1190 11:15:59.953663 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 11:15:59.963389 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 11:15:59.969845 USB0 port 0 child on link 0 USB3 port 0
1193 11:15:59.969935 USB3 port 0
1194 11:15:59.973084 USB3 port 1
1195 11:15:59.973173 USB3 port 2
1196 11:15:59.976758 USB3 port 3
1197 11:15:59.979568 PCI: 00:14.0 child on link 0 USB0 port 0
1198 11:15:59.989874 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 11:15:59.996442 USB0 port 0 child on link 0 USB2 port 0
1200 11:15:59.996533 USB2 port 0
1201 11:15:59.999939 USB2 port 1
1202 11:16:00.000027 USB2 port 2
1203 11:16:00.003689 USB2 port 3
1204 11:16:00.003776 USB2 port 4
1205 11:16:00.006376 USB2 port 5
1206 11:16:00.006465 USB2 port 6
1207 11:16:00.009347 USB2 port 7
1208 11:16:00.009435 USB2 port 8
1209 11:16:00.013202 USB2 port 9
1210 11:16:00.013290 USB3 port 0
1211 11:16:00.016163 USB3 port 1
1212 11:16:00.019718 USB3 port 2
1213 11:16:00.019806 USB3 port 3
1214 11:16:00.022989 PCI: 00:14.2
1215 11:16:00.032930 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 11:16:00.042700 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 11:16:00.046319 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 11:16:00.056181 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 11:16:00.059363 GENERIC: 0.0
1220 11:16:00.062556 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 11:16:00.072805 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 11:16:00.072911 I2C: 00:1a
1223 11:16:00.075460 I2C: 00:31
1224 11:16:00.075557 I2C: 00:32
1225 11:16:00.081968 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 11:16:00.092296 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 11:16:00.092386 I2C: 00:10
1228 11:16:00.096094 PCI: 00:15.2
1229 11:16:00.105339 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 11:16:00.105430 PCI: 00:15.3
1231 11:16:00.115076 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 11:16:00.118833 PCI: 00:16.0
1233 11:16:00.128829 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 11:16:00.128920 PCI: 00:19.0
1235 11:16:00.131794 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 11:16:00.141805 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 11:16:00.144951 I2C: 00:15
1238 11:16:00.148284 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 11:16:00.158668 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 11:16:00.168243 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 11:16:00.178394 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 11:16:00.178486 GENERIC: 0.0
1243 11:16:00.181941 PCI: 01:00.0
1244 11:16:00.191355 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 11:16:00.198050 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1246 11:16:00.207835 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1247 11:16:00.211617 PCI: 00:1e.0
1248 11:16:00.221308 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 11:16:00.224454 PCI: 00:1e.2 child on link 0 SPI: 00
1250 11:16:00.234373 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 11:16:00.237957 SPI: 00
1252 11:16:00.241103 PCI: 00:1e.3 child on link 0 SPI: 00
1253 11:16:00.251104 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 11:16:00.251194 SPI: 00
1255 11:16:00.258165 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 11:16:00.264537 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 11:16:00.267320 PNP: 0c09.0
1258 11:16:00.274103 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 11:16:00.280750 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1260 11:16:00.290797 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 11:16:00.297394 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1262 11:16:00.304221 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1263 11:16:00.304313 GENERIC: 0.0
1264 11:16:00.307693 GENERIC: 1.0
1265 11:16:00.307782 PCI: 00:1f.3
1266 11:16:00.317142 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1267 11:16:00.327012 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1268 11:16:00.330478 PCI: 00:1f.5
1269 11:16:00.340339 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1270 11:16:00.343770 CPU_CLUSTER: 0 child on link 0 APIC: 00
1271 11:16:00.343861 APIC: 00
1272 11:16:00.346856 APIC: 01
1273 11:16:00.346945 APIC: 03
1274 11:16:00.350038 APIC: 05
1275 11:16:00.350135 APIC: 07
1276 11:16:00.350208 APIC: 06
1277 11:16:00.354243 APIC: 02
1278 11:16:00.354320 APIC: 04
1279 11:16:00.360149 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1280 11:16:00.366827 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1281 11:16:00.373523 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1282 11:16:00.380235 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1283 11:16:00.383446 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1284 11:16:00.386795 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1285 11:16:00.393100 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1286 11:16:00.400441 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1287 11:16:00.406463 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1288 11:16:00.413032 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1289 11:16:00.423237 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1290 11:16:00.426898 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1291 11:16:00.436552 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1292 11:16:00.443321 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1293 11:16:00.449391 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1294 11:16:00.452908 DOMAIN: 0000: Resource ranges:
1295 11:16:00.456405 * Base: 1000, Size: 800, Tag: 100
1296 11:16:00.459294 * Base: 1900, Size: e700, Tag: 100
1297 11:16:00.465992 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1298 11:16:00.472728 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1299 11:16:00.479272 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1300 11:16:00.486336 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1301 11:16:00.495654 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1302 11:16:00.502444 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1303 11:16:00.510236 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1304 11:16:00.519009 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1305 11:16:00.525873 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1306 11:16:00.532154 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1307 11:16:00.542093 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1308 11:16:00.548679 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1309 11:16:00.555440 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1310 11:16:00.565118 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1311 11:16:00.571777 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1312 11:16:00.578304 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1313 11:16:00.588972 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1314 11:16:00.595722 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1315 11:16:00.601550 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1316 11:16:00.611780 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1317 11:16:00.618410 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1318 11:16:00.624739 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1319 11:16:00.635381 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1320 11:16:00.641821 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1321 11:16:00.648161 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1322 11:16:00.651247 DOMAIN: 0000: Resource ranges:
1323 11:16:00.658255 * Base: 7fc00000, Size: 40400000, Tag: 200
1324 11:16:00.661815 * Base: d0000000, Size: 28000000, Tag: 200
1325 11:16:00.664747 * Base: fa000000, Size: 1000000, Tag: 200
1326 11:16:00.671709 * Base: fb001000, Size: 2fff000, Tag: 200
1327 11:16:00.675355 * Base: fe010000, Size: 2e000, Tag: 200
1328 11:16:00.677853 * Base: fe03f000, Size: d41000, Tag: 200
1329 11:16:00.681358 * Base: fed88000, Size: 8000, Tag: 200
1330 11:16:00.688269 * Base: fed93000, Size: d000, Tag: 200
1331 11:16:00.691107 * Base: feda2000, Size: 1e000, Tag: 200
1332 11:16:00.694674 * Base: fede0000, Size: 1220000, Tag: 200
1333 11:16:00.701992 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1334 11:16:00.707937 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1335 11:16:00.714368 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1336 11:16:00.721180 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1337 11:16:00.728370 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1338 11:16:00.734730 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1339 11:16:00.740603 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1340 11:16:00.747865 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1341 11:16:00.754121 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1342 11:16:00.760586 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1343 11:16:00.767258 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1344 11:16:00.773924 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1345 11:16:00.780618 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1346 11:16:00.786819 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1347 11:16:00.793986 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1348 11:16:00.800786 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1349 11:16:00.807307 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1350 11:16:00.813801 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1351 11:16:00.820364 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1352 11:16:00.827228 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1353 11:16:00.833189 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1354 11:16:00.839862 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1355 11:16:00.846857 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1356 11:16:00.852890 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1357 11:16:00.859796 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1358 11:16:00.862871 PCI: 00:1d.0: Resource ranges:
1359 11:16:00.869756 * Base: 7fc00000, Size: 100000, Tag: 200
1360 11:16:00.876205 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1361 11:16:00.882737 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1362 11:16:00.889878 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1363 11:16:00.896094 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1364 11:16:00.902553 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1365 11:16:00.909655 Root Device assign_resources, bus 0 link: 0
1366 11:16:00.912820 DOMAIN: 0000 assign_resources, bus 0 link: 0
1367 11:16:00.922847 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1368 11:16:00.929234 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1369 11:16:00.939241 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1370 11:16:00.946330 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1371 11:16:00.949263 PCI: 00:04.0 assign_resources, bus 1 link: 0
1372 11:16:00.956221 PCI: 00:04.0 assign_resources, bus 1 link: 0
1373 11:16:00.962292 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1374 11:16:00.972290 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1375 11:16:00.978827 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1376 11:16:00.986070 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1377 11:16:00.988878 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1378 11:16:00.998731 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1379 11:16:01.002225 PCI: 00:14.0 assign_resources, bus 0 link: 0
1380 11:16:01.006086 PCI: 00:14.0 assign_resources, bus 0 link: 0
1381 11:16:01.015294 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1382 11:16:01.021987 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1383 11:16:01.032183 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1384 11:16:01.035267 PCI: 00:14.3 assign_resources, bus 0 link: 0
1385 11:16:01.041735 PCI: 00:14.3 assign_resources, bus 0 link: 0
1386 11:16:01.048762 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1387 11:16:01.051462 PCI: 00:15.0 assign_resources, bus 0 link: 0
1388 11:16:01.058794 PCI: 00:15.0 assign_resources, bus 0 link: 0
1389 11:16:01.065218 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1390 11:16:01.071738 PCI: 00:15.1 assign_resources, bus 0 link: 0
1391 11:16:01.075047 PCI: 00:15.1 assign_resources, bus 0 link: 0
1392 11:16:01.085007 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1393 11:16:01.091168 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1394 11:16:01.101243 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1395 11:16:01.108219 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1396 11:16:01.114888 PCI: 00:19.1 assign_resources, bus 0 link: 0
1397 11:16:01.118423 PCI: 00:19.1 assign_resources, bus 0 link: 0
1398 11:16:01.128439 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1399 11:16:01.137588 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1400 11:16:01.144221 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1401 11:16:01.150659 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 11:16:01.158134 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1403 11:16:01.164320 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1404 11:16:01.173932 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1405 11:16:01.177076 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 11:16:01.187521 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1407 11:16:01.190506 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1408 11:16:01.197486 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 11:16:01.203539 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1410 11:16:01.207142 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1411 11:16:01.214290 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 11:16:01.217134 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1413 11:16:01.223283 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 11:16:01.226615 LPC: Trying to open IO window from 800 size 1ff
1415 11:16:01.236772 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1416 11:16:01.243568 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1417 11:16:01.253321 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1418 11:16:01.257489 DOMAIN: 0000 assign_resources, bus 0 link: 0
1419 11:16:01.260293 Root Device assign_resources, bus 0 link: 0
1420 11:16:01.263858 Done setting resources.
1421 11:16:01.269972 Show resources in subtree (Root Device)...After assigning values.
1422 11:16:01.273570 Root Device child on link 0 DOMAIN: 0000
1423 11:16:01.279565 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1424 11:16:01.289527 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1425 11:16:01.299856 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1426 11:16:01.299949 PCI: 00:00.0
1427 11:16:01.309730 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1428 11:16:01.319674 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1429 11:16:01.329259 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1430 11:16:01.339300 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1431 11:16:01.345876 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1432 11:16:01.356137 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1433 11:16:01.365878 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1434 11:16:01.375791 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1435 11:16:01.386275 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1436 11:16:01.393047 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1437 11:16:01.402845 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1438 11:16:01.412885 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1439 11:16:01.422204 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1440 11:16:01.432960 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1441 11:16:01.439066 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1442 11:16:01.449144 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1443 11:16:01.458652 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1444 11:16:01.468543 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1445 11:16:01.478823 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1446 11:16:01.488621 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1447 11:16:01.488712 PCI: 00:02.0
1448 11:16:01.501899 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1449 11:16:01.511898 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1450 11:16:01.522463 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1451 11:16:01.525042 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1452 11:16:01.534676 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1453 11:16:01.538106 GENERIC: 0.0
1454 11:16:01.538216 PCI: 00:05.0
1455 11:16:01.548518 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1456 11:16:01.555438 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1457 11:16:01.555530 GENERIC: 0.0
1458 11:16:01.558090 PCI: 00:08.0
1459 11:16:01.568448 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1460 11:16:01.568542 PCI: 00:0a.0
1461 11:16:01.574825 PCI: 00:0d.0 child on link 0 USB0 port 0
1462 11:16:01.585217 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1463 11:16:01.587883 USB0 port 0 child on link 0 USB3 port 0
1464 11:16:01.591239 USB3 port 0
1465 11:16:01.591329 USB3 port 1
1466 11:16:01.594911 USB3 port 2
1467 11:16:01.595001 USB3 port 3
1468 11:16:01.602051 PCI: 00:14.0 child on link 0 USB0 port 0
1469 11:16:01.611387 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1470 11:16:01.614804 USB0 port 0 child on link 0 USB2 port 0
1471 11:16:01.617853 USB2 port 0
1472 11:16:01.617943 USB2 port 1
1473 11:16:01.621048 USB2 port 2
1474 11:16:01.621138 USB2 port 3
1475 11:16:01.624428 USB2 port 4
1476 11:16:01.624517 USB2 port 5
1477 11:16:01.628622 USB2 port 6
1478 11:16:01.628711 USB2 port 7
1479 11:16:01.630869 USB2 port 8
1480 11:16:01.630959 USB2 port 9
1481 11:16:01.634314 USB3 port 0
1482 11:16:01.634402 USB3 port 1
1483 11:16:01.637603 USB3 port 2
1484 11:16:01.641025 USB3 port 3
1485 11:16:01.641129 PCI: 00:14.2
1486 11:16:01.651188 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1487 11:16:01.661015 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1488 11:16:01.667605 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1489 11:16:01.677775 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1490 11:16:01.677867 GENERIC: 0.0
1491 11:16:01.683969 PCI: 00:15.0 child on link 0 I2C: 00:1a
1492 11:16:01.693928 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1493 11:16:01.694020 I2C: 00:1a
1494 11:16:01.697768 I2C: 00:31
1495 11:16:01.697858 I2C: 00:32
1496 11:16:01.701203 PCI: 00:15.1 child on link 0 I2C: 00:10
1497 11:16:01.714076 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1498 11:16:01.714203 I2C: 00:10
1499 11:16:01.717565 PCI: 00:15.2
1500 11:16:01.727614 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1501 11:16:01.727737 PCI: 00:15.3
1502 11:16:01.737199 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1503 11:16:01.741046 PCI: 00:16.0
1504 11:16:01.750403 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1505 11:16:01.750495 PCI: 00:19.0
1506 11:16:01.757042 PCI: 00:19.1 child on link 0 I2C: 00:15
1507 11:16:01.767125 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1508 11:16:01.767254 I2C: 00:15
1509 11:16:01.773338 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1510 11:16:01.780469 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1511 11:16:01.793303 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1512 11:16:01.803057 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1513 11:16:01.806948 GENERIC: 0.0
1514 11:16:01.807066 PCI: 01:00.0
1515 11:16:01.816461 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1516 11:16:01.830324 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1517 11:16:01.839488 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1518 11:16:01.839609 PCI: 00:1e.0
1519 11:16:01.852856 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 11:16:01.855995 PCI: 00:1e.2 child on link 0 SPI: 00
1521 11:16:01.866004 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 11:16:01.866123 SPI: 00
1523 11:16:01.872848 PCI: 00:1e.3 child on link 0 SPI: 00
1524 11:16:01.882465 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 11:16:01.882584 SPI: 00
1526 11:16:01.885951 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 11:16:01.895896 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 11:16:01.896024 PNP: 0c09.0
1529 11:16:01.905732 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 11:16:01.912731 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 11:16:01.918784 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 11:16:01.928743 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 11:16:01.935460 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 11:16:01.935577 GENERIC: 0.0
1535 11:16:01.938908 GENERIC: 1.0
1536 11:16:01.939023 PCI: 00:1f.3
1537 11:16:01.948848 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 11:16:01.958404 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 11:16:01.962254 PCI: 00:1f.5
1540 11:16:01.971679 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 11:16:01.975154 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 11:16:01.978496 APIC: 00
1543 11:16:01.978611 APIC: 01
1544 11:16:01.981846 APIC: 03
1545 11:16:01.981958 APIC: 05
1546 11:16:01.982059 APIC: 07
1547 11:16:01.985045 APIC: 06
1548 11:16:01.985159 APIC: 02
1549 11:16:01.985260 APIC: 04
1550 11:16:01.988184 Done allocating resources.
1551 11:16:01.994905 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1552 11:16:02.001656 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 11:16:02.004645 Configure GPIOs for I2S audio on UP4.
1554 11:16:02.011643 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 11:16:02.015028 Enabling resources...
1556 11:16:02.019586 PCI: 00:00.0 subsystem <- 8086/9a12
1557 11:16:02.021641 PCI: 00:00.0 cmd <- 06
1558 11:16:02.025091 PCI: 00:02.0 subsystem <- 8086/9a40
1559 11:16:02.029038 PCI: 00:02.0 cmd <- 03
1560 11:16:02.031920 PCI: 00:04.0 subsystem <- 8086/9a03
1561 11:16:02.034716 PCI: 00:04.0 cmd <- 02
1562 11:16:02.038731 PCI: 00:05.0 subsystem <- 8086/9a19
1563 11:16:02.038849 PCI: 00:05.0 cmd <- 02
1564 11:16:02.044763 PCI: 00:08.0 subsystem <- 8086/9a11
1565 11:16:02.044878 PCI: 00:08.0 cmd <- 06
1566 11:16:02.048611 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 11:16:02.052162 PCI: 00:0d.0 cmd <- 02
1568 11:16:02.054700 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 11:16:02.057855 PCI: 00:14.0 cmd <- 02
1570 11:16:02.061966 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 11:16:02.064461 PCI: 00:14.2 cmd <- 02
1572 11:16:02.067856 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 11:16:02.071345 PCI: 00:14.3 cmd <- 02
1574 11:16:02.074277 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 11:16:02.077635 PCI: 00:15.0 cmd <- 02
1576 11:16:02.081096 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 11:16:02.084474 PCI: 00:15.1 cmd <- 02
1578 11:16:02.088028 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 11:16:02.090926 PCI: 00:15.2 cmd <- 02
1580 11:16:02.094027 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 11:16:02.094153 PCI: 00:15.3 cmd <- 02
1582 11:16:02.100390 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 11:16:02.100505 PCI: 00:16.0 cmd <- 02
1584 11:16:02.107476 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 11:16:02.107593 PCI: 00:19.1 cmd <- 02
1586 11:16:02.110559 PCI: 00:1d.0 bridge ctrl <- 0013
1587 11:16:02.114038 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 11:16:02.117317 PCI: 00:1d.0 cmd <- 06
1589 11:16:02.120688 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 11:16:02.123593 PCI: 00:1e.0 cmd <- 06
1591 11:16:02.127132 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 11:16:02.130249 PCI: 00:1e.2 cmd <- 06
1593 11:16:02.133281 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 11:16:02.137165 PCI: 00:1e.3 cmd <- 02
1595 11:16:02.140041 PCI: 00:1f.0 subsystem <- 8086/a087
1596 11:16:02.143976 PCI: 00:1f.0 cmd <- 407
1597 11:16:02.146897 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 11:16:02.150803 PCI: 00:1f.3 cmd <- 02
1599 11:16:02.153580 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 11:16:02.153697 PCI: 00:1f.5 cmd <- 406
1601 11:16:02.159442 PCI: 01:00.0 cmd <- 02
1602 11:16:02.163393 done.
1603 11:16:02.168026 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 11:16:02.170057 Initializing devices...
1605 11:16:02.173745 Root Device init
1606 11:16:02.177309 Chrome EC: Set SMI mask to 0x0000000000000000
1607 11:16:02.183741 Chrome EC: clear events_b mask to 0x0000000000000000
1608 11:16:02.189892 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 11:16:02.196497 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 11:16:02.203035 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 11:16:02.206102 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 11:16:02.213715 fw_config match found: DB_USB=USB3_ACTIVE
1613 11:16:02.217020 Configure Right Type-C port orientation for retimer
1614 11:16:02.220124 Root Device init finished in 45 msecs
1615 11:16:02.224491 PCI: 00:00.0 init
1616 11:16:02.227890 CPU TDP = 9 Watts
1617 11:16:02.228005 CPU PL1 = 9 Watts
1618 11:16:02.231080 CPU PL2 = 40 Watts
1619 11:16:02.234081 CPU PL4 = 83 Watts
1620 11:16:02.237809 PCI: 00:00.0 init finished in 8 msecs
1621 11:16:02.240674 PCI: 00:02.0 init
1622 11:16:02.240789 GMA: Found VBT in CBFS
1623 11:16:02.244582 GMA: Found valid VBT in CBFS
1624 11:16:02.250486 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 11:16:02.257882 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 11:16:02.260765 PCI: 00:02.0 init finished in 18 msecs
1627 11:16:02.264086 PCI: 00:05.0 init
1628 11:16:02.267169 PCI: 00:05.0 init finished in 0 msecs
1629 11:16:02.270315 PCI: 00:08.0 init
1630 11:16:02.274046 PCI: 00:08.0 init finished in 0 msecs
1631 11:16:02.277450 PCI: 00:14.0 init
1632 11:16:02.281043 PCI: 00:14.0 init finished in 0 msecs
1633 11:16:02.284452 PCI: 00:14.2 init
1634 11:16:02.287375 PCI: 00:14.2 init finished in 0 msecs
1635 11:16:02.290494 PCI: 00:15.0 init
1636 11:16:02.293977 I2C bus 0 version 0x3230302a
1637 11:16:02.296922 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 11:16:02.300849 PCI: 00:15.0 init finished in 6 msecs
1639 11:16:02.300957 PCI: 00:15.1 init
1640 11:16:02.303739 I2C bus 1 version 0x3230302a
1641 11:16:02.307034 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 11:16:02.313992 PCI: 00:15.1 init finished in 6 msecs
1643 11:16:02.314101 PCI: 00:15.2 init
1644 11:16:02.316996 I2C bus 2 version 0x3230302a
1645 11:16:02.320413 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 11:16:02.323741 PCI: 00:15.2 init finished in 6 msecs
1647 11:16:02.326890 PCI: 00:15.3 init
1648 11:16:02.330242 I2C bus 3 version 0x3230302a
1649 11:16:02.333398 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 11:16:02.337023 PCI: 00:15.3 init finished in 6 msecs
1651 11:16:02.340559 PCI: 00:16.0 init
1652 11:16:02.343991 PCI: 00:16.0 init finished in 0 msecs
1653 11:16:02.346866 PCI: 00:19.1 init
1654 11:16:02.351183 I2C bus 5 version 0x3230302a
1655 11:16:02.353483 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 11:16:02.356858 PCI: 00:19.1 init finished in 6 msecs
1657 11:16:02.360086 PCI: 00:1d.0 init
1658 11:16:02.363898 Initializing PCH PCIe bridge.
1659 11:16:02.366629 PCI: 00:1d.0 init finished in 3 msecs
1660 11:16:02.370065 PCI: 00:1f.0 init
1661 11:16:02.373508 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 11:16:02.376657 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 11:16:02.380385 IOAPIC: ID = 0x02
1664 11:16:02.383661 IOAPIC: Dumping registers
1665 11:16:02.383771 reg 0x0000: 0x02000000
1666 11:16:02.387190 reg 0x0001: 0x00770020
1667 11:16:02.390029 reg 0x0002: 0x00000000
1668 11:16:02.393411 PCI: 00:1f.0 init finished in 21 msecs
1669 11:16:02.396308 PCI: 00:1f.2 init
1670 11:16:02.400022 Disabling ACPI via APMC.
1671 11:16:02.400133 APMC done.
1672 11:16:02.403352 PCI: 00:1f.2 init finished in 5 msecs
1673 11:16:02.416708 PCI: 01:00.0 init
1674 11:16:02.420402 PCI: 01:00.0 init finished in 0 msecs
1675 11:16:02.423623 PNP: 0c09.0 init
1676 11:16:02.426960 Google Chrome EC uptime: 8.431 seconds
1677 11:16:02.433518 Google Chrome AP resets since EC boot: 1
1678 11:16:02.436638 Google Chrome most recent AP reset causes:
1679 11:16:02.440107 0.379: 32775 shutdown: entering G3
1680 11:16:02.446685 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 11:16:02.449924 PNP: 0c09.0 init finished in 22 msecs
1682 11:16:02.455431 Devices initialized
1683 11:16:02.459446 Show all devs... After init.
1684 11:16:02.462126 Root Device: enabled 1
1685 11:16:02.462279 DOMAIN: 0000: enabled 1
1686 11:16:02.466190 CPU_CLUSTER: 0: enabled 1
1687 11:16:02.469341 PCI: 00:00.0: enabled 1
1688 11:16:02.472773 PCI: 00:02.0: enabled 1
1689 11:16:02.472886 PCI: 00:04.0: enabled 1
1690 11:16:02.475998 PCI: 00:05.0: enabled 1
1691 11:16:02.479116 PCI: 00:06.0: enabled 0
1692 11:16:02.482598 PCI: 00:07.0: enabled 0
1693 11:16:02.482713 PCI: 00:07.1: enabled 0
1694 11:16:02.485387 PCI: 00:07.2: enabled 0
1695 11:16:02.488828 PCI: 00:07.3: enabled 0
1696 11:16:02.492155 PCI: 00:08.0: enabled 1
1697 11:16:02.492261 PCI: 00:09.0: enabled 0
1698 11:16:02.495989 PCI: 00:0a.0: enabled 0
1699 11:16:02.498792 PCI: 00:0d.0: enabled 1
1700 11:16:02.502118 PCI: 00:0d.1: enabled 0
1701 11:16:02.502254 PCI: 00:0d.2: enabled 0
1702 11:16:02.506215 PCI: 00:0d.3: enabled 0
1703 11:16:02.508626 PCI: 00:0e.0: enabled 0
1704 11:16:02.508732 PCI: 00:10.2: enabled 1
1705 11:16:02.512091 PCI: 00:10.6: enabled 0
1706 11:16:02.515357 PCI: 00:10.7: enabled 0
1707 11:16:02.518647 PCI: 00:12.0: enabled 0
1708 11:16:02.518754 PCI: 00:12.6: enabled 0
1709 11:16:02.521981 PCI: 00:13.0: enabled 0
1710 11:16:02.525607 PCI: 00:14.0: enabled 1
1711 11:16:02.528936 PCI: 00:14.1: enabled 0
1712 11:16:02.529046 PCI: 00:14.2: enabled 1
1713 11:16:02.532124 PCI: 00:14.3: enabled 1
1714 11:16:02.535633 PCI: 00:15.0: enabled 1
1715 11:16:02.538660 PCI: 00:15.1: enabled 1
1716 11:16:02.538770 PCI: 00:15.2: enabled 1
1717 11:16:02.542976 PCI: 00:15.3: enabled 1
1718 11:16:02.545929 PCI: 00:16.0: enabled 1
1719 11:16:02.546040 PCI: 00:16.1: enabled 0
1720 11:16:02.548414 PCI: 00:16.2: enabled 0
1721 11:16:02.551987 PCI: 00:16.3: enabled 0
1722 11:16:02.555518 PCI: 00:16.4: enabled 0
1723 11:16:02.555624 PCI: 00:16.5: enabled 0
1724 11:16:02.559560 PCI: 00:17.0: enabled 0
1725 11:16:02.561731 PCI: 00:19.0: enabled 0
1726 11:16:02.565062 PCI: 00:19.1: enabled 1
1727 11:16:02.565168 PCI: 00:19.2: enabled 0
1728 11:16:02.568361 PCI: 00:1c.0: enabled 1
1729 11:16:02.572058 PCI: 00:1c.1: enabled 0
1730 11:16:02.575686 PCI: 00:1c.2: enabled 0
1731 11:16:02.575791 PCI: 00:1c.3: enabled 0
1732 11:16:02.578497 PCI: 00:1c.4: enabled 0
1733 11:16:02.581659 PCI: 00:1c.5: enabled 0
1734 11:16:02.585857 PCI: 00:1c.6: enabled 1
1735 11:16:02.585967 PCI: 00:1c.7: enabled 0
1736 11:16:02.588322 PCI: 00:1d.0: enabled 1
1737 11:16:02.592316 PCI: 00:1d.1: enabled 0
1738 11:16:02.592421 PCI: 00:1d.2: enabled 1
1739 11:16:02.595055 PCI: 00:1d.3: enabled 0
1740 11:16:02.598639 PCI: 00:1e.0: enabled 1
1741 11:16:02.602283 PCI: 00:1e.1: enabled 0
1742 11:16:02.602390 PCI: 00:1e.2: enabled 1
1743 11:16:02.605312 PCI: 00:1e.3: enabled 1
1744 11:16:02.608166 PCI: 00:1f.0: enabled 1
1745 11:16:02.611773 PCI: 00:1f.1: enabled 0
1746 11:16:02.611886 PCI: 00:1f.2: enabled 1
1747 11:16:02.615129 PCI: 00:1f.3: enabled 1
1748 11:16:02.618496 PCI: 00:1f.4: enabled 0
1749 11:16:02.621431 PCI: 00:1f.5: enabled 1
1750 11:16:02.621535 PCI: 00:1f.6: enabled 0
1751 11:16:02.625744 PCI: 00:1f.7: enabled 0
1752 11:16:02.628348 APIC: 00: enabled 1
1753 11:16:02.628456 GENERIC: 0.0: enabled 1
1754 11:16:02.631644 GENERIC: 0.0: enabled 1
1755 11:16:02.635179 GENERIC: 1.0: enabled 1
1756 11:16:02.638217 GENERIC: 0.0: enabled 1
1757 11:16:02.638326 GENERIC: 1.0: enabled 1
1758 11:16:02.641489 USB0 port 0: enabled 1
1759 11:16:02.645690 GENERIC: 0.0: enabled 1
1760 11:16:02.645803 USB0 port 0: enabled 1
1761 11:16:02.648257 GENERIC: 0.0: enabled 1
1762 11:16:02.651893 I2C: 00:1a: enabled 1
1763 11:16:02.654589 I2C: 00:31: enabled 1
1764 11:16:02.654699 I2C: 00:32: enabled 1
1765 11:16:02.657998 I2C: 00:10: enabled 1
1766 11:16:02.661217 I2C: 00:15: enabled 1
1767 11:16:02.661328 GENERIC: 0.0: enabled 0
1768 11:16:02.664510 GENERIC: 1.0: enabled 0
1769 11:16:02.667854 GENERIC: 0.0: enabled 1
1770 11:16:02.667960 SPI: 00: enabled 1
1771 11:16:02.671473 SPI: 00: enabled 1
1772 11:16:02.674729 PNP: 0c09.0: enabled 1
1773 11:16:02.674835 GENERIC: 0.0: enabled 1
1774 11:16:02.678023 USB3 port 0: enabled 1
1775 11:16:02.681224 USB3 port 1: enabled 1
1776 11:16:02.684519 USB3 port 2: enabled 0
1777 11:16:02.684629 USB3 port 3: enabled 0
1778 11:16:02.687987 USB2 port 0: enabled 0
1779 11:16:02.691582 USB2 port 1: enabled 1
1780 11:16:02.691700 USB2 port 2: enabled 1
1781 11:16:02.694591 USB2 port 3: enabled 0
1782 11:16:02.697908 USB2 port 4: enabled 1
1783 11:16:02.700660 USB2 port 5: enabled 0
1784 11:16:02.700774 USB2 port 6: enabled 0
1785 11:16:02.703999 USB2 port 7: enabled 0
1786 11:16:02.707538 USB2 port 8: enabled 0
1787 11:16:02.707653 USB2 port 9: enabled 0
1788 11:16:02.710904 USB3 port 0: enabled 0
1789 11:16:02.713942 USB3 port 1: enabled 1
1790 11:16:02.718222 USB3 port 2: enabled 0
1791 11:16:02.718334 USB3 port 3: enabled 0
1792 11:16:02.720624 GENERIC: 0.0: enabled 1
1793 11:16:02.723965 GENERIC: 1.0: enabled 1
1794 11:16:02.724069 APIC: 01: enabled 1
1795 11:16:02.727576 APIC: 03: enabled 1
1796 11:16:02.730698 APIC: 05: enabled 1
1797 11:16:02.730801 APIC: 07: enabled 1
1798 11:16:02.734765 APIC: 06: enabled 1
1799 11:16:02.734864 APIC: 02: enabled 1
1800 11:16:02.737165 APIC: 04: enabled 1
1801 11:16:02.741078 PCI: 01:00.0: enabled 1
1802 11:16:02.743836 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1803 11:16:02.750718 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 11:16:02.754029 ELOG: NV offset 0xf30000 size 0x1000
1805 11:16:02.761173 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 11:16:02.767772 ELOG: Event(17) added with size 13 at 2023-02-06 11:16:02 UTC
1807 11:16:02.774296 ELOG: Event(92) added with size 9 at 2023-02-06 11:16:02 UTC
1808 11:16:02.780984 ELOG: Event(93) added with size 9 at 2023-02-06 11:16:02 UTC
1809 11:16:02.787328 ELOG: Event(9E) added with size 10 at 2023-02-06 11:16:02 UTC
1810 11:16:02.794348 ELOG: Event(9F) added with size 14 at 2023-02-06 11:16:02 UTC
1811 11:16:02.800431 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 11:16:02.807458 ELOG: Event(A1) added with size 10 at 2023-02-06 11:16:02 UTC
1813 11:16:02.810534 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1814 11:16:02.817010 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1815 11:16:02.820385 Finalize devices...
1816 11:16:02.820492 Devices finalized
1817 11:16:02.827154 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1818 11:16:02.833308 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1819 11:16:02.836729 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1820 11:16:02.843647 ME: HFSTS1 : 0x80030055
1821 11:16:02.846632 ME: HFSTS2 : 0x30280116
1822 11:16:02.853179 ME: HFSTS3 : 0x00000050
1823 11:16:02.856665 ME: HFSTS4 : 0x00004000
1824 11:16:02.860620 ME: HFSTS5 : 0x00000000
1825 11:16:02.866218 ME: HFSTS6 : 0x00400006
1826 11:16:02.869822 ME: Manufacturing Mode : YES
1827 11:16:02.872837 ME: SPI Protection Mode Enabled : NO
1828 11:16:02.876618 ME: FW Partition Table : OK
1829 11:16:02.879553 ME: Bringup Loader Failure : NO
1830 11:16:02.883092 ME: Firmware Init Complete : NO
1831 11:16:02.886002 ME: Boot Options Present : NO
1832 11:16:02.893210 ME: Update In Progress : NO
1833 11:16:02.895948 ME: D0i3 Support : YES
1834 11:16:02.899683 ME: Low Power State Enabled : NO
1835 11:16:02.902641 ME: CPU Replaced : YES
1836 11:16:02.906140 ME: CPU Replacement Valid : YES
1837 11:16:02.909367 ME: Current Working State : 5
1838 11:16:02.912484 ME: Current Operation State : 1
1839 11:16:02.915807 ME: Current Operation Mode : 3
1840 11:16:02.919035 ME: Error Code : 0
1841 11:16:02.925748 ME: Enhanced Debug Mode : NO
1842 11:16:02.929041 ME: CPU Debug Disabled : YES
1843 11:16:02.932504 ME: TXT Support : NO
1844 11:16:02.938968 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1845 11:16:02.945698 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1846 11:16:02.948683 CBFS: 'fallback/slic' not found.
1847 11:16:02.952190 ACPI: Writing ACPI tables at 76b01000.
1848 11:16:02.956094 ACPI: * FACS
1849 11:16:02.956202 ACPI: * DSDT
1850 11:16:02.959001 Ramoops buffer: 0x100000@0x76a00000.
1851 11:16:02.965305 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1852 11:16:02.968405 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1853 11:16:02.972703 Google Chrome EC: version:
1854 11:16:02.975963 ro: voema_v2.0.7540-147f8d37d1
1855 11:16:02.979431 rw: voema_v2.0.7540-147f8d37d1
1856 11:16:02.982790 running image: 2
1857 11:16:02.989958 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1858 11:16:02.992160 ACPI: * FADT
1859 11:16:02.992270 SCI is IRQ9
1860 11:16:02.995911 ACPI: added table 1/32, length now 40
1861 11:16:02.999561 ACPI: * SSDT
1862 11:16:03.002260 Found 1 CPU(s) with 8 core(s) each.
1863 11:16:03.009014 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1864 11:16:03.012381 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1865 11:16:03.015756 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1866 11:16:03.019439 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1867 11:16:03.025466 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1868 11:16:03.033175 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1869 11:16:03.035359 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1870 11:16:03.042070 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1871 11:16:03.049112 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1872 11:16:03.052595 \_SB.PCI0.RP09: Added StorageD3Enable property
1873 11:16:03.055773 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1874 11:16:03.061904 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1875 11:16:03.068417 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1876 11:16:03.071797 PS2K: Passing 80 keymaps to kernel
1877 11:16:03.078441 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1878 11:16:03.085352 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1879 11:16:03.092079 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1880 11:16:03.098941 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1881 11:16:03.105066 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1882 11:16:03.111947 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1883 11:16:03.115293 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1884 11:16:03.121763 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1885 11:16:03.128855 ACPI: added table 2/32, length now 44
1886 11:16:03.128968 ACPI: * MCFG
1887 11:16:03.131736 ACPI: added table 3/32, length now 48
1888 11:16:03.135391 ACPI: * TPM2
1889 11:16:03.138955 TPM2 log created at 0x769f0000
1890 11:16:03.142053 ACPI: added table 4/32, length now 52
1891 11:16:03.142196 ACPI: * MADT
1892 11:16:03.144849 SCI is IRQ9
1893 11:16:03.148203 ACPI: added table 5/32, length now 56
1894 11:16:03.148310 current = 76b09850
1895 11:16:03.151612 ACPI: * DMAR
1896 11:16:03.155106 ACPI: added table 6/32, length now 60
1897 11:16:03.158570 ACPI: added table 7/32, length now 64
1898 11:16:03.161410 ACPI: * HPET
1899 11:16:03.164996 ACPI: added table 8/32, length now 68
1900 11:16:03.165103 ACPI: done.
1901 11:16:03.168512 ACPI tables: 35216 bytes.
1902 11:16:03.171978 smbios_write_tables: 769ef000
1903 11:16:03.174796 EC returned error result code 3
1904 11:16:03.178651 Couldn't obtain OEM name from CBI
1905 11:16:03.181399 Create SMBIOS type 16
1906 11:16:03.184807 Create SMBIOS type 17
1907 11:16:03.184913 GENERIC: 0.0 (WIFI Device)
1908 11:16:03.187813 SMBIOS tables: 1750 bytes.
1909 11:16:03.194762 Writing table forward entry at 0x00000500
1910 11:16:03.198031 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1911 11:16:03.204377 Writing coreboot table at 0x76b25000
1912 11:16:03.207823 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1913 11:16:03.214355 1. 0000000000001000-000000000009ffff: RAM
1914 11:16:03.218292 2. 00000000000a0000-00000000000fffff: RESERVED
1915 11:16:03.221372 3. 0000000000100000-00000000769eefff: RAM
1916 11:16:03.227715 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1917 11:16:03.234607 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1918 11:16:03.237923 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1919 11:16:03.245002 7. 0000000077000000-000000007fbfffff: RESERVED
1920 11:16:03.247767 8. 00000000c0000000-00000000cfffffff: RESERVED
1921 11:16:03.255260 9. 00000000f8000000-00000000f9ffffff: RESERVED
1922 11:16:03.257508 10. 00000000fb000000-00000000fb000fff: RESERVED
1923 11:16:03.264623 11. 00000000fe000000-00000000fe00ffff: RESERVED
1924 11:16:03.267958 12. 00000000fed80000-00000000fed87fff: RESERVED
1925 11:16:03.271090 13. 00000000fed90000-00000000fed92fff: RESERVED
1926 11:16:03.278254 14. 00000000feda0000-00000000feda1fff: RESERVED
1927 11:16:03.280814 15. 00000000fedc0000-00000000feddffff: RESERVED
1928 11:16:03.287757 16. 0000000100000000-00000002803fffff: RAM
1929 11:16:03.290585 Passing 4 GPIOs to payload:
1930 11:16:03.294038 NAME | PORT | POLARITY | VALUE
1931 11:16:03.300571 lid | undefined | high | high
1932 11:16:03.304082 power | undefined | high | low
1933 11:16:03.311308 oprom | undefined | high | low
1934 11:16:03.317031 EC in RW | 0x000000e5 | high | high
1935 11:16:03.320898 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 628f
1936 11:16:03.324256 coreboot table: 1576 bytes.
1937 11:16:03.327423 IMD ROOT 0. 0x76fff000 0x00001000
1938 11:16:03.334096 IMD SMALL 1. 0x76ffe000 0x00001000
1939 11:16:03.337425 FSP MEMORY 2. 0x76c4e000 0x003b0000
1940 11:16:03.340581 VPD 3. 0x76c4d000 0x00000367
1941 11:16:03.343871 RO MCACHE 4. 0x76c4c000 0x00000fdc
1942 11:16:03.347983 CONSOLE 5. 0x76c2c000 0x00020000
1943 11:16:03.350566 FMAP 6. 0x76c2b000 0x00000578
1944 11:16:03.354404 TIME STAMP 7. 0x76c2a000 0x00000910
1945 11:16:03.357355 VBOOT WORK 8. 0x76c16000 0x00014000
1946 11:16:03.363896 ROMSTG STCK 9. 0x76c15000 0x00001000
1947 11:16:03.366804 AFTER CAR 10. 0x76c0a000 0x0000b000
1948 11:16:03.370084 RAMSTAGE 11. 0x76b97000 0x00073000
1949 11:16:03.373376 REFCODE 12. 0x76b42000 0x00055000
1950 11:16:03.376821 SMM BACKUP 13. 0x76b32000 0x00010000
1951 11:16:03.380523 4f444749 14. 0x76b30000 0x00002000
1952 11:16:03.383926 EXT VBT15. 0x76b2d000 0x0000219f
1953 11:16:03.386702 COREBOOT 16. 0x76b25000 0x00008000
1954 11:16:03.390261 ACPI 17. 0x76b01000 0x00024000
1955 11:16:03.396513 ACPI GNVS 18. 0x76b00000 0x00001000
1956 11:16:03.401107 RAMOOPS 19. 0x76a00000 0x00100000
1957 11:16:03.403369 TPM2 TCGLOG20. 0x769f0000 0x00010000
1958 11:16:03.406946 SMBIOS 21. 0x769ef000 0x00000800
1959 11:16:03.410108 IMD small region:
1960 11:16:03.413280 IMD ROOT 0. 0x76ffec00 0x00000400
1961 11:16:03.416864 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1962 11:16:03.419746 POWER STATE 2. 0x76ffeb80 0x00000044
1963 11:16:03.423348 ROMSTAGE 3. 0x76ffeb60 0x00000004
1964 11:16:03.426355 MEM INFO 4. 0x76ffe980 0x000001e0
1965 11:16:03.433397 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1966 11:16:03.436803 MTRR: Physical address space:
1967 11:16:03.442938 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1968 11:16:03.449955 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1969 11:16:03.456043 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1970 11:16:03.463202 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1971 11:16:03.469593 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1972 11:16:03.473184 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1973 11:16:03.479868 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1974 11:16:03.486351 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 11:16:03.489396 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 11:16:03.492832 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 11:16:03.495866 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 11:16:03.503025 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 11:16:03.506039 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 11:16:03.509457 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 11:16:03.512363 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 11:16:03.519033 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 11:16:03.522051 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 11:16:03.525658 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 11:16:03.529239 call enable_fixed_mtrr()
1986 11:16:03.532347 CPU physical address size: 39 bits
1987 11:16:03.539120 MTRR: default type WB/UC MTRR counts: 6/6.
1988 11:16:03.542124 MTRR: UC selected as default type.
1989 11:16:03.546008 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1990 11:16:03.552437 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1991 11:16:03.559209 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1992 11:16:03.565217 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1993 11:16:03.571734 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1994 11:16:03.579081 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1995 11:16:03.585294 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 11:16:03.588274 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 11:16:03.591798 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 11:16:03.595128 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 11:16:03.602362 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 11:16:03.605002 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 11:16:03.608886 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 11:16:03.612078 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 11:16:03.615042 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 11:16:03.621943 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 11:16:03.624770 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 11:16:03.624858
2007 11:16:03.628147 MTRR check
2008 11:16:03.628237 Fixed MTRRs : Enabled
2009 11:16:03.631745 Variable MTRRs: Enabled
2010 11:16:03.631834
2011 11:16:03.634565 call enable_fixed_mtrr()
2012 11:16:03.641411 BS: BS_WRITE_TABLES exit times (exec / console): 48 / 151 ms
2013 11:16:03.645460 CPU physical address size: 39 bits
2014 11:16:03.649949 Checking cr50 for pending updates
2015 11:16:03.653009 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 11:16:03.656291 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 11:16:03.663018 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 11:16:03.666030 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 11:16:03.669072 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 11:16:03.672766 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 11:16:03.676230 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 11:16:03.682658 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 11:16:03.686020 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 11:16:03.688972 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 11:16:03.692904 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 11:16:03.698958 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 11:16:03.702419 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 11:16:03.705291 call enable_fixed_mtrr()
2029 11:16:03.708976 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 11:16:03.712034 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 11:16:03.718896 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 11:16:03.721990 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 11:16:03.725496 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 11:16:03.729494 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 11:16:03.735135 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 11:16:03.738906 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 11:16:03.742111 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 11:16:03.745626 CPU physical address size: 39 bits
2039 11:16:03.752305 call enable_fixed_mtrr()
2040 11:16:03.756229 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 11:16:03.759477 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 11:16:03.761953 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 11:16:03.768446 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 11:16:03.771984 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 11:16:03.775660 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 11:16:03.778907 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 11:16:03.782014 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 11:16:03.788699 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 11:16:03.791948 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 11:16:03.795949 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 11:16:03.798379 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 11:16:03.806189 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 11:16:03.806277 call enable_fixed_mtrr()
2054 11:16:03.812742 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 11:16:03.815907 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 11:16:03.819364 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 11:16:03.822965 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 11:16:03.829516 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 11:16:03.832967 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 11:16:03.835911 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 11:16:03.840076 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 11:16:03.845871 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 11:16:03.849208 CPU physical address size: 39 bits
2064 11:16:03.852780 call enable_fixed_mtrr()
2065 11:16:03.855984 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 11:16:03.859883 MTRR: Fixed MSR 0x250 0x0606060606060606
2067 11:16:03.865912 MTRR: Fixed MSR 0x258 0x0606060606060606
2068 11:16:03.869359 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 11:16:03.872375 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 11:16:03.875577 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 11:16:03.882506 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 11:16:03.885722 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 11:16:03.889006 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 11:16:03.892213 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 11:16:03.899037 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 11:16:03.902622 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 11:16:03.905410 MTRR: Fixed MSR 0x258 0x0606060606060606
2078 11:16:03.908797 call enable_fixed_mtrr()
2079 11:16:03.912673 MTRR: Fixed MSR 0x259 0x0000000000000000
2080 11:16:03.918654 MTRR: Fixed MSR 0x268 0x0606060606060606
2081 11:16:03.922237 MTRR: Fixed MSR 0x269 0x0606060606060606
2082 11:16:03.925443 MTRR: Fixed MSR 0x26a 0x0606060606060606
2083 11:16:03.928735 MTRR: Fixed MSR 0x26b 0x0606060606060606
2084 11:16:03.935233 MTRR: Fixed MSR 0x26c 0x0606060606060606
2085 11:16:03.938597 MTRR: Fixed MSR 0x26d 0x0606060606060606
2086 11:16:03.941863 MTRR: Fixed MSR 0x26e 0x0606060606060606
2087 11:16:03.945534 MTRR: Fixed MSR 0x26f 0x0606060606060606
2088 11:16:03.949389 CPU physical address size: 39 bits
2089 11:16:03.956627 call enable_fixed_mtrr()
2090 11:16:03.956715 Reading cr50 TPM mode
2091 11:16:03.959921 CPU physical address size: 39 bits
2092 11:16:03.963225 CPU physical address size: 39 bits
2093 11:16:03.966362 CPU physical address size: 39 bits
2094 11:16:03.973146 BS: BS_PAYLOAD_LOAD entry times (exec / console): 314 / 7 ms
2095 11:16:03.979891 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2096 11:16:03.986238 Checking segment from ROM address 0xffc02b38
2097 11:16:03.990017 Checking segment from ROM address 0xffc02b54
2098 11:16:03.993028 Loading segment from ROM address 0xffc02b38
2099 11:16:03.996646 code (compression=0)
2100 11:16:04.006390 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2101 11:16:04.012688 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2102 11:16:04.016117 it's not compressed!
2103 11:16:04.155041 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2104 11:16:04.161594 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2105 11:16:04.168389 Loading segment from ROM address 0xffc02b54
2106 11:16:04.168479 Entry Point 0x30000000
2107 11:16:04.171213 Loaded segments
2108 11:16:04.178054 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2109 11:16:04.220732 Finalizing chipset.
2110 11:16:04.224143 Finalizing SMM.
2111 11:16:04.224235 APMC done.
2112 11:16:04.230806 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2113 11:16:04.234461 mp_park_aps done after 0 msecs.
2114 11:16:04.237106 Jumping to boot code at 0x30000000(0x76b25000)
2115 11:16:04.247934 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2116 11:16:04.248025
2117 11:16:04.248100
2118 11:16:04.250638
2119 11:16:04.250730 Starting depthcharge on Voema...
2120 11:16:04.251067 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2121 11:16:04.251169 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2122 11:16:04.251255 Setting prompt string to ['volteer:']
2123 11:16:04.251337 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2124 11:16:04.254416
2125 11:16:04.260542 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2126 11:16:04.260632
2127 11:16:04.267087 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2128 11:16:04.267177
2129 11:16:04.273453 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2130 11:16:04.273543
2131 11:16:04.277023 Failed to find eMMC card reader
2132 11:16:04.277120
2133 11:16:04.277191 Wipe memory regions:
2134 11:16:04.281753
2135 11:16:04.283477 [0x00000000001000, 0x000000000a0000)
2136 11:16:04.283565
2137 11:16:04.287063 [0x00000000100000, 0x00000030000000)
2138 11:16:04.312671
2139 11:16:04.315849 [0x00000032662db0, 0x000000769ef000)
2140 11:16:04.351309
2141 11:16:04.354792 [0x00000100000000, 0x00000280400000)
2142 11:16:04.555488
2143 11:16:04.558864 ec_init: CrosEC protocol v3 supported (256, 256)
2144 11:16:04.558959
2145 11:16:04.565306 update_port_state: port C0 state: usb enable 1 mux conn 0
2146 11:16:04.565397
2147 11:16:04.572041 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2148 11:16:04.575196
2149 11:16:04.578234 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2150 11:16:04.578322
2151 11:16:04.584721 send_conn_disc_msg: pmc_send_cmd succeeded
2152 11:16:05.014710
2153 11:16:05.014864 R8152: Initializing
2154 11:16:05.014933
2155 11:16:05.018045 Version 6 (ocp_data = 5c30)
2156 11:16:05.018154
2157 11:16:05.021343 R8152: Done initializing
2158 11:16:05.021430
2159 11:16:05.024686 Adding net device
2160 11:16:05.325811
2161 11:16:05.329502 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2162 11:16:05.329596
2163 11:16:05.329667
2164 11:16:05.329733
2165 11:16:05.332536 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2167 11:16:05.433264 volteer: tftpboot 192.168.201.1 9033931/tftp-deploy-cs3pjyhe/kernel/bzImage 9033931/tftp-deploy-cs3pjyhe/kernel/cmdline 9033931/tftp-deploy-cs3pjyhe/ramdisk/ramdisk.cpio.gz
2168 11:16:05.433400 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2169 11:16:05.433484 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2170 11:16:05.437970 tftpboot 192.168.201.1 9033931/tftp-deploy-cs3pjyhe/kernel/bzImoy-cs3pjyhe/kernel/cmdline 9033931/tftp-deploy-cs3pjyhe/ramdisk/ramdisk.cpio.gz
2171 11:16:05.438062
2172 11:16:05.438139 Waiting for link
2173 11:16:05.640975
2174 11:16:05.641132 done.
2175 11:16:05.641203
2176 11:16:05.641268 MAC: 00:24:32:30:7b:ec
2177 11:16:05.641332
2178 11:16:05.644183 Sending DHCP discover... done.
2179 11:16:05.644273
2180 11:16:05.647680 Waiting for reply... done.
2181 11:16:05.647769
2182 11:16:05.650619 Sending DHCP request... done.
2183 11:16:05.650709
2184 11:16:05.653768 Waiting for reply... done.
2185 11:16:05.653856
2186 11:16:05.657509 My ip is 192.168.201.11
2187 11:16:05.657597
2188 11:16:05.660510 The DHCP server ip is 192.168.201.1
2189 11:16:05.660599
2190 11:16:05.667248 TFTP server IP predefined by user: 192.168.201.1
2191 11:16:05.667337
2192 11:16:05.673486 Bootfile predefined by user: 9033931/tftp-deploy-cs3pjyhe/kernel/bzImage
2193 11:16:05.673578
2194 11:16:05.677148 Sending tftp read request... done.
2195 11:16:05.677238
2196 11:16:05.679958 Waiting for the transfer...
2197 11:16:05.680063
2198 11:16:06.271405 00000000 ################################################################
2199 11:16:06.271564
2200 11:16:06.851442 00080000 ################################################################
2201 11:16:06.851605
2202 11:16:07.422671 00100000 ################################################################
2203 11:16:07.422833
2204 11:16:07.947619 00180000 ################################################################
2205 11:16:07.947758
2206 11:16:08.480621 00200000 ################################################################
2207 11:16:08.480780
2208 11:16:09.014719 00280000 ################################################################
2209 11:16:09.014874
2210 11:16:09.564953 00300000 ################################################################
2211 11:16:09.565116
2212 11:16:10.125778 00380000 ################################################################
2213 11:16:10.125922
2214 11:16:10.662559 00400000 ################################################################
2215 11:16:10.662704
2216 11:16:11.193183 00480000 ################################################################
2217 11:16:11.193335
2218 11:16:11.729183 00500000 ################################################################
2219 11:16:11.729331
2220 11:16:12.291965 00580000 ################################################################
2221 11:16:12.292118
2222 11:16:12.859342 00600000 ################################################################
2223 11:16:12.859499
2224 11:16:13.423763 00680000 ################################################################
2225 11:16:13.423910
2226 11:16:13.980912 00700000 ################################################################
2227 11:16:13.981108
2228 11:16:14.616030 00780000 ################################################################
2229 11:16:14.616628
2230 11:16:15.324228 00800000 ################################################################
2231 11:16:15.324815
2232 11:16:16.021260 00880000 ################################################################
2233 11:16:16.021796
2234 11:16:16.383454 00900000 ################################## done.
2235 11:16:16.384025
2236 11:16:16.386843 The bootfile was 9707520 bytes long.
2237 11:16:16.387349
2238 11:16:16.390319 Sending tftp read request... done.
2239 11:16:16.390824
2240 11:16:16.392945 Waiting for the transfer...
2241 11:16:16.393439
2242 11:16:17.041581 00000000 ################################################################
2243 11:16:17.042108
2244 11:16:17.711669 00080000 ################################################################
2245 11:16:17.712217
2246 11:16:18.328200 00100000 ################################################################
2247 11:16:18.328346
2248 11:16:19.002769 00180000 ################################################################
2249 11:16:19.003314
2250 11:16:19.685490 00200000 ################################################################
2251 11:16:19.686029
2252 11:16:20.355221 00280000 ################################################################
2253 11:16:20.355362
2254 11:16:20.969989 00300000 ################################################################
2255 11:16:20.970140
2256 11:16:21.572901 00380000 ################################################################
2257 11:16:21.573041
2258 11:16:22.180914 00400000 ################################################################
2259 11:16:22.181055
2260 11:16:22.768445 00480000 ################################################################
2261 11:16:22.768582
2262 11:16:23.094964 00500000 ################################### done.
2263 11:16:23.095489
2264 11:16:23.098311 Sending tftp read request... done.
2265 11:16:23.098783
2266 11:16:23.101670 Waiting for the transfer...
2267 11:16:23.102122
2268 11:16:23.102538 00000000 # done.
2269 11:16:23.102890
2270 11:16:23.111507 Command line loaded dynamically from TFTP file: 9033931/tftp-deploy-cs3pjyhe/kernel/cmdline
2271 11:16:23.111962
2272 11:16:23.131343 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9033931/extract-nfsrootfs-r4fytwwa,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2273 11:16:23.134490
2274 11:16:23.138199 Shutting down all USB controllers.
2275 11:16:23.138718
2276 11:16:23.139077 Removing current net device
2277 11:16:23.139416
2278 11:16:23.141066 Finalizing coreboot
2279 11:16:23.141523
2280 11:16:23.147787 Exiting depthcharge with code 4 at timestamp: 27531776
2281 11:16:23.148247
2282 11:16:23.148612
2283 11:16:23.148956 Starting kernel ...
2284 11:16:23.149290
2285 11:16:23.149612
2286 11:16:23.151079 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2287 11:16:23.151599 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2288 11:16:23.151989 Setting prompt string to ['Linux version [0-9]']
2289 11:16:23.152358 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2290 11:16:23.152720 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2292 11:20:46.152543 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2294 11:20:46.153709 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2296 11:20:46.154629 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2299 11:20:46.156452 end: 2 depthcharge-action (duration 00:05:00) [common]
2301 11:20:46.157615 Cleaning after the job
2302 11:20:46.157704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/ramdisk
2303 11:20:46.158175 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/kernel
2304 11:20:46.158855 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/nfsrootfs
2305 11:20:46.190336 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9033931/tftp-deploy-cs3pjyhe/modules
2306 11:20:46.190654 start: 5.1 power-off (timeout 00:00:30) [common]
2307 11:20:46.190818 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2308 11:20:48.365971 >> Command sent successfully.
2309 11:20:48.371627 Returned 0 in 2 seconds
2310 11:20:48.473100 end: 5.1 power-off (duration 00:00:02) [common]
2312 11:20:48.474944 start: 5.2 read-feedback (timeout 00:09:58) [common]
2313 11:20:48.476152 Listened to connection for namespace 'common' for up to 1s
2314 11:20:49.478560 Finalising connection for namespace 'common'
2315 11:20:49.479266 Disconnecting from shell: Finalise
2316 11:20:49.479725
2317 11:20:49.581151 end: 5.2 read-feedback (duration 00:00:01) [common]
2318 11:20:49.582731 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9033931
2319 11:20:49.675358 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9033931
2320 11:20:49.675555 JobError: Your job cannot terminate cleanly.