Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 19:04:34.045881 lava-dispatcher, installed at version: 2022.11
2 19:04:34.046076 start: 0 validate
3 19:04:34.046253 Start time: 2023-02-22 19:04:34.046244+00:00 (UTC)
4 19:04:34.046387 Using caching service: 'http://localhost/cache/?uri=%s'
5 19:04:34.046523 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230217.0%2Fx86%2Frootfs.cpio.gz exists
6 19:04:34.340464 Using caching service: 'http://localhost/cache/?uri=%s'
7 19:04:34.341188 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.272-cip91-91-gb4755c11cb57%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 19:04:34.629156 Using caching service: 'http://localhost/cache/?uri=%s'
9 19:04:34.629903 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.272-cip91-91-gb4755c11cb57%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 19:04:34.930987 validate duration: 0.88
12 19:04:34.932309 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 19:04:34.932865 start: 1.1 download-retry (timeout 00:10:00) [common]
14 19:04:34.933509 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 19:04:34.934040 Not decompressing ramdisk as can be used compressed.
16 19:04:34.934933 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230217.0/x86/rootfs.cpio.gz
17 19:04:34.935307 saving as /var/lib/lava/dispatcher/tmp/9284148/tftp-deploy-y10xk97s/ramdisk/rootfs.cpio.gz
18 19:04:34.935644 total size: 8423658 (8MB)
19 19:04:34.941106 progress 0% (0MB)
20 19:04:34.951177 progress 5% (0MB)
21 19:04:34.960461 progress 10% (0MB)
22 19:04:34.966926 progress 15% (1MB)
23 19:04:34.969878 progress 20% (1MB)
24 19:04:34.971922 progress 25% (2MB)
25 19:04:34.973996 progress 30% (2MB)
26 19:04:34.980937 progress 35% (2MB)
27 19:04:34.985765 progress 40% (3MB)
28 19:04:34.991205 progress 45% (3MB)
29 19:04:35.001127 progress 50% (4MB)
30 19:04:35.009000 progress 55% (4MB)
31 19:04:35.015395 progress 60% (4MB)
32 19:04:35.020472 progress 65% (5MB)
33 19:04:35.025598 progress 70% (5MB)
34 19:04:35.034929 progress 75% (6MB)
35 19:04:35.039199 progress 80% (6MB)
36 19:04:35.044757 progress 85% (6MB)
37 19:04:35.050262 progress 90% (7MB)
38 19:04:35.056699 progress 95% (7MB)
39 19:04:35.061800 progress 100% (8MB)
40 19:04:35.061977 8MB downloaded in 0.13s (63.59MB/s)
41 19:04:35.062140 end: 1.1.1 http-download (duration 00:00:00) [common]
43 19:04:35.062396 end: 1.1 download-retry (duration 00:00:00) [common]
44 19:04:35.062487 start: 1.2 download-retry (timeout 00:10:00) [common]
45 19:04:35.062576 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 19:04:35.062684 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.272-cip91-91-gb4755c11cb57/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 19:04:35.062754 saving as /var/lib/lava/dispatcher/tmp/9284148/tftp-deploy-y10xk97s/kernel/bzImage
48 19:04:35.062818 total size: 9711616 (9MB)
49 19:04:35.062879 No compression specified
50 19:04:35.064984 progress 0% (0MB)
51 19:04:35.075198 progress 5% (0MB)
52 19:04:35.083431 progress 10% (0MB)
53 19:04:35.089394 progress 15% (1MB)
54 19:04:35.096331 progress 20% (1MB)
55 19:04:35.105987 progress 25% (2MB)
56 19:04:35.111220 progress 30% (2MB)
57 19:04:35.117513 progress 35% (3MB)
58 19:04:35.125839 progress 40% (3MB)
59 19:04:35.131013 progress 45% (4MB)
60 19:04:35.139508 progress 50% (4MB)
61 19:04:35.150240 progress 55% (5MB)
62 19:04:35.157908 progress 60% (5MB)
63 19:04:35.164770 progress 65% (6MB)
64 19:04:35.171680 progress 70% (6MB)
65 19:04:35.179954 progress 75% (6MB)
66 19:04:35.186730 progress 80% (7MB)
67 19:04:35.192716 progress 85% (7MB)
68 19:04:35.200335 progress 90% (8MB)
69 19:04:35.206955 progress 95% (8MB)
70 19:04:35.216218 progress 100% (9MB)
71 19:04:35.216476 9MB downloaded in 0.15s (60.28MB/s)
72 19:04:35.216631 end: 1.2.1 http-download (duration 00:00:00) [common]
74 19:04:35.216873 end: 1.2 download-retry (duration 00:00:00) [common]
75 19:04:35.216963 start: 1.3 download-retry (timeout 00:10:00) [common]
76 19:04:35.217051 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 19:04:35.217156 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.272-cip91-91-gb4755c11cb57/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 19:04:35.217224 saving as /var/lib/lava/dispatcher/tmp/9284148/tftp-deploy-y10xk97s/modules/modules.tar
79 19:04:35.217287 total size: 64612 (0MB)
80 19:04:35.217349 Using unxz to decompress xz
81 19:04:35.221593 progress 50% (0MB)
82 19:04:35.222006 progress 100% (0MB)
83 19:04:35.226436 0MB downloaded in 0.01s (6.74MB/s)
84 19:04:35.226713 end: 1.3.1 http-download (duration 00:00:00) [common]
86 19:04:35.227040 end: 1.3 download-retry (duration 00:00:00) [common]
87 19:04:35.227154 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 19:04:35.227264 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 19:04:35.227365 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 19:04:35.227466 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 19:04:35.227655 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn
92 19:04:35.227779 makedir: /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin
93 19:04:35.227883 makedir: /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/tests
94 19:04:35.227981 makedir: /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/results
95 19:04:35.228105 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-add-keys
96 19:04:35.228268 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-add-sources
97 19:04:35.228407 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-background-process-start
98 19:04:35.228545 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-background-process-stop
99 19:04:35.228677 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-common-functions
100 19:04:35.228806 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-echo-ipv4
101 19:04:35.228936 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-install-packages
102 19:04:35.229065 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-installed-packages
103 19:04:35.229192 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-os-build
104 19:04:35.229319 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-probe-channel
105 19:04:35.229448 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-probe-ip
106 19:04:35.229576 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-target-ip
107 19:04:35.229717 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-target-mac
108 19:04:35.229846 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-target-storage
109 19:04:35.229975 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-test-case
110 19:04:35.230104 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-test-event
111 19:04:35.230242 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-test-feedback
112 19:04:35.230369 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-test-raise
113 19:04:35.230498 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-test-reference
114 19:04:35.230625 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-test-runner
115 19:04:35.230749 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-test-set
116 19:04:35.230873 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-test-shell
117 19:04:35.231002 Updating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-install-packages (oe)
118 19:04:35.231133 Updating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/bin/lava-installed-packages (oe)
119 19:04:35.231247 Creating /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/environment
120 19:04:35.231356 LAVA metadata
121 19:04:35.231441 - LAVA_JOB_ID=9284148
122 19:04:35.231520 - LAVA_DISPATCHER_IP=192.168.201.1
123 19:04:35.231634 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 19:04:35.231715 skipped lava-vland-overlay
125 19:04:35.231828 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 19:04:35.231918 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 19:04:35.231984 skipped lava-multinode-overlay
128 19:04:35.232068 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 19:04:35.232157 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 19:04:35.232236 Loading test definitions
131 19:04:35.232336 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 19:04:35.232414 Using /lava-9284148 at stage 0
133 19:04:35.232678 uuid=9284148_1.4.2.3.1 testdef=None
134 19:04:35.232774 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 19:04:35.232878 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 19:04:35.233383 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 19:04:35.233626 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 19:04:35.234279 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 19:04:35.234528 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 19:04:35.235094 runner path: /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/0/tests/0_dmesg test_uuid 9284148_1.4.2.3.1
143 19:04:35.235244 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 19:04:35.235480 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 19:04:35.235560 Using /lava-9284148 at stage 1
147 19:04:35.235811 uuid=9284148_1.4.2.3.5 testdef=None
148 19:04:35.235905 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 19:04:35.235994 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 19:04:35.236454 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 19:04:35.236687 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 19:04:35.237278 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 19:04:35.237522 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 19:04:35.238089 runner path: /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/1/tests/1_bootrr test_uuid 9284148_1.4.2.3.5
157 19:04:35.238278 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 19:04:35.238497 Creating lava-test-runner.conf files
160 19:04:35.238570 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/0 for stage 0
161 19:04:35.238655 - 0_dmesg
162 19:04:35.238731 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9284148/lava-overlay-q427jekn/lava-9284148/1 for stage 1
163 19:04:35.238820 - 1_bootrr
164 19:04:35.238916 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 19:04:35.239005 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 19:04:35.245158 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 19:04:35.245266 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 19:04:35.245359 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 19:04:35.245452 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 19:04:35.245541 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 19:04:35.430315 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 19:04:35.430649 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 19:04:35.430773 extracting modules file /var/lib/lava/dispatcher/tmp/9284148/tftp-deploy-y10xk97s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9284148/extract-overlay-ramdisk-4iacfj7v/ramdisk
174 19:04:35.434959 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 19:04:35.435083 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 19:04:35.435174 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9284148/compress-overlay-evmns8ft/overlay-1.4.2.4.tar.gz to ramdisk
177 19:04:35.435250 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9284148/compress-overlay-evmns8ft/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9284148/extract-overlay-ramdisk-4iacfj7v/ramdisk
178 19:04:35.439086 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 19:04:35.439201 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 19:04:35.439297 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 19:04:35.439390 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 19:04:35.439471 Building ramdisk /var/lib/lava/dispatcher/tmp/9284148/extract-overlay-ramdisk-4iacfj7v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9284148/extract-overlay-ramdisk-4iacfj7v/ramdisk
183 19:04:35.503123 >> 48350 blocks
184 19:04:36.267757 rename /var/lib/lava/dispatcher/tmp/9284148/extract-overlay-ramdisk-4iacfj7v/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9284148/tftp-deploy-y10xk97s/ramdisk/ramdisk.cpio.gz
185 19:04:36.268163 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 19:04:36.268298 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 19:04:36.268401 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 19:04:36.268499 No mkimage arch provided, not using FIT.
189 19:04:36.268595 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 19:04:36.268689 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 19:04:36.268792 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 19:04:36.268891 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 19:04:36.268980 No LXC device requested
194 19:04:36.269066 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 19:04:36.269159 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 19:04:36.269250 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 19:04:36.269330 Checking files for TFTP limit of 4294967296 bytes.
198 19:04:36.269729 end: 1 tftp-deploy (duration 00:00:01) [common]
199 19:04:36.269838 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 19:04:36.269936 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 19:04:36.270066 substitutions:
202 19:04:36.270175 - {DTB}: None
203 19:04:36.270243 - {INITRD}: 9284148/tftp-deploy-y10xk97s/ramdisk/ramdisk.cpio.gz
204 19:04:36.270306 - {KERNEL}: 9284148/tftp-deploy-y10xk97s/kernel/bzImage
205 19:04:36.270367 - {LAVA_MAC}: None
206 19:04:36.270430 - {PRESEED_CONFIG}: None
207 19:04:36.270490 - {PRESEED_LOCAL}: None
208 19:04:36.270548 - {RAMDISK}: 9284148/tftp-deploy-y10xk97s/ramdisk/ramdisk.cpio.gz
209 19:04:36.270607 - {ROOT_PART}: None
210 19:04:36.270664 - {ROOT}: None
211 19:04:36.270722 - {SERVER_IP}: 192.168.201.1
212 19:04:36.270779 - {TEE}: None
213 19:04:36.270841 Parsed boot commands:
214 19:04:36.270898 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 19:04:36.271050 Parsed boot commands: tftpboot 192.168.201.1 9284148/tftp-deploy-y10xk97s/kernel/bzImage 9284148/tftp-deploy-y10xk97s/kernel/cmdline 9284148/tftp-deploy-y10xk97s/ramdisk/ramdisk.cpio.gz
216 19:04:36.271144 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 19:04:36.271237 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 19:04:36.271335 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 19:04:36.271424 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 19:04:36.271496 Not connected, no need to disconnect.
221 19:04:36.271573 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 19:04:36.271663 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 19:04:36.271732 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
224 19:04:36.274514 Setting prompt string to ['lava-test: # ']
225 19:04:36.274812 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 19:04:36.274925 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 19:04:36.275026 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 19:04:36.275120 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 19:04:36.275520 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
230 19:04:45.621029 >> Command sent successfully.
231 19:04:45.630457 Returned 0 in 9 seconds
232 19:04:45.732005 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 19:04:45.733530 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 19:04:45.734052 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 19:04:45.734538 Setting prompt string to 'Starting depthcharge on Voema...'
237 19:04:45.734938 Changing prompt to 'Starting depthcharge on Voema...'
238 19:04:45.735301 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 19:04:45.736566 [Enter `^Ec?' for help]
240 19:04:45.737008
241 19:04:45.737429
242 19:04:45.737781 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 19:04:45.738220 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 19:04:45.738560 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 19:04:45.738893 CPU: AES supported, TXT NOT supported, VT supported
246 19:04:45.739202 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 19:04:45.739521 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 19:04:45.739818 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 19:04:45.740135 VBOOT: Loading verstage.
250 19:04:45.740437 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 19:04:45.740760 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 19:04:45.741129 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 19:04:45.741459 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 19:04:45.741760 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 19:04:45.742076
256 19:04:45.742397
257 19:04:45.742713 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 19:04:45.743014 Probing TPM: . done!
259 19:04:45.743321 TPM ready after 0 ms
260 19:04:45.743615 Connected to device vid:did:rid of 1ae0:0028:00
261 19:04:45.743910 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
262 19:04:45.744238 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 19:04:45.744536 Initialized TPM device CR50 revision 0
264 19:04:45.744857 tlcl_send_startup: Startup return code is 0
265 19:04:45.745159 TPM: setup succeeded
266 19:04:45.745461 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 19:04:45.745761 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 19:04:45.746054 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 19:04:45.746428 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 19:04:45.746727 Chrome EC: UHEPI supported
271 19:04:45.747017 Phase 1
272 19:04:45.747332 FMAP: area GBB found @ 1805000 (458752 bytes)
273 19:04:45.747627 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 19:04:45.747920 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 19:04:45.748214 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 19:04:45.748508 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 19:04:45.748820 Recovery requested (1009000e)
278 19:04:45.749110 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 19:04:45.749416 tlcl_extend: response is 0
280 19:04:45.749730 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 19:04:45.750085 tlcl_extend: response is 0
282 19:04:45.750429 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 19:04:45.750729 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 19:04:45.751042 BS: verstage times (exec / console): total (unknown) / 142 ms
285 19:04:45.751333
286 19:04:45.751619
287 19:04:45.751906 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 19:04:45.752202 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 19:04:45.752493 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 19:04:45.752784 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 19:04:45.753074 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 19:04:45.753402 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 19:04:45.753699 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 19:04:45.753986 TCO_STS: 0000 0000
295 19:04:45.754311 GEN_PMCON: d0015038 00002200
296 19:04:45.754605 GBLRST_CAUSE: 00000000 00000000
297 19:04:45.754896 HPR_CAUSE0: 00000000
298 19:04:45.755335 prev_sleep_state 5
299 19:04:45.755754 Boot Count incremented to 16227
300 19:04:45.756298 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 19:04:45.756809 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 19:04:45.757268 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 19:04:45.757643 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 19:04:45.758016 Chrome EC: UHEPI supported
305 19:04:45.758371 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 19:04:45.759001 Probing TPM: done!
307 19:04:45.759331 Connected to device vid:did:rid of 1ae0:0028:00
308 19:04:45.764659 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
309 19:04:45.772035 Initialized TPM device CR50 revision 0
310 19:04:45.781645 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 19:04:45.788273 MRC: Hash idx 0x100b comparison successful.
312 19:04:45.791465 MRC cache found, size faa8
313 19:04:45.791964 bootmode is set to: 2
314 19:04:45.794756 SPD index = 0
315 19:04:45.801778 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 19:04:45.804918 SPD: module type is LPDDR4X
317 19:04:45.808219 SPD: module part number is MT53E512M64D4NW-046
318 19:04:45.815000 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 19:04:45.818618 SPD: device width 16 bits, bus width 16 bits
320 19:04:45.824594 SPD: module size is 1024 MB (per channel)
321 19:04:46.257800 CBMEM:
322 19:04:46.260652 IMD: root @ 0x76fff000 254 entries.
323 19:04:46.264056 IMD: root @ 0x76ffec00 62 entries.
324 19:04:46.267326 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 19:04:46.274607 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 19:04:46.277544 External stage cache:
327 19:04:46.280833 IMD: root @ 0x7b3ff000 254 entries.
328 19:04:46.284290 IMD: root @ 0x7b3fec00 62 entries.
329 19:04:46.299873 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 19:04:46.306301 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 19:04:46.312379 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 19:04:46.327362 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 19:04:46.334104 cse_lite: Skip switching to RW in the recovery path
334 19:04:46.334709 8 DIMMs found
335 19:04:46.335104 SMM Memory Map
336 19:04:46.337718 SMRAM : 0x7b000000 0x800000
337 19:04:46.341342 Subregion 0: 0x7b000000 0x200000
338 19:04:46.344723 Subregion 1: 0x7b200000 0x200000
339 19:04:46.348084 Subregion 2: 0x7b400000 0x400000
340 19:04:46.351442 top_of_ram = 0x77000000
341 19:04:46.358610 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 19:04:46.362180 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 19:04:46.367826 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 19:04:46.371920 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 19:04:46.381908 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 19:04:46.384474 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 19:04:46.396836 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 19:04:46.403375 Processing 211 relocs. Offset value of 0x74c0b000
349 19:04:46.409753 BS: romstage times (exec / console): total (unknown) / 277 ms
350 19:04:46.415987
351 19:04:46.416469
352 19:04:46.426240 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 19:04:46.428895 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 19:04:46.439358 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 19:04:46.445474 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 19:04:46.452016 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 19:04:46.458614 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 19:04:46.505997 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 19:04:46.512805 Processing 5008 relocs. Offset value of 0x75d98000
360 19:04:46.515623 BS: postcar times (exec / console): total (unknown) / 59 ms
361 19:04:46.519153
362 19:04:46.519603
363 19:04:46.529480 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 19:04:46.529941 Normal boot
365 19:04:46.532328 FW_CONFIG value is 0x804c02
366 19:04:46.535464 PCI: 00:07.0 disabled by fw_config
367 19:04:46.538795 PCI: 00:07.1 disabled by fw_config
368 19:04:46.542366 PCI: 00:0d.2 disabled by fw_config
369 19:04:46.545988 PCI: 00:1c.7 disabled by fw_config
370 19:04:46.552715 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 19:04:46.559044 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 19:04:46.562158 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 19:04:46.565518 GENERIC: 0.0 disabled by fw_config
374 19:04:46.572367 GENERIC: 1.0 disabled by fw_config
375 19:04:46.576682 fw_config match found: DB_USB=USB3_ACTIVE
376 19:04:46.578720 fw_config match found: DB_USB=USB3_ACTIVE
377 19:04:46.582527 fw_config match found: DB_USB=USB3_ACTIVE
378 19:04:46.588751 fw_config match found: DB_USB=USB3_ACTIVE
379 19:04:46.592414 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 19:04:46.600194 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 19:04:46.608778 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 19:04:46.615342 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 19:04:46.618623 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 19:04:46.625144 microcode: Update skipped, already up-to-date
385 19:04:46.633174 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 19:04:46.659247 Detected 4 core, 8 thread CPU.
387 19:04:46.662886 Setting up SMI for CPU
388 19:04:46.666513 IED base = 0x7b400000
389 19:04:46.666964 IED size = 0x00400000
390 19:04:46.669703 Will perform SMM setup.
391 19:04:46.676719 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 19:04:46.682735 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 19:04:46.689555 Processing 16 relocs. Offset value of 0x00030000
394 19:04:46.692866 Attempting to start 7 APs
395 19:04:46.696445 Waiting for 10ms after sending INIT.
396 19:04:46.711361 Waiting for 1st SIPI to complete...done.
397 19:04:46.711961 AP: slot 1 apic_id 1.
398 19:04:46.718255 Waiting for 2nd SIPI to complete...done.
399 19:04:46.718787 AP: slot 7 apic_id 4.
400 19:04:46.721963 AP: slot 4 apic_id 7.
401 19:04:46.725076 AP: slot 5 apic_id 6.
402 19:04:46.725582 AP: slot 3 apic_id 5.
403 19:04:46.728219 AP: slot 6 apic_id 2.
404 19:04:46.731441 AP: slot 2 apic_id 3.
405 19:04:46.737608 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 19:04:46.744385 Processing 13 relocs. Offset value of 0x00038000
407 19:04:46.747659 Unable to locate Global NVS
408 19:04:46.754245 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 19:04:46.758241 Installing permanent SMM handler to 0x7b000000
410 19:04:46.767631 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 19:04:46.770768 Processing 794 relocs. Offset value of 0x7b010000
412 19:04:46.781032 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 19:04:46.784295 Processing 13 relocs. Offset value of 0x7b008000
414 19:04:46.791385 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 19:04:46.797303 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 19:04:46.803705 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 19:04:46.807286 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 19:04:46.813844 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 19:04:46.820233 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 19:04:46.827043 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 19:04:46.830379 Unable to locate Global NVS
422 19:04:46.837204 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 19:04:46.840678 Clearing SMI status registers
424 19:04:46.843759 SMI_STS: PM1
425 19:04:46.844208 PM1_STS: PWRBTN
426 19:04:46.850107 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 19:04:46.853732 In relocation handler: CPU 0
428 19:04:46.856629 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 19:04:46.863268 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 19:04:46.866564 Relocation complete.
431 19:04:46.873062 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 19:04:46.876431 In relocation handler: CPU 1
433 19:04:46.880056 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 19:04:46.883791 Relocation complete.
435 19:04:46.890045 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
436 19:04:46.893277 In relocation handler: CPU 7
437 19:04:46.896921 New SMBASE=0x7affe400 IEDBASE=0x7b400000
438 19:04:46.900063 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 19:04:46.902752 Relocation complete.
440 19:04:46.909399 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
441 19:04:46.912875 In relocation handler: CPU 3
442 19:04:46.915921 New SMBASE=0x7afff400 IEDBASE=0x7b400000
443 19:04:46.919277 Relocation complete.
444 19:04:46.925958 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
445 19:04:46.929658 In relocation handler: CPU 5
446 19:04:46.932590 New SMBASE=0x7affec00 IEDBASE=0x7b400000
447 19:04:46.939246 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 19:04:46.942356 Relocation complete.
449 19:04:46.949114 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
450 19:04:46.953062 In relocation handler: CPU 4
451 19:04:46.955763 New SMBASE=0x7afff000 IEDBASE=0x7b400000
452 19:04:46.956216 Relocation complete.
453 19:04:46.966676 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
454 19:04:46.969850 In relocation handler: CPU 6
455 19:04:46.972762 New SMBASE=0x7affe800 IEDBASE=0x7b400000
456 19:04:46.976138 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 19:04:46.979227 Relocation complete.
458 19:04:46.985632 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
459 19:04:46.989307 In relocation handler: CPU 2
460 19:04:46.992229 New SMBASE=0x7afff800 IEDBASE=0x7b400000
461 19:04:46.995599 Relocation complete.
462 19:04:46.999395 Initializing CPU #0
463 19:04:46.999852 CPU: vendor Intel device 806c1
464 19:04:47.003174 CPU: family 06, model 8c, stepping 01
465 19:04:47.006187 Clearing out pending MCEs
466 19:04:47.009639 Setting up local APIC...
467 19:04:47.012739 apic_id: 0x00 done.
468 19:04:47.016826 Turbo is available but hidden
469 19:04:47.020323 Turbo is available and visible
470 19:04:47.023357 microcode: Update skipped, already up-to-date
471 19:04:47.026609 CPU #0 initialized
472 19:04:47.027303 Initializing CPU #2
473 19:04:47.029719 Initializing CPU #6
474 19:04:47.033006 CPU: vendor Intel device 806c1
475 19:04:47.036444 CPU: family 06, model 8c, stepping 01
476 19:04:47.039456 CPU: vendor Intel device 806c1
477 19:04:47.043084 CPU: family 06, model 8c, stepping 01
478 19:04:47.046598 Clearing out pending MCEs
479 19:04:47.049738 Clearing out pending MCEs
480 19:04:47.050220 Setting up local APIC...
481 19:04:47.052982 Initializing CPU #3
482 19:04:47.056395 Initializing CPU #7
483 19:04:47.059305 CPU: vendor Intel device 806c1
484 19:04:47.062602 CPU: family 06, model 8c, stepping 01
485 19:04:47.066562 CPU: vendor Intel device 806c1
486 19:04:47.069354 CPU: family 06, model 8c, stepping 01
487 19:04:47.072859 Clearing out pending MCEs
488 19:04:47.073314 Clearing out pending MCEs
489 19:04:47.076343 Setting up local APIC...
490 19:04:47.079327 Initializing CPU #5
491 19:04:47.079793 Initializing CPU #4
492 19:04:47.082531 CPU: vendor Intel device 806c1
493 19:04:47.086008 CPU: family 06, model 8c, stepping 01
494 19:04:47.089672 CPU: vendor Intel device 806c1
495 19:04:47.095809 CPU: family 06, model 8c, stepping 01
496 19:04:47.096258 Clearing out pending MCEs
497 19:04:47.099109 Clearing out pending MCEs
498 19:04:47.102459 Setting up local APIC...
499 19:04:47.105825 Setting up local APIC...
500 19:04:47.106308 Initializing CPU #1
501 19:04:47.109422 apic_id: 0x06 done.
502 19:04:47.112539 Setting up local APIC...
503 19:04:47.115749 CPU: vendor Intel device 806c1
504 19:04:47.119281 CPU: family 06, model 8c, stepping 01
505 19:04:47.119776 apic_id: 0x04 done.
506 19:04:47.122606 apic_id: 0x05 done.
507 19:04:47.125793 microcode: Update skipped, already up-to-date
508 19:04:47.132918 microcode: Update skipped, already up-to-date
509 19:04:47.133627 CPU #7 initialized
510 19:04:47.135742 CPU #3 initialized
511 19:04:47.138871 Setting up local APIC...
512 19:04:47.142670 microcode: Update skipped, already up-to-date
513 19:04:47.145660 apic_id: 0x07 done.
514 19:04:47.146109 CPU #5 initialized
515 19:04:47.152976 microcode: Update skipped, already up-to-date
516 19:04:47.153465 apic_id: 0x02 done.
517 19:04:47.156481 apic_id: 0x03 done.
518 19:04:47.160054 microcode: Update skipped, already up-to-date
519 19:04:47.166241 microcode: Update skipped, already up-to-date
520 19:04:47.166852 CPU #6 initialized
521 19:04:47.169231 CPU #2 initialized
522 19:04:47.172823 CPU #4 initialized
523 19:04:47.173510 Clearing out pending MCEs
524 19:04:47.176211 Setting up local APIC...
525 19:04:47.179234 apic_id: 0x01 done.
526 19:04:47.182594 microcode: Update skipped, already up-to-date
527 19:04:47.186120 CPU #1 initialized
528 19:04:47.189393 bsp_do_flight_plan done after 468 msecs.
529 19:04:47.192658 CPU: frequency set to 4000 MHz
530 19:04:47.195969 Enabling SMIs.
531 19:04:47.202029 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 19:04:47.216294 SATAXPCIE1 indicates PCIe NVMe is present
533 19:04:47.219807 Probing TPM: done!
534 19:04:47.223521 Connected to device vid:did:rid of 1ae0:0028:00
535 19:04:47.233809 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
536 19:04:47.236871 Initialized TPM device CR50 revision 0
537 19:04:47.240598 Enabling S0i3.4
538 19:04:47.246819 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 19:04:47.250389 Found a VBT of 8704 bytes after decompression
540 19:04:47.257411 cse_lite: CSE RO boot. HybridStorageMode disabled
541 19:04:47.264145 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 19:04:47.339341 FSPS returned 0
543 19:04:47.342422 Executing Phase 1 of FspMultiPhaseSiInit
544 19:04:47.352676 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 19:04:47.355739 port C0 DISC req: usage 1 usb3 1 usb2 5
546 19:04:47.359094 Raw Buffer output 0 00000511
547 19:04:47.362629 Raw Buffer output 1 00000000
548 19:04:47.366211 pmc_send_ipc_cmd succeeded
549 19:04:47.372486 port C1 DISC req: usage 1 usb3 2 usb2 3
550 19:04:47.372932 Raw Buffer output 0 00000321
551 19:04:47.375829 Raw Buffer output 1 00000000
552 19:04:47.380317 pmc_send_ipc_cmd succeeded
553 19:04:47.385502 Detected 4 core, 8 thread CPU.
554 19:04:47.388985 Detected 4 core, 8 thread CPU.
555 19:04:47.622838 Display FSP Version Info HOB
556 19:04:47.625866 Reference Code - CPU = a.0.4c.31
557 19:04:47.629760 uCode Version = 0.0.0.86
558 19:04:47.632440 TXT ACM version = ff.ff.ff.ffff
559 19:04:47.636048 Reference Code - ME = a.0.4c.31
560 19:04:47.639879 MEBx version = 0.0.0.0
561 19:04:47.642786 ME Firmware Version = Consumer SKU
562 19:04:47.645990 Reference Code - PCH = a.0.4c.31
563 19:04:47.649082 PCH-CRID Status = Disabled
564 19:04:47.652645 PCH-CRID Original Value = ff.ff.ff.ffff
565 19:04:47.655771 PCH-CRID New Value = ff.ff.ff.ffff
566 19:04:47.659707 OPROM - RST - RAID = ff.ff.ff.ffff
567 19:04:47.662371 PCH Hsio Version = 4.0.0.0
568 19:04:47.666214 Reference Code - SA - System Agent = a.0.4c.31
569 19:04:47.669196 Reference Code - MRC = 2.0.0.1
570 19:04:47.672946 SA - PCIe Version = a.0.4c.31
571 19:04:47.676369 SA-CRID Status = Disabled
572 19:04:47.679688 SA-CRID Original Value = 0.0.0.1
573 19:04:47.682405 SA-CRID New Value = 0.0.0.1
574 19:04:47.686401 OPROM - VBIOS = ff.ff.ff.ffff
575 19:04:47.689333 IO Manageability Engine FW Version = 11.1.4.0
576 19:04:47.692323 PHY Build Version = 0.0.0.e0
577 19:04:47.696188 Thunderbolt(TM) FW Version = 0.0.0.0
578 19:04:47.702229 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 19:04:47.705622 ITSS IRQ Polarities Before:
580 19:04:47.706097 IPC0: 0xffffffff
581 19:04:47.709445 IPC1: 0xffffffff
582 19:04:47.709888 IPC2: 0xffffffff
583 19:04:47.712522 IPC3: 0xffffffff
584 19:04:47.716047 ITSS IRQ Polarities After:
585 19:04:47.716547 IPC0: 0xffffffff
586 19:04:47.719062 IPC1: 0xffffffff
587 19:04:47.719520 IPC2: 0xffffffff
588 19:04:47.722302 IPC3: 0xffffffff
589 19:04:47.725528 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 19:04:47.738985 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 19:04:47.748713 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 19:04:47.762116 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 19:04:47.768729 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
594 19:04:47.772324 Enumerating buses...
595 19:04:47.775972 Show all devs... Before device enumeration.
596 19:04:47.778897 Root Device: enabled 1
597 19:04:47.779352 DOMAIN: 0000: enabled 1
598 19:04:47.782393 CPU_CLUSTER: 0: enabled 1
599 19:04:47.785291 PCI: 00:00.0: enabled 1
600 19:04:47.789216 PCI: 00:02.0: enabled 1
601 19:04:47.789792 PCI: 00:04.0: enabled 1
602 19:04:47.791994 PCI: 00:05.0: enabled 1
603 19:04:47.795344 PCI: 00:06.0: enabled 0
604 19:04:47.795799 PCI: 00:07.0: enabled 0
605 19:04:47.799029 PCI: 00:07.1: enabled 0
606 19:04:47.802039 PCI: 00:07.2: enabled 0
607 19:04:47.805307 PCI: 00:07.3: enabled 0
608 19:04:47.805757 PCI: 00:08.0: enabled 1
609 19:04:47.808874 PCI: 00:09.0: enabled 0
610 19:04:47.811840 PCI: 00:0a.0: enabled 0
611 19:04:47.815135 PCI: 00:0d.0: enabled 1
612 19:04:47.815608 PCI: 00:0d.1: enabled 0
613 19:04:47.818290 PCI: 00:0d.2: enabled 0
614 19:04:47.821631 PCI: 00:0d.3: enabled 0
615 19:04:47.825201 PCI: 00:0e.0: enabled 0
616 19:04:47.825678 PCI: 00:10.2: enabled 1
617 19:04:47.828661 PCI: 00:10.6: enabled 0
618 19:04:47.831841 PCI: 00:10.7: enabled 0
619 19:04:47.835157 PCI: 00:12.0: enabled 0
620 19:04:47.835636 PCI: 00:12.6: enabled 0
621 19:04:47.838103 PCI: 00:13.0: enabled 0
622 19:04:47.841660 PCI: 00:14.0: enabled 1
623 19:04:47.842115 PCI: 00:14.1: enabled 0
624 19:04:47.845920 PCI: 00:14.2: enabled 1
625 19:04:47.848376 PCI: 00:14.3: enabled 1
626 19:04:47.852314 PCI: 00:15.0: enabled 1
627 19:04:47.852763 PCI: 00:15.1: enabled 1
628 19:04:47.854702 PCI: 00:15.2: enabled 1
629 19:04:47.858441 PCI: 00:15.3: enabled 1
630 19:04:47.861629 PCI: 00:16.0: enabled 1
631 19:04:47.862104 PCI: 00:16.1: enabled 0
632 19:04:47.865601 PCI: 00:16.2: enabled 0
633 19:04:47.868820 PCI: 00:16.3: enabled 0
634 19:04:47.871770 PCI: 00:16.4: enabled 0
635 19:04:47.872245 PCI: 00:16.5: enabled 0
636 19:04:47.874845 PCI: 00:17.0: enabled 1
637 19:04:47.878056 PCI: 00:19.0: enabled 0
638 19:04:47.882081 PCI: 00:19.1: enabled 1
639 19:04:47.882632 PCI: 00:19.2: enabled 0
640 19:04:47.885103 PCI: 00:1c.0: enabled 1
641 19:04:47.887964 PCI: 00:1c.1: enabled 0
642 19:04:47.888419 PCI: 00:1c.2: enabled 0
643 19:04:47.891585 PCI: 00:1c.3: enabled 0
644 19:04:47.895000 PCI: 00:1c.4: enabled 0
645 19:04:47.898795 PCI: 00:1c.5: enabled 0
646 19:04:47.899291 PCI: 00:1c.6: enabled 1
647 19:04:47.901658 PCI: 00:1c.7: enabled 0
648 19:04:47.905199 PCI: 00:1d.0: enabled 1
649 19:04:47.907982 PCI: 00:1d.1: enabled 0
650 19:04:47.908455 PCI: 00:1d.2: enabled 1
651 19:04:47.911810 PCI: 00:1d.3: enabled 0
652 19:04:47.915264 PCI: 00:1e.0: enabled 1
653 19:04:47.918590 PCI: 00:1e.1: enabled 0
654 19:04:47.919034 PCI: 00:1e.2: enabled 1
655 19:04:47.921485 PCI: 00:1e.3: enabled 1
656 19:04:47.925128 PCI: 00:1f.0: enabled 1
657 19:04:47.925599 PCI: 00:1f.1: enabled 0
658 19:04:47.928417 PCI: 00:1f.2: enabled 1
659 19:04:47.931514 PCI: 00:1f.3: enabled 1
660 19:04:47.934834 PCI: 00:1f.4: enabled 0
661 19:04:47.935429 PCI: 00:1f.5: enabled 1
662 19:04:47.937966 PCI: 00:1f.6: enabled 0
663 19:04:47.941457 PCI: 00:1f.7: enabled 0
664 19:04:47.944746 APIC: 00: enabled 1
665 19:04:47.945214 GENERIC: 0.0: enabled 1
666 19:04:47.948483 GENERIC: 0.0: enabled 1
667 19:04:47.951892 GENERIC: 1.0: enabled 1
668 19:04:47.952356 GENERIC: 0.0: enabled 1
669 19:04:47.954883 GENERIC: 1.0: enabled 1
670 19:04:47.958173 USB0 port 0: enabled 1
671 19:04:47.961216 GENERIC: 0.0: enabled 1
672 19:04:47.961682 USB0 port 0: enabled 1
673 19:04:47.964514 GENERIC: 0.0: enabled 1
674 19:04:47.968375 I2C: 00:1a: enabled 1
675 19:04:47.968844 I2C: 00:31: enabled 1
676 19:04:47.971220 I2C: 00:32: enabled 1
677 19:04:47.974666 I2C: 00:10: enabled 1
678 19:04:47.975117 I2C: 00:15: enabled 1
679 19:04:47.977744 GENERIC: 0.0: enabled 0
680 19:04:47.981503 GENERIC: 1.0: enabled 0
681 19:04:47.985291 GENERIC: 0.0: enabled 1
682 19:04:47.985742 SPI: 00: enabled 1
683 19:04:47.988009 SPI: 00: enabled 1
684 19:04:47.991200 PNP: 0c09.0: enabled 1
685 19:04:47.991652 GENERIC: 0.0: enabled 1
686 19:04:47.994591 USB3 port 0: enabled 1
687 19:04:47.998381 USB3 port 1: enabled 1
688 19:04:47.998835 USB3 port 2: enabled 0
689 19:04:48.001017 USB3 port 3: enabled 0
690 19:04:48.004541 USB2 port 0: enabled 0
691 19:04:48.007766 USB2 port 1: enabled 1
692 19:04:48.008213 USB2 port 2: enabled 1
693 19:04:48.011452 USB2 port 3: enabled 0
694 19:04:48.015025 USB2 port 4: enabled 1
695 19:04:48.015474 USB2 port 5: enabled 0
696 19:04:48.018200 USB2 port 6: enabled 0
697 19:04:48.021218 USB2 port 7: enabled 0
698 19:04:48.021684 USB2 port 8: enabled 0
699 19:04:48.024871 USB2 port 9: enabled 0
700 19:04:48.027842 USB3 port 0: enabled 0
701 19:04:48.031123 USB3 port 1: enabled 1
702 19:04:48.031567 USB3 port 2: enabled 0
703 19:04:48.034537 USB3 port 3: enabled 0
704 19:04:48.038266 GENERIC: 0.0: enabled 1
705 19:04:48.038751 GENERIC: 1.0: enabled 1
706 19:04:48.040934 APIC: 01: enabled 1
707 19:04:48.044217 APIC: 03: enabled 1
708 19:04:48.044661 APIC: 05: enabled 1
709 19:04:48.047733 APIC: 07: enabled 1
710 19:04:48.051588 APIC: 06: enabled 1
711 19:04:48.052117 APIC: 02: enabled 1
712 19:04:48.054185 APIC: 04: enabled 1
713 19:04:48.054635 Compare with tree...
714 19:04:48.057551 Root Device: enabled 1
715 19:04:48.061448 DOMAIN: 0000: enabled 1
716 19:04:48.064076 PCI: 00:00.0: enabled 1
717 19:04:48.067633 PCI: 00:02.0: enabled 1
718 19:04:48.068086 PCI: 00:04.0: enabled 1
719 19:04:48.071075 GENERIC: 0.0: enabled 1
720 19:04:48.074314 PCI: 00:05.0: enabled 1
721 19:04:48.077767 PCI: 00:06.0: enabled 0
722 19:04:48.080885 PCI: 00:07.0: enabled 0
723 19:04:48.081436 GENERIC: 0.0: enabled 1
724 19:04:48.084246 PCI: 00:07.1: enabled 0
725 19:04:48.087689 GENERIC: 1.0: enabled 1
726 19:04:48.091303 PCI: 00:07.2: enabled 0
727 19:04:48.093900 GENERIC: 0.0: enabled 1
728 19:04:48.094411 PCI: 00:07.3: enabled 0
729 19:04:48.097178 GENERIC: 1.0: enabled 1
730 19:04:48.100732 PCI: 00:08.0: enabled 1
731 19:04:48.104175 PCI: 00:09.0: enabled 0
732 19:04:48.107666 PCI: 00:0a.0: enabled 0
733 19:04:48.108117 PCI: 00:0d.0: enabled 1
734 19:04:48.110466 USB0 port 0: enabled 1
735 19:04:48.113966 USB3 port 0: enabled 1
736 19:04:48.117374 USB3 port 1: enabled 1
737 19:04:48.120965 USB3 port 2: enabled 0
738 19:04:48.121423 USB3 port 3: enabled 0
739 19:04:48.124469 PCI: 00:0d.1: enabled 0
740 19:04:48.126883 PCI: 00:0d.2: enabled 0
741 19:04:48.130686 GENERIC: 0.0: enabled 1
742 19:04:48.133869 PCI: 00:0d.3: enabled 0
743 19:04:48.137320 PCI: 00:0e.0: enabled 0
744 19:04:48.137854 PCI: 00:10.2: enabled 1
745 19:04:48.140703 PCI: 00:10.6: enabled 0
746 19:04:48.143655 PCI: 00:10.7: enabled 0
747 19:04:48.147030 PCI: 00:12.0: enabled 0
748 19:04:48.147483 PCI: 00:12.6: enabled 0
749 19:04:48.150258 PCI: 00:13.0: enabled 0
750 19:04:48.153713 PCI: 00:14.0: enabled 1
751 19:04:48.157188 USB0 port 0: enabled 1
752 19:04:48.160131 USB2 port 0: enabled 0
753 19:04:48.163410 USB2 port 1: enabled 1
754 19:04:48.163898 USB2 port 2: enabled 1
755 19:04:48.167492 USB2 port 3: enabled 0
756 19:04:48.170551 USB2 port 4: enabled 1
757 19:04:48.173774 USB2 port 5: enabled 0
758 19:04:48.176863 USB2 port 6: enabled 0
759 19:04:48.177357 USB2 port 7: enabled 0
760 19:04:48.180528 USB2 port 8: enabled 0
761 19:04:48.183828 USB2 port 9: enabled 0
762 19:04:48.187201 USB3 port 0: enabled 0
763 19:04:48.190117 USB3 port 1: enabled 1
764 19:04:48.193525 USB3 port 2: enabled 0
765 19:04:48.193986 USB3 port 3: enabled 0
766 19:04:48.196969 PCI: 00:14.1: enabled 0
767 19:04:48.200161 PCI: 00:14.2: enabled 1
768 19:04:48.203360 PCI: 00:14.3: enabled 1
769 19:04:48.206699 GENERIC: 0.0: enabled 1
770 19:04:48.207157 PCI: 00:15.0: enabled 1
771 19:04:48.210107 I2C: 00:1a: enabled 1
772 19:04:48.213319 I2C: 00:31: enabled 1
773 19:04:48.216976 I2C: 00:32: enabled 1
774 19:04:48.220688 PCI: 00:15.1: enabled 1
775 19:04:48.221242 I2C: 00:10: enabled 1
776 19:04:48.223494 PCI: 00:15.2: enabled 1
777 19:04:48.226983 PCI: 00:15.3: enabled 1
778 19:04:48.230122 PCI: 00:16.0: enabled 1
779 19:04:48.230607 PCI: 00:16.1: enabled 0
780 19:04:48.233484 PCI: 00:16.2: enabled 0
781 19:04:48.236589 PCI: 00:16.3: enabled 0
782 19:04:48.239966 PCI: 00:16.4: enabled 0
783 19:04:48.243945 PCI: 00:16.5: enabled 0
784 19:04:48.244449 PCI: 00:17.0: enabled 1
785 19:04:48.247178 PCI: 00:19.0: enabled 0
786 19:04:48.250814 PCI: 00:19.1: enabled 1
787 19:04:48.254291 I2C: 00:15: enabled 1
788 19:04:48.254746 PCI: 00:19.2: enabled 0
789 19:04:48.257733 PCI: 00:1d.0: enabled 1
790 19:04:48.261078 GENERIC: 0.0: enabled 1
791 19:04:48.264435 PCI: 00:1e.0: enabled 1
792 19:04:48.267430 PCI: 00:1e.1: enabled 0
793 19:04:48.267982 PCI: 00:1e.2: enabled 1
794 19:04:48.317169 SPI: 00: enabled 1
795 19:04:48.317789 PCI: 00:1e.3: enabled 1
796 19:04:48.318626 SPI: 00: enabled 1
797 19:04:48.319172 PCI: 00:1f.0: enabled 1
798 19:04:48.319689 PNP: 0c09.0: enabled 1
799 19:04:48.320181 PCI: 00:1f.1: enabled 0
800 19:04:48.320637 PCI: 00:1f.2: enabled 1
801 19:04:48.321051 GENERIC: 0.0: enabled 1
802 19:04:48.321373 GENERIC: 0.0: enabled 1
803 19:04:48.321679 GENERIC: 1.0: enabled 1
804 19:04:48.321981 PCI: 00:1f.3: enabled 1
805 19:04:48.322323 PCI: 00:1f.4: enabled 0
806 19:04:48.322628 PCI: 00:1f.5: enabled 1
807 19:04:48.322930 PCI: 00:1f.6: enabled 0
808 19:04:48.323230 PCI: 00:1f.7: enabled 0
809 19:04:48.323526 CPU_CLUSTER: 0: enabled 1
810 19:04:48.324162 APIC: 00: enabled 1
811 19:04:48.324498 APIC: 01: enabled 1
812 19:04:48.324799 APIC: 03: enabled 1
813 19:04:48.358672 APIC: 05: enabled 1
814 19:04:48.359233 APIC: 07: enabled 1
815 19:04:48.359691 APIC: 06: enabled 1
816 19:04:48.360154 APIC: 02: enabled 1
817 19:04:48.360556 APIC: 04: enabled 1
818 19:04:48.360912 Root Device scanning...
819 19:04:48.361630 scan_static_bus for Root Device
820 19:04:48.362025 DOMAIN: 0000 enabled
821 19:04:48.362498 CPU_CLUSTER: 0 enabled
822 19:04:48.362848 DOMAIN: 0000 scanning...
823 19:04:48.363171 PCI: pci_scan_bus for bus 00
824 19:04:48.363490 PCI: 00:00.0 [8086/0000] ops
825 19:04:48.363849 PCI: 00:00.0 [8086/9a12] enabled
826 19:04:48.364170 PCI: 00:02.0 [8086/0000] bus ops
827 19:04:48.364836 PCI: 00:02.0 [8086/9a40] enabled
828 19:04:48.365192 PCI: 00:04.0 [8086/0000] bus ops
829 19:04:48.366201 PCI: 00:04.0 [8086/9a03] enabled
830 19:04:48.370363 PCI: 00:05.0 [8086/9a19] enabled
831 19:04:48.373341 PCI: 00:07.0 [0000/0000] hidden
832 19:04:48.376121 PCI: 00:08.0 [8086/9a11] enabled
833 19:04:48.379387 PCI: 00:0a.0 [8086/9a0d] disabled
834 19:04:48.382961 PCI: 00:0d.0 [8086/0000] bus ops
835 19:04:48.386200 PCI: 00:0d.0 [8086/9a13] enabled
836 19:04:48.390187 PCI: 00:14.0 [8086/0000] bus ops
837 19:04:48.392889 PCI: 00:14.0 [8086/a0ed] enabled
838 19:04:48.396053 PCI: 00:14.2 [8086/a0ef] enabled
839 19:04:48.399742 PCI: 00:14.3 [8086/0000] bus ops
840 19:04:48.403161 PCI: 00:14.3 [8086/a0f0] enabled
841 19:04:48.406663 PCI: 00:15.0 [8086/0000] bus ops
842 19:04:48.409335 PCI: 00:15.0 [8086/a0e8] enabled
843 19:04:48.412690 PCI: 00:15.1 [8086/0000] bus ops
844 19:04:48.415978 PCI: 00:15.1 [8086/a0e9] enabled
845 19:04:48.419408 PCI: 00:15.2 [8086/0000] bus ops
846 19:04:48.422753 PCI: 00:15.2 [8086/a0ea] enabled
847 19:04:48.426254 PCI: 00:15.3 [8086/0000] bus ops
848 19:04:48.429622 PCI: 00:15.3 [8086/a0eb] enabled
849 19:04:48.433394 PCI: 00:16.0 [8086/0000] ops
850 19:04:48.436262 PCI: 00:16.0 [8086/a0e0] enabled
851 19:04:48.439323 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 19:04:48.443242 PCI: 00:19.0 [8086/0000] bus ops
853 19:04:48.449733 PCI: 00:19.0 [8086/a0c5] disabled
854 19:04:48.452447 PCI: 00:19.1 [8086/0000] bus ops
855 19:04:48.456174 PCI: 00:19.1 [8086/a0c6] enabled
856 19:04:48.459092 PCI: 00:1d.0 [8086/0000] bus ops
857 19:04:48.462708 PCI: 00:1d.0 [8086/a0b0] enabled
858 19:04:48.463157 PCI: 00:1e.0 [8086/0000] ops
859 19:04:48.465742 PCI: 00:1e.0 [8086/a0a8] enabled
860 19:04:48.469650 PCI: 00:1e.2 [8086/0000] bus ops
861 19:04:48.472428 PCI: 00:1e.2 [8086/a0aa] enabled
862 19:04:48.476642 PCI: 00:1e.3 [8086/0000] bus ops
863 19:04:48.479668 PCI: 00:1e.3 [8086/a0ab] enabled
864 19:04:48.482289 PCI: 00:1f.0 [8086/0000] bus ops
865 19:04:48.485708 PCI: 00:1f.0 [8086/a087] enabled
866 19:04:48.489092 RTC Init
867 19:04:48.492809 Set power on after power failure.
868 19:04:48.493282 Disabling Deep S3
869 19:04:48.495904 Disabling Deep S3
870 19:04:48.499173 Disabling Deep S4
871 19:04:48.499623 Disabling Deep S4
872 19:04:48.502534 Disabling Deep S5
873 19:04:48.502988 Disabling Deep S5
874 19:04:48.506023 PCI: 00:1f.2 [0000/0000] hidden
875 19:04:48.509447 PCI: 00:1f.3 [8086/0000] bus ops
876 19:04:48.512672 PCI: 00:1f.3 [8086/a0c8] enabled
877 19:04:48.516222 PCI: 00:1f.5 [8086/0000] bus ops
878 19:04:48.519512 PCI: 00:1f.5 [8086/a0a4] enabled
879 19:04:48.522361 PCI: Leftover static devices:
880 19:04:48.525970 PCI: 00:10.2
881 19:04:48.526467 PCI: 00:10.6
882 19:04:48.526935 PCI: 00:10.7
883 19:04:48.529095 PCI: 00:06.0
884 19:04:48.529498 PCI: 00:07.1
885 19:04:48.532901 PCI: 00:07.2
886 19:04:48.533362 PCI: 00:07.3
887 19:04:48.535930 PCI: 00:09.0
888 19:04:48.536405 PCI: 00:0d.1
889 19:04:48.536845 PCI: 00:0d.2
890 19:04:48.539226 PCI: 00:0d.3
891 19:04:48.539716 PCI: 00:0e.0
892 19:04:48.542073 PCI: 00:12.0
893 19:04:48.542566 PCI: 00:12.6
894 19:04:48.543008 PCI: 00:13.0
895 19:04:48.545658 PCI: 00:14.1
896 19:04:48.546201 PCI: 00:16.1
897 19:04:48.548582 PCI: 00:16.2
898 19:04:48.549031 PCI: 00:16.3
899 19:04:48.552117 PCI: 00:16.4
900 19:04:48.552570 PCI: 00:16.5
901 19:04:48.552927 PCI: 00:17.0
902 19:04:48.555653 PCI: 00:19.2
903 19:04:48.556169 PCI: 00:1e.1
904 19:04:48.558784 PCI: 00:1f.1
905 19:04:48.559237 PCI: 00:1f.4
906 19:04:48.559594 PCI: 00:1f.6
907 19:04:48.562045 PCI: 00:1f.7
908 19:04:48.565535 PCI: Check your devicetree.cb.
909 19:04:48.569159 PCI: 00:02.0 scanning...
910 19:04:48.572120 scan_generic_bus for PCI: 00:02.0
911 19:04:48.575307 scan_generic_bus for PCI: 00:02.0 done
912 19:04:48.579056 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 19:04:48.582509 PCI: 00:04.0 scanning...
914 19:04:48.584989 scan_generic_bus for PCI: 00:04.0
915 19:04:48.588666 GENERIC: 0.0 enabled
916 19:04:48.595380 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 19:04:48.598441 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 19:04:48.601808 PCI: 00:0d.0 scanning...
919 19:04:48.605469 scan_static_bus for PCI: 00:0d.0
920 19:04:48.608671 USB0 port 0 enabled
921 19:04:48.609121 USB0 port 0 scanning...
922 19:04:48.611972 scan_static_bus for USB0 port 0
923 19:04:48.615158 USB3 port 0 enabled
924 19:04:48.618702 USB3 port 1 enabled
925 19:04:48.619157 USB3 port 2 disabled
926 19:04:48.621900 USB3 port 3 disabled
927 19:04:48.624814 USB3 port 0 scanning...
928 19:04:48.628046 scan_static_bus for USB3 port 0
929 19:04:48.631812 scan_static_bus for USB3 port 0 done
930 19:04:48.634807 scan_bus: bus USB3 port 0 finished in 6 msecs
931 19:04:48.638113 USB3 port 1 scanning...
932 19:04:48.641901 scan_static_bus for USB3 port 1
933 19:04:48.645004 scan_static_bus for USB3 port 1 done
934 19:04:48.648640 scan_bus: bus USB3 port 1 finished in 6 msecs
935 19:04:48.654841 scan_static_bus for USB0 port 0 done
936 19:04:48.657766 scan_bus: bus USB0 port 0 finished in 43 msecs
937 19:04:48.661469 scan_static_bus for PCI: 00:0d.0 done
938 19:04:48.667745 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 19:04:48.668242 PCI: 00:14.0 scanning...
940 19:04:48.671291 scan_static_bus for PCI: 00:14.0
941 19:04:48.674624 USB0 port 0 enabled
942 19:04:48.678487 USB0 port 0 scanning...
943 19:04:48.681298 scan_static_bus for USB0 port 0
944 19:04:48.681756 USB2 port 0 disabled
945 19:04:48.684508 USB2 port 1 enabled
946 19:04:48.687788 USB2 port 2 enabled
947 19:04:48.688439 USB2 port 3 disabled
948 19:04:48.690934 USB2 port 4 enabled
949 19:04:48.694863 USB2 port 5 disabled
950 19:04:48.695314 USB2 port 6 disabled
951 19:04:48.697619 USB2 port 7 disabled
952 19:04:48.700998 USB2 port 8 disabled
953 19:04:48.701463 USB2 port 9 disabled
954 19:04:48.705019 USB3 port 0 disabled
955 19:04:48.705479 USB3 port 1 enabled
956 19:04:48.707898 USB3 port 2 disabled
957 19:04:48.711221 USB3 port 3 disabled
958 19:04:48.711669 USB2 port 1 scanning...
959 19:04:48.714377 scan_static_bus for USB2 port 1
960 19:04:48.721523 scan_static_bus for USB2 port 1 done
961 19:04:48.724354 scan_bus: bus USB2 port 1 finished in 6 msecs
962 19:04:48.727357 USB2 port 2 scanning...
963 19:04:48.731275 scan_static_bus for USB2 port 2
964 19:04:48.734606 scan_static_bus for USB2 port 2 done
965 19:04:48.738192 scan_bus: bus USB2 port 2 finished in 6 msecs
966 19:04:48.741542 USB2 port 4 scanning...
967 19:04:48.744335 scan_static_bus for USB2 port 4
968 19:04:48.747503 scan_static_bus for USB2 port 4 done
969 19:04:48.754043 scan_bus: bus USB2 port 4 finished in 6 msecs
970 19:04:48.754244 USB3 port 1 scanning...
971 19:04:48.757636 scan_static_bus for USB3 port 1
972 19:04:48.760605 scan_static_bus for USB3 port 1 done
973 19:04:48.767876 scan_bus: bus USB3 port 1 finished in 6 msecs
974 19:04:48.771226 scan_static_bus for USB0 port 0 done
975 19:04:48.774155 scan_bus: bus USB0 port 0 finished in 93 msecs
976 19:04:48.777724 scan_static_bus for PCI: 00:14.0 done
977 19:04:48.784195 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 19:04:48.788169 PCI: 00:14.3 scanning...
979 19:04:48.790933 scan_static_bus for PCI: 00:14.3
980 19:04:48.791385 GENERIC: 0.0 enabled
981 19:04:48.797225 scan_static_bus for PCI: 00:14.3 done
982 19:04:48.800304 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 19:04:48.804106 PCI: 00:15.0 scanning...
984 19:04:48.806813 scan_static_bus for PCI: 00:15.0
985 19:04:48.806922 I2C: 00:1a enabled
986 19:04:48.810326 I2C: 00:31 enabled
987 19:04:48.813632 I2C: 00:32 enabled
988 19:04:48.817043 scan_static_bus for PCI: 00:15.0 done
989 19:04:48.821084 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 19:04:48.824521 PCI: 00:15.1 scanning...
991 19:04:48.827430 scan_static_bus for PCI: 00:15.1
992 19:04:48.827600 I2C: 00:10 enabled
993 19:04:48.834929 scan_static_bus for PCI: 00:15.1 done
994 19:04:48.837610 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 19:04:48.840808 PCI: 00:15.2 scanning...
996 19:04:48.844690 scan_static_bus for PCI: 00:15.2
997 19:04:48.848042 scan_static_bus for PCI: 00:15.2 done
998 19:04:48.850853 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 19:04:48.854262 PCI: 00:15.3 scanning...
1000 19:04:48.857485 scan_static_bus for PCI: 00:15.3
1001 19:04:48.860755 scan_static_bus for PCI: 00:15.3 done
1002 19:04:48.867728 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 19:04:48.870966 PCI: 00:19.1 scanning...
1004 19:04:48.874159 scan_static_bus for PCI: 00:19.1
1005 19:04:48.874624 I2C: 00:15 enabled
1006 19:04:48.877452 scan_static_bus for PCI: 00:19.1 done
1007 19:04:48.884303 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 19:04:48.887635 PCI: 00:1d.0 scanning...
1009 19:04:48.890789 do_pci_scan_bridge for PCI: 00:1d.0
1010 19:04:48.894203 PCI: pci_scan_bus for bus 01
1011 19:04:48.897971 PCI: 01:00.0 [1c5c/174a] enabled
1012 19:04:48.898476 GENERIC: 0.0 enabled
1013 19:04:48.903951 Enabling Common Clock Configuration
1014 19:04:48.907506 L1 Sub-State supported from root port 29
1015 19:04:48.911194 L1 Sub-State Support = 0xf
1016 19:04:48.913759 CommonModeRestoreTime = 0x28
1017 19:04:48.917562 Power On Value = 0x16, Power On Scale = 0x0
1018 19:04:48.918025 ASPM: Enabled L1
1019 19:04:48.923855 PCIe: Max_Payload_Size adjusted to 128
1020 19:04:48.927496 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 19:04:48.930451 PCI: 00:1e.2 scanning...
1022 19:04:48.934268 scan_generic_bus for PCI: 00:1e.2
1023 19:04:48.934722 SPI: 00 enabled
1024 19:04:48.940423 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 19:04:48.946832 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 19:04:48.947308 PCI: 00:1e.3 scanning...
1027 19:04:48.953827 scan_generic_bus for PCI: 00:1e.3
1028 19:04:48.954335 SPI: 00 enabled
1029 19:04:48.960081 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 19:04:48.963663 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 19:04:48.967033 PCI: 00:1f.0 scanning...
1032 19:04:48.970034 scan_static_bus for PCI: 00:1f.0
1033 19:04:48.973728 PNP: 0c09.0 enabled
1034 19:04:48.974258 PNP: 0c09.0 scanning...
1035 19:04:48.977129 scan_static_bus for PNP: 0c09.0
1036 19:04:48.984168 scan_static_bus for PNP: 0c09.0 done
1037 19:04:48.987337 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 19:04:48.990686 scan_static_bus for PCI: 00:1f.0 done
1039 19:04:48.997381 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 19:04:48.997839 PCI: 00:1f.2 scanning...
1041 19:04:49.000141 scan_static_bus for PCI: 00:1f.2
1042 19:04:49.003915 GENERIC: 0.0 enabled
1043 19:04:49.006764 GENERIC: 0.0 scanning...
1044 19:04:49.010246 scan_static_bus for GENERIC: 0.0
1045 19:04:49.013897 GENERIC: 0.0 enabled
1046 19:04:49.014379 GENERIC: 1.0 enabled
1047 19:04:49.017516 scan_static_bus for GENERIC: 0.0 done
1048 19:04:49.024064 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 19:04:49.026968 scan_static_bus for PCI: 00:1f.2 done
1050 19:04:49.030056 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 19:04:49.033299 PCI: 00:1f.3 scanning...
1052 19:04:49.036413 scan_static_bus for PCI: 00:1f.3
1053 19:04:49.040349 scan_static_bus for PCI: 00:1f.3 done
1054 19:04:49.046704 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 19:04:49.049868 PCI: 00:1f.5 scanning...
1056 19:04:49.053259 scan_generic_bus for PCI: 00:1f.5
1057 19:04:49.056802 scan_generic_bus for PCI: 00:1f.5 done
1058 19:04:49.059542 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 19:04:49.066365 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1060 19:04:49.069859 scan_static_bus for Root Device done
1061 19:04:49.072922 scan_bus: bus Root Device finished in 737 msecs
1062 19:04:49.076747 done
1063 19:04:49.079761 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 19:04:49.083371 Chrome EC: UHEPI supported
1065 19:04:49.089860 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 19:04:49.096309 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 19:04:49.099354 SPI flash protection: WPSW=0 SRP0=0
1068 19:04:49.106204 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 19:04:49.109590 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 19:04:49.112802 found VGA at PCI: 00:02.0
1071 19:04:49.116105 Setting up VGA for PCI: 00:02.0
1072 19:04:49.122621 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 19:04:49.126041 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 19:04:49.129466 Allocating resources...
1075 19:04:49.132594 Reading resources...
1076 19:04:49.136367 Root Device read_resources bus 0 link: 0
1077 19:04:49.139295 DOMAIN: 0000 read_resources bus 0 link: 0
1078 19:04:49.146207 PCI: 00:04.0 read_resources bus 1 link: 0
1079 19:04:49.149275 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 19:04:49.155974 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 19:04:49.159394 USB0 port 0 read_resources bus 0 link: 0
1082 19:04:49.165834 USB0 port 0 read_resources bus 0 link: 0 done
1083 19:04:49.169357 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 19:04:49.175733 PCI: 00:14.0 read_resources bus 0 link: 0
1085 19:04:49.179257 USB0 port 0 read_resources bus 0 link: 0
1086 19:04:49.185686 USB0 port 0 read_resources bus 0 link: 0 done
1087 19:04:49.188794 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 19:04:49.195329 PCI: 00:14.3 read_resources bus 0 link: 0
1089 19:04:49.199150 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 19:04:49.205425 PCI: 00:15.0 read_resources bus 0 link: 0
1091 19:04:49.208463 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 19:04:49.215274 PCI: 00:15.1 read_resources bus 0 link: 0
1093 19:04:49.218163 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 19:04:49.225642 PCI: 00:19.1 read_resources bus 0 link: 0
1095 19:04:49.228645 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 19:04:49.235933 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 19:04:49.238996 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 19:04:49.245301 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 19:04:49.248829 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 19:04:49.255291 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 19:04:49.258991 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 19:04:49.264841 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 19:04:49.268681 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 19:04:49.274843 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 19:04:49.278610 GENERIC: 0.0 read_resources bus 0 link: 0
1106 19:04:49.282065 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 19:04:49.288500 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 19:04:49.295117 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 19:04:49.298248 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 19:04:49.305201 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 19:04:49.308429 Root Device read_resources bus 0 link: 0 done
1112 19:04:49.311751 Done reading resources.
1113 19:04:49.315011 Show resources in subtree (Root Device)...After reading.
1114 19:04:49.321338 Root Device child on link 0 DOMAIN: 0000
1115 19:04:49.324731 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 19:04:49.334695 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 19:04:49.344705 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 19:04:49.345202 PCI: 00:00.0
1119 19:04:49.354381 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 19:04:49.364892 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 19:04:49.374552 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 19:04:49.384545 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 19:04:49.394108 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 19:04:49.401734 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 19:04:49.411188 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 19:04:49.421027 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 19:04:49.430799 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 19:04:49.441291 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 19:04:49.450438 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 19:04:49.458006 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 19:04:49.467643 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 19:04:49.477378 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 19:04:49.487061 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 19:04:49.497839 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 19:04:49.507240 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 19:04:49.513900 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 19:04:49.523803 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 19:04:49.533581 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 19:04:49.537024 PCI: 00:02.0
1140 19:04:49.547718 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 19:04:49.559952 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 19:04:49.563401 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 19:04:49.570182 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 19:04:49.580450 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 19:04:49.580909 GENERIC: 0.0
1146 19:04:49.583141 PCI: 00:05.0
1147 19:04:49.593148 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 19:04:49.596480 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 19:04:49.599950 GENERIC: 0.0
1150 19:04:49.600401 PCI: 00:08.0
1151 19:04:49.609681 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 19:04:49.614127 PCI: 00:0a.0
1153 19:04:49.616723 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 19:04:49.626446 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 19:04:49.633259 USB0 port 0 child on link 0 USB3 port 0
1156 19:04:49.633720 USB3 port 0
1157 19:04:49.636784 USB3 port 1
1158 19:04:49.637380 USB3 port 2
1159 19:04:49.640189 USB3 port 3
1160 19:04:49.643071 PCI: 00:14.0 child on link 0 USB0 port 0
1161 19:04:49.653908 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 19:04:49.656804 USB0 port 0 child on link 0 USB2 port 0
1163 19:04:49.659798 USB2 port 0
1164 19:04:49.660273 USB2 port 1
1165 19:04:49.663266 USB2 port 2
1166 19:04:49.663714 USB2 port 3
1167 19:04:49.666783 USB2 port 4
1168 19:04:49.669915 USB2 port 5
1169 19:04:49.670406 USB2 port 6
1170 19:04:49.673745 USB2 port 7
1171 19:04:49.674235 USB2 port 8
1172 19:04:49.676648 USB2 port 9
1173 19:04:49.677096 USB3 port 0
1174 19:04:49.679681 USB3 port 1
1175 19:04:49.680133 USB3 port 2
1176 19:04:49.683183 USB3 port 3
1177 19:04:49.683631 PCI: 00:14.2
1178 19:04:49.692559 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 19:04:49.703242 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 19:04:49.709354 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 19:04:49.719306 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 19:04:49.719807 GENERIC: 0.0
1183 19:04:49.722844 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 19:04:49.732698 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 19:04:49.736144 I2C: 00:1a
1186 19:04:49.736591 I2C: 00:31
1187 19:04:49.739463 I2C: 00:32
1188 19:04:49.742742 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 19:04:49.752826 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 19:04:49.755582 I2C: 00:10
1191 19:04:49.756040 PCI: 00:15.2
1192 19:04:49.765744 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 19:04:49.768964 PCI: 00:15.3
1194 19:04:49.779285 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 19:04:49.779753 PCI: 00:16.0
1196 19:04:49.788965 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 19:04:49.792814 PCI: 00:19.0
1198 19:04:49.795631 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 19:04:49.805768 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 19:04:49.806289 I2C: 00:15
1201 19:04:49.811983 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 19:04:49.818794 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 19:04:49.829043 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 19:04:49.838583 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 19:04:49.841815 GENERIC: 0.0
1206 19:04:49.842344 PCI: 01:00.0
1207 19:04:49.852187 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 19:04:49.862217 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 19:04:49.871967 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 19:04:49.872425 PCI: 00:1e.0
1211 19:04:49.885507 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 19:04:49.888642 PCI: 00:1e.2 child on link 0 SPI: 00
1213 19:04:49.898361 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 19:04:49.898943 SPI: 00
1215 19:04:49.902727 PCI: 00:1e.3 child on link 0 SPI: 00
1216 19:04:49.911893 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 19:04:49.915109 SPI: 00
1218 19:04:49.918462 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 19:04:49.928614 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 19:04:49.929181 PNP: 0c09.0
1221 19:04:49.938039 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 19:04:49.941707 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 19:04:49.951367 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 19:04:49.961575 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 19:04:49.964759 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 19:04:49.968084 GENERIC: 0.0
1227 19:04:49.968535 GENERIC: 1.0
1228 19:04:49.971528 PCI: 00:1f.3
1229 19:04:49.981563 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 19:04:49.991334 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 19:04:49.994979 PCI: 00:1f.5
1232 19:04:50.001496 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 19:04:50.007616 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 19:04:50.007712 APIC: 00
1235 19:04:50.007784 APIC: 01
1236 19:04:50.010358 APIC: 03
1237 19:04:50.010446 APIC: 05
1238 19:04:50.014320 APIC: 07
1239 19:04:50.014450 APIC: 06
1240 19:04:50.014520 APIC: 02
1241 19:04:50.017207 APIC: 04
1242 19:04:50.023947 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 19:04:50.030609 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 19:04:50.037395 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 19:04:50.040989 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 19:04:50.047466 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 19:04:50.050823 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 19:04:50.054083 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 19:04:50.060398 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 19:04:50.070807 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 19:04:50.077060 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 19:04:50.083724 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 19:04:50.090576 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 19:04:50.097466 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 19:04:50.106991 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 19:04:50.114427 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 19:04:50.117467 DOMAIN: 0000: Resource ranges:
1258 19:04:50.120250 * Base: 1000, Size: 800, Tag: 100
1259 19:04:50.123508 * Base: 1900, Size: e700, Tag: 100
1260 19:04:50.130244 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 19:04:50.136953 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 19:04:50.143733 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 19:04:50.150089 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 19:04:50.156970 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 19:04:50.167173 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 19:04:50.173128 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 19:04:50.179841 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 19:04:50.189863 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 19:04:50.196380 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 19:04:50.203224 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 19:04:50.213203 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 19:04:50.219462 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 19:04:50.226386 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 19:04:50.236238 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 19:04:50.242848 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 19:04:50.249959 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 19:04:50.256353 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 19:04:50.266589 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 19:04:50.273346 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 19:04:50.282939 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 19:04:50.289321 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 19:04:50.296142 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 19:04:50.302514 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 19:04:50.312553 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 19:04:50.316047 DOMAIN: 0000: Resource ranges:
1286 19:04:50.319271 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 19:04:50.322628 * Base: d0000000, Size: 28000000, Tag: 200
1288 19:04:50.329347 * Base: fa000000, Size: 1000000, Tag: 200
1289 19:04:50.332520 * Base: fb001000, Size: 2fff000, Tag: 200
1290 19:04:50.336138 * Base: fe010000, Size: 2e000, Tag: 200
1291 19:04:50.342869 * Base: fe03f000, Size: d41000, Tag: 200
1292 19:04:50.345636 * Base: fed88000, Size: 8000, Tag: 200
1293 19:04:50.348984 * Base: fed93000, Size: d000, Tag: 200
1294 19:04:50.352331 * Base: feda2000, Size: 1e000, Tag: 200
1295 19:04:50.355713 * Base: fede0000, Size: 1220000, Tag: 200
1296 19:04:50.362180 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 19:04:50.368598 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 19:04:50.375474 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 19:04:50.382072 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 19:04:50.388769 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 19:04:50.395257 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 19:04:50.402161 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 19:04:50.408566 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 19:04:50.415088 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 19:04:50.421915 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 19:04:50.428495 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 19:04:50.435043 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 19:04:50.442302 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 19:04:50.448375 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 19:04:50.455026 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 19:04:50.461492 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 19:04:50.468971 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 19:04:50.474917 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 19:04:50.481505 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 19:04:50.488590 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 19:04:50.495181 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 19:04:50.501393 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 19:04:50.507917 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 19:04:50.514609 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 19:04:50.524328 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 19:04:50.527713 PCI: 00:1d.0: Resource ranges:
1322 19:04:50.531517 * Base: 7fc00000, Size: 100000, Tag: 200
1323 19:04:50.537907 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 19:04:50.544287 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 19:04:50.551081 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 19:04:50.561135 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 19:04:50.567731 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 19:04:50.571053 Root Device assign_resources, bus 0 link: 0
1329 19:04:50.574484 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 19:04:50.584523 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 19:04:50.591449 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 19:04:50.601824 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 19:04:50.607576 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 19:04:50.614860 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 19:04:50.617600 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 19:04:50.627640 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 19:04:50.634556 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 19:04:50.644324 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 19:04:50.648476 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 19:04:50.650519 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 19:04:50.660783 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 19:04:50.664547 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 19:04:50.671141 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 19:04:50.677183 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 19:04:50.683814 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 19:04:50.694338 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 19:04:50.697254 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 19:04:50.704206 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 19:04:50.710596 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 19:04:50.717009 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 19:04:50.720312 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 19:04:50.731165 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 19:04:50.734100 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 19:04:50.737281 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 19:04:50.746829 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 19:04:50.753393 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 19:04:50.763625 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 19:04:50.770036 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 19:04:50.776718 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 19:04:50.779886 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 19:04:50.789946 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 19:04:50.800122 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 19:04:50.806215 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 19:04:50.812953 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 19:04:50.819743 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 19:04:50.830196 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 19:04:50.835812 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 19:04:50.839374 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 19:04:50.849688 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 19:04:50.852539 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 19:04:50.859655 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 19:04:50.865574 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 19:04:50.872319 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 19:04:50.876395 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 19:04:50.878974 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 19:04:50.885858 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 19:04:50.889592 LPC: Trying to open IO window from 800 size 1ff
1378 19:04:50.899430 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 19:04:50.906025 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 19:04:50.915848 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 19:04:50.918938 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 19:04:50.926090 Root Device assign_resources, bus 0 link: 0
1383 19:04:50.926672 Done setting resources.
1384 19:04:50.932170 Show resources in subtree (Root Device)...After assigning values.
1385 19:04:50.938495 Root Device child on link 0 DOMAIN: 0000
1386 19:04:50.942219 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 19:04:50.952255 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 19:04:50.961947 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 19:04:50.962486 PCI: 00:00.0
1390 19:04:50.972144 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 19:04:50.981895 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 19:04:50.991978 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 19:04:51.001770 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 19:04:51.008279 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 19:04:51.017986 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 19:04:51.028478 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 19:04:51.037905 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 19:04:51.048127 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 19:04:51.055124 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 19:04:51.065221 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 19:04:51.075016 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 19:04:51.084680 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 19:04:51.094645 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 19:04:51.101455 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 19:04:51.111243 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 19:04:51.121165 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 19:04:51.131152 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 19:04:51.141859 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 19:04:51.150900 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 19:04:51.151476 PCI: 00:02.0
1411 19:04:51.164469 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 19:04:51.174072 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 19:04:51.184288 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 19:04:51.188227 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 19:04:51.198236 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 19:04:51.200853 GENERIC: 0.0
1417 19:04:51.201311 PCI: 00:05.0
1418 19:04:51.210858 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 19:04:51.217285 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 19:04:51.217738 GENERIC: 0.0
1421 19:04:51.220418 PCI: 00:08.0
1422 19:04:51.229927 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 19:04:51.230013 PCI: 00:0a.0
1424 19:04:51.236973 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 19:04:51.247000 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 19:04:51.250050 USB0 port 0 child on link 0 USB3 port 0
1427 19:04:51.253291 USB3 port 0
1428 19:04:51.253413 USB3 port 1
1429 19:04:51.257212 USB3 port 2
1430 19:04:51.257335 USB3 port 3
1431 19:04:51.263806 PCI: 00:14.0 child on link 0 USB0 port 0
1432 19:04:51.272987 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 19:04:51.276840 USB0 port 0 child on link 0 USB2 port 0
1434 19:04:51.280239 USB2 port 0
1435 19:04:51.280432 USB2 port 1
1436 19:04:51.283343 USB2 port 2
1437 19:04:51.283604 USB2 port 3
1438 19:04:51.286961 USB2 port 4
1439 19:04:51.287229 USB2 port 5
1440 19:04:51.290099 USB2 port 6
1441 19:04:51.290481 USB2 port 7
1442 19:04:51.293275 USB2 port 8
1443 19:04:51.293757 USB2 port 9
1444 19:04:51.296694 USB3 port 0
1445 19:04:51.300116 USB3 port 1
1446 19:04:51.300572 USB3 port 2
1447 19:04:51.303514 USB3 port 3
1448 19:04:51.303971 PCI: 00:14.2
1449 19:04:51.313330 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 19:04:51.323340 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 19:04:51.329837 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 19:04:51.340099 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 19:04:51.340557 GENERIC: 0.0
1454 19:04:51.347341 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 19:04:51.357116 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 19:04:51.357587 I2C: 00:1a
1457 19:04:51.359959 I2C: 00:31
1458 19:04:51.360410 I2C: 00:32
1459 19:04:51.363424 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 19:04:51.376145 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 19:04:51.376703 I2C: 00:10
1462 19:04:51.379380 PCI: 00:15.2
1463 19:04:51.389881 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 19:04:51.390383 PCI: 00:15.3
1465 19:04:51.399543 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 19:04:51.403208 PCI: 00:16.0
1467 19:04:51.412706 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 19:04:51.413180 PCI: 00:19.0
1469 19:04:51.419698 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 19:04:51.429626 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 19:04:51.430083 I2C: 00:15
1472 19:04:51.436077 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 19:04:51.446381 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 19:04:51.456176 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 19:04:51.465852 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 19:04:51.469675 GENERIC: 0.0
1477 19:04:51.470123 PCI: 01:00.0
1478 19:04:51.478775 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 19:04:51.492181 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 19:04:51.502396 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 19:04:51.502884 PCI: 00:1e.0
1482 19:04:51.515269 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 19:04:51.519305 PCI: 00:1e.2 child on link 0 SPI: 00
1484 19:04:51.529375 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 19:04:51.529937 SPI: 00
1486 19:04:51.531938 PCI: 00:1e.3 child on link 0 SPI: 00
1487 19:04:51.545373 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 19:04:51.545981 SPI: 00
1489 19:04:51.548656 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 19:04:51.558492 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 19:04:51.558987 PNP: 0c09.0
1492 19:04:51.568355 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 19:04:51.572379 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 19:04:51.582572 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 19:04:51.592148 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 19:04:51.595110 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 19:04:51.598961 GENERIC: 0.0
1498 19:04:51.601867 GENERIC: 1.0
1499 19:04:51.602450 PCI: 00:1f.3
1500 19:04:51.611741 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 19:04:51.621402 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 19:04:51.624618 PCI: 00:1f.5
1503 19:04:51.635360 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 19:04:51.638489 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 19:04:51.641738 APIC: 00
1506 19:04:51.642254 APIC: 01
1507 19:04:51.642618 APIC: 03
1508 19:04:51.644725 APIC: 05
1509 19:04:51.645175 APIC: 07
1510 19:04:51.648981 APIC: 06
1511 19:04:51.649588 APIC: 02
1512 19:04:51.649973 APIC: 04
1513 19:04:51.651276 Done allocating resources.
1514 19:04:51.658107 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 19:04:51.664650 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 19:04:51.667660 Configure GPIOs for I2S audio on UP4.
1517 19:04:51.674971 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 19:04:51.677938 Enabling resources...
1519 19:04:51.681012 PCI: 00:00.0 subsystem <- 8086/9a12
1520 19:04:51.684820 PCI: 00:00.0 cmd <- 06
1521 19:04:51.688151 PCI: 00:02.0 subsystem <- 8086/9a40
1522 19:04:51.691549 PCI: 00:02.0 cmd <- 03
1523 19:04:51.694012 PCI: 00:04.0 subsystem <- 8086/9a03
1524 19:04:51.697223 PCI: 00:04.0 cmd <- 02
1525 19:04:51.700827 PCI: 00:05.0 subsystem <- 8086/9a19
1526 19:04:51.701402 PCI: 00:05.0 cmd <- 02
1527 19:04:51.707392 PCI: 00:08.0 subsystem <- 8086/9a11
1528 19:04:51.707851 PCI: 00:08.0 cmd <- 06
1529 19:04:51.711221 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 19:04:51.714072 PCI: 00:0d.0 cmd <- 02
1531 19:04:51.717197 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 19:04:51.721092 PCI: 00:14.0 cmd <- 02
1533 19:04:51.724128 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 19:04:51.727402 PCI: 00:14.2 cmd <- 02
1535 19:04:51.730597 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 19:04:51.734021 PCI: 00:14.3 cmd <- 02
1537 19:04:51.737498 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 19:04:51.740439 PCI: 00:15.0 cmd <- 02
1539 19:04:51.743731 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 19:04:51.747428 PCI: 00:15.1 cmd <- 02
1541 19:04:51.750416 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 19:04:51.750915 PCI: 00:15.2 cmd <- 02
1543 19:04:51.757423 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 19:04:51.757983 PCI: 00:15.3 cmd <- 02
1545 19:04:51.761031 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 19:04:51.763497 PCI: 00:16.0 cmd <- 02
1547 19:04:51.767402 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 19:04:51.770367 PCI: 00:19.1 cmd <- 02
1549 19:04:51.773792 PCI: 00:1d.0 bridge ctrl <- 0013
1550 19:04:51.777290 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 19:04:51.780249 PCI: 00:1d.0 cmd <- 06
1552 19:04:51.783851 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 19:04:51.787572 PCI: 00:1e.0 cmd <- 06
1554 19:04:51.790202 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 19:04:51.793902 PCI: 00:1e.2 cmd <- 06
1556 19:04:51.797153 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 19:04:51.799935 PCI: 00:1e.3 cmd <- 02
1558 19:04:51.803335 PCI: 00:1f.0 subsystem <- 8086/a087
1559 19:04:51.803787 PCI: 00:1f.0 cmd <- 407
1560 19:04:51.810385 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 19:04:51.810831 PCI: 00:1f.3 cmd <- 02
1562 19:04:51.813851 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 19:04:51.817167 PCI: 00:1f.5 cmd <- 406
1564 19:04:51.821615 PCI: 01:00.0 cmd <- 02
1565 19:04:51.826176 done.
1566 19:04:51.829426 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 19:04:51.832924 Initializing devices...
1568 19:04:51.836563 Root Device init
1569 19:04:51.839910 Chrome EC: Set SMI mask to 0x0000000000000000
1570 19:04:51.846572 Chrome EC: clear events_b mask to 0x0000000000000000
1571 19:04:51.853368 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 19:04:51.859813 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 19:04:51.866195 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 19:04:51.869850 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 19:04:51.877223 fw_config match found: DB_USB=USB3_ACTIVE
1576 19:04:51.880404 Configure Right Type-C port orientation for retimer
1577 19:04:51.883836 Root Device init finished in 46 msecs
1578 19:04:51.888184 PCI: 00:00.0 init
1579 19:04:51.891864 CPU TDP = 9 Watts
1580 19:04:51.892436 CPU PL1 = 9 Watts
1581 19:04:51.895430 CPU PL2 = 40 Watts
1582 19:04:51.898069 CPU PL4 = 83 Watts
1583 19:04:51.901589 PCI: 00:00.0 init finished in 8 msecs
1584 19:04:51.902275 PCI: 00:02.0 init
1585 19:04:51.904387 GMA: Found VBT in CBFS
1586 19:04:51.907973 GMA: Found valid VBT in CBFS
1587 19:04:51.915034 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 19:04:51.921159 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 19:04:51.924242 PCI: 00:02.0 init finished in 18 msecs
1590 19:04:51.928094 PCI: 00:05.0 init
1591 19:04:51.931121 PCI: 00:05.0 init finished in 0 msecs
1592 19:04:51.934742 PCI: 00:08.0 init
1593 19:04:51.937714 PCI: 00:08.0 init finished in 0 msecs
1594 19:04:51.940959 PCI: 00:14.0 init
1595 19:04:51.944220 PCI: 00:14.0 init finished in 0 msecs
1596 19:04:51.947533 PCI: 00:14.2 init
1597 19:04:51.950742 PCI: 00:14.2 init finished in 0 msecs
1598 19:04:51.954196 PCI: 00:15.0 init
1599 19:04:51.957643 I2C bus 0 version 0x3230302a
1600 19:04:51.960572 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 19:04:51.964415 PCI: 00:15.0 init finished in 6 msecs
1602 19:04:51.964893 PCI: 00:15.1 init
1603 19:04:51.967482 I2C bus 1 version 0x3230302a
1604 19:04:51.971299 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 19:04:51.977458 PCI: 00:15.1 init finished in 6 msecs
1606 19:04:51.977914 PCI: 00:15.2 init
1607 19:04:51.980676 I2C bus 2 version 0x3230302a
1608 19:04:51.984130 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 19:04:51.987620 PCI: 00:15.2 init finished in 6 msecs
1610 19:04:51.990844 PCI: 00:15.3 init
1611 19:04:51.994027 I2C bus 3 version 0x3230302a
1612 19:04:51.997951 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 19:04:52.000889 PCI: 00:15.3 init finished in 6 msecs
1614 19:04:52.004434 PCI: 00:16.0 init
1615 19:04:52.007381 PCI: 00:16.0 init finished in 0 msecs
1616 19:04:52.010861 PCI: 00:19.1 init
1617 19:04:52.014052 I2C bus 5 version 0x3230302a
1618 19:04:52.017867 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 19:04:52.020949 PCI: 00:19.1 init finished in 6 msecs
1620 19:04:52.024173 PCI: 00:1d.0 init
1621 19:04:52.024729 Initializing PCH PCIe bridge.
1622 19:04:52.030556 PCI: 00:1d.0 init finished in 3 msecs
1623 19:04:52.033537 PCI: 00:1f.0 init
1624 19:04:52.037397 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 19:04:52.040305 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 19:04:52.043881 IOAPIC: ID = 0x02
1627 19:04:52.047111 IOAPIC: Dumping registers
1628 19:04:52.047670 reg 0x0000: 0x02000000
1629 19:04:52.050489 reg 0x0001: 0x00770020
1630 19:04:52.053537 reg 0x0002: 0x00000000
1631 19:04:52.057280 PCI: 00:1f.0 init finished in 21 msecs
1632 19:04:52.060325 PCI: 00:1f.2 init
1633 19:04:52.064301 Disabling ACPI via APMC.
1634 19:04:52.064779 APMC done.
1635 19:04:52.070084 PCI: 00:1f.2 init finished in 5 msecs
1636 19:04:52.081165 PCI: 01:00.0 init
1637 19:04:52.084325 PCI: 01:00.0 init finished in 0 msecs
1638 19:04:52.088069 PNP: 0c09.0 init
1639 19:04:52.091068 Google Chrome EC uptime: 8.407 seconds
1640 19:04:52.097451 Google Chrome AP resets since EC boot: 1
1641 19:04:52.100838 Google Chrome most recent AP reset causes:
1642 19:04:52.104053 0.347: 32775 shutdown: entering G3
1643 19:04:52.111025 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1644 19:04:52.114164 PNP: 0c09.0 init finished in 22 msecs
1645 19:04:52.120221 Devices initialized
1646 19:04:52.123550 Show all devs... After init.
1647 19:04:52.126952 Root Device: enabled 1
1648 19:04:52.127412 DOMAIN: 0000: enabled 1
1649 19:04:52.129608 CPU_CLUSTER: 0: enabled 1
1650 19:04:52.133307 PCI: 00:00.0: enabled 1
1651 19:04:52.136484 PCI: 00:02.0: enabled 1
1652 19:04:52.136953 PCI: 00:04.0: enabled 1
1653 19:04:52.139748 PCI: 00:05.0: enabled 1
1654 19:04:52.143062 PCI: 00:06.0: enabled 0
1655 19:04:52.146394 PCI: 00:07.0: enabled 0
1656 19:04:52.146947 PCI: 00:07.1: enabled 0
1657 19:04:52.149916 PCI: 00:07.2: enabled 0
1658 19:04:52.152929 PCI: 00:07.3: enabled 0
1659 19:04:52.156005 PCI: 00:08.0: enabled 1
1660 19:04:52.156636 PCI: 00:09.0: enabled 0
1661 19:04:52.159546 PCI: 00:0a.0: enabled 0
1662 19:04:52.163128 PCI: 00:0d.0: enabled 1
1663 19:04:52.166051 PCI: 00:0d.1: enabled 0
1664 19:04:52.166588 PCI: 00:0d.2: enabled 0
1665 19:04:52.169411 PCI: 00:0d.3: enabled 0
1666 19:04:52.173399 PCI: 00:0e.0: enabled 0
1667 19:04:52.173850 PCI: 00:10.2: enabled 1
1668 19:04:52.175965 PCI: 00:10.6: enabled 0
1669 19:04:52.179706 PCI: 00:10.7: enabled 0
1670 19:04:52.182967 PCI: 00:12.0: enabled 0
1671 19:04:52.183423 PCI: 00:12.6: enabled 0
1672 19:04:52.186271 PCI: 00:13.0: enabled 0
1673 19:04:52.189674 PCI: 00:14.0: enabled 1
1674 19:04:52.192797 PCI: 00:14.1: enabled 0
1675 19:04:52.193276 PCI: 00:14.2: enabled 1
1676 19:04:52.196252 PCI: 00:14.3: enabled 1
1677 19:04:52.199307 PCI: 00:15.0: enabled 1
1678 19:04:52.202594 PCI: 00:15.1: enabled 1
1679 19:04:52.203045 PCI: 00:15.2: enabled 1
1680 19:04:52.206437 PCI: 00:15.3: enabled 1
1681 19:04:52.209549 PCI: 00:16.0: enabled 1
1682 19:04:52.213223 PCI: 00:16.1: enabled 0
1683 19:04:52.213791 PCI: 00:16.2: enabled 0
1684 19:04:52.216573 PCI: 00:16.3: enabled 0
1685 19:04:52.219863 PCI: 00:16.4: enabled 0
1686 19:04:52.220403 PCI: 00:16.5: enabled 0
1687 19:04:52.222630 PCI: 00:17.0: enabled 0
1688 19:04:52.225930 PCI: 00:19.0: enabled 0
1689 19:04:52.229099 PCI: 00:19.1: enabled 1
1690 19:04:52.229582 PCI: 00:19.2: enabled 0
1691 19:04:52.232661 PCI: 00:1c.0: enabled 1
1692 19:04:52.235892 PCI: 00:1c.1: enabled 0
1693 19:04:52.238940 PCI: 00:1c.2: enabled 0
1694 19:04:52.239390 PCI: 00:1c.3: enabled 0
1695 19:04:52.242383 PCI: 00:1c.4: enabled 0
1696 19:04:52.245565 PCI: 00:1c.5: enabled 0
1697 19:04:52.249373 PCI: 00:1c.6: enabled 1
1698 19:04:52.249852 PCI: 00:1c.7: enabled 0
1699 19:04:52.252805 PCI: 00:1d.0: enabled 1
1700 19:04:52.255725 PCI: 00:1d.1: enabled 0
1701 19:04:52.258870 PCI: 00:1d.2: enabled 1
1702 19:04:52.259321 PCI: 00:1d.3: enabled 0
1703 19:04:52.262534 PCI: 00:1e.0: enabled 1
1704 19:04:52.265608 PCI: 00:1e.1: enabled 0
1705 19:04:52.266061 PCI: 00:1e.2: enabled 1
1706 19:04:52.268993 PCI: 00:1e.3: enabled 1
1707 19:04:52.272066 PCI: 00:1f.0: enabled 1
1708 19:04:52.275907 PCI: 00:1f.1: enabled 0
1709 19:04:52.276359 PCI: 00:1f.2: enabled 1
1710 19:04:52.278812 PCI: 00:1f.3: enabled 1
1711 19:04:52.282172 PCI: 00:1f.4: enabled 0
1712 19:04:52.285787 PCI: 00:1f.5: enabled 1
1713 19:04:52.286274 PCI: 00:1f.6: enabled 0
1714 19:04:52.289086 PCI: 00:1f.7: enabled 0
1715 19:04:52.292016 APIC: 00: enabled 1
1716 19:04:52.292468 GENERIC: 0.0: enabled 1
1717 19:04:52.295355 GENERIC: 0.0: enabled 1
1718 19:04:52.298655 GENERIC: 1.0: enabled 1
1719 19:04:52.302234 GENERIC: 0.0: enabled 1
1720 19:04:52.302668 GENERIC: 1.0: enabled 1
1721 19:04:52.305234 USB0 port 0: enabled 1
1722 19:04:52.309078 GENERIC: 0.0: enabled 1
1723 19:04:52.312366 USB0 port 0: enabled 1
1724 19:04:52.312813 GENERIC: 0.0: enabled 1
1725 19:04:52.315120 I2C: 00:1a: enabled 1
1726 19:04:52.318575 I2C: 00:31: enabled 1
1727 19:04:52.319089 I2C: 00:32: enabled 1
1728 19:04:52.322333 I2C: 00:10: enabled 1
1729 19:04:52.325140 I2C: 00:15: enabled 1
1730 19:04:52.325591 GENERIC: 0.0: enabled 0
1731 19:04:52.328660 GENERIC: 1.0: enabled 0
1732 19:04:52.331765 GENERIC: 0.0: enabled 1
1733 19:04:52.334946 SPI: 00: enabled 1
1734 19:04:52.335398 SPI: 00: enabled 1
1735 19:04:52.338607 PNP: 0c09.0: enabled 1
1736 19:04:52.342201 GENERIC: 0.0: enabled 1
1737 19:04:52.342816 USB3 port 0: enabled 1
1738 19:04:52.345321 USB3 port 1: enabled 1
1739 19:04:52.348458 USB3 port 2: enabled 0
1740 19:04:52.348909 USB3 port 3: enabled 0
1741 19:04:52.351823 USB2 port 0: enabled 0
1742 19:04:52.354929 USB2 port 1: enabled 1
1743 19:04:52.355382 USB2 port 2: enabled 1
1744 19:04:52.358512 USB2 port 3: enabled 0
1745 19:04:52.361975 USB2 port 4: enabled 1
1746 19:04:52.364699 USB2 port 5: enabled 0
1747 19:04:52.365150 USB2 port 6: enabled 0
1748 19:04:52.368618 USB2 port 7: enabled 0
1749 19:04:52.371552 USB2 port 8: enabled 0
1750 19:04:52.372049 USB2 port 9: enabled 0
1751 19:04:52.374970 USB3 port 0: enabled 0
1752 19:04:52.378403 USB3 port 1: enabled 1
1753 19:04:52.381244 USB3 port 2: enabled 0
1754 19:04:52.381715 USB3 port 3: enabled 0
1755 19:04:52.384661 GENERIC: 0.0: enabled 1
1756 19:04:52.388181 GENERIC: 1.0: enabled 1
1757 19:04:52.388631 APIC: 01: enabled 1
1758 19:04:52.391339 APIC: 03: enabled 1
1759 19:04:52.394623 APIC: 05: enabled 1
1760 19:04:52.395084 APIC: 07: enabled 1
1761 19:04:52.397965 APIC: 06: enabled 1
1762 19:04:52.398458 APIC: 02: enabled 1
1763 19:04:52.401912 APIC: 04: enabled 1
1764 19:04:52.405288 PCI: 01:00.0: enabled 1
1765 19:04:52.408284 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1766 19:04:52.415354 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 19:04:52.418180 ELOG: NV offset 0xf30000 size 0x1000
1768 19:04:52.425075 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 19:04:52.432092 ELOG: Event(17) added with size 13 at 2023-02-22 19:04:52 UTC
1770 19:04:52.438049 ELOG: Event(92) added with size 9 at 2023-02-22 19:04:52 UTC
1771 19:04:52.445411 ELOG: Event(93) added with size 9 at 2023-02-22 19:04:52 UTC
1772 19:04:52.451381 ELOG: Event(9E) added with size 10 at 2023-02-22 19:04:52 UTC
1773 19:04:52.458186 ELOG: Event(9F) added with size 14 at 2023-02-22 19:04:52 UTC
1774 19:04:52.464703 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1775 19:04:52.468141 ELOG: Event(A1) added with size 10 at 2023-02-22 19:04:52 UTC
1776 19:04:52.474618 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1777 19:04:52.481207 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1778 19:04:52.484429 Finalize devices...
1779 19:04:52.484875 Devices finalized
1780 19:04:52.491126 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1781 19:04:52.497880 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1782 19:04:52.501164 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1783 19:04:52.508341 ME: HFSTS1 : 0x80030055
1784 19:04:52.511063 ME: HFSTS2 : 0x30280116
1785 19:04:52.514069 ME: HFSTS3 : 0x00000050
1786 19:04:52.520675 ME: HFSTS4 : 0x00004000
1787 19:04:52.524034 ME: HFSTS5 : 0x00000000
1788 19:04:52.531246 ME: HFSTS6 : 0x00400006
1789 19:04:52.534560 ME: Manufacturing Mode : YES
1790 19:04:52.537355 ME: SPI Protection Mode Enabled : NO
1791 19:04:52.540581 ME: FW Partition Table : OK
1792 19:04:52.544033 ME: Bringup Loader Failure : NO
1793 19:04:52.547641 ME: Firmware Init Complete : NO
1794 19:04:52.550530 ME: Boot Options Present : NO
1795 19:04:52.554068 ME: Update In Progress : NO
1796 19:04:52.560262 ME: D0i3 Support : YES
1797 19:04:52.563678 ME: Low Power State Enabled : NO
1798 19:04:52.566858 ME: CPU Replaced : YES
1799 19:04:52.570431 ME: CPU Replacement Valid : YES
1800 19:04:52.574229 ME: Current Working State : 5
1801 19:04:52.577565 ME: Current Operation State : 1
1802 19:04:52.580643 ME: Current Operation Mode : 3
1803 19:04:52.583916 ME: Error Code : 0
1804 19:04:52.587280 ME: Enhanced Debug Mode : NO
1805 19:04:52.593628 ME: CPU Debug Disabled : YES
1806 19:04:52.597097 ME: TXT Support : NO
1807 19:04:52.603419 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1808 19:04:52.609817 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1809 19:04:52.613474 CBFS: 'fallback/slic' not found.
1810 19:04:52.616261 ACPI: Writing ACPI tables at 76b01000.
1811 19:04:52.619856 ACPI: * FACS
1812 19:04:52.620303 ACPI: * DSDT
1813 19:04:52.623165 Ramoops buffer: 0x100000@0x76a00000.
1814 19:04:52.630127 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1815 19:04:52.632831 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1816 19:04:52.636291 Google Chrome EC: version:
1817 19:04:52.639538 ro: voema_v2.0.7540-147f8d37d1
1818 19:04:52.643287 rw: voema_v2.0.7540-147f8d37d1
1819 19:04:52.646898 running image: 2
1820 19:04:52.653071 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1821 19:04:52.655885 ACPI: * FADT
1822 19:04:52.656360 SCI is IRQ9
1823 19:04:52.659207 ACPI: added table 1/32, length now 40
1824 19:04:52.662575 ACPI: * SSDT
1825 19:04:52.666964 Found 1 CPU(s) with 8 core(s) each.
1826 19:04:52.669365 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1827 19:04:52.676786 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1828 19:04:52.679323 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1829 19:04:52.682931 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1830 19:04:52.689197 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1831 19:04:52.696378 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1832 19:04:52.699180 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1833 19:04:52.706012 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1834 19:04:52.712597 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1835 19:04:52.716339 \_SB.PCI0.RP09: Added StorageD3Enable property
1836 19:04:52.720158 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1837 19:04:52.725526 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1838 19:04:52.732846 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1839 19:04:52.735552 PS2K: Passing 80 keymaps to kernel
1840 19:04:52.742371 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1841 19:04:52.749266 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1842 19:04:52.755803 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1843 19:04:52.762484 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1844 19:04:52.769014 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1845 19:04:52.776213 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1846 19:04:52.782465 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1847 19:04:52.789093 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1848 19:04:52.792658 ACPI: added table 2/32, length now 44
1849 19:04:52.793112 ACPI: * MCFG
1850 19:04:52.799037 ACPI: added table 3/32, length now 48
1851 19:04:52.799522 ACPI: * TPM2
1852 19:04:52.802060 TPM2 log created at 0x769f0000
1853 19:04:52.805204 ACPI: added table 4/32, length now 52
1854 19:04:52.808635 ACPI: * MADT
1855 19:04:52.809089 SCI is IRQ9
1856 19:04:52.812113 ACPI: added table 5/32, length now 56
1857 19:04:52.815852 current = 76b09850
1858 19:04:52.816304 ACPI: * DMAR
1859 19:04:52.818979 ACPI: added table 6/32, length now 60
1860 19:04:52.825640 ACPI: added table 7/32, length now 64
1861 19:04:52.826108 ACPI: * HPET
1862 19:04:52.829224 ACPI: added table 8/32, length now 68
1863 19:04:52.832387 ACPI: done.
1864 19:04:52.832840 ACPI tables: 35216 bytes.
1865 19:04:52.835466 smbios_write_tables: 769ef000
1866 19:04:52.838703 EC returned error result code 3
1867 19:04:52.842192 Couldn't obtain OEM name from CBI
1868 19:04:52.845335 Create SMBIOS type 16
1869 19:04:52.849070 Create SMBIOS type 17
1870 19:04:52.852416 GENERIC: 0.0 (WIFI Device)
1871 19:04:52.852863 SMBIOS tables: 1750 bytes.
1872 19:04:52.858556 Writing table forward entry at 0x00000500
1873 19:04:52.865281 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1874 19:04:52.869025 Writing coreboot table at 0x76b25000
1875 19:04:52.875633 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1876 19:04:52.878994 1. 0000000000001000-000000000009ffff: RAM
1877 19:04:52.882103 2. 00000000000a0000-00000000000fffff: RESERVED
1878 19:04:52.888524 3. 0000000000100000-00000000769eefff: RAM
1879 19:04:52.891894 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1880 19:04:52.898864 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1881 19:04:52.905062 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1882 19:04:52.908439 7. 0000000077000000-000000007fbfffff: RESERVED
1883 19:04:52.911816 8. 00000000c0000000-00000000cfffffff: RESERVED
1884 19:04:52.918652 9. 00000000f8000000-00000000f9ffffff: RESERVED
1885 19:04:52.921643 10. 00000000fb000000-00000000fb000fff: RESERVED
1886 19:04:52.928336 11. 00000000fe000000-00000000fe00ffff: RESERVED
1887 19:04:52.931741 12. 00000000fed80000-00000000fed87fff: RESERVED
1888 19:04:52.938191 13. 00000000fed90000-00000000fed92fff: RESERVED
1889 19:04:52.941739 14. 00000000feda0000-00000000feda1fff: RESERVED
1890 19:04:52.948043 15. 00000000fedc0000-00000000feddffff: RESERVED
1891 19:04:52.951768 16. 0000000100000000-00000002803fffff: RAM
1892 19:04:52.955079 Passing 4 GPIOs to payload:
1893 19:04:52.958056 NAME | PORT | POLARITY | VALUE
1894 19:04:52.965184 lid | undefined | high | high
1895 19:04:52.971211 power | undefined | high | low
1896 19:04:52.974734 oprom | undefined | high | low
1897 19:04:52.981924 EC in RW | 0x000000e5 | high | high
1898 19:04:52.988390 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2588
1899 19:04:52.988843 coreboot table: 1576 bytes.
1900 19:04:52.994551 IMD ROOT 0. 0x76fff000 0x00001000
1901 19:04:52.997957 IMD SMALL 1. 0x76ffe000 0x00001000
1902 19:04:53.001244 FSP MEMORY 2. 0x76c4e000 0x003b0000
1903 19:04:53.004444 VPD 3. 0x76c4d000 0x00000367
1904 19:04:53.007745 RO MCACHE 4. 0x76c4c000 0x00000fdc
1905 19:04:53.011329 CONSOLE 5. 0x76c2c000 0x00020000
1906 19:04:53.014567 FMAP 6. 0x76c2b000 0x00000578
1907 19:04:53.018105 TIME STAMP 7. 0x76c2a000 0x00000910
1908 19:04:53.025045 VBOOT WORK 8. 0x76c16000 0x00014000
1909 19:04:53.027780 ROMSTG STCK 9. 0x76c15000 0x00001000
1910 19:04:53.031090 AFTER CAR 10. 0x76c0a000 0x0000b000
1911 19:04:53.034836 RAMSTAGE 11. 0x76b97000 0x00073000
1912 19:04:53.038479 REFCODE 12. 0x76b42000 0x00055000
1913 19:04:53.041317 SMM BACKUP 13. 0x76b32000 0x00010000
1914 19:04:53.044576 4f444749 14. 0x76b30000 0x00002000
1915 19:04:53.048026 EXT VBT15. 0x76b2d000 0x0000219f
1916 19:04:53.051102 COREBOOT 16. 0x76b25000 0x00008000
1917 19:04:53.057433 ACPI 17. 0x76b01000 0x00024000
1918 19:04:53.060872 ACPI GNVS 18. 0x76b00000 0x00001000
1919 19:04:53.064493 RAMOOPS 19. 0x76a00000 0x00100000
1920 19:04:53.067859 TPM2 TCGLOG20. 0x769f0000 0x00010000
1921 19:04:53.070982 SMBIOS 21. 0x769ef000 0x00000800
1922 19:04:53.074704 IMD small region:
1923 19:04:53.077507 IMD ROOT 0. 0x76ffec00 0x00000400
1924 19:04:53.080895 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1925 19:04:53.084983 POWER STATE 2. 0x76ffeb80 0x00000044
1926 19:04:53.087386 ROMSTAGE 3. 0x76ffeb60 0x00000004
1927 19:04:53.094260 MEM INFO 4. 0x76ffe980 0x000001e0
1928 19:04:53.097993 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1929 19:04:53.100718 MTRR: Physical address space:
1930 19:04:53.107384 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1931 19:04:53.113916 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1932 19:04:53.120982 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1933 19:04:53.127919 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1934 19:04:53.134070 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1935 19:04:53.140748 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1936 19:04:53.144351 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1937 19:04:53.150353 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 19:04:53.153905 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 19:04:53.157207 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 19:04:53.160668 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 19:04:53.167103 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 19:04:53.170519 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 19:04:53.173824 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 19:04:53.177213 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 19:04:53.183532 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 19:04:53.187224 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 19:04:53.190078 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 19:04:53.193499 call enable_fixed_mtrr()
1949 19:04:53.196919 CPU physical address size: 39 bits
1950 19:04:53.203375 MTRR: default type WB/UC MTRR counts: 6/6.
1951 19:04:53.207251 MTRR: UC selected as default type.
1952 19:04:53.213522 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1953 19:04:53.216853 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1954 19:04:53.223867 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1955 19:04:53.230474 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1956 19:04:53.236713 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1957 19:04:53.243273 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1958 19:04:53.243725
1959 19:04:53.246747 MTRR check
1960 19:04:53.250014 Fixed MTRRs : Enabled
1961 19:04:53.250517 Variable MTRRs: Enabled
1962 19:04:53.250876
1963 19:04:53.256730 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 19:04:53.259773 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 19:04:53.262836 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 19:04:53.266461 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 19:04:53.269995 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 19:04:53.276669 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 19:04:53.279599 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 19:04:53.282942 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 19:04:53.286223 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 19:04:53.292950 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 19:04:53.296088 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 19:04:53.302858 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1975 19:04:53.306058 call enable_fixed_mtrr()
1976 19:04:53.309153 Checking cr50 for pending updates
1977 19:04:53.314175 CPU physical address size: 39 bits
1978 19:04:53.317053 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 19:04:53.320650 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 19:04:53.324647 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 19:04:53.326974 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 19:04:53.333801 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 19:04:53.337128 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 19:04:53.340443 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 19:04:53.343668 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 19:04:53.350485 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 19:04:53.353807 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 19:04:53.357066 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 19:04:53.359970 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 19:04:53.367836 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 19:04:53.368302 call enable_fixed_mtrr()
1992 19:04:53.374570 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 19:04:53.377761 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 19:04:53.381390 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 19:04:53.384261 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 19:04:53.391453 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 19:04:53.394734 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 19:04:53.397698 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 19:04:53.400981 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 19:04:53.407805 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 19:04:53.411045 CPU physical address size: 39 bits
2002 19:04:53.414331 call enable_fixed_mtrr()
2003 19:04:53.417777 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 19:04:53.420779 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 19:04:53.427555 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 19:04:53.430755 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 19:04:53.433914 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 19:04:53.437632 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 19:04:53.444142 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 19:04:53.448063 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 19:04:53.451210 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 19:04:53.454083 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 19:04:53.460573 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 19:04:53.464305 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 19:04:53.467250 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 19:04:53.470492 call enable_fixed_mtrr()
2017 19:04:53.473989 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 19:04:53.480286 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 19:04:53.483841 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 19:04:53.487108 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 19:04:53.490823 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 19:04:53.496620 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 19:04:53.500620 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 19:04:53.504144 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 19:04:53.507431 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 19:04:53.510828 CPU physical address size: 39 bits
2027 19:04:53.517796 call enable_fixed_mtrr()
2028 19:04:53.520889 CPU physical address size: 39 bits
2029 19:04:53.524277 CPU physical address size: 39 bits
2030 19:04:53.524794 Reading cr50 TPM mode
2031 19:04:53.528046 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 19:04:53.535049 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 19:04:53.537884 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 19:04:53.541440 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 19:04:53.544955 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 19:04:53.551713 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 19:04:53.555422 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 19:04:53.558278 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 19:04:53.561248 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 19:04:53.568341 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 19:04:53.571534 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 19:04:53.574832 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 19:04:53.581440 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 19:04:53.584869 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 19:04:53.588149 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 19:04:53.591330 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 19:04:53.594644 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 19:04:53.601326 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 19:04:53.604477 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 19:04:53.607793 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 19:04:53.611687 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 19:04:53.617529 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 19:04:53.621398 call enable_fixed_mtrr()
2054 19:04:53.624545 call enable_fixed_mtrr()
2055 19:04:53.627725 BS: BS_PAYLOAD_LOAD entry times (exec / console): 222 / 6 ms
2056 19:04:53.631344 CPU physical address size: 39 bits
2057 19:04:53.635694 CPU physical address size: 39 bits
2058 19:04:53.645526 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2059 19:04:53.648756 Checking segment from ROM address 0xffc02b38
2060 19:04:53.652114 Checking segment from ROM address 0xffc02b54
2061 19:04:53.658321 Loading segment from ROM address 0xffc02b38
2062 19:04:53.661923 code (compression=0)
2063 19:04:53.668491 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2064 19:04:53.678382 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2065 19:04:53.678841 it's not compressed!
2066 19:04:53.818490 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2067 19:04:53.825148 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2068 19:04:53.831404 Loading segment from ROM address 0xffc02b54
2069 19:04:53.831887 Entry Point 0x30000000
2070 19:04:53.835008 Loaded segments
2071 19:04:53.841253 BS: BS_PAYLOAD_LOAD run times (exec / console): 143 / 63 ms
2072 19:04:53.884560 Finalizing chipset.
2073 19:04:53.888065 Finalizing SMM.
2074 19:04:53.888549 APMC done.
2075 19:04:53.894460 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2076 19:04:53.897807 mp_park_aps done after 0 msecs.
2077 19:04:53.901229 Jumping to boot code at 0x30000000(0x76b25000)
2078 19:04:53.911185 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2079 19:04:53.911648
2080 19:04:53.912037
2081 19:04:53.914367
2082 19:04:53.914894 Starting depthcharge on Voema...
2083 19:04:53.916118 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2084 19:04:53.916657 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2085 19:04:53.917083 Setting prompt string to ['volteer:']
2086 19:04:53.917479 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2087 19:04:53.918251
2088 19:04:53.924412 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2089 19:04:53.924878
2090 19:04:53.931027 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2091 19:04:53.931488
2092 19:04:53.937261 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2093 19:04:53.937720
2094 19:04:53.941278 Failed to find eMMC card reader
2095 19:04:53.941737
2096 19:04:53.942097 Wipe memory regions:
2097 19:04:53.944103
2098 19:04:53.947215 [0x00000000001000, 0x000000000a0000)
2099 19:04:53.947741
2100 19:04:53.950391 [0x00000000100000, 0x00000030000000)
2101 19:04:53.975705
2102 19:04:53.979071 [0x00000032662db0, 0x000000769ef000)
2103 19:04:54.015348
2104 19:04:54.018790 [0x00000100000000, 0x00000280400000)
2105 19:04:54.220139
2106 19:04:54.223376 ec_init: CrosEC protocol v3 supported (256, 256)
2107 19:04:54.223967
2108 19:04:54.230761 update_port_state: port C0 state: usb enable 1 mux conn 0
2109 19:04:54.231243
2110 19:04:54.239914 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2111 19:04:54.243210
2112 19:04:54.246573 pmc_check_ipc_sts: STS_BUSY done after 2412 us
2113 19:04:54.247021
2114 19:04:54.249609 send_conn_disc_msg: pmc_send_cmd succeeded
2115 19:04:54.681279
2116 19:04:54.681838 R8152: Initializing
2117 19:04:54.682344
2118 19:04:54.684550 Version 6 (ocp_data = 5c30)
2119 19:04:54.685008
2120 19:04:54.688193 R8152: Done initializing
2121 19:04:54.688671
2122 19:04:54.690913 Adding net device
2123 19:04:54.992467
2124 19:04:54.995860 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2125 19:04:54.996466
2126 19:04:54.996965
2127 19:04:54.997398
2128 19:04:54.999303 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2130 19:04:55.101209 volteer: tftpboot 192.168.201.1 9284148/tftp-deploy-y10xk97s/kernel/bzImage 9284148/tftp-deploy-y10xk97s/kernel/cmdline 9284148/tftp-deploy-y10xk97s/ramdisk/ramdisk.cpio.gz
2131 19:04:55.101849 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 19:04:55.102293 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2133 19:04:55.106715 tftpboot 192.168.201.1 9284148/tftp-deploy-y10xk97s/kernel/bzImaoy-y10xk97s/kernel/cmdline 9284148/tftp-deploy-y10xk97s/ramdisk/ramdisk.cpio.gz
2134 19:04:55.107178
2135 19:04:55.107537 Waiting for link
2136 19:04:55.309745
2137 19:04:55.309907 done.
2138 19:04:55.309984
2139 19:04:55.310065 MAC: 00:24:32:30:7e:47
2140 19:04:55.310138
2141 19:04:55.312249 Sending DHCP discover... done.
2142 19:04:55.312334
2143 19:04:55.316241 Waiting for reply... done.
2144 19:04:55.316324
2145 19:04:55.319329 Sending DHCP request... done.
2146 19:04:55.319410
2147 19:04:55.323201 Waiting for reply... done.
2148 19:04:55.323283
2149 19:04:55.325431 My ip is 192.168.201.19
2150 19:04:55.325516
2151 19:04:55.329442 The DHCP server ip is 192.168.201.1
2152 19:04:55.329557
2153 19:04:55.336142 TFTP server IP predefined by user: 192.168.201.1
2154 19:04:55.336239
2155 19:04:55.342083 Bootfile predefined by user: 9284148/tftp-deploy-y10xk97s/kernel/bzImage
2156 19:04:55.342198
2157 19:04:55.346237 Sending tftp read request... done.
2158 19:04:55.346327
2159 19:04:55.349167 Waiting for the transfer...
2160 19:04:55.349247
2161 19:04:55.973679 00000000 ################################################################
2162 19:04:55.974402
2163 19:04:56.646504 00080000 ################################################################
2164 19:04:56.647048
2165 19:04:57.271996 00100000 ################################################################
2166 19:04:57.272760
2167 19:04:57.940474 00180000 ################################################################
2168 19:04:57.940646
2169 19:04:58.622619 00200000 ################################################################
2170 19:04:58.622776
2171 19:04:59.259063 00280000 ################################################################
2172 19:04:59.259626
2173 19:04:59.891088 00300000 ################################################################
2174 19:04:59.891237
2175 19:05:00.470242 00380000 ################################################################
2176 19:05:00.470873
2177 19:05:01.148407 00400000 ################################################################
2178 19:05:01.148954
2179 19:05:01.828525 00480000 ################################################################
2180 19:05:01.828699
2181 19:05:02.486754 00500000 ################################################################
2182 19:05:02.487449
2183 19:05:03.117685 00580000 ################################################################
2184 19:05:03.117843
2185 19:05:03.732199 00600000 ################################################################
2186 19:05:03.732356
2187 19:05:04.376260 00680000 ################################################################
2188 19:05:04.376813
2189 19:05:05.012635 00700000 ################################################################
2190 19:05:05.012851
2191 19:05:05.581704 00780000 ################################################################
2192 19:05:05.581860
2193 19:05:06.187331 00800000 ################################################################
2194 19:05:06.187881
2195 19:05:06.850380 00880000 ################################################################
2196 19:05:06.850899
2197 19:05:07.195451 00900000 ################################## done.
2198 19:05:07.196007
2199 19:05:07.198985 The bootfile was 9711616 bytes long.
2200 19:05:07.199609
2201 19:05:07.202002 Sending tftp read request... done.
2202 19:05:07.202521
2203 19:05:07.205124 Waiting for the transfer...
2204 19:05:07.205594
2205 19:05:07.812676 00000000 ################################################################
2206 19:05:07.812828
2207 19:05:08.381875 00080000 ################################################################
2208 19:05:08.382034
2209 19:05:08.952130 00100000 ################################################################
2210 19:05:08.952288
2211 19:05:09.541678 00180000 ################################################################
2212 19:05:09.541833
2213 19:05:10.112309 00200000 ################################################################
2214 19:05:10.112465
2215 19:05:10.690871 00280000 ################################################################
2216 19:05:10.691030
2217 19:05:11.249732 00300000 ################################################################
2218 19:05:11.249884
2219 19:05:11.797716 00380000 ################################################################
2220 19:05:11.797874
2221 19:05:12.385380 00400000 ################################################################
2222 19:05:12.385532
2223 19:05:13.001228 00480000 ################################################################
2224 19:05:13.001381
2225 19:05:13.579239 00500000 ################################################################
2226 19:05:13.579401
2227 19:05:14.158951 00580000 ################################################################
2228 19:05:14.159107
2229 19:05:14.745380 00600000 ################################################################
2230 19:05:14.745537
2231 19:05:15.320923 00680000 ################################################################
2232 19:05:15.321076
2233 19:05:15.876526 00700000 ################################################################
2234 19:05:15.876682
2235 19:05:16.471422 00780000 ################################################################
2236 19:05:16.471580
2237 19:05:16.685307 00800000 ######################## done.
2238 19:05:16.685462
2239 19:05:16.688642 Sending tftp read request... done.
2240 19:05:16.688738
2241 19:05:16.692264 Waiting for the transfer...
2242 19:05:16.692367
2243 19:05:16.692468 00000000 # done.
2244 19:05:16.692566
2245 19:05:16.701855 Command line loaded dynamically from TFTP file: 9284148/tftp-deploy-y10xk97s/kernel/cmdline
2246 19:05:16.702016
2247 19:05:16.714729 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2248 19:05:16.720148
2249 19:05:16.723123 Shutting down all USB controllers.
2250 19:05:16.723583
2251 19:05:16.723987 Removing current net device
2252 19:05:16.724332
2253 19:05:16.726365 Finalizing coreboot
2254 19:05:16.726821
2255 19:05:16.732967 Exiting depthcharge with code 4 at timestamp: 31461104
2256 19:05:16.733421
2257 19:05:16.733774
2258 19:05:16.734185 Starting kernel ...
2259 19:05:16.734530
2260 19:05:16.734865
2261 19:05:16.736185 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2262 19:05:16.736701 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2263 19:05:16.737085 Setting prompt string to ['Linux version [0-9]']
2264 19:05:16.737467 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2265 19:05:16.737858 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2267 19:09:36.736966 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2269 19:09:36.737186 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2271 19:09:36.737360 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2274 19:09:36.737627 end: 2 depthcharge-action (duration 00:05:00) [common]
2276 19:09:36.737854 Cleaning after the job
2277 19:09:36.737942 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9284148/tftp-deploy-y10xk97s/ramdisk
2278 19:09:36.738620 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9284148/tftp-deploy-y10xk97s/kernel
2279 19:09:36.739330 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9284148/tftp-deploy-y10xk97s/modules
2280 19:09:36.739536 start: 5.1 power-off (timeout 00:00:30) [common]
2281 19:09:36.739689 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2282 19:09:38.917697 >> Command sent successfully.
2283 19:09:38.919865 Returned 0 in 2 seconds
2284 19:09:39.020636 end: 5.1 power-off (duration 00:00:02) [common]
2286 19:09:39.020978 start: 5.2 read-feedback (timeout 00:09:58) [common]
2287 19:09:39.021241 Listened to connection for namespace 'common' for up to 1s
2288 19:09:40.025706 Finalising connection for namespace 'common'
2289 19:09:40.025880 Disconnecting from shell: Finalise
2290 19:09:40.025964
2291 19:09:40.126241 end: 5.2 read-feedback (duration 00:00:01) [common]
2292 19:09:40.126400 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9284148
2293 19:09:40.131369 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9284148
2294 19:09:40.131508 JobError: Your job cannot terminate cleanly.