Boot log: acer-cb317-1h-c3z6-dedede

    1 18:37:35.328804  lava-dispatcher, installed at version: 2022.11
    2 18:37:35.329004  start: 0 validate
    3 18:37:35.329145  Start time: 2023-02-25 18:37:35.329137+00:00 (UTC)
    4 18:37:35.329279  Using caching service: 'http://localhost/cache/?uri=%s'
    5 18:37:35.329416  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230217.0%2Fx86%2Frootfs.cpio.gz exists
    6 18:37:35.619349  Using caching service: 'http://localhost/cache/?uri=%s'
    7 18:37:35.619543  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 18:37:35.908716  Using caching service: 'http://localhost/cache/?uri=%s'
    9 18:37:35.908900  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 18:37:36.206450  validate duration: 0.88
   12 18:37:36.206753  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 18:37:36.206877  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 18:37:36.206990  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 18:37:36.207146  Not decompressing ramdisk as can be used compressed.
   16 18:37:36.207354  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230217.0/x86/rootfs.cpio.gz
   17 18:37:36.207435  saving as /var/lib/lava/dispatcher/tmp/9334694/tftp-deploy-neasx3xj/ramdisk/rootfs.cpio.gz
   18 18:37:36.207513  total size: 8423658 (8MB)
   19 18:37:36.208738  progress   0% (0MB)
   20 18:37:36.211183  progress   5% (0MB)
   21 18:37:36.213706  progress  10% (0MB)
   22 18:37:36.216178  progress  15% (1MB)
   23 18:37:36.218625  progress  20% (1MB)
   24 18:37:36.221105  progress  25% (2MB)
   25 18:37:36.223589  progress  30% (2MB)
   26 18:37:36.225855  progress  35% (2MB)
   27 18:37:36.228301  progress  40% (3MB)
   28 18:37:36.230745  progress  45% (3MB)
   29 18:37:36.233172  progress  50% (4MB)
   30 18:37:36.235508  progress  55% (4MB)
   31 18:37:36.237741  progress  60% (4MB)
   32 18:37:36.240124  progress  65% (5MB)
   33 18:37:36.242190  progress  70% (5MB)
   34 18:37:36.244478  progress  75% (6MB)
   35 18:37:36.246700  progress  80% (6MB)
   36 18:37:36.248977  progress  85% (6MB)
   37 18:37:36.251253  progress  90% (7MB)
   38 18:37:36.253474  progress  95% (7MB)
   39 18:37:36.255767  progress 100% (8MB)
   40 18:37:36.256018  8MB downloaded in 0.05s (165.64MB/s)
   41 18:37:36.256199  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 18:37:36.256503  end: 1.1 download-retry (duration 00:00:00) [common]
   44 18:37:36.256603  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 18:37:36.256700  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 18:37:36.256813  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 18:37:36.256923  saving as /var/lib/lava/dispatcher/tmp/9334694/tftp-deploy-neasx3xj/kernel/bzImage
   48 18:37:36.256991  total size: 9711616 (9MB)
   49 18:37:36.257068  No compression specified
   50 18:37:40.759055  progress   0% (0MB)
   51 18:37:40.761813  progress   5% (0MB)
   52 18:37:40.764511  progress  10% (0MB)
   53 18:37:40.767194  progress  15% (1MB)
   54 18:37:40.769852  progress  20% (1MB)
   55 18:37:40.772526  progress  25% (2MB)
   56 18:37:40.775020  progress  30% (2MB)
   57 18:37:40.777772  progress  35% (3MB)
   58 18:37:40.780476  progress  40% (3MB)
   59 18:37:40.783160  progress  45% (4MB)
   60 18:37:40.785860  progress  50% (4MB)
   61 18:37:40.788513  progress  55% (5MB)
   62 18:37:40.790969  progress  60% (5MB)
   63 18:37:40.793608  progress  65% (6MB)
   64 18:37:40.796256  progress  70% (6MB)
   65 18:37:40.798871  progress  75% (6MB)
   66 18:37:40.801486  progress  80% (7MB)
   67 18:37:40.803930  progress  85% (7MB)
   68 18:37:40.806531  progress  90% (8MB)
   69 18:37:40.809164  progress  95% (8MB)
   70 18:37:40.811799  progress 100% (9MB)
   71 18:37:40.812024  9MB downloaded in 4.56s (2.03MB/s)
   72 18:37:40.812190  end: 1.2.1 http-download (duration 00:00:05) [common]
   74 18:37:40.812454  end: 1.2 download-retry (duration 00:00:05) [common]
   75 18:37:40.812553  start: 1.3 download-retry (timeout 00:09:55) [common]
   76 18:37:40.812649  start: 1.3.1 http-download (timeout 00:09:55) [common]
   77 18:37:40.812768  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 18:37:40.812842  saving as /var/lib/lava/dispatcher/tmp/9334694/tftp-deploy-neasx3xj/modules/modules.tar
   79 18:37:40.812908  total size: 64832 (0MB)
   80 18:37:40.812973  Using unxz to decompress xz
   81 18:37:40.816990  progress  50% (0MB)
   82 18:37:40.817434  progress 100% (0MB)
   83 18:37:40.822093  0MB downloaded in 0.01s (6.74MB/s)
   84 18:37:40.822362  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 18:37:40.822687  end: 1.3 download-retry (duration 00:00:00) [common]
   87 18:37:40.822801  start: 1.4 prepare-tftp-overlay (timeout 00:09:55) [common]
   88 18:37:40.822920  start: 1.4.1 extract-nfsrootfs (timeout 00:09:55) [common]
   89 18:37:40.823020  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 18:37:40.823125  start: 1.4.2 lava-overlay (timeout 00:09:55) [common]
   91 18:37:40.823315  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj
   92 18:37:40.823437  makedir: /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin
   93 18:37:40.823531  makedir: /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/tests
   94 18:37:40.823622  makedir: /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/results
   95 18:37:40.823740  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-add-keys
   96 18:37:40.823886  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-add-sources
   97 18:37:40.824014  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-background-process-start
   98 18:37:40.824139  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-background-process-stop
   99 18:37:40.824262  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-common-functions
  100 18:37:40.824385  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-echo-ipv4
  101 18:37:40.824509  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-install-packages
  102 18:37:40.824633  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-installed-packages
  103 18:37:40.824754  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-os-build
  104 18:37:40.824876  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-probe-channel
  105 18:37:40.825007  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-probe-ip
  106 18:37:40.825142  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-target-ip
  107 18:37:40.825274  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-target-mac
  108 18:37:40.825406  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-target-storage
  109 18:37:40.825543  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-test-case
  110 18:37:40.825676  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-test-event
  111 18:37:40.825810  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-test-feedback
  112 18:37:40.825944  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-test-raise
  113 18:37:40.826073  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-test-reference
  114 18:37:40.826198  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-test-runner
  115 18:37:40.826320  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-test-set
  116 18:37:40.826442  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-test-shell
  117 18:37:40.826568  Updating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-install-packages (oe)
  118 18:37:40.826695  Updating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/bin/lava-installed-packages (oe)
  119 18:37:40.826805  Creating /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/environment
  120 18:37:40.826903  LAVA metadata
  121 18:37:40.826984  - LAVA_JOB_ID=9334694
  122 18:37:40.827059  - LAVA_DISPATCHER_IP=192.168.201.1
  123 18:37:40.827187  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:55) [common]
  124 18:37:40.827261  skipped lava-vland-overlay
  125 18:37:40.827346  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 18:37:40.827445  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
  127 18:37:40.827524  skipped lava-multinode-overlay
  128 18:37:40.827610  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 18:37:40.827705  start: 1.4.2.3 test-definition (timeout 00:09:55) [common]
  130 18:37:40.827792  Loading test definitions
  131 18:37:40.827899  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:55) [common]
  132 18:37:40.827985  Using /lava-9334694 at stage 0
  133 18:37:40.828281  uuid=9334694_1.4.2.3.1 testdef=None
  134 18:37:40.828381  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 18:37:40.828483  start: 1.4.2.3.2 test-overlay (timeout 00:09:55) [common]
  136 18:37:40.829033  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 18:37:40.829292  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:55) [common]
  139 18:37:40.829925  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 18:37:40.830194  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
  142 18:37:40.830822  runner path: /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/0/tests/0_dmesg test_uuid 9334694_1.4.2.3.1
  143 18:37:40.830988  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 18:37:40.831252  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:55) [common]
  146 18:37:40.831333  Using /lava-9334694 at stage 1
  147 18:37:40.831605  uuid=9334694_1.4.2.3.5 testdef=None
  148 18:37:40.831710  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 18:37:40.831809  start: 1.4.2.3.6 test-overlay (timeout 00:09:55) [common]
  150 18:37:40.832307  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 18:37:40.832560  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:55) [common]
  153 18:37:40.833199  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 18:37:40.833467  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:55) [common]
  156 18:37:40.834085  runner path: /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/1/tests/1_bootrr test_uuid 9334694_1.4.2.3.5
  157 18:37:40.834244  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 18:37:40.834480  Creating lava-test-runner.conf files
  160 18:37:40.834552  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/0 for stage 0
  161 18:37:40.834643  - 0_dmesg
  162 18:37:40.834725  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9334694/lava-overlay-vkgsljbj/lava-9334694/1 for stage 1
  163 18:37:40.834815  - 1_bootrr
  164 18:37:40.834915  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 18:37:40.835009  start: 1.4.2.4 compress-overlay (timeout 00:09:55) [common]
  166 18:37:40.841801  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 18:37:40.841931  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
  168 18:37:40.842031  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 18:37:40.842128  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 18:37:40.842224  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
  171 18:37:41.048421  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 18:37:41.048811  start: 1.4.4 extract-modules (timeout 00:09:55) [common]
  173 18:37:41.048941  extracting modules file /var/lib/lava/dispatcher/tmp/9334694/tftp-deploy-neasx3xj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9334694/extract-overlay-ramdisk-hqmfq8uy/ramdisk
  174 18:37:41.053650  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 18:37:41.053779  start: 1.4.5 apply-overlay-tftp (timeout 00:09:55) [common]
  176 18:37:41.053883  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334694/compress-overlay-rbx09599/overlay-1.4.2.4.tar.gz to ramdisk
  177 18:37:41.053971  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334694/compress-overlay-rbx09599/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9334694/extract-overlay-ramdisk-hqmfq8uy/ramdisk
  178 18:37:41.058268  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 18:37:41.058394  start: 1.4.6 configure-preseed-file (timeout 00:09:55) [common]
  180 18:37:41.058498  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 18:37:41.058600  start: 1.4.7 compress-ramdisk (timeout 00:09:55) [common]
  182 18:37:41.058694  Building ramdisk /var/lib/lava/dispatcher/tmp/9334694/extract-overlay-ramdisk-hqmfq8uy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9334694/extract-overlay-ramdisk-hqmfq8uy/ramdisk
  183 18:37:41.130010  >> 48350 blocks

  184 18:37:41.969241  rename /var/lib/lava/dispatcher/tmp/9334694/extract-overlay-ramdisk-hqmfq8uy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9334694/tftp-deploy-neasx3xj/ramdisk/ramdisk.cpio.gz
  185 18:37:41.969686  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 18:37:41.969830  start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
  187 18:37:41.969953  start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
  188 18:37:41.970062  No mkimage arch provided, not using FIT.
  189 18:37:41.970167  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 18:37:41.970268  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 18:37:41.970378  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 18:37:41.970485  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
  193 18:37:41.970573  No LXC device requested
  194 18:37:41.970666  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 18:37:41.970768  start: 1.6 deploy-device-env (timeout 00:09:54) [common]
  196 18:37:41.970866  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 18:37:41.970952  Checking files for TFTP limit of 4294967296 bytes.
  198 18:37:41.971394  end: 1 tftp-deploy (duration 00:00:06) [common]
  199 18:37:41.971518  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 18:37:41.971627  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 18:37:41.971772  substitutions:
  202 18:37:41.971849  - {DTB}: None
  203 18:37:41.971925  - {INITRD}: 9334694/tftp-deploy-neasx3xj/ramdisk/ramdisk.cpio.gz
  204 18:37:41.971995  - {KERNEL}: 9334694/tftp-deploy-neasx3xj/kernel/bzImage
  205 18:37:41.972063  - {LAVA_MAC}: None
  206 18:37:41.972129  - {PRESEED_CONFIG}: None
  207 18:37:41.972195  - {PRESEED_LOCAL}: None
  208 18:37:41.972272  - {RAMDISK}: 9334694/tftp-deploy-neasx3xj/ramdisk/ramdisk.cpio.gz
  209 18:37:41.972340  - {ROOT_PART}: None
  210 18:37:41.972405  - {ROOT}: None
  211 18:37:41.972470  - {SERVER_IP}: 192.168.201.1
  212 18:37:41.972534  - {TEE}: None
  213 18:37:41.972598  Parsed boot commands:
  214 18:37:41.972662  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 18:37:41.972832  Parsed boot commands: tftpboot 192.168.201.1 9334694/tftp-deploy-neasx3xj/kernel/bzImage 9334694/tftp-deploy-neasx3xj/kernel/cmdline 9334694/tftp-deploy-neasx3xj/ramdisk/ramdisk.cpio.gz
  216 18:37:41.972941  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 18:37:41.973044  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 18:37:41.973150  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 18:37:41.973253  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 18:37:41.973335  Not connected, no need to disconnect.
  221 18:37:41.973424  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 18:37:41.973523  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 18:37:41.973601  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-2'
  224 18:37:41.976892  Setting prompt string to ['lava-test: # ']
  225 18:37:41.977223  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 18:37:41.977346  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 18:37:41.977463  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 18:37:41.977569  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 18:37:41.978013  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=reboot'
  230 18:37:51.329928  >> Command sent successfully.

  231 18:37:51.339797  Returned 0 in 9 seconds
  232 18:37:51.441428  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  234 18:37:51.442974  end: 2.2.2 reset-device (duration 00:00:09) [common]
  235 18:37:51.443570  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  236 18:37:51.444039  Setting prompt string to 'Starting depthcharge on Magolor...'
  237 18:37:51.444444  Changing prompt to 'Starting depthcharge on Magolor...'
  238 18:37:51.444804  depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
  239 18:37:51.446178  [Enter `^Ec?' for help]

  240 18:37:51.446610  

  241 18:37:51.446947  

  242 18:37:51.447331  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...

  243 18:37:51.447710  CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz

  244 18:37:51.448095  CPU: ID 906c0, Jasperlake A0, ucode: 2400001f

  245 18:37:51.448459  CPU: AES supported, TXT NOT supported, VT supported

  246 18:37:51.448768  MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1

  247 18:37:51.449114  PCH: device id 4d87 (rev 01) is Jasperlake Super

  248 18:37:51.449456  IGD: device id 4e55 (rev 01) is Jasperlake GT4

  249 18:37:51.449868  VBOOT: Loading verstage.

  250 18:37:51.450184  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  251 18:37:51.450489  FMAP: base = 0xff000000 size = 0x1000000 #areas = 32

  252 18:37:51.450790  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  253 18:37:51.451118  CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec

  254 18:37:51.451443  

  255 18:37:51.451739  

  256 18:37:51.452032  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...

  257 18:37:51.452330  Probing TPM: . done!

  258 18:37:51.452672  TPM ready after 0 ms

  259 18:37:51.453022  Connected to device vid:did:rid of 1ae0:0028:00

  260 18:37:51.453322  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  261 18:37:51.453624  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  262 18:37:51.453919  Initialized TPM device CR50 revision 0

  263 18:37:51.454215  tlcl_send_startup: Startup return code is 0

  264 18:37:51.454509  TPM: setup succeeded

  265 18:37:51.454801  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  266 18:37:51.455132  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  267 18:37:51.455437  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  268 18:37:51.455825  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  269 18:37:51.456172  Chrome EC: UHEPI supported

  270 18:37:51.456536  Phase 1

  271 18:37:51.456832  FMAP: area GBB found @ c05000 (12288 bytes)

  272 18:37:51.457171  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  273 18:37:51.457475  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  274 18:37:51.457805  Recovery requested (1009000e)

  275 18:37:51.458099  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 18:37:51.458396  tlcl_extend: response is 0

  277 18:37:51.458687  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 18:37:51.458977  tlcl_extend: response is 0

  279 18:37:51.459341  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  280 18:37:51.459743  CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4

  281 18:37:51.460042  BS: verstage times (exec / console): total (unknown) / 124 ms

  282 18:37:51.460334  

  283 18:37:51.460619  

  284 18:37:51.460908  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...

  285 18:37:51.461202  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 18:37:51.461490  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 18:37:51.461783  gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000

  288 18:37:51.462101  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 18:37:51.462447  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  290 18:37:51.462759  gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000

  291 18:37:51.463049  TCO_STS:   0000 0001

  292 18:37:51.463400  GEN_PMCON: d0015038 00002200

  293 18:37:51.463670  GBLRST_CAUSE: 00000000 00000000

  294 18:37:51.463941  prev_sleep_state 5

  295 18:37:51.464208  Boot Count incremented to 10889

  296 18:37:51.464474  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  297 18:37:51.464745  CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000

  298 18:37:51.465010  Chrome EC: UHEPI supported

  299 18:37:51.465344  FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)

  300 18:37:51.465646  Probing TPM:  done!

  301 18:37:51.465981  Connected to device vid:did:rid of 1ae0:0028:00

  302 18:37:51.466338  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  303 18:37:51.466551  Initialized TPM device CR50 revision 0

  304 18:37:51.466760  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  305 18:37:51.466969  MRC: Hash idx 0x100b comparison successful.

  306 18:37:51.467207  MRC cache found, size 5458

  307 18:37:51.467460  bootmode is set to: 2

  308 18:37:51.467674  SPD INDEX = 0

  309 18:37:51.467882  CBFS: Found 'spd.bin' @0x40c40 size 0x600

  310 18:37:51.468097  SPD: module type is LPDDR4X

  311 18:37:51.468307  SPD: module part number is MT53E512M32D2NP-046 WT:E

  312 18:37:51.468515  SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb

  313 18:37:51.468725  SPD: device width 16 bits, bus width 32 bits

  314 18:37:51.468959  SPD: module size is 4096 MB (per channel)

  315 18:37:51.469223  meminit_channels: DRAM half-populated

  316 18:37:51.469465  CBMEM:

  317 18:37:51.469676  IMD: root @ 0x76fff000 254 entries.

  318 18:37:51.469886  IMD: root @ 0x76ffec00 62 entries.

  319 18:37:51.470095  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  320 18:37:51.470306  WARNING: RO_VPD is uninitialized or empty.

  321 18:37:51.470514  FMAP: area RW_VPD found @ bfc000 (8192 bytes)

  322 18:37:51.470722  External stage cache:

  323 18:37:51.470928  IMD: root @ 0x7b3ff000 254 entries.

  324 18:37:51.471167  IMD: root @ 0x7b3fec00 62 entries.

  325 18:37:51.471372  FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)

  326 18:37:51.471553  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  327 18:37:51.471714  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

  328 18:37:51.471871  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  329 18:37:51.472029  cse_lite: Skip switching to RW in the recovery path

  330 18:37:51.472187  1 DIMMs found

  331 18:37:51.472364  SMM Memory Map

  332 18:37:51.472552  SMRAM       : 0x7b000000 0x800000

  333 18:37:51.472965   Subregion 0: 0x7b000000 0x200000

  334 18:37:51.473144   Subregion 1: 0x7b200000 0x200000

  335 18:37:51.473304   Subregion 2: 0x7b400000 0x400000

  336 18:37:51.473459  top_of_ram = 0x77000000

  337 18:37:51.473615  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  338 18:37:51.473770  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  339 18:37:51.473925  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  340 18:37:51.474080  CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c

  341 18:37:51.474237  Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)

  342 18:37:51.474397  Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90

  343 18:37:51.474555  Processing 188 relocs. Offset value of 0x74c0e000

  344 18:37:51.474712  BS: romstage times (exec / console): total (unknown) / 256 ms

  345 18:37:51.474869  

  346 18:37:51.475021  

  347 18:37:51.475199  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...

  348 18:37:51.475360  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  349 18:37:51.475519  CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488

  350 18:37:51.475676  Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)

  351 18:37:51.475868  Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70

  352 18:37:51.476048  Processing 4805 relocs. Offset value of 0x75da8000

  353 18:37:51.476250  BS: postcar times (exec / console): total (unknown) / 42 ms

  354 18:37:51.476403  

  355 18:37:51.476527  

  356 18:37:51.476651  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...

  357 18:37:51.476778  Normal boot

  358 18:37:51.476903  EC returned error result code 3

  359 18:37:51.477027  FW_CONFIG value is 0x204

  360 18:37:51.477152  GENERIC: 0.0 disabled by fw_config

  361 18:37:51.477277  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  362 18:37:51.477402  I2C: 00:10 disabled by fw_config

  363 18:37:51.477528  I2C: 00:10 disabled by fw_config

  364 18:37:51.477652  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  365 18:37:51.477800  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  366 18:37:51.477927  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  367 18:37:51.478053  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  368 18:37:51.478178  fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED

  369 18:37:51.478304  I2C: 00:10 disabled by fw_config

  370 18:37:51.478430  fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED

  371 18:37:51.478557  fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED

  372 18:37:51.478684  I2C: 00:1a disabled by fw_config

  373 18:37:51.478808  I2C: 00:1a disabled by fw_config

  374 18:37:51.478933  fw_config match found: AUDIO_AMP=UNPROVISIONED

  375 18:37:51.479058  fw_config match found: AUDIO_AMP=UNPROVISIONED

  376 18:37:51.479210  GENERIC: 0.0 disabled by fw_config

  377 18:37:51.479369  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  378 18:37:51.479736  CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000

  379 18:37:51.482555  microcode: sig=0x906c0 pf=0x1 revision=0x2400001f

  380 18:37:51.486102  microcode: Update skipped, already up-to-date

  381 18:37:51.492940  CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906

  382 18:37:51.518746  Detected 2 core, 2 thread CPU.

  383 18:37:51.522253  Setting up SMI for CPU

  384 18:37:51.525281  IED base = 0x7b400000

  385 18:37:51.525599  IED size = 0x00400000

  386 18:37:51.528273  Will perform SMM setup.

  387 18:37:51.532184  CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.

  388 18:37:51.542204  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  389 18:37:51.545238  Processing 16 relocs. Offset value of 0x00030000

  390 18:37:51.548978  Attempting to start 1 APs

  391 18:37:51.552582  Waiting for 10ms after sending INIT.

  392 18:37:51.568783  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 2.

  393 18:37:51.569337  done.

  394 18:37:51.575195  Waiting for 2nd SIPI to complete...done.

  395 18:37:51.582309  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  396 18:37:51.588402  Processing 13 relocs. Offset value of 0x00038000

  397 18:37:51.588858  Unable to locate Global NVS

  398 18:37:51.598724  SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)

  399 18:37:51.601942  Installing permanent SMM handler to 0x7b000000

  400 18:37:51.612237  Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10

  401 18:37:51.614910  Processing 704 relocs. Offset value of 0x7b010000

  402 18:37:51.625397  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  403 18:37:51.628734  Processing 13 relocs. Offset value of 0x7b008000

  404 18:37:51.635294  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  405 18:37:51.638314  Unable to locate Global NVS

  406 18:37:51.644881  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)

  407 18:37:51.647892  Clearing SMI status registers

  408 18:37:51.648363  SMI_STS: PM1 

  409 18:37:51.651479  PM1_STS: PWRBTN 

  410 18:37:51.654689  TCO_STS: INTRD_DET 

  411 18:37:51.655172  GPE0 STD STS: 

  412 18:37:51.661926  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  413 18:37:51.664848  In relocation handler: CPU 0

  414 18:37:51.668563  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  415 18:37:51.674925  Writing SMRR. base = 0x7b000006, mask=0xff800800

  416 18:37:51.675494  Relocation complete.

  417 18:37:51.684573  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  418 18:37:51.685116  In relocation handler: CPU 1

  419 18:37:51.691048  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  420 18:37:51.694556  Writing SMRR. base = 0x7b000006, mask=0xff800800

  421 18:37:51.697707  Relocation complete.

  422 18:37:51.698146  Initializing CPU #0

  423 18:37:51.701317  CPU: vendor Intel device 906c0

  424 18:37:51.708085  CPU: family 06, model 9c, stepping 00

  425 18:37:51.708559  Clearing out pending MCEs

  426 18:37:51.711321  Setting up local APIC...

  427 18:37:51.714255   apic_id: 0x00 done.

  428 18:37:51.717909  Turbo is available but hidden

  429 18:37:51.721098  Turbo is available and visible

  430 18:37:51.724357  microcode: Update skipped, already up-to-date

  431 18:37:51.727974  CPU #0 initialized

  432 18:37:51.728426  Initializing CPU #1

  433 18:37:51.731114  CPU: vendor Intel device 906c0

  434 18:37:51.734952  CPU: family 06, model 9c, stepping 00

  435 18:37:51.737969  Clearing out pending MCEs

  436 18:37:51.741624  Setting up local APIC...

  437 18:37:51.744237   apic_id: 0x02 done.

  438 18:37:51.747257  microcode: Update skipped, already up-to-date

  439 18:37:51.750880  CPU #1 initialized

  440 18:37:51.754740  bsp_do_flight_plan done after 175 msecs.

  441 18:37:51.757321  CPU: frequency set to 2800 MHz

  442 18:37:51.757748  Enabling SMIs.

  443 18:37:51.763855  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 87 / 289 ms

  444 18:37:51.775217  Probing TPM:  done!

  445 18:37:51.781737  Connected to device vid:did:rid of 1ae0:0028:00

  446 18:37:51.791304  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  447 18:37:51.794495  Initialized TPM device CR50 revision 0

  448 18:37:51.801457  CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc

  449 18:37:51.804964  Found a VBT of 7680 bytes after decompression

  450 18:37:51.814621  WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called

  451 18:37:51.847054  Detected 2 core, 2 thread CPU.

  452 18:37:51.850030  Detected 2 core, 2 thread CPU.

  453 18:37:52.212457  Display FSP Version Info HOB

  454 18:37:52.215235  Reference Code - CPU = 8.7.22.30

  455 18:37:52.218904  uCode Version = 24.0.0.1f

  456 18:37:52.222285  TXT ACM version = ff.ff.ff.ffff

  457 18:37:52.225128  Reference Code - ME = 8.7.22.30

  458 18:37:52.228276  MEBx version = 0.0.0.0

  459 18:37:52.231700  ME Firmware Version = Consumer SKU

  460 18:37:52.234951  Reference Code - PCH = 8.7.22.30

  461 18:37:52.238619  PCH-CRID Status = Disabled

  462 18:37:52.241657  PCH-CRID Original Value = ff.ff.ff.ffff

  463 18:37:52.245208  PCH-CRID New Value = ff.ff.ff.ffff

  464 18:37:52.248382  OPROM - RST - RAID = ff.ff.ff.ffff

  465 18:37:52.252118  PCH Hsio Version = 4.0.0.0

  466 18:37:52.255235  Reference Code - SA - System Agent = 8.7.22.30

  467 18:37:52.259155  Reference Code - MRC = 0.0.4.68

  468 18:37:52.261939  SA - PCIe Version = 8.7.22.30

  469 18:37:52.264692  SA-CRID Status = Disabled

  470 18:37:52.268361  SA-CRID Original Value = 0.0.0.0

  471 18:37:52.271644  SA-CRID New Value = 0.0.0.0

  472 18:37:52.275326  OPROM - VBIOS = ff.ff.ff.ffff

  473 18:37:52.278680  IO Manageability Engine FW Version = ff.ff.ff.ffff

  474 18:37:52.282142  PHY Build Version = ff.ff.ff.ffff

  475 18:37:52.288197  Thunderbolt(TM) FW Version = ff.ff.ff.ffff

  476 18:37:52.291616  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  477 18:37:52.295011  ITSS IRQ Polarities Before:

  478 18:37:52.298333  IPC0: 0xffffffff

  479 18:37:52.298778  IPC1: 0xffffffff

  480 18:37:52.301796  IPC2: 0xffffffff

  481 18:37:52.302354  IPC3: 0xffffffff

  482 18:37:52.305091  ITSS IRQ Polarities After:

  483 18:37:52.308151  IPC0: 0xffffffff

  484 18:37:52.308594  IPC1: 0xffffffff

  485 18:37:52.311938  IPC2: 0xffffffff

  486 18:37:52.312379  IPC3: 0xffffffff

  487 18:37:52.324840  pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.

  488 18:37:52.331701  BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms

  489 18:37:52.332254  Enumerating buses...

  490 18:37:52.338428  Show all devs... Before device enumeration.

  491 18:37:52.341623  Root Device: enabled 1

  492 18:37:52.342172  CPU_CLUSTER: 0: enabled 1

  493 18:37:52.345336  DOMAIN: 0000: enabled 1

  494 18:37:52.348187  PCI: 00:00.0: enabled 1

  495 18:37:52.351134  PCI: 00:02.0: enabled 1

  496 18:37:52.351577  PCI: 00:04.0: enabled 1

  497 18:37:52.354839  PCI: 00:05.0: enabled 1

  498 18:37:52.357916  PCI: 00:09.0: enabled 0

  499 18:37:52.358356  PCI: 00:12.6: enabled 0

  500 18:37:52.361749  PCI: 00:14.0: enabled 1

  501 18:37:52.364691  PCI: 00:14.1: enabled 0

  502 18:37:52.368487  PCI: 00:14.2: enabled 0

  503 18:37:52.369035  PCI: 00:14.3: enabled 1

  504 18:37:52.371302  PCI: 00:14.5: enabled 1

  505 18:37:52.374740  PCI: 00:15.0: enabled 1

  506 18:37:52.378305  PCI: 00:15.1: enabled 1

  507 18:37:52.378901  PCI: 00:15.2: enabled 1

  508 18:37:52.381074  PCI: 00:15.3: enabled 1

  509 18:37:52.384834  PCI: 00:16.0: enabled 1

  510 18:37:52.388037  PCI: 00:16.1: enabled 0

  511 18:37:52.388639  PCI: 00:16.4: enabled 0

  512 18:37:52.391456  PCI: 00:16.5: enabled 0

  513 18:37:52.394733  PCI: 00:17.0: enabled 0

  514 18:37:52.395371  PCI: 00:19.0: enabled 1

  515 18:37:52.398150  PCI: 00:19.1: enabled 0

  516 18:37:52.401408  PCI: 00:19.2: enabled 1

  517 18:37:52.404761  PCI: 00:1a.0: enabled 1

  518 18:37:52.405404  PCI: 00:1c.0: enabled 0

  519 18:37:52.407882  PCI: 00:1c.1: enabled 0

  520 18:37:52.410786  PCI: 00:1c.2: enabled 0

  521 18:37:52.414496  PCI: 00:1c.3: enabled 0

  522 18:37:52.414937  PCI: 00:1c.4: enabled 0

  523 18:37:52.417616  PCI: 00:1c.5: enabled 0

  524 18:37:52.420741  PCI: 00:1c.6: enabled 0

  525 18:37:52.424568  PCI: 00:1c.7: enabled 1

  526 18:37:52.425021  PCI: 00:1e.0: enabled 0

  527 18:37:52.427686  PCI: 00:1e.1: enabled 0

  528 18:37:52.431151  PCI: 00:1e.2: enabled 1

  529 18:37:52.434336  PCI: 00:1e.3: enabled 0

  530 18:37:52.434788  PCI: 00:1f.0: enabled 1

  531 18:37:52.437719  PCI: 00:1f.1: enabled 1

  532 18:37:52.441121  PCI: 00:1f.2: enabled 1

  533 18:37:52.441572  PCI: 00:1f.3: enabled 1

  534 18:37:52.444447  PCI: 00:1f.4: enabled 0

  535 18:37:52.447422  PCI: 00:1f.5: enabled 1

  536 18:37:52.451064  PCI: 00:1f.7: enabled 0

  537 18:37:52.451544  GENERIC: 0.0: enabled 1

  538 18:37:52.453892  GENERIC: 0.0: enabled 1

  539 18:37:52.457639  USB0 port 0: enabled 1

  540 18:37:52.461077  GENERIC: 0.0: enabled 1

  541 18:37:52.461717  I2C: 00:2c: enabled 1

  542 18:37:52.464076  I2C: 00:15: enabled 1

  543 18:37:52.467623  GENERIC: 0.0: enabled 0

  544 18:37:52.468113  I2C: 00:15: enabled 1

  545 18:37:52.470599  I2C: 00:10: enabled 0

  546 18:37:52.474553  I2C: 00:10: enabled 0

  547 18:37:52.475194  I2C: 00:2c: enabled 1

  548 18:37:52.477592  I2C: 00:40: enabled 1

  549 18:37:52.481111  I2C: 00:10: enabled 1

  550 18:37:52.481668  I2C: 00:39: enabled 1

  551 18:37:52.483937  I2C: 00:36: enabled 1

  552 18:37:52.487674  I2C: 00:10: enabled 0

  553 18:37:52.488120  I2C: 00:0c: enabled 1

  554 18:37:52.490879  I2C: 00:50: enabled 1

  555 18:37:52.493783  I2C: 00:1a: enabled 1

  556 18:37:52.494186  I2C: 00:1a: enabled 0

  557 18:37:52.497450  I2C: 00:1a: enabled 0

  558 18:37:52.500683  I2C: 00:28: enabled 1

  559 18:37:52.501091  I2C: 00:29: enabled 1

  560 18:37:52.504540  PCI: 00:00.0: enabled 1

  561 18:37:52.507287  SPI: 00: enabled 1

  562 18:37:52.507808  PNP: 0c09.0: enabled 1

  563 18:37:52.510837  GENERIC: 0.0: enabled 0

  564 18:37:52.514355  USB2 port 0: enabled 1

  565 18:37:52.517318  USB2 port 1: enabled 1

  566 18:37:52.517850  USB2 port 2: enabled 1

  567 18:37:52.520362  USB2 port 3: enabled 1

  568 18:37:52.523911  USB2 port 4: enabled 0

  569 18:37:52.524523  USB2 port 5: enabled 1

  570 18:37:52.527519  USB2 port 6: enabled 0

  571 18:37:52.530717  USB2 port 7: enabled 1

  572 18:37:52.534350  USB3 port 0: enabled 1

  573 18:37:52.534906  USB3 port 1: enabled 1

  574 18:37:52.537318  USB3 port 2: enabled 1

  575 18:37:52.540808  USB3 port 3: enabled 1

  576 18:37:52.541254  APIC: 00: enabled 1

  577 18:37:52.543790  APIC: 02: enabled 1

  578 18:37:52.547230  Compare with tree...

  579 18:37:52.547773  Root Device: enabled 1

  580 18:37:52.550604   CPU_CLUSTER: 0: enabled 1

  581 18:37:52.553638    APIC: 00: enabled 1

  582 18:37:52.554186    APIC: 02: enabled 1

  583 18:37:52.557292   DOMAIN: 0000: enabled 1

  584 18:37:52.560440    PCI: 00:00.0: enabled 1

  585 18:37:52.563433    PCI: 00:02.0: enabled 1

  586 18:37:52.567076    PCI: 00:04.0: enabled 1

  587 18:37:52.567655     GENERIC: 0.0: enabled 1

  588 18:37:52.570628    PCI: 00:05.0: enabled 1

  589 18:37:52.573722     GENERIC: 0.0: enabled 1

  590 18:37:52.577530    PCI: 00:09.0: enabled 0

  591 18:37:52.580639    PCI: 00:12.6: enabled 0

  592 18:37:52.581175    PCI: 00:14.0: enabled 1

  593 18:37:52.583593     USB0 port 0: enabled 1

  594 18:37:52.587455      USB2 port 0: enabled 1

  595 18:37:52.590386      USB2 port 1: enabled 1

  596 18:37:52.593434      USB2 port 2: enabled 1

  597 18:37:52.593885      USB2 port 3: enabled 1

  598 18:37:52.596855      USB2 port 4: enabled 0

  599 18:37:52.600561      USB2 port 5: enabled 1

  600 18:37:52.603590      USB2 port 6: enabled 0

  601 18:37:52.606562      USB2 port 7: enabled 1

  602 18:37:52.610402      USB3 port 0: enabled 1

  603 18:37:52.610933      USB3 port 1: enabled 1

  604 18:37:52.613897      USB3 port 2: enabled 1

  605 18:37:52.616692      USB3 port 3: enabled 1

  606 18:37:52.620336    PCI: 00:14.1: enabled 0

  607 18:37:52.623623    PCI: 00:14.2: enabled 0

  608 18:37:52.624072    PCI: 00:14.3: enabled 1

  609 18:37:52.626557     GENERIC: 0.0: enabled 1

  610 18:37:52.630151    PCI: 00:14.5: enabled 1

  611 18:37:52.633289    PCI: 00:15.0: enabled 1

  612 18:37:52.637111     I2C: 00:2c: enabled 1

  613 18:37:52.637558     I2C: 00:15: enabled 1

  614 18:37:52.640576    PCI: 00:15.1: enabled 1

  615 18:37:52.643710    PCI: 00:15.2: enabled 1

  616 18:37:52.647027     GENERIC: 0.0: enabled 0

  617 18:37:52.650211     I2C: 00:15: enabled 1

  618 18:37:52.650679     I2C: 00:10: enabled 0

  619 18:37:52.653482     I2C: 00:10: enabled 0

  620 18:37:52.656374     I2C: 00:2c: enabled 1

  621 18:37:52.660025     I2C: 00:40: enabled 1

  622 18:37:52.660543     I2C: 00:10: enabled 1

  623 18:37:52.663008     I2C: 00:39: enabled 1

  624 18:37:52.666781    PCI: 00:15.3: enabled 1

  625 18:37:52.670027     I2C: 00:36: enabled 1

  626 18:37:52.670603     I2C: 00:10: enabled 0

  627 18:37:52.672936     I2C: 00:0c: enabled 1

  628 18:37:52.676400     I2C: 00:50: enabled 1

  629 18:37:52.679452    PCI: 00:16.0: enabled 1

  630 18:37:52.683244    PCI: 00:16.1: enabled 0

  631 18:37:52.683693    PCI: 00:16.4: enabled 0

  632 18:37:52.686354    PCI: 00:16.5: enabled 0

  633 18:37:52.689962    PCI: 00:17.0: enabled 0

  634 18:37:52.692904    PCI: 00:19.0: enabled 1

  635 18:37:52.696664     I2C: 00:1a: enabled 1

  636 18:37:52.697073     I2C: 00:1a: enabled 0

  637 18:37:52.699470     I2C: 00:1a: enabled 0

  638 18:37:52.703046     I2C: 00:28: enabled 1

  639 18:37:52.706155     I2C: 00:29: enabled 1

  640 18:37:52.706564    PCI: 00:19.1: enabled 0

  641 18:37:52.709846    PCI: 00:19.2: enabled 1

  642 18:37:52.712773    PCI: 00:1a.0: enabled 1

  643 18:37:52.715840    PCI: 00:1e.0: enabled 0

  644 18:37:52.719528    PCI: 00:1e.1: enabled 0

  645 18:37:52.719766    PCI: 00:1e.2: enabled 1

  646 18:37:52.722366     SPI: 00: enabled 1

  647 18:37:52.726209    PCI: 00:1e.3: enabled 0

  648 18:37:52.729539    PCI: 00:1f.0: enabled 1

  649 18:37:52.729696     PNP: 0c09.0: enabled 1

  650 18:37:52.732279    PCI: 00:1f.1: enabled 1

  651 18:37:52.736089    PCI: 00:1f.2: enabled 1

  652 18:37:52.739059    PCI: 00:1f.3: enabled 1

  653 18:37:52.742131     GENERIC: 0.0: enabled 0

  654 18:37:52.742236    PCI: 00:1f.4: enabled 0

  655 18:37:52.745590    PCI: 00:1f.5: enabled 1

  656 18:37:52.749356    PCI: 00:1f.7: enabled 0

  657 18:37:52.752299  Root Device scanning...

  658 18:37:52.755410  scan_static_bus for Root Device

  659 18:37:52.759210  CPU_CLUSTER: 0 enabled

  660 18:37:52.759308  DOMAIN: 0000 enabled

  661 18:37:52.762095  DOMAIN: 0000 scanning...

  662 18:37:52.765797  PCI: pci_scan_bus for bus 00

  663 18:37:52.768651  PCI: 00:00.0 [8086/0000] ops

  664 18:37:52.772308  PCI: 00:00.0 [8086/4e22] enabled

  665 18:37:52.775349  PCI: 00:02.0 [8086/0000] bus ops

  666 18:37:52.778924  PCI: 00:02.0 [8086/4e55] enabled

  667 18:37:52.782099  PCI: 00:04.0 [8086/0000] bus ops

  668 18:37:52.785668  PCI: 00:04.0 [8086/4e03] enabled

  669 18:37:52.788634  PCI: 00:05.0 [8086/0000] bus ops

  670 18:37:52.792193  PCI: 00:05.0 [8086/4e19] enabled

  671 18:37:52.795838  PCI: 00:08.0 [8086/4e11] enabled

  672 18:37:52.798891  PCI: 00:14.0 [8086/0000] bus ops

  673 18:37:52.802137  PCI: 00:14.0 [8086/4ded] enabled

  674 18:37:52.805629  PCI: 00:14.2 [8086/4def] disabled

  675 18:37:52.808732  PCI: 00:14.3 [8086/0000] bus ops

  676 18:37:52.812311  PCI: 00:14.3 [8086/4df0] enabled

  677 18:37:52.815350  PCI: 00:14.5 [8086/0000] ops

  678 18:37:52.818635  PCI: 00:14.5 [8086/4df8] enabled

  679 18:37:52.822537  PCI: 00:15.0 [8086/0000] bus ops

  680 18:37:52.825782  PCI: 00:15.0 [8086/4de8] enabled

  681 18:37:52.829241  PCI: 00:15.1 [8086/0000] bus ops

  682 18:37:52.832458  PCI: 00:15.1 [8086/4de9] enabled

  683 18:37:52.835347  PCI: 00:15.2 [8086/0000] bus ops

  684 18:37:52.839145  PCI: 00:15.2 [8086/4dea] enabled

  685 18:37:52.842289  PCI: 00:15.3 [8086/0000] bus ops

  686 18:37:52.845197  PCI: 00:15.3 [8086/4deb] enabled

  687 18:37:52.849031  PCI: 00:16.0 [8086/0000] ops

  688 18:37:52.852124  PCI: 00:16.0 [8086/4de0] enabled

  689 18:37:52.855449  PCI: 00:19.0 [8086/0000] bus ops

  690 18:37:52.858703  PCI: 00:19.0 [8086/4dc5] enabled

  691 18:37:52.858817  PCI: 00:19.2 [8086/0000] ops

  692 18:37:52.861891  PCI: 00:19.2 [8086/4dc7] enabled

  693 18:37:52.865414  PCI: 00:1a.0 [8086/0000] ops

  694 18:37:52.868512  PCI: 00:1a.0 [8086/4dc4] enabled

  695 18:37:52.872188  PCI: 00:1e.0 [8086/0000] ops

  696 18:37:52.875121  PCI: 00:1e.0 [8086/4da8] disabled

  697 18:37:52.878688  PCI: 00:1e.2 [8086/0000] bus ops

  698 18:37:52.882327  PCI: 00:1e.2 [8086/4daa] enabled

  699 18:37:52.885954  PCI: 00:1f.0 [8086/0000] bus ops

  700 18:37:52.889150  PCI: 00:1f.0 [8086/4d87] enabled

  701 18:37:52.895744  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  702 18:37:52.896005  RTC Init

  703 18:37:52.898754  Set power on after power failure.

  704 18:37:52.901936  Disabling Deep S3

  705 18:37:52.902226  Disabling Deep S3

  706 18:37:52.905715  Disabling Deep S4

  707 18:37:52.908526  Disabling Deep S4

  708 18:37:52.908833  Disabling Deep S5

  709 18:37:52.912310  Disabling Deep S5

  710 18:37:52.915384  PCI: 00:1f.2 [0000/0000] hidden

  711 18:37:52.919132  PCI: 00:1f.3 [8086/0000] bus ops

  712 18:37:52.922057  PCI: 00:1f.3 [8086/4dc8] enabled

  713 18:37:52.925378  PCI: 00:1f.5 [8086/0000] bus ops

  714 18:37:52.928752  PCI: 00:1f.5 [8086/4da4] enabled

  715 18:37:52.931839  PCI: Leftover static devices:

  716 18:37:52.932281  PCI: 00:12.6

  717 18:37:52.932630  PCI: 00:09.0

  718 18:37:52.935398  PCI: 00:14.1

  719 18:37:52.935839  PCI: 00:16.1

  720 18:37:52.938683  PCI: 00:16.4

  721 18:37:52.939252  PCI: 00:16.5

  722 18:37:52.939610  PCI: 00:17.0

  723 18:37:52.942286  PCI: 00:19.1

  724 18:37:52.942712  PCI: 00:1e.1

  725 18:37:52.945479  PCI: 00:1e.3

  726 18:37:52.945986  PCI: 00:1f.1

  727 18:37:52.949092  PCI: 00:1f.4

  728 18:37:52.949537  PCI: 00:1f.7

  729 18:37:52.952015  PCI: Check your devicetree.cb.

  730 18:37:52.955673  PCI: 00:02.0 scanning...

  731 18:37:52.958844  scan_generic_bus for PCI: 00:02.0

  732 18:37:52.961974  scan_generic_bus for PCI: 00:02.0 done

  733 18:37:52.965421  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  734 18:37:52.968360  PCI: 00:04.0 scanning...

  735 18:37:52.971964  scan_generic_bus for PCI: 00:04.0

  736 18:37:52.975171  GENERIC: 0.0 enabled

  737 18:37:52.981813  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  738 18:37:52.984804  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  739 18:37:52.988674  PCI: 00:05.0 scanning...

  740 18:37:52.991754  scan_generic_bus for PCI: 00:05.0

  741 18:37:52.995498  GENERIC: 0.0 enabled

  742 18:37:52.998428  bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done

  743 18:37:53.005262  scan_bus: bus PCI: 00:05.0 finished in 11 msecs

  744 18:37:53.008098  PCI: 00:14.0 scanning...

  745 18:37:53.011974  scan_static_bus for PCI: 00:14.0

  746 18:37:53.012389  USB0 port 0 enabled

  747 18:37:53.015437  USB0 port 0 scanning...

  748 18:37:53.018548  scan_static_bus for USB0 port 0

  749 18:37:53.021440  USB2 port 0 enabled

  750 18:37:53.021849  USB2 port 1 enabled

  751 18:37:53.025454  USB2 port 2 enabled

  752 18:37:53.028433  USB2 port 3 enabled

  753 18:37:53.028845  USB2 port 4 disabled

  754 18:37:53.031561  USB2 port 5 enabled

  755 18:37:53.031966  USB2 port 6 disabled

  756 18:37:53.035068  USB2 port 7 enabled

  757 18:37:53.038306  USB3 port 0 enabled

  758 18:37:53.038711  USB3 port 1 enabled

  759 18:37:53.041873  USB3 port 2 enabled

  760 18:37:53.045065  USB3 port 3 enabled

  761 18:37:53.045472  USB2 port 0 scanning...

  762 18:37:53.048120  scan_static_bus for USB2 port 0

  763 18:37:53.051645  scan_static_bus for USB2 port 0 done

  764 18:37:53.058334  scan_bus: bus USB2 port 0 finished in 6 msecs

  765 18:37:53.061837  USB2 port 1 scanning...

  766 18:37:53.064991  scan_static_bus for USB2 port 1

  767 18:37:53.068248  scan_static_bus for USB2 port 1 done

  768 18:37:53.071282  scan_bus: bus USB2 port 1 finished in 6 msecs

  769 18:37:53.075049  USB2 port 2 scanning...

  770 18:37:53.078186  scan_static_bus for USB2 port 2

  771 18:37:53.081295  scan_static_bus for USB2 port 2 done

  772 18:37:53.084771  scan_bus: bus USB2 port 2 finished in 6 msecs

  773 18:37:53.087805  USB2 port 3 scanning...

  774 18:37:53.091601  scan_static_bus for USB2 port 3

  775 18:37:53.094665  scan_static_bus for USB2 port 3 done

  776 18:37:53.101425  scan_bus: bus USB2 port 3 finished in 6 msecs

  777 18:37:53.101874  USB2 port 5 scanning...

  778 18:37:53.104449  scan_static_bus for USB2 port 5

  779 18:37:53.108152  scan_static_bus for USB2 port 5 done

  780 18:37:53.114711  scan_bus: bus USB2 port 5 finished in 6 msecs

  781 18:37:53.117869  USB2 port 7 scanning...

  782 18:37:53.120965  scan_static_bus for USB2 port 7

  783 18:37:53.124522  scan_static_bus for USB2 port 7 done

  784 18:37:53.127736  scan_bus: bus USB2 port 7 finished in 6 msecs

  785 18:37:53.131389  USB3 port 0 scanning...

  786 18:37:53.134550  scan_static_bus for USB3 port 0

  787 18:37:53.138059  scan_static_bus for USB3 port 0 done

  788 18:37:53.141298  scan_bus: bus USB3 port 0 finished in 6 msecs

  789 18:37:53.144746  USB3 port 1 scanning...

  790 18:37:53.147584  scan_static_bus for USB3 port 1

  791 18:37:53.151291  scan_static_bus for USB3 port 1 done

  792 18:37:53.158185  scan_bus: bus USB3 port 1 finished in 6 msecs

  793 18:37:53.158736  USB3 port 2 scanning...

  794 18:37:53.161191  scan_static_bus for USB3 port 2

  795 18:37:53.164229  scan_static_bus for USB3 port 2 done

  796 18:37:53.171160  scan_bus: bus USB3 port 2 finished in 6 msecs

  797 18:37:53.174128  USB3 port 3 scanning...

  798 18:37:53.177926  scan_static_bus for USB3 port 3

  799 18:37:53.181256  scan_static_bus for USB3 port 3 done

  800 18:37:53.184299  scan_bus: bus USB3 port 3 finished in 6 msecs

  801 18:37:53.187507  scan_static_bus for USB0 port 0 done

  802 18:37:53.194076  scan_bus: bus USB0 port 0 finished in 172 msecs

  803 18:37:53.198218  scan_static_bus for PCI: 00:14.0 done

  804 18:37:53.200742  scan_bus: bus PCI: 00:14.0 finished in 189 msecs

  805 18:37:53.204494  PCI: 00:14.3 scanning...

  806 18:37:53.207878  scan_static_bus for PCI: 00:14.3

  807 18:37:53.211002  GENERIC: 0.0 enabled

  808 18:37:53.213978  scan_static_bus for PCI: 00:14.3 done

  809 18:37:53.217550  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  810 18:37:53.220570  PCI: 00:15.0 scanning...

  811 18:37:53.224242  scan_static_bus for PCI: 00:15.0

  812 18:37:53.227172  I2C: 00:2c enabled

  813 18:37:53.227631  I2C: 00:15 enabled

  814 18:37:53.230802  scan_static_bus for PCI: 00:15.0 done

  815 18:37:53.237468  scan_bus: bus PCI: 00:15.0 finished in 11 msecs

  816 18:37:53.240569  PCI: 00:15.1 scanning...

  817 18:37:53.244297  scan_static_bus for PCI: 00:15.1

  818 18:37:53.247713  scan_static_bus for PCI: 00:15.1 done

  819 18:37:53.250534  scan_bus: bus PCI: 00:15.1 finished in 7 msecs

  820 18:37:53.254163  PCI: 00:15.2 scanning...

  821 18:37:53.257501  scan_static_bus for PCI: 00:15.2

  822 18:37:53.260396  GENERIC: 0.0 disabled

  823 18:37:53.260838  I2C: 00:15 enabled

  824 18:37:53.264046  I2C: 00:10 disabled

  825 18:37:53.267136  I2C: 00:10 disabled

  826 18:37:53.267582  I2C: 00:2c enabled

  827 18:37:53.270794  I2C: 00:40 enabled

  828 18:37:53.271277  I2C: 00:10 enabled

  829 18:37:53.273963  I2C: 00:39 enabled

  830 18:37:53.277283  scan_static_bus for PCI: 00:15.2 done

  831 18:37:53.283774  scan_bus: bus PCI: 00:15.2 finished in 23 msecs

  832 18:37:53.284315  PCI: 00:15.3 scanning...

  833 18:37:53.286932  scan_static_bus for PCI: 00:15.3

  834 18:37:53.290435  I2C: 00:36 enabled

  835 18:37:53.293958  I2C: 00:10 disabled

  836 18:37:53.294484  I2C: 00:0c enabled

  837 18:37:53.297361  I2C: 00:50 enabled

  838 18:37:53.300176  scan_static_bus for PCI: 00:15.3 done

  839 18:37:53.303706  scan_bus: bus PCI: 00:15.3 finished in 15 msecs

  840 18:37:53.307352  PCI: 00:19.0 scanning...

  841 18:37:53.310376  scan_static_bus for PCI: 00:19.0

  842 18:37:53.313560  I2C: 00:1a enabled

  843 18:37:53.314005  I2C: 00:1a disabled

  844 18:37:53.317136  I2C: 00:1a disabled

  845 18:37:53.320123  I2C: 00:28 enabled

  846 18:37:53.320599  I2C: 00:29 enabled

  847 18:37:53.324040  scan_static_bus for PCI: 00:19.0 done

  848 18:37:53.330570  scan_bus: bus PCI: 00:19.0 finished in 17 msecs

  849 18:37:53.331031  PCI: 00:1e.2 scanning...

  850 18:37:53.337356  scan_generic_bus for PCI: 00:1e.2

  851 18:37:53.337773  SPI: 00 enabled

  852 18:37:53.343665  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

  853 18:37:53.346988  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

  854 18:37:53.350051  PCI: 00:1f.0 scanning...

  855 18:37:53.353813  scan_static_bus for PCI: 00:1f.0

  856 18:37:53.356931  PNP: 0c09.0 enabled

  857 18:37:53.357366  PNP: 0c09.0 scanning...

  858 18:37:53.360384  scan_static_bus for PNP: 0c09.0

  859 18:37:53.366661  scan_static_bus for PNP: 0c09.0 done

  860 18:37:53.370280  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

  861 18:37:53.373285  scan_static_bus for PCI: 00:1f.0 done

  862 18:37:53.380052  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

  863 18:37:53.380498  PCI: 00:1f.3 scanning...

  864 18:37:53.383640  scan_static_bus for PCI: 00:1f.3

  865 18:37:53.387343  GENERIC: 0.0 disabled

  866 18:37:53.390271  scan_static_bus for PCI: 00:1f.3 done

  867 18:37:53.396887  scan_bus: bus PCI: 00:1f.3 finished in 9 msecs

  868 18:37:53.397292  PCI: 00:1f.5 scanning...

  869 18:37:53.399918  scan_generic_bus for PCI: 00:1f.5

  870 18:37:53.406865  scan_generic_bus for PCI: 00:1f.5 done

  871 18:37:53.409807  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

  872 18:37:53.416560  scan_bus: bus DOMAIN: 0000 finished in 647 msecs

  873 18:37:53.419939  scan_static_bus for Root Device done

  874 18:37:53.422911  scan_bus: bus Root Device finished in 666 msecs

  875 18:37:53.423391  done

  876 18:37:53.429644  BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1087 ms

  877 18:37:53.433076  Chrome EC: UHEPI supported

  878 18:37:53.440184  FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)

  879 18:37:53.446838  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

  880 18:37:53.450160  SPI flash protection: WPSW=0 SRP0=1

  881 18:37:53.453013  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

  882 18:37:53.460012  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

  883 18:37:53.462934  found VGA at PCI: 00:02.0

  884 18:37:53.466801  Setting up VGA for PCI: 00:02.0

  885 18:37:53.469992  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

  886 18:37:53.476526  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

  887 18:37:53.479445  Allocating resources...

  888 18:37:53.479890  Reading resources...

  889 18:37:53.483037  Root Device read_resources bus 0 link: 0

  890 18:37:53.489709  CPU_CLUSTER: 0 read_resources bus 0 link: 0

  891 18:37:53.493275  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

  892 18:37:53.499913  DOMAIN: 0000 read_resources bus 0 link: 0

  893 18:37:53.503024  PCI: 00:04.0 read_resources bus 1 link: 0

  894 18:37:53.509653  PCI: 00:04.0 read_resources bus 1 link: 0 done

  895 18:37:53.513429  PCI: 00:05.0 read_resources bus 2 link: 0

  896 18:37:53.573924  PCI: 00:05.0 read_resources bus 2 link: 0 done

  897 18:37:53.574619  PCI: 00:14.0 read_resources bus 0 link: 0

  898 18:37:53.575001  USB0 port 0 read_resources bus 0 link: 0

  899 18:37:53.575382  USB0 port 0 read_resources bus 0 link: 0 done

  900 18:37:53.575773  PCI: 00:14.0 read_resources bus 0 link: 0 done

  901 18:37:53.576466  PCI: 00:14.3 read_resources bus 0 link: 0

  902 18:37:53.576852  PCI: 00:14.3 read_resources bus 0 link: 0 done

  903 18:37:53.577239  PCI: 00:15.0 read_resources bus 0 link: 0

  904 18:37:53.577550  PCI: 00:15.0 read_resources bus 0 link: 0 done

  905 18:37:53.577856  PCI: 00:15.2 read_resources bus 0 link: 0

  906 18:37:53.578153  PCI: 00:15.2 read_resources bus 0 link: 0 done

  907 18:37:53.578445  PCI: 00:15.3 read_resources bus 0 link: 0

  908 18:37:53.627227  PCI: 00:15.3 read_resources bus 0 link: 0 done

  909 18:37:53.628087  PCI: 00:19.0 read_resources bus 0 link: 0

  910 18:37:53.628485  PCI: 00:19.0 read_resources bus 0 link: 0 done

  911 18:37:53.628826  PCI: 00:1e.2 read_resources bus 3 link: 0

  912 18:37:53.629475  PCI: 00:1e.2 read_resources bus 3 link: 0 done

  913 18:37:53.629850  PCI: 00:1f.0 read_resources bus 0 link: 0

  914 18:37:53.630219  PCI: 00:1f.0 read_resources bus 0 link: 0 done

  915 18:37:53.630529  PCI: 00:1f.3 read_resources bus 0 link: 0

  916 18:37:53.630834  PCI: 00:1f.3 read_resources bus 0 link: 0 done

  917 18:37:53.631179  DOMAIN: 0000 read_resources bus 0 link: 0 done

  918 18:37:53.631485  Root Device read_resources bus 0 link: 0 done

  919 18:37:53.662386  Done reading resources.

  920 18:37:53.662911  Show resources in subtree (Root Device)...After reading.

  921 18:37:53.663325   Root Device child on link 0 CPU_CLUSTER: 0

  922 18:37:53.663725    CPU_CLUSTER: 0 child on link 0 APIC: 00

  923 18:37:53.664265     APIC: 00

  924 18:37:53.664691     APIC: 02

  925 18:37:53.665361    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  926 18:37:53.665713    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  927 18:37:53.669654    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

  928 18:37:53.672607     PCI: 00:00.0

  929 18:37:53.683035     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

  930 18:37:53.689156     PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

  931 18:37:53.699244     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

  932 18:37:53.709174     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

  933 18:37:53.719000     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

  934 18:37:53.729300     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

  935 18:37:53.735874     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

  936 18:37:53.746142     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

  937 18:37:53.755798     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

  938 18:37:53.765611     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

  939 18:37:53.775556     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

  940 18:37:53.785559     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

  941 18:37:53.792512     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

  942 18:37:53.801826     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

  943 18:37:53.812009     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

  944 18:37:53.822303     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

  945 18:37:53.831939     PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10

  946 18:37:53.842102     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

  947 18:37:53.848576     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

  948 18:37:53.851621     PCI: 00:02.0

  949 18:37:53.862167     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  950 18:37:53.871893     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

  951 18:37:53.881731     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

  952 18:37:53.884833     PCI: 00:04.0 child on link 0 GENERIC: 0.0

  953 18:37:53.894660     PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  954 18:37:53.898241      GENERIC: 0.0

  955 18:37:53.901289     PCI: 00:05.0 child on link 0 GENERIC: 0.0

  956 18:37:53.911160     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  957 18:37:53.915048      GENERIC: 0.0

  958 18:37:53.915622     PCI: 00:08.0

  959 18:37:53.924521     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  960 18:37:53.928498     PCI: 00:14.0 child on link 0 USB0 port 0

  961 18:37:53.938096     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  962 18:37:53.945057      USB0 port 0 child on link 0 USB2 port 0

  963 18:37:53.945529       USB2 port 0

  964 18:37:53.947858       USB2 port 1

  965 18:37:53.948275       USB2 port 2

  966 18:37:53.951383       USB2 port 3

  967 18:37:53.951801       USB2 port 4

  968 18:37:53.954472       USB2 port 5

  969 18:37:53.954888       USB2 port 6

  970 18:37:53.958096       USB2 port 7

  971 18:37:53.958510       USB3 port 0

  972 18:37:53.961282       USB3 port 1

  973 18:37:53.964286       USB3 port 2

  974 18:37:53.964698       USB3 port 3

  975 18:37:53.968104     PCI: 00:14.2

  976 18:37:53.971178     PCI: 00:14.3 child on link 0 GENERIC: 0.0

  977 18:37:53.981010     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

  978 18:37:53.981529      GENERIC: 0.0

  979 18:37:53.984727     PCI: 00:14.5

  980 18:37:53.994442     PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  981 18:37:54.000418     PCI: 00:15.0 child on link 0 I2C: 00:2c

  982 18:37:54.007554     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  983 18:37:54.011025      I2C: 00:2c

  984 18:37:54.011493      I2C: 00:15

  985 18:37:54.014184     PCI: 00:15.1

  986 18:37:54.024564     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  987 18:37:54.027549     PCI: 00:15.2 child on link 0 GENERIC: 0.0

  988 18:37:54.037396     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  989 18:37:54.041037      GENERIC: 0.0

  990 18:37:54.041441      I2C: 00:15

  991 18:37:54.041764      I2C: 00:10

  992 18:37:54.044077      I2C: 00:10

  993 18:37:54.044483      I2C: 00:2c

  994 18:37:54.047233      I2C: 00:40

  995 18:37:54.047688      I2C: 00:10

  996 18:37:54.050938      I2C: 00:39

  997 18:37:54.054155     PCI: 00:15.3 child on link 0 I2C: 00:36

  998 18:37:54.064157     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  999 18:37:54.067433      I2C: 00:36

 1000 18:37:54.067989      I2C: 00:10

 1001 18:37:54.070918      I2C: 00:0c

 1002 18:37:54.071485      I2C: 00:50

 1003 18:37:54.073932     PCI: 00:16.0

 1004 18:37:54.084373     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1005 18:37:54.087456     PCI: 00:19.0 child on link 0 I2C: 00:1a

 1006 18:37:54.097288     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1007 18:37:54.097746      I2C: 00:1a

 1008 18:37:54.100975      I2C: 00:1a

 1009 18:37:54.101424      I2C: 00:1a

 1010 18:37:54.103976      I2C: 00:28

 1011 18:37:54.104427      I2C: 00:29

 1012 18:37:54.107186     PCI: 00:19.2

 1013 18:37:54.117440     PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1014 18:37:54.127404     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1015 18:37:54.127923     PCI: 00:1a.0

 1016 18:37:54.137051     PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1017 18:37:54.140505     PCI: 00:1e.0

 1018 18:37:54.143916     PCI: 00:1e.2 child on link 0 SPI: 00

 1019 18:37:54.153338     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1020 18:37:54.157225      SPI: 00

 1021 18:37:54.160245     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1022 18:37:54.167073     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1023 18:37:54.170326      PNP: 0c09.0

 1024 18:37:54.180207      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1025 18:37:54.180664     PCI: 00:1f.2

 1026 18:37:54.190245     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1027 18:37:54.199874     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1

 1028 18:37:54.203528     PCI: 00:1f.3 child on link 0 GENERIC: 0.0

 1029 18:37:54.213850     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1030 18:37:54.223615     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1031 18:37:54.226652      GENERIC: 0.0

 1032 18:37:54.227183     PCI: 00:1f.5

 1033 18:37:54.236765     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1034 18:37:54.243695  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1035 18:37:54.249977  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1036 18:37:54.256621  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1037 18:37:54.266761   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1038 18:37:54.273518   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1039 18:37:54.279679   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1040 18:37:54.283357   DOMAIN: 0000: Resource ranges:

 1041 18:37:54.286315   * Base: 1000, Size: 800, Tag: 100

 1042 18:37:54.290099   * Base: 1900, Size: e700, Tag: 100

 1043 18:37:54.296233    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1044 18:37:54.303214  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1045 18:37:54.310028  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1046 18:37:54.316787   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1047 18:37:54.323544   update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)

 1048 18:37:54.333176   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1049 18:37:54.339872   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1050 18:37:54.346425   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1051 18:37:54.356197   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1052 18:37:54.362834   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1053 18:37:54.369257   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1054 18:37:54.379698   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1055 18:37:54.386251   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1056 18:37:54.393164   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1057 18:37:54.403022   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1058 18:37:54.409731   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1059 18:37:54.416282   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1060 18:37:54.425970   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1061 18:37:54.432511   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1062 18:37:54.439531   update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)

 1063 18:37:54.449061   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1064 18:37:54.455973   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1065 18:37:54.462248   update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)

 1066 18:37:54.472654   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1067 18:37:54.475542   DOMAIN: 0000: Resource ranges:

 1068 18:37:54.479274   * Base: 7fc00000, Size: 40400000, Tag: 200

 1069 18:37:54.482359   * Base: d0000000, Size: 2b000000, Tag: 200

 1070 18:37:54.488811   * Base: fb001000, Size: 2fff000, Tag: 200

 1071 18:37:54.491913   * Base: fe010000, Size: 22000, Tag: 200

 1072 18:37:54.495109   * Base: fe033000, Size: a4d000, Tag: 200

 1073 18:37:54.498791   * Base: fea88000, Size: 2f8000, Tag: 200

 1074 18:37:54.505541   * Base: fed88000, Size: 8000, Tag: 200

 1075 18:37:54.508576   * Base: fed93000, Size: d000, Tag: 200

 1076 18:37:54.512154   * Base: feda2000, Size: 125e000, Tag: 200

 1077 18:37:54.518201   * Base: 180400000, Size: 7e7fc00000, Tag: 100200

 1078 18:37:54.525092    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1079 18:37:54.531611    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1080 18:37:54.538404    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1081 18:37:54.544631    PCI: 00:1f.3 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1082 18:37:54.551548    PCI: 00:04.0 10 *  [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem

 1083 18:37:54.558262    PCI: 00:14.0 10 *  [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem

 1084 18:37:54.564964    PCI: 00:14.3 10 *  [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem

 1085 18:37:54.571603    PCI: 00:1f.3 10 *  [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem

 1086 18:37:54.578545    PCI: 00:08.0 10 *  [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem

 1087 18:37:54.584724    PCI: 00:14.5 10 *  [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem

 1088 18:37:54.591031    PCI: 00:15.0 10 *  [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem

 1089 18:37:54.597955    PCI: 00:15.1 10 *  [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem

 1090 18:37:54.605177    PCI: 00:15.2 10 *  [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem

 1091 18:37:54.610932    PCI: 00:15.3 10 *  [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem

 1092 18:37:54.617686    PCI: 00:16.0 10 *  [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem

 1093 18:37:54.624393    PCI: 00:19.0 10 *  [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem

 1094 18:37:54.631441    PCI: 00:19.2 18 *  [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem

 1095 18:37:54.637889    PCI: 00:1a.0 10 *  [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem

 1096 18:37:54.644781    PCI: 00:1e.2 10 *  [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem

 1097 18:37:54.651309    PCI: 00:1f.5 10 *  [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem

 1098 18:37:54.657549  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1099 18:37:54.663978  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1100 18:37:54.667577  Root Device assign_resources, bus 0 link: 0

 1101 18:37:54.674101  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1102 18:37:54.681130  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1103 18:37:54.690865  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1104 18:37:54.697421  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1105 18:37:54.707473  PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64

 1106 18:37:54.710542  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1107 18:37:54.714109  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1108 18:37:54.723722  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1109 18:37:54.727354  PCI: 00:05.0 assign_resources, bus 2 link: 0

 1110 18:37:54.734145  PCI: 00:05.0 assign_resources, bus 2 link: 0

 1111 18:37:54.740274  PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64

 1112 18:37:54.750254  PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64

 1113 18:37:54.753286  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1114 18:37:54.757400  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1115 18:37:54.766892  PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64

 1116 18:37:54.769767  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1117 18:37:54.776654  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1118 18:37:54.783412  PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64

 1119 18:37:54.793189  PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64

 1120 18:37:54.796312  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1121 18:37:54.800165  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1122 18:37:54.809915  PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64

 1123 18:37:54.816452  PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64

 1124 18:37:54.823310  PCI: 00:15.2 assign_resources, bus 0 link: 0

 1125 18:37:54.826343  PCI: 00:15.2 assign_resources, bus 0 link: 0

 1126 18:37:54.832930  PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64

 1127 18:37:54.839564  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1128 18:37:54.843193  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1129 18:37:54.852761  PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64

 1130 18:37:54.859393  PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64

 1131 18:37:54.863070  PCI: 00:19.0 assign_resources, bus 0 link: 0

 1132 18:37:54.869567  PCI: 00:19.0 assign_resources, bus 0 link: 0

 1133 18:37:54.876202  PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64

 1134 18:37:54.886578  PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64

 1135 18:37:54.892707  PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64

 1136 18:37:54.899385  PCI: 00:1e.2 assign_resources, bus 3 link: 0

 1137 18:37:54.903068  PCI: 00:1e.2 assign_resources, bus 3 link: 0

 1138 18:37:54.906254  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1139 18:37:54.912855  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1140 18:37:54.916016  LPC: Trying to open IO window from 800 size 1ff

 1141 18:37:54.926191  PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64

 1142 18:37:54.932808  PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64

 1143 18:37:54.939529  PCI: 00:1f.3 assign_resources, bus 0 link: 0

 1144 18:37:54.942742  PCI: 00:1f.3 assign_resources, bus 0 link: 0

 1145 18:37:54.949222  PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem

 1146 18:37:54.955881  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1147 18:37:54.959283  Root Device assign_resources, bus 0 link: 0

 1148 18:37:54.962309  Done setting resources.

 1149 18:37:54.969044  Show resources in subtree (Root Device)...After assigning values.

 1150 18:37:54.972551   Root Device child on link 0 CPU_CLUSTER: 0

 1151 18:37:54.976156    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1152 18:37:54.979146     APIC: 00

 1153 18:37:54.979575     APIC: 02

 1154 18:37:54.985698    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1155 18:37:54.992433    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1156 18:37:55.001892    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1157 18:37:55.005624     PCI: 00:00.0

 1158 18:37:55.015424     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1159 18:37:55.024996     PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1160 18:37:55.031508     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1161 18:37:55.041956     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1162 18:37:55.051525     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1163 18:37:55.061914     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1164 18:37:55.071496     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1165 18:37:55.078504     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1166 18:37:55.087730     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1167 18:37:55.098138     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1168 18:37:55.107789     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1169 18:37:55.117647     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1170 18:37:55.127733     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1171 18:37:55.134322     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1172 18:37:55.144122     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1173 18:37:55.154426     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1174 18:37:55.164095     PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1175 18:37:55.174352     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1176 18:37:55.184372     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1177 18:37:55.184518     PCI: 00:02.0

 1178 18:37:55.194102     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1179 18:37:55.207328     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1180 18:37:55.213947     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1181 18:37:55.220368     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1182 18:37:55.230533     PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10

 1183 18:37:55.230681      GENERIC: 0.0

 1184 18:37:55.237196     PCI: 00:05.0 child on link 0 GENERIC: 0.0

 1185 18:37:55.246924     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1186 18:37:55.247075      GENERIC: 0.0

 1187 18:37:55.250651     PCI: 00:08.0

 1188 18:37:55.260290     PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10

 1189 18:37:55.263880     PCI: 00:14.0 child on link 0 USB0 port 0

 1190 18:37:55.273706     PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10

 1191 18:37:55.280105      USB0 port 0 child on link 0 USB2 port 0

 1192 18:37:55.280224       USB2 port 0

 1193 18:37:55.283920       USB2 port 1

 1194 18:37:55.284036       USB2 port 2

 1195 18:37:55.286897       USB2 port 3

 1196 18:37:55.286997       USB2 port 4

 1197 18:37:55.290562       USB2 port 5

 1198 18:37:55.290662       USB2 port 6

 1199 18:37:55.293597       USB2 port 7

 1200 18:37:55.297297       USB3 port 0

 1201 18:37:55.297404       USB3 port 1

 1202 18:37:55.300329       USB3 port 2

 1203 18:37:55.300429       USB3 port 3

 1204 18:37:55.303605     PCI: 00:14.2

 1205 18:37:55.307207     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1206 18:37:55.316864     PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10

 1207 18:37:55.319978      GENERIC: 0.0

 1208 18:37:55.320118     PCI: 00:14.5

 1209 18:37:55.330240     PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10

 1210 18:37:55.336966     PCI: 00:15.0 child on link 0 I2C: 00:2c

 1211 18:37:55.346618     PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10

 1212 18:37:55.346719      I2C: 00:2c

 1213 18:37:55.350207      I2C: 00:15

 1214 18:37:55.350306     PCI: 00:15.1

 1215 18:37:55.360029     PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10

 1216 18:37:55.366532     PCI: 00:15.2 child on link 0 GENERIC: 0.0

 1217 18:37:55.376701     PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10

 1218 18:37:55.376880      GENERIC: 0.0

 1219 18:37:55.380339      I2C: 00:15

 1220 18:37:55.380519      I2C: 00:10

 1221 18:37:55.383099      I2C: 00:10

 1222 18:37:55.383271      I2C: 00:2c

 1223 18:37:55.386759      I2C: 00:40

 1224 18:37:55.386850      I2C: 00:10

 1225 18:37:55.386925      I2C: 00:39

 1226 18:37:55.393637     PCI: 00:15.3 child on link 0 I2C: 00:36

 1227 18:37:55.403500     PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10

 1228 18:37:55.403669      I2C: 00:36

 1229 18:37:55.406358      I2C: 00:10

 1230 18:37:55.406512      I2C: 00:0c

 1231 18:37:55.410160      I2C: 00:50

 1232 18:37:55.410262     PCI: 00:16.0

 1233 18:37:55.420428     PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10

 1234 18:37:55.426859     PCI: 00:19.0 child on link 0 I2C: 00:1a

 1235 18:37:55.436777     PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10

 1236 18:37:55.436994      I2C: 00:1a

 1237 18:37:55.439854      I2C: 00:1a

 1238 18:37:55.440061      I2C: 00:1a

 1239 18:37:55.442774      I2C: 00:28

 1240 18:37:55.442931      I2C: 00:29

 1241 18:37:55.446717     PCI: 00:19.2

 1242 18:37:55.456672     PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1243 18:37:55.466523     PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18

 1244 18:37:55.469872     PCI: 00:1a.0

 1245 18:37:55.479635     PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10

 1246 18:37:55.480088     PCI: 00:1e.0

 1247 18:37:55.483358     PCI: 00:1e.2 child on link 0 SPI: 00

 1248 18:37:55.496192     PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10

 1249 18:37:55.496824      SPI: 00

 1250 18:37:55.500184     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1251 18:37:55.509744     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1252 18:37:55.510263      PNP: 0c09.0

 1253 18:37:55.519504      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1254 18:37:55.522600     PCI: 00:1f.2

 1255 18:37:55.529313     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1256 18:37:55.539566     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1

 1257 18:37:55.546295     PCI: 00:1f.3 child on link 0 GENERIC: 0.0

 1258 18:37:55.556008     PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10

 1259 18:37:55.565731     PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20

 1260 18:37:55.566156      GENERIC: 0.0

 1261 18:37:55.569478     PCI: 00:1f.5

 1262 18:37:55.579232     PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10

 1263 18:37:55.582364  Done allocating resources.

 1264 18:37:55.589012  BS: BS_DEV_RESOURCES run times (exec / console): 20 / 2102 ms

 1265 18:37:55.589505  Enabling resources...

 1266 18:37:55.595763  PCI: 00:00.0 subsystem <- 8086/4e22

 1267 18:37:55.596178  PCI: 00:00.0 cmd <- 06

 1268 18:37:55.599332  PCI: 00:02.0 subsystem <- 8086/4e55

 1269 18:37:55.603132  PCI: 00:02.0 cmd <- 03

 1270 18:37:55.606060  PCI: 00:04.0 subsystem <- 8086/4e03

 1271 18:37:55.609078  PCI: 00:04.0 cmd <- 02

 1272 18:37:55.612693  PCI: 00:05.0 bridge ctrl <- 0003

 1273 18:37:55.615734  PCI: 00:05.0 subsystem <- 8086/4e19

 1274 18:37:55.619707  PCI: 00:05.0 cmd <- 02

 1275 18:37:55.622398  PCI: 00:08.0 cmd <- 06

 1276 18:37:55.625921  PCI: 00:14.0 subsystem <- 8086/4ded

 1277 18:37:55.626483  PCI: 00:14.0 cmd <- 02

 1278 18:37:55.632934  PCI: 00:14.3 subsystem <- 8086/4df0

 1279 18:37:55.633384  PCI: 00:14.3 cmd <- 02

 1280 18:37:55.635874  PCI: 00:14.5 subsystem <- 8086/4df8

 1281 18:37:55.639391  PCI: 00:14.5 cmd <- 06

 1282 18:37:55.642471  PCI: 00:15.0 subsystem <- 8086/4de8

 1283 18:37:55.646018  PCI: 00:15.0 cmd <- 02

 1284 18:37:55.648927  PCI: 00:15.1 subsystem <- 8086/4de9

 1285 18:37:55.652661  PCI: 00:15.1 cmd <- 02

 1286 18:37:55.655729  PCI: 00:15.2 subsystem <- 8086/4dea

 1287 18:37:55.659411  PCI: 00:15.2 cmd <- 02

 1288 18:37:55.662447  PCI: 00:15.3 subsystem <- 8086/4deb

 1289 18:37:55.665471  PCI: 00:15.3 cmd <- 02

 1290 18:37:55.669214  PCI: 00:16.0 subsystem <- 8086/4de0

 1291 18:37:55.669629  PCI: 00:16.0 cmd <- 02

 1292 18:37:55.676044  PCI: 00:19.0 subsystem <- 8086/4dc5

 1293 18:37:55.676567  PCI: 00:19.0 cmd <- 02

 1294 18:37:55.679218  PCI: 00:19.2 subsystem <- 8086/4dc7

 1295 18:37:55.682265  PCI: 00:19.2 cmd <- 06

 1296 18:37:55.685466  PCI: 00:1a.0 subsystem <- 8086/4dc4

 1297 18:37:55.689225  PCI: 00:1a.0 cmd <- 06

 1298 18:37:55.692511  PCI: 00:1e.2 subsystem <- 8086/4daa

 1299 18:37:55.695458  PCI: 00:1e.2 cmd <- 06

 1300 18:37:55.699386  PCI: 00:1f.0 subsystem <- 8086/4d87

 1301 18:37:55.702458  PCI: 00:1f.0 cmd <- 407

 1302 18:37:55.705360  PCI: 00:1f.3 subsystem <- 8086/4dc8

 1303 18:37:55.709050  PCI: 00:1f.3 cmd <- 02

 1304 18:37:55.712137  PCI: 00:1f.5 subsystem <- 8086/4da4

 1305 18:37:55.712549  PCI: 00:1f.5 cmd <- 406

 1306 18:37:55.717660  done.

 1307 18:37:55.721094  BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms

 1308 18:37:55.724524  Initializing devices...

 1309 18:37:55.727722  Root Device init

 1310 18:37:55.728166  mainboard: EC init

 1311 18:37:55.734468  Chrome EC: Set SMI mask to 0x0000000000000000

 1312 18:37:55.738026  FMAP: area RW_ELOG found @ bfa000 (4096 bytes)

 1313 18:37:55.740742  ELOG: NV offset 0xbfa000 size 0x1000

 1314 18:37:55.749721  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1315 18:37:55.756387  ELOG: Event(17) added with size 13 at 2023-02-25 18:37:55 UTC

 1316 18:37:55.762863  ELOG: Event(91) added with size 10 at 2023-02-25 18:37:55 UTC

 1317 18:37:55.769472  Chrome EC: clear events_b mask to 0x0000000000800000

 1318 18:37:55.775787  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1319 18:37:55.779372  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1320 18:37:55.786172  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e

 1321 18:37:55.792870  Chrome EC: Set WAKE mask to 0x0000000000000000

 1322 18:37:55.796626  Root Device init finished in 64 msecs

 1323 18:37:55.799550  PCI: 00:00.0 init

 1324 18:37:55.802712  CPU TDP = 6 Watts

 1325 18:37:55.803192  CPU PL1 = 7 Watts

 1326 18:37:55.806580  CPU PL2 = 12 Watts

 1327 18:37:55.809511  PCI: 00:00.0 init finished in 6 msecs

 1328 18:37:55.809965  PCI: 00:02.0 init

 1329 18:37:55.812569  GMA: Found VBT in CBFS

 1330 18:37:55.816356  GMA: Found valid VBT in CBFS

 1331 18:37:55.822467  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1332 18:37:55.829300                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1333 18:37:55.832266  PCI: 00:02.0 init finished in 18 msecs

 1334 18:37:55.835756  PCI: 00:08.0 init

 1335 18:37:55.839340  PCI: 00:08.0 init finished in 0 msecs

 1336 18:37:55.842509  PCI: 00:14.0 init

 1337 18:37:55.845889  XHCI: Updated LFPS sampling OFF time to 9 ms

 1338 18:37:55.848836  PCI: 00:14.0 init finished in 4 msecs

 1339 18:37:55.853064  PCI: 00:15.0 init

 1340 18:37:55.856136  I2C bus 0 version 0x3230302a

 1341 18:37:55.859260  DW I2C bus 0 at 0x7fd2a000 (400 KHz)

 1342 18:37:55.862833  PCI: 00:15.0 init finished in 6 msecs

 1343 18:37:55.865864  PCI: 00:15.1 init

 1344 18:37:55.869524  I2C bus 1 version 0x3230302a

 1345 18:37:55.872559  DW I2C bus 1 at 0x7fd2b000 (400 KHz)

 1346 18:37:55.876054  PCI: 00:15.1 init finished in 6 msecs

 1347 18:37:55.879698  PCI: 00:15.2 init

 1348 18:37:55.880108  I2C bus 2 version 0x3230302a

 1349 18:37:55.886701  DW I2C bus 2 at 0x7fd2c000 (400 KHz)

 1350 18:37:55.889556  PCI: 00:15.2 init finished in 6 msecs

 1351 18:37:55.889966  PCI: 00:15.3 init

 1352 18:37:55.893787  I2C bus 3 version 0x3230302a

 1353 18:37:55.897429  DW I2C bus 3 at 0x7fd2d000 (400 KHz)

 1354 18:37:55.901100  PCI: 00:15.3 init finished in 6 msecs

 1355 18:37:55.904343  PCI: 00:16.0 init

 1356 18:37:55.907954  PCI: 00:16.0 init finished in 0 msecs

 1357 18:37:55.908464  PCI: 00:19.0 init

 1358 18:37:55.911037  I2C bus 4 version 0x3230302a

 1359 18:37:55.914538  DW I2C bus 4 at 0x7fd2f000 (400 KHz)

 1360 18:37:55.921384  PCI: 00:19.0 init finished in 6 msecs

 1361 18:37:55.921828  PCI: 00:1a.0 init

 1362 18:37:55.924627  PCI: 00:1a.0 init finished in 0 msecs

 1363 18:37:55.928298  PCI: 00:1f.0 init

 1364 18:37:55.931124  IOAPIC: Initializing IOAPIC at 0xfec00000

 1365 18:37:55.938038  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1366 18:37:55.938607  IOAPIC: ID = 0x02

 1367 18:37:55.941267  IOAPIC: Dumping registers

 1368 18:37:55.944938    reg 0x0000: 0x02000000

 1369 18:37:55.947852    reg 0x0001: 0x00770020

 1370 18:37:55.948296    reg 0x0002: 0x00000000

 1371 18:37:55.954602  PCI: 00:1f.0 init finished in 21 msecs

 1372 18:37:55.955046  PCI: 00:1f.2 init

 1373 18:37:55.958265  Disabling ACPI via APMC.

 1374 18:37:56.647789  APMC done.

 1375 18:37:56.650869  PCI: 00:1f.2 init finished in 692 msecs

 1376 18:37:56.662264  PNP: 0c09.0 init

 1377 18:37:56.672455  Google Chrome EC uptime: 7.318 seconds

 1378 18:37:56.675583  Google Chrome AP resets since EC boot: 0

 1379 18:37:56.679192  Google Chrome most recent AP reset causes:

 1380 18:37:56.685368  Google Chrome EC reset flags at last EC boot: reset-pin

 1381 18:37:56.688923  PNP: 0c09.0 init finished in 22 msecs

 1382 18:37:56.691921  Devices initialized

 1383 18:37:56.695626  Show all devs... After init.

 1384 18:37:56.695725  Root Device: enabled 1

 1385 18:37:56.698692  CPU_CLUSTER: 0: enabled 1

 1386 18:37:56.702288  DOMAIN: 0000: enabled 1

 1387 18:37:56.705340  PCI: 00:00.0: enabled 1

 1388 18:37:56.705438  PCI: 00:02.0: enabled 1

 1389 18:37:56.708891  PCI: 00:04.0: enabled 1

 1390 18:37:56.711869  PCI: 00:05.0: enabled 1

 1391 18:37:56.715501  PCI: 00:09.0: enabled 0

 1392 18:37:56.715599  PCI: 00:12.6: enabled 0

 1393 18:37:56.718638  PCI: 00:14.0: enabled 1

 1394 18:37:56.721815  PCI: 00:14.1: enabled 0

 1395 18:37:56.721909  PCI: 00:14.2: enabled 0

 1396 18:37:56.725567  PCI: 00:14.3: enabled 1

 1397 18:37:56.728552  PCI: 00:14.5: enabled 1

 1398 18:37:56.732155  PCI: 00:15.0: enabled 1

 1399 18:37:56.732253  PCI: 00:15.1: enabled 1

 1400 18:37:56.735043  PCI: 00:15.2: enabled 1

 1401 18:37:56.738833  PCI: 00:15.3: enabled 1

 1402 18:37:56.741929  PCI: 00:16.0: enabled 1

 1403 18:37:56.742027  PCI: 00:16.1: enabled 0

 1404 18:37:56.744981  PCI: 00:16.4: enabled 0

 1405 18:37:56.748650  PCI: 00:16.5: enabled 0

 1406 18:37:56.751858  PCI: 00:17.0: enabled 0

 1407 18:37:56.751955  PCI: 00:19.0: enabled 1

 1408 18:37:56.755338  PCI: 00:19.1: enabled 0

 1409 18:37:56.758330  PCI: 00:19.2: enabled 1

 1410 18:37:56.761827  PCI: 00:1a.0: enabled 1

 1411 18:37:56.761923  PCI: 00:1c.0: enabled 0

 1412 18:37:56.765285  PCI: 00:1c.1: enabled 0

 1413 18:37:56.768740  PCI: 00:1c.2: enabled 0

 1414 18:37:56.768836  PCI: 00:1c.3: enabled 0

 1415 18:37:56.771642  PCI: 00:1c.4: enabled 0

 1416 18:37:56.774814  PCI: 00:1c.5: enabled 0

 1417 18:37:56.778391  PCI: 00:1c.6: enabled 0

 1418 18:37:56.778487  PCI: 00:1c.7: enabled 1

 1419 18:37:56.781524  PCI: 00:1e.0: enabled 0

 1420 18:37:56.785117  PCI: 00:1e.1: enabled 0

 1421 18:37:56.788189  PCI: 00:1e.2: enabled 1

 1422 18:37:56.788286  PCI: 00:1e.3: enabled 0

 1423 18:37:56.791786  PCI: 00:1f.0: enabled 1

 1424 18:37:56.794814  PCI: 00:1f.1: enabled 0

 1425 18:37:56.798498  PCI: 00:1f.2: enabled 1

 1426 18:37:56.798594  PCI: 00:1f.3: enabled 1

 1427 18:37:56.801516  PCI: 00:1f.4: enabled 0

 1428 18:37:56.805167  PCI: 00:1f.5: enabled 1

 1429 18:37:56.805264  PCI: 00:1f.7: enabled 0

 1430 18:37:56.808076  GENERIC: 0.0: enabled 1

 1431 18:37:56.811273  GENERIC: 0.0: enabled 1

 1432 18:37:56.814796  USB0 port 0: enabled 1

 1433 18:37:56.814891  GENERIC: 0.0: enabled 1

 1434 18:37:56.818564  I2C: 00:2c: enabled 1

 1435 18:37:56.821612  I2C: 00:15: enabled 1

 1436 18:37:56.821709  GENERIC: 0.0: enabled 0

 1437 18:37:56.824585  I2C: 00:15: enabled 1

 1438 18:37:56.828256  I2C: 00:10: enabled 0

 1439 18:37:56.831241  I2C: 00:10: enabled 0

 1440 18:37:56.831338  I2C: 00:2c: enabled 1

 1441 18:37:56.834943  I2C: 00:40: enabled 1

 1442 18:37:56.837974  I2C: 00:10: enabled 1

 1443 18:37:56.838064  I2C: 00:39: enabled 1

 1444 18:37:56.841214  I2C: 00:36: enabled 1

 1445 18:37:56.844726  I2C: 00:10: enabled 0

 1446 18:37:56.844822  I2C: 00:0c: enabled 1

 1447 18:37:56.847813  I2C: 00:50: enabled 1

 1448 18:37:56.851462  I2C: 00:1a: enabled 1

 1449 18:37:56.851560  I2C: 00:1a: enabled 0

 1450 18:37:56.854530  I2C: 00:1a: enabled 0

 1451 18:37:56.858140  I2C: 00:28: enabled 1

 1452 18:37:56.858237  I2C: 00:29: enabled 1

 1453 18:37:56.861165  PCI: 00:00.0: enabled 1

 1454 18:37:56.864575  SPI: 00: enabled 1

 1455 18:37:56.864674  PNP: 0c09.0: enabled 1

 1456 18:37:56.868273  GENERIC: 0.0: enabled 0

 1457 18:37:56.871302  USB2 port 0: enabled 1

 1458 18:37:56.871398  USB2 port 1: enabled 1

 1459 18:37:56.874432  USB2 port 2: enabled 1

 1460 18:37:56.878060  USB2 port 3: enabled 1

 1461 18:37:56.881125  USB2 port 4: enabled 0

 1462 18:37:56.881220  USB2 port 5: enabled 1

 1463 18:37:56.884684  USB2 port 6: enabled 0

 1464 18:37:56.887590  USB2 port 7: enabled 1

 1465 18:37:56.887685  USB3 port 0: enabled 1

 1466 18:37:56.891350  USB3 port 1: enabled 1

 1467 18:37:56.894284  USB3 port 2: enabled 1

 1468 18:37:56.897909  USB3 port 3: enabled 1

 1469 18:37:56.898003  APIC: 00: enabled 1

 1470 18:37:56.901033  APIC: 02: enabled 1

 1471 18:37:56.904726  PCI: 00:08.0: enabled 1

 1472 18:37:56.907712  BS: BS_DEV_INIT run times (exec / console): 716 / 465 ms

 1473 18:37:56.914399  ELOG: Event(92) added with size 9 at 2023-02-25 18:37:56 UTC

 1474 18:37:56.920967  ELOG: Event(93) added with size 9 at 2023-02-25 18:37:56 UTC

 1475 18:37:56.927592  ELOG: Event(9E) added with size 10 at 2023-02-25 18:37:56 UTC

 1476 18:37:56.934299  ELOG: Event(9F) added with size 14 at 2023-02-25 18:37:56 UTC

 1477 18:37:56.937371  BS: BS_DEV_INIT exit times (exec / console): 1 / 24 ms

 1478 18:37:56.944054  ELOG: Event(A1) added with size 10 at 2023-02-25 18:37:56 UTC

 1479 18:37:56.954493  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1480 18:37:56.957621  ELOG: Event(A0) added with size 9 at 2023-02-25 18:37:56 UTC

 1481 18:37:56.964247  elog_add_boot_reason: Logged dev mode boot

 1482 18:37:56.967775  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1483 18:37:56.971348  Finalize devices...

 1484 18:37:56.974405  Devices finalized

 1485 18:37:56.977897  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1486 18:37:56.984142  FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)

 1487 18:37:56.991198  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1488 18:37:56.994178  ME: HFSTS1                  : 0x80030045

 1489 18:37:56.997301  ME: HFSTS2                  : 0x30280136

 1490 18:37:57.000879  ME: HFSTS3                  : 0x00000050

 1491 18:37:57.007468  ME: HFSTS4                  : 0x00004000

 1492 18:37:57.010606  ME: HFSTS5                  : 0x00000000

 1493 18:37:57.014250  ME: HFSTS6                  : 0x40400006

 1494 18:37:57.017295  ME: Manufacturing Mode      : NO

 1495 18:37:57.020989  ME: FW Partition Table      : OK

 1496 18:37:57.024218  ME: Bringup Loader Failure  : NO

 1497 18:37:57.027076  ME: Firmware Init Complete  : NO

 1498 18:37:57.030812  ME: Boot Options Present    : NO

 1499 18:37:57.033871  ME: Update In Progress      : NO

 1500 18:37:57.037741  ME: D0i3 Support            : YES

 1501 18:37:57.040657  ME: Low Power State Enabled : NO

 1502 18:37:57.043860  ME: CPU Replaced            : YES

 1503 18:37:57.047455  ME: CPU Replacement Valid   : YES

 1504 18:37:57.050313  ME: Current Working State   : 5

 1505 18:37:57.054037  ME: Current Operation State : 1

 1506 18:37:57.057064  ME: Current Operation Mode  : 3

 1507 18:37:57.060266  ME: Error Code              : 0

 1508 18:37:57.063999  ME: CPU Debug Disabled      : YES

 1509 18:37:57.067519  ME: TXT Support             : NO

 1510 18:37:57.074098  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 78 ms

 1511 18:37:57.077046  CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2

 1512 18:37:57.084133  ACPI: Writing ACPI tables at 76b27000.

 1513 18:37:57.084226  ACPI:    * FACS

 1514 18:37:57.087813  ACPI:    * DSDT

 1515 18:37:57.090728  Ramoops buffer: 0x100000@0x76a26000.

 1516 18:37:57.094511  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1517 18:37:57.101190  FMAP: area RW_VPD found @ bfc000 (8192 bytes)

 1518 18:37:57.104351  Google Chrome EC: version:

 1519 18:37:57.107881  	ro: magolor_1.1.9999-103b6f9

 1520 18:37:57.107978  	rw: magolor_1.1.9999-103b6f9

 1521 18:37:57.110938    running image: 1

 1522 18:37:57.117796  PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000

 1523 18:37:57.120650  ACPI:    * FADT

 1524 18:37:57.120747  SCI is IRQ9

 1525 18:37:57.124348  ACPI: added table 1/32, length now 40

 1526 18:37:57.127485  ACPI:     * SSDT

 1527 18:37:57.130623  Found 1 CPU(s) with 2 core(s) each.

 1528 18:37:57.134248  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1529 18:37:57.141023  \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h

 1530 18:37:57.144073  Could not locate 'wifi_sar' in VPD.

 1531 18:37:57.147712  Checking CBFS for default SAR values

 1532 18:37:57.153806  wifi_sar_defaults.hex has bad len in CBFS

 1533 18:37:57.157352  failed from getting SAR limits!

 1534 18:37:57.160525  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1535 18:37:57.164206  \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c

 1536 18:37:57.170749  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15

 1537 18:37:57.173803  \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15

 1538 18:37:57.180512  \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c

 1539 18:37:57.187054  \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40

 1540 18:37:57.190928  \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10

 1541 18:37:57.197631  \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39

 1542 18:37:57.204182  \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h

 1543 18:37:57.207253  \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch

 1544 18:37:57.213839  \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h

 1545 18:37:57.220566  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a

 1546 18:37:57.223546  \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28

 1547 18:37:57.230211  \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29

 1548 18:37:57.233803  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1549 18:37:57.241180  PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]

 1550 18:37:57.244281  PS2K: Passing 101 keymaps to kernel

 1551 18:37:57.250914  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1552 18:37:57.257610  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1

 1553 18:37:57.260805  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1554 18:37:57.267520  \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3

 1555 18:37:57.274641  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1556 18:37:57.277644  \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7

 1557 18:37:57.284264  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1558 18:37:57.291101  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1

 1559 18:37:57.294272  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1560 18:37:57.300942  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3

 1561 18:37:57.303963  ACPI: added table 2/32, length now 44

 1562 18:37:57.307564  ACPI:    * MCFG

 1563 18:37:57.310574  ACPI: added table 3/32, length now 48

 1564 18:37:57.310673  ACPI:    * TPM2

 1565 18:37:57.314287  TPM2 log created at 0x76a16000

 1566 18:37:57.317272  ACPI: added table 4/32, length now 52

 1567 18:37:57.320792  ACPI:    * MADT

 1568 18:37:57.320891  SCI is IRQ9

 1569 18:37:57.324364  ACPI: added table 5/32, length now 56

 1570 18:37:57.327298  current = 76b2d580

 1571 18:37:57.330485  ACPI:    * DMAR

 1572 18:37:57.334205  ACPI: added table 6/32, length now 60

 1573 18:37:57.337205  ACPI: added table 7/32, length now 64

 1574 18:37:57.337305  ACPI:    * HPET

 1575 18:37:57.340980  ACPI: added table 8/32, length now 68

 1576 18:37:57.344136  ACPI: done.

 1577 18:37:57.347258  ACPI tables: 26304 bytes.

 1578 18:37:57.350904  smbios_write_tables: 76a15000

 1579 18:37:57.353888  EC returned error result code 3

 1580 18:37:57.357576  Couldn't obtain OEM name from CBI

 1581 18:37:57.360701  Create SMBIOS type 16

 1582 18:37:57.360800  Create SMBIOS type 17

 1583 18:37:57.363815  GENERIC: 0.0 (WIFI Device)

 1584 18:37:57.367524  SMBIOS tables: 913 bytes.

 1585 18:37:57.370689  Writing table forward entry at 0x00000500

 1586 18:37:57.377206  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929

 1587 18:37:57.380854  Writing coreboot table at 0x76b4b000

 1588 18:37:57.387497   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1589 18:37:57.390538   1. 0000000000001000-000000000009ffff: RAM

 1590 18:37:57.397043   2. 00000000000a0000-00000000000fffff: RESERVED

 1591 18:37:57.400653   3. 0000000000100000-0000000076a14fff: RAM

 1592 18:37:57.407244   4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES

 1593 18:37:57.410182   5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE

 1594 18:37:57.416935   6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES

 1595 18:37:57.420611   7. 0000000077000000-000000007fbfffff: RESERVED

 1596 18:37:57.427218   8. 00000000c0000000-00000000cfffffff: RESERVED

 1597 18:37:57.430277   9. 00000000fb000000-00000000fb000fff: RESERVED

 1598 18:37:57.436889  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1599 18:37:57.440098  11. 00000000fea80000-00000000fea87fff: RESERVED

 1600 18:37:57.446782  12. 00000000fed80000-00000000fed87fff: RESERVED

 1601 18:37:57.450627  13. 00000000fed90000-00000000fed92fff: RESERVED

 1602 18:37:57.453551  14. 00000000feda0000-00000000feda1fff: RESERVED

 1603 18:37:57.460478  15. 0000000100000000-00000001803fffff: RAM

 1604 18:37:57.463502  Passing 4 GPIOs to payload:

 1605 18:37:57.466660              NAME |       PORT | POLARITY |     VALUE

 1606 18:37:57.473479               lid |  undefined |     high |      high

 1607 18:37:57.477032             power |  undefined |     high |       low

 1608 18:37:57.483642             oprom |  undefined |     high |       low

 1609 18:37:57.489754          EC in RW | 0x000000b9 |     high |       low

 1610 18:37:57.493550  Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 3be9

 1611 18:37:57.496788  coreboot table: 1504 bytes.

 1612 18:37:57.499904  IMD ROOT    0. 0x76fff000 0x00001000

 1613 18:37:57.506676  IMD SMALL   1. 0x76ffe000 0x00001000

 1614 18:37:57.509731  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1615 18:37:57.513584  CONSOLE     3. 0x76c2e000 0x00020000

 1616 18:37:57.516549  FMAP        4. 0x76c2d000 0x00000578

 1617 18:37:57.520383  TIME STAMP  5. 0x76c2c000 0x00000910

 1618 18:37:57.523454  VBOOT WORK  6. 0x76c18000 0x00014000

 1619 18:37:57.526550  ROMSTG STCK 7. 0x76c17000 0x00001000

 1620 18:37:57.530243  AFTER CAR   8. 0x76c0d000 0x0000a000

 1621 18:37:57.533225  RAMSTAGE    9. 0x76ba7000 0x00066000

 1622 18:37:57.540155  REFCODE    10. 0x76b67000 0x00040000

 1623 18:37:57.543297  SMM BACKUP 11. 0x76b57000 0x00010000

 1624 18:37:57.546348  4f444749   12. 0x76b55000 0x00002000

 1625 18:37:57.550113  EXT VBT13. 0x76b53000 0x00001c43

 1626 18:37:57.553148  COREBOOT   14. 0x76b4b000 0x00008000

 1627 18:37:57.556853  ACPI       15. 0x76b27000 0x00024000

 1628 18:37:57.559793  ACPI GNVS  16. 0x76b26000 0x00001000

 1629 18:37:57.563095  RAMOOPS    17. 0x76a26000 0x00100000

 1630 18:37:57.566814  TPM2 TCGLOG18. 0x76a16000 0x00010000

 1631 18:37:57.573042  SMBIOS     19. 0x76a15000 0x00000800

 1632 18:37:57.573158  IMD small region:

 1633 18:37:57.576672    IMD ROOT    0. 0x76ffec00 0x00000400

 1634 18:37:57.579733    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1635 18:37:57.586645    VPD         2. 0x76ffeb80 0x0000004c

 1636 18:37:57.589691    POWER STATE 3. 0x76ffeb40 0x00000040

 1637 18:37:57.593461    ROMSTAGE    4. 0x76ffeb20 0x00000004

 1638 18:37:57.596637    MEM INFO    5. 0x76ffe940 0x000001e0

 1639 18:37:57.603166  BS: BS_WRITE_TABLES run times (exec / console): 6 / 518 ms

 1640 18:37:57.606302  MTRR: Physical address space:

 1641 18:37:57.613354  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1642 18:37:57.620108  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1643 18:37:57.623107  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1644 18:37:57.629962  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1645 18:37:57.636191  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1646 18:37:57.643031  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1647 18:37:57.649941  0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6

 1648 18:37:57.653169  MTRR: Fixed MSR 0x250 0x0606060606060606

 1649 18:37:57.656318  MTRR: Fixed MSR 0x258 0x0606060606060606

 1650 18:37:57.663006  MTRR: Fixed MSR 0x259 0x0000000000000000

 1651 18:37:57.666252  MTRR: Fixed MSR 0x268 0x0606060606060606

 1652 18:37:57.669549  MTRR: Fixed MSR 0x269 0x0606060606060606

 1653 18:37:57.672830  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1654 18:37:57.679682  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1655 18:37:57.682546  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1656 18:37:57.686218  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1657 18:37:57.689481  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1658 18:37:57.696089  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1659 18:37:57.696216  call enable_fixed_mtrr()

 1660 18:37:57.702823  CPU physical address size: 39 bits

 1661 18:37:57.705971  MTRR: default type WB/UC MTRR counts: 6/5.

 1662 18:37:57.709357  MTRR: UC selected as default type.

 1663 18:37:57.716474  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1664 18:37:57.722827  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1665 18:37:57.729345  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1666 18:37:57.732387  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1667 18:37:57.739450  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1668 18:37:57.739565  

 1669 18:37:57.742611  MTRR check

 1670 18:37:57.745767  Fixed MTRRs   : Enabled

 1671 18:37:57.745955  Variable MTRRs: Enabled

 1672 18:37:57.746100  

 1673 18:37:57.752677  MTRR: Fixed MSR 0x250 0x0606060606060606

 1674 18:37:57.755814  MTRR: Fixed MSR 0x258 0x0606060606060606

 1675 18:37:57.758998  MTRR: Fixed MSR 0x259 0x0000000000000000

 1676 18:37:57.762767  MTRR: Fixed MSR 0x268 0x0606060606060606

 1677 18:37:57.769128  MTRR: Fixed MSR 0x269 0x0606060606060606

 1678 18:37:57.772338  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1679 18:37:57.776291  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1680 18:37:57.779606  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1681 18:37:57.782704  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1682 18:37:57.789459  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1683 18:37:57.792695  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1684 18:37:57.799461  BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms

 1685 18:37:57.799846  call enable_fixed_mtrr()

 1686 18:37:57.806453  Checking cr50 for pending updates

 1687 18:37:57.806908  CPU physical address size: 39 bits

 1688 18:37:57.811267  Reading cr50 TPM mode

 1689 18:37:57.821109  BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms

 1690 18:37:57.828732  CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38

 1691 18:37:57.831941  Checking segment from ROM address 0xfff9d5b8

 1692 18:37:57.838854  Checking segment from ROM address 0xfff9d5d4

 1693 18:37:57.841994  Loading segment from ROM address 0xfff9d5b8

 1694 18:37:57.845291    code (compression=0)

 1695 18:37:57.852400    New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00

 1696 18:37:57.862331  Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00

 1697 18:37:57.865299  it's not compressed!

 1698 18:37:57.990519  [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0

 1699 18:37:57.997385  Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370

 1700 18:37:58.004800  Loading segment from ROM address 0xfff9d5d4

 1701 18:37:58.007884    Entry Point 0x30000000

 1702 18:37:58.008265  Loaded segments

 1703 18:37:58.014671  BS: BS_PAYLOAD_LOAD run times (exec / console): 125 / 61 ms

 1704 18:37:58.030827  Finalizing chipset.

 1705 18:37:58.034086  Finalizing SMM.

 1706 18:37:58.034467  APMC done.

 1707 18:37:58.041056  BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms

 1708 18:37:58.044007  mp_park_aps done after 0 msecs.

 1709 18:37:58.047278  Jumping to boot code at 0x30000000(0x76b4b000)

 1710 18:37:58.057589  CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes

 1711 18:37:58.058073  

 1712 18:37:58.058424  

 1713 18:37:58.058789  

 1714 18:37:58.060859  Starting depthcharge on Magolor...

 1715 18:37:58.061267  

 1716 18:37:58.062177  end: 2.2.3 depthcharge-start (duration 00:00:07) [common]
 1717 18:37:58.062659  start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
 1718 18:37:58.063220  Setting prompt string to ['dedede:']
 1719 18:37:58.063700  bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:44)
 1720 18:37:58.070679  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1721 18:37:58.071109  

 1722 18:37:58.077051  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1723 18:37:58.077494  

 1724 18:37:58.080277  fw_config match found: AUDIO_AMP=UNPROVISIONED

 1725 18:37:58.080655  

 1726 18:37:58.084021  Wipe memory regions:

 1727 18:37:58.084443  

 1728 18:37:58.087116  	[0x00000000001000, 0x000000000a0000)

 1729 18:37:58.087498  

 1730 18:37:58.090329  	[0x00000000100000, 0x00000030000000)

 1731 18:37:58.219120  

 1732 18:37:58.223198  	[0x00000031062170, 0x00000076a15000)

 1733 18:37:58.392727  

 1734 18:37:58.395582  	[0x00000100000000, 0x00000180400000)

 1735 18:37:59.459183  

 1736 18:37:59.459761  R8152: Initializing

 1737 18:37:59.460132  

 1738 18:37:59.462207  Version 9 (ocp_data = 6010)

 1739 18:37:59.462702  

 1740 18:37:59.466244  R8152: Done initializing

 1741 18:37:59.466889  

 1742 18:37:59.469136  Adding net device

 1743 18:37:59.469737  

 1744 18:37:59.472273  [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48

 1745 18:37:59.472780  

 1746 18:37:59.475685  

 1747 18:37:59.476131  

 1748 18:37:59.476972  Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1750 18:37:59.578617  dedede: tftpboot 192.168.201.1 9334694/tftp-deploy-neasx3xj/kernel/bzImage 9334694/tftp-deploy-neasx3xj/kernel/cmdline 9334694/tftp-deploy-neasx3xj/ramdisk/ramdisk.cpio.gz

 1751 18:37:59.579210  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1752 18:37:59.579712  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
 1753 18:37:59.583929  tftpboot 192.168.201.1 9334694/tftp-deploy-neasx3xj/kernel/bzImoy-neasx3xj/kernel/cmdline 9334694/tftp-deploy-neasx3xj/ramdisk/ramdisk.cpio.gz

 1754 18:37:59.584353  

 1755 18:37:59.584673  Waiting for link

 1756 18:37:59.786240  

 1757 18:37:59.786789  done.

 1758 18:37:59.787183  

 1759 18:37:59.787519  MAC: 00:e0:4c:78:86:ac

 1760 18:37:59.787835  

 1761 18:37:59.789171  Sending DHCP discover... done.

 1762 18:37:59.789615  

 1763 18:37:59.792389  Waiting for reply... done.

 1764 18:37:59.792833  

 1765 18:37:59.796293  Sending DHCP request... done.

 1766 18:37:59.796758  

 1767 18:37:59.803071  Waiting for reply... done.

 1768 18:37:59.803630  

 1769 18:37:59.803981  My ip is 192.168.201.16

 1770 18:37:59.804309  

 1771 18:37:59.806538  The DHCP server ip is 192.168.201.1

 1772 18:37:59.809981  

 1773 18:37:59.813054  TFTP server IP predefined by user: 192.168.201.1

 1774 18:37:59.813499  

 1775 18:37:59.819393  Bootfile predefined by user: 9334694/tftp-deploy-neasx3xj/kernel/bzImage

 1776 18:37:59.819937  

 1777 18:37:59.823208  Sending tftp read request... done.

 1778 18:37:59.823674  

 1779 18:37:59.826511  Waiting for the transfer... 

 1780 18:37:59.829479  

 1781 18:38:00.186524  00000000 ################################################################

 1782 18:38:00.186681  

 1783 18:38:00.481718  00080000 ################################################################

 1784 18:38:00.481872  

 1785 18:38:00.764153  00100000 ################################################################

 1786 18:38:00.764305  

 1787 18:38:01.045858  00180000 ################################################################

 1788 18:38:01.046013  

 1789 18:38:01.305912  00200000 ################################################################

 1790 18:38:01.306063  

 1791 18:38:01.553601  00280000 ################################################################

 1792 18:38:01.553757  

 1793 18:38:01.800374  00300000 ################################################################

 1794 18:38:01.800534  

 1795 18:38:02.045071  00380000 ################################################################

 1796 18:38:02.045219  

 1797 18:38:02.293458  00400000 ################################################################

 1798 18:38:02.293607  

 1799 18:38:02.544026  00480000 ################################################################

 1800 18:38:02.544178  

 1801 18:38:02.789512  00500000 ################################################################

 1802 18:38:02.789665  

 1803 18:38:03.048860  00580000 ################################################################

 1804 18:38:03.049022  

 1805 18:38:03.300003  00600000 ################################################################

 1806 18:38:03.300156  

 1807 18:38:03.547205  00680000 ################################################################

 1808 18:38:03.547359  

 1809 18:38:03.813786  00700000 ################################################################

 1810 18:38:03.813936  

 1811 18:38:04.077412  00780000 ################################################################

 1812 18:38:04.077572  

 1813 18:38:04.352339  00800000 ################################################################

 1814 18:38:04.352492  

 1815 18:38:04.599889  00880000 ################################################################

 1816 18:38:04.600037  

 1817 18:38:04.734372  00900000 ################################## done.

 1818 18:38:04.734525  

 1819 18:38:04.737922  The bootfile was 9711616 bytes long.

 1820 18:38:04.738016  

 1821 18:38:04.741231  Sending tftp read request... done.

 1822 18:38:04.744484  

 1823 18:38:04.744592  Waiting for the transfer... 

 1824 18:38:04.744673  

 1825 18:38:05.002287  00000000 ################################################################

 1826 18:38:05.002473  

 1827 18:38:05.257284  00080000 ################################################################

 1828 18:38:05.257440  

 1829 18:38:05.512835  00100000 ################################################################

 1830 18:38:05.512977  

 1831 18:38:05.771312  00180000 ################################################################

 1832 18:38:05.771469  

 1833 18:38:06.028565  00200000 ################################################################

 1834 18:38:06.028719  

 1835 18:38:06.292343  00280000 ################################################################

 1836 18:38:06.292489  

 1837 18:38:06.555429  00300000 ################################################################

 1838 18:38:06.555586  

 1839 18:38:06.828861  00380000 ################################################################

 1840 18:38:06.829014  

 1841 18:38:07.084896  00400000 ################################################################

 1842 18:38:07.085077  

 1843 18:38:07.342116  00480000 ################################################################

 1844 18:38:07.342264  

 1845 18:38:07.598702  00500000 ################################################################

 1846 18:38:07.598851  

 1847 18:38:07.863100  00580000 ################################################################

 1848 18:38:07.863270  

 1849 18:38:08.127263  00600000 ################################################################

 1850 18:38:08.127411  

 1851 18:38:08.413171  00680000 ################################################################

 1852 18:38:08.413321  

 1853 18:38:08.666992  00700000 ################################################################

 1854 18:38:08.667154  

 1855 18:38:08.921590  00780000 ################################################################

 1856 18:38:08.921745  

 1857 18:38:09.014021  00800000 ######################## done.

 1858 18:38:09.014162  

 1859 18:38:09.017201  Sending tftp read request... done.

 1860 18:38:09.017294  

 1861 18:38:09.020460  Waiting for the transfer... 

 1862 18:38:09.020565  

 1863 18:38:09.023570  00000000 # done.

 1864 18:38:09.023660  

 1865 18:38:09.033647  Command line loaded dynamically from TFTP file: 9334694/tftp-deploy-neasx3xj/kernel/cmdline

 1866 18:38:09.033745  

 1867 18:38:09.043650  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 1868 18:38:09.043751  

 1869 18:38:09.050468  ec_init: CrosEC protocol v3 supported (256, 256)

 1870 18:38:09.057441  

 1871 18:38:09.060638  Shutting down all USB controllers.

 1872 18:38:09.060736  

 1873 18:38:09.060817  Removing current net device

 1874 18:38:09.060890  

 1875 18:38:09.063691  Finalizing coreboot

 1876 18:38:09.063788  

 1877 18:38:09.070623  Exiting depthcharge with code 4 at timestamp: 18555563

 1878 18:38:09.070723  

 1879 18:38:09.070809  

 1880 18:38:09.070896  Starting kernel ...

 1881 18:38:09.070969  

 1882 18:38:09.071038  

 1883 18:38:09.071460  end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
 1884 18:38:09.071581  start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
 1885 18:38:09.071668  Setting prompt string to ['Linux version [0-9]']
 1886 18:38:09.071749  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1887 18:38:09.071831  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 1889 18:42:42.071953  end: 2.2.5 auto-login-action (duration 00:04:33) [common]
 1891 18:42:42.072282  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
 1893 18:42:42.072529  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 1896 18:42:42.072944  end: 2 depthcharge-action (duration 00:05:00) [common]
 1898 18:42:42.073309  Cleaning after the job
 1899 18:42:42.073443  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334694/tftp-deploy-neasx3xj/ramdisk
 1900 18:42:42.074425  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334694/tftp-deploy-neasx3xj/kernel
 1901 18:42:42.075490  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334694/tftp-deploy-neasx3xj/modules
 1902 18:42:42.075834  start: 5.1 power-off (timeout 00:00:30) [common]
 1903 18:42:42.076111  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=off'
 1904 18:42:44.263915  >> Command sent successfully.

 1905 18:42:44.270214  Returned 0 in 2 seconds
 1906 18:42:44.371377  end: 5.1 power-off (duration 00:00:02) [common]
 1908 18:42:44.372889  start: 5.2 read-feedback (timeout 00:09:58) [common]
 1909 18:42:44.373908  Listened to connection for namespace 'common' for up to 1s
 1911 18:42:44.375113  Listened to connection for namespace 'common' for up to 1s
 1912 18:42:45.376356  Finalising connection for namespace 'common'
 1913 18:42:45.376974  Disconnecting from shell: Finalise
 1914 18:42:45.377377  
 1915 18:42:45.478739  end: 5.2 read-feedback (duration 00:00:01) [common]
 1916 18:42:45.479291  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9334694
 1917 18:42:45.488747  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9334694
 1918 18:42:45.488896  JobError: Your job cannot terminate cleanly.