Boot log: asus-C436FA-Flip-hatch

    1 18:37:55.245477  lava-dispatcher, installed at version: 2022.11
    2 18:37:55.245703  start: 0 validate
    3 18:37:55.245850  Start time: 2023-02-25 18:37:55.245842+00:00 (UTC)
    4 18:37:55.245995  Using caching service: 'http://localhost/cache/?uri=%s'
    5 18:37:55.246141  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230217.0%2Fx86%2Frootfs.cpio.gz exists
    6 18:37:55.539441  Using caching service: 'http://localhost/cache/?uri=%s'
    7 18:37:55.540129  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 18:37:55.840807  Using caching service: 'http://localhost/cache/?uri=%s'
    9 18:37:55.841440  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 18:37:56.140801  validate duration: 0.90
   12 18:37:56.142056  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 18:37:56.142619  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 18:37:56.143231  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 18:37:56.143754  Not decompressing ramdisk as can be used compressed.
   16 18:37:56.144635  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230217.0/x86/rootfs.cpio.gz
   17 18:37:56.145032  saving as /var/lib/lava/dispatcher/tmp/9334748/tftp-deploy-8b8az48x/ramdisk/rootfs.cpio.gz
   18 18:37:56.145370  total size: 8423658 (8MB)
   19 18:37:56.150134  progress   0% (0MB)
   20 18:37:56.160820  progress   5% (0MB)
   21 18:37:56.170025  progress  10% (0MB)
   22 18:37:56.176241  progress  15% (1MB)
   23 18:37:56.180838  progress  20% (1MB)
   24 18:37:56.184774  progress  25% (2MB)
   25 18:37:56.188309  progress  30% (2MB)
   26 18:37:56.191367  progress  35% (2MB)
   27 18:37:56.194250  progress  40% (3MB)
   28 18:37:56.197092  progress  45% (3MB)
   29 18:37:56.199645  progress  50% (4MB)
   30 18:37:56.202107  progress  55% (4MB)
   31 18:37:56.204399  progress  60% (4MB)
   32 18:37:56.206686  progress  65% (5MB)
   33 18:37:56.208818  progress  70% (5MB)
   34 18:37:56.211197  progress  75% (6MB)
   35 18:37:56.213503  progress  80% (6MB)
   36 18:37:56.215806  progress  85% (6MB)
   37 18:37:56.218095  progress  90% (7MB)
   38 18:37:56.220394  progress  95% (7MB)
   39 18:37:56.222698  progress 100% (8MB)
   40 18:37:56.222883  8MB downloaded in 0.08s (103.64MB/s)
   41 18:37:56.223050  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 18:37:56.223339  end: 1.1 download-retry (duration 00:00:00) [common]
   44 18:37:56.223441  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 18:37:56.223541  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 18:37:56.223660  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 18:37:56.223737  saving as /var/lib/lava/dispatcher/tmp/9334748/tftp-deploy-8b8az48x/kernel/bzImage
   48 18:37:56.223807  total size: 9711616 (9MB)
   49 18:37:56.223876  No compression specified
   50 18:37:56.225054  progress   0% (0MB)
   51 18:37:56.227718  progress   5% (0MB)
   52 18:37:56.230456  progress  10% (0MB)
   53 18:37:56.233186  progress  15% (1MB)
   54 18:37:56.235899  progress  20% (1MB)
   55 18:37:56.238582  progress  25% (2MB)
   56 18:37:56.241100  progress  30% (2MB)
   57 18:37:56.243793  progress  35% (3MB)
   58 18:37:56.246459  progress  40% (3MB)
   59 18:37:56.249151  progress  45% (4MB)
   60 18:37:56.251826  progress  50% (4MB)
   61 18:37:56.254483  progress  55% (5MB)
   62 18:37:56.256977  progress  60% (5MB)
   63 18:37:56.259613  progress  65% (6MB)
   64 18:37:56.262247  progress  70% (6MB)
   65 18:37:56.264885  progress  75% (6MB)
   66 18:37:56.267518  progress  80% (7MB)
   67 18:37:56.269964  progress  85% (7MB)
   68 18:37:56.272603  progress  90% (8MB)
   69 18:37:56.275237  progress  95% (8MB)
   70 18:37:56.277875  progress 100% (9MB)
   71 18:37:56.278104  9MB downloaded in 0.05s (170.59MB/s)
   72 18:37:56.278274  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 18:37:56.278542  end: 1.2 download-retry (duration 00:00:00) [common]
   75 18:37:56.278641  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 18:37:56.278740  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 18:37:56.278860  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 18:37:56.278937  saving as /var/lib/lava/dispatcher/tmp/9334748/tftp-deploy-8b8az48x/modules/modules.tar
   79 18:37:56.279006  total size: 64832 (0MB)
   80 18:37:56.279074  Using unxz to decompress xz
   81 18:37:56.282795  progress  50% (0MB)
   82 18:37:56.283213  progress 100% (0MB)
   83 18:37:56.287875  0MB downloaded in 0.01s (6.98MB/s)
   84 18:37:56.288144  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 18:37:56.288448  end: 1.3 download-retry (duration 00:00:00) [common]
   87 18:37:56.288560  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   88 18:37:56.288676  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   89 18:37:56.288776  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 18:37:56.288876  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   91 18:37:56.289069  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq
   92 18:37:56.289213  makedir: /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin
   93 18:37:56.289312  makedir: /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/tests
   94 18:37:56.289404  makedir: /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/results
   95 18:37:56.289524  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-add-keys
   96 18:37:56.289671  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-add-sources
   97 18:37:56.289802  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-background-process-start
   98 18:37:56.289931  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-background-process-stop
   99 18:37:56.290057  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-common-functions
  100 18:37:56.290183  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-echo-ipv4
  101 18:37:56.290310  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-install-packages
  102 18:37:56.290436  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-installed-packages
  103 18:37:56.290559  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-os-build
  104 18:37:56.290694  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-probe-channel
  105 18:37:56.290822  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-probe-ip
  106 18:37:56.290946  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-target-ip
  107 18:37:56.291069  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-target-mac
  108 18:37:56.291204  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-target-storage
  109 18:37:56.291337  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-test-case
  110 18:37:56.291485  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-test-event
  111 18:37:56.291623  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-test-feedback
  112 18:37:56.291748  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-test-raise
  113 18:37:56.291874  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-test-reference
  114 18:37:56.291998  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-test-runner
  115 18:37:56.292122  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-test-set
  116 18:37:56.292245  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-test-shell
  117 18:37:56.292371  Updating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-install-packages (oe)
  118 18:37:56.292500  Updating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/bin/lava-installed-packages (oe)
  119 18:37:56.292612  Creating /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/environment
  120 18:37:56.292712  LAVA metadata
  121 18:37:56.292791  - LAVA_JOB_ID=9334748
  122 18:37:56.292868  - LAVA_DISPATCHER_IP=192.168.201.1
  123 18:37:56.292984  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  124 18:37:56.293059  skipped lava-vland-overlay
  125 18:37:56.293147  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 18:37:56.293244  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  127 18:37:56.293317  skipped lava-multinode-overlay
  128 18:37:56.293403  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 18:37:56.293498  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  130 18:37:56.293584  Loading test definitions
  131 18:37:56.293693  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  132 18:37:56.293783  Using /lava-9334748 at stage 0
  133 18:37:56.294092  uuid=9334748_1.4.2.3.1 testdef=None
  134 18:37:56.294195  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 18:37:56.294297  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  136 18:37:56.294877  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 18:37:56.295151  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  139 18:37:56.295803  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 18:37:56.296076  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  142 18:37:56.296697  runner path: /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/0/tests/0_dmesg test_uuid 9334748_1.4.2.3.1
  143 18:37:56.296905  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 18:37:56.297178  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  146 18:37:56.297263  Using /lava-9334748 at stage 1
  147 18:37:56.297547  uuid=9334748_1.4.2.3.5 testdef=None
  148 18:37:56.297651  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 18:37:56.297749  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  150 18:37:56.298256  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 18:37:56.298511  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  153 18:37:56.299260  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 18:37:56.299594  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  156 18:37:56.300245  runner path: /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/1/tests/1_bootrr test_uuid 9334748_1.4.2.3.5
  157 18:37:56.300407  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 18:37:56.300648  Creating lava-test-runner.conf files
  160 18:37:56.300726  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/0 for stage 0
  161 18:37:56.300826  - 0_dmesg
  162 18:37:56.300911  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9334748/lava-overlay-cff9kanq/lava-9334748/1 for stage 1
  163 18:37:56.301028  - 1_bootrr
  164 18:37:56.301142  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 18:37:56.301246  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  166 18:37:56.308264  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 18:37:56.308397  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  168 18:37:56.308500  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 18:37:56.308600  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 18:37:56.308697  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  171 18:37:56.513625  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 18:37:56.513982  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  173 18:37:56.514104  extracting modules file /var/lib/lava/dispatcher/tmp/9334748/tftp-deploy-8b8az48x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9334748/extract-overlay-ramdisk-86lbqlzi/ramdisk
  174 18:37:56.518829  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 18:37:56.518980  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  176 18:37:56.519086  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334748/compress-overlay-dxhhjn6k/overlay-1.4.2.4.tar.gz to ramdisk
  177 18:37:56.519177  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334748/compress-overlay-dxhhjn6k/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9334748/extract-overlay-ramdisk-86lbqlzi/ramdisk
  178 18:37:56.523577  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 18:37:56.523709  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  180 18:37:56.523816  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 18:37:56.523920  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  182 18:37:56.524011  Building ramdisk /var/lib/lava/dispatcher/tmp/9334748/extract-overlay-ramdisk-86lbqlzi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9334748/extract-overlay-ramdisk-86lbqlzi/ramdisk
  183 18:37:56.595355  >> 48350 blocks

  184 18:37:57.444209  rename /var/lib/lava/dispatcher/tmp/9334748/extract-overlay-ramdisk-86lbqlzi/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9334748/tftp-deploy-8b8az48x/ramdisk/ramdisk.cpio.gz
  185 18:37:57.444639  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 18:37:57.444769  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  187 18:37:57.444885  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  188 18:37:57.444988  No mkimage arch provided, not using FIT.
  189 18:37:57.445089  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 18:37:57.445187  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 18:37:57.445293  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 18:37:57.445397  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  193 18:37:57.445484  No LXC device requested
  194 18:37:57.445576  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 18:37:57.445680  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  196 18:37:57.445779  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 18:37:57.445867  Checking files for TFTP limit of 4294967296 bytes.
  198 18:37:57.446298  end: 1 tftp-deploy (duration 00:00:01) [common]
  199 18:37:57.446423  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 18:37:57.446534  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 18:37:57.446681  substitutions:
  202 18:37:57.446758  - {DTB}: None
  203 18:37:57.446832  - {INITRD}: 9334748/tftp-deploy-8b8az48x/ramdisk/ramdisk.cpio.gz
  204 18:37:57.446901  - {KERNEL}: 9334748/tftp-deploy-8b8az48x/kernel/bzImage
  205 18:37:57.446967  - {LAVA_MAC}: None
  206 18:37:57.447033  - {PRESEED_CONFIG}: None
  207 18:37:57.447103  - {PRESEED_LOCAL}: None
  208 18:37:57.447167  - {RAMDISK}: 9334748/tftp-deploy-8b8az48x/ramdisk/ramdisk.cpio.gz
  209 18:37:57.447251  - {ROOT_PART}: None
  210 18:37:57.447317  - {ROOT}: None
  211 18:37:57.447423  - {SERVER_IP}: 192.168.201.1
  212 18:37:57.447515  - {TEE}: None
  213 18:37:57.447587  Parsed boot commands:
  214 18:37:57.447670  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 18:37:57.447845  Parsed boot commands: tftpboot 192.168.201.1 9334748/tftp-deploy-8b8az48x/kernel/bzImage 9334748/tftp-deploy-8b8az48x/kernel/cmdline 9334748/tftp-deploy-8b8az48x/ramdisk/ramdisk.cpio.gz
  216 18:37:57.447955  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 18:37:57.448059  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 18:37:57.448168  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 18:37:57.448269  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 18:37:57.448350  Not connected, no need to disconnect.
  221 18:37:57.448438  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 18:37:57.448534  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 18:37:57.448615  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
  224 18:37:57.451911  Setting prompt string to ['lava-test: # ']
  225 18:37:57.452240  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 18:37:57.452360  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 18:37:57.452474  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 18:37:57.452575  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 18:37:57.453020  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  230 18:38:06.806019  >> Command sent successfully.

  231 18:38:06.808503  Returned 0 in 9 seconds
  232 18:38:06.909289  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  234 18:38:06.909648  end: 2.2.2 reset-device (duration 00:00:09) [common]
  235 18:38:06.909761  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  236 18:38:06.909862  Setting prompt string to 'Starting depthcharge on Helios...'
  237 18:38:06.909939  Changing prompt to 'Starting depthcharge on Helios...'
  238 18:38:06.910014  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  239 18:38:06.910324  [Enter `^Ec?' for help]

  240 18:38:06.910416  

  241 18:38:06.910493  

  242 18:38:06.910566  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  243 18:38:06.910642  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  244 18:38:06.910713  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  245 18:38:06.910779  CPU: AES supported, TXT NOT supported, VT supported

  246 18:38:06.910846  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  247 18:38:06.910912  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  248 18:38:06.910977  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  249 18:38:06.911042  VBOOT: Loading verstage.

  250 18:38:06.911117  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  251 18:38:06.911184  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  252 18:38:06.911250  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  253 18:38:06.911327  CBFS @ c08000 size 3f8000

  254 18:38:06.911393  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  255 18:38:06.911458  CBFS: Locating 'fallback/verstage'

  256 18:38:06.911523  CBFS: Found @ offset 10fb80 size 1072c

  257 18:38:06.911587  

  258 18:38:06.911651  

  259 18:38:06.911715  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  260 18:38:06.911780  Probing TPM: . done!

  261 18:38:06.911843  TPM ready after 0 ms

  262 18:38:06.911913  Connected to device vid:did:rid of 1ae0:0028:00

  263 18:38:06.911977  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  264 18:38:06.912045  Initialized TPM device CR50 revision 0

  265 18:38:06.912108  tlcl_send_startup: Startup return code is 0

  266 18:38:06.912172  TPM: setup succeeded

  267 18:38:06.912235  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  268 18:38:06.912299  Chrome EC: UHEPI supported

  269 18:38:06.912362  Phase 1

  270 18:38:06.912424  FMAP: area GBB found @ c05000 (12288 bytes)

  271 18:38:06.912489  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  272 18:38:06.912553  Phase 2

  273 18:38:06.912615  Phase 3

  274 18:38:06.912679  FMAP: area GBB found @ c05000 (12288 bytes)

  275 18:38:06.912743  VB2:vb2_report_dev_firmware() This is developer signed firmware

  276 18:38:06.912807  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  277 18:38:06.912871  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  278 18:38:06.912935  VB2:vb2_verify_keyblock() Checking keyblock signature...

  279 18:38:06.913006  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  280 18:38:06.913073  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  281 18:38:06.913140  VB2:vb2_verify_fw_preamble() Verifying preamble.

  282 18:38:06.913203  Phase 4

  283 18:38:06.913266  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  284 18:38:06.913330  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  285 18:38:06.913395  VB2:vb2_rsa_verify_digest() Digest check failed!

  286 18:38:06.913459  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  287 18:38:06.913522  Saving nvdata

  288 18:38:06.913585  Reboot requested (10020007)

  289 18:38:06.913649  board_reset() called!

  290 18:38:06.913712  full_reset() called!

  291 18:38:10.487580  

  292 18:38:10.487731  

  293 18:38:10.497268  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  294 18:38:10.500891  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  295 18:38:10.507180  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  296 18:38:10.510636  CPU: AES supported, TXT NOT supported, VT supported

  297 18:38:10.517449  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  298 18:38:10.520493  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  299 18:38:10.527473  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  300 18:38:10.530641  VBOOT: Loading verstage.

  301 18:38:10.533800  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  302 18:38:10.540606  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  303 18:38:10.543752  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  304 18:38:10.547614  CBFS @ c08000 size 3f8000

  305 18:38:10.553921  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  306 18:38:10.556953  CBFS: Locating 'fallback/verstage'

  307 18:38:10.560084  CBFS: Found @ offset 10fb80 size 1072c

  308 18:38:10.564439  

  309 18:38:10.564528  

  310 18:38:10.574405  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  311 18:38:10.588565  Probing TPM: . done!

  312 18:38:10.591710  TPM ready after 0 ms

  313 18:38:10.594854  Connected to device vid:did:rid of 1ae0:0028:00

  314 18:38:10.605701  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  315 18:38:10.608769  Initialized TPM device CR50 revision 0

  316 18:38:10.652351  tlcl_send_startup: Startup return code is 0

  317 18:38:10.652456  TPM: setup succeeded

  318 18:38:10.664851  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  319 18:38:10.669137  Chrome EC: UHEPI supported

  320 18:38:10.672173  Phase 1

  321 18:38:10.675227  FMAP: area GBB found @ c05000 (12288 bytes)

  322 18:38:10.681992  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  323 18:38:10.688782  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  324 18:38:10.691925  Recovery requested (1009000e)

  325 18:38:10.697546  Saving nvdata

  326 18:38:10.703741  tlcl_extend: response is 0

  327 18:38:10.712739  tlcl_extend: response is 0

  328 18:38:10.719431  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  329 18:38:10.722626  CBFS @ c08000 size 3f8000

  330 18:38:10.729421  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  331 18:38:10.732628  CBFS: Locating 'fallback/romstage'

  332 18:38:10.736428  CBFS: Found @ offset 80 size 145fc

  333 18:38:10.739467  Accumulated console time in verstage 98 ms

  334 18:38:10.739568  

  335 18:38:10.739646  

  336 18:38:10.752598  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  337 18:38:10.759026  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  338 18:38:10.762818  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  339 18:38:10.765874  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  340 18:38:10.772300  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  341 18:38:10.776049  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  342 18:38:10.779159  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  343 18:38:10.782096  TCO_STS:   0000 0000

  344 18:38:10.785791  GEN_PMCON: e0015238 00000200

  345 18:38:10.788825  GBLRST_CAUSE: 00000000 00000000

  346 18:38:10.788914  prev_sleep_state 5

  347 18:38:10.792645  Boot Count incremented to 46435

  348 18:38:10.799543  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  349 18:38:10.802458  CBFS @ c08000 size 3f8000

  350 18:38:10.809125  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  351 18:38:10.809219  CBFS: Locating 'fspm.bin'

  352 18:38:10.815897  CBFS: Found @ offset 5ffc0 size 71000

  353 18:38:10.818995  Chrome EC: UHEPI supported

  354 18:38:10.825840  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  355 18:38:10.828978  Probing TPM:  done!

  356 18:38:10.836045  Connected to device vid:did:rid of 1ae0:0028:00

  357 18:38:10.845954  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  358 18:38:10.851687  Initialized TPM device CR50 revision 0

  359 18:38:10.860643  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  360 18:38:10.867557  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  361 18:38:10.870561  MRC cache found, size 1948

  362 18:38:10.873771  bootmode is set to: 2

  363 18:38:10.877607  PRMRR disabled by config.

  364 18:38:10.880623  SPD INDEX = 1

  365 18:38:10.883764  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  366 18:38:10.887408  CBFS @ c08000 size 3f8000

  367 18:38:10.893706  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  368 18:38:10.893805  CBFS: Locating 'spd.bin'

  369 18:38:10.897455  CBFS: Found @ offset 5fb80 size 400

  370 18:38:10.900599  SPD: module type is LPDDR3

  371 18:38:10.903538  SPD: module part is 

  372 18:38:10.910161  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  373 18:38:10.913772  SPD: device width 4 bits, bus width 8 bits

  374 18:38:10.916854  SPD: module size is 4096 MB (per channel)

  375 18:38:10.920514  memory slot: 0 configuration done.

  376 18:38:10.923674  memory slot: 2 configuration done.

  377 18:38:10.975679  CBMEM:

  378 18:38:10.978841  IMD: root @ 99fff000 254 entries.

  379 18:38:10.981915  IMD: root @ 99ffec00 62 entries.

  380 18:38:10.985451  External stage cache:

  381 18:38:10.988583  IMD: root @ 9abff000 254 entries.

  382 18:38:10.992227  IMD: root @ 9abfec00 62 entries.

  383 18:38:10.995412  Chrome EC: clear events_b mask to 0x0000000020004000

  384 18:38:11.011613  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  385 18:38:11.024428  tlcl_write: response is 0

  386 18:38:11.033925  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  387 18:38:11.040153  MRC: TPM MRC hash updated successfully.

  388 18:38:11.040242  2 DIMMs found

  389 18:38:11.043335  SMM Memory Map

  390 18:38:11.046402  SMRAM       : 0x9a000000 0x1000000

  391 18:38:11.050110   Subregion 0: 0x9a000000 0xa00000

  392 18:38:11.053162   Subregion 1: 0x9aa00000 0x200000

  393 18:38:11.056379   Subregion 2: 0x9ac00000 0x400000

  394 18:38:11.060173  top_of_ram = 0x9a000000

  395 18:38:11.063312  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  396 18:38:11.069567  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  397 18:38:11.072765  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  398 18:38:11.079715  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  399 18:38:11.082870  CBFS @ c08000 size 3f8000

  400 18:38:11.086478  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  401 18:38:11.089676  CBFS: Locating 'fallback/postcar'

  402 18:38:11.096388  CBFS: Found @ offset 107000 size 4b44

  403 18:38:11.102927  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  404 18:38:11.112638  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  405 18:38:11.115746  Processing 180 relocs. Offset value of 0x97c0c000

  406 18:38:11.123657  Accumulated console time in romstage 286 ms

  407 18:38:11.123762  

  408 18:38:11.123840  

  409 18:38:11.133642  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  410 18:38:11.140069  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  411 18:38:11.143774  CBFS @ c08000 size 3f8000

  412 18:38:11.149895  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  413 18:38:11.153604  CBFS: Locating 'fallback/ramstage'

  414 18:38:11.156846  CBFS: Found @ offset 43380 size 1b9e8

  415 18:38:11.163129  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  416 18:38:11.195399  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  417 18:38:11.198458  Processing 3976 relocs. Offset value of 0x98db0000

  418 18:38:11.205268  Accumulated console time in postcar 52 ms

  419 18:38:11.205357  

  420 18:38:11.205432  

  421 18:38:11.215153  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  422 18:38:11.221972  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  423 18:38:11.225128  WARNING: RO_VPD is uninitialized or empty.

  424 18:38:11.228322  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  425 18:38:11.235124  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  426 18:38:11.235225  Normal boot.

  427 18:38:11.241407  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  428 18:38:11.244663  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  429 18:38:11.248568  CBFS @ c08000 size 3f8000

  430 18:38:11.254836  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  431 18:38:11.258549  CBFS: Locating 'cpu_microcode_blob.bin'

  432 18:38:11.261638  CBFS: Found @ offset 14700 size 2ec00

  433 18:38:11.264749  microcode: sig=0x806ec pf=0x4 revision=0xc9

  434 18:38:11.268545  Skip microcode update

  435 18:38:11.274783  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  436 18:38:11.274879  CBFS @ c08000 size 3f8000

  437 18:38:11.281708  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  438 18:38:11.284855  CBFS: Locating 'fsps.bin'

  439 18:38:11.287919  CBFS: Found @ offset d1fc0 size 35000

  440 18:38:11.313366  Detected 4 core, 8 thread CPU.

  441 18:38:11.317096  Setting up SMI for CPU

  442 18:38:11.320234  IED base = 0x9ac00000

  443 18:38:11.320326  IED size = 0x00400000

  444 18:38:11.323420  Will perform SMM setup.

  445 18:38:11.329932  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  446 18:38:11.336378  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  447 18:38:11.340214  Processing 16 relocs. Offset value of 0x00030000

  448 18:38:11.343945  Attempting to start 7 APs

  449 18:38:11.347007  Waiting for 10ms after sending INIT.

  450 18:38:11.363268  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.

  451 18:38:11.363369  done.

  452 18:38:11.366385  AP: slot 4 apic_id 5.

  453 18:38:11.369575  AP: slot 5 apic_id 4.

  454 18:38:11.373405  Waiting for 2nd SIPI to complete...done.

  455 18:38:11.376698  AP: slot 7 apic_id 7.

  456 18:38:11.376789  AP: slot 6 apic_id 6.

  457 18:38:11.379904  AP: slot 1 apic_id 2.

  458 18:38:11.383018  AP: slot 3 apic_id 3.

  459 18:38:11.389937  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  460 18:38:11.392839  Processing 13 relocs. Offset value of 0x00038000

  461 18:38:11.399534  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  462 18:38:11.406531  Installing SMM handler to 0x9a000000

  463 18:38:11.412864  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  464 18:38:11.416421  Processing 658 relocs. Offset value of 0x9a010000

  465 18:38:11.426414  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  466 18:38:11.429372  Processing 13 relocs. Offset value of 0x9a008000

  467 18:38:11.436291  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  468 18:38:11.442526  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  469 18:38:11.445835  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  470 18:38:11.452768  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  471 18:38:11.458993  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  472 18:38:11.466007  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  473 18:38:11.469304  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  474 18:38:11.475623  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  475 18:38:11.479394  Clearing SMI status registers

  476 18:38:11.482526  SMI_STS: PM1 

  477 18:38:11.482621  PM1_STS: PWRBTN 

  478 18:38:11.485680  TCO_STS: SECOND_TO 

  479 18:38:11.489345  New SMBASE 0x9a000000

  480 18:38:11.492489  In relocation handler: CPU 0

  481 18:38:11.495581  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  482 18:38:11.499431  Writing SMRR. base = 0x9a000006, mask=0xff000800

  483 18:38:11.502428  Relocation complete.

  484 18:38:11.505715  New SMBASE 0x99fff800

  485 18:38:11.505808  In relocation handler: CPU 2

  486 18:38:11.512616  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  487 18:38:11.515746  Writing SMRR. base = 0x9a000006, mask=0xff000800

  488 18:38:11.519380  Relocation complete.

  489 18:38:11.522397  New SMBASE 0x99ffe400

  490 18:38:11.522488  In relocation handler: CPU 7

  491 18:38:11.529122  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  492 18:38:11.532289  Writing SMRR. base = 0x9a000006, mask=0xff000800

  493 18:38:11.536051  Relocation complete.

  494 18:38:11.536144  New SMBASE 0x99ffe800

  495 18:38:11.539059  In relocation handler: CPU 6

  496 18:38:11.546107  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  497 18:38:11.549228  Writing SMRR. base = 0x9a000006, mask=0xff000800

  498 18:38:11.552399  Relocation complete.

  499 18:38:11.552493  New SMBASE 0x99fffc00

  500 18:38:11.555592  In relocation handler: CPU 1

  501 18:38:11.559281  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  502 18:38:11.565529  Writing SMRR. base = 0x9a000006, mask=0xff000800

  503 18:38:11.568707  Relocation complete.

  504 18:38:11.568802  New SMBASE 0x99fff400

  505 18:38:11.572324  In relocation handler: CPU 3

  506 18:38:11.575556  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  507 18:38:11.582442  Writing SMRR. base = 0x9a000006, mask=0xff000800

  508 18:38:11.585536  Relocation complete.

  509 18:38:11.585629  New SMBASE 0x99ffec00

  510 18:38:11.588724  In relocation handler: CPU 5

  511 18:38:11.592454  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  512 18:38:11.598506  Writing SMRR. base = 0x9a000006, mask=0xff000800

  513 18:38:11.598604  Relocation complete.

  514 18:38:11.602281  New SMBASE 0x99fff000

  515 18:38:11.605377  In relocation handler: CPU 4

  516 18:38:11.608532  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  517 18:38:11.615377  Writing SMRR. base = 0x9a000006, mask=0xff000800

  518 18:38:11.615475  Relocation complete.

  519 18:38:11.619049  Initializing CPU #0

  520 18:38:11.622065  CPU: vendor Intel device 806ec

  521 18:38:11.625190  CPU: family 06, model 8e, stepping 0c

  522 18:38:11.628868  Clearing out pending MCEs

  523 18:38:11.632058  Setting up local APIC...

  524 18:38:11.632151   apic_id: 0x00 done.

  525 18:38:11.635734  Turbo is available but hidden

  526 18:38:11.638885  Turbo is available and visible

  527 18:38:11.642064  VMX status: enabled

  528 18:38:11.645162  IA32_FEATURE_CONTROL status: locked

  529 18:38:11.648924  Skip microcode update

  530 18:38:11.649017  CPU #0 initialized

  531 18:38:11.652013  Initializing CPU #2

  532 18:38:11.652099  Initializing CPU #1

  533 18:38:11.655309  Initializing CPU #3

  534 18:38:11.658390  CPU: vendor Intel device 806ec

  535 18:38:11.661550  CPU: family 06, model 8e, stepping 0c

  536 18:38:11.665301  CPU: vendor Intel device 806ec

  537 18:38:11.668639  CPU: family 06, model 8e, stepping 0c

  538 18:38:11.671736  Clearing out pending MCEs

  539 18:38:11.674880  Clearing out pending MCEs

  540 18:38:11.678661  Setting up local APIC...

  541 18:38:11.678753  Initializing CPU #7

  542 18:38:11.681839  Initializing CPU #6

  543 18:38:11.684918  CPU: vendor Intel device 806ec

  544 18:38:11.688526  CPU: family 06, model 8e, stepping 0c

  545 18:38:11.691782  CPU: vendor Intel device 806ec

  546 18:38:11.694879  CPU: family 06, model 8e, stepping 0c

  547 18:38:11.697883  Clearing out pending MCEs

  548 18:38:11.701523  Clearing out pending MCEs

  549 18:38:11.701613  Setting up local APIC...

  550 18:38:11.705115  Initializing CPU #5

  551 18:38:11.708339  Initializing CPU #4

  552 18:38:11.711361  CPU: vendor Intel device 806ec

  553 18:38:11.714570  CPU: family 06, model 8e, stepping 0c

  554 18:38:11.718383  CPU: vendor Intel device 806ec

  555 18:38:11.721515  CPU: family 06, model 8e, stepping 0c

  556 18:38:11.724631  Clearing out pending MCEs

  557 18:38:11.724728  Clearing out pending MCEs

  558 18:38:11.727679  Setting up local APIC...

  559 18:38:11.731523   apic_id: 0x07 done.

  560 18:38:11.734583  Setting up local APIC...

  561 18:38:11.738379  CPU: vendor Intel device 806ec

  562 18:38:11.741260  CPU: family 06, model 8e, stepping 0c

  563 18:38:11.741358  Clearing out pending MCEs

  564 18:38:11.744489   apic_id: 0x06 done.

  565 18:38:11.748187  VMX status: enabled

  566 18:38:11.748285  VMX status: enabled

  567 18:38:11.751435  IA32_FEATURE_CONTROL status: locked

  568 18:38:11.757739  IA32_FEATURE_CONTROL status: locked

  569 18:38:11.757839  Skip microcode update

  570 18:38:11.760907  Skip microcode update

  571 18:38:11.761004  CPU #7 initialized

  572 18:38:11.764067  CPU #6 initialized

  573 18:38:11.767886  Setting up local APIC...

  574 18:38:11.770912  Setting up local APIC...

  575 18:38:11.771007  Setting up local APIC...

  576 18:38:11.774128   apic_id: 0x03 done.

  577 18:38:11.777393   apic_id: 0x02 done.

  578 18:38:11.777483  VMX status: enabled

  579 18:38:11.781190  VMX status: enabled

  580 18:38:11.784317  IA32_FEATURE_CONTROL status: locked

  581 18:38:11.787495  IA32_FEATURE_CONTROL status: locked

  582 18:38:11.790690  Skip microcode update

  583 18:38:11.790775  Skip microcode update

  584 18:38:11.794361  CPU #3 initialized

  585 18:38:11.797622  CPU #1 initialized

  586 18:38:11.797709   apic_id: 0x04 done.

  587 18:38:11.800726   apic_id: 0x05 done.

  588 18:38:11.800810  VMX status: enabled

  589 18:38:11.803971  VMX status: enabled

  590 18:38:11.807600  IA32_FEATURE_CONTROL status: locked

  591 18:38:11.810782  IA32_FEATURE_CONTROL status: locked

  592 18:38:11.813816  Skip microcode update

  593 18:38:11.817593  Skip microcode update

  594 18:38:11.817678  CPU #5 initialized

  595 18:38:11.820821  CPU #4 initialized

  596 18:38:11.820906   apic_id: 0x01 done.

  597 18:38:11.823808  VMX status: enabled

  598 18:38:11.827417  IA32_FEATURE_CONTROL status: locked

  599 18:38:11.830434  Skip microcode update

  600 18:38:11.830531  CPU #2 initialized

  601 18:38:11.837202  bsp_do_flight_plan done after 461 msecs.

  602 18:38:11.840711  CPU: frequency set to 4200 MHz

  603 18:38:11.840806  Enabling SMIs.

  604 18:38:11.843990  Locking SMM.

  605 18:38:11.857289  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  606 18:38:11.860368  CBFS @ c08000 size 3f8000

  607 18:38:11.867437  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  608 18:38:11.867539  CBFS: Locating 'vbt.bin'

  609 18:38:11.870396  CBFS: Found @ offset 5f5c0 size 499

  610 18:38:11.877302  Found a VBT of 4608 bytes after decompression

  611 18:38:12.059461  Display FSP Version Info HOB

  612 18:38:12.062618  Reference Code - CPU = 9.0.1e.30

  613 18:38:12.065820  uCode Version = 0.0.0.ca

  614 18:38:12.068948  TXT ACM version = ff.ff.ff.ffff

  615 18:38:12.072035  Display FSP Version Info HOB

  616 18:38:12.075884  Reference Code - ME = 9.0.1e.30

  617 18:38:12.078852  MEBx version = 0.0.0.0

  618 18:38:12.082019  ME Firmware Version = Consumer SKU

  619 18:38:12.085824  Display FSP Version Info HOB

  620 18:38:12.089118  Reference Code - CML PCH = 9.0.1e.30

  621 18:38:12.092155  PCH-CRID Status = Disabled

  622 18:38:12.095905  PCH-CRID Original Value = ff.ff.ff.ffff

  623 18:38:12.099033  PCH-CRID New Value = ff.ff.ff.ffff

  624 18:38:12.102226  OPROM - RST - RAID = ff.ff.ff.ffff

  625 18:38:12.105358  ChipsetInit Base Version = ff.ff.ff.ffff

  626 18:38:12.108959  ChipsetInit Oem Version = ff.ff.ff.ffff

  627 18:38:12.112353  Display FSP Version Info HOB

  628 18:38:12.119216  Reference Code - SA - System Agent = 9.0.1e.30

  629 18:38:12.122419  Reference Code - MRC = 0.7.1.6c

  630 18:38:12.122519  SA - PCIe Version = 9.0.1e.30

  631 18:38:12.125567  SA-CRID Status = Disabled

  632 18:38:12.128730  SA-CRID Original Value = 0.0.0.c

  633 18:38:12.131775  SA-CRID New Value = 0.0.0.c

  634 18:38:12.135480  OPROM - VBIOS = ff.ff.ff.ffff

  635 18:38:12.138591  RTC Init

  636 18:38:12.142202  Set power on after power failure.

  637 18:38:12.142300  Disabling Deep S3

  638 18:38:12.145418  Disabling Deep S3

  639 18:38:12.145515  Disabling Deep S4

  640 18:38:12.148623  Disabling Deep S4

  641 18:38:12.148724  Disabling Deep S5

  642 18:38:12.151766  Disabling Deep S5

  643 18:38:12.158832  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1

  644 18:38:12.158931  Enumerating buses...

  645 18:38:12.165107  Show all devs... Before device enumeration.

  646 18:38:12.165205  Root Device: enabled 1

  647 18:38:12.168288  CPU_CLUSTER: 0: enabled 1

  648 18:38:12.171967  DOMAIN: 0000: enabled 1

  649 18:38:12.174944  APIC: 00: enabled 1

  650 18:38:12.175042  PCI: 00:00.0: enabled 1

  651 18:38:12.178247  PCI: 00:02.0: enabled 1

  652 18:38:12.181473  PCI: 00:04.0: enabled 0

  653 18:38:12.185323  PCI: 00:05.0: enabled 0

  654 18:38:12.185420  PCI: 00:12.0: enabled 1

  655 18:38:12.188445  PCI: 00:12.5: enabled 0

  656 18:38:12.191524  PCI: 00:12.6: enabled 0

  657 18:38:12.194707  PCI: 00:14.0: enabled 1

  658 18:38:12.194804  PCI: 00:14.1: enabled 0

  659 18:38:12.198455  PCI: 00:14.3: enabled 1

  660 18:38:12.201643  PCI: 00:14.5: enabled 0

  661 18:38:12.201741  PCI: 00:15.0: enabled 1

  662 18:38:12.204533  PCI: 00:15.1: enabled 1

  663 18:38:12.208214  PCI: 00:15.2: enabled 0

  664 18:38:12.211329  PCI: 00:15.3: enabled 0

  665 18:38:12.211418  PCI: 00:16.0: enabled 1

  666 18:38:12.214993  PCI: 00:16.1: enabled 0

  667 18:38:12.217977  PCI: 00:16.2: enabled 0

  668 18:38:12.221134  PCI: 00:16.3: enabled 0

  669 18:38:12.221222  PCI: 00:16.4: enabled 0

  670 18:38:12.224312  PCI: 00:16.5: enabled 0

  671 18:38:12.228022  PCI: 00:17.0: enabled 1

  672 18:38:12.231222  PCI: 00:19.0: enabled 1

  673 18:38:12.231313  PCI: 00:19.1: enabled 0

  674 18:38:12.234168  PCI: 00:19.2: enabled 0

  675 18:38:12.237789  PCI: 00:1a.0: enabled 0

  676 18:38:12.240781  PCI: 00:1c.0: enabled 0

  677 18:38:12.240870  PCI: 00:1c.1: enabled 0

  678 18:38:12.244449  PCI: 00:1c.2: enabled 0

  679 18:38:12.247646  PCI: 00:1c.3: enabled 0

  680 18:38:12.247734  PCI: 00:1c.4: enabled 0

  681 18:38:12.250752  PCI: 00:1c.5: enabled 0

  682 18:38:12.254550  PCI: 00:1c.6: enabled 0

  683 18:38:12.257730  PCI: 00:1c.7: enabled 0

  684 18:38:12.257817  PCI: 00:1d.0: enabled 1

  685 18:38:12.260893  PCI: 00:1d.1: enabled 0

  686 18:38:12.263938  PCI: 00:1d.2: enabled 0

  687 18:38:12.267823  PCI: 00:1d.3: enabled 0

  688 18:38:12.267911  PCI: 00:1d.4: enabled 0

  689 18:38:12.270959  PCI: 00:1d.5: enabled 1

  690 18:38:12.274152  PCI: 00:1e.0: enabled 1

  691 18:38:12.277280  PCI: 00:1e.1: enabled 0

  692 18:38:12.277369  PCI: 00:1e.2: enabled 1

  693 18:38:12.281039  PCI: 00:1e.3: enabled 1

  694 18:38:12.284215  PCI: 00:1f.0: enabled 1

  695 18:38:12.287426  PCI: 00:1f.1: enabled 1

  696 18:38:12.287514  PCI: 00:1f.2: enabled 1

  697 18:38:12.290626  PCI: 00:1f.3: enabled 1

  698 18:38:12.293805  PCI: 00:1f.4: enabled 1

  699 18:38:12.293894  PCI: 00:1f.5: enabled 1

  700 18:38:12.297582  PCI: 00:1f.6: enabled 0

  701 18:38:12.300597  USB0 port 0: enabled 1

  702 18:38:12.303723  I2C: 00:15: enabled 1

  703 18:38:12.303808  I2C: 00:5d: enabled 1

  704 18:38:12.306909  GENERIC: 0.0: enabled 1

  705 18:38:12.310581  I2C: 00:1a: enabled 1

  706 18:38:12.310672  I2C: 00:38: enabled 1

  707 18:38:12.313665  I2C: 00:39: enabled 1

  708 18:38:12.317388  I2C: 00:3a: enabled 1

  709 18:38:12.317481  I2C: 00:3b: enabled 1

  710 18:38:12.320503  PCI: 00:00.0: enabled 1

  711 18:38:12.323579  SPI: 00: enabled 1

  712 18:38:12.323675  SPI: 01: enabled 1

  713 18:38:12.327315  PNP: 0c09.0: enabled 1

  714 18:38:12.329965  USB2 port 0: enabled 1

  715 18:38:12.330050  USB2 port 1: enabled 1

  716 18:38:12.333684  USB2 port 2: enabled 0

  717 18:38:12.336959  USB2 port 3: enabled 0

  718 18:38:12.339982  USB2 port 5: enabled 0

  719 18:38:12.340072  USB2 port 6: enabled 1

  720 18:38:12.343512  USB2 port 9: enabled 1

  721 18:38:12.346597  USB3 port 0: enabled 1

  722 18:38:12.346687  USB3 port 1: enabled 1

  723 18:38:12.349767  USB3 port 2: enabled 1

  724 18:38:12.353497  USB3 port 3: enabled 1

  725 18:38:12.356505  USB3 port 4: enabled 0

  726 18:38:12.356591  APIC: 02: enabled 1

  727 18:38:12.360242  APIC: 01: enabled 1

  728 18:38:12.360332  APIC: 03: enabled 1

  729 18:38:12.363461  APIC: 05: enabled 1

  730 18:38:12.366679  APIC: 04: enabled 1

  731 18:38:12.366768  APIC: 06: enabled 1

  732 18:38:12.369719  APIC: 07: enabled 1

  733 18:38:12.372891  Compare with tree...

  734 18:38:12.372981  Root Device: enabled 1

  735 18:38:12.376634   CPU_CLUSTER: 0: enabled 1

  736 18:38:12.379840    APIC: 00: enabled 1

  737 18:38:12.379928    APIC: 02: enabled 1

  738 18:38:12.383092    APIC: 01: enabled 1

  739 18:38:12.386159    APIC: 03: enabled 1

  740 18:38:12.386245    APIC: 05: enabled 1

  741 18:38:12.389985    APIC: 04: enabled 1

  742 18:38:12.393137    APIC: 06: enabled 1

  743 18:38:12.393222    APIC: 07: enabled 1

  744 18:38:12.396280   DOMAIN: 0000: enabled 1

  745 18:38:12.399457    PCI: 00:00.0: enabled 1

  746 18:38:12.403184    PCI: 00:02.0: enabled 1

  747 18:38:12.406339    PCI: 00:04.0: enabled 0

  748 18:38:12.406425    PCI: 00:05.0: enabled 0

  749 18:38:12.409389    PCI: 00:12.0: enabled 1

  750 18:38:12.413057    PCI: 00:12.5: enabled 0

  751 18:38:12.416314    PCI: 00:12.6: enabled 0

  752 18:38:12.419362    PCI: 00:14.0: enabled 1

  753 18:38:12.419450     USB0 port 0: enabled 1

  754 18:38:12.423041      USB2 port 0: enabled 1

  755 18:38:12.426187      USB2 port 1: enabled 1

  756 18:38:12.429339      USB2 port 2: enabled 0

  757 18:38:12.433078      USB2 port 3: enabled 0

  758 18:38:12.433167      USB2 port 5: enabled 0

  759 18:38:12.436178      USB2 port 6: enabled 1

  760 18:38:12.439362      USB2 port 9: enabled 1

  761 18:38:12.443038      USB3 port 0: enabled 1

  762 18:38:12.446138      USB3 port 1: enabled 1

  763 18:38:12.449289      USB3 port 2: enabled 1

  764 18:38:12.449377      USB3 port 3: enabled 1

  765 18:38:12.452928      USB3 port 4: enabled 0

  766 18:38:12.456111    PCI: 00:14.1: enabled 0

  767 18:38:12.459341    PCI: 00:14.3: enabled 1

  768 18:38:12.462484    PCI: 00:14.5: enabled 0

  769 18:38:12.462574    PCI: 00:15.0: enabled 1

  770 18:38:12.466191     I2C: 00:15: enabled 1

  771 18:38:12.469407    PCI: 00:15.1: enabled 1

  772 18:38:12.472558     I2C: 00:5d: enabled 1

  773 18:38:12.475763     GENERIC: 0.0: enabled 1

  774 18:38:12.475848    PCI: 00:15.2: enabled 0

  775 18:38:12.479485    PCI: 00:15.3: enabled 0

  776 18:38:12.482693    PCI: 00:16.0: enabled 1

  777 18:38:12.485898    PCI: 00:16.1: enabled 0

  778 18:38:12.485985    PCI: 00:16.2: enabled 0

  779 18:38:12.488970    PCI: 00:16.3: enabled 0

  780 18:38:12.492297    PCI: 00:16.4: enabled 0

  781 18:38:12.495525    PCI: 00:16.5: enabled 0

  782 18:38:12.499148    PCI: 00:17.0: enabled 1

  783 18:38:12.499241    PCI: 00:19.0: enabled 1

  784 18:38:12.502371     I2C: 00:1a: enabled 1

  785 18:38:12.505486     I2C: 00:38: enabled 1

  786 18:38:12.509233     I2C: 00:39: enabled 1

  787 18:38:12.512386     I2C: 00:3a: enabled 1

  788 18:38:12.512472     I2C: 00:3b: enabled 1

  789 18:38:12.515299    PCI: 00:19.1: enabled 0

  790 18:38:12.518946    PCI: 00:19.2: enabled 0

  791 18:38:12.522168    PCI: 00:1a.0: enabled 0

  792 18:38:12.522260    PCI: 00:1c.0: enabled 0

  793 18:38:12.525256    PCI: 00:1c.1: enabled 0

  794 18:38:12.529075    PCI: 00:1c.2: enabled 0

  795 18:38:12.532335    PCI: 00:1c.3: enabled 0

  796 18:38:12.535436    PCI: 00:1c.4: enabled 0

  797 18:38:12.535524    PCI: 00:1c.5: enabled 0

  798 18:38:12.538680    PCI: 00:1c.6: enabled 0

  799 18:38:12.542257    PCI: 00:1c.7: enabled 0

  800 18:38:12.545360    PCI: 00:1d.0: enabled 1

  801 18:38:12.548531    PCI: 00:1d.1: enabled 0

  802 18:38:12.548634    PCI: 00:1d.2: enabled 0

  803 18:38:12.552212    PCI: 00:1d.3: enabled 0

  804 18:38:12.555321    PCI: 00:1d.4: enabled 0

  805 18:38:12.558442    PCI: 00:1d.5: enabled 1

  806 18:38:12.561643     PCI: 00:00.0: enabled 1

  807 18:38:12.561742    PCI: 00:1e.0: enabled 1

  808 18:38:12.565378    PCI: 00:1e.1: enabled 0

  809 18:38:12.568533    PCI: 00:1e.2: enabled 1

  810 18:38:12.571699     SPI: 00: enabled 1

  811 18:38:12.571797    PCI: 00:1e.3: enabled 1

  812 18:38:12.575433     SPI: 01: enabled 1

  813 18:38:12.578608    PCI: 00:1f.0: enabled 1

  814 18:38:12.581642     PNP: 0c09.0: enabled 1

  815 18:38:12.581741    PCI: 00:1f.1: enabled 1

  816 18:38:12.584866    PCI: 00:1f.2: enabled 1

  817 18:38:12.588640    PCI: 00:1f.3: enabled 1

  818 18:38:12.591712    PCI: 00:1f.4: enabled 1

  819 18:38:12.594983    PCI: 00:1f.5: enabled 1

  820 18:38:12.595084    PCI: 00:1f.6: enabled 0

  821 18:38:12.598132  Root Device scanning...

  822 18:38:12.602052  scan_static_bus for Root Device

  823 18:38:12.605300  CPU_CLUSTER: 0 enabled

  824 18:38:12.608323  DOMAIN: 0000 enabled

  825 18:38:12.608421  DOMAIN: 0000 scanning...

  826 18:38:12.611612  PCI: pci_scan_bus for bus 00

  827 18:38:12.615169  PCI: 00:00.0 [8086/0000] ops

  828 18:38:12.618310  PCI: 00:00.0 [8086/9b61] enabled

  829 18:38:12.621369  PCI: 00:02.0 [8086/0000] bus ops

  830 18:38:12.625046  PCI: 00:02.0 [8086/9b41] enabled

  831 18:38:12.628309  PCI: 00:04.0 [8086/1903] disabled

  832 18:38:12.631394  PCI: 00:08.0 [8086/1911] enabled

  833 18:38:12.634698  PCI: 00:12.0 [8086/02f9] enabled

  834 18:38:12.637853  PCI: 00:14.0 [8086/0000] bus ops

  835 18:38:12.641555  PCI: 00:14.0 [8086/02ed] enabled

  836 18:38:12.644613  PCI: 00:14.2 [8086/02ef] enabled

  837 18:38:12.648370  PCI: 00:14.3 [8086/02f0] enabled

  838 18:38:12.651497  PCI: 00:15.0 [8086/0000] bus ops

  839 18:38:12.654561  PCI: 00:15.0 [8086/02e8] enabled

  840 18:38:12.658193  PCI: 00:15.1 [8086/0000] bus ops

  841 18:38:12.661307  PCI: 00:15.1 [8086/02e9] enabled

  842 18:38:12.664547  PCI: 00:16.0 [8086/0000] ops

  843 18:38:12.668162  PCI: 00:16.0 [8086/02e0] enabled

  844 18:38:12.671472  PCI: 00:17.0 [8086/0000] ops

  845 18:38:12.674709  PCI: 00:17.0 [8086/02d3] enabled

  846 18:38:12.677827  PCI: 00:19.0 [8086/0000] bus ops

  847 18:38:12.681042  PCI: 00:19.0 [8086/02c5] enabled

  848 18:38:12.684738  PCI: 00:1d.0 [8086/0000] bus ops

  849 18:38:12.688143  PCI: 00:1d.0 [8086/02b0] enabled

  850 18:38:12.694320  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  851 18:38:12.698061  PCI: 00:1e.0 [8086/0000] ops

  852 18:38:12.701339  PCI: 00:1e.0 [8086/02a8] enabled

  853 18:38:12.704373  PCI: 00:1e.2 [8086/0000] bus ops

  854 18:38:12.708146  PCI: 00:1e.2 [8086/02aa] enabled

  855 18:38:12.711316  PCI: 00:1e.3 [8086/0000] bus ops

  856 18:38:12.714465  PCI: 00:1e.3 [8086/02ab] enabled

  857 18:38:12.717589  PCI: 00:1f.0 [8086/0000] bus ops

  858 18:38:12.721357  PCI: 00:1f.0 [8086/0284] enabled

  859 18:38:12.724485  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  860 18:38:12.731144  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  861 18:38:12.734385  PCI: 00:1f.3 [8086/0000] bus ops

  862 18:38:12.737714  PCI: 00:1f.3 [8086/02c8] enabled

  863 18:38:12.741366  PCI: 00:1f.4 [8086/0000] bus ops

  864 18:38:12.744482  PCI: 00:1f.4 [8086/02a3] enabled

  865 18:38:12.747551  PCI: 00:1f.5 [8086/0000] bus ops

  866 18:38:12.751243  PCI: 00:1f.5 [8086/02a4] enabled

  867 18:38:12.754301  PCI: Leftover static devices:

  868 18:38:12.754387  PCI: 00:05.0

  869 18:38:12.757342  PCI: 00:12.5

  870 18:38:12.757426  PCI: 00:12.6

  871 18:38:12.760618  PCI: 00:14.1

  872 18:38:12.760701  PCI: 00:14.5

  873 18:38:12.764422  PCI: 00:15.2

  874 18:38:12.764517  PCI: 00:15.3

  875 18:38:12.764597  PCI: 00:16.1

  876 18:38:12.767596  PCI: 00:16.2

  877 18:38:12.767680  PCI: 00:16.3

  878 18:38:12.770742  PCI: 00:16.4

  879 18:38:12.770824  PCI: 00:16.5

  880 18:38:12.770895  PCI: 00:19.1

  881 18:38:12.773991  PCI: 00:19.2

  882 18:38:12.774067  PCI: 00:1a.0

  883 18:38:12.777766  PCI: 00:1c.0

  884 18:38:12.777848  PCI: 00:1c.1

  885 18:38:12.777920  PCI: 00:1c.2

  886 18:38:12.780949  PCI: 00:1c.3

  887 18:38:12.781028  PCI: 00:1c.4

  888 18:38:12.784055  PCI: 00:1c.5

  889 18:38:12.784139  PCI: 00:1c.6

  890 18:38:12.787263  PCI: 00:1c.7

  891 18:38:12.787348  PCI: 00:1d.1

  892 18:38:12.787419  PCI: 00:1d.2

  893 18:38:12.790924  PCI: 00:1d.3

  894 18:38:12.790999  PCI: 00:1d.4

  895 18:38:12.794146  PCI: 00:1d.5

  896 18:38:12.794228  PCI: 00:1e.1

  897 18:38:12.794299  PCI: 00:1f.1

  898 18:38:12.797258  PCI: 00:1f.2

  899 18:38:12.797338  PCI: 00:1f.6

  900 18:38:12.800544  PCI: Check your devicetree.cb.

  901 18:38:12.804262  PCI: 00:02.0 scanning...

  902 18:38:12.807496  scan_generic_bus for PCI: 00:02.0

  903 18:38:12.810446  scan_generic_bus for PCI: 00:02.0 done

  904 18:38:12.817400  scan_bus: scanning of bus PCI: 00:02.0 took 10186 usecs

  905 18:38:12.820542  PCI: 00:14.0 scanning...

  906 18:38:12.824099  scan_static_bus for PCI: 00:14.0

  907 18:38:12.824200  USB0 port 0 enabled

  908 18:38:12.827304  USB0 port 0 scanning...

  909 18:38:12.830279  scan_static_bus for USB0 port 0

  910 18:38:12.833969  USB2 port 0 enabled

  911 18:38:12.834055  USB2 port 1 enabled

  912 18:38:12.837379  USB2 port 2 disabled

  913 18:38:12.840465  USB2 port 3 disabled

  914 18:38:12.840554  USB2 port 5 disabled

  915 18:38:12.843494  USB2 port 6 enabled

  916 18:38:12.847345  USB2 port 9 enabled

  917 18:38:12.847433  USB3 port 0 enabled

  918 18:38:12.850540  USB3 port 1 enabled

  919 18:38:12.850623  USB3 port 2 enabled

  920 18:38:12.853524  USB3 port 3 enabled

  921 18:38:12.856738  USB3 port 4 disabled

  922 18:38:12.856822  USB2 port 0 scanning...

  923 18:38:12.860518  scan_static_bus for USB2 port 0

  924 18:38:12.866847  scan_static_bus for USB2 port 0 done

  925 18:38:12.870029  scan_bus: scanning of bus USB2 port 0 took 9710 usecs

  926 18:38:12.873952  USB2 port 1 scanning...

  927 18:38:12.877039  scan_static_bus for USB2 port 1

  928 18:38:12.880195  scan_static_bus for USB2 port 1 done

  929 18:38:12.887117  scan_bus: scanning of bus USB2 port 1 took 9713 usecs

  930 18:38:12.887216  USB2 port 6 scanning...

  931 18:38:12.890269  scan_static_bus for USB2 port 6

  932 18:38:12.896594  scan_static_bus for USB2 port 6 done

  933 18:38:12.899950  scan_bus: scanning of bus USB2 port 6 took 9709 usecs

  934 18:38:12.903668  USB2 port 9 scanning...

  935 18:38:12.906759  scan_static_bus for USB2 port 9

  936 18:38:12.909893  scan_static_bus for USB2 port 9 done

  937 18:38:12.916993  scan_bus: scanning of bus USB2 port 9 took 9709 usecs

  938 18:38:12.917083  USB3 port 0 scanning...

  939 18:38:12.920143  scan_static_bus for USB3 port 0

  940 18:38:12.926992  scan_static_bus for USB3 port 0 done

  941 18:38:12.930019  scan_bus: scanning of bus USB3 port 0 took 9700 usecs

  942 18:38:12.933577  USB3 port 1 scanning...

  943 18:38:12.936933  scan_static_bus for USB3 port 1

  944 18:38:12.940131  scan_static_bus for USB3 port 1 done

  945 18:38:12.946910  scan_bus: scanning of bus USB3 port 1 took 9709 usecs

  946 18:38:12.947004  USB3 port 2 scanning...

  947 18:38:12.950083  scan_static_bus for USB3 port 2

  948 18:38:12.956878  scan_static_bus for USB3 port 2 done

  949 18:38:12.960472  scan_bus: scanning of bus USB3 port 2 took 9710 usecs

  950 18:38:12.963597  USB3 port 3 scanning...

  951 18:38:12.966736  scan_static_bus for USB3 port 3

  952 18:38:12.969945  scan_static_bus for USB3 port 3 done

  953 18:38:12.976892  scan_bus: scanning of bus USB3 port 3 took 9708 usecs

  954 18:38:12.980138  scan_static_bus for USB0 port 0 done

  955 18:38:12.986421  scan_bus: scanning of bus USB0 port 0 took 155440 usecs

  956 18:38:12.990232  scan_static_bus for PCI: 00:14.0 done

  957 18:38:12.993536  scan_bus: scanning of bus PCI: 00:14.0 took 173073 usecs

  958 18:38:12.996607  PCI: 00:15.0 scanning...

  959 18:38:12.999815  scan_generic_bus for PCI: 00:15.0

  960 18:38:13.006206  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

  961 18:38:13.010025  scan_generic_bus for PCI: 00:15.0 done

  962 18:38:13.013175  scan_bus: scanning of bus PCI: 00:15.0 took 14301 usecs

  963 18:38:13.016328  PCI: 00:15.1 scanning...

  964 18:38:13.019499  scan_generic_bus for PCI: 00:15.1

  965 18:38:13.026324  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

  966 18:38:13.029945  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

  967 18:38:13.032980  scan_generic_bus for PCI: 00:15.1 done

  968 18:38:13.039417  scan_bus: scanning of bus PCI: 00:15.1 took 18666 usecs

  969 18:38:13.039508  PCI: 00:19.0 scanning...

  970 18:38:13.046331  scan_generic_bus for PCI: 00:19.0

  971 18:38:13.049456  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

  972 18:38:13.053238  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

  973 18:38:13.056297  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

  974 18:38:13.062625  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

  975 18:38:13.066443  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

  976 18:38:13.069604  scan_generic_bus for PCI: 00:19.0 done

  977 18:38:13.075727  scan_bus: scanning of bus PCI: 00:19.0 took 30736 usecs

  978 18:38:13.075818  PCI: 00:1d.0 scanning...

  979 18:38:13.082227  do_pci_scan_bridge for PCI: 00:1d.0

  980 18:38:13.082317  PCI: pci_scan_bus for bus 01

  981 18:38:13.085946  PCI: 01:00.0 [1c5c/1327] enabled

  982 18:38:13.092741  Enabling Common Clock Configuration

  983 18:38:13.095892  L1 Sub-State supported from root port 29

  984 18:38:13.099105  L1 Sub-State Support = 0xf

  985 18:38:13.102328  CommonModeRestoreTime = 0x28

  986 18:38:13.106022  Power On Value = 0x16, Power On Scale = 0x0

  987 18:38:13.106113  ASPM: Enabled L1

  988 18:38:13.112388  scan_bus: scanning of bus PCI: 00:1d.0 took 32800 usecs

  989 18:38:13.115986  PCI: 00:1e.2 scanning...

  990 18:38:13.119145  scan_generic_bus for PCI: 00:1e.2

  991 18:38:13.122300  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

  992 18:38:13.125343  scan_generic_bus for PCI: 00:1e.2 done

  993 18:38:13.132095  scan_bus: scanning of bus PCI: 00:1e.2 took 14012 usecs

  994 18:38:13.135242  PCI: 00:1e.3 scanning...

  995 18:38:13.139033  scan_generic_bus for PCI: 00:1e.3

  996 18:38:13.142316  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

  997 18:38:13.145383  scan_generic_bus for PCI: 00:1e.3 done

  998 18:38:13.152386  scan_bus: scanning of bus PCI: 00:1e.3 took 13992 usecs

  999 18:38:13.155534  PCI: 00:1f.0 scanning...

 1000 18:38:13.158601  scan_static_bus for PCI: 00:1f.0

 1001 18:38:13.158699  PNP: 0c09.0 enabled

 1002 18:38:13.165366  scan_static_bus for PCI: 00:1f.0 done

 1003 18:38:13.168463  scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs

 1004 18:38:13.172085  PCI: 00:1f.3 scanning...

 1005 18:38:13.178549  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1006 18:38:13.178647  PCI: 00:1f.4 scanning...

 1007 18:38:13.185570  scan_generic_bus for PCI: 00:1f.4

 1008 18:38:13.188634  scan_generic_bus for PCI: 00:1f.4 done

 1009 18:38:13.191803  scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs

 1010 18:38:13.195533  PCI: 00:1f.5 scanning...

 1011 18:38:13.198654  scan_generic_bus for PCI: 00:1f.5

 1012 18:38:13.201829  scan_generic_bus for PCI: 00:1f.5 done

 1013 18:38:13.208267  scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs

 1014 18:38:13.215325  scan_bus: scanning of bus DOMAIN: 0000 took 605193 usecs

 1015 18:38:13.218342  scan_static_bus for Root Device done

 1016 18:38:13.224677  scan_bus: scanning of bus Root Device took 625112 usecs

 1017 18:38:13.224782  done

 1018 18:38:13.228429  Chrome EC: UHEPI supported

 1019 18:38:13.234732  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1020 18:38:13.241464  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1021 18:38:13.244539  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1022 18:38:13.252810  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1023 18:38:13.255866  SPI flash protection: WPSW=0 SRP0=0

 1024 18:38:13.262128  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1025 18:38:13.265845  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1026 18:38:13.268977  found VGA at PCI: 00:02.0

 1027 18:38:13.272218  Setting up VGA for PCI: 00:02.0

 1028 18:38:13.279002  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1029 18:38:13.282174  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1030 18:38:13.285153  Allocating resources...

 1031 18:38:13.289084  Reading resources...

 1032 18:38:13.292275  Root Device read_resources bus 0 link: 0

 1033 18:38:13.295847  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1034 18:38:13.302221  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1035 18:38:13.305364  DOMAIN: 0000 read_resources bus 0 link: 0

 1036 18:38:13.312798  PCI: 00:14.0 read_resources bus 0 link: 0

 1037 18:38:13.315972  USB0 port 0 read_resources bus 0 link: 0

 1038 18:38:13.324054  USB0 port 0 read_resources bus 0 link: 0 done

 1039 18:38:13.327279  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1040 18:38:13.334736  PCI: 00:15.0 read_resources bus 1 link: 0

 1041 18:38:13.337837  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1042 18:38:13.344622  PCI: 00:15.1 read_resources bus 2 link: 0

 1043 18:38:13.347846  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1044 18:38:13.355346  PCI: 00:19.0 read_resources bus 3 link: 0

 1045 18:38:13.362191  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1046 18:38:13.365378  PCI: 00:1d.0 read_resources bus 1 link: 0

 1047 18:38:13.371985  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1048 18:38:13.375071  PCI: 00:1e.2 read_resources bus 4 link: 0

 1049 18:38:13.381984  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1050 18:38:13.385058  PCI: 00:1e.3 read_resources bus 5 link: 0

 1051 18:38:13.392059  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1052 18:38:13.395294  PCI: 00:1f.0 read_resources bus 0 link: 0

 1053 18:38:13.402129  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1054 18:38:13.408983  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1055 18:38:13.412064  Root Device read_resources bus 0 link: 0 done

 1056 18:38:13.415109  Done reading resources.

 1057 18:38:13.418345  Show resources in subtree (Root Device)...After reading.

 1058 18:38:13.425284   Root Device child on link 0 CPU_CLUSTER: 0

 1059 18:38:13.428450    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1060 18:38:13.428548     APIC: 00

 1061 18:38:13.431509     APIC: 02

 1062 18:38:13.431629     APIC: 01

 1063 18:38:13.435288     APIC: 03

 1064 18:38:13.435385     APIC: 05

 1065 18:38:13.435462     APIC: 04

 1066 18:38:13.438201     APIC: 06

 1067 18:38:13.438298     APIC: 07

 1068 18:38:13.441343    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1069 18:38:13.451875    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1070 18:38:13.504937    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1071 18:38:13.505256     PCI: 00:00.0

 1072 18:38:13.505540     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1073 18:38:13.505631     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1074 18:38:13.505892     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1075 18:38:13.505978     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1076 18:38:13.554332     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1077 18:38:13.554632     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1078 18:38:13.554717     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1079 18:38:13.554979     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1080 18:38:13.555255     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1081 18:38:13.593537     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1082 18:38:13.593866     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1083 18:38:13.594171     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1084 18:38:13.594256     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1085 18:38:13.597387     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1086 18:38:13.603897     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1087 18:38:13.613834     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1088 18:38:13.613933     PCI: 00:02.0

 1089 18:38:13.623836     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1090 18:38:13.637066     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1091 18:38:13.643650     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1092 18:38:13.647126     PCI: 00:04.0

 1093 18:38:13.647225     PCI: 00:08.0

 1094 18:38:13.656795     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1095 18:38:13.660581     PCI: 00:12.0

 1096 18:38:13.670433     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1097 18:38:13.673551     PCI: 00:14.0 child on link 0 USB0 port 0

 1098 18:38:13.683459     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1099 18:38:13.686626      USB0 port 0 child on link 0 USB2 port 0

 1100 18:38:13.689794       USB2 port 0

 1101 18:38:13.689893       USB2 port 1

 1102 18:38:13.693641       USB2 port 2

 1103 18:38:13.693739       USB2 port 3

 1104 18:38:13.696607       USB2 port 5

 1105 18:38:13.699731       USB2 port 6

 1106 18:38:13.699837       USB2 port 9

 1107 18:38:13.703429       USB3 port 0

 1108 18:38:13.703540       USB3 port 1

 1109 18:38:13.706711       USB3 port 2

 1110 18:38:13.706809       USB3 port 3

 1111 18:38:13.709821       USB3 port 4

 1112 18:38:13.709919     PCI: 00:14.2

 1113 18:38:13.719992     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1114 18:38:13.729607     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1115 18:38:13.733374     PCI: 00:14.3

 1116 18:38:13.743237     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1117 18:38:13.746358     PCI: 00:15.0 child on link 0 I2C: 01:15

 1118 18:38:13.756230     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1119 18:38:13.756328      I2C: 01:15

 1120 18:38:13.763109     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1121 18:38:13.772597     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1122 18:38:13.772699      I2C: 02:5d

 1123 18:38:13.776271      GENERIC: 0.0

 1124 18:38:13.776369     PCI: 00:16.0

 1125 18:38:13.785996     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1126 18:38:13.789087     PCI: 00:17.0

 1127 18:38:13.799140     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1128 18:38:13.806128     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1129 18:38:13.815941     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1130 18:38:13.822501     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1131 18:38:13.832502     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1132 18:38:13.838782     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1133 18:38:13.845506     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1134 18:38:13.855435     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1135 18:38:13.855531      I2C: 03:1a

 1136 18:38:13.858572      I2C: 03:38

 1137 18:38:13.858663      I2C: 03:39

 1138 18:38:13.862146      I2C: 03:3a

 1139 18:38:13.862249      I2C: 03:3b

 1140 18:38:13.865376     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1141 18:38:13.875178     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1142 18:38:13.885134     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1143 18:38:13.895070     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1144 18:38:13.895184      PCI: 01:00.0

 1145 18:38:13.905320      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1146 18:38:13.908455     PCI: 00:1e.0

 1147 18:38:13.918560     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1148 18:38:13.928751     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1149 18:38:13.931884     PCI: 00:1e.2 child on link 0 SPI: 00

 1150 18:38:13.941919     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1151 18:38:13.944978      SPI: 00

 1152 18:38:13.948090     PCI: 00:1e.3 child on link 0 SPI: 01

 1153 18:38:13.958047     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1154 18:38:13.958148      SPI: 01

 1155 18:38:13.965011     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1156 18:38:13.971052     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1157 18:38:13.981110     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1158 18:38:13.984754      PNP: 0c09.0

 1159 18:38:13.991027      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1160 18:38:13.994670     PCI: 00:1f.3

 1161 18:38:14.004736     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1162 18:38:14.014886     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1163 18:38:14.014990     PCI: 00:1f.4

 1164 18:38:14.024373     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1165 18:38:14.034529     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1166 18:38:14.034640     PCI: 00:1f.5

 1167 18:38:14.044646     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1168 18:38:14.050810  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1169 18:38:14.057680  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1170 18:38:14.064730  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1171 18:38:14.067752  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1172 18:38:14.070915  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1173 18:38:14.073973  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1174 18:38:14.077718  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1175 18:38:14.084379  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1176 18:38:14.090620  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1177 18:38:14.100655  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1178 18:38:14.107022  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1179 18:38:14.113816  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1180 18:38:14.120677  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1181 18:38:14.127008  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1182 18:38:14.130334  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1183 18:38:14.137328  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1184 18:38:14.140367  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1185 18:38:14.147095  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1186 18:38:14.150109  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1187 18:38:14.156919  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1188 18:38:14.159985  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1189 18:38:14.166981  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1190 18:38:14.169967  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1191 18:38:14.176627  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1192 18:38:14.180311  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1193 18:38:14.186848  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1194 18:38:14.189937  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1195 18:38:14.193038  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1196 18:38:14.199939  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1197 18:38:14.203268  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1198 18:38:14.210121  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1199 18:38:14.213368  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1200 18:38:14.219449  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1201 18:38:14.223301  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1202 18:38:14.229705  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1203 18:38:14.232836  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1204 18:38:14.239805  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1205 18:38:14.246553  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1206 18:38:14.249623  avoid_fixed_resources: DOMAIN: 0000

 1207 18:38:14.256384  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1208 18:38:14.263089  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1209 18:38:14.269498  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1210 18:38:14.279342  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1211 18:38:14.285925  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1212 18:38:14.292751  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1213 18:38:14.302802  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1214 18:38:14.309114  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1215 18:38:14.315819  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1216 18:38:14.322643  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1217 18:38:14.332036  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1218 18:38:14.338979  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1219 18:38:14.339088  Setting resources...

 1220 18:38:14.345805  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1221 18:38:14.352616  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1222 18:38:14.355588  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1223 18:38:14.358777  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1224 18:38:14.362458  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1225 18:38:14.368949  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1226 18:38:14.375734  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1227 18:38:14.381813  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1228 18:38:14.388530  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1229 18:38:14.395341  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1230 18:38:14.398491  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1231 18:38:14.405294  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1232 18:38:14.408471  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1233 18:38:14.415277  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1234 18:38:14.418445  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1235 18:38:14.424967  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1236 18:38:14.428136  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1237 18:38:14.431961  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1238 18:38:14.438221  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1239 18:38:14.442032  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1240 18:38:14.448130  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1241 18:38:14.451841  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1242 18:38:14.458438  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1243 18:38:14.461626  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1244 18:38:14.468328  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1245 18:38:14.471491  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1246 18:38:14.478285  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1247 18:38:14.481370  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1248 18:38:14.488126  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1249 18:38:14.491246  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1250 18:38:14.498044  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1251 18:38:14.501205  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1252 18:38:14.508193  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1253 18:38:14.518183  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1254 18:38:14.524496  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1255 18:38:14.531372  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1256 18:38:14.534544  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1257 18:38:14.544563  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1258 18:38:14.547614  Root Device assign_resources, bus 0 link: 0

 1259 18:38:14.550829  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1260 18:38:14.561341  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1261 18:38:14.568065  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1262 18:38:14.577592  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1263 18:38:14.584320  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1264 18:38:14.594190  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1265 18:38:14.601111  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1266 18:38:14.607405  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1267 18:38:14.611193  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1268 18:38:14.621207  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1269 18:38:14.627410  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1270 18:38:14.637610  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1271 18:38:14.643941  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1272 18:38:14.647193  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1273 18:38:14.654019  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1274 18:38:14.660772  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1275 18:38:14.666949  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1276 18:38:14.670585  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1277 18:38:14.680676  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1278 18:38:14.686926  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1279 18:38:14.696848  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1280 18:38:14.703594  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1281 18:38:14.709872  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1282 18:38:14.716648  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1283 18:38:14.726576  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1284 18:38:14.732909  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1285 18:38:14.739843  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1286 18:38:14.742997  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1287 18:38:14.753070  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1288 18:38:14.759206  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1289 18:38:14.769789  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1290 18:38:14.772815  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1291 18:38:14.782426  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1292 18:38:14.785539  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1293 18:38:14.795455  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1294 18:38:14.801949  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1295 18:38:14.808939  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1296 18:38:14.812092  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1297 18:38:14.821979  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1298 18:38:14.825329  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1299 18:38:14.832065  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1300 18:38:14.835121  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1301 18:38:14.841986  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1302 18:38:14.845001  LPC: Trying to open IO window from 800 size 1ff

 1303 18:38:14.855153  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1304 18:38:14.861363  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1305 18:38:14.868184  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1306 18:38:14.878354  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1307 18:38:14.881275  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1308 18:38:14.887992  Root Device assign_resources, bus 0 link: 0

 1309 18:38:14.888080  Done setting resources.

 1310 18:38:14.894804  Show resources in subtree (Root Device)...After assigning values.

 1311 18:38:14.901603   Root Device child on link 0 CPU_CLUSTER: 0

 1312 18:38:14.904719    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1313 18:38:14.904822     APIC: 00

 1314 18:38:14.907839     APIC: 02

 1315 18:38:14.907921     APIC: 01

 1316 18:38:14.911558     APIC: 03

 1317 18:38:14.911652     APIC: 05

 1318 18:38:14.911730     APIC: 04

 1319 18:38:14.914883     APIC: 06

 1320 18:38:14.914976     APIC: 07

 1321 18:38:14.918124    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1322 18:38:14.927985    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1323 18:38:14.941123    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1324 18:38:14.941222     PCI: 00:00.0

 1325 18:38:14.951102     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1326 18:38:14.960710     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1327 18:38:14.970598     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1328 18:38:14.980692     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1329 18:38:14.987443     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1330 18:38:14.997467     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1331 18:38:15.007422     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1332 18:38:15.016942     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1333 18:38:15.026891     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1334 18:38:15.033631     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1335 18:38:15.043894     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1336 18:38:15.053445     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1337 18:38:15.063584     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1338 18:38:15.073534     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1339 18:38:15.083491     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1340 18:38:15.093438     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1341 18:38:15.093543     PCI: 00:02.0

 1342 18:38:15.103430     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1343 18:38:15.116659     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1344 18:38:15.122990     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1345 18:38:15.126572     PCI: 00:04.0

 1346 18:38:15.126846     PCI: 00:08.0

 1347 18:38:15.136221     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1348 18:38:15.139992     PCI: 00:12.0

 1349 18:38:15.149333     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1350 18:38:15.153170     PCI: 00:14.0 child on link 0 USB0 port 0

 1351 18:38:15.162833     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1352 18:38:15.169249      USB0 port 0 child on link 0 USB2 port 0

 1353 18:38:15.169349       USB2 port 0

 1354 18:38:15.172233       USB2 port 1

 1355 18:38:15.172331       USB2 port 2

 1356 18:38:15.176081       USB2 port 3

 1357 18:38:15.176179       USB2 port 5

 1358 18:38:15.179165       USB2 port 6

 1359 18:38:15.182317       USB2 port 9

 1360 18:38:15.182415       USB3 port 0

 1361 18:38:15.185972       USB3 port 1

 1362 18:38:15.186071       USB3 port 2

 1363 18:38:15.189168       USB3 port 3

 1364 18:38:15.189267       USB3 port 4

 1365 18:38:15.192349     PCI: 00:14.2

 1366 18:38:15.202101     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1367 18:38:15.211902     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1368 18:38:15.212003     PCI: 00:14.3

 1369 18:38:15.225387     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1370 18:38:15.228436     PCI: 00:15.0 child on link 0 I2C: 01:15

 1371 18:38:15.238533     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1372 18:38:15.238638      I2C: 01:15

 1373 18:38:15.244985     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1374 18:38:15.255050     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1375 18:38:15.255155      I2C: 02:5d

 1376 18:38:15.258747      GENERIC: 0.0

 1377 18:38:15.258834     PCI: 00:16.0

 1378 18:38:15.268102     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1379 18:38:15.271826     PCI: 00:17.0

 1380 18:38:15.281632     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1381 18:38:15.291548     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1382 18:38:15.301315     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1383 18:38:15.311066     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1384 18:38:15.318028     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1385 18:38:15.327490     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1386 18:38:15.334392     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1387 18:38:15.344464     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1388 18:38:15.344565      I2C: 03:1a

 1389 18:38:15.347608      I2C: 03:38

 1390 18:38:15.347706      I2C: 03:39

 1391 18:38:15.350824      I2C: 03:3a

 1392 18:38:15.350922      I2C: 03:3b

 1393 18:38:15.357692     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1394 18:38:15.364221     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1395 18:38:15.374335     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1396 18:38:15.387394     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1397 18:38:15.387494      PCI: 01:00.0

 1398 18:38:15.396809      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1399 18:38:15.400536     PCI: 00:1e.0

 1400 18:38:15.410391     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1401 18:38:15.420340     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1402 18:38:15.426642     PCI: 00:1e.2 child on link 0 SPI: 00

 1403 18:38:15.436764     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1404 18:38:15.436859      SPI: 00

 1405 18:38:15.439867     PCI: 00:1e.3 child on link 0 SPI: 01

 1406 18:38:15.449974     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1407 18:38:15.453164      SPI: 01

 1408 18:38:15.456354     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1409 18:38:15.466290     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1410 18:38:15.473351     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1411 18:38:15.476304      PNP: 0c09.0

 1412 18:38:15.486186      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1413 18:38:15.486283     PCI: 00:1f.3

 1414 18:38:15.496423     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1415 18:38:15.505778     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1416 18:38:15.509407     PCI: 00:1f.4

 1417 18:38:15.519441     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1418 18:38:15.529044     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1419 18:38:15.529140     PCI: 00:1f.5

 1420 18:38:15.539076     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1421 18:38:15.542292  Done allocating resources.

 1422 18:38:15.549194  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1423 18:38:15.552199  Enabling resources...

 1424 18:38:15.555301  PCI: 00:00.0 subsystem <- 8086/9b61

 1425 18:38:15.559062  PCI: 00:00.0 cmd <- 06

 1426 18:38:15.562177  PCI: 00:02.0 subsystem <- 8086/9b41

 1427 18:38:15.565461  PCI: 00:02.0 cmd <- 03

 1428 18:38:15.565566  PCI: 00:08.0 cmd <- 06

 1429 18:38:15.572302  PCI: 00:12.0 subsystem <- 8086/02f9

 1430 18:38:15.572400  PCI: 00:12.0 cmd <- 02

 1431 18:38:15.575452  PCI: 00:14.0 subsystem <- 8086/02ed

 1432 18:38:15.578518  PCI: 00:14.0 cmd <- 02

 1433 18:38:15.582188  PCI: 00:14.2 cmd <- 02

 1434 18:38:15.585338  PCI: 00:14.3 subsystem <- 8086/02f0

 1435 18:38:15.588408  PCI: 00:14.3 cmd <- 02

 1436 18:38:15.592177  PCI: 00:15.0 subsystem <- 8086/02e8

 1437 18:38:15.595311  PCI: 00:15.0 cmd <- 02

 1438 18:38:15.598478  PCI: 00:15.1 subsystem <- 8086/02e9

 1439 18:38:15.602137  PCI: 00:15.1 cmd <- 02

 1440 18:38:15.605235  PCI: 00:16.0 subsystem <- 8086/02e0

 1441 18:38:15.608385  PCI: 00:16.0 cmd <- 02

 1442 18:38:15.611471  PCI: 00:17.0 subsystem <- 8086/02d3

 1443 18:38:15.614637  PCI: 00:17.0 cmd <- 03

 1444 18:38:15.618288  PCI: 00:19.0 subsystem <- 8086/02c5

 1445 18:38:15.618386  PCI: 00:19.0 cmd <- 02

 1446 18:38:15.624657  PCI: 00:1d.0 bridge ctrl <- 0013

 1447 18:38:15.627909  PCI: 00:1d.0 subsystem <- 8086/02b0

 1448 18:38:15.628008  PCI: 00:1d.0 cmd <- 06

 1449 18:38:15.631044  PCI: 00:1e.0 subsystem <- 8086/02a8

 1450 18:38:15.634857  PCI: 00:1e.0 cmd <- 06

 1451 18:38:15.638015  PCI: 00:1e.2 subsystem <- 8086/02aa

 1452 18:38:15.641296  PCI: 00:1e.2 cmd <- 06

 1453 18:38:15.644402  PCI: 00:1e.3 subsystem <- 8086/02ab

 1454 18:38:15.648063  PCI: 00:1e.3 cmd <- 02

 1455 18:38:15.651297  PCI: 00:1f.0 subsystem <- 8086/0284

 1456 18:38:15.654427  PCI: 00:1f.0 cmd <- 407

 1457 18:38:15.658161  PCI: 00:1f.3 subsystem <- 8086/02c8

 1458 18:38:15.661154  PCI: 00:1f.3 cmd <- 02

 1459 18:38:15.664330  PCI: 00:1f.4 subsystem <- 8086/02a3

 1460 18:38:15.667502  PCI: 00:1f.4 cmd <- 03

 1461 18:38:15.671139  PCI: 00:1f.5 subsystem <- 8086/02a4

 1462 18:38:15.674492  PCI: 00:1f.5 cmd <- 406

 1463 18:38:15.682412  PCI: 01:00.0 cmd <- 02

 1464 18:38:15.687294  done.

 1465 18:38:15.699206  ME: Version: 14.0.39.1367

 1466 18:38:15.706101  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11

 1467 18:38:15.709048  Initializing devices...

 1468 18:38:15.709149  Root Device init ...

 1469 18:38:15.715865  Chrome EC: Set SMI mask to 0x0000000000000000

 1470 18:38:15.718977  Chrome EC: clear events_b mask to 0x0000000000000000

 1471 18:38:15.725699  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1472 18:38:15.732029  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1473 18:38:15.738819  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1474 18:38:15.741951  Chrome EC: Set WAKE mask to 0x0000000000000000

 1475 18:38:15.745686  Root Device init finished in 35181 usecs

 1476 18:38:15.748855  CPU_CLUSTER: 0 init ...

 1477 18:38:15.755709  CPU_CLUSTER: 0 init finished in 2440 usecs

 1478 18:38:15.760073  PCI: 00:00.0 init ...

 1479 18:38:15.763408  CPU TDP: 15 Watts

 1480 18:38:15.766579  CPU PL2 = 64 Watts

 1481 18:38:15.769744  PCI: 00:00.0 init finished in 7081 usecs

 1482 18:38:15.772843  PCI: 00:02.0 init ...

 1483 18:38:15.776051  PCI: 00:02.0 init finished in 2245 usecs

 1484 18:38:15.779709  PCI: 00:08.0 init ...

 1485 18:38:15.782768  PCI: 00:08.0 init finished in 2252 usecs

 1486 18:38:15.786454  PCI: 00:12.0 init ...

 1487 18:38:15.789470  PCI: 00:12.0 init finished in 2253 usecs

 1488 18:38:15.792607  PCI: 00:14.0 init ...

 1489 18:38:15.796329  PCI: 00:14.0 init finished in 2253 usecs

 1490 18:38:15.799340  PCI: 00:14.2 init ...

 1491 18:38:15.802459  PCI: 00:14.2 init finished in 2252 usecs

 1492 18:38:15.806160  PCI: 00:14.3 init ...

 1493 18:38:15.809342  PCI: 00:14.3 init finished in 2272 usecs

 1494 18:38:15.812437  PCI: 00:15.0 init ...

 1495 18:38:15.816292  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1496 18:38:15.819241  PCI: 00:15.0 init finished in 5980 usecs

 1497 18:38:15.822816  PCI: 00:15.1 init ...

 1498 18:38:15.825960  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1499 18:38:15.832311  PCI: 00:15.1 init finished in 5978 usecs

 1500 18:38:15.832413  PCI: 00:16.0 init ...

 1501 18:38:15.839098  PCI: 00:16.0 init finished in 2254 usecs

 1502 18:38:15.842256  PCI: 00:19.0 init ...

 1503 18:38:15.845947  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1504 18:38:15.848954  PCI: 00:19.0 init finished in 5977 usecs

 1505 18:38:15.852173  PCI: 00:1d.0 init ...

 1506 18:38:15.855998  Initializing PCH PCIe bridge.

 1507 18:38:15.859048  PCI: 00:1d.0 init finished in 5278 usecs

 1508 18:38:15.862303  PCI: 00:1f.0 init ...

 1509 18:38:15.865514  IOAPIC: Initializing IOAPIC at 0xfec00000

 1510 18:38:15.872430  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1511 18:38:15.872528  IOAPIC: ID = 0x02

 1512 18:38:15.875464  IOAPIC: Dumping registers

 1513 18:38:15.878571    reg 0x0000: 0x02000000

 1514 18:38:15.881870    reg 0x0001: 0x00770020

 1515 18:38:15.881971    reg 0x0002: 0x00000000

 1516 18:38:15.888674  PCI: 00:1f.0 init finished in 23546 usecs

 1517 18:38:15.891930  PCI: 00:1f.4 init ...

 1518 18:38:15.895159  PCI: 00:1f.4 init finished in 2262 usecs

 1519 18:38:15.905777  PCI: 01:00.0 init ...

 1520 18:38:15.908959  PCI: 01:00.0 init finished in 2254 usecs

 1521 18:38:15.913321  PNP: 0c09.0 init ...

 1522 18:38:15.916964  Google Chrome EC uptime: 11.052 seconds

 1523 18:38:15.923108  Google Chrome AP resets since EC boot: 0

 1524 18:38:15.926507  Google Chrome most recent AP reset causes:

 1525 18:38:15.933647  Google Chrome EC reset flags at last EC boot: reset-pin

 1526 18:38:15.936862  PNP: 0c09.0 init finished in 20581 usecs

 1527 18:38:15.940004  Devices initialized

 1528 18:38:15.940098  Show all devs... After init.

 1529 18:38:15.943350  Root Device: enabled 1

 1530 18:38:15.946474  CPU_CLUSTER: 0: enabled 1

 1531 18:38:15.949591  DOMAIN: 0000: enabled 1

 1532 18:38:15.949679  APIC: 00: enabled 1

 1533 18:38:15.953345  PCI: 00:00.0: enabled 1

 1534 18:38:15.956595  PCI: 00:02.0: enabled 1

 1535 18:38:15.959696  PCI: 00:04.0: enabled 0

 1536 18:38:15.959784  PCI: 00:05.0: enabled 0

 1537 18:38:15.962879  PCI: 00:12.0: enabled 1

 1538 18:38:15.966163  PCI: 00:12.5: enabled 0

 1539 18:38:15.969516  PCI: 00:12.6: enabled 0

 1540 18:38:15.969614  PCI: 00:14.0: enabled 1

 1541 18:38:15.973262  PCI: 00:14.1: enabled 0

 1542 18:38:15.976450  PCI: 00:14.3: enabled 1

 1543 18:38:15.979482  PCI: 00:14.5: enabled 0

 1544 18:38:15.979583  PCI: 00:15.0: enabled 1

 1545 18:38:15.982757  PCI: 00:15.1: enabled 1

 1546 18:38:15.985767  PCI: 00:15.2: enabled 0

 1547 18:38:15.989285  PCI: 00:15.3: enabled 0

 1548 18:38:15.989382  PCI: 00:16.0: enabled 1

 1549 18:38:15.992503  PCI: 00:16.1: enabled 0

 1550 18:38:15.996138  PCI: 00:16.2: enabled 0

 1551 18:38:15.996237  PCI: 00:16.3: enabled 0

 1552 18:38:15.999418  PCI: 00:16.4: enabled 0

 1553 18:38:16.002320  PCI: 00:16.5: enabled 0

 1554 18:38:16.005606  PCI: 00:17.0: enabled 1

 1555 18:38:16.005705  PCI: 00:19.0: enabled 1

 1556 18:38:16.009167  PCI: 00:19.1: enabled 0

 1557 18:38:16.012393  PCI: 00:19.2: enabled 0

 1558 18:38:16.016016  PCI: 00:1a.0: enabled 0

 1559 18:38:16.016114  PCI: 00:1c.0: enabled 0

 1560 18:38:16.019055  PCI: 00:1c.1: enabled 0

 1561 18:38:16.022163  PCI: 00:1c.2: enabled 0

 1562 18:38:16.025290  PCI: 00:1c.3: enabled 0

 1563 18:38:16.025389  PCI: 00:1c.4: enabled 0

 1564 18:38:16.029044  PCI: 00:1c.5: enabled 0

 1565 18:38:16.032296  PCI: 00:1c.6: enabled 0

 1566 18:38:16.035544  PCI: 00:1c.7: enabled 0

 1567 18:38:16.035642  PCI: 00:1d.0: enabled 1

 1568 18:38:16.038608  PCI: 00:1d.1: enabled 0

 1569 18:38:16.041796  PCI: 00:1d.2: enabled 0

 1570 18:38:16.045499  PCI: 00:1d.3: enabled 0

 1571 18:38:16.045598  PCI: 00:1d.4: enabled 0

 1572 18:38:16.048711  PCI: 00:1d.5: enabled 0

 1573 18:38:16.051799  PCI: 00:1e.0: enabled 1

 1574 18:38:16.051897  PCI: 00:1e.1: enabled 0

 1575 18:38:16.054950  PCI: 00:1e.2: enabled 1

 1576 18:38:16.058802  PCI: 00:1e.3: enabled 1

 1577 18:38:16.061453  PCI: 00:1f.0: enabled 1

 1578 18:38:16.061551  PCI: 00:1f.1: enabled 0

 1579 18:38:16.065262  PCI: 00:1f.2: enabled 0

 1580 18:38:16.068334  PCI: 00:1f.3: enabled 1

 1581 18:38:16.071551  PCI: 00:1f.4: enabled 1

 1582 18:38:16.071649  PCI: 00:1f.5: enabled 1

 1583 18:38:16.075366  PCI: 00:1f.6: enabled 0

 1584 18:38:16.078337  USB0 port 0: enabled 1

 1585 18:38:16.078424  I2C: 01:15: enabled 1

 1586 18:38:16.081481  I2C: 02:5d: enabled 1

 1587 18:38:16.084750  GENERIC: 0.0: enabled 1

 1588 18:38:16.087972  I2C: 03:1a: enabled 1

 1589 18:38:16.088071  I2C: 03:38: enabled 1

 1590 18:38:16.091690  I2C: 03:39: enabled 1

 1591 18:38:16.094891  I2C: 03:3a: enabled 1

 1592 18:38:16.094990  I2C: 03:3b: enabled 1

 1593 18:38:16.098039  PCI: 00:00.0: enabled 1

 1594 18:38:16.101184  SPI: 00: enabled 1

 1595 18:38:16.101283  SPI: 01: enabled 1

 1596 18:38:16.104442  PNP: 0c09.0: enabled 1

 1597 18:38:16.107729  USB2 port 0: enabled 1

 1598 18:38:16.107828  USB2 port 1: enabled 1

 1599 18:38:16.111486  USB2 port 2: enabled 0

 1600 18:38:16.114704  USB2 port 3: enabled 0

 1601 18:38:16.114802  USB2 port 5: enabled 0

 1602 18:38:16.117909  USB2 port 6: enabled 1

 1603 18:38:16.120897  USB2 port 9: enabled 1

 1604 18:38:16.124664  USB3 port 0: enabled 1

 1605 18:38:16.124763  USB3 port 1: enabled 1

 1606 18:38:16.127749  USB3 port 2: enabled 1

 1607 18:38:16.131015  USB3 port 3: enabled 1

 1608 18:38:16.131121  USB3 port 4: enabled 0

 1609 18:38:16.134350  APIC: 02: enabled 1

 1610 18:38:16.137520  APIC: 01: enabled 1

 1611 18:38:16.137619  APIC: 03: enabled 1

 1612 18:38:16.140878  APIC: 05: enabled 1

 1613 18:38:16.140976  APIC: 04: enabled 1

 1614 18:38:16.144102  APIC: 06: enabled 1

 1615 18:38:16.147697  APIC: 07: enabled 1

 1616 18:38:16.147796  PCI: 00:08.0: enabled 1

 1617 18:38:16.150884  PCI: 00:14.2: enabled 1

 1618 18:38:16.154011  PCI: 01:00.0: enabled 1

 1619 18:38:16.157233  Disabling ACPI via APMC:

 1620 18:38:16.161234  done.

 1621 18:38:16.164351  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1622 18:38:16.167573  ELOG: NV offset 0xaf0000 size 0x4000

 1623 18:38:16.175298  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1624 18:38:16.181646  ELOG: Event(17) added with size 13 at 2023-02-25 18:38:15 UTC

 1625 18:38:16.188441  ELOG: Event(92) added with size 9 at 2023-02-25 18:38:15 UTC

 1626 18:38:16.195110  ELOG: Event(93) added with size 9 at 2023-02-25 18:38:15 UTC

 1627 18:38:16.201421  ELOG: Event(9A) added with size 9 at 2023-02-25 18:38:15 UTC

 1628 18:38:16.208207  ELOG: Event(9E) added with size 10 at 2023-02-25 18:38:15 UTC

 1629 18:38:16.214382  ELOG: Event(9F) added with size 14 at 2023-02-25 18:38:15 UTC

 1630 18:38:16.218050  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1631 18:38:16.225660  ELOG: Event(A1) added with size 10 at 2023-02-25 18:38:16 UTC

 1632 18:38:16.235527  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1633 18:38:16.241785  ELOG: Event(A0) added with size 9 at 2023-02-25 18:38:16 UTC

 1634 18:38:16.244981  elog_add_boot_reason: Logged dev mode boot

 1635 18:38:16.248713  Finalize devices...

 1636 18:38:16.248810  PCI: 00:17.0 final

 1637 18:38:16.251767  Devices finalized

 1638 18:38:16.254956  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1639 18:38:16.261814  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1640 18:38:16.265045  ME: HFSTS1                  : 0x90000245

 1641 18:38:16.268138  ME: HFSTS2                  : 0x3B850126

 1642 18:38:16.275014  ME: HFSTS3                  : 0x00000020

 1643 18:38:16.278324  ME: HFSTS4                  : 0x00004800

 1644 18:38:16.281520  ME: HFSTS5                  : 0x00000000

 1645 18:38:16.284562  ME: HFSTS6                  : 0x40400006

 1646 18:38:16.288361  ME: Manufacturing Mode      : NO

 1647 18:38:16.291658  ME: FW Partition Table      : OK

 1648 18:38:16.294726  ME: Bringup Loader Failure  : NO

 1649 18:38:16.298419  ME: Firmware Init Complete  : YES

 1650 18:38:16.301527  ME: Boot Options Present    : NO

 1651 18:38:16.304825  ME: Update In Progress      : NO

 1652 18:38:16.307999  ME: D0i3 Support            : YES

 1653 18:38:16.311727  ME: Low Power State Enabled : NO

 1654 18:38:16.314782  ME: CPU Replaced            : NO

 1655 18:38:16.317789  ME: CPU Replacement Valid   : YES

 1656 18:38:16.321428  ME: Current Working State   : 5

 1657 18:38:16.324563  ME: Current Operation State : 1

 1658 18:38:16.328169  ME: Current Operation Mode  : 0

 1659 18:38:16.331240  ME: Error Code              : 0

 1660 18:38:16.334364  ME: CPU Debug Disabled      : YES

 1661 18:38:16.338088  ME: TXT Support             : NO

 1662 18:38:16.344536  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1663 18:38:16.350879  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1664 18:38:16.350975  CBFS @ c08000 size 3f8000

 1665 18:38:16.357854  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1666 18:38:16.361084  CBFS: Locating 'fallback/dsdt.aml'

 1667 18:38:16.364270  CBFS: Found @ offset 10bb80 size 3fa5

 1668 18:38:16.370754  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1669 18:38:16.374398  CBFS @ c08000 size 3f8000

 1670 18:38:16.377581  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1671 18:38:16.380751  CBFS: Locating 'fallback/slic'

 1672 18:38:16.386141  CBFS: 'fallback/slic' not found.

 1673 18:38:16.392435  ACPI: Writing ACPI tables at 99b3e000.

 1674 18:38:16.392527  ACPI:    * FACS

 1675 18:38:16.396116  ACPI:    * DSDT

 1676 18:38:16.399163  Ramoops buffer: 0x100000@0x99a3d000.

 1677 18:38:16.402429  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1678 18:38:16.409251  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1679 18:38:16.412487  Google Chrome EC: version:

 1680 18:38:16.415649  	ro: helios_v2.0.2659-56403530b

 1681 18:38:16.418674  	rw: helios_v2.0.2849-c41de27e7d

 1682 18:38:16.418759    running image: 1

 1683 18:38:16.423584  ACPI:    * FADT

 1684 18:38:16.423675  SCI is IRQ9

 1685 18:38:16.429738  ACPI: added table 1/32, length now 40

 1686 18:38:16.429835  ACPI:     * SSDT

 1687 18:38:16.433297  Found 1 CPU(s) with 8 core(s) each.

 1688 18:38:16.436375  Error: Could not locate 'wifi_sar' in VPD.

 1689 18:38:16.443153  Checking CBFS for default SAR values

 1690 18:38:16.446392  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1691 18:38:16.450146  CBFS @ c08000 size 3f8000

 1692 18:38:16.456329  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1693 18:38:16.459638  CBFS: Locating 'wifi_sar_defaults.hex'

 1694 18:38:16.462816  CBFS: Found @ offset 5fac0 size 77

 1695 18:38:16.466472  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1696 18:38:16.473254  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1697 18:38:16.476488  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1698 18:38:16.482684  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1699 18:38:16.485927  failed to find key in VPD: dsm_calib_r0_0

 1700 18:38:16.495996  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1701 18:38:16.499615  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1702 18:38:16.502734  failed to find key in VPD: dsm_calib_r0_1

 1703 18:38:16.512593  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1704 18:38:16.519421  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1705 18:38:16.522551  failed to find key in VPD: dsm_calib_r0_2

 1706 18:38:16.532694  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1707 18:38:16.535909  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1708 18:38:16.542602  failed to find key in VPD: dsm_calib_r0_3

 1709 18:38:16.548759  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1710 18:38:16.555608  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1711 18:38:16.558737  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1712 18:38:16.565603  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1713 18:38:16.568619  EC returned error result code 1

 1714 18:38:16.572505  EC returned error result code 1

 1715 18:38:16.575645  EC returned error result code 1

 1716 18:38:16.579298  PS2K: Bad resp from EC. Vivaldi disabled!

 1717 18:38:16.585517  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1718 18:38:16.592416  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1719 18:38:16.595618  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1720 18:38:16.602589  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1721 18:38:16.605823  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1722 18:38:16.611822  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1723 18:38:16.618758  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1724 18:38:16.625470  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1725 18:38:16.628645  ACPI: added table 2/32, length now 44

 1726 18:38:16.628735  ACPI:    * MCFG

 1727 18:38:16.634843  ACPI: added table 3/32, length now 48

 1728 18:38:16.634930  ACPI:    * TPM2

 1729 18:38:16.638558  TPM2 log created at 99a2d000

 1730 18:38:16.641712  ACPI: added table 4/32, length now 52

 1731 18:38:16.644891  ACPI:    * MADT

 1732 18:38:16.644976  SCI is IRQ9

 1733 18:38:16.647995  ACPI: added table 5/32, length now 56

 1734 18:38:16.651827  current = 99b43ac0

 1735 18:38:16.651915  ACPI:    * DMAR

 1736 18:38:16.654890  ACPI: added table 6/32, length now 60

 1737 18:38:16.658101  ACPI:    * IGD OpRegion

 1738 18:38:16.661098  GMA: Found VBT in CBFS

 1739 18:38:16.664812  GMA: Found valid VBT in CBFS

 1740 18:38:16.667936  ACPI: added table 7/32, length now 64

 1741 18:38:16.668035  ACPI:    * HPET

 1742 18:38:16.674352  ACPI: added table 8/32, length now 68

 1743 18:38:16.674450  ACPI: done.

 1744 18:38:16.678031  ACPI tables: 31744 bytes.

 1745 18:38:16.681182  smbios_write_tables: 99a2c000

 1746 18:38:16.685046  EC returned error result code 3

 1747 18:38:16.688244  Couldn't obtain OEM name from CBI

 1748 18:38:16.691290  Create SMBIOS type 17

 1749 18:38:16.694449  PCI: 00:00.0 (Intel Cannonlake)

 1750 18:38:16.694547  PCI: 00:14.3 (Intel WiFi)

 1751 18:38:16.698255  SMBIOS tables: 939 bytes.

 1752 18:38:16.701371  Writing table forward entry at 0x00000500

 1753 18:38:16.707533  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1754 18:38:16.711144  Writing coreboot table at 0x99b62000

 1755 18:38:16.717367   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1756 18:38:16.724437   1. 0000000000001000-000000000009ffff: RAM

 1757 18:38:16.727498   2. 00000000000a0000-00000000000fffff: RESERVED

 1758 18:38:16.731124   3. 0000000000100000-0000000099a2bfff: RAM

 1759 18:38:16.737794   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1760 18:38:16.743962   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1761 18:38:16.747786   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1762 18:38:16.754210   7. 000000009a000000-000000009f7fffff: RESERVED

 1763 18:38:16.757293   8. 00000000e0000000-00000000efffffff: RESERVED

 1764 18:38:16.764399   9. 00000000fc000000-00000000fc000fff: RESERVED

 1765 18:38:16.767151  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1766 18:38:16.773699  11. 00000000fed10000-00000000fed17fff: RESERVED

 1767 18:38:16.777017  12. 00000000fed80000-00000000fed83fff: RESERVED

 1768 18:38:16.780122  13. 00000000fed90000-00000000fed91fff: RESERVED

 1769 18:38:16.786875  14. 00000000feda0000-00000000feda1fff: RESERVED

 1770 18:38:16.790064  15. 0000000100000000-000000045e7fffff: RAM

 1771 18:38:16.796931  Graphics framebuffer located at 0xc0000000

 1772 18:38:16.797030  Passing 5 GPIOs to payload:

 1773 18:38:16.803054              NAME |       PORT | POLARITY |     VALUE

 1774 18:38:16.810007     write protect |  undefined |     high |       low

 1775 18:38:16.813546               lid |  undefined |     high |      high

 1776 18:38:16.819780             power |  undefined |     high |       low

 1777 18:38:16.822896             oprom |  undefined |     high |       low

 1778 18:38:16.829747          EC in RW | 0x000000cb |     high |       low

 1779 18:38:16.829854  Board ID: 4

 1780 18:38:16.835992  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1781 18:38:16.839642  CBFS @ c08000 size 3f8000

 1782 18:38:16.842737  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1783 18:38:16.849548  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264

 1784 18:38:16.852704  coreboot table: 1492 bytes.

 1785 18:38:16.855821  IMD ROOT    0. 99fff000 00001000

 1786 18:38:16.859045  IMD SMALL   1. 99ffe000 00001000

 1787 18:38:16.862944  FSP MEMORY  2. 99c4e000 003b0000

 1788 18:38:16.866070  CONSOLE     3. 99c2e000 00020000

 1789 18:38:16.869106  FMAP        4. 99c2d000 0000054e

 1790 18:38:16.872956  TIME STAMP  5. 99c2c000 00000910

 1791 18:38:16.876095  VBOOT WORK  6. 99c18000 00014000

 1792 18:38:16.879313  MRC DATA    7. 99c16000 00001958

 1793 18:38:16.882285  ROMSTG STCK 8. 99c15000 00001000

 1794 18:38:16.885989  AFTER CAR   9. 99c0b000 0000a000

 1795 18:38:16.889216  RAMSTAGE   10. 99baf000 0005c000

 1796 18:38:16.892349  REFCODE    11. 99b7a000 00035000

 1797 18:38:16.896165  SMM BACKUP 12. 99b6a000 00010000

 1798 18:38:16.899415  COREBOOT   13. 99b62000 00008000

 1799 18:38:16.902461  ACPI       14. 99b3e000 00024000

 1800 18:38:16.905626  ACPI GNVS  15. 99b3d000 00001000

 1801 18:38:16.909323  RAMOOPS    16. 99a3d000 00100000

 1802 18:38:16.912601  TPM2 TCGLOG17. 99a2d000 00010000

 1803 18:38:16.915761  SMBIOS     18. 99a2c000 00000800

 1804 18:38:16.918875  IMD small region:

 1805 18:38:16.922638    IMD ROOT    0. 99ffec00 00000400

 1806 18:38:16.925761    FSP RUNTIME 1. 99ffebe0 00000004

 1807 18:38:16.928810    EC HOSTEVENT 2. 99ffebc0 00000008

 1808 18:38:16.932595    POWER STATE 3. 99ffeb80 00000040

 1809 18:38:16.935684    ROMSTAGE    4. 99ffeb60 00000004

 1810 18:38:16.938897    MEM INFO    5. 99ffe9a0 000001b9

 1811 18:38:16.941965    VPD         6. 99ffe920 0000006c

 1812 18:38:16.945732  MTRR: Physical address space:

 1813 18:38:16.951915  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1814 18:38:16.958855  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1815 18:38:16.965063  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1816 18:38:16.972092  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1817 18:38:16.978296  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1818 18:38:16.981482  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1819 18:38:16.988347  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1820 18:38:16.994727  MTRR: Fixed MSR 0x250 0x0606060606060606

 1821 18:38:16.998521  MTRR: Fixed MSR 0x258 0x0606060606060606

 1822 18:38:17.001698  MTRR: Fixed MSR 0x259 0x0000000000000000

 1823 18:38:17.004848  MTRR: Fixed MSR 0x268 0x0606060606060606

 1824 18:38:17.011699  MTRR: Fixed MSR 0x269 0x0606060606060606

 1825 18:38:17.014956  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1826 18:38:17.017965  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1827 18:38:17.021741  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1828 18:38:17.027953  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1829 18:38:17.031755  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1830 18:38:17.034633  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1831 18:38:17.038201  call enable_fixed_mtrr()

 1832 18:38:17.041350  CPU physical address size: 39 bits

 1833 18:38:17.044314  MTRR: default type WB/UC MTRR counts: 6/8.

 1834 18:38:17.047951  MTRR: WB selected as default type.

 1835 18:38:17.054267  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1836 18:38:17.061270  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1837 18:38:17.067439  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1838 18:38:17.074467  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1839 18:38:17.080775  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1840 18:38:17.087652  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1841 18:38:17.087751  

 1842 18:38:17.087829  MTRR check

 1843 18:38:17.090895  Fixed MTRRs   : Enabled

 1844 18:38:17.093991  Variable MTRRs: Enabled

 1845 18:38:17.094089  

 1846 18:38:17.097051  MTRR: Fixed MSR 0x250 0x0606060606060606

 1847 18:38:17.100567  MTRR: Fixed MSR 0x258 0x0606060606060606

 1848 18:38:17.107523  MTRR: Fixed MSR 0x259 0x0000000000000000

 1849 18:38:17.110567  MTRR: Fixed MSR 0x268 0x0606060606060606

 1850 18:38:17.113803  MTRR: Fixed MSR 0x269 0x0606060606060606

 1851 18:38:17.117415  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1852 18:38:17.123693  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1853 18:38:17.127323  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1854 18:38:17.130449  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1855 18:38:17.133548  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1856 18:38:17.140296  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1857 18:38:17.143332  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1858 18:38:17.146993  call enable_fixed_mtrr()

 1859 18:38:17.153722  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1860 18:38:17.156983  CPU physical address size: 39 bits

 1861 18:38:17.160208  CBFS @ c08000 size 3f8000

 1862 18:38:17.163350  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1863 18:38:17.167337  CBFS: Locating 'fallback/payload'

 1864 18:38:17.173388  MTRR: Fixed MSR 0x250 0x0606060606060606

 1865 18:38:17.177153  MTRR: Fixed MSR 0x250 0x0606060606060606

 1866 18:38:17.180231  MTRR: Fixed MSR 0x258 0x0606060606060606

 1867 18:38:17.183228  MTRR: Fixed MSR 0x259 0x0000000000000000

 1868 18:38:17.190145  MTRR: Fixed MSR 0x268 0x0606060606060606

 1869 18:38:17.193528  MTRR: Fixed MSR 0x269 0x0606060606060606

 1870 18:38:17.196543  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1871 18:38:17.199794  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1872 18:38:17.206705  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1873 18:38:17.209871  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1874 18:38:17.212953  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1875 18:38:17.216061  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1876 18:38:17.222851  MTRR: Fixed MSR 0x258 0x0606060606060606

 1877 18:38:17.222945  call enable_fixed_mtrr()

 1878 18:38:17.229762  MTRR: Fixed MSR 0x259 0x0000000000000000

 1879 18:38:17.232817  MTRR: Fixed MSR 0x268 0x0606060606060606

 1880 18:38:17.236426  MTRR: Fixed MSR 0x269 0x0606060606060606

 1881 18:38:17.239418  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1882 18:38:17.246317  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1883 18:38:17.249341  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1884 18:38:17.252456  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1885 18:38:17.256121  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1886 18:38:17.259358  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1887 18:38:17.265587  CPU physical address size: 39 bits

 1888 18:38:17.269517  call enable_fixed_mtrr()

 1889 18:38:17.272471  MTRR: Fixed MSR 0x250 0x0606060606060606

 1890 18:38:17.275733  MTRR: Fixed MSR 0x250 0x0606060606060606

 1891 18:38:17.278878  MTRR: Fixed MSR 0x258 0x0606060606060606

 1892 18:38:17.282672  MTRR: Fixed MSR 0x259 0x0000000000000000

 1893 18:38:17.289018  MTRR: Fixed MSR 0x268 0x0606060606060606

 1894 18:38:17.292081  MTRR: Fixed MSR 0x269 0x0606060606060606

 1895 18:38:17.295891  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1896 18:38:17.298927  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1897 18:38:17.305730  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1898 18:38:17.308937  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1899 18:38:17.311933  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1900 18:38:17.315765  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1901 18:38:17.322093  MTRR: Fixed MSR 0x258 0x0606060606060606

 1902 18:38:17.325197  MTRR: Fixed MSR 0x259 0x0000000000000000

 1903 18:38:17.328335  MTRR: Fixed MSR 0x268 0x0606060606060606

 1904 18:38:17.331916  MTRR: Fixed MSR 0x269 0x0606060606060606

 1905 18:38:17.338751  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1906 18:38:17.341744  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1907 18:38:17.345293  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1908 18:38:17.348422  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1909 18:38:17.355127  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1910 18:38:17.358374  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1911 18:38:17.361395  call enable_fixed_mtrr()

 1912 18:38:17.361494  call enable_fixed_mtrr()

 1913 18:38:17.368389  CPU physical address size: 39 bits

 1914 18:38:17.371507  CPU physical address size: 39 bits

 1915 18:38:17.375179  CBFS: Found @ offset 1c96c0 size 3f798

 1916 18:38:17.378336  MTRR: Fixed MSR 0x250 0x0606060606060606

 1917 18:38:17.381470  MTRR: Fixed MSR 0x250 0x0606060606060606

 1918 18:38:17.388341  MTRR: Fixed MSR 0x258 0x0606060606060606

 1919 18:38:17.391476  MTRR: Fixed MSR 0x259 0x0000000000000000

 1920 18:38:17.394619  MTRR: Fixed MSR 0x268 0x0606060606060606

 1921 18:38:17.397733  MTRR: Fixed MSR 0x269 0x0606060606060606

 1922 18:38:17.404699  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1923 18:38:17.407774  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1924 18:38:17.411005  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1925 18:38:17.414690  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1926 18:38:17.420819  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1927 18:38:17.424524  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1928 18:38:17.427664  MTRR: Fixed MSR 0x258 0x0606060606060606

 1929 18:38:17.430775  call enable_fixed_mtrr()

 1930 18:38:17.433988  MTRR: Fixed MSR 0x259 0x0000000000000000

 1931 18:38:17.437835  MTRR: Fixed MSR 0x268 0x0606060606060606

 1932 18:38:17.444093  MTRR: Fixed MSR 0x269 0x0606060606060606

 1933 18:38:17.447578  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1934 18:38:17.450716  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1935 18:38:17.454450  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1936 18:38:17.460422  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1937 18:38:17.464221  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1938 18:38:17.467436  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1939 18:38:17.470581  CPU physical address size: 39 bits

 1940 18:38:17.473694  call enable_fixed_mtrr()

 1941 18:38:17.477360  CPU physical address size: 39 bits

 1942 18:38:17.480395  CPU physical address size: 39 bits

 1943 18:38:17.487257  Checking segment from ROM address 0xffdd16f8

 1944 18:38:17.490488  Checking segment from ROM address 0xffdd1714

 1945 18:38:17.493568  Loading segment from ROM address 0xffdd16f8

 1946 18:38:17.496686    code (compression=0)

 1947 18:38:17.506667    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1948 18:38:17.513607  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1949 18:38:17.516823  it's not compressed!

 1950 18:38:17.608428  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1951 18:38:17.614637  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1952 18:38:17.617770  Loading segment from ROM address 0xffdd1714

 1953 18:38:17.621377    Entry Point 0x30000000

 1954 18:38:17.624556  Loaded segments

 1955 18:38:17.630001  Finalizing chipset.

 1956 18:38:17.633321  Finalizing SMM.

 1957 18:38:17.637014  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 1958 18:38:17.640184  mp_park_aps done after 0 msecs.

 1959 18:38:17.646976  Jumping to boot code at 30000000(99b62000)

 1960 18:38:17.653115  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 1961 18:38:17.653213  

 1962 18:38:17.653297  

 1963 18:38:17.653369  

 1964 18:38:17.656226  Starting depthcharge on Helios...

 1965 18:38:17.656325  

 1966 18:38:17.656708  end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
 1967 18:38:17.656829  start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
 1968 18:38:17.656931  Setting prompt string to ['hatch:']
 1969 18:38:17.657026  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
 1970 18:38:17.666560  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1971 18:38:17.666658  

 1972 18:38:17.672927  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1973 18:38:17.673024  

 1974 18:38:17.679149  board_setup: Info: eMMC controller not present; skipping

 1975 18:38:17.679255  

 1976 18:38:17.682988  New NVMe Controller 0x30053ac0 @ 00:1d:00

 1977 18:38:17.683071  

 1978 18:38:17.689163  board_setup: Info: SDHCI controller not present; skipping

 1979 18:38:17.689260  

 1980 18:38:17.696046  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 1981 18:38:17.696135  

 1982 18:38:17.696210  Wipe memory regions:

 1983 18:38:17.696281  

 1984 18:38:17.699242  	[0x00000000001000, 0x000000000a0000)

 1985 18:38:17.702378  

 1986 18:38:17.705634  	[0x00000000100000, 0x00000030000000)

 1987 18:38:17.769565  

 1988 18:38:17.772772  	[0x00000030657430, 0x00000099a2c000)

 1989 18:38:17.919052  

 1990 18:38:17.922252  	[0x00000100000000, 0x0000045e800000)

 1991 18:38:19.378213  

 1992 18:38:19.378371  R8152: Initializing

 1993 18:38:19.378452  

 1994 18:38:19.381309  Version 9 (ocp_data = 6010)

 1995 18:38:19.385721  

 1996 18:38:19.385819  R8152: Done initializing

 1997 18:38:19.385897  

 1998 18:38:19.389314  Adding net device

 1999 18:38:19.871497  

 2000 18:38:19.871651  R8152: Initializing

 2001 18:38:19.871735  

 2002 18:38:19.875211  Version 6 (ocp_data = 5c30)

 2003 18:38:19.875308  

 2004 18:38:19.878359  R8152: Done initializing

 2005 18:38:19.878450  

 2006 18:38:19.885327  net_add_device: Attemp to include the same device

 2007 18:38:19.885446  

 2008 18:38:19.892142  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2009 18:38:19.892271  

 2010 18:38:19.892375  

 2011 18:38:19.892471  

 2012 18:38:19.892821  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2014 18:38:19.993473  hatch: tftpboot 192.168.201.1 9334748/tftp-deploy-8b8az48x/kernel/bzImage 9334748/tftp-deploy-8b8az48x/kernel/cmdline 9334748/tftp-deploy-8b8az48x/ramdisk/ramdisk.cpio.gz

 2015 18:38:19.993645  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2016 18:38:19.993741  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
 2017 18:38:19.998159  tftpboot 192.168.201.1 9334748/tftp-deploy-8b8az48x/kernel/bzImoy-8b8az48x/kernel/cmdline 9334748/tftp-deploy-8b8az48x/ramdisk/ramdisk.cpio.gz

 2018 18:38:19.998262  

 2019 18:38:19.998344  Waiting for link

 2020 18:38:20.198964  

 2021 18:38:20.199184  done.

 2022 18:38:20.199330  

 2023 18:38:20.199458  MAC: 00:24:32:50:1a:59

 2024 18:38:20.199577  

 2025 18:38:20.202082  Sending DHCP discover... done.

 2026 18:38:20.202215  

 2027 18:38:20.205786  Waiting for reply... done.

 2028 18:38:20.205928  

 2029 18:38:20.208940  Sending DHCP request... done.

 2030 18:38:20.209074  

 2031 18:38:20.212024  Waiting for reply... done.

 2032 18:38:20.212165  

 2033 18:38:20.215809  My ip is 192.168.201.14

 2034 18:38:20.215924  

 2035 18:38:20.218839  The DHCP server ip is 192.168.201.1

 2036 18:38:20.218969  

 2037 18:38:20.221939  TFTP server IP predefined by user: 192.168.201.1

 2038 18:38:20.222066  

 2039 18:38:20.229040  Bootfile predefined by user: 9334748/tftp-deploy-8b8az48x/kernel/bzImage

 2040 18:38:20.229185  

 2041 18:38:20.232353  Sending tftp read request... done.

 2042 18:38:20.232497  

 2043 18:38:20.238607  Waiting for the transfer... 

 2044 18:38:20.238781  

 2045 18:38:20.779007  00000000 ################################################################

 2046 18:38:20.779224  

 2047 18:38:21.306300  00080000 ################################################################

 2048 18:38:21.306450  

 2049 18:38:21.823300  00100000 ################################################################

 2050 18:38:21.823469  

 2051 18:38:22.342081  00180000 ################################################################

 2052 18:38:22.342232  

 2053 18:38:22.870116  00200000 ################################################################

 2054 18:38:22.870280  

 2055 18:38:23.393899  00280000 ################################################################

 2056 18:38:23.394059  

 2057 18:38:23.913819  00300000 ################################################################

 2058 18:38:23.913973  

 2059 18:38:24.433553  00380000 ################################################################

 2060 18:38:24.433707  

 2061 18:38:24.958661  00400000 ################################################################

 2062 18:38:24.958813  

 2063 18:38:25.483183  00480000 ################################################################

 2064 18:38:25.483342  

 2065 18:38:26.005374  00500000 ################################################################

 2066 18:38:26.005529  

 2067 18:38:26.532122  00580000 ################################################################

 2068 18:38:26.532281  

 2069 18:38:27.051372  00600000 ################################################################

 2070 18:38:27.051527  

 2071 18:38:27.573224  00680000 ################################################################

 2072 18:38:27.573375  

 2073 18:38:28.106784  00700000 ################################################################

 2074 18:38:28.106938  

 2075 18:38:28.663987  00780000 ################################################################

 2076 18:38:28.664144  

 2077 18:38:29.224905  00800000 ################################################################

 2078 18:38:29.225073  

 2079 18:38:29.770254  00880000 ################################################################

 2080 18:38:29.770429  

 2081 18:38:30.042245  00900000 ################################## done.

 2082 18:38:30.042409  

 2083 18:38:30.045277  The bootfile was 9711616 bytes long.

 2084 18:38:30.045379  

 2085 18:38:30.048486  Sending tftp read request... done.

 2086 18:38:30.048577  

 2087 18:38:30.051723  Waiting for the transfer... 

 2088 18:38:30.051828  

 2089 18:38:30.608692  00000000 ################################################################

 2090 18:38:30.608854  

 2091 18:38:31.183966  00080000 ################################################################

 2092 18:38:31.184142  

 2093 18:38:31.768880  00100000 ################################################################

 2094 18:38:31.769036  

 2095 18:38:32.393516  00180000 ################################################################

 2096 18:38:32.394057  

 2097 18:38:33.050330  00200000 ################################################################

 2098 18:38:33.050856  

 2099 18:38:33.682436  00280000 ################################################################

 2100 18:38:33.682587  

 2101 18:38:34.244690  00300000 ################################################################

 2102 18:38:34.244852  

 2103 18:38:34.873658  00380000 ################################################################

 2104 18:38:34.874182  

 2105 18:38:35.494722  00400000 ################################################################

 2106 18:38:35.494878  

 2107 18:38:36.077798  00480000 ################################################################

 2108 18:38:36.077951  

 2109 18:38:36.710608  00500000 ################################################################

 2110 18:38:36.711194  

 2111 18:38:37.396354  00580000 ################################################################

 2112 18:38:37.396922  

 2113 18:38:38.073278  00600000 ################################################################

 2114 18:38:38.073834  

 2115 18:38:38.738218  00680000 ################################################################

 2116 18:38:38.738529  

 2117 18:38:39.369155  00700000 ################################################################

 2118 18:38:39.369712  

 2119 18:38:40.049252  00780000 ################################################################

 2120 18:38:40.049821  

 2121 18:38:40.305544  00800000 ######################## done.

 2122 18:38:40.306121  

 2123 18:38:40.308573  Sending tftp read request... done.

 2124 18:38:40.309056  

 2125 18:38:40.312044  Waiting for the transfer... 

 2126 18:38:40.312510  

 2127 18:38:40.312885  00000000 # done.

 2128 18:38:40.313274  

 2129 18:38:40.321968  Command line loaded dynamically from TFTP file: 9334748/tftp-deploy-8b8az48x/kernel/cmdline

 2130 18:38:40.322493  

 2131 18:38:40.338423  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2132 18:38:40.338882  

 2133 18:38:40.345164  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2134 18:38:40.349602  

 2135 18:38:40.353073  Shutting down all USB controllers.

 2136 18:38:40.353518  

 2137 18:38:40.353871  Removing current net device

 2138 18:38:40.356613  

 2139 18:38:40.357087  Finalizing coreboot

 2140 18:38:40.357451  

 2141 18:38:40.363355  Exiting depthcharge with code 4 at timestamp: 30059633

 2142 18:38:40.363804  

 2143 18:38:40.364164  

 2144 18:38:40.364500  Starting kernel ...

 2145 18:38:40.364822  

 2146 18:38:40.366078  end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
 2147 18:38:40.366567  start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
 2148 18:38:40.366954  Setting prompt string to ['Linux version [0-9]']
 2149 18:38:40.367355  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2150 18:38:40.367730  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2151 18:38:40.368615  

 2153 18:42:57.367452  end: 2.2.5 auto-login-action (duration 00:04:17) [common]
 2155 18:42:57.368502  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
 2157 18:42:57.369287  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2160 18:42:57.370639  end: 2 depthcharge-action (duration 00:05:00) [common]
 2162 18:42:57.371781  Cleaning after the job
 2163 18:42:57.372202  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334748/tftp-deploy-8b8az48x/ramdisk
 2164 18:42:57.375193  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334748/tftp-deploy-8b8az48x/kernel
 2165 18:42:57.378203  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334748/tftp-deploy-8b8az48x/modules
 2166 18:42:57.379180  start: 5.1 power-off (timeout 00:00:30) [common]
 2167 18:42:57.379961  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2168 18:42:59.602847  >> Command sent successfully.

 2169 18:42:59.612690  Returned 0 in 2 seconds
 2170 18:42:59.714304  end: 5.1 power-off (duration 00:00:02) [common]
 2172 18:42:59.715738  start: 5.2 read-feedback (timeout 00:09:58) [common]
 2173 18:42:59.716886  Listened to connection for namespace 'common' for up to 1s
 2175 18:42:59.718276  Listened to connection for namespace 'common' for up to 1s
 2176 18:43:00.719364  Finalising connection for namespace 'common'
 2177 18:43:00.720003  Disconnecting from shell: Finalise
 2178 18:43:00.720411  
 2179 18:43:00.821761  end: 5.2 read-feedback (duration 00:00:01) [common]
 2180 18:43:00.822350  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9334748
 2181 18:43:00.846292  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9334748
 2182 18:43:00.846949  JobError: Your job cannot terminate cleanly.