Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 18:37:44.722338 lava-dispatcher, installed at version: 2022.11
2 18:37:44.722573 start: 0 validate
3 18:37:44.722718 Start time: 2023-02-25 18:37:44.722711+00:00 (UTC)
4 18:37:44.722851 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:37:44.722982 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230217.0%2Fx86%2Frootfs.cpio.gz exists
6 18:37:45.015216 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:37:45.015388 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:37:45.019394 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:37:45.019524 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 18:37:45.022443 validate duration: 0.30
12 18:37:45.022713 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:37:45.022830 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:37:45.022933 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:37:45.023033 Not decompressing ramdisk as can be used compressed.
16 18:37:45.023224 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230217.0/x86/rootfs.cpio.gz
17 18:37:45.023304 saving as /var/lib/lava/dispatcher/tmp/9334739/tftp-deploy-y__mnh03/ramdisk/rootfs.cpio.gz
18 18:37:45.023371 total size: 8423658 (8MB)
19 18:37:45.033949 progress 0% (0MB)
20 18:37:45.048303 progress 5% (0MB)
21 18:37:45.062905 progress 10% (0MB)
22 18:37:45.073419 progress 15% (1MB)
23 18:37:45.084971 progress 20% (1MB)
24 18:37:45.094927 progress 25% (2MB)
25 18:37:45.107826 progress 30% (2MB)
26 18:37:45.117611 progress 35% (2MB)
27 18:37:45.128201 progress 40% (3MB)
28 18:37:45.141599 progress 45% (3MB)
29 18:37:45.154249 progress 50% (4MB)
30 18:37:45.163478 progress 55% (4MB)
31 18:37:45.168861 progress 60% (4MB)
32 18:37:45.175119 progress 65% (5MB)
33 18:37:45.182225 progress 70% (5MB)
34 18:37:45.187974 progress 75% (6MB)
35 18:37:45.194998 progress 80% (6MB)
36 18:37:45.200790 progress 85% (6MB)
37 18:37:45.207889 progress 90% (7MB)
38 18:37:45.214042 progress 95% (7MB)
39 18:37:45.223468 progress 100% (8MB)
40 18:37:45.223656 8MB downloaded in 0.20s (40.11MB/s)
41 18:37:45.223825 end: 1.1.1 http-download (duration 00:00:00) [common]
43 18:37:45.224082 end: 1.1 download-retry (duration 00:00:00) [common]
44 18:37:45.224175 start: 1.2 download-retry (timeout 00:10:00) [common]
45 18:37:45.224267 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 18:37:45.224378 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 18:37:45.224450 saving as /var/lib/lava/dispatcher/tmp/9334739/tftp-deploy-y__mnh03/kernel/bzImage
48 18:37:45.224514 total size: 9711616 (9MB)
49 18:37:45.224576 No compression specified
50 18:37:45.226679 progress 0% (0MB)
51 18:37:45.235308 progress 5% (0MB)
52 18:37:45.245247 progress 10% (0MB)
53 18:37:45.253931 progress 15% (1MB)
54 18:37:45.261182 progress 20% (1MB)
55 18:37:45.265198 progress 25% (2MB)
56 18:37:45.269044 progress 30% (2MB)
57 18:37:45.273264 progress 35% (3MB)
58 18:37:45.277305 progress 40% (3MB)
59 18:37:45.281527 progress 45% (4MB)
60 18:37:45.285775 progress 50% (4MB)
61 18:37:45.289993 progress 55% (5MB)
62 18:37:45.294216 progress 60% (5MB)
63 18:37:45.298061 progress 65% (6MB)
64 18:37:45.303626 progress 70% (6MB)
65 18:37:45.308409 progress 75% (6MB)
66 18:37:45.312626 progress 80% (7MB)
67 18:37:45.316682 progress 85% (7MB)
68 18:37:45.322395 progress 90% (8MB)
69 18:37:45.327029 progress 95% (8MB)
70 18:37:45.331119 progress 100% (9MB)
71 18:37:45.331350 9MB downloaded in 0.11s (86.69MB/s)
72 18:37:45.331508 end: 1.2.1 http-download (duration 00:00:00) [common]
74 18:37:45.331746 end: 1.2 download-retry (duration 00:00:00) [common]
75 18:37:45.331835 start: 1.3 download-retry (timeout 00:10:00) [common]
76 18:37:45.331924 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 18:37:45.332027 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 18:37:45.332096 saving as /var/lib/lava/dispatcher/tmp/9334739/tftp-deploy-y__mnh03/modules/modules.tar
79 18:37:45.332159 total size: 64832 (0MB)
80 18:37:45.332220 Using unxz to decompress xz
81 18:37:45.336538 progress 50% (0MB)
82 18:37:45.336921 progress 100% (0MB)
83 18:37:45.341150 0MB downloaded in 0.01s (6.88MB/s)
84 18:37:45.341386 end: 1.3.1 http-download (duration 00:00:00) [common]
86 18:37:45.341655 end: 1.3 download-retry (duration 00:00:00) [common]
87 18:37:45.341756 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 18:37:45.341854 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 18:37:45.341940 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 18:37:45.342030 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 18:37:45.342200 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw
92 18:37:45.342311 makedir: /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin
93 18:37:45.342397 makedir: /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/tests
94 18:37:45.342480 makedir: /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/results
95 18:37:45.342625 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-add-keys
96 18:37:45.342760 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-add-sources
97 18:37:45.342876 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-background-process-start
98 18:37:45.342990 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-background-process-stop
99 18:37:45.343103 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-common-functions
100 18:37:45.343214 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-echo-ipv4
101 18:37:45.343327 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-install-packages
102 18:37:45.343439 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-installed-packages
103 18:37:45.343547 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-os-build
104 18:37:45.343658 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-probe-channel
105 18:37:45.343768 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-probe-ip
106 18:37:45.343878 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-target-ip
107 18:37:45.343988 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-target-mac
108 18:37:45.344095 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-target-storage
109 18:37:45.344206 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-test-case
110 18:37:45.344345 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-test-event
111 18:37:45.344464 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-test-feedback
112 18:37:45.344574 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-test-raise
113 18:37:45.344685 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-test-reference
114 18:37:45.344793 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-test-runner
115 18:37:45.344901 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-test-set
116 18:37:45.345008 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-test-shell
117 18:37:45.345118 Updating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-install-packages (oe)
118 18:37:45.345231 Updating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/bin/lava-installed-packages (oe)
119 18:37:45.345329 Creating /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/environment
120 18:37:45.345417 LAVA metadata
121 18:37:45.345489 - LAVA_JOB_ID=9334739
122 18:37:45.345554 - LAVA_DISPATCHER_IP=192.168.201.1
123 18:37:45.345654 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 18:37:45.345718 skipped lava-vland-overlay
125 18:37:45.345796 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 18:37:45.345879 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 18:37:45.345943 skipped lava-multinode-overlay
128 18:37:45.346020 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 18:37:45.346102 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 18:37:45.346179 Loading test definitions
131 18:37:45.346278 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 18:37:45.346363 Using /lava-9334739 at stage 0
133 18:37:45.346666 uuid=9334739_1.4.2.3.1 testdef=None
134 18:37:45.346763 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 18:37:45.346859 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 18:37:45.347348 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 18:37:45.347576 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 18:37:45.348134 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 18:37:45.348376 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 18:37:45.348906 runner path: /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/0/tests/0_dmesg test_uuid 9334739_1.4.2.3.1
143 18:37:45.349053 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 18:37:45.349285 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 18:37:45.349358 Using /lava-9334739 at stage 1
147 18:37:45.349597 uuid=9334739_1.4.2.3.5 testdef=None
148 18:37:45.349686 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 18:37:45.349773 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 18:37:45.350210 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 18:37:45.350435 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 18:37:45.351036 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 18:37:45.351279 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 18:37:45.351825 runner path: /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/1/tests/1_bootrr test_uuid 9334739_1.4.2.3.5
157 18:37:45.351968 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 18:37:45.352180 Creating lava-test-runner.conf files
160 18:37:45.352245 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/0 for stage 0
161 18:37:45.352327 - 0_dmesg
162 18:37:45.352403 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9334739/lava-overlay-4llfckfw/lava-9334739/1 for stage 1
163 18:37:45.352486 - 1_bootrr
164 18:37:45.352576 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 18:37:45.352661 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 18:37:45.358834 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 18:37:45.358950 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 18:37:45.359043 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 18:37:45.359131 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 18:37:45.359218 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 18:37:45.547661 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 18:37:45.547993 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 18:37:45.548105 extracting modules file /var/lib/lava/dispatcher/tmp/9334739/tftp-deploy-y__mnh03/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9334739/extract-overlay-ramdisk-08yylrps/ramdisk
174 18:37:45.552205 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 18:37:45.552318 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 18:37:45.552405 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334739/compress-overlay-tiwtmdov/overlay-1.4.2.4.tar.gz to ramdisk
177 18:37:45.552478 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334739/compress-overlay-tiwtmdov/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9334739/extract-overlay-ramdisk-08yylrps/ramdisk
178 18:37:45.556314 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 18:37:45.556425 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 18:37:45.556519 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 18:37:45.556610 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 18:37:45.556691 Building ramdisk /var/lib/lava/dispatcher/tmp/9334739/extract-overlay-ramdisk-08yylrps/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9334739/extract-overlay-ramdisk-08yylrps/ramdisk
183 18:37:45.621265 >> 48350 blocks
184 18:37:46.394231 rename /var/lib/lava/dispatcher/tmp/9334739/extract-overlay-ramdisk-08yylrps/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9334739/tftp-deploy-y__mnh03/ramdisk/ramdisk.cpio.gz
185 18:37:46.394656 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 18:37:46.394783 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 18:37:46.394888 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 18:37:46.394996 No mkimage arch provided, not using FIT.
189 18:37:46.395131 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 18:37:46.395246 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 18:37:46.395348 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 18:37:46.395442 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 18:37:46.395523 No LXC device requested
194 18:37:46.395606 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 18:37:46.395731 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 18:37:46.395873 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 18:37:46.395990 Checking files for TFTP limit of 4294967296 bytes.
198 18:37:46.396523 end: 1 tftp-deploy (duration 00:00:01) [common]
199 18:37:46.396674 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 18:37:46.396816 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 18:37:46.396995 substitutions:
202 18:37:46.397095 - {DTB}: None
203 18:37:46.397194 - {INITRD}: 9334739/tftp-deploy-y__mnh03/ramdisk/ramdisk.cpio.gz
204 18:37:46.397287 - {KERNEL}: 9334739/tftp-deploy-y__mnh03/kernel/bzImage
205 18:37:46.397377 - {LAVA_MAC}: None
206 18:37:46.397467 - {PRESEED_CONFIG}: None
207 18:37:46.397556 - {PRESEED_LOCAL}: None
208 18:37:46.397645 - {RAMDISK}: 9334739/tftp-deploy-y__mnh03/ramdisk/ramdisk.cpio.gz
209 18:37:46.397735 - {ROOT_PART}: None
210 18:37:46.397823 - {ROOT}: None
211 18:37:46.397911 - {SERVER_IP}: 192.168.201.1
212 18:37:46.397998 - {TEE}: None
213 18:37:46.398086 Parsed boot commands:
214 18:37:46.398172 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 18:37:46.398380 Parsed boot commands: tftpboot 192.168.201.1 9334739/tftp-deploy-y__mnh03/kernel/bzImage 9334739/tftp-deploy-y__mnh03/kernel/cmdline 9334739/tftp-deploy-y__mnh03/ramdisk/ramdisk.cpio.gz
216 18:37:46.398523 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 18:37:46.398662 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 18:37:46.398802 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 18:37:46.398933 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 18:37:46.399044 Not connected, no need to disconnect.
221 18:37:46.399167 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 18:37:46.399302 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 18:37:46.399416 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
224 18:37:46.402679 Setting prompt string to ['lava-test: # ']
225 18:37:46.403044 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 18:37:46.403160 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 18:37:46.403266 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 18:37:46.403362 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 18:37:46.403795 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
230 18:37:55.730746 >> Command sent successfully.
231 18:37:55.739754 Returned 0 in 9 seconds
232 18:37:55.841364 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 18:37:55.842781 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 18:37:55.843293 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 18:37:55.843739 Setting prompt string to 'Starting depthcharge on Voema...'
237 18:37:55.844162 Changing prompt to 'Starting depthcharge on Voema...'
238 18:37:55.844537 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 18:37:55.845799 [Enter `^Ec?' for help]
240 18:37:55.846246
241 18:37:55.846703
242 18:37:55.847130 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 18:37:55.847484 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 18:37:55.847815 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 18:37:55.848207 CPU: AES supported, TXT NOT supported, VT supported
246 18:37:55.848691 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 18:37:55.849025 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 18:37:55.849336 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 18:37:55.849648 VBOOT: Loading verstage.
250 18:37:55.850023 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 18:37:55.850330 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 18:37:55.850667 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 18:37:55.850974 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 18:37:55.851276 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 18:37:55.851578
256 18:37:55.852083
257 18:37:55.852571 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 18:37:55.852900 Probing TPM: . done!
259 18:37:55.853206 TPM ready after 0 ms
260 18:37:55.853508 Connected to device vid:did:rid of 1ae0:0028:00
261 18:37:55.853808 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
262 18:37:55.854144 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 18:37:55.854443 Initialized TPM device CR50 revision 0
264 18:37:55.854801 tlcl_send_startup: Startup return code is 0
265 18:37:55.855103 TPM: setup succeeded
266 18:37:55.855555 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 18:37:55.856097 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 18:37:55.856539 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 18:37:55.856863 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 18:37:55.857171 Chrome EC: UHEPI supported
271 18:37:55.857470 Phase 1
272 18:37:55.857769 FMAP: area GBB found @ 1805000 (458752 bytes)
273 18:37:55.858073 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 18:37:55.858370 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 18:37:55.858707 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 18:37:55.859004 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 18:37:55.859299 Recovery requested (1009000e)
278 18:37:55.859588 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 18:37:55.859880 tlcl_extend: response is 0
280 18:37:55.860173 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 18:37:55.860468 tlcl_extend: response is 0
282 18:37:55.860761 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 18:37:55.861055 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 18:37:55.861352 BS: verstage times (exec / console): total (unknown) / 142 ms
285 18:37:55.861641
286 18:37:55.862006
287 18:37:55.862308 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 18:37:55.862638 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 18:37:55.862937 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 18:37:55.863229 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 18:37:55.863524 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 18:37:55.863819 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 18:37:55.864109 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 18:37:55.864403 TCO_STS: 0000 0000
295 18:37:55.864731 GEN_PMCON: d0015038 00002200
296 18:37:55.865050 GBLRST_CAUSE: 00000000 00000000
297 18:37:55.865341 HPR_CAUSE0: 00000000
298 18:37:55.865631 prev_sleep_state 5
299 18:37:55.865920 Boot Count incremented to 17578
300 18:37:55.866211 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 18:37:55.866506 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 18:37:55.866840 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 18:37:55.867138 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 18:37:55.867429 Chrome EC: UHEPI supported
305 18:37:55.868059 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 18:37:55.868419 Probing TPM: done!
307 18:37:55.869053 Connected to device vid:did:rid of 1ae0:0028:00
308 18:37:55.879436 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
309 18:37:55.887016 Initialized TPM device CR50 revision 0
310 18:37:55.896880 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 18:37:55.903971 MRC: Hash idx 0x100b comparison successful.
312 18:37:55.906811 MRC cache found, size faa8
313 18:37:55.907370 bootmode is set to: 2
314 18:37:55.910006 SPD index = 0
315 18:37:55.916873 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 18:37:55.919805 SPD: module type is LPDDR4X
317 18:37:55.923525 SPD: module part number is MT53E512M64D4NW-046
318 18:37:55.929953 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 18:37:55.933598 SPD: device width 16 bits, bus width 16 bits
320 18:37:55.939908 SPD: module size is 1024 MB (per channel)
321 18:37:56.371458 CBMEM:
322 18:37:56.375208 IMD: root @ 0x76fff000 254 entries.
323 18:37:56.378181 IMD: root @ 0x76ffec00 62 entries.
324 18:37:56.381133 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 18:37:56.388093 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 18:37:56.391029 External stage cache:
327 18:37:56.394656 IMD: root @ 0x7b3ff000 254 entries.
328 18:37:56.397502 IMD: root @ 0x7b3fec00 62 entries.
329 18:37:56.413486 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 18:37:56.420115 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 18:37:56.426349 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 18:37:56.440472 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 18:37:56.446725 cse_lite: Skip switching to RW in the recovery path
334 18:37:56.447164 8 DIMMs found
335 18:37:56.447513 SMM Memory Map
336 18:37:56.453711 SMRAM : 0x7b000000 0x800000
337 18:37:56.457675 Subregion 0: 0x7b000000 0x200000
338 18:37:56.458229 Subregion 1: 0x7b200000 0x200000
339 18:37:56.461646 Subregion 2: 0x7b400000 0x400000
340 18:37:56.464999 top_of_ram = 0x77000000
341 18:37:56.471240 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 18:37:56.474849 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 18:37:56.481554 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 18:37:56.485102 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 18:37:56.494419 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 18:37:56.498273 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 18:37:56.509839 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 18:37:56.516845 Processing 211 relocs. Offset value of 0x74c0b000
349 18:37:56.523218 BS: romstage times (exec / console): total (unknown) / 277 ms
350 18:37:56.529318
351 18:37:56.529921
352 18:37:56.539420 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 18:37:56.542376 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 18:37:56.552283 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 18:37:56.558873 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 18:37:56.565661 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 18:37:56.572387 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 18:37:56.619348 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 18:37:56.626123 Processing 5008 relocs. Offset value of 0x75d98000
360 18:37:56.629031 BS: postcar times (exec / console): total (unknown) / 59 ms
361 18:37:56.632718
362 18:37:56.633256
363 18:37:56.643177 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 18:37:56.643739 Normal boot
365 18:37:56.645846 FW_CONFIG value is 0x804c02
366 18:37:56.649666 PCI: 00:07.0 disabled by fw_config
367 18:37:56.652443 PCI: 00:07.1 disabled by fw_config
368 18:37:56.656332 PCI: 00:0d.2 disabled by fw_config
369 18:37:56.659368 PCI: 00:1c.7 disabled by fw_config
370 18:37:56.666050 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 18:37:56.672585 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 18:37:56.676328 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 18:37:56.679120 GENERIC: 0.0 disabled by fw_config
374 18:37:56.682908 GENERIC: 1.0 disabled by fw_config
375 18:37:56.689639 fw_config match found: DB_USB=USB3_ACTIVE
376 18:37:56.692335 fw_config match found: DB_USB=USB3_ACTIVE
377 18:37:56.696092 fw_config match found: DB_USB=USB3_ACTIVE
378 18:37:56.702574 fw_config match found: DB_USB=USB3_ACTIVE
379 18:37:56.706146 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 18:37:56.712271 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 18:37:56.722393 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 18:37:56.729374 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 18:37:56.732856 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 18:37:56.739213 microcode: Update skipped, already up-to-date
385 18:37:56.745549 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 18:37:56.772979 Detected 4 core, 8 thread CPU.
387 18:37:56.776632 Setting up SMI for CPU
388 18:37:56.779218 IED base = 0x7b400000
389 18:37:56.783169 IED size = 0x00400000
390 18:37:56.783770 Will perform SMM setup.
391 18:37:56.789872 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 18:37:56.796507 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 18:37:56.802724 Processing 16 relocs. Offset value of 0x00030000
394 18:37:56.806680 Attempting to start 7 APs
395 18:37:56.809192 Waiting for 10ms after sending INIT.
396 18:37:56.824942 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 18:37:56.825522 done.
398 18:37:56.828315 AP: slot 4 apic_id 5.
399 18:37:56.832243 AP: slot 5 apic_id 4.
400 18:37:56.832832 AP: slot 6 apic_id 2.
401 18:37:56.834783 AP: slot 2 apic_id 3.
402 18:37:56.838766 AP: slot 7 apic_id 7.
403 18:37:56.839357 AP: slot 3 apic_id 6.
404 18:37:56.844976 Waiting for 2nd SIPI to complete...done.
405 18:37:56.851356 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 18:37:56.858270 Processing 13 relocs. Offset value of 0x00038000
407 18:37:56.861444 Unable to locate Global NVS
408 18:37:56.868418 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 18:37:56.871223 Installing permanent SMM handler to 0x7b000000
410 18:37:56.881195 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 18:37:56.884462 Processing 794 relocs. Offset value of 0x7b010000
412 18:37:56.894471 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 18:37:56.897884 Processing 13 relocs. Offset value of 0x7b008000
414 18:37:56.904512 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 18:37:56.910885 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 18:37:56.914399 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 18:37:56.920997 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 18:37:56.927319 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 18:37:56.934300 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 18:37:56.940864 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 18:37:56.944001 Unable to locate Global NVS
422 18:37:56.951433 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 18:37:56.953994 Clearing SMI status registers
424 18:37:56.954486 SMI_STS: PM1
425 18:37:56.957529 PM1_STS: PWRBTN
426 18:37:56.963840 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 18:37:56.967634 In relocation handler: CPU 0
428 18:37:56.970845 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 18:37:56.977350 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 18:37:56.980107 Relocation complete.
431 18:37:56.987437 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 18:37:56.990640 In relocation handler: CPU 1
433 18:37:56.993594 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 18:37:56.997198 Relocation complete.
435 18:37:57.003762 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
436 18:37:57.007142 In relocation handler: CPU 6
437 18:37:57.010186 New SMBASE=0x7affe800 IEDBASE=0x7b400000
438 18:37:57.013445 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 18:37:57.017076 Relocation complete.
440 18:37:57.023502 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
441 18:37:57.027179 In relocation handler: CPU 2
442 18:37:57.029995 New SMBASE=0x7afff800 IEDBASE=0x7b400000
443 18:37:57.033655 Relocation complete.
444 18:37:57.039820 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
445 18:37:57.043563 In relocation handler: CPU 5
446 18:37:57.047041 New SMBASE=0x7affec00 IEDBASE=0x7b400000
447 18:37:57.053546 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 18:37:57.054279 Relocation complete.
449 18:37:57.063110 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
450 18:37:57.063555 In relocation handler: CPU 4
451 18:37:57.069648 New SMBASE=0x7afff000 IEDBASE=0x7b400000
452 18:37:57.070199 Relocation complete.
453 18:37:57.079921 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
454 18:37:57.080521 In relocation handler: CPU 7
455 18:37:57.086127 New SMBASE=0x7affe400 IEDBASE=0x7b400000
456 18:37:57.086740 Relocation complete.
457 18:37:57.096646 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
458 18:37:57.097240 In relocation handler: CPU 3
459 18:37:57.103071 New SMBASE=0x7afff400 IEDBASE=0x7b400000
460 18:37:57.106263 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 18:37:57.109716 Relocation complete.
462 18:37:57.110308 Initializing CPU #0
463 18:37:57.113033 CPU: vendor Intel device 806c1
464 18:37:57.119754 CPU: family 06, model 8c, stepping 01
465 18:37:57.120349 Clearing out pending MCEs
466 18:37:57.123350 Setting up local APIC...
467 18:37:57.126860 apic_id: 0x00 done.
468 18:37:57.130159 Turbo is available but hidden
469 18:37:57.130823 Turbo is available and visible
470 18:37:57.137274 microcode: Update skipped, already up-to-date
471 18:37:57.137850 CPU #0 initialized
472 18:37:57.140772 Initializing CPU #4
473 18:37:57.143928 Initializing CPU #5
474 18:37:57.147383 CPU: vendor Intel device 806c1
475 18:37:57.150802 CPU: family 06, model 8c, stepping 01
476 18:37:57.153991 CPU: vendor Intel device 806c1
477 18:37:57.157269 CPU: family 06, model 8c, stepping 01
478 18:37:57.160052 Clearing out pending MCEs
479 18:37:57.160558 Initializing CPU #2
480 18:37:57.163647 Initializing CPU #6
481 18:37:57.167203 CPU: vendor Intel device 806c1
482 18:37:57.170116 CPU: family 06, model 8c, stepping 01
483 18:37:57.173932 CPU: vendor Intel device 806c1
484 18:37:57.177139 CPU: family 06, model 8c, stepping 01
485 18:37:57.180416 Clearing out pending MCEs
486 18:37:57.183477 Clearing out pending MCEs
487 18:37:57.183953 Initializing CPU #3
488 18:37:57.186997 Initializing CPU #7
489 18:37:57.190057 CPU: vendor Intel device 806c1
490 18:37:57.193859 CPU: family 06, model 8c, stepping 01
491 18:37:57.196890 CPU: vendor Intel device 806c1
492 18:37:57.200496 CPU: family 06, model 8c, stepping 01
493 18:37:57.203349 Clearing out pending MCEs
494 18:37:57.207056 Clearing out pending MCEs
495 18:37:57.207624 Setting up local APIC...
496 18:37:57.209734 Setting up local APIC...
497 18:37:57.213535 Setting up local APIC...
498 18:37:57.216952 apic_id: 0x02 done.
499 18:37:57.217418 Setting up local APIC...
500 18:37:57.219857 apic_id: 0x07 done.
501 18:37:57.223583 apic_id: 0x06 done.
502 18:37:57.226512 microcode: Update skipped, already up-to-date
503 18:37:57.229921 microcode: Update skipped, already up-to-date
504 18:37:57.233718 CPU #7 initialized
505 18:37:57.236582 CPU #3 initialized
506 18:37:57.237138 Clearing out pending MCEs
507 18:37:57.239826 Setting up local APIC...
508 18:37:57.243220 Initializing CPU #1
509 18:37:57.246266 microcode: Update skipped, already up-to-date
510 18:37:57.249965 apic_id: 0x03 done.
511 18:37:57.250551 CPU #6 initialized
512 18:37:57.256061 microcode: Update skipped, already up-to-date
513 18:37:57.256542 apic_id: 0x05 done.
514 18:37:57.259571 Setting up local APIC...
515 18:37:57.262925 CPU #2 initialized
516 18:37:57.266544 microcode: Update skipped, already up-to-date
517 18:37:57.269481 apic_id: 0x04 done.
518 18:37:57.269942 CPU #4 initialized
519 18:37:57.276283 microcode: Update skipped, already up-to-date
520 18:37:57.279863 CPU: vendor Intel device 806c1
521 18:37:57.283065 CPU: family 06, model 8c, stepping 01
522 18:37:57.286425 CPU #5 initialized
523 18:37:57.286959 Clearing out pending MCEs
524 18:37:57.289677 Setting up local APIC...
525 18:37:57.293014 apic_id: 0x01 done.
526 18:37:57.295893 microcode: Update skipped, already up-to-date
527 18:37:57.299462 CPU #1 initialized
528 18:37:57.302436 bsp_do_flight_plan done after 455 msecs.
529 18:37:57.305613 CPU: frequency set to 4000 MHz
530 18:37:57.308920 Enabling SMIs.
531 18:37:57.315613 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 18:37:57.330024 SATAXPCIE1 indicates PCIe NVMe is present
533 18:37:57.333619 Probing TPM: done!
534 18:37:57.336746 Connected to device vid:did:rid of 1ae0:0028:00
535 18:37:57.347235 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
536 18:37:57.350530 Initialized TPM device CR50 revision 0
537 18:37:57.354144 Enabling S0i3.4
538 18:37:57.360657 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 18:37:57.363535 Found a VBT of 8704 bytes after decompression
540 18:37:57.371028 cse_lite: CSE RO boot. HybridStorageMode disabled
541 18:37:57.377213 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 18:37:57.451972 FSPS returned 0
543 18:37:57.455616 Executing Phase 1 of FspMultiPhaseSiInit
544 18:37:57.465833 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 18:37:57.468783 port C0 DISC req: usage 1 usb3 1 usb2 5
546 18:37:57.472408 Raw Buffer output 0 00000511
547 18:37:57.475082 Raw Buffer output 1 00000000
548 18:37:57.478801 pmc_send_ipc_cmd succeeded
549 18:37:57.485989 port C1 DISC req: usage 1 usb3 2 usb2 3
550 18:37:57.486619 Raw Buffer output 0 00000321
551 18:37:57.488821 Raw Buffer output 1 00000000
552 18:37:57.493202 pmc_send_ipc_cmd succeeded
553 18:37:57.498648 Detected 4 core, 8 thread CPU.
554 18:37:57.501819 Detected 4 core, 8 thread CPU.
555 18:37:57.736064 Display FSP Version Info HOB
556 18:37:57.738964 Reference Code - CPU = a.0.4c.31
557 18:37:57.742360 uCode Version = 0.0.0.86
558 18:37:57.745481 TXT ACM version = ff.ff.ff.ffff
559 18:37:57.749108 Reference Code - ME = a.0.4c.31
560 18:37:57.752392 MEBx version = 0.0.0.0
561 18:37:57.755253 ME Firmware Version = Consumer SKU
562 18:37:57.758782 Reference Code - PCH = a.0.4c.31
563 18:37:57.762778 PCH-CRID Status = Disabled
564 18:37:57.765619 PCH-CRID Original Value = ff.ff.ff.ffff
565 18:37:57.768938 PCH-CRID New Value = ff.ff.ff.ffff
566 18:37:57.772020 OPROM - RST - RAID = ff.ff.ff.ffff
567 18:37:57.775853 PCH Hsio Version = 4.0.0.0
568 18:37:57.778656 Reference Code - SA - System Agent = a.0.4c.31
569 18:37:57.782662 Reference Code - MRC = 2.0.0.1
570 18:37:57.785205 SA - PCIe Version = a.0.4c.31
571 18:37:57.789263 SA-CRID Status = Disabled
572 18:37:57.792665 SA-CRID Original Value = 0.0.0.1
573 18:37:57.795649 SA-CRID New Value = 0.0.0.1
574 18:37:57.798430 OPROM - VBIOS = ff.ff.ff.ffff
575 18:37:57.802357 IO Manageability Engine FW Version = 11.1.4.0
576 18:37:57.805465 PHY Build Version = 0.0.0.e0
577 18:37:57.809031 Thunderbolt(TM) FW Version = 0.0.0.0
578 18:37:57.815561 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 18:37:57.818402 ITSS IRQ Polarities Before:
580 18:37:57.818950 IPC0: 0xffffffff
581 18:37:57.821683 IPC1: 0xffffffff
582 18:37:57.822165 IPC2: 0xffffffff
583 18:37:57.825228 IPC3: 0xffffffff
584 18:37:57.828731 ITSS IRQ Polarities After:
585 18:37:57.829215 IPC0: 0xffffffff
586 18:37:57.831850 IPC1: 0xffffffff
587 18:37:57.832369 IPC2: 0xffffffff
588 18:37:57.835807 IPC3: 0xffffffff
589 18:37:57.838341 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 18:37:57.851779 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 18:37:57.861776 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 18:37:57.875029 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 18:37:57.882029 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
594 18:37:57.884614 Enumerating buses...
595 18:37:57.888034 Show all devs... Before device enumeration.
596 18:37:57.891664 Root Device: enabled 1
597 18:37:57.892102 DOMAIN: 0000: enabled 1
598 18:37:57.894946 CPU_CLUSTER: 0: enabled 1
599 18:37:57.898095 PCI: 00:00.0: enabled 1
600 18:37:57.901724 PCI: 00:02.0: enabled 1
601 18:37:57.902312 PCI: 00:04.0: enabled 1
602 18:37:57.904768 PCI: 00:05.0: enabled 1
603 18:37:57.908250 PCI: 00:06.0: enabled 0
604 18:37:57.911412 PCI: 00:07.0: enabled 0
605 18:37:57.912058 PCI: 00:07.1: enabled 0
606 18:37:57.914592 PCI: 00:07.2: enabled 0
607 18:37:57.918135 PCI: 00:07.3: enabled 0
608 18:37:57.921163 PCI: 00:08.0: enabled 1
609 18:37:57.921739 PCI: 00:09.0: enabled 0
610 18:37:57.924871 PCI: 00:0a.0: enabled 0
611 18:37:57.928324 PCI: 00:0d.0: enabled 1
612 18:37:57.928810 PCI: 00:0d.1: enabled 0
613 18:37:57.931234 PCI: 00:0d.2: enabled 0
614 18:37:57.934595 PCI: 00:0d.3: enabled 0
615 18:37:57.937633 PCI: 00:0e.0: enabled 0
616 18:37:57.938218 PCI: 00:10.2: enabled 1
617 18:37:57.941467 PCI: 00:10.6: enabled 0
618 18:37:57.944168 PCI: 00:10.7: enabled 0
619 18:37:57.947755 PCI: 00:12.0: enabled 0
620 18:37:57.948369 PCI: 00:12.6: enabled 0
621 18:37:57.950822 PCI: 00:13.0: enabled 0
622 18:37:57.954117 PCI: 00:14.0: enabled 1
623 18:37:57.957547 PCI: 00:14.1: enabled 0
624 18:37:57.958155 PCI: 00:14.2: enabled 1
625 18:37:57.960691 PCI: 00:14.3: enabled 1
626 18:37:57.964107 PCI: 00:15.0: enabled 1
627 18:37:57.967245 PCI: 00:15.1: enabled 1
628 18:37:57.967684 PCI: 00:15.2: enabled 1
629 18:37:57.971130 PCI: 00:15.3: enabled 1
630 18:37:57.973965 PCI: 00:16.0: enabled 1
631 18:37:57.977564 PCI: 00:16.1: enabled 0
632 18:37:57.978159 PCI: 00:16.2: enabled 0
633 18:37:57.980856 PCI: 00:16.3: enabled 0
634 18:37:57.983910 PCI: 00:16.4: enabled 0
635 18:37:57.987500 PCI: 00:16.5: enabled 0
636 18:37:57.988093 PCI: 00:17.0: enabled 1
637 18:37:57.990895 PCI: 00:19.0: enabled 0
638 18:37:57.994056 PCI: 00:19.1: enabled 1
639 18:37:57.994682 PCI: 00:19.2: enabled 0
640 18:37:57.997633 PCI: 00:1c.0: enabled 1
641 18:37:58.000796 PCI: 00:1c.1: enabled 0
642 18:37:58.003915 PCI: 00:1c.2: enabled 0
643 18:37:58.004508 PCI: 00:1c.3: enabled 0
644 18:37:58.007465 PCI: 00:1c.4: enabled 0
645 18:37:58.010681 PCI: 00:1c.5: enabled 0
646 18:37:58.013555 PCI: 00:1c.6: enabled 1
647 18:37:58.014041 PCI: 00:1c.7: enabled 0
648 18:37:58.017210 PCI: 00:1d.0: enabled 1
649 18:37:58.020400 PCI: 00:1d.1: enabled 0
650 18:37:58.023425 PCI: 00:1d.2: enabled 1
651 18:37:58.024082 PCI: 00:1d.3: enabled 0
652 18:37:58.026834 PCI: 00:1e.0: enabled 1
653 18:37:58.030289 PCI: 00:1e.1: enabled 0
654 18:37:58.033557 PCI: 00:1e.2: enabled 1
655 18:37:58.034008 PCI: 00:1e.3: enabled 1
656 18:37:58.036729 PCI: 00:1f.0: enabled 1
657 18:37:58.040307 PCI: 00:1f.1: enabled 0
658 18:37:58.043351 PCI: 00:1f.2: enabled 1
659 18:37:58.043976 PCI: 00:1f.3: enabled 1
660 18:37:58.046663 PCI: 00:1f.4: enabled 0
661 18:37:58.050135 PCI: 00:1f.5: enabled 1
662 18:37:58.050781 PCI: 00:1f.6: enabled 0
663 18:37:58.053485 PCI: 00:1f.7: enabled 0
664 18:37:58.057127 APIC: 00: enabled 1
665 18:37:58.060053 GENERIC: 0.0: enabled 1
666 18:37:58.060553 GENERIC: 0.0: enabled 1
667 18:37:58.063437 GENERIC: 1.0: enabled 1
668 18:37:58.066328 GENERIC: 0.0: enabled 1
669 18:37:58.070382 GENERIC: 1.0: enabled 1
670 18:37:58.071036 USB0 port 0: enabled 1
671 18:37:58.073218 GENERIC: 0.0: enabled 1
672 18:37:58.076260 USB0 port 0: enabled 1
673 18:37:58.076752 GENERIC: 0.0: enabled 1
674 18:37:58.079890 I2C: 00:1a: enabled 1
675 18:37:58.083364 I2C: 00:31: enabled 1
676 18:37:58.083861 I2C: 00:32: enabled 1
677 18:37:58.086275 I2C: 00:10: enabled 1
678 18:37:58.090016 I2C: 00:15: enabled 1
679 18:37:58.092848 GENERIC: 0.0: enabled 0
680 18:37:58.093341 GENERIC: 1.0: enabled 0
681 18:37:58.096680 GENERIC: 0.0: enabled 1
682 18:37:58.099566 SPI: 00: enabled 1
683 18:37:58.100157 SPI: 00: enabled 1
684 18:37:58.103288 PNP: 0c09.0: enabled 1
685 18:37:58.106303 GENERIC: 0.0: enabled 1
686 18:37:58.106937 USB3 port 0: enabled 1
687 18:37:58.109921 USB3 port 1: enabled 1
688 18:37:58.112709 USB3 port 2: enabled 0
689 18:37:58.116184 USB3 port 3: enabled 0
690 18:37:58.116675 USB2 port 0: enabled 0
691 18:37:58.119902 USB2 port 1: enabled 1
692 18:37:58.122968 USB2 port 2: enabled 1
693 18:37:58.123456 USB2 port 3: enabled 0
694 18:37:58.126186 USB2 port 4: enabled 1
695 18:37:58.129352 USB2 port 5: enabled 0
696 18:37:58.129948 USB2 port 6: enabled 0
697 18:37:58.132762 USB2 port 7: enabled 0
698 18:37:58.135930 USB2 port 8: enabled 0
699 18:37:58.139199 USB2 port 9: enabled 0
700 18:37:58.139692 USB3 port 0: enabled 0
701 18:37:58.142886 USB3 port 1: enabled 1
702 18:37:58.146453 USB3 port 2: enabled 0
703 18:37:58.147093 USB3 port 3: enabled 0
704 18:37:58.149246 GENERIC: 0.0: enabled 1
705 18:37:58.152949 GENERIC: 1.0: enabled 1
706 18:37:58.155951 APIC: 01: enabled 1
707 18:37:58.156549 APIC: 03: enabled 1
708 18:37:58.159213 APIC: 06: enabled 1
709 18:37:58.159720 APIC: 05: enabled 1
710 18:37:58.162298 APIC: 04: enabled 1
711 18:37:58.166042 APIC: 02: enabled 1
712 18:37:58.166668 APIC: 07: enabled 1
713 18:37:58.169636 Compare with tree...
714 18:37:58.172635 Root Device: enabled 1
715 18:37:58.173236 DOMAIN: 0000: enabled 1
716 18:37:58.175287 PCI: 00:00.0: enabled 1
717 18:37:58.178936 PCI: 00:02.0: enabled 1
718 18:37:58.182482 PCI: 00:04.0: enabled 1
719 18:37:58.185662 GENERIC: 0.0: enabled 1
720 18:37:58.186268 PCI: 00:05.0: enabled 1
721 18:37:58.189190 PCI: 00:06.0: enabled 0
722 18:37:58.192645 PCI: 00:07.0: enabled 0
723 18:37:58.195385 GENERIC: 0.0: enabled 1
724 18:37:58.198509 PCI: 00:07.1: enabled 0
725 18:37:58.199031 GENERIC: 1.0: enabled 1
726 18:37:58.202434 PCI: 00:07.2: enabled 0
727 18:37:58.205465 GENERIC: 0.0: enabled 1
728 18:37:58.209028 PCI: 00:07.3: enabled 0
729 18:37:58.211793 GENERIC: 1.0: enabled 1
730 18:37:58.215526 PCI: 00:08.0: enabled 1
731 18:37:58.216153 PCI: 00:09.0: enabled 0
732 18:37:58.219127 PCI: 00:0a.0: enabled 0
733 18:37:58.222126 PCI: 00:0d.0: enabled 1
734 18:37:58.225765 USB0 port 0: enabled 1
735 18:37:58.228683 USB3 port 0: enabled 1
736 18:37:58.229180 USB3 port 1: enabled 1
737 18:37:58.231583 USB3 port 2: enabled 0
738 18:37:58.235097 USB3 port 3: enabled 0
739 18:37:58.238702 PCI: 00:0d.1: enabled 0
740 18:37:58.241713 PCI: 00:0d.2: enabled 0
741 18:37:58.242210 GENERIC: 0.0: enabled 1
742 18:37:58.245444 PCI: 00:0d.3: enabled 0
743 18:37:58.248256 PCI: 00:0e.0: enabled 0
744 18:37:58.251814 PCI: 00:10.2: enabled 1
745 18:37:58.255184 PCI: 00:10.6: enabled 0
746 18:37:58.255678 PCI: 00:10.7: enabled 0
747 18:37:58.258045 PCI: 00:12.0: enabled 0
748 18:37:58.261659 PCI: 00:12.6: enabled 0
749 18:37:58.265345 PCI: 00:13.0: enabled 0
750 18:37:58.268122 PCI: 00:14.0: enabled 1
751 18:37:58.268613 USB0 port 0: enabled 1
752 18:37:58.271733 USB2 port 0: enabled 0
753 18:37:58.274727 USB2 port 1: enabled 1
754 18:37:58.278557 USB2 port 2: enabled 1
755 18:37:58.281574 USB2 port 3: enabled 0
756 18:37:58.285230 USB2 port 4: enabled 1
757 18:37:58.285852 USB2 port 5: enabled 0
758 18:37:58.288369 USB2 port 6: enabled 0
759 18:37:58.291220 USB2 port 7: enabled 0
760 18:37:58.294755 USB2 port 8: enabled 0
761 18:37:58.298404 USB2 port 9: enabled 0
762 18:37:58.298952 USB3 port 0: enabled 0
763 18:37:58.301334 USB3 port 1: enabled 1
764 18:37:58.304862 USB3 port 2: enabled 0
765 18:37:58.307946 USB3 port 3: enabled 0
766 18:37:58.311060 PCI: 00:14.1: enabled 0
767 18:37:58.314635 PCI: 00:14.2: enabled 1
768 18:37:58.315115 PCI: 00:14.3: enabled 1
769 18:37:58.318143 GENERIC: 0.0: enabled 1
770 18:37:58.321140 PCI: 00:15.0: enabled 1
771 18:37:58.324707 I2C: 00:1a: enabled 1
772 18:37:58.325152 I2C: 00:31: enabled 1
773 18:37:58.327777 I2C: 00:32: enabled 1
774 18:37:58.330755 PCI: 00:15.1: enabled 1
775 18:37:58.334493 I2C: 00:10: enabled 1
776 18:37:58.337648 PCI: 00:15.2: enabled 1
777 18:37:58.338107 PCI: 00:15.3: enabled 1
778 18:37:58.341018 PCI: 00:16.0: enabled 1
779 18:37:58.344591 PCI: 00:16.1: enabled 0
780 18:37:58.347503 PCI: 00:16.2: enabled 0
781 18:37:58.351016 PCI: 00:16.3: enabled 0
782 18:37:58.351467 PCI: 00:16.4: enabled 0
783 18:37:58.354104 PCI: 00:16.5: enabled 0
784 18:37:58.357865 PCI: 00:17.0: enabled 1
785 18:37:58.360633 PCI: 00:19.0: enabled 0
786 18:37:58.363867 PCI: 00:19.1: enabled 1
787 18:37:58.364312 I2C: 00:15: enabled 1
788 18:37:58.367579 PCI: 00:19.2: enabled 0
789 18:37:58.370445 PCI: 00:1d.0: enabled 1
790 18:37:58.374073 GENERIC: 0.0: enabled 1
791 18:37:58.424302 PCI: 00:1e.0: enabled 1
792 18:37:58.424903 PCI: 00:1e.1: enabled 0
793 18:37:58.425422 PCI: 00:1e.2: enabled 1
794 18:37:58.425863 SPI: 00: enabled 1
795 18:37:58.426230 PCI: 00:1e.3: enabled 1
796 18:37:58.426999 SPI: 00: enabled 1
797 18:37:58.427387 PCI: 00:1f.0: enabled 1
798 18:37:58.427739 PNP: 0c09.0: enabled 1
799 18:37:58.428080 PCI: 00:1f.1: enabled 0
800 18:37:58.428414 PCI: 00:1f.2: enabled 1
801 18:37:58.428741 GENERIC: 0.0: enabled 1
802 18:37:58.429072 GENERIC: 0.0: enabled 1
803 18:37:58.429398 GENERIC: 1.0: enabled 1
804 18:37:58.429718 PCI: 00:1f.3: enabled 1
805 18:37:58.430040 PCI: 00:1f.4: enabled 0
806 18:37:58.430363 PCI: 00:1f.5: enabled 1
807 18:37:58.430713 PCI: 00:1f.6: enabled 0
808 18:37:58.431036 PCI: 00:1f.7: enabled 0
809 18:37:58.431357 CPU_CLUSTER: 0: enabled 1
810 18:37:58.431702 APIC: 00: enabled 1
811 18:37:58.476271 APIC: 01: enabled 1
812 18:37:58.476872 APIC: 03: enabled 1
813 18:37:58.477271 APIC: 06: enabled 1
814 18:37:58.477642 APIC: 05: enabled 1
815 18:37:58.478002 APIC: 04: enabled 1
816 18:37:58.478346 APIC: 02: enabled 1
817 18:37:58.478747 APIC: 07: enabled 1
818 18:37:58.479091 Root Device scanning...
819 18:37:58.479799 scan_static_bus for Root Device
820 18:37:58.480162 DOMAIN: 0000 enabled
821 18:37:58.480500 CPU_CLUSTER: 0 enabled
822 18:37:58.480828 DOMAIN: 0000 scanning...
823 18:37:58.481151 PCI: pci_scan_bus for bus 00
824 18:37:58.481475 PCI: 00:00.0 [8086/0000] ops
825 18:37:58.481797 PCI: 00:00.0 [8086/9a12] enabled
826 18:37:58.482120 PCI: 00:02.0 [8086/0000] bus ops
827 18:37:58.482439 PCI: 00:02.0 [8086/9a40] enabled
828 18:37:58.482790 PCI: 00:04.0 [8086/0000] bus ops
829 18:37:58.526487 PCI: 00:04.0 [8086/9a03] enabled
830 18:37:58.527102 PCI: 00:05.0 [8086/9a19] enabled
831 18:37:58.527875 PCI: 00:07.0 [0000/0000] hidden
832 18:37:58.528280 PCI: 00:08.0 [8086/9a11] enabled
833 18:37:58.528649 PCI: 00:0a.0 [8086/9a0d] disabled
834 18:37:58.529002 PCI: 00:0d.0 [8086/0000] bus ops
835 18:37:58.529347 PCI: 00:0d.0 [8086/9a13] enabled
836 18:37:58.529687 PCI: 00:14.0 [8086/0000] bus ops
837 18:37:58.530018 PCI: 00:14.0 [8086/a0ed] enabled
838 18:37:58.530342 PCI: 00:14.2 [8086/a0ef] enabled
839 18:37:58.530696 PCI: 00:14.3 [8086/0000] bus ops
840 18:37:58.531019 PCI: 00:14.3 [8086/a0f0] enabled
841 18:37:58.531343 PCI: 00:15.0 [8086/0000] bus ops
842 18:37:58.531668 PCI: 00:15.0 [8086/a0e8] enabled
843 18:37:58.532011 PCI: 00:15.1 [8086/0000] bus ops
844 18:37:58.532692 PCI: 00:15.1 [8086/a0e9] enabled
845 18:37:58.533064 PCI: 00:15.2 [8086/0000] bus ops
846 18:37:58.534115 PCI: 00:15.2 [8086/a0ea] enabled
847 18:37:58.537420 PCI: 00:15.3 [8086/0000] bus ops
848 18:37:58.540609 PCI: 00:15.3 [8086/a0eb] enabled
849 18:37:58.544013 PCI: 00:16.0 [8086/0000] ops
850 18:37:58.547282 PCI: 00:16.0 [8086/a0e0] enabled
851 18:37:58.554335 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 18:37:58.557040 PCI: 00:19.0 [8086/0000] bus ops
853 18:37:58.560493 PCI: 00:19.0 [8086/a0c5] disabled
854 18:37:58.563980 PCI: 00:19.1 [8086/0000] bus ops
855 18:37:58.567691 PCI: 00:19.1 [8086/a0c6] enabled
856 18:37:58.570571 PCI: 00:1d.0 [8086/0000] bus ops
857 18:37:58.574178 PCI: 00:1d.0 [8086/a0b0] enabled
858 18:37:58.576993 PCI: 00:1e.0 [8086/0000] ops
859 18:37:58.580906 PCI: 00:1e.0 [8086/a0a8] enabled
860 18:37:58.584015 PCI: 00:1e.2 [8086/0000] bus ops
861 18:37:58.587560 PCI: 00:1e.2 [8086/a0aa] enabled
862 18:37:58.590321 PCI: 00:1e.3 [8086/0000] bus ops
863 18:37:58.593778 PCI: 00:1e.3 [8086/a0ab] enabled
864 18:37:58.596853 PCI: 00:1f.0 [8086/0000] bus ops
865 18:37:58.600457 PCI: 00:1f.0 [8086/a087] enabled
866 18:37:58.601050 RTC Init
867 18:37:58.603318 Set power on after power failure.
868 18:37:58.606889 Disabling Deep S3
869 18:37:58.610780 Disabling Deep S3
870 18:37:58.611377 Disabling Deep S4
871 18:37:58.613384 Disabling Deep S4
872 18:37:58.613919 Disabling Deep S5
873 18:37:58.617095 Disabling Deep S5
874 18:37:58.620428 PCI: 00:1f.2 [0000/0000] hidden
875 18:37:58.624020 PCI: 00:1f.3 [8086/0000] bus ops
876 18:37:58.626995 PCI: 00:1f.3 [8086/a0c8] enabled
877 18:37:58.630643 PCI: 00:1f.5 [8086/0000] bus ops
878 18:37:58.633324 PCI: 00:1f.5 [8086/a0a4] enabled
879 18:37:58.637244 PCI: Leftover static devices:
880 18:37:58.637833 PCI: 00:10.2
881 18:37:58.639911 PCI: 00:10.6
882 18:37:58.640399 PCI: 00:10.7
883 18:37:58.640842 PCI: 00:06.0
884 18:37:58.643422 PCI: 00:07.1
885 18:37:58.644043 PCI: 00:07.2
886 18:37:58.646818 PCI: 00:07.3
887 18:37:58.647308 PCI: 00:09.0
888 18:37:58.649673 PCI: 00:0d.1
889 18:37:58.650160 PCI: 00:0d.2
890 18:37:58.650578 PCI: 00:0d.3
891 18:37:58.653303 PCI: 00:0e.0
892 18:37:58.653793 PCI: 00:12.0
893 18:37:58.657078 PCI: 00:12.6
894 18:37:58.657678 PCI: 00:13.0
895 18:37:58.658069 PCI: 00:14.1
896 18:37:58.659820 PCI: 00:16.1
897 18:37:58.660314 PCI: 00:16.2
898 18:37:58.663255 PCI: 00:16.3
899 18:37:58.663748 PCI: 00:16.4
900 18:37:58.666191 PCI: 00:16.5
901 18:37:58.666717 PCI: 00:17.0
902 18:37:58.667146 PCI: 00:19.2
903 18:37:58.669745 PCI: 00:1e.1
904 18:37:58.670246 PCI: 00:1f.1
905 18:37:58.672862 PCI: 00:1f.4
906 18:37:58.673453 PCI: 00:1f.6
907 18:37:58.673844 PCI: 00:1f.7
908 18:37:58.676298 PCI: Check your devicetree.cb.
909 18:37:58.679449 PCI: 00:02.0 scanning...
910 18:37:58.683363 scan_generic_bus for PCI: 00:02.0
911 18:37:58.686315 scan_generic_bus for PCI: 00:02.0 done
912 18:37:58.693170 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 18:37:58.696304 PCI: 00:04.0 scanning...
914 18:37:58.699573 scan_generic_bus for PCI: 00:04.0
915 18:37:58.700171 GENERIC: 0.0 enabled
916 18:37:58.705821 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 18:37:58.713114 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 18:37:58.713801 PCI: 00:0d.0 scanning...
919 18:37:58.715969 scan_static_bus for PCI: 00:0d.0
920 18:37:58.719842 USB0 port 0 enabled
921 18:37:58.722569 USB0 port 0 scanning...
922 18:37:58.726116 scan_static_bus for USB0 port 0
923 18:37:58.729206 USB3 port 0 enabled
924 18:37:58.729816 USB3 port 1 enabled
925 18:37:58.732527 USB3 port 2 disabled
926 18:37:58.733021 USB3 port 3 disabled
927 18:37:58.736197 USB3 port 0 scanning...
928 18:37:58.739380 scan_static_bus for USB3 port 0
929 18:37:58.743066 scan_static_bus for USB3 port 0 done
930 18:37:58.749164 scan_bus: bus USB3 port 0 finished in 6 msecs
931 18:37:58.749811 USB3 port 1 scanning...
932 18:37:58.752562 scan_static_bus for USB3 port 1
933 18:37:58.759025 scan_static_bus for USB3 port 1 done
934 18:37:58.762607 scan_bus: bus USB3 port 1 finished in 6 msecs
935 18:37:58.765572 scan_static_bus for USB0 port 0 done
936 18:37:58.769097 scan_bus: bus USB0 port 0 finished in 43 msecs
937 18:37:58.775637 scan_static_bus for PCI: 00:0d.0 done
938 18:37:58.779333 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 18:37:58.782600 PCI: 00:14.0 scanning...
940 18:37:58.786272 scan_static_bus for PCI: 00:14.0
941 18:37:58.789292 USB0 port 0 enabled
942 18:37:58.789894 USB0 port 0 scanning...
943 18:37:58.792669 scan_static_bus for USB0 port 0
944 18:37:58.795591 USB2 port 0 disabled
945 18:37:58.799295 USB2 port 1 enabled
946 18:37:58.799892 USB2 port 2 enabled
947 18:37:58.802308 USB2 port 3 disabled
948 18:37:58.802934 USB2 port 4 enabled
949 18:37:58.805940 USB2 port 5 disabled
950 18:37:58.809373 USB2 port 6 disabled
951 18:37:58.809980 USB2 port 7 disabled
952 18:37:58.812095 USB2 port 8 disabled
953 18:37:58.815788 USB2 port 9 disabled
954 18:37:58.816284 USB3 port 0 disabled
955 18:37:58.818730 USB3 port 1 enabled
956 18:37:58.822620 USB3 port 2 disabled
957 18:37:58.823210 USB3 port 3 disabled
958 18:37:58.825343 USB2 port 1 scanning...
959 18:37:58.828903 scan_static_bus for USB2 port 1
960 18:37:58.831879 scan_static_bus for USB2 port 1 done
961 18:37:58.839209 scan_bus: bus USB2 port 1 finished in 6 msecs
962 18:37:58.839803 USB2 port 2 scanning...
963 18:37:58.841933 scan_static_bus for USB2 port 2
964 18:37:58.848831 scan_static_bus for USB2 port 2 done
965 18:37:58.851642 scan_bus: bus USB2 port 2 finished in 6 msecs
966 18:37:58.855245 USB2 port 4 scanning...
967 18:37:58.859060 scan_static_bus for USB2 port 4
968 18:37:58.861895 scan_static_bus for USB2 port 4 done
969 18:37:58.865522 scan_bus: bus USB2 port 4 finished in 6 msecs
970 18:37:58.868438 USB3 port 1 scanning...
971 18:37:58.871839 scan_static_bus for USB3 port 1
972 18:37:58.874928 scan_static_bus for USB3 port 1 done
973 18:37:58.878554 scan_bus: bus USB3 port 1 finished in 6 msecs
974 18:37:58.885222 scan_static_bus for USB0 port 0 done
975 18:37:58.888316 scan_bus: bus USB0 port 0 finished in 93 msecs
976 18:37:58.891286 scan_static_bus for PCI: 00:14.0 done
977 18:37:58.898130 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 18:37:58.898749 PCI: 00:14.3 scanning...
979 18:37:58.901820 scan_static_bus for PCI: 00:14.3
980 18:37:58.905194 GENERIC: 0.0 enabled
981 18:37:58.908268 scan_static_bus for PCI: 00:14.3 done
982 18:37:58.915076 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 18:37:58.915688 PCI: 00:15.0 scanning...
984 18:37:58.918560 scan_static_bus for PCI: 00:15.0
985 18:37:58.921675 I2C: 00:1a enabled
986 18:37:58.924672 I2C: 00:31 enabled
987 18:37:58.925162 I2C: 00:32 enabled
988 18:37:58.928279 scan_static_bus for PCI: 00:15.0 done
989 18:37:58.934805 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 18:37:58.938495 PCI: 00:15.1 scanning...
991 18:37:58.941963 scan_static_bus for PCI: 00:15.1
992 18:37:58.942579 I2C: 00:10 enabled
993 18:37:58.944880 scan_static_bus for PCI: 00:15.1 done
994 18:37:58.951223 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 18:37:58.954927 PCI: 00:15.2 scanning...
996 18:37:58.957808 scan_static_bus for PCI: 00:15.2
997 18:37:58.961758 scan_static_bus for PCI: 00:15.2 done
998 18:37:58.965194 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 18:37:58.968347 PCI: 00:15.3 scanning...
1000 18:37:58.971773 scan_static_bus for PCI: 00:15.3
1001 18:37:58.975315 scan_static_bus for PCI: 00:15.3 done
1002 18:37:58.981864 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 18:37:58.982467 PCI: 00:19.1 scanning...
1004 18:37:58.984983 scan_static_bus for PCI: 00:19.1
1005 18:37:58.988499 I2C: 00:15 enabled
1006 18:37:58.991301 scan_static_bus for PCI: 00:19.1 done
1007 18:37:58.998280 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 18:37:58.998912 PCI: 00:1d.0 scanning...
1009 18:37:59.001613 do_pci_scan_bridge for PCI: 00:1d.0
1010 18:37:59.005176 PCI: pci_scan_bus for bus 01
1011 18:37:59.008309 PCI: 01:00.0 [1c5c/174a] enabled
1012 18:37:59.011650 GENERIC: 0.0 enabled
1013 18:37:59.014473 Enabling Common Clock Configuration
1014 18:37:59.021092 L1 Sub-State supported from root port 29
1015 18:37:59.021582 L1 Sub-State Support = 0xf
1016 18:37:59.024478 CommonModeRestoreTime = 0x28
1017 18:37:59.031326 Power On Value = 0x16, Power On Scale = 0x0
1018 18:37:59.031960 ASPM: Enabled L1
1019 18:37:59.034197 PCIe: Max_Payload_Size adjusted to 128
1020 18:37:59.040898 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 18:37:59.044153 PCI: 00:1e.2 scanning...
1022 18:37:59.047771 scan_generic_bus for PCI: 00:1e.2
1023 18:37:59.048265 SPI: 00 enabled
1024 18:37:59.054623 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 18:37:59.057791 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 18:37:59.060982 PCI: 00:1e.3 scanning...
1027 18:37:59.063935 scan_generic_bus for PCI: 00:1e.3
1028 18:37:59.067681 SPI: 00 enabled
1029 18:37:59.074010 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 18:37:59.077352 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 18:37:59.081209 PCI: 00:1f.0 scanning...
1032 18:37:59.084028 scan_static_bus for PCI: 00:1f.0
1033 18:37:59.087471 PNP: 0c09.0 enabled
1034 18:37:59.087962 PNP: 0c09.0 scanning...
1035 18:37:59.091082 scan_static_bus for PNP: 0c09.0
1036 18:37:59.094174 scan_static_bus for PNP: 0c09.0 done
1037 18:37:59.100672 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 18:37:59.103959 scan_static_bus for PCI: 00:1f.0 done
1039 18:37:59.107154 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 18:37:59.110145 PCI: 00:1f.2 scanning...
1041 18:37:59.113635 scan_static_bus for PCI: 00:1f.2
1042 18:37:59.116923 GENERIC: 0.0 enabled
1043 18:37:59.120533 GENERIC: 0.0 scanning...
1044 18:37:59.123495 scan_static_bus for GENERIC: 0.0
1045 18:37:59.123986 GENERIC: 0.0 enabled
1046 18:37:59.127100 GENERIC: 1.0 enabled
1047 18:37:59.130366 scan_static_bus for GENERIC: 0.0 done
1048 18:37:59.136779 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 18:37:59.140294 scan_static_bus for PCI: 00:1f.2 done
1050 18:37:59.143181 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 18:37:59.146845 PCI: 00:1f.3 scanning...
1052 18:37:59.150387 scan_static_bus for PCI: 00:1f.3
1053 18:37:59.153700 scan_static_bus for PCI: 00:1f.3 done
1054 18:37:59.159922 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 18:37:59.160428 PCI: 00:1f.5 scanning...
1056 18:37:59.167129 scan_generic_bus for PCI: 00:1f.5
1057 18:37:59.170309 scan_generic_bus for PCI: 00:1f.5 done
1058 18:37:59.173821 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 18:37:59.180025 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1060 18:37:59.183223 scan_static_bus for Root Device done
1061 18:37:59.186980 scan_bus: bus Root Device finished in 737 msecs
1062 18:37:59.187583 done
1063 18:37:59.193537 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 18:37:59.196869 Chrome EC: UHEPI supported
1065 18:37:59.203540 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 18:37:59.210087 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 18:37:59.213004 SPI flash protection: WPSW=0 SRP0=0
1068 18:37:59.216373 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 18:37:59.222903 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 18:37:59.226413 found VGA at PCI: 00:02.0
1071 18:37:59.229305 Setting up VGA for PCI: 00:02.0
1072 18:37:59.236017 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 18:37:59.239709 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 18:37:59.242815 Allocating resources...
1075 18:37:59.243312 Reading resources...
1076 18:37:59.249545 Root Device read_resources bus 0 link: 0
1077 18:37:59.252916 DOMAIN: 0000 read_resources bus 0 link: 0
1078 18:37:59.259484 PCI: 00:04.0 read_resources bus 1 link: 0
1079 18:37:59.262852 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 18:37:59.268935 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 18:37:59.272562 USB0 port 0 read_resources bus 0 link: 0
1082 18:37:59.278935 USB0 port 0 read_resources bus 0 link: 0 done
1083 18:37:59.282601 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 18:37:59.286311 PCI: 00:14.0 read_resources bus 0 link: 0
1085 18:37:59.293066 USB0 port 0 read_resources bus 0 link: 0
1086 18:37:59.295769 USB0 port 0 read_resources bus 0 link: 0 done
1087 18:37:59.302728 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 18:37:59.306121 PCI: 00:14.3 read_resources bus 0 link: 0
1089 18:37:59.312603 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 18:37:59.316002 PCI: 00:15.0 read_resources bus 0 link: 0
1091 18:37:59.322680 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 18:37:59.326144 PCI: 00:15.1 read_resources bus 0 link: 0
1093 18:37:59.332944 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 18:37:59.335957 PCI: 00:19.1 read_resources bus 0 link: 0
1095 18:37:59.343055 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 18:37:59.346369 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 18:37:59.353041 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 18:37:59.355853 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 18:37:59.363411 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 18:37:59.366485 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 18:37:59.372975 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 18:37:59.376711 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 18:37:59.382331 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 18:37:59.385781 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 18:37:59.389224 GENERIC: 0.0 read_resources bus 0 link: 0
1106 18:37:59.396758 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 18:37:59.400200 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 18:37:59.407260 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 18:37:59.410246 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 18:37:59.416692 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 18:37:59.420421 Root Device read_resources bus 0 link: 0 done
1112 18:37:59.424079 Done reading resources.
1113 18:37:59.430486 Show resources in subtree (Root Device)...After reading.
1114 18:37:59.433414 Root Device child on link 0 DOMAIN: 0000
1115 18:37:59.436997 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 18:37:59.446949 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 18:37:59.457042 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 18:37:59.459967 PCI: 00:00.0
1119 18:37:59.469896 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 18:37:59.476693 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 18:37:59.486249 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 18:37:59.496387 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 18:37:59.506677 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 18:37:59.516750 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 18:37:59.526108 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 18:37:59.532692 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 18:37:59.543129 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 18:37:59.552870 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 18:37:59.562680 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 18:37:59.572853 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 18:37:59.582931 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 18:37:59.589342 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 18:37:59.599586 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 18:37:59.609461 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 18:37:59.618935 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 18:37:59.628919 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 18:37:59.639006 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 18:37:59.649098 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 18:37:59.649699 PCI: 00:02.0
1140 18:37:59.658648 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 18:37:59.668781 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 18:37:59.678686 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 18:37:59.681766 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 18:37:59.692194 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 18:37:59.695491 GENERIC: 0.0
1146 18:37:59.696074 PCI: 00:05.0
1147 18:37:59.705648 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 18:37:59.711690 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 18:37:59.712284 GENERIC: 0.0
1150 18:37:59.715136 PCI: 00:08.0
1151 18:37:59.725215 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 18:37:59.725814 PCI: 00:0a.0
1153 18:37:59.731822 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 18:37:59.741752 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 18:37:59.745328 USB0 port 0 child on link 0 USB3 port 0
1156 18:37:59.748089 USB3 port 0
1157 18:37:59.748599 USB3 port 1
1158 18:37:59.751550 USB3 port 2
1159 18:37:59.752111 USB3 port 3
1160 18:37:59.754782 PCI: 00:14.0 child on link 0 USB0 port 0
1161 18:37:59.764488 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 18:37:59.770988 USB0 port 0 child on link 0 USB2 port 0
1163 18:37:59.771499 USB2 port 0
1164 18:37:59.774506 USB2 port 1
1165 18:37:59.775041 USB2 port 2
1166 18:37:59.777661 USB2 port 3
1167 18:37:59.778155 USB2 port 4
1168 18:37:59.781248 USB2 port 5
1169 18:37:59.784834 USB2 port 6
1170 18:37:59.785554 USB2 port 7
1171 18:37:59.787832 USB2 port 8
1172 18:37:59.788420 USB2 port 9
1173 18:37:59.791252 USB3 port 0
1174 18:37:59.791743 USB3 port 1
1175 18:37:59.794445 USB3 port 2
1176 18:37:59.795120 USB3 port 3
1177 18:37:59.797735 PCI: 00:14.2
1178 18:37:59.807316 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 18:37:59.817482 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 18:37:59.820924 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 18:37:59.830653 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 18:37:59.833928 GENERIC: 0.0
1183 18:37:59.837772 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 18:37:59.847162 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 18:37:59.850285 I2C: 00:1a
1186 18:37:59.850905 I2C: 00:31
1187 18:37:59.851299 I2C: 00:32
1188 18:37:59.856785 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 18:37:59.866839 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 18:37:59.867486 I2C: 00:10
1191 18:37:59.870642 PCI: 00:15.2
1192 18:37:59.880333 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 18:37:59.880899 PCI: 00:15.3
1194 18:37:59.890306 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 18:37:59.893379 PCI: 00:16.0
1196 18:37:59.904032 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 18:37:59.904630 PCI: 00:19.0
1198 18:37:59.910029 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 18:37:59.919943 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 18:37:59.920558 I2C: 00:15
1201 18:37:59.922993 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 18:37:59.933123 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 18:37:59.943246 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 18:37:59.952883 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 18:37:59.953450 GENERIC: 0.0
1206 18:37:59.956455 PCI: 01:00.0
1207 18:37:59.966139 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 18:37:59.976358 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 18:37:59.985802 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 18:37:59.986299 PCI: 00:1e.0
1211 18:37:59.995633 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 18:38:00.002768 PCI: 00:1e.2 child on link 0 SPI: 00
1213 18:38:00.012517 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 18:38:00.013118 SPI: 00
1215 18:38:00.015261 PCI: 00:1e.3 child on link 0 SPI: 00
1216 18:38:00.025937 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 18:38:00.028774 SPI: 00
1218 18:38:00.032211 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 18:38:00.042163 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 18:38:00.042771 PNP: 0c09.0
1221 18:38:00.051715 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 18:38:00.055452 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 18:38:00.065509 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 18:38:00.075254 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 18:38:00.078679 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 18:38:00.081931 GENERIC: 0.0
1227 18:38:00.082582 GENERIC: 1.0
1228 18:38:00.085358 PCI: 00:1f.3
1229 18:38:00.095001 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 18:38:00.105377 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 18:38:00.105962 PCI: 00:1f.5
1232 18:38:00.114783 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 18:38:00.118203 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 18:38:00.121235 APIC: 00
1235 18:38:00.121758 APIC: 01
1236 18:38:00.124408 APIC: 03
1237 18:38:00.124897 APIC: 06
1238 18:38:00.125286 APIC: 05
1239 18:38:00.128201 APIC: 04
1240 18:38:00.128807 APIC: 02
1241 18:38:00.131062 APIC: 07
1242 18:38:00.137539 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 18:38:00.144179 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 18:38:00.147512 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 18:38:00.154430 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 18:38:00.161069 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 18:38:00.164803 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 18:38:00.167493 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 18:38:00.174136 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 18:38:00.180783 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 18:38:00.190442 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 18:38:00.197393 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 18:38:00.203653 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 18:38:00.210946 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 18:38:00.216938 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 18:38:00.227395 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 18:38:00.230371 DOMAIN: 0000: Resource ranges:
1258 18:38:00.233802 * Base: 1000, Size: 800, Tag: 100
1259 18:38:00.237317 * Base: 1900, Size: e700, Tag: 100
1260 18:38:00.243790 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 18:38:00.250409 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 18:38:00.257122 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 18:38:00.263632 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 18:38:00.269879 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 18:38:00.280047 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 18:38:00.286667 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 18:38:00.293346 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 18:38:00.302881 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 18:38:00.309845 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 18:38:00.316386 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 18:38:00.326764 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 18:38:00.332732 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 18:38:00.339494 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 18:38:00.349757 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 18:38:00.356406 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 18:38:00.362376 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 18:38:00.372478 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 18:38:00.379092 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 18:38:00.385669 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 18:38:00.395628 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 18:38:00.402845 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 18:38:00.409498 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 18:38:00.418908 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 18:38:00.425392 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 18:38:00.429225 DOMAIN: 0000: Resource ranges:
1286 18:38:00.432039 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 18:38:00.438563 * Base: d0000000, Size: 28000000, Tag: 200
1288 18:38:00.442039 * Base: fa000000, Size: 1000000, Tag: 200
1289 18:38:00.445719 * Base: fb001000, Size: 2fff000, Tag: 200
1290 18:38:00.448494 * Base: fe010000, Size: 2e000, Tag: 200
1291 18:38:00.455499 * Base: fe03f000, Size: d41000, Tag: 200
1292 18:38:00.458416 * Base: fed88000, Size: 8000, Tag: 200
1293 18:38:00.462316 * Base: fed93000, Size: d000, Tag: 200
1294 18:38:00.465262 * Base: feda2000, Size: 1e000, Tag: 200
1295 18:38:00.471673 * Base: fede0000, Size: 1220000, Tag: 200
1296 18:38:00.475176 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 18:38:00.481946 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 18:38:00.488638 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 18:38:00.495178 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 18:38:00.501782 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 18:38:00.508564 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 18:38:00.514961 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 18:38:00.521066 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 18:38:00.528064 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 18:38:00.534488 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 18:38:00.541240 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 18:38:00.547465 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 18:38:00.554429 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 18:38:00.561157 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 18:38:00.567669 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 18:38:00.574276 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 18:38:00.580748 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 18:38:00.587319 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 18:38:00.593900 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 18:38:00.601143 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 18:38:00.607254 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 18:38:00.613610 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 18:38:00.620701 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 18:38:00.630392 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 18:38:00.636835 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 18:38:00.640039 PCI: 00:1d.0: Resource ranges:
1322 18:38:00.643695 * Base: 7fc00000, Size: 100000, Tag: 200
1323 18:38:00.650382 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 18:38:00.657105 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 18:38:00.663639 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 18:38:00.673258 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 18:38:00.679934 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 18:38:00.683363 Root Device assign_resources, bus 0 link: 0
1329 18:38:00.690220 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 18:38:00.696729 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 18:38:00.706718 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 18:38:00.713416 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 18:38:00.723069 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 18:38:00.725953 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 18:38:00.732428 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 18:38:00.739047 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 18:38:00.748950 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 18:38:00.755879 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 18:38:00.758817 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 18:38:00.765822 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 18:38:00.772098 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 18:38:00.778768 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 18:38:00.782019 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 18:38:00.792161 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 18:38:00.798668 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 18:38:00.808693 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 18:38:00.811746 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 18:38:00.815346 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 18:38:00.825114 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 18:38:00.828481 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 18:38:00.834819 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 18:38:00.841688 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 18:38:00.845181 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 18:38:00.851736 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 18:38:00.858619 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 18:38:00.868267 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 18:38:00.874599 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 18:38:00.884340 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 18:38:00.888103 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 18:38:00.894250 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 18:38:00.901070 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 18:38:00.910921 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 18:38:00.920650 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 18:38:00.924269 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 18:38:00.934342 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 18:38:00.941166 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 18:38:00.947051 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 18:38:00.954313 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 18:38:00.960808 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 18:38:00.967373 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 18:38:00.970935 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 18:38:00.980611 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 18:38:00.983597 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 18:38:00.987187 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 18:38:00.994036 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 18:38:00.997508 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 18:38:01.004036 LPC: Trying to open IO window from 800 size 1ff
1378 18:38:01.010596 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 18:38:01.020325 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 18:38:01.026650 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 18:38:01.033520 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 18:38:01.036860 Root Device assign_resources, bus 0 link: 0
1383 18:38:01.040485 Done setting resources.
1384 18:38:01.046703 Show resources in subtree (Root Device)...After assigning values.
1385 18:38:01.050147 Root Device child on link 0 DOMAIN: 0000
1386 18:38:01.053301 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 18:38:01.063082 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 18:38:01.072724 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 18:38:01.076104 PCI: 00:00.0
1390 18:38:01.086387 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 18:38:01.096347 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 18:38:01.102825 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 18:38:01.112332 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 18:38:01.122384 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 18:38:01.132434 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 18:38:01.142003 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 18:38:01.152185 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 18:38:01.158725 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 18:38:01.168668 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 18:38:01.178451 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 18:38:01.188126 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 18:38:01.198344 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 18:38:01.208385 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 18:38:01.214863 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 18:38:01.224922 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 18:38:01.234730 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 18:38:01.244342 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 18:38:01.254554 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 18:38:01.264524 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 18:38:01.265103 PCI: 00:02.0
1411 18:38:01.277578 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 18:38:01.287202 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 18:38:01.297665 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 18:38:01.300618 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 18:38:01.311053 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 18:38:01.313858 GENERIC: 0.0
1417 18:38:01.314442 PCI: 00:05.0
1418 18:38:01.324004 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 18:38:01.330287 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 18:38:01.330812 GENERIC: 0.0
1421 18:38:01.333324 PCI: 00:08.0
1422 18:38:01.343712 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 18:38:01.344213 PCI: 00:0a.0
1424 18:38:01.350351 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 18:38:01.360352 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 18:38:01.363007 USB0 port 0 child on link 0 USB3 port 0
1427 18:38:01.366829 USB3 port 0
1428 18:38:01.367390 USB3 port 1
1429 18:38:01.370047 USB3 port 2
1430 18:38:01.372758 USB3 port 3
1431 18:38:01.376532 PCI: 00:14.0 child on link 0 USB0 port 0
1432 18:38:01.386159 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 18:38:01.389642 USB0 port 0 child on link 0 USB2 port 0
1434 18:38:01.392551 USB2 port 0
1435 18:38:01.393044 USB2 port 1
1436 18:38:01.396430 USB2 port 2
1437 18:38:01.399100 USB2 port 3
1438 18:38:01.399601 USB2 port 4
1439 18:38:01.403172 USB2 port 5
1440 18:38:01.403768 USB2 port 6
1441 18:38:01.405890 USB2 port 7
1442 18:38:01.406416 USB2 port 8
1443 18:38:01.409276 USB2 port 9
1444 18:38:01.409873 USB3 port 0
1445 18:38:01.412767 USB3 port 1
1446 18:38:01.413553 USB3 port 2
1447 18:38:01.416286 USB3 port 3
1448 18:38:01.416974 PCI: 00:14.2
1449 18:38:01.425904 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 18:38:01.438686 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 18:38:01.442346 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 18:38:01.452186 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 18:38:01.455610 GENERIC: 0.0
1454 18:38:01.458889 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 18:38:01.468960 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 18:38:01.471686 I2C: 00:1a
1457 18:38:01.472210 I2C: 00:31
1458 18:38:01.475100 I2C: 00:32
1459 18:38:01.478240 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 18:38:01.488431 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 18:38:01.488994 I2C: 00:10
1462 18:38:01.491414 PCI: 00:15.2
1463 18:38:01.501755 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 18:38:01.504983 PCI: 00:15.3
1465 18:38:01.514583 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 18:38:01.515147 PCI: 00:16.0
1467 18:38:01.524431 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 18:38:01.527846 PCI: 00:19.0
1469 18:38:01.531255 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 18:38:01.541342 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 18:38:01.544381 I2C: 00:15
1472 18:38:01.547346 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 18:38:01.557531 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 18:38:01.567793 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 18:38:01.580693 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 18:38:01.581193 GENERIC: 0.0
1477 18:38:01.584078 PCI: 01:00.0
1478 18:38:01.594232 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 18:38:01.603827 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 18:38:01.614164 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 18:38:01.617125 PCI: 00:1e.0
1482 18:38:01.627079 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 18:38:01.630603 PCI: 00:1e.2 child on link 0 SPI: 00
1484 18:38:01.640552 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 18:38:01.643463 SPI: 00
1486 18:38:01.646587 PCI: 00:1e.3 child on link 0 SPI: 00
1487 18:38:01.656515 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 18:38:01.657103 SPI: 00
1489 18:38:01.663483 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 18:38:01.669933 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 18:38:01.673471 PNP: 0c09.0
1492 18:38:01.683091 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 18:38:01.686626 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 18:38:01.697006 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 18:38:01.706382 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 18:38:01.710157 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 18:38:01.713278 GENERIC: 0.0
1498 18:38:01.713871 GENERIC: 1.0
1499 18:38:01.717007 PCI: 00:1f.3
1500 18:38:01.726236 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 18:38:01.736420 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 18:38:01.737009 PCI: 00:1f.5
1503 18:38:01.746714 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 18:38:01.753045 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 18:38:01.753644 APIC: 00
1506 18:38:01.756741 APIC: 01
1507 18:38:01.757289 APIC: 03
1508 18:38:01.757686 APIC: 06
1509 18:38:01.759510 APIC: 05
1510 18:38:01.760001 APIC: 04
1511 18:38:01.760457 APIC: 02
1512 18:38:01.763445 APIC: 07
1513 18:38:01.766450 Done allocating resources.
1514 18:38:01.772820 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 18:38:01.776109 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 18:38:01.779066 Configure GPIOs for I2S audio on UP4.
1517 18:38:01.787394 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 18:38:01.790906 Enabling resources...
1519 18:38:01.793931 PCI: 00:00.0 subsystem <- 8086/9a12
1520 18:38:01.797554 PCI: 00:00.0 cmd <- 06
1521 18:38:01.800654 PCI: 00:02.0 subsystem <- 8086/9a40
1522 18:38:01.803862 PCI: 00:02.0 cmd <- 03
1523 18:38:01.807493 PCI: 00:04.0 subsystem <- 8086/9a03
1524 18:38:01.810593 PCI: 00:04.0 cmd <- 02
1525 18:38:01.813706 PCI: 00:05.0 subsystem <- 8086/9a19
1526 18:38:01.814201 PCI: 00:05.0 cmd <- 02
1527 18:38:01.820385 PCI: 00:08.0 subsystem <- 8086/9a11
1528 18:38:01.820883 PCI: 00:08.0 cmd <- 06
1529 18:38:01.823879 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 18:38:01.826995 PCI: 00:0d.0 cmd <- 02
1531 18:38:01.830449 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 18:38:01.833799 PCI: 00:14.0 cmd <- 02
1533 18:38:01.836752 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 18:38:01.840297 PCI: 00:14.2 cmd <- 02
1535 18:38:01.843600 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 18:38:01.846423 PCI: 00:14.3 cmd <- 02
1537 18:38:01.850005 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 18:38:01.853074 PCI: 00:15.0 cmd <- 02
1539 18:38:01.856556 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 18:38:01.859572 PCI: 00:15.1 cmd <- 02
1541 18:38:01.863148 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 18:38:01.863300 PCI: 00:15.2 cmd <- 02
1543 18:38:01.869814 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 18:38:01.869948 PCI: 00:15.3 cmd <- 02
1545 18:38:01.873393 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 18:38:01.876284 PCI: 00:16.0 cmd <- 02
1547 18:38:01.879903 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 18:38:01.882820 PCI: 00:19.1 cmd <- 02
1549 18:38:01.886313 PCI: 00:1d.0 bridge ctrl <- 0013
1550 18:38:01.889297 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 18:38:01.892874 PCI: 00:1d.0 cmd <- 06
1552 18:38:01.895890 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 18:38:01.899421 PCI: 00:1e.0 cmd <- 06
1554 18:38:01.902962 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 18:38:01.906158 PCI: 00:1e.2 cmd <- 06
1556 18:38:01.909073 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 18:38:01.912555 PCI: 00:1e.3 cmd <- 02
1558 18:38:01.916265 PCI: 00:1f.0 subsystem <- 8086/a087
1559 18:38:01.919350 PCI: 00:1f.0 cmd <- 407
1560 18:38:01.922334 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 18:38:01.922432 PCI: 00:1f.3 cmd <- 02
1562 18:38:01.928765 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 18:38:01.928880 PCI: 00:1f.5 cmd <- 406
1564 18:38:01.934218 PCI: 01:00.0 cmd <- 02
1565 18:38:01.938926 done.
1566 18:38:01.942354 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 18:38:01.946002 Initializing devices...
1568 18:38:01.948977 Root Device init
1569 18:38:01.952521 Chrome EC: Set SMI mask to 0x0000000000000000
1570 18:38:01.958792 Chrome EC: clear events_b mask to 0x0000000000000000
1571 18:38:01.965566 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 18:38:01.971883 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 18:38:01.978672 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 18:38:01.981792 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 18:38:01.988906 fw_config match found: DB_USB=USB3_ACTIVE
1576 18:38:01.991736 Configure Right Type-C port orientation for retimer
1577 18:38:01.995278 Root Device init finished in 44 msecs
1578 18:38:01.999655 PCI: 00:00.0 init
1579 18:38:02.002523 CPU TDP = 9 Watts
1580 18:38:02.002683 CPU PL1 = 9 Watts
1581 18:38:02.006146 CPU PL2 = 40 Watts
1582 18:38:02.009769 CPU PL4 = 83 Watts
1583 18:38:02.012767 PCI: 00:00.0 init finished in 8 msecs
1584 18:38:02.012976 PCI: 00:02.0 init
1585 18:38:02.016238 GMA: Found VBT in CBFS
1586 18:38:02.019519 GMA: Found valid VBT in CBFS
1587 18:38:02.025998 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 18:38:02.032663 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 18:38:02.036032 PCI: 00:02.0 init finished in 18 msecs
1590 18:38:02.039593 PCI: 00:05.0 init
1591 18:38:02.042466 PCI: 00:05.0 init finished in 0 msecs
1592 18:38:02.045982 PCI: 00:08.0 init
1593 18:38:02.049644 PCI: 00:08.0 init finished in 0 msecs
1594 18:38:02.053374 PCI: 00:14.0 init
1595 18:38:02.056079 PCI: 00:14.0 init finished in 0 msecs
1596 18:38:02.059598 PCI: 00:14.2 init
1597 18:38:02.062576 PCI: 00:14.2 init finished in 0 msecs
1598 18:38:02.066453 PCI: 00:15.0 init
1599 18:38:02.069383 I2C bus 0 version 0x3230302a
1600 18:38:02.073208 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 18:38:02.075938 PCI: 00:15.0 init finished in 6 msecs
1602 18:38:02.076455 PCI: 00:15.1 init
1603 18:38:02.079016 I2C bus 1 version 0x3230302a
1604 18:38:02.082690 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 18:38:02.089239 PCI: 00:15.1 init finished in 6 msecs
1606 18:38:02.089729 PCI: 00:15.2 init
1607 18:38:02.092621 I2C bus 2 version 0x3230302a
1608 18:38:02.095542 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 18:38:02.098989 PCI: 00:15.2 init finished in 6 msecs
1610 18:38:02.102861 PCI: 00:15.3 init
1611 18:38:02.105632 I2C bus 3 version 0x3230302a
1612 18:38:02.109160 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 18:38:02.112748 PCI: 00:15.3 init finished in 6 msecs
1614 18:38:02.115680 PCI: 00:16.0 init
1615 18:38:02.119456 PCI: 00:16.0 init finished in 0 msecs
1616 18:38:02.122697 PCI: 00:19.1 init
1617 18:38:02.125486 I2C bus 5 version 0x3230302a
1618 18:38:02.129095 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 18:38:02.132042 PCI: 00:19.1 init finished in 6 msecs
1620 18:38:02.135768 PCI: 00:1d.0 init
1621 18:38:02.139075 Initializing PCH PCIe bridge.
1622 18:38:02.142124 PCI: 00:1d.0 init finished in 3 msecs
1623 18:38:02.145526 PCI: 00:1f.0 init
1624 18:38:02.149238 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 18:38:02.152153 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 18:38:02.155630 IOAPIC: ID = 0x02
1627 18:38:02.158576 IOAPIC: Dumping registers
1628 18:38:02.159071 reg 0x0000: 0x02000000
1629 18:38:02.162063 reg 0x0001: 0x00770020
1630 18:38:02.165305 reg 0x0002: 0x00000000
1631 18:38:02.168266 PCI: 00:1f.0 init finished in 21 msecs
1632 18:38:02.171989 PCI: 00:1f.2 init
1633 18:38:02.175610 Disabling ACPI via APMC.
1634 18:38:02.176103 APMC done.
1635 18:38:02.181927 PCI: 00:1f.2 init finished in 5 msecs
1636 18:38:02.192223 PCI: 01:00.0 init
1637 18:38:02.195712 PCI: 01:00.0 init finished in 0 msecs
1638 18:38:02.199321 PNP: 0c09.0 init
1639 18:38:02.202446 Google Chrome EC uptime: 8.359 seconds
1640 18:38:02.208989 Google Chrome AP resets since EC boot: 1
1641 18:38:02.212483 Google Chrome most recent AP reset causes:
1642 18:38:02.215417 0.346: 32775 shutdown: entering G3
1643 18:38:02.221974 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1644 18:38:02.225714 PNP: 0c09.0 init finished in 22 msecs
1645 18:38:02.232022 Devices initialized
1646 18:38:02.234630 Show all devs... After init.
1647 18:38:02.238135 Root Device: enabled 1
1648 18:38:02.238668 DOMAIN: 0000: enabled 1
1649 18:38:02.241143 CPU_CLUSTER: 0: enabled 1
1650 18:38:02.244106 PCI: 00:00.0: enabled 1
1651 18:38:02.247926 PCI: 00:02.0: enabled 1
1652 18:38:02.248432 PCI: 00:04.0: enabled 1
1653 18:38:02.251472 PCI: 00:05.0: enabled 1
1654 18:38:02.254488 PCI: 00:06.0: enabled 0
1655 18:38:02.257958 PCI: 00:07.0: enabled 0
1656 18:38:02.258618 PCI: 00:07.1: enabled 0
1657 18:38:02.261419 PCI: 00:07.2: enabled 0
1658 18:38:02.264312 PCI: 00:07.3: enabled 0
1659 18:38:02.267941 PCI: 00:08.0: enabled 1
1660 18:38:02.268435 PCI: 00:09.0: enabled 0
1661 18:38:02.270929 PCI: 00:0a.0: enabled 0
1662 18:38:02.274131 PCI: 00:0d.0: enabled 1
1663 18:38:02.277626 PCI: 00:0d.1: enabled 0
1664 18:38:02.278155 PCI: 00:0d.2: enabled 0
1665 18:38:02.281269 PCI: 00:0d.3: enabled 0
1666 18:38:02.284038 PCI: 00:0e.0: enabled 0
1667 18:38:02.284530 PCI: 00:10.2: enabled 1
1668 18:38:02.287616 PCI: 00:10.6: enabled 0
1669 18:38:02.291247 PCI: 00:10.7: enabled 0
1670 18:38:02.294359 PCI: 00:12.0: enabled 0
1671 18:38:02.295037 PCI: 00:12.6: enabled 0
1672 18:38:02.297604 PCI: 00:13.0: enabled 0
1673 18:38:02.301176 PCI: 00:14.0: enabled 1
1674 18:38:02.304321 PCI: 00:14.1: enabled 0
1675 18:38:02.304915 PCI: 00:14.2: enabled 1
1676 18:38:02.307734 PCI: 00:14.3: enabled 1
1677 18:38:02.310637 PCI: 00:15.0: enabled 1
1678 18:38:02.314396 PCI: 00:15.1: enabled 1
1679 18:38:02.314991 PCI: 00:15.2: enabled 1
1680 18:38:02.317841 PCI: 00:15.3: enabled 1
1681 18:38:02.320724 PCI: 00:16.0: enabled 1
1682 18:38:02.324440 PCI: 00:16.1: enabled 0
1683 18:38:02.324928 PCI: 00:16.2: enabled 0
1684 18:38:02.327317 PCI: 00:16.3: enabled 0
1685 18:38:02.331230 PCI: 00:16.4: enabled 0
1686 18:38:02.331825 PCI: 00:16.5: enabled 0
1687 18:38:02.333961 PCI: 00:17.0: enabled 0
1688 18:38:02.337547 PCI: 00:19.0: enabled 0
1689 18:38:02.340533 PCI: 00:19.1: enabled 1
1690 18:38:02.341039 PCI: 00:19.2: enabled 0
1691 18:38:02.344016 PCI: 00:1c.0: enabled 1
1692 18:38:02.347221 PCI: 00:1c.1: enabled 0
1693 18:38:02.350836 PCI: 00:1c.2: enabled 0
1694 18:38:02.351327 PCI: 00:1c.3: enabled 0
1695 18:38:02.353682 PCI: 00:1c.4: enabled 0
1696 18:38:02.357165 PCI: 00:1c.5: enabled 0
1697 18:38:02.360805 PCI: 00:1c.6: enabled 1
1698 18:38:02.361298 PCI: 00:1c.7: enabled 0
1699 18:38:02.363579 PCI: 00:1d.0: enabled 1
1700 18:38:02.367403 PCI: 00:1d.1: enabled 0
1701 18:38:02.370361 PCI: 00:1d.2: enabled 1
1702 18:38:02.370885 PCI: 00:1d.3: enabled 0
1703 18:38:02.374031 PCI: 00:1e.0: enabled 1
1704 18:38:02.377047 PCI: 00:1e.1: enabled 0
1705 18:38:02.377543 PCI: 00:1e.2: enabled 1
1706 18:38:02.380232 PCI: 00:1e.3: enabled 1
1707 18:38:02.383720 PCI: 00:1f.0: enabled 1
1708 18:38:02.387218 PCI: 00:1f.1: enabled 0
1709 18:38:02.387709 PCI: 00:1f.2: enabled 1
1710 18:38:02.390329 PCI: 00:1f.3: enabled 1
1711 18:38:02.393818 PCI: 00:1f.4: enabled 0
1712 18:38:02.396998 PCI: 00:1f.5: enabled 1
1713 18:38:02.397501 PCI: 00:1f.6: enabled 0
1714 18:38:02.400312 PCI: 00:1f.7: enabled 0
1715 18:38:02.404024 APIC: 00: enabled 1
1716 18:38:02.404625 GENERIC: 0.0: enabled 1
1717 18:38:02.407344 GENERIC: 0.0: enabled 1
1718 18:38:02.410464 GENERIC: 1.0: enabled 1
1719 18:38:02.414249 GENERIC: 0.0: enabled 1
1720 18:38:02.414900 GENERIC: 1.0: enabled 1
1721 18:38:02.417090 USB0 port 0: enabled 1
1722 18:38:02.420107 GENERIC: 0.0: enabled 1
1723 18:38:02.423777 USB0 port 0: enabled 1
1724 18:38:02.424273 GENERIC: 0.0: enabled 1
1725 18:38:02.426854 I2C: 00:1a: enabled 1
1726 18:38:02.430673 I2C: 00:31: enabled 1
1727 18:38:02.431277 I2C: 00:32: enabled 1
1728 18:38:02.433509 I2C: 00:10: enabled 1
1729 18:38:02.437048 I2C: 00:15: enabled 1
1730 18:38:02.437541 GENERIC: 0.0: enabled 0
1731 18:38:02.440126 GENERIC: 1.0: enabled 0
1732 18:38:02.443832 GENERIC: 0.0: enabled 1
1733 18:38:02.444327 SPI: 00: enabled 1
1734 18:38:02.446422 SPI: 00: enabled 1
1735 18:38:02.450046 PNP: 0c09.0: enabled 1
1736 18:38:02.453644 GENERIC: 0.0: enabled 1
1737 18:38:02.454140 USB3 port 0: enabled 1
1738 18:38:02.456726 USB3 port 1: enabled 1
1739 18:38:02.459661 USB3 port 2: enabled 0
1740 18:38:02.460165 USB3 port 3: enabled 0
1741 18:38:02.463219 USB2 port 0: enabled 0
1742 18:38:02.466818 USB2 port 1: enabled 1
1743 18:38:02.467323 USB2 port 2: enabled 1
1744 18:38:02.470200 USB2 port 3: enabled 0
1745 18:38:02.473065 USB2 port 4: enabled 1
1746 18:38:02.476748 USB2 port 5: enabled 0
1747 18:38:02.477243 USB2 port 6: enabled 0
1748 18:38:02.479756 USB2 port 7: enabled 0
1749 18:38:02.482890 USB2 port 8: enabled 0
1750 18:38:02.483382 USB2 port 9: enabled 0
1751 18:38:02.486262 USB3 port 0: enabled 0
1752 18:38:02.489730 USB3 port 1: enabled 1
1753 18:38:02.493190 USB3 port 2: enabled 0
1754 18:38:02.493719 USB3 port 3: enabled 0
1755 18:38:02.496424 GENERIC: 0.0: enabled 1
1756 18:38:02.499263 GENERIC: 1.0: enabled 1
1757 18:38:02.499758 APIC: 01: enabled 1
1758 18:38:02.502729 APIC: 03: enabled 1
1759 18:38:02.506356 APIC: 06: enabled 1
1760 18:38:02.506974 APIC: 05: enabled 1
1761 18:38:02.509336 APIC: 04: enabled 1
1762 18:38:02.513108 APIC: 02: enabled 1
1763 18:38:02.513712 APIC: 07: enabled 1
1764 18:38:02.516730 PCI: 01:00.0: enabled 1
1765 18:38:02.523095 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1766 18:38:02.525949 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 18:38:02.529507 ELOG: NV offset 0xf30000 size 0x1000
1768 18:38:02.536592 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 18:38:02.543196 ELOG: Event(17) added with size 13 at 2023-02-25 18:38:01 UTC
1770 18:38:02.550018 ELOG: Event(92) added with size 9 at 2023-02-25 18:38:01 UTC
1771 18:38:02.556397 ELOG: Event(93) added with size 9 at 2023-02-25 18:38:01 UTC
1772 18:38:02.563319 ELOG: Event(9E) added with size 10 at 2023-02-25 18:38:01 UTC
1773 18:38:02.569384 ELOG: Event(9F) added with size 14 at 2023-02-25 18:38:01 UTC
1774 18:38:02.576628 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1775 18:38:02.583062 ELOG: Event(A1) added with size 10 at 2023-02-25 18:38:01 UTC
1776 18:38:02.589596 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1777 18:38:02.596058 ELOG: Event(A0) added with size 9 at 2023-02-25 18:38:01 UTC
1778 18:38:02.599020 elog_add_boot_reason: Logged dev mode boot
1779 18:38:02.605683 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1780 18:38:02.609314 Finalize devices...
1781 18:38:02.609970 Devices finalized
1782 18:38:02.615616 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1783 18:38:02.619303 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1784 18:38:02.625709 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1785 18:38:02.628786 ME: HFSTS1 : 0x80030055
1786 18:38:02.635564 ME: HFSTS2 : 0x30280116
1787 18:38:02.638617 ME: HFSTS3 : 0x00000050
1788 18:38:02.645700 ME: HFSTS4 : 0x00004000
1789 18:38:02.648684 ME: HFSTS5 : 0x00000000
1790 18:38:02.652594 ME: HFSTS6 : 0x00400006
1791 18:38:02.655457 ME: Manufacturing Mode : YES
1792 18:38:02.658991 ME: SPI Protection Mode Enabled : NO
1793 18:38:02.665554 ME: FW Partition Table : OK
1794 18:38:02.668687 ME: Bringup Loader Failure : NO
1795 18:38:02.672103 ME: Firmware Init Complete : NO
1796 18:38:02.675939 ME: Boot Options Present : NO
1797 18:38:02.678784 ME: Update In Progress : NO
1798 18:38:02.681882 ME: D0i3 Support : YES
1799 18:38:02.685100 ME: Low Power State Enabled : NO
1800 18:38:02.691678 ME: CPU Replaced : YES
1801 18:38:02.695271 ME: CPU Replacement Valid : YES
1802 18:38:02.698850 ME: Current Working State : 5
1803 18:38:02.701547 ME: Current Operation State : 1
1804 18:38:02.705184 ME: Current Operation Mode : 3
1805 18:38:02.708220 ME: Error Code : 0
1806 18:38:02.711807 ME: Enhanced Debug Mode : NO
1807 18:38:02.715036 ME: CPU Debug Disabled : YES
1808 18:38:02.718324 ME: TXT Support : NO
1809 18:38:02.724968 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1810 18:38:02.734655 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1811 18:38:02.738306 CBFS: 'fallback/slic' not found.
1812 18:38:02.741298 ACPI: Writing ACPI tables at 76b01000.
1813 18:38:02.741797 ACPI: * FACS
1814 18:38:02.745072 ACPI: * DSDT
1815 18:38:02.747865 Ramoops buffer: 0x100000@0x76a00000.
1816 18:38:02.751489 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1817 18:38:02.758092 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1818 18:38:02.761025 Google Chrome EC: version:
1819 18:38:02.764760 ro: voema_v2.0.7540-147f8d37d1
1820 18:38:02.767833 rw: voema_v2.0.7540-147f8d37d1
1821 18:38:02.768324 running image: 2
1822 18:38:02.774609 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1823 18:38:02.779181 ACPI: * FADT
1824 18:38:02.779880 SCI is IRQ9
1825 18:38:02.785923 ACPI: added table 1/32, length now 40
1826 18:38:02.786431 ACPI: * SSDT
1827 18:38:02.788956 Found 1 CPU(s) with 8 core(s) each.
1828 18:38:02.796077 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1829 18:38:02.799054 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1830 18:38:02.802633 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1831 18:38:02.805684 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1832 18:38:02.812479 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1833 18:38:02.819173 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1834 18:38:02.822656 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1835 18:38:02.829013 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1836 18:38:02.835652 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1837 18:38:02.839380 \_SB.PCI0.RP09: Added StorageD3Enable property
1838 18:38:02.845922 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1839 18:38:02.848760 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1840 18:38:02.855314 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1841 18:38:02.858980 PS2K: Passing 80 keymaps to kernel
1842 18:38:02.865678 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1843 18:38:02.872291 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1844 18:38:02.878751 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1845 18:38:02.885101 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1846 18:38:02.891653 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1847 18:38:02.898652 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1848 18:38:02.905179 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1849 18:38:02.911269 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1850 18:38:02.914785 ACPI: added table 2/32, length now 44
1851 18:38:02.915281 ACPI: * MCFG
1852 18:38:02.921320 ACPI: added table 3/32, length now 48
1853 18:38:02.921819 ACPI: * TPM2
1854 18:38:02.925072 TPM2 log created at 0x769f0000
1855 18:38:02.928433 ACPI: added table 4/32, length now 52
1856 18:38:02.931496 ACPI: * MADT
1857 18:38:02.931991 SCI is IRQ9
1858 18:38:02.934994 ACPI: added table 5/32, length now 56
1859 18:38:02.937966 current = 76b09850
1860 18:38:02.938457 ACPI: * DMAR
1861 18:38:02.944658 ACPI: added table 6/32, length now 60
1862 18:38:02.947611 ACPI: added table 7/32, length now 64
1863 18:38:02.948060 ACPI: * HPET
1864 18:38:02.951180 ACPI: added table 8/32, length now 68
1865 18:38:02.954446 ACPI: done.
1866 18:38:02.957859 ACPI tables: 35216 bytes.
1867 18:38:02.958306 smbios_write_tables: 769ef000
1868 18:38:02.961368 EC returned error result code 3
1869 18:38:02.965211 Couldn't obtain OEM name from CBI
1870 18:38:02.968511 Create SMBIOS type 16
1871 18:38:02.972023 Create SMBIOS type 17
1872 18:38:02.975220 GENERIC: 0.0 (WIFI Device)
1873 18:38:02.975676 SMBIOS tables: 1750 bytes.
1874 18:38:02.981872 Writing table forward entry at 0x00000500
1875 18:38:02.988050 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1876 18:38:02.991652 Writing coreboot table at 0x76b25000
1877 18:38:02.998359 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1878 18:38:03.001317 1. 0000000000001000-000000000009ffff: RAM
1879 18:38:03.005257 2. 00000000000a0000-00000000000fffff: RESERVED
1880 18:38:03.011683 3. 0000000000100000-00000000769eefff: RAM
1881 18:38:03.014607 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1882 18:38:03.021251 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1883 18:38:03.027872 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1884 18:38:03.031447 7. 0000000077000000-000000007fbfffff: RESERVED
1885 18:38:03.037663 8. 00000000c0000000-00000000cfffffff: RESERVED
1886 18:38:03.041370 9. 00000000f8000000-00000000f9ffffff: RESERVED
1887 18:38:03.044403 10. 00000000fb000000-00000000fb000fff: RESERVED
1888 18:38:03.051097 11. 00000000fe000000-00000000fe00ffff: RESERVED
1889 18:38:03.054494 12. 00000000fed80000-00000000fed87fff: RESERVED
1890 18:38:03.060986 13. 00000000fed90000-00000000fed92fff: RESERVED
1891 18:38:03.064469 14. 00000000feda0000-00000000feda1fff: RESERVED
1892 18:38:03.071207 15. 00000000fedc0000-00000000feddffff: RESERVED
1893 18:38:03.074897 16. 0000000100000000-00000002803fffff: RAM
1894 18:38:03.077585 Passing 4 GPIOs to payload:
1895 18:38:03.081083 NAME | PORT | POLARITY | VALUE
1896 18:38:03.087701 lid | undefined | high | high
1897 18:38:03.093999 power | undefined | high | low
1898 18:38:03.097763 oprom | undefined | high | low
1899 18:38:03.104218 EC in RW | 0x000000e5 | high | high
1900 18:38:03.110804 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 815c
1901 18:38:03.114283 coreboot table: 1576 bytes.
1902 18:38:03.117124 IMD ROOT 0. 0x76fff000 0x00001000
1903 18:38:03.120794 IMD SMALL 1. 0x76ffe000 0x00001000
1904 18:38:03.123884 FSP MEMORY 2. 0x76c4e000 0x003b0000
1905 18:38:03.126991 VPD 3. 0x76c4d000 0x00000367
1906 18:38:03.130660 RO MCACHE 4. 0x76c4c000 0x00000fdc
1907 18:38:03.134016 CONSOLE 5. 0x76c2c000 0x00020000
1908 18:38:03.137028 FMAP 6. 0x76c2b000 0x00000578
1909 18:38:03.143835 TIME STAMP 7. 0x76c2a000 0x00000910
1910 18:38:03.146897 VBOOT WORK 8. 0x76c16000 0x00014000
1911 18:38:03.150426 ROMSTG STCK 9. 0x76c15000 0x00001000
1912 18:38:03.153468 AFTER CAR 10. 0x76c0a000 0x0000b000
1913 18:38:03.157323 RAMSTAGE 11. 0x76b97000 0x00073000
1914 18:38:03.159996 REFCODE 12. 0x76b42000 0x00055000
1915 18:38:03.163524 SMM BACKUP 13. 0x76b32000 0x00010000
1916 18:38:03.170043 4f444749 14. 0x76b30000 0x00002000
1917 18:38:03.173076 EXT VBT15. 0x76b2d000 0x0000219f
1918 18:38:03.176668 COREBOOT 16. 0x76b25000 0x00008000
1919 18:38:03.180356 ACPI 17. 0x76b01000 0x00024000
1920 18:38:03.183269 ACPI GNVS 18. 0x76b00000 0x00001000
1921 18:38:03.186211 RAMOOPS 19. 0x76a00000 0x00100000
1922 18:38:03.189594 TPM2 TCGLOG20. 0x769f0000 0x00010000
1923 18:38:03.193061 SMBIOS 21. 0x769ef000 0x00000800
1924 18:38:03.196651 IMD small region:
1925 18:38:03.199751 IMD ROOT 0. 0x76ffec00 0x00000400
1926 18:38:03.202793 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1927 18:38:03.206134 POWER STATE 2. 0x76ffeb80 0x00000044
1928 18:38:03.212760 ROMSTAGE 3. 0x76ffeb60 0x00000004
1929 18:38:03.216205 MEM INFO 4. 0x76ffe980 0x000001e0
1930 18:38:03.223368 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1931 18:38:03.223863 MTRR: Physical address space:
1932 18:38:03.229312 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1933 18:38:03.236010 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1934 18:38:03.242943 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1935 18:38:03.249661 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1936 18:38:03.255950 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1937 18:38:03.262794 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1938 18:38:03.269607 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1939 18:38:03.272740 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 18:38:03.275837 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 18:38:03.278868 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 18:38:03.285360 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 18:38:03.288901 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 18:38:03.292556 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 18:38:03.295343 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 18:38:03.302124 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 18:38:03.305409 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 18:38:03.308589 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 18:38:03.312116 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 18:38:03.316301 call enable_fixed_mtrr()
1951 18:38:03.319970 CPU physical address size: 39 bits
1952 18:38:03.326645 MTRR: default type WB/UC MTRR counts: 6/6.
1953 18:38:03.329807 MTRR: UC selected as default type.
1954 18:38:03.336339 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1955 18:38:03.339385 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 18:38:03.346421 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 18:38:03.353460 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 18:38:03.359374 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1959 18:38:03.366440 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1960 18:38:03.366973
1961 18:38:03.369655 MTRR check
1962 18:38:03.373052 Fixed MTRRs : Enabled
1963 18:38:03.373644 Variable MTRRs: Enabled
1964 18:38:03.374039
1965 18:38:03.379512 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 18:38:03.382455 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 18:38:03.386142 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 18:38:03.389396 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 18:38:03.393105 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 18:38:03.399493 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 18:38:03.402962 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 18:38:03.406033 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 18:38:03.409604 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 18:38:03.415809 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 18:38:03.419325 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 18:38:03.426018 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1977 18:38:03.429093 call enable_fixed_mtrr()
1978 18:38:03.432622 Checking cr50 for pending updates
1979 18:38:03.436768 CPU physical address size: 39 bits
1980 18:38:03.440243 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 18:38:03.443262 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 18:38:03.446936 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 18:38:03.453725 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 18:38:03.456890 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 18:38:03.460127 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 18:38:03.463359 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 18:38:03.466898 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 18:38:03.473402 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 18:38:03.476406 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 18:38:03.480062 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 18:38:03.483152 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 18:38:03.490844 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 18:38:03.491336 call enable_fixed_mtrr()
1994 18:38:03.497802 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 18:38:03.500607 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 18:38:03.504418 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 18:38:03.507310 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 18:38:03.513999 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 18:38:03.517704 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 18:38:03.520485 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 18:38:03.523953 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 18:38:03.530507 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 18:38:03.534359 CPU physical address size: 39 bits
2004 18:38:03.537444 call enable_fixed_mtrr()
2005 18:38:03.540229 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 18:38:03.547315 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 18:38:03.550986 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 18:38:03.553948 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 18:38:03.557476 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 18:38:03.560489 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 18:38:03.567135 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 18:38:03.570679 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 18:38:03.573725 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 18:38:03.577362 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 18:38:03.583619 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 18:38:03.586602 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 18:38:03.590427 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 18:38:03.596924 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 18:38:03.599963 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 18:38:03.603277 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 18:38:03.606709 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 18:38:03.613594 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 18:38:03.616730 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 18:38:03.620341 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 18:38:03.623279 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 18:38:03.629611 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 18:38:03.633023 call enable_fixed_mtrr()
2028 18:38:03.633537 call enable_fixed_mtrr()
2029 18:38:03.639760 CPU physical address size: 39 bits
2030 18:38:03.643232 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 18:38:03.646941 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 18:38:03.649636 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 18:38:03.653655 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 18:38:03.660066 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 18:38:03.663071 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 18:38:03.666757 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 18:38:03.669596 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 18:38:03.676145 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 18:38:03.679537 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 18:38:03.682599 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 18:38:03.686408 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 18:38:03.693510 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 18:38:03.694043 call enable_fixed_mtrr()
2044 18:38:03.700244 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 18:38:03.703922 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 18:38:03.706674 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 18:38:03.710248 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 18:38:03.716655 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 18:38:03.720440 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 18:38:03.723789 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 18:38:03.727157 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 18:38:03.733196 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 18:38:03.736625 CPU physical address size: 39 bits
2054 18:38:03.740219 call enable_fixed_mtrr()
2055 18:38:03.743261 CPU physical address size: 39 bits
2056 18:38:03.746987 CPU physical address size: 39 bits
2057 18:38:03.750610 Reading cr50 TPM mode
2058 18:38:03.754361 CPU physical address size: 39 bits
2059 18:38:03.760918 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2060 18:38:03.770577 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2061 18:38:03.774252 Checking segment from ROM address 0xffc02b38
2062 18:38:03.777132 Checking segment from ROM address 0xffc02b54
2063 18:38:03.783960 Loading segment from ROM address 0xffc02b38
2064 18:38:03.784549 code (compression=0)
2065 18:38:03.793520 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2066 18:38:03.803536 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2067 18:38:03.804035 it's not compressed!
2068 18:38:03.942908 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2069 18:38:03.949659 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2070 18:38:03.956517 Loading segment from ROM address 0xffc02b54
2071 18:38:03.960046 Entry Point 0x30000000
2072 18:38:03.960552 Loaded segments
2073 18:38:03.966065 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2074 18:38:04.010056 Finalizing chipset.
2075 18:38:04.012994 Finalizing SMM.
2076 18:38:04.013497 APMC done.
2077 18:38:04.019884 BS: BS_PAYLOAD_LOAD exit times (exec / console): 43 / 5 ms
2078 18:38:04.023205 mp_park_aps done after 0 msecs.
2079 18:38:04.026660 Jumping to boot code at 0x30000000(0x76b25000)
2080 18:38:04.036608 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2081 18:38:04.037116
2082 18:38:04.037537
2083 18:38:04.040357
2084 18:38:04.041165 Starting depthcharge on Voema...
2085 18:38:04.042692 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2086 18:38:04.043293 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2087 18:38:04.043841 Setting prompt string to ['volteer:']
2088 18:38:04.044467 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2089 18:38:04.045361
2090 18:38:04.049793 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2091 18:38:04.050304
2092 18:38:04.056329 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2093 18:38:04.056822
2094 18:38:04.062640 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2095 18:38:04.063133
2096 18:38:04.066500 Failed to find eMMC card reader
2097 18:38:04.067029
2098 18:38:04.067418 Wipe memory regions:
2099 18:38:04.069401
2100 18:38:04.073449 [0x00000000001000, 0x000000000a0000)
2101 18:38:04.074038
2102 18:38:04.075946 [0x00000000100000, 0x00000030000000)
2103 18:38:04.102179
2104 18:38:04.105158 [0x00000032662db0, 0x000000769ef000)
2105 18:38:04.141006
2106 18:38:04.144509 [0x00000100000000, 0x00000280400000)
2107 18:38:04.347296
2108 18:38:04.350406 ec_init: CrosEC protocol v3 supported (256, 256)
2109 18:38:04.350974
2110 18:38:04.356892 update_port_state: port C0 state: usb enable 1 mux conn 0
2111 18:38:04.357467
2112 18:38:04.366340 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2113 18:38:04.370031
2114 18:38:04.373098 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2115 18:38:04.373609
2116 18:38:04.376645 send_conn_disc_msg: pmc_send_cmd succeeded
2117 18:38:04.808805
2118 18:38:04.809368 R8152: Initializing
2119 18:38:04.809751
2120 18:38:04.811869 Version 6 (ocp_data = 5c30)
2121 18:38:04.812355
2122 18:38:04.815805 R8152: Done initializing
2123 18:38:04.816373
2124 18:38:04.818372 Adding net device
2125 18:38:05.121106
2126 18:38:05.124559 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2127 18:38:05.125053
2128 18:38:05.125459
2129 18:38:05.125832
2130 18:38:05.127812 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 18:38:05.229602 volteer: tftpboot 192.168.201.1 9334739/tftp-deploy-y__mnh03/kernel/bzImage 9334739/tftp-deploy-y__mnh03/kernel/cmdline 9334739/tftp-deploy-y__mnh03/ramdisk/ramdisk.cpio.gz
2133 18:38:05.230286 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 18:38:05.230834 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2135 18:38:05.235159 tftpboot 192.168.201.1 9334739/tftp-deploy-y__mnh03/kernel/bzImoy-y__mnh03/kernel/cmdline 9334739/tftp-deploy-y__mnh03/ramdisk/ramdisk.cpio.gz
2136 18:38:05.235806
2137 18:38:05.236208 Waiting for link
2138 18:38:05.438644
2139 18:38:05.439196 done.
2140 18:38:05.439623
2141 18:38:05.440074 MAC: 00:24:32:30:79:06
2142 18:38:05.440438
2143 18:38:05.441391 Sending DHCP discover... done.
2144 18:38:05.441881
2145 18:38:05.445047 Waiting for reply... done.
2146 18:38:05.445535
2147 18:38:05.448104 Sending DHCP request... done.
2148 18:38:05.448715
2149 18:38:05.451297 Waiting for reply... done.
2150 18:38:05.451781
2151 18:38:05.455062 My ip is 192.168.201.23
2152 18:38:05.455591
2153 18:38:05.457963 The DHCP server ip is 192.168.201.1
2154 18:38:05.458448
2155 18:38:05.464451 TFTP server IP predefined by user: 192.168.201.1
2156 18:38:05.464958
2157 18:38:05.471652 Bootfile predefined by user: 9334739/tftp-deploy-y__mnh03/kernel/bzImage
2158 18:38:05.472181
2159 18:38:05.474684 Sending tftp read request... done.
2160 18:38:05.475182
2161 18:38:05.477570 Waiting for the transfer...
2162 18:38:05.478055
2163 18:38:06.073810 00000000 ################################################################
2164 18:38:06.073949
2165 18:38:06.656190 00080000 ################################################################
2166 18:38:06.656335
2167 18:38:07.219263 00100000 ################################################################
2168 18:38:07.219406
2169 18:38:07.749089 00180000 ################################################################
2170 18:38:07.749255
2171 18:38:08.268910 00200000 ################################################################
2172 18:38:08.269054
2173 18:38:08.810888 00280000 ################################################################
2174 18:38:08.811043
2175 18:38:09.342150 00300000 ################################################################
2176 18:38:09.342288
2177 18:38:09.869639 00380000 ################################################################
2178 18:38:09.869783
2179 18:38:10.393676 00400000 ################################################################
2180 18:38:10.393818
2181 18:38:10.924520 00480000 ################################################################
2182 18:38:10.924661
2183 18:38:11.449322 00500000 ################################################################
2184 18:38:11.449469
2185 18:38:11.961789 00580000 ################################################################
2186 18:38:11.961949
2187 18:38:12.485130 00600000 ################################################################
2188 18:38:12.485275
2189 18:38:13.011888 00680000 ################################################################
2190 18:38:13.012038
2191 18:38:13.527348 00700000 ################################################################
2192 18:38:13.527508
2193 18:38:14.050312 00780000 ################################################################
2194 18:38:14.050475
2195 18:38:14.567913 00800000 ################################################################
2196 18:38:14.568071
2197 18:38:15.083021 00880000 ################################################################
2198 18:38:15.083180
2199 18:38:15.357681 00900000 ################################## done.
2200 18:38:15.357826
2201 18:38:15.360843 The bootfile was 9711616 bytes long.
2202 18:38:15.360934
2203 18:38:15.364436 Sending tftp read request... done.
2204 18:38:15.364524
2205 18:38:15.367731 Waiting for the transfer...
2206 18:38:15.367820
2207 18:38:15.892627 00000000 ################################################################
2208 18:38:15.892832
2209 18:38:16.429106 00080000 ################################################################
2210 18:38:16.429253
2211 18:38:16.954957 00100000 ################################################################
2212 18:38:16.955131
2213 18:38:17.475127 00180000 ################################################################
2214 18:38:17.475278
2215 18:38:17.984956 00200000 ################################################################
2216 18:38:17.985096
2217 18:38:18.486195 00280000 ################################################################
2218 18:38:18.486334
2219 18:38:19.009090 00300000 ################################################################
2220 18:38:19.009242
2221 18:38:19.544305 00380000 ################################################################
2222 18:38:19.544447
2223 18:38:20.116789 00400000 ################################################################
2224 18:38:20.116938
2225 18:38:20.744395 00480000 ################################################################
2226 18:38:20.744912
2227 18:38:21.339291 00500000 ################################################################
2228 18:38:21.339432
2229 18:38:21.921554 00580000 ################################################################
2230 18:38:21.921696
2231 18:38:22.516402 00600000 ################################################################
2232 18:38:22.516543
2233 18:38:23.135091 00680000 ################################################################
2234 18:38:23.135235
2235 18:38:23.713984 00700000 ################################################################
2236 18:38:23.714121
2237 18:38:24.245788 00780000 ################################################################
2238 18:38:24.245931
2239 18:38:24.462193 00800000 ######################## done.
2240 18:38:24.462728
2241 18:38:24.465261 Sending tftp read request... done.
2242 18:38:24.465721
2243 18:38:24.468892 Waiting for the transfer...
2244 18:38:24.469346
2245 18:38:24.469699 00000000 # done.
2246 18:38:24.470078
2247 18:38:24.478614 Command line loaded dynamically from TFTP file: 9334739/tftp-deploy-y__mnh03/kernel/cmdline
2248 18:38:24.479069
2249 18:38:24.491842 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2250 18:38:24.495934
2251 18:38:24.499476 Shutting down all USB controllers.
2252 18:38:24.499915
2253 18:38:24.500258 Removing current net device
2254 18:38:24.500582
2255 18:38:24.502583 Finalizing coreboot
2256 18:38:24.503026
2257 18:38:24.509325 Exiting depthcharge with code 4 at timestamp: 29123160
2258 18:38:24.509764
2259 18:38:24.510111
2260 18:38:24.510435 Starting kernel ...
2261 18:38:24.510808
2262 18:38:24.511117
2263 18:38:24.512358 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2264 18:38:24.512847 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2265 18:38:24.513215 Setting prompt string to ['Linux version [0-9]']
2266 18:38:24.513572 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2267 18:38:24.513923 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2269 18:42:46.513771 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2271 18:42:46.514953 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2273 18:42:46.515816 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2276 18:42:46.517318 end: 2 depthcharge-action (duration 00:05:00) [common]
2278 18:42:46.518562 Cleaning after the job
2279 18:42:46.519027 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334739/tftp-deploy-y__mnh03/ramdisk
2280 18:42:46.522229 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334739/tftp-deploy-y__mnh03/kernel
2281 18:42:46.525722 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334739/tftp-deploy-y__mnh03/modules
2282 18:42:46.526991 start: 5.1 power-off (timeout 00:00:30) [common]
2283 18:42:46.527926 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2284 18:42:48.740003 >> Command sent successfully.
2285 18:42:48.750961 Returned 0 in 2 seconds
2286 18:42:48.852620 end: 5.1 power-off (duration 00:00:02) [common]
2288 18:42:48.854025 start: 5.2 read-feedback (timeout 00:09:58) [common]
2289 18:42:48.855285 Listened to connection for namespace 'common' for up to 1s
2290 18:42:49.858749 Finalising connection for namespace 'common'
2291 18:42:49.859455 Disconnecting from shell: Finalise
2292 18:42:49.859895
2293 18:42:49.961347 end: 5.2 read-feedback (duration 00:00:01) [common]
2294 18:42:49.961982 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9334739
2295 18:42:49.988510 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9334739
2296 18:42:49.989208 JobError: Your job cannot terminate cleanly.