Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 18:37:30.003247 lava-dispatcher, installed at version: 2022.11
2 18:37:30.003440 start: 0 validate
3 18:37:30.003569 Start time: 2023-02-25 18:37:30.003560+00:00 (UTC)
4 18:37:30.003697 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:37:30.003821 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230217.0%2Famd64%2Frootfs.cpio.gz exists
6 18:37:30.299477 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:37:30.300190 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:37:30.306512 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:37:30.307119 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 18:37:30.319434 validate duration: 0.32
12 18:37:30.320758 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:37:30.321356 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:37:30.321909 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:37:30.322442 Not decompressing ramdisk as can be used compressed.
16 18:37:30.323237 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230217.0/amd64/rootfs.cpio.gz
17 18:37:30.323668 saving as /var/lib/lava/dispatcher/tmp/9334712/tftp-deploy-5a7c7ulg/ramdisk/rootfs.cpio.gz
18 18:37:30.324011 total size: 35740519 (34MB)
19 18:37:30.330893 progress 0% (0MB)
20 18:37:30.358405 progress 5% (1MB)
21 18:37:30.371280 progress 10% (3MB)
22 18:37:30.381071 progress 15% (5MB)
23 18:37:30.390587 progress 20% (6MB)
24 18:37:30.405530 progress 25% (8MB)
25 18:37:30.420864 progress 30% (10MB)
26 18:37:30.436181 progress 35% (11MB)
27 18:37:30.451402 progress 40% (13MB)
28 18:37:30.466497 progress 45% (15MB)
29 18:37:30.481914 progress 50% (17MB)
30 18:37:30.497037 progress 55% (18MB)
31 18:37:30.512255 progress 60% (20MB)
32 18:37:30.527381 progress 65% (22MB)
33 18:37:30.542601 progress 70% (23MB)
34 18:37:30.558513 progress 75% (25MB)
35 18:37:30.573120 progress 80% (27MB)
36 18:37:30.588479 progress 85% (29MB)
37 18:37:30.603493 progress 90% (30MB)
38 18:37:30.618931 progress 95% (32MB)
39 18:37:30.633932 progress 100% (34MB)
40 18:37:30.634202 34MB downloaded in 0.31s (109.88MB/s)
41 18:37:30.634364 end: 1.1.1 http-download (duration 00:00:00) [common]
43 18:37:30.634615 end: 1.1 download-retry (duration 00:00:00) [common]
44 18:37:30.634705 start: 1.2 download-retry (timeout 00:10:00) [common]
45 18:37:30.634793 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 18:37:30.634902 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 18:37:30.634971 saving as /var/lib/lava/dispatcher/tmp/9334712/tftp-deploy-5a7c7ulg/kernel/bzImage
48 18:37:30.635033 total size: 9711616 (9MB)
49 18:37:30.635094 No compression specified
50 18:37:30.637112 progress 0% (0MB)
51 18:37:30.641071 progress 5% (0MB)
52 18:37:30.645739 progress 10% (0MB)
53 18:37:30.649450 progress 15% (1MB)
54 18:37:30.653559 progress 20% (1MB)
55 18:37:30.657821 progress 25% (2MB)
56 18:37:30.661743 progress 30% (2MB)
57 18:37:30.666129 progress 35% (3MB)
58 18:37:30.670094 progress 40% (3MB)
59 18:37:30.674748 progress 45% (4MB)
60 18:37:30.678323 progress 50% (4MB)
61 18:37:30.682606 progress 55% (5MB)
62 18:37:30.686630 progress 60% (5MB)
63 18:37:30.690652 progress 65% (6MB)
64 18:37:30.694865 progress 70% (6MB)
65 18:37:30.699074 progress 75% (6MB)
66 18:37:30.703336 progress 80% (7MB)
67 18:37:30.707150 progress 85% (7MB)
68 18:37:30.711530 progress 90% (8MB)
69 18:37:30.715570 progress 95% (8MB)
70 18:37:30.719659 progress 100% (9MB)
71 18:37:30.719879 9MB downloaded in 0.08s (109.17MB/s)
72 18:37:30.720033 end: 1.2.1 http-download (duration 00:00:00) [common]
74 18:37:30.720276 end: 1.2 download-retry (duration 00:00:00) [common]
75 18:37:30.720368 start: 1.3 download-retry (timeout 00:10:00) [common]
76 18:37:30.720459 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 18:37:30.720568 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 18:37:30.720639 saving as /var/lib/lava/dispatcher/tmp/9334712/tftp-deploy-5a7c7ulg/modules/modules.tar
79 18:37:30.720703 total size: 64832 (0MB)
80 18:37:30.720767 Using unxz to decompress xz
81 18:37:30.725332 progress 50% (0MB)
82 18:37:30.726004 progress 100% (0MB)
83 18:37:30.729848 0MB downloaded in 0.01s (6.77MB/s)
84 18:37:30.730071 end: 1.3.1 http-download (duration 00:00:00) [common]
86 18:37:30.730335 end: 1.3 download-retry (duration 00:00:00) [common]
87 18:37:30.730433 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 18:37:30.730530 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 18:37:30.730618 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 18:37:30.730705 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 18:37:30.730870 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk
92 18:37:30.730980 makedir: /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin
93 18:37:30.731080 makedir: /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/tests
94 18:37:30.731171 makedir: /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/results
95 18:37:30.731282 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-add-keys
96 18:37:30.731419 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-add-sources
97 18:37:30.731543 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-background-process-start
98 18:37:30.731660 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-background-process-stop
99 18:37:30.731776 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-common-functions
100 18:37:30.731891 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-echo-ipv4
101 18:37:30.732005 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-install-packages
102 18:37:30.732119 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-installed-packages
103 18:37:30.732229 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-os-build
104 18:37:30.732341 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-probe-channel
105 18:37:30.732455 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-probe-ip
106 18:37:30.732567 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-target-ip
107 18:37:30.732678 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-target-mac
108 18:37:30.732789 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-target-storage
109 18:37:30.732903 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-test-case
110 18:37:30.733016 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-test-event
111 18:37:30.733129 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-test-feedback
112 18:37:30.733240 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-test-raise
113 18:37:30.733353 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-test-reference
114 18:37:30.733464 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-test-runner
115 18:37:30.733575 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-test-set
116 18:37:30.733685 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-test-shell
117 18:37:30.733821 Updating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-install-packages (oe)
118 18:37:30.733939 Updating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/bin/lava-installed-packages (oe)
119 18:37:30.734040 Creating /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/environment
120 18:37:30.734131 LAVA metadata
121 18:37:30.734204 - LAVA_JOB_ID=9334712
122 18:37:30.734272 - LAVA_DISPATCHER_IP=192.168.201.1
123 18:37:30.734376 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 18:37:30.734445 skipped lava-vland-overlay
125 18:37:30.734524 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 18:37:30.734615 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 18:37:30.734681 skipped lava-multinode-overlay
128 18:37:30.734760 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 18:37:30.734846 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 18:37:30.734923 Loading test definitions
131 18:37:30.735024 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 18:37:30.735101 Using /lava-9334712 at stage 0
133 18:37:30.735358 uuid=9334712_1.4.2.3.1 testdef=None
134 18:37:30.735452 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 18:37:30.735544 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 18:37:30.736013 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 18:37:30.736252 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 18:37:30.736799 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 18:37:30.737050 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 18:37:30.737565 runner path: /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/0/tests/0_cros-ec test_uuid 9334712_1.4.2.3.1
143 18:37:30.737718 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 18:37:30.737971 Creating lava-test-runner.conf files
146 18:37:30.738038 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9334712/lava-overlay-rwtemplk/lava-9334712/0 for stage 0
147 18:37:30.738121 - 0_cros-ec
148 18:37:30.738217 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 18:37:30.738306 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
150 18:37:30.743570 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 18:37:30.743680 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
152 18:37:30.743769 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 18:37:30.743857 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 18:37:30.743945 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
155 18:37:31.484784 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 18:37:31.485132 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
157 18:37:31.485239 extracting modules file /var/lib/lava/dispatcher/tmp/9334712/tftp-deploy-5a7c7ulg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9334712/extract-overlay-ramdisk-lwpzn0m8/ramdisk
158 18:37:31.489415 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 18:37:31.489528 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
160 18:37:31.489617 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334712/compress-overlay-d0pmg9tg/overlay-1.4.2.4.tar.gz to ramdisk
161 18:37:31.489692 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334712/compress-overlay-d0pmg9tg/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9334712/extract-overlay-ramdisk-lwpzn0m8/ramdisk
162 18:37:31.492849 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 18:37:31.492965 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
164 18:37:31.493062 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 18:37:31.493159 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
166 18:37:31.493242 Building ramdisk /var/lib/lava/dispatcher/tmp/9334712/extract-overlay-ramdisk-lwpzn0m8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9334712/extract-overlay-ramdisk-lwpzn0m8/ramdisk
167 18:37:31.735021 >> 182673 blocks
168 18:37:34.843252 rename /var/lib/lava/dispatcher/tmp/9334712/extract-overlay-ramdisk-lwpzn0m8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9334712/tftp-deploy-5a7c7ulg/ramdisk/ramdisk.cpio.gz
169 18:37:34.843656 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 18:37:34.843774 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
171 18:37:34.843878 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
172 18:37:34.843974 No mkimage arch provided, not using FIT.
173 18:37:34.844059 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 18:37:34.844143 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 18:37:34.844237 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 18:37:34.844332 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
177 18:37:34.844412 No LXC device requested
178 18:37:34.844495 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 18:37:34.844587 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
180 18:37:34.844674 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 18:37:34.844748 Checking files for TFTP limit of 4294967296 bytes.
182 18:37:34.845151 end: 1 tftp-deploy (duration 00:00:05) [common]
183 18:37:34.845261 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 18:37:34.845358 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 18:37:34.845481 substitutions:
186 18:37:34.845547 - {DTB}: None
187 18:37:34.845613 - {INITRD}: 9334712/tftp-deploy-5a7c7ulg/ramdisk/ramdisk.cpio.gz
188 18:37:34.845673 - {KERNEL}: 9334712/tftp-deploy-5a7c7ulg/kernel/bzImage
189 18:37:34.845796 - {LAVA_MAC}: None
190 18:37:34.845879 - {PRESEED_CONFIG}: None
191 18:37:34.845936 - {PRESEED_LOCAL}: None
192 18:37:34.845992 - {RAMDISK}: 9334712/tftp-deploy-5a7c7ulg/ramdisk/ramdisk.cpio.gz
193 18:37:34.846097 - {ROOT_PART}: None
194 18:37:34.846152 - {ROOT}: None
195 18:37:34.846222 - {SERVER_IP}: 192.168.201.1
196 18:37:34.846278 - {TEE}: None
197 18:37:34.846332 Parsed boot commands:
198 18:37:34.846386 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 18:37:34.846535 Parsed boot commands: tftpboot 192.168.201.1 9334712/tftp-deploy-5a7c7ulg/kernel/bzImage 9334712/tftp-deploy-5a7c7ulg/kernel/cmdline 9334712/tftp-deploy-5a7c7ulg/ramdisk/ramdisk.cpio.gz
200 18:37:34.846632 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 18:37:34.846719 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 18:37:34.846813 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 18:37:34.846898 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 18:37:34.846968 Not connected, no need to disconnect.
205 18:37:34.847043 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 18:37:34.847126 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 18:37:34.847193 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
208 18:37:34.850266 Setting prompt string to ['lava-test: # ']
209 18:37:34.850545 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 18:37:34.850653 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 18:37:34.850748 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 18:37:34.850838 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 18:37:34.851008 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
214 18:37:44.211801 >> Command sent successfully.
215 18:37:44.217892 Returned 0 in 9 seconds
216 18:37:44.319041 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
218 18:37:44.321560 end: 2.2.2 reset-device (duration 00:00:09) [common]
219 18:37:44.322103 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
220 18:37:44.322548 Setting prompt string to 'Starting depthcharge on Voema...'
221 18:37:44.322898 Changing prompt to 'Starting depthcharge on Voema...'
222 18:37:44.323270 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 18:37:44.324510 [Enter `^Ec?' for help]
224 18:37:44.324949
225 18:37:44.325378
226 18:37:44.325814 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 18:37:44.326194 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 18:37:44.326531 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 18:37:44.326865 CPU: AES supported, TXT NOT supported, VT supported
230 18:37:44.327175 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 18:37:44.327491 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 18:37:44.327803 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
233 18:37:44.328105 VBOOT: Loading verstage.
234 18:37:44.328402 FMAP: Found "FLASH" version 1.1 at 0x1804000.
235 18:37:44.328701 FMAP: base = 0x0 size = 0x2000000 #areas = 32
236 18:37:44.329001 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
237 18:37:44.329298 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
238 18:37:44.329625 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
239 18:37:44.329970
240 18:37:44.330283
241 18:37:44.330602 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
242 18:37:44.330919 Probing TPM: . done!
243 18:37:44.331216 TPM ready after 0 ms
244 18:37:44.331514 Connected to device vid:did:rid of 1ae0:0028:00
245 18:37:44.331811 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
246 18:37:44.332126 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
247 18:37:44.332427 Initialized TPM device CR50 revision 0
248 18:37:44.332730 tlcl_send_startup: Startup return code is 0
249 18:37:44.333071 TPM: setup succeeded
250 18:37:44.333394 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
251 18:37:44.333696 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
252 18:37:44.334047 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
253 18:37:44.334349 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
254 18:37:44.334660 Chrome EC: UHEPI supported
255 18:37:44.334957 Phase 1
256 18:37:44.335249 FMAP: area GBB found @ 1805000 (458752 bytes)
257 18:37:44.335549 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
258 18:37:44.335844 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
259 18:37:44.336136 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
260 18:37:44.336433 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
261 18:37:44.336728 Recovery requested (1009000e)
262 18:37:44.337019 TPM: Extending digest for VBOOT: boot mode into PCR 0
263 18:37:44.337314 tlcl_extend: response is 0
264 18:37:44.337605 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
265 18:37:44.337942 tlcl_extend: response is 0
266 18:37:44.338238 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
267 18:37:44.338533 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
268 18:37:44.338870 BS: verstage times (exec / console): total (unknown) / 142 ms
269 18:37:44.339195
270 18:37:44.339503
271 18:37:44.339798 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
272 18:37:44.340097 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
273 18:37:44.340393 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
274 18:37:44.340685 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
275 18:37:44.341085 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
276 18:37:44.341489 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
277 18:37:44.341839 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
278 18:37:44.342163 TCO_STS: 0000 0000
279 18:37:44.342462 GEN_PMCON: d0015038 00002200
280 18:37:44.342756 GBLRST_CAUSE: 00000000 00000000
281 18:37:44.343048 HPR_CAUSE0: 00000000
282 18:37:44.343337 prev_sleep_state 5
283 18:37:44.343648 Boot Count incremented to 16690
284 18:37:44.343940 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 18:37:44.344235 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 18:37:44.344531 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 18:37:44.344891 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
288 18:37:44.345282 Chrome EC: UHEPI supported
289 18:37:44.345646 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
290 18:37:44.346007 Probing TPM: done!
291 18:37:44.346324 Connected to device vid:did:rid of 1ae0:0028:00
292 18:37:44.346949 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
293 18:37:44.347300 Initialized TPM device CR50 revision 0
294 18:37:44.349554 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
295 18:37:44.356128 MRC: Hash idx 0x100b comparison successful.
296 18:37:44.359271 MRC cache found, size faa8
297 18:37:44.359616 bootmode is set to: 2
298 18:37:44.363034 SPD index = 0
299 18:37:44.369738 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
300 18:37:44.372674 SPD: module type is LPDDR4X
301 18:37:44.375910 SPD: module part number is MT53E512M64D4NW-046
302 18:37:44.382931 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
303 18:37:44.386084 SPD: device width 16 bits, bus width 16 bits
304 18:37:44.392888 SPD: module size is 1024 MB (per channel)
305 18:37:44.829698 CBMEM:
306 18:37:44.833030 IMD: root @ 0x76fff000 254 entries.
307 18:37:44.835986 IMD: root @ 0x76ffec00 62 entries.
308 18:37:44.839405 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
309 18:37:44.846068 FMAP: area RW_VPD found @ f35000 (8192 bytes)
310 18:37:44.849405 External stage cache:
311 18:37:44.852855 IMD: root @ 0x7b3ff000 254 entries.
312 18:37:44.856438 IMD: root @ 0x7b3fec00 62 entries.
313 18:37:44.871279 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
314 18:37:44.877880 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
315 18:37:44.884726 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
316 18:37:44.898655 MRC: 'RECOVERY_MRC_CACHE' does not need update.
317 18:37:44.906039 cse_lite: Skip switching to RW in the recovery path
318 18:37:44.906608 8 DIMMs found
319 18:37:44.907032 SMM Memory Map
320 18:37:44.909055 SMRAM : 0x7b000000 0x800000
321 18:37:44.912555 Subregion 0: 0x7b000000 0x200000
322 18:37:44.915554 Subregion 1: 0x7b200000 0x200000
323 18:37:44.919231 Subregion 2: 0x7b400000 0x400000
324 18:37:44.922461 top_of_ram = 0x77000000
325 18:37:44.928935 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
326 18:37:44.932437 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
327 18:37:44.938762 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
328 18:37:44.945507 MTRR Range: Start=ff000000 End=0 (Size 1000000)
329 18:37:44.951938 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
330 18:37:44.958809 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
331 18:37:44.968678 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
332 18:37:44.972264 Processing 211 relocs. Offset value of 0x74c0b000
333 18:37:44.981511 BS: romstage times (exec / console): total (unknown) / 277 ms
334 18:37:44.987677
335 18:37:44.988242
336 18:37:44.997474 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
337 18:37:45.000780 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 18:37:45.011109 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 18:37:45.017625 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 18:37:45.023994 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
341 18:37:45.030564 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
342 18:37:45.077868 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
343 18:37:45.084280 Processing 5008 relocs. Offset value of 0x75d98000
344 18:37:45.087680 BS: postcar times (exec / console): total (unknown) / 59 ms
345 18:37:45.090552
346 18:37:45.091019
347 18:37:45.101067 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
348 18:37:45.101631 Normal boot
349 18:37:45.104645 FW_CONFIG value is 0x804c02
350 18:37:45.107747 PCI: 00:07.0 disabled by fw_config
351 18:37:45.111047 PCI: 00:07.1 disabled by fw_config
352 18:37:45.114655 PCI: 00:0d.2 disabled by fw_config
353 18:37:45.117759 PCI: 00:1c.7 disabled by fw_config
354 18:37:45.124436 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
355 18:37:45.130987 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
356 18:37:45.134154 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
357 18:37:45.137296 GENERIC: 0.0 disabled by fw_config
358 18:37:45.140771 GENERIC: 1.0 disabled by fw_config
359 18:37:45.147227 fw_config match found: DB_USB=USB3_ACTIVE
360 18:37:45.150581 fw_config match found: DB_USB=USB3_ACTIVE
361 18:37:45.153995 fw_config match found: DB_USB=USB3_ACTIVE
362 18:37:45.161005 fw_config match found: DB_USB=USB3_ACTIVE
363 18:37:45.164539 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
364 18:37:45.170416 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 18:37:45.180588 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 18:37:45.187052 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
367 18:37:45.190833 microcode: sig=0x806c1 pf=0x80 revision=0x86
368 18:37:45.197423 microcode: Update skipped, already up-to-date
369 18:37:45.203943 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
370 18:37:45.231360 Detected 4 core, 8 thread CPU.
371 18:37:45.234598 Setting up SMI for CPU
372 18:37:45.237643 IED base = 0x7b400000
373 18:37:45.238134 IED size = 0x00400000
374 18:37:45.241031 Will perform SMM setup.
375 18:37:45.247850 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
376 18:37:45.254584 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
377 18:37:45.261241 Processing 16 relocs. Offset value of 0x00030000
378 18:37:45.264566 Attempting to start 7 APs
379 18:37:45.267556 Waiting for 10ms after sending INIT.
380 18:37:45.283250 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
381 18:37:45.283812 done.
382 18:37:45.286611 AP: slot 7 apic_id 4.
383 18:37:45.289917 AP: slot 3 apic_id 5.
384 18:37:45.290465 AP: slot 2 apic_id 3.
385 18:37:45.297019 Waiting for 2nd SIPI to complete...done.
386 18:37:45.297620 AP: slot 5 apic_id 6.
387 18:37:45.299796 AP: slot 4 apic_id 7.
388 18:37:45.303014 AP: slot 6 apic_id 2.
389 18:37:45.309420 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
390 18:37:45.316499 Processing 13 relocs. Offset value of 0x00038000
391 18:37:45.319456 Unable to locate Global NVS
392 18:37:45.326354 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
393 18:37:45.329846 Installing permanent SMM handler to 0x7b000000
394 18:37:45.339378 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
395 18:37:45.342739 Processing 794 relocs. Offset value of 0x7b010000
396 18:37:45.352497 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
397 18:37:45.355910 Processing 13 relocs. Offset value of 0x7b008000
398 18:37:45.362621 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
399 18:37:45.369242 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
400 18:37:45.372333 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
401 18:37:45.379245 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
402 18:37:45.385696 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
403 18:37:45.392372 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
404 18:37:45.398987 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
405 18:37:45.402452 Unable to locate Global NVS
406 18:37:45.409202 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
407 18:37:45.412502 Clearing SMI status registers
408 18:37:45.413059 SMI_STS: PM1
409 18:37:45.415466 PM1_STS: PWRBTN
410 18:37:45.422672 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
411 18:37:45.426090 In relocation handler: CPU 0
412 18:37:45.429308 New SMBASE=0x7b000000 IEDBASE=0x7b400000
413 18:37:45.435907 Writing SMRR. base = 0x7b000006, mask=0xff800c00
414 18:37:45.438745 Relocation complete.
415 18:37:45.445450 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
416 18:37:45.448638 In relocation handler: CPU 1
417 18:37:45.452376 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
418 18:37:45.452937 Relocation complete.
419 18:37:45.462316 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
420 18:37:45.465305 In relocation handler: CPU 6
421 18:37:45.468551 New SMBASE=0x7affe800 IEDBASE=0x7b400000
422 18:37:45.472098 Writing SMRR. base = 0x7b000006, mask=0xff800c00
423 18:37:45.475461 Relocation complete.
424 18:37:45.482045 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
425 18:37:45.485306 In relocation handler: CPU 2
426 18:37:45.488669 New SMBASE=0x7afff800 IEDBASE=0x7b400000
427 18:37:45.491849 Relocation complete.
428 18:37:45.498439 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
429 18:37:45.502023 In relocation handler: CPU 4
430 18:37:45.505250 New SMBASE=0x7afff000 IEDBASE=0x7b400000
431 18:37:45.508790 Relocation complete.
432 18:37:45.515475 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
433 18:37:45.518387 In relocation handler: CPU 5
434 18:37:45.521595 New SMBASE=0x7affec00 IEDBASE=0x7b400000
435 18:37:45.528368 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 18:37:45.528935 Relocation complete.
437 18:37:45.538235 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
438 18:37:45.538823 In relocation handler: CPU 7
439 18:37:45.544755 New SMBASE=0x7affe400 IEDBASE=0x7b400000
440 18:37:45.547933 Writing SMRR. base = 0x7b000006, mask=0xff800c00
441 18:37:45.551558 Relocation complete.
442 18:37:45.558124 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
443 18:37:45.561487 In relocation handler: CPU 3
444 18:37:45.564619 New SMBASE=0x7afff400 IEDBASE=0x7b400000
445 18:37:45.568938 Relocation complete.
446 18:37:45.569517 Initializing CPU #0
447 18:37:45.571863 CPU: vendor Intel device 806c1
448 18:37:45.575553 CPU: family 06, model 8c, stepping 01
449 18:37:45.579130 Clearing out pending MCEs
450 18:37:45.582534 Setting up local APIC...
451 18:37:45.585352 apic_id: 0x00 done.
452 18:37:45.585838 Turbo is available but hidden
453 18:37:45.588799 Turbo is available and visible
454 18:37:45.595715 microcode: Update skipped, already up-to-date
455 18:37:45.596279 CPU #0 initialized
456 18:37:45.598667 Initializing CPU #5
457 18:37:45.601802 Initializing CPU #4
458 18:37:45.604960 CPU: vendor Intel device 806c1
459 18:37:45.608474 CPU: family 06, model 8c, stepping 01
460 18:37:45.612148 CPU: vendor Intel device 806c1
461 18:37:45.615381 CPU: family 06, model 8c, stepping 01
462 18:37:45.618603 Clearing out pending MCEs
463 18:37:45.619170 Clearing out pending MCEs
464 18:37:45.621927 Setting up local APIC...
465 18:37:45.625063 Initializing CPU #1
466 18:37:45.625633 Initializing CPU #7
467 18:37:45.628552 Initializing CPU #3
468 18:37:45.631645 CPU: vendor Intel device 806c1
469 18:37:45.635114 CPU: family 06, model 8c, stepping 01
470 18:37:45.638254 CPU: vendor Intel device 806c1
471 18:37:45.641542 CPU: family 06, model 8c, stepping 01
472 18:37:45.644685 Clearing out pending MCEs
473 18:37:45.647873 Clearing out pending MCEs
474 18:37:45.651227 Setting up local APIC...
475 18:37:45.651692 apic_id: 0x06 done.
476 18:37:45.654525 Setting up local APIC...
477 18:37:45.657844 apic_id: 0x04 done.
478 18:37:45.661118 Setting up local APIC...
479 18:37:45.664949 microcode: Update skipped, already up-to-date
480 18:37:45.668167 Initializing CPU #2
481 18:37:45.668738 Initializing CPU #6
482 18:37:45.671251 CPU: vendor Intel device 806c1
483 18:37:45.674653 CPU: family 06, model 8c, stepping 01
484 18:37:45.681586 microcode: Update skipped, already up-to-date
485 18:37:45.682190 apic_id: 0x05 done.
486 18:37:45.684817 CPU #7 initialized
487 18:37:45.687900 microcode: Update skipped, already up-to-date
488 18:37:45.691124 Clearing out pending MCEs
489 18:37:45.694425 CPU: vendor Intel device 806c1
490 18:37:45.697755 CPU: family 06, model 8c, stepping 01
491 18:37:45.701170 Setting up local APIC...
492 18:37:45.704138 CPU #3 initialized
493 18:37:45.704601 CPU: vendor Intel device 806c1
494 18:37:45.711283 CPU: family 06, model 8c, stepping 01
495 18:37:45.711850 Clearing out pending MCEs
496 18:37:45.714242 apic_id: 0x07 done.
497 18:37:45.717503 CPU #5 initialized
498 18:37:45.720978 microcode: Update skipped, already up-to-date
499 18:37:45.724337 apic_id: 0x03 done.
500 18:37:45.724803 Clearing out pending MCEs
501 18:37:45.730717 microcode: Update skipped, already up-to-date
502 18:37:45.734604 Setting up local APIC...
503 18:37:45.735160 CPU #4 initialized
504 18:37:45.737426 Setting up local APIC...
505 18:37:45.740445 apic_id: 0x02 done.
506 18:37:45.740910 CPU #2 initialized
507 18:37:45.746857 microcode: Update skipped, already up-to-date
508 18:37:45.747320 apic_id: 0x01 done.
509 18:37:45.750881 CPU #6 initialized
510 18:37:45.753946 microcode: Update skipped, already up-to-date
511 18:37:45.757094 CPU #1 initialized
512 18:37:45.760651 bsp_do_flight_plan done after 461 msecs.
513 18:37:45.764065 CPU: frequency set to 4000 MHz
514 18:37:45.767280 Enabling SMIs.
515 18:37:45.773798 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
516 18:37:45.788344 SATAXPCIE1 indicates PCIe NVMe is present
517 18:37:45.791879 Probing TPM: done!
518 18:37:45.794878 Connected to device vid:did:rid of 1ae0:0028:00
519 18:37:45.805504 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
520 18:37:45.808674 Initialized TPM device CR50 revision 0
521 18:37:45.812538 Enabling S0i3.4
522 18:37:45.818614 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
523 18:37:45.822063 Found a VBT of 8704 bytes after decompression
524 18:37:45.828730 cse_lite: CSE RO boot. HybridStorageMode disabled
525 18:37:45.834958 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
526 18:37:45.911035 FSPS returned 0
527 18:37:45.914601 Executing Phase 1 of FspMultiPhaseSiInit
528 18:37:45.924627 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
529 18:37:45.927485 port C0 DISC req: usage 1 usb3 1 usb2 5
530 18:37:45.931029 Raw Buffer output 0 00000511
531 18:37:45.934601 Raw Buffer output 1 00000000
532 18:37:45.938155 pmc_send_ipc_cmd succeeded
533 18:37:45.944394 port C1 DISC req: usage 1 usb3 2 usb2 3
534 18:37:45.944865 Raw Buffer output 0 00000321
535 18:37:45.947872 Raw Buffer output 1 00000000
536 18:37:45.952243 pmc_send_ipc_cmd succeeded
537 18:37:45.957577 Detected 4 core, 8 thread CPU.
538 18:37:45.960895 Detected 4 core, 8 thread CPU.
539 18:37:46.195313 Display FSP Version Info HOB
540 18:37:46.198645 Reference Code - CPU = a.0.4c.31
541 18:37:46.202124 uCode Version = 0.0.0.86
542 18:37:46.205298 TXT ACM version = ff.ff.ff.ffff
543 18:37:46.208986 Reference Code - ME = a.0.4c.31
544 18:37:46.212322 MEBx version = 0.0.0.0
545 18:37:46.215362 ME Firmware Version = Consumer SKU
546 18:37:46.218694 Reference Code - PCH = a.0.4c.31
547 18:37:46.222038 PCH-CRID Status = Disabled
548 18:37:46.224993 PCH-CRID Original Value = ff.ff.ff.ffff
549 18:37:46.228641 PCH-CRID New Value = ff.ff.ff.ffff
550 18:37:46.232033 OPROM - RST - RAID = ff.ff.ff.ffff
551 18:37:46.235081 PCH Hsio Version = 4.0.0.0
552 18:37:46.238464 Reference Code - SA - System Agent = a.0.4c.31
553 18:37:46.242111 Reference Code - MRC = 2.0.0.1
554 18:37:46.245127 SA - PCIe Version = a.0.4c.31
555 18:37:46.248553 SA-CRID Status = Disabled
556 18:37:46.251768 SA-CRID Original Value = 0.0.0.1
557 18:37:46.255088 SA-CRID New Value = 0.0.0.1
558 18:37:46.258288 OPROM - VBIOS = ff.ff.ff.ffff
559 18:37:46.261871 IO Manageability Engine FW Version = 11.1.4.0
560 18:37:46.264962 PHY Build Version = 0.0.0.e0
561 18:37:46.268287 Thunderbolt(TM) FW Version = 0.0.0.0
562 18:37:46.275036 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
563 18:37:46.278576 ITSS IRQ Polarities Before:
564 18:37:46.279174 IPC0: 0xffffffff
565 18:37:46.281686 IPC1: 0xffffffff
566 18:37:46.282285 IPC2: 0xffffffff
567 18:37:46.284866 IPC3: 0xffffffff
568 18:37:46.288168 ITSS IRQ Polarities After:
569 18:37:46.288728 IPC0: 0xffffffff
570 18:37:46.291463 IPC1: 0xffffffff
571 18:37:46.292029 IPC2: 0xffffffff
572 18:37:46.294456 IPC3: 0xffffffff
573 18:37:46.298076 Found PCIe Root Port #9 at PCI: 00:1d.0.
574 18:37:46.311323 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
575 18:37:46.321407 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
576 18:37:46.334453 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
577 18:37:46.340801 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
578 18:37:46.344041 Enumerating buses...
579 18:37:46.347477 Show all devs... Before device enumeration.
580 18:37:46.350894 Root Device: enabled 1
581 18:37:46.351356 DOMAIN: 0000: enabled 1
582 18:37:46.353911 CPU_CLUSTER: 0: enabled 1
583 18:37:46.357415 PCI: 00:00.0: enabled 1
584 18:37:46.360710 PCI: 00:02.0: enabled 1
585 18:37:46.361175 PCI: 00:04.0: enabled 1
586 18:37:46.363994 PCI: 00:05.0: enabled 1
587 18:37:46.367817 PCI: 00:06.0: enabled 0
588 18:37:46.370794 PCI: 00:07.0: enabled 0
589 18:37:46.371255 PCI: 00:07.1: enabled 0
590 18:37:46.374147 PCI: 00:07.2: enabled 0
591 18:37:46.377438 PCI: 00:07.3: enabled 0
592 18:37:46.381093 PCI: 00:08.0: enabled 1
593 18:37:46.381677 PCI: 00:09.0: enabled 0
594 18:37:46.383986 PCI: 00:0a.0: enabled 0
595 18:37:46.387672 PCI: 00:0d.0: enabled 1
596 18:37:46.388227 PCI: 00:0d.1: enabled 0
597 18:37:46.391101 PCI: 00:0d.2: enabled 0
598 18:37:46.394095 PCI: 00:0d.3: enabled 0
599 18:37:46.397475 PCI: 00:0e.0: enabled 0
600 18:37:46.398066 PCI: 00:10.2: enabled 1
601 18:37:46.400876 PCI: 00:10.6: enabled 0
602 18:37:46.403781 PCI: 00:10.7: enabled 0
603 18:37:46.407193 PCI: 00:12.0: enabled 0
604 18:37:46.407758 PCI: 00:12.6: enabled 0
605 18:37:46.410719 PCI: 00:13.0: enabled 0
606 18:37:46.414292 PCI: 00:14.0: enabled 1
607 18:37:46.417567 PCI: 00:14.1: enabled 0
608 18:37:46.418158 PCI: 00:14.2: enabled 1
609 18:37:46.420935 PCI: 00:14.3: enabled 1
610 18:37:46.423678 PCI: 00:15.0: enabled 1
611 18:37:46.427311 PCI: 00:15.1: enabled 1
612 18:37:46.427877 PCI: 00:15.2: enabled 1
613 18:37:46.430271 PCI: 00:15.3: enabled 1
614 18:37:46.433900 PCI: 00:16.0: enabled 1
615 18:37:46.434595 PCI: 00:16.1: enabled 0
616 18:37:46.437334 PCI: 00:16.2: enabled 0
617 18:37:46.440850 PCI: 00:16.3: enabled 0
618 18:37:46.443794 PCI: 00:16.4: enabled 0
619 18:37:46.444280 PCI: 00:16.5: enabled 0
620 18:37:46.446989 PCI: 00:17.0: enabled 1
621 18:37:46.450387 PCI: 00:19.0: enabled 0
622 18:37:46.453689 PCI: 00:19.1: enabled 1
623 18:37:46.454186 PCI: 00:19.2: enabled 0
624 18:37:46.457224 PCI: 00:1c.0: enabled 1
625 18:37:46.460133 PCI: 00:1c.1: enabled 0
626 18:37:46.463418 PCI: 00:1c.2: enabled 0
627 18:37:46.463883 PCI: 00:1c.3: enabled 0
628 18:37:46.467161 PCI: 00:1c.4: enabled 0
629 18:37:46.470109 PCI: 00:1c.5: enabled 0
630 18:37:46.473374 PCI: 00:1c.6: enabled 1
631 18:37:46.473863 PCI: 00:1c.7: enabled 0
632 18:37:46.477385 PCI: 00:1d.0: enabled 1
633 18:37:46.480532 PCI: 00:1d.1: enabled 0
634 18:37:46.481095 PCI: 00:1d.2: enabled 1
635 18:37:46.483921 PCI: 00:1d.3: enabled 0
636 18:37:46.486897 PCI: 00:1e.0: enabled 1
637 18:37:46.490667 PCI: 00:1e.1: enabled 0
638 18:37:46.491222 PCI: 00:1e.2: enabled 1
639 18:37:46.493686 PCI: 00:1e.3: enabled 1
640 18:37:46.497037 PCI: 00:1f.0: enabled 1
641 18:37:46.500296 PCI: 00:1f.1: enabled 0
642 18:37:46.500858 PCI: 00:1f.2: enabled 1
643 18:37:46.503705 PCI: 00:1f.3: enabled 1
644 18:37:46.506774 PCI: 00:1f.4: enabled 0
645 18:37:46.510007 PCI: 00:1f.5: enabled 1
646 18:37:46.510472 PCI: 00:1f.6: enabled 0
647 18:37:46.513629 PCI: 00:1f.7: enabled 0
648 18:37:46.517185 APIC: 00: enabled 1
649 18:37:46.517790 GENERIC: 0.0: enabled 1
650 18:37:46.520152 GENERIC: 0.0: enabled 1
651 18:37:46.523336 GENERIC: 1.0: enabled 1
652 18:37:46.526958 GENERIC: 0.0: enabled 1
653 18:37:46.527515 GENERIC: 1.0: enabled 1
654 18:37:46.530044 USB0 port 0: enabled 1
655 18:37:46.533322 GENERIC: 0.0: enabled 1
656 18:37:46.533909 USB0 port 0: enabled 1
657 18:37:46.536697 GENERIC: 0.0: enabled 1
658 18:37:46.539900 I2C: 00:1a: enabled 1
659 18:37:46.543468 I2C: 00:31: enabled 1
660 18:37:46.544078 I2C: 00:32: enabled 1
661 18:37:46.546487 I2C: 00:10: enabled 1
662 18:37:46.549832 I2C: 00:15: enabled 1
663 18:37:46.550331 GENERIC: 0.0: enabled 0
664 18:37:46.553209 GENERIC: 1.0: enabled 0
665 18:37:46.556867 GENERIC: 0.0: enabled 1
666 18:37:46.557425 SPI: 00: enabled 1
667 18:37:46.559967 SPI: 00: enabled 1
668 18:37:46.562946 PNP: 0c09.0: enabled 1
669 18:37:46.563412 GENERIC: 0.0: enabled 1
670 18:37:46.566547 USB3 port 0: enabled 1
671 18:37:46.569833 USB3 port 1: enabled 1
672 18:37:46.573071 USB3 port 2: enabled 0
673 18:37:46.573535 USB3 port 3: enabled 0
674 18:37:46.576289 USB2 port 0: enabled 0
675 18:37:46.579920 USB2 port 1: enabled 1
676 18:37:46.580483 USB2 port 2: enabled 1
677 18:37:46.583294 USB2 port 3: enabled 0
678 18:37:46.586352 USB2 port 4: enabled 1
679 18:37:46.586853 USB2 port 5: enabled 0
680 18:37:46.589853 USB2 port 6: enabled 0
681 18:37:46.593419 USB2 port 7: enabled 0
682 18:37:46.596247 USB2 port 8: enabled 0
683 18:37:46.596804 USB2 port 9: enabled 0
684 18:37:46.599692 USB3 port 0: enabled 0
685 18:37:46.603061 USB3 port 1: enabled 1
686 18:37:46.603619 USB3 port 2: enabled 0
687 18:37:46.606515 USB3 port 3: enabled 0
688 18:37:46.609314 GENERIC: 0.0: enabled 1
689 18:37:46.613286 GENERIC: 1.0: enabled 1
690 18:37:46.613885 APIC: 01: enabled 1
691 18:37:46.616339 APIC: 03: enabled 1
692 18:37:46.616799 APIC: 05: enabled 1
693 18:37:46.619531 APIC: 07: enabled 1
694 18:37:46.622916 APIC: 06: enabled 1
695 18:37:46.623379 APIC: 02: enabled 1
696 18:37:46.626367 APIC: 04: enabled 1
697 18:37:46.629416 Compare with tree...
698 18:37:46.630013 Root Device: enabled 1
699 18:37:46.632935 DOMAIN: 0000: enabled 1
700 18:37:46.635998 PCI: 00:00.0: enabled 1
701 18:37:46.639226 PCI: 00:02.0: enabled 1
702 18:37:46.639826 PCI: 00:04.0: enabled 1
703 18:37:46.642612 GENERIC: 0.0: enabled 1
704 18:37:46.646052 PCI: 00:05.0: enabled 1
705 18:37:46.649331 PCI: 00:06.0: enabled 0
706 18:37:46.652855 PCI: 00:07.0: enabled 0
707 18:37:46.656380 GENERIC: 0.0: enabled 1
708 18:37:46.656943 PCI: 00:07.1: enabled 0
709 18:37:46.659278 GENERIC: 1.0: enabled 1
710 18:37:46.662527 PCI: 00:07.2: enabled 0
711 18:37:46.666301 GENERIC: 0.0: enabled 1
712 18:37:46.669537 PCI: 00:07.3: enabled 0
713 18:37:46.670148 GENERIC: 1.0: enabled 1
714 18:37:46.672538 PCI: 00:08.0: enabled 1
715 18:37:46.675901 PCI: 00:09.0: enabled 0
716 18:37:46.679318 PCI: 00:0a.0: enabled 0
717 18:37:46.682696 PCI: 00:0d.0: enabled 1
718 18:37:46.683256 USB0 port 0: enabled 1
719 18:37:46.686300 USB3 port 0: enabled 1
720 18:37:46.689478 USB3 port 1: enabled 1
721 18:37:46.692542 USB3 port 2: enabled 0
722 18:37:46.696160 USB3 port 3: enabled 0
723 18:37:46.696721 PCI: 00:0d.1: enabled 0
724 18:37:46.699107 PCI: 00:0d.2: enabled 0
725 18:37:46.702627 GENERIC: 0.0: enabled 1
726 18:37:46.706155 PCI: 00:0d.3: enabled 0
727 18:37:46.709213 PCI: 00:0e.0: enabled 0
728 18:37:46.709679 PCI: 00:10.2: enabled 1
729 18:37:46.712661 PCI: 00:10.6: enabled 0
730 18:37:46.715518 PCI: 00:10.7: enabled 0
731 18:37:46.718794 PCI: 00:12.0: enabled 0
732 18:37:46.722443 PCI: 00:12.6: enabled 0
733 18:37:46.723011 PCI: 00:13.0: enabled 0
734 18:37:46.725782 PCI: 00:14.0: enabled 1
735 18:37:46.729061 USB0 port 0: enabled 1
736 18:37:46.732332 USB2 port 0: enabled 0
737 18:37:46.735668 USB2 port 1: enabled 1
738 18:37:46.736229 USB2 port 2: enabled 1
739 18:37:46.739119 USB2 port 3: enabled 0
740 18:37:46.742493 USB2 port 4: enabled 1
741 18:37:46.745550 USB2 port 5: enabled 0
742 18:37:46.748907 USB2 port 6: enabled 0
743 18:37:46.752382 USB2 port 7: enabled 0
744 18:37:46.752973 USB2 port 8: enabled 0
745 18:37:46.755720 USB2 port 9: enabled 0
746 18:37:46.758726 USB3 port 0: enabled 0
747 18:37:46.761836 USB3 port 1: enabled 1
748 18:37:46.765452 USB3 port 2: enabled 0
749 18:37:46.769090 USB3 port 3: enabled 0
750 18:37:46.769652 PCI: 00:14.1: enabled 0
751 18:37:46.772420 PCI: 00:14.2: enabled 1
752 18:37:46.775415 PCI: 00:14.3: enabled 1
753 18:37:46.778813 GENERIC: 0.0: enabled 1
754 18:37:46.782185 PCI: 00:15.0: enabled 1
755 18:37:46.782647 I2C: 00:1a: enabled 1
756 18:37:46.785523 I2C: 00:31: enabled 1
757 18:37:46.788822 I2C: 00:32: enabled 1
758 18:37:46.792242 PCI: 00:15.1: enabled 1
759 18:37:46.792802 I2C: 00:10: enabled 1
760 18:37:46.795767 PCI: 00:15.2: enabled 1
761 18:37:46.798530 PCI: 00:15.3: enabled 1
762 18:37:46.802148 PCI: 00:16.0: enabled 1
763 18:37:46.805448 PCI: 00:16.1: enabled 0
764 18:37:46.806040 PCI: 00:16.2: enabled 0
765 18:37:46.808871 PCI: 00:16.3: enabled 0
766 18:37:46.812977 PCI: 00:16.4: enabled 0
767 18:37:46.813440 PCI: 00:16.5: enabled 0
768 18:37:46.816514 PCI: 00:17.0: enabled 1
769 18:37:46.819881 PCI: 00:19.0: enabled 0
770 18:37:46.823036 PCI: 00:19.1: enabled 1
771 18:37:46.826398 I2C: 00:15: enabled 1
772 18:37:46.826863 PCI: 00:19.2: enabled 0
773 18:37:46.829624 PCI: 00:1d.0: enabled 1
774 18:37:46.833442 GENERIC: 0.0: enabled 1
775 18:37:46.836382 PCI: 00:1e.0: enabled 1
776 18:37:46.839942 PCI: 00:1e.1: enabled 0
777 18:37:46.840508 PCI: 00:1e.2: enabled 1
778 18:37:46.890062 SPI: 00: enabled 1
779 18:37:46.890632 PCI: 00:1e.3: enabled 1
780 18:37:46.891002 SPI: 00: enabled 1
781 18:37:46.891339 PCI: 00:1f.0: enabled 1
782 18:37:46.891666 PNP: 0c09.0: enabled 1
783 18:37:46.892338 PCI: 00:1f.1: enabled 0
784 18:37:46.892688 PCI: 00:1f.2: enabled 1
785 18:37:46.893007 GENERIC: 0.0: enabled 1
786 18:37:46.893316 GENERIC: 0.0: enabled 1
787 18:37:46.893622 GENERIC: 1.0: enabled 1
788 18:37:46.893990 PCI: 00:1f.3: enabled 1
789 18:37:46.894293 PCI: 00:1f.4: enabled 0
790 18:37:46.894593 PCI: 00:1f.5: enabled 1
791 18:37:46.894893 PCI: 00:1f.6: enabled 0
792 18:37:46.895169 PCI: 00:1f.7: enabled 0
793 18:37:46.895224 CPU_CLUSTER: 0: enabled 1
794 18:37:46.895280 APIC: 00: enabled 1
795 18:37:46.895335 APIC: 01: enabled 1
796 18:37:46.895390 APIC: 03: enabled 1
797 18:37:46.941628 APIC: 05: enabled 1
798 18:37:46.942230 APIC: 07: enabled 1
799 18:37:46.942597 APIC: 06: enabled 1
800 18:37:46.942930 APIC: 02: enabled 1
801 18:37:46.943261 APIC: 04: enabled 1
802 18:37:46.943580 Root Device scanning...
803 18:37:46.943889 scan_static_bus for Root Device
804 18:37:46.944195 DOMAIN: 0000 enabled
805 18:37:46.944496 CPU_CLUSTER: 0 enabled
806 18:37:46.944795 DOMAIN: 0000 scanning...
807 18:37:46.945461 PCI: pci_scan_bus for bus 00
808 18:37:46.945827 PCI: 00:00.0 [8086/0000] ops
809 18:37:46.946158 PCI: 00:00.0 [8086/9a12] enabled
810 18:37:46.946678 PCI: 00:02.0 [8086/0000] bus ops
811 18:37:46.947010 PCI: 00:02.0 [8086/9a40] enabled
812 18:37:46.947321 PCI: 00:04.0 [8086/0000] bus ops
813 18:37:46.947623 PCI: 00:04.0 [8086/9a03] enabled
814 18:37:46.947959 PCI: 00:05.0 [8086/9a19] enabled
815 18:37:46.955402 PCI: 00:07.0 [0000/0000] hidden
816 18:37:46.955954 PCI: 00:08.0 [8086/9a11] enabled
817 18:37:46.956317 PCI: 00:0a.0 [8086/9a0d] disabled
818 18:37:46.956655 PCI: 00:0d.0 [8086/0000] bus ops
819 18:37:46.958857 PCI: 00:0d.0 [8086/9a13] enabled
820 18:37:46.962063 PCI: 00:14.0 [8086/0000] bus ops
821 18:37:46.965681 PCI: 00:14.0 [8086/a0ed] enabled
822 18:37:46.969087 PCI: 00:14.2 [8086/a0ef] enabled
823 18:37:46.972482 PCI: 00:14.3 [8086/0000] bus ops
824 18:37:46.975267 PCI: 00:14.3 [8086/a0f0] enabled
825 18:37:46.978679 PCI: 00:15.0 [8086/0000] bus ops
826 18:37:46.981974 PCI: 00:15.0 [8086/a0e8] enabled
827 18:37:46.985518 PCI: 00:15.1 [8086/0000] bus ops
828 18:37:46.988538 PCI: 00:15.1 [8086/a0e9] enabled
829 18:37:46.992304 PCI: 00:15.2 [8086/0000] bus ops
830 18:37:46.995546 PCI: 00:15.2 [8086/a0ea] enabled
831 18:37:46.998662 PCI: 00:15.3 [8086/0000] bus ops
832 18:37:47.001907 PCI: 00:15.3 [8086/a0eb] enabled
833 18:37:47.005412 PCI: 00:16.0 [8086/0000] ops
834 18:37:47.008464 PCI: 00:16.0 [8086/a0e0] enabled
835 18:37:47.011777 PCI: Static device PCI: 00:17.0 not found, disabling it.
836 18:37:47.015428 PCI: 00:19.0 [8086/0000] bus ops
837 18:37:47.021637 PCI: 00:19.0 [8086/a0c5] disabled
838 18:37:47.025046 PCI: 00:19.1 [8086/0000] bus ops
839 18:37:47.028048 PCI: 00:19.1 [8086/a0c6] enabled
840 18:37:47.031292 PCI: 00:1d.0 [8086/0000] bus ops
841 18:37:47.034801 PCI: 00:1d.0 [8086/a0b0] enabled
842 18:37:47.035372 PCI: 00:1e.0 [8086/0000] ops
843 18:37:47.038100 PCI: 00:1e.0 [8086/a0a8] enabled
844 18:37:47.041300 PCI: 00:1e.2 [8086/0000] bus ops
845 18:37:47.045076 PCI: 00:1e.2 [8086/a0aa] enabled
846 18:37:47.048091 PCI: 00:1e.3 [8086/0000] bus ops
847 18:37:47.051364 PCI: 00:1e.3 [8086/a0ab] enabled
848 18:37:47.054966 PCI: 00:1f.0 [8086/0000] bus ops
849 18:37:47.058316 PCI: 00:1f.0 [8086/a087] enabled
850 18:37:47.061585 RTC Init
851 18:37:47.064924 Set power on after power failure.
852 18:37:47.065484 Disabling Deep S3
853 18:37:47.068621 Disabling Deep S3
854 18:37:47.071893 Disabling Deep S4
855 18:37:47.072452 Disabling Deep S4
856 18:37:47.074697 Disabling Deep S5
857 18:37:47.075155 Disabling Deep S5
858 18:37:47.078249 PCI: 00:1f.2 [0000/0000] hidden
859 18:37:47.081334 PCI: 00:1f.3 [8086/0000] bus ops
860 18:37:47.085096 PCI: 00:1f.3 [8086/a0c8] enabled
861 18:37:47.087918 PCI: 00:1f.5 [8086/0000] bus ops
862 18:37:47.091340 PCI: 00:1f.5 [8086/a0a4] enabled
863 18:37:47.094659 PCI: Leftover static devices:
864 18:37:47.098160 PCI: 00:10.2
865 18:37:47.098721 PCI: 00:10.6
866 18:37:47.099087 PCI: 00:10.7
867 18:37:47.101174 PCI: 00:06.0
868 18:37:47.101631 PCI: 00:07.1
869 18:37:47.104939 PCI: 00:07.2
870 18:37:47.105495 PCI: 00:07.3
871 18:37:47.107776 PCI: 00:09.0
872 18:37:47.108232 PCI: 00:0d.1
873 18:37:47.108591 PCI: 00:0d.2
874 18:37:47.111104 PCI: 00:0d.3
875 18:37:47.111563 PCI: 00:0e.0
876 18:37:47.114610 PCI: 00:12.0
877 18:37:47.115168 PCI: 00:12.6
878 18:37:47.115530 PCI: 00:13.0
879 18:37:47.118129 PCI: 00:14.1
880 18:37:47.118687 PCI: 00:16.1
881 18:37:47.121453 PCI: 00:16.2
882 18:37:47.122043 PCI: 00:16.3
883 18:37:47.122410 PCI: 00:16.4
884 18:37:47.125014 PCI: 00:16.5
885 18:37:47.125657 PCI: 00:17.0
886 18:37:47.127746 PCI: 00:19.2
887 18:37:47.128202 PCI: 00:1e.1
888 18:37:47.131326 PCI: 00:1f.1
889 18:37:47.131896 PCI: 00:1f.4
890 18:37:47.132260 PCI: 00:1f.6
891 18:37:47.134582 PCI: 00:1f.7
892 18:37:47.137772 PCI: Check your devicetree.cb.
893 18:37:47.138233 PCI: 00:02.0 scanning...
894 18:37:47.144960 scan_generic_bus for PCI: 00:02.0
895 18:37:47.147736 scan_generic_bus for PCI: 00:02.0 done
896 18:37:47.151376 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
897 18:37:47.154306 PCI: 00:04.0 scanning...
898 18:37:47.158054 scan_generic_bus for PCI: 00:04.0
899 18:37:47.161349 GENERIC: 0.0 enabled
900 18:37:47.164404 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
901 18:37:47.171233 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
902 18:37:47.174589 PCI: 00:0d.0 scanning...
903 18:37:47.177861 scan_static_bus for PCI: 00:0d.0
904 18:37:47.178422 USB0 port 0 enabled
905 18:37:47.180945 USB0 port 0 scanning...
906 18:37:47.184600 scan_static_bus for USB0 port 0
907 18:37:47.187498 USB3 port 0 enabled
908 18:37:47.187958 USB3 port 1 enabled
909 18:37:47.191131 USB3 port 2 disabled
910 18:37:47.194191 USB3 port 3 disabled
911 18:37:47.194649 USB3 port 0 scanning...
912 18:37:47.198061 scan_static_bus for USB3 port 0
913 18:37:47.204495 scan_static_bus for USB3 port 0 done
914 18:37:47.207685 scan_bus: bus USB3 port 0 finished in 6 msecs
915 18:37:47.210866 USB3 port 1 scanning...
916 18:37:47.214127 scan_static_bus for USB3 port 1
917 18:37:47.217738 scan_static_bus for USB3 port 1 done
918 18:37:47.220775 scan_bus: bus USB3 port 1 finished in 6 msecs
919 18:37:47.223927 scan_static_bus for USB0 port 0 done
920 18:37:47.231043 scan_bus: bus USB0 port 0 finished in 43 msecs
921 18:37:47.234447 scan_static_bus for PCI: 00:0d.0 done
922 18:37:47.237787 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
923 18:37:47.240626 PCI: 00:14.0 scanning...
924 18:37:47.244429 scan_static_bus for PCI: 00:14.0
925 18:37:47.247378 USB0 port 0 enabled
926 18:37:47.250665 USB0 port 0 scanning...
927 18:37:47.254396 scan_static_bus for USB0 port 0
928 18:37:47.255004 USB2 port 0 disabled
929 18:37:47.257389 USB2 port 1 enabled
930 18:37:47.260544 USB2 port 2 enabled
931 18:37:47.260998 USB2 port 3 disabled
932 18:37:47.263847 USB2 port 4 enabled
933 18:37:47.264364 USB2 port 5 disabled
934 18:37:47.267202 USB2 port 6 disabled
935 18:37:47.270674 USB2 port 7 disabled
936 18:37:47.271241 USB2 port 8 disabled
937 18:37:47.273700 USB2 port 9 disabled
938 18:37:47.277359 USB3 port 0 disabled
939 18:37:47.277949 USB3 port 1 enabled
940 18:37:47.280596 USB3 port 2 disabled
941 18:37:47.284173 USB3 port 3 disabled
942 18:37:47.284742 USB2 port 1 scanning...
943 18:37:47.287186 scan_static_bus for USB2 port 1
944 18:37:47.293888 scan_static_bus for USB2 port 1 done
945 18:37:47.297508 scan_bus: bus USB2 port 1 finished in 6 msecs
946 18:37:47.300477 USB2 port 2 scanning...
947 18:37:47.303883 scan_static_bus for USB2 port 2
948 18:37:47.307173 scan_static_bus for USB2 port 2 done
949 18:37:47.310548 scan_bus: bus USB2 port 2 finished in 6 msecs
950 18:37:47.313976 USB2 port 4 scanning...
951 18:37:47.317380 scan_static_bus for USB2 port 4
952 18:37:47.320317 scan_static_bus for USB2 port 4 done
953 18:37:47.323404 scan_bus: bus USB2 port 4 finished in 6 msecs
954 18:37:47.326717 USB3 port 1 scanning...
955 18:37:47.330328 scan_static_bus for USB3 port 1
956 18:37:47.333246 scan_static_bus for USB3 port 1 done
957 18:37:47.340522 scan_bus: bus USB3 port 1 finished in 6 msecs
958 18:37:47.343253 scan_static_bus for USB0 port 0 done
959 18:37:47.346647 scan_bus: bus USB0 port 0 finished in 93 msecs
960 18:37:47.350052 scan_static_bus for PCI: 00:14.0 done
961 18:37:47.356778 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
962 18:37:47.359988 PCI: 00:14.3 scanning...
963 18:37:47.363053 scan_static_bus for PCI: 00:14.3
964 18:37:47.363568 GENERIC: 0.0 enabled
965 18:37:47.370182 scan_static_bus for PCI: 00:14.3 done
966 18:37:47.373321 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
967 18:37:47.376765 PCI: 00:15.0 scanning...
968 18:37:47.379642 scan_static_bus for PCI: 00:15.0
969 18:37:47.380143 I2C: 00:1a enabled
970 18:37:47.382924 I2C: 00:31 enabled
971 18:37:47.387134 I2C: 00:32 enabled
972 18:37:47.390485 scan_static_bus for PCI: 00:15.0 done
973 18:37:47.393972 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
974 18:37:47.397720 PCI: 00:15.1 scanning...
975 18:37:47.400708 scan_static_bus for PCI: 00:15.1
976 18:37:47.401283 I2C: 00:10 enabled
977 18:37:47.407264 scan_static_bus for PCI: 00:15.1 done
978 18:37:47.410695 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
979 18:37:47.413875 PCI: 00:15.2 scanning...
980 18:37:47.417536 scan_static_bus for PCI: 00:15.2
981 18:37:47.420864 scan_static_bus for PCI: 00:15.2 done
982 18:37:47.423487 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
983 18:37:47.427810 PCI: 00:15.3 scanning...
984 18:37:47.430171 scan_static_bus for PCI: 00:15.3
985 18:37:47.433767 scan_static_bus for PCI: 00:15.3 done
986 18:37:47.440269 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
987 18:37:47.443842 PCI: 00:19.1 scanning...
988 18:37:47.446640 scan_static_bus for PCI: 00:19.1
989 18:37:47.447104 I2C: 00:15 enabled
990 18:37:47.449987 scan_static_bus for PCI: 00:19.1 done
991 18:37:47.456433 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
992 18:37:47.460006 PCI: 00:1d.0 scanning...
993 18:37:47.463637 do_pci_scan_bridge for PCI: 00:1d.0
994 18:37:47.466682 PCI: pci_scan_bus for bus 01
995 18:37:47.470066 PCI: 01:00.0 [1c5c/174a] enabled
996 18:37:47.470632 GENERIC: 0.0 enabled
997 18:37:47.473554 Enabling Common Clock Configuration
998 18:37:47.479946 L1 Sub-State supported from root port 29
999 18:37:47.483453 L1 Sub-State Support = 0xf
1000 18:37:47.484026 CommonModeRestoreTime = 0x28
1001 18:37:47.489988 Power On Value = 0x16, Power On Scale = 0x0
1002 18:37:47.490566 ASPM: Enabled L1
1003 18:37:47.493340 PCIe: Max_Payload_Size adjusted to 128
1004 18:37:47.500306 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1005 18:37:47.502990 PCI: 00:1e.2 scanning...
1006 18:37:47.506444 scan_generic_bus for PCI: 00:1e.2
1007 18:37:47.507019 SPI: 00 enabled
1008 18:37:47.512902 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1009 18:37:47.519761 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1010 18:37:47.520337 PCI: 00:1e.3 scanning...
1011 18:37:47.523040 scan_generic_bus for PCI: 00:1e.3
1012 18:37:47.526060 SPI: 00 enabled
1013 18:37:47.533074 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1014 18:37:47.536234 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1015 18:37:47.539616 PCI: 00:1f.0 scanning...
1016 18:37:47.543001 scan_static_bus for PCI: 00:1f.0
1017 18:37:47.546240 PNP: 0c09.0 enabled
1018 18:37:47.546811 PNP: 0c09.0 scanning...
1019 18:37:47.549223 scan_static_bus for PNP: 0c09.0
1020 18:37:47.556129 scan_static_bus for PNP: 0c09.0 done
1021 18:37:47.559877 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1022 18:37:47.562751 scan_static_bus for PCI: 00:1f.0 done
1023 18:37:47.569851 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1024 18:37:47.570429 PCI: 00:1f.2 scanning...
1025 18:37:47.572939 scan_static_bus for PCI: 00:1f.2
1026 18:37:47.576425 GENERIC: 0.0 enabled
1027 18:37:47.579197 GENERIC: 0.0 scanning...
1028 18:37:47.582411 scan_static_bus for GENERIC: 0.0
1029 18:37:47.586109 GENERIC: 0.0 enabled
1030 18:37:47.586678 GENERIC: 1.0 enabled
1031 18:37:47.589356 scan_static_bus for GENERIC: 0.0 done
1032 18:37:47.596272 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1033 18:37:47.599089 scan_static_bus for PCI: 00:1f.2 done
1034 18:37:47.602483 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1035 18:37:47.605882 PCI: 00:1f.3 scanning...
1036 18:37:47.609558 scan_static_bus for PCI: 00:1f.3
1037 18:37:47.612202 scan_static_bus for PCI: 00:1f.3 done
1038 18:37:47.619173 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1039 18:37:47.622619 PCI: 00:1f.5 scanning...
1040 18:37:47.625891 scan_generic_bus for PCI: 00:1f.5
1041 18:37:47.629352 scan_generic_bus for PCI: 00:1f.5 done
1042 18:37:47.632292 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1043 18:37:47.639097 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1044 18:37:47.642291 scan_static_bus for Root Device done
1045 18:37:47.645841 scan_bus: bus Root Device finished in 736 msecs
1046 18:37:47.648901 done
1047 18:37:47.652016 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1048 18:37:47.655454 Chrome EC: UHEPI supported
1049 18:37:47.661804 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1050 18:37:47.668772 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1051 18:37:47.672140 SPI flash protection: WPSW=0 SRP0=0
1052 18:37:47.678634 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1053 18:37:47.681736 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1054 18:37:47.685151 found VGA at PCI: 00:02.0
1055 18:37:47.688553 Setting up VGA for PCI: 00:02.0
1056 18:37:47.695023 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1057 18:37:47.698199 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1058 18:37:47.701756 Allocating resources...
1059 18:37:47.705080 Reading resources...
1060 18:37:47.708710 Root Device read_resources bus 0 link: 0
1061 18:37:47.711638 DOMAIN: 0000 read_resources bus 0 link: 0
1062 18:37:47.718538 PCI: 00:04.0 read_resources bus 1 link: 0
1063 18:37:47.721682 PCI: 00:04.0 read_resources bus 1 link: 0 done
1064 18:37:47.728698 PCI: 00:0d.0 read_resources bus 0 link: 0
1065 18:37:47.731683 USB0 port 0 read_resources bus 0 link: 0
1066 18:37:47.738319 USB0 port 0 read_resources bus 0 link: 0 done
1067 18:37:47.741280 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1068 18:37:47.748258 PCI: 00:14.0 read_resources bus 0 link: 0
1069 18:37:47.751329 USB0 port 0 read_resources bus 0 link: 0
1070 18:37:47.757847 USB0 port 0 read_resources bus 0 link: 0 done
1071 18:37:47.761332 PCI: 00:14.0 read_resources bus 0 link: 0 done
1072 18:37:47.767823 PCI: 00:14.3 read_resources bus 0 link: 0
1073 18:37:47.771328 PCI: 00:14.3 read_resources bus 0 link: 0 done
1074 18:37:47.777650 PCI: 00:15.0 read_resources bus 0 link: 0
1075 18:37:47.780999 PCI: 00:15.0 read_resources bus 0 link: 0 done
1076 18:37:47.787495 PCI: 00:15.1 read_resources bus 0 link: 0
1077 18:37:47.790604 PCI: 00:15.1 read_resources bus 0 link: 0 done
1078 18:37:47.798114 PCI: 00:19.1 read_resources bus 0 link: 0
1079 18:37:47.801399 PCI: 00:19.1 read_resources bus 0 link: 0 done
1080 18:37:47.807759 PCI: 00:1d.0 read_resources bus 1 link: 0
1081 18:37:47.810901 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1082 18:37:47.818084 PCI: 00:1e.2 read_resources bus 2 link: 0
1083 18:37:47.821459 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1084 18:37:47.827518 PCI: 00:1e.3 read_resources bus 3 link: 0
1085 18:37:47.831129 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1086 18:37:47.837806 PCI: 00:1f.0 read_resources bus 0 link: 0
1087 18:37:47.841072 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1088 18:37:47.847522 PCI: 00:1f.2 read_resources bus 0 link: 0
1089 18:37:47.850225 GENERIC: 0.0 read_resources bus 0 link: 0
1090 18:37:47.857318 GENERIC: 0.0 read_resources bus 0 link: 0 done
1091 18:37:47.860535 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1092 18:37:47.867231 DOMAIN: 0000 read_resources bus 0 link: 0 done
1093 18:37:47.870135 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1094 18:37:47.877121 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1095 18:37:47.880064 Root Device read_resources bus 0 link: 0 done
1096 18:37:47.883394 Done reading resources.
1097 18:37:47.890420 Show resources in subtree (Root Device)...After reading.
1098 18:37:47.893572 Root Device child on link 0 DOMAIN: 0000
1099 18:37:47.897018 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1100 18:37:47.906927 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1101 18:37:47.916803 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1102 18:37:47.917381 PCI: 00:00.0
1103 18:37:47.926591 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1104 18:37:47.936774 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1105 18:37:47.946522 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1106 18:37:47.956165 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1107 18:37:47.966416 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1108 18:37:47.976386 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1109 18:37:47.983004 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1110 18:37:47.992936 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1111 18:37:48.003099 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1112 18:37:48.012823 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1113 18:37:48.022590 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1114 18:37:48.033126 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1115 18:37:48.039435 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1116 18:37:48.049274 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1117 18:37:48.059020 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1118 18:37:48.069074 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1119 18:37:48.078976 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1120 18:37:48.089112 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1121 18:37:48.095550 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1122 18:37:48.105769 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1123 18:37:48.109002 PCI: 00:02.0
1124 18:37:48.118972 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 18:37:48.128772 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 18:37:48.138970 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 18:37:48.142340 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1128 18:37:48.151962 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1129 18:37:48.155386 GENERIC: 0.0
1130 18:37:48.155840 PCI: 00:05.0
1131 18:37:48.165067 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 18:37:48.168382 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1133 18:37:48.172102 GENERIC: 0.0
1134 18:37:48.175056 PCI: 00:08.0
1135 18:37:48.185069 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 18:37:48.185631 PCI: 00:0a.0
1137 18:37:48.188253 PCI: 00:0d.0 child on link 0 USB0 port 0
1138 18:37:48.198219 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1139 18:37:48.205033 USB0 port 0 child on link 0 USB3 port 0
1140 18:37:48.205799 USB3 port 0
1141 18:37:48.208474 USB3 port 1
1142 18:37:48.209033 USB3 port 2
1143 18:37:48.211698 USB3 port 3
1144 18:37:48.214915 PCI: 00:14.0 child on link 0 USB0 port 0
1145 18:37:48.225119 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1146 18:37:48.231763 USB0 port 0 child on link 0 USB2 port 0
1147 18:37:48.232334 USB2 port 0
1148 18:37:48.235017 USB2 port 1
1149 18:37:48.235574 USB2 port 2
1150 18:37:48.238117 USB2 port 3
1151 18:37:48.238677 USB2 port 4
1152 18:37:48.241377 USB2 port 5
1153 18:37:48.241890 USB2 port 6
1154 18:37:48.245023 USB2 port 7
1155 18:37:48.245576 USB2 port 8
1156 18:37:48.248265 USB2 port 9
1157 18:37:48.248822 USB3 port 0
1158 18:37:48.251080 USB3 port 1
1159 18:37:48.251688 USB3 port 2
1160 18:37:48.254232 USB3 port 3
1161 18:37:48.254723 PCI: 00:14.2
1162 18:37:48.264334 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 18:37:48.274281 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 18:37:48.281274 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1165 18:37:48.290932 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1166 18:37:48.291499 GENERIC: 0.0
1167 18:37:48.298101 PCI: 00:15.0 child on link 0 I2C: 00:1a
1168 18:37:48.307712 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 18:37:48.308310 I2C: 00:1a
1170 18:37:48.310715 I2C: 00:31
1171 18:37:48.311179 I2C: 00:32
1172 18:37:48.314395 PCI: 00:15.1 child on link 0 I2C: 00:10
1173 18:37:48.324607 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 18:37:48.327671 I2C: 00:10
1175 18:37:48.328126 PCI: 00:15.2
1176 18:37:48.337439 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 18:37:48.340747 PCI: 00:15.3
1178 18:37:48.350855 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 18:37:48.351462 PCI: 00:16.0
1180 18:37:48.360324 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 18:37:48.364149 PCI: 00:19.0
1182 18:37:48.367061 PCI: 00:19.1 child on link 0 I2C: 00:15
1183 18:37:48.377310 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 18:37:48.380537 I2C: 00:15
1185 18:37:48.383707 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1186 18:37:48.394036 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1187 18:37:48.403971 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1188 18:37:48.410348 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1189 18:37:48.413422 GENERIC: 0.0
1190 18:37:48.413937 PCI: 01:00.0
1191 18:37:48.424120 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 18:37:48.433620 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1193 18:37:48.443442 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1194 18:37:48.447065 PCI: 00:1e.0
1195 18:37:48.456654 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1196 18:37:48.460204 PCI: 00:1e.2 child on link 0 SPI: 00
1197 18:37:48.469999 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 18:37:48.470471 SPI: 00
1199 18:37:48.476901 PCI: 00:1e.3 child on link 0 SPI: 00
1200 18:37:48.486527 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 18:37:48.487077 SPI: 00
1202 18:37:48.490046 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1203 18:37:48.500099 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1204 18:37:48.503395 PNP: 0c09.0
1205 18:37:48.510143 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1206 18:37:48.516381 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1207 18:37:48.523125 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1208 18:37:48.533335 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1209 18:37:48.539863 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1210 18:37:48.540427 GENERIC: 0.0
1211 18:37:48.543060 GENERIC: 1.0
1212 18:37:48.543621 PCI: 00:1f.3
1213 18:37:48.552915 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 18:37:48.562747 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1215 18:37:48.566063 PCI: 00:1f.5
1216 18:37:48.576471 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1217 18:37:48.579267 CPU_CLUSTER: 0 child on link 0 APIC: 00
1218 18:37:48.579733 APIC: 00
1219 18:37:48.582500 APIC: 01
1220 18:37:48.582986 APIC: 03
1221 18:37:48.583355 APIC: 05
1222 18:37:48.585661 APIC: 07
1223 18:37:48.586152 APIC: 06
1224 18:37:48.586516 APIC: 02
1225 18:37:48.589047 APIC: 04
1226 18:37:48.595847 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1227 18:37:48.602629 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1228 18:37:48.609379 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1229 18:37:48.615731 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1230 18:37:48.618998 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 18:37:48.622205 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1232 18:37:48.626127 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1233 18:37:48.636161 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1234 18:37:48.642247 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 18:37:48.649416 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 18:37:48.655580 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1237 18:37:48.662343 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1238 18:37:48.668948 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1239 18:37:48.679009 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1240 18:37:48.685410 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1241 18:37:48.688898 DOMAIN: 0000: Resource ranges:
1242 18:37:48.691974 * Base: 1000, Size: 800, Tag: 100
1243 18:37:48.695644 * Base: 1900, Size: e700, Tag: 100
1244 18:37:48.702211 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1245 18:37:48.708764 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1246 18:37:48.715342 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1247 18:37:48.721864 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1248 18:37:48.728822 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1249 18:37:48.738615 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1250 18:37:48.745316 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1251 18:37:48.751578 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1252 18:37:48.762067 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1253 18:37:48.768398 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1254 18:37:48.774963 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1255 18:37:48.784822 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1256 18:37:48.791680 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1257 18:37:48.798197 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1258 18:37:48.808537 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1259 18:37:48.814900 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1260 18:37:48.821441 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1261 18:37:48.831575 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1262 18:37:48.838221 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1263 18:37:48.844585 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1264 18:37:48.854463 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1265 18:37:48.861234 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1266 18:37:48.867906 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1267 18:37:48.877699 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1268 18:37:48.884605 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1269 18:37:48.887557 DOMAIN: 0000: Resource ranges:
1270 18:37:48.891118 * Base: 7fc00000, Size: 40400000, Tag: 200
1271 18:37:48.897874 * Base: d0000000, Size: 28000000, Tag: 200
1272 18:37:48.900856 * Base: fa000000, Size: 1000000, Tag: 200
1273 18:37:48.904175 * Base: fb001000, Size: 2fff000, Tag: 200
1274 18:37:48.907593 * Base: fe010000, Size: 2e000, Tag: 200
1275 18:37:48.914279 * Base: fe03f000, Size: d41000, Tag: 200
1276 18:37:48.917786 * Base: fed88000, Size: 8000, Tag: 200
1277 18:37:48.921056 * Base: fed93000, Size: d000, Tag: 200
1278 18:37:48.924078 * Base: feda2000, Size: 1e000, Tag: 200
1279 18:37:48.930822 * Base: fede0000, Size: 1220000, Tag: 200
1280 18:37:48.934257 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1281 18:37:48.941028 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1282 18:37:48.947653 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1283 18:37:48.954088 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1284 18:37:48.960486 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1285 18:37:48.967007 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1286 18:37:48.973998 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1287 18:37:48.980683 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1288 18:37:48.987194 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1289 18:37:48.994117 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1290 18:37:49.000648 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1291 18:37:49.007086 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1292 18:37:49.014098 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1293 18:37:49.020606 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1294 18:37:49.026708 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1295 18:37:49.033910 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1296 18:37:49.040018 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1297 18:37:49.047052 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1298 18:37:49.053448 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1299 18:37:49.059987 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1300 18:37:49.066655 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1301 18:37:49.073284 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1302 18:37:49.080215 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1303 18:37:49.086717 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1304 18:37:49.096626 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1305 18:37:49.100311 PCI: 00:1d.0: Resource ranges:
1306 18:37:49.103554 * Base: 7fc00000, Size: 100000, Tag: 200
1307 18:37:49.109746 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1308 18:37:49.116690 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1309 18:37:49.122984 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1310 18:37:49.133083 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1311 18:37:49.139601 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1312 18:37:49.142956 Root Device assign_resources, bus 0 link: 0
1313 18:37:49.149821 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 18:37:49.155848 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1315 18:37:49.165842 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1316 18:37:49.172331 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1317 18:37:49.182687 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1318 18:37:49.185841 PCI: 00:04.0 assign_resources, bus 1 link: 0
1319 18:37:49.189110 PCI: 00:04.0 assign_resources, bus 1 link: 0
1320 18:37:49.199440 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1321 18:37:49.205871 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1322 18:37:49.215651 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1323 18:37:49.218906 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1324 18:37:49.225332 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1325 18:37:49.232076 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1326 18:37:49.235307 PCI: 00:14.0 assign_resources, bus 0 link: 0
1327 18:37:49.242294 PCI: 00:14.0 assign_resources, bus 0 link: 0
1328 18:37:49.249020 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1329 18:37:49.258646 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1330 18:37:49.265209 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1331 18:37:49.272134 PCI: 00:14.3 assign_resources, bus 0 link: 0
1332 18:37:49.275059 PCI: 00:14.3 assign_resources, bus 0 link: 0
1333 18:37:49.285359 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1334 18:37:49.288314 PCI: 00:15.0 assign_resources, bus 0 link: 0
1335 18:37:49.291780 PCI: 00:15.0 assign_resources, bus 0 link: 0
1336 18:37:49.301483 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1337 18:37:49.305014 PCI: 00:15.1 assign_resources, bus 0 link: 0
1338 18:37:49.311286 PCI: 00:15.1 assign_resources, bus 0 link: 0
1339 18:37:49.318340 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1340 18:37:49.327928 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1341 18:37:49.334436 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1342 18:37:49.344642 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1343 18:37:49.347710 PCI: 00:19.1 assign_resources, bus 0 link: 0
1344 18:37:49.351190 PCI: 00:19.1 assign_resources, bus 0 link: 0
1345 18:37:49.361153 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1346 18:37:49.370973 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1347 18:37:49.380817 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1348 18:37:49.384026 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 18:37:49.394184 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1350 18:37:49.400837 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1351 18:37:49.407553 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1352 18:37:49.413915 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1353 18:37:49.420903 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1354 18:37:49.427450 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1355 18:37:49.430587 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1356 18:37:49.437174 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1357 18:37:49.443656 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1358 18:37:49.446930 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1359 18:37:49.453995 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1360 18:37:49.457193 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1361 18:37:49.463835 LPC: Trying to open IO window from 800 size 1ff
1362 18:37:49.470297 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1363 18:37:49.480086 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1364 18:37:49.486766 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1365 18:37:49.493226 DOMAIN: 0000 assign_resources, bus 0 link: 0
1366 18:37:49.496819 Root Device assign_resources, bus 0 link: 0
1367 18:37:49.500080 Done setting resources.
1368 18:37:49.506641 Show resources in subtree (Root Device)...After assigning values.
1369 18:37:49.510238 Root Device child on link 0 DOMAIN: 0000
1370 18:37:49.513552 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1371 18:37:49.523534 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1372 18:37:49.533561 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1373 18:37:49.534159 PCI: 00:00.0
1374 18:37:49.542983 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1375 18:37:49.553153 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1376 18:37:49.563140 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1377 18:37:49.573099 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1378 18:37:49.582843 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1379 18:37:49.593051 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1380 18:37:49.599789 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1381 18:37:49.609440 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1382 18:37:49.619149 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1383 18:37:49.629065 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1384 18:37:49.638925 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1385 18:37:49.649358 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1386 18:37:49.655964 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1387 18:37:49.665954 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1388 18:37:49.675597 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1389 18:37:49.685694 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1390 18:37:49.695343 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1391 18:37:49.705498 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1392 18:37:49.712182 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1393 18:37:49.721772 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1394 18:37:49.725273 PCI: 00:02.0
1395 18:37:49.735233 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1396 18:37:49.744627 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1397 18:37:49.754571 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1398 18:37:49.757714 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1399 18:37:49.771346 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1400 18:37:49.771470 GENERIC: 0.0
1401 18:37:49.774714 PCI: 00:05.0
1402 18:37:49.784572 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1403 18:37:49.787745 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1404 18:37:49.791012 GENERIC: 0.0
1405 18:37:49.791105 PCI: 00:08.0
1406 18:37:49.800820 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1407 18:37:49.804330 PCI: 00:0a.0
1408 18:37:49.807665 PCI: 00:0d.0 child on link 0 USB0 port 0
1409 18:37:49.817503 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1410 18:37:49.824284 USB0 port 0 child on link 0 USB3 port 0
1411 18:37:49.824401 USB3 port 0
1412 18:37:49.827568 USB3 port 1
1413 18:37:49.827664 USB3 port 2
1414 18:37:49.830922 USB3 port 3
1415 18:37:49.834196 PCI: 00:14.0 child on link 0 USB0 port 0
1416 18:37:49.844042 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1417 18:37:49.850624 USB0 port 0 child on link 0 USB2 port 0
1418 18:37:49.850729 USB2 port 0
1419 18:37:49.853885 USB2 port 1
1420 18:37:49.853975 USB2 port 2
1421 18:37:49.857138 USB2 port 3
1422 18:37:49.857230 USB2 port 4
1423 18:37:49.860796 USB2 port 5
1424 18:37:49.860894 USB2 port 6
1425 18:37:49.863789 USB2 port 7
1426 18:37:49.863881 USB2 port 8
1427 18:37:49.867434 USB2 port 9
1428 18:37:49.867525 USB3 port 0
1429 18:37:49.870668 USB3 port 1
1430 18:37:49.873821 USB3 port 2
1431 18:37:49.873912 USB3 port 3
1432 18:37:49.877194 PCI: 00:14.2
1433 18:37:49.887297 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1434 18:37:49.897238 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1435 18:37:49.900332 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1436 18:37:49.910410 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1437 18:37:49.913610 GENERIC: 0.0
1438 18:37:49.916785 PCI: 00:15.0 child on link 0 I2C: 00:1a
1439 18:37:49.926688 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1440 18:37:49.930211 I2C: 00:1a
1441 18:37:49.930311 I2C: 00:31
1442 18:37:49.933368 I2C: 00:32
1443 18:37:49.936718 PCI: 00:15.1 child on link 0 I2C: 00:10
1444 18:37:49.946588 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1445 18:37:49.950162 I2C: 00:10
1446 18:37:49.950266 PCI: 00:15.2
1447 18:37:49.959869 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1448 18:37:49.963156 PCI: 00:15.3
1449 18:37:49.973398 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1450 18:37:49.973502 PCI: 00:16.0
1451 18:37:49.983207 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1452 18:37:49.986570 PCI: 00:19.0
1453 18:37:49.989945 PCI: 00:19.1 child on link 0 I2C: 00:15
1454 18:37:49.999837 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1455 18:37:50.002946 I2C: 00:15
1456 18:37:50.006216 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1457 18:37:50.016232 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1458 18:37:50.026333 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1459 18:37:50.039512 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1460 18:37:50.039652 GENERIC: 0.0
1461 18:37:50.042987 PCI: 01:00.0
1462 18:37:50.052620 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1463 18:37:50.062674 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1464 18:37:50.072640 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1465 18:37:50.075910 PCI: 00:1e.0
1466 18:37:50.085764 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1467 18:37:50.089163 PCI: 00:1e.2 child on link 0 SPI: 00
1468 18:37:50.099103 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1469 18:37:50.102341 SPI: 00
1470 18:37:50.105992 PCI: 00:1e.3 child on link 0 SPI: 00
1471 18:37:50.115567 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1472 18:37:50.115676 SPI: 00
1473 18:37:50.122251 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1474 18:37:50.129100 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1475 18:37:50.132353 PNP: 0c09.0
1476 18:37:50.142155 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 18:37:50.145652 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1478 18:37:50.155517 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1479 18:37:50.162028 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1480 18:37:50.168602 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1481 18:37:50.168697 GENERIC: 0.0
1482 18:37:50.172175 GENERIC: 1.0
1483 18:37:50.175127 PCI: 00:1f.3
1484 18:37:50.185410 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1485 18:37:50.195088 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1486 18:37:50.195190 PCI: 00:1f.5
1487 18:37:50.205216 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1488 18:37:50.211641 CPU_CLUSTER: 0 child on link 0 APIC: 00
1489 18:37:50.211728 APIC: 00
1490 18:37:50.211797 APIC: 01
1491 18:37:50.215217 APIC: 03
1492 18:37:50.215298 APIC: 05
1493 18:37:50.218373 APIC: 07
1494 18:37:50.218450 APIC: 06
1495 18:37:50.218515 APIC: 02
1496 18:37:50.221612 APIC: 04
1497 18:37:50.224908 Done allocating resources.
1498 18:37:50.228260 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1499 18:37:50.235249 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1500 18:37:50.238608 Configure GPIOs for I2S audio on UP4.
1501 18:37:50.246189 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1502 18:37:50.249388 Enabling resources...
1503 18:37:50.252750 PCI: 00:00.0 subsystem <- 8086/9a12
1504 18:37:50.256069 PCI: 00:00.0 cmd <- 06
1505 18:37:50.259267 PCI: 00:02.0 subsystem <- 8086/9a40
1506 18:37:50.262550 PCI: 00:02.0 cmd <- 03
1507 18:37:50.265778 PCI: 00:04.0 subsystem <- 8086/9a03
1508 18:37:50.269334 PCI: 00:04.0 cmd <- 02
1509 18:37:50.272687 PCI: 00:05.0 subsystem <- 8086/9a19
1510 18:37:50.272770 PCI: 00:05.0 cmd <- 02
1511 18:37:50.279379 PCI: 00:08.0 subsystem <- 8086/9a11
1512 18:37:50.279473 PCI: 00:08.0 cmd <- 06
1513 18:37:50.282630 PCI: 00:0d.0 subsystem <- 8086/9a13
1514 18:37:50.286068 PCI: 00:0d.0 cmd <- 02
1515 18:37:50.289008 PCI: 00:14.0 subsystem <- 8086/a0ed
1516 18:37:50.292609 PCI: 00:14.0 cmd <- 02
1517 18:37:50.295641 PCI: 00:14.2 subsystem <- 8086/a0ef
1518 18:37:50.298937 PCI: 00:14.2 cmd <- 02
1519 18:37:50.302613 PCI: 00:14.3 subsystem <- 8086/a0f0
1520 18:37:50.305862 PCI: 00:14.3 cmd <- 02
1521 18:37:50.309039 PCI: 00:15.0 subsystem <- 8086/a0e8
1522 18:37:50.312241 PCI: 00:15.0 cmd <- 02
1523 18:37:50.315772 PCI: 00:15.1 subsystem <- 8086/a0e9
1524 18:37:50.319016 PCI: 00:15.1 cmd <- 02
1525 18:37:50.322214 PCI: 00:15.2 subsystem <- 8086/a0ea
1526 18:37:50.322304 PCI: 00:15.2 cmd <- 02
1527 18:37:50.329088 PCI: 00:15.3 subsystem <- 8086/a0eb
1528 18:37:50.329178 PCI: 00:15.3 cmd <- 02
1529 18:37:50.332294 PCI: 00:16.0 subsystem <- 8086/a0e0
1530 18:37:50.335561 PCI: 00:16.0 cmd <- 02
1531 18:37:50.338968 PCI: 00:19.1 subsystem <- 8086/a0c6
1532 18:37:50.342211 PCI: 00:19.1 cmd <- 02
1533 18:37:50.345613 PCI: 00:1d.0 bridge ctrl <- 0013
1534 18:37:50.348797 PCI: 00:1d.0 subsystem <- 8086/a0b0
1535 18:37:50.352019 PCI: 00:1d.0 cmd <- 06
1536 18:37:50.355254 PCI: 00:1e.0 subsystem <- 8086/a0a8
1537 18:37:50.358711 PCI: 00:1e.0 cmd <- 06
1538 18:37:50.362004 PCI: 00:1e.2 subsystem <- 8086/a0aa
1539 18:37:50.365428 PCI: 00:1e.2 cmd <- 06
1540 18:37:50.368766 PCI: 00:1e.3 subsystem <- 8086/a0ab
1541 18:37:50.371745 PCI: 00:1e.3 cmd <- 02
1542 18:37:50.375452 PCI: 00:1f.0 subsystem <- 8086/a087
1543 18:37:50.375541 PCI: 00:1f.0 cmd <- 407
1544 18:37:50.382018 PCI: 00:1f.3 subsystem <- 8086/a0c8
1545 18:37:50.382107 PCI: 00:1f.3 cmd <- 02
1546 18:37:50.385498 PCI: 00:1f.5 subsystem <- 8086/a0a4
1547 18:37:50.388489 PCI: 00:1f.5 cmd <- 406
1548 18:37:50.393563 PCI: 01:00.0 cmd <- 02
1549 18:37:50.398335 done.
1550 18:37:50.401616 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1551 18:37:50.404837 Initializing devices...
1552 18:37:50.408086 Root Device init
1553 18:37:50.411382 Chrome EC: Set SMI mask to 0x0000000000000000
1554 18:37:50.418051 Chrome EC: clear events_b mask to 0x0000000000000000
1555 18:37:50.424561 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1556 18:37:50.431065 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1557 18:37:50.437865 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1558 18:37:50.441088 Chrome EC: Set WAKE mask to 0x0000000000000000
1559 18:37:50.448892 fw_config match found: DB_USB=USB3_ACTIVE
1560 18:37:50.452088 Configure Right Type-C port orientation for retimer
1561 18:37:50.455064 Root Device init finished in 45 msecs
1562 18:37:50.459338 PCI: 00:00.0 init
1563 18:37:50.462595 CPU TDP = 9 Watts
1564 18:37:50.462686 CPU PL1 = 9 Watts
1565 18:37:50.465922 CPU PL2 = 40 Watts
1566 18:37:50.469503 CPU PL4 = 83 Watts
1567 18:37:50.472871 PCI: 00:00.0 init finished in 8 msecs
1568 18:37:50.472962 PCI: 00:02.0 init
1569 18:37:50.476040 GMA: Found VBT in CBFS
1570 18:37:50.479338 GMA: Found valid VBT in CBFS
1571 18:37:50.485785 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1572 18:37:50.492437 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1573 18:37:50.495675 PCI: 00:02.0 init finished in 18 msecs
1574 18:37:50.498983 PCI: 00:05.0 init
1575 18:37:50.502312 PCI: 00:05.0 init finished in 0 msecs
1576 18:37:50.505565 PCI: 00:08.0 init
1577 18:37:50.509089 PCI: 00:08.0 init finished in 0 msecs
1578 18:37:50.512284 PCI: 00:14.0 init
1579 18:37:50.515788 PCI: 00:14.0 init finished in 0 msecs
1580 18:37:50.518997 PCI: 00:14.2 init
1581 18:37:50.522301 PCI: 00:14.2 init finished in 0 msecs
1582 18:37:50.525621 PCI: 00:15.0 init
1583 18:37:50.528886 I2C bus 0 version 0x3230302a
1584 18:37:50.532165 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1585 18:37:50.535384 PCI: 00:15.0 init finished in 6 msecs
1586 18:37:50.535474 PCI: 00:15.1 init
1587 18:37:50.538666 I2C bus 1 version 0x3230302a
1588 18:37:50.541969 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1589 18:37:50.548557 PCI: 00:15.1 init finished in 6 msecs
1590 18:37:50.548652 PCI: 00:15.2 init
1591 18:37:50.551835 I2C bus 2 version 0x3230302a
1592 18:37:50.555396 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1593 18:37:50.558339 PCI: 00:15.2 init finished in 6 msecs
1594 18:37:50.562011 PCI: 00:15.3 init
1595 18:37:50.565261 I2C bus 3 version 0x3230302a
1596 18:37:50.568628 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1597 18:37:50.571912 PCI: 00:15.3 init finished in 6 msecs
1598 18:37:50.575155 PCI: 00:16.0 init
1599 18:37:50.578426 PCI: 00:16.0 init finished in 0 msecs
1600 18:37:50.581821 PCI: 00:19.1 init
1601 18:37:50.585183 I2C bus 5 version 0x3230302a
1602 18:37:50.588312 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1603 18:37:50.591635 PCI: 00:19.1 init finished in 6 msecs
1604 18:37:50.595001 PCI: 00:1d.0 init
1605 18:37:50.595093 Initializing PCH PCIe bridge.
1606 18:37:50.601636 PCI: 00:1d.0 init finished in 3 msecs
1607 18:37:50.604794 PCI: 00:1f.0 init
1608 18:37:50.608408 IOAPIC: Initializing IOAPIC at 0xfec00000
1609 18:37:50.611757 IOAPIC: Bootstrap Processor Local APIC = 0x00
1610 18:37:50.614959 IOAPIC: ID = 0x02
1611 18:37:50.618185 IOAPIC: Dumping registers
1612 18:37:50.618276 reg 0x0000: 0x02000000
1613 18:37:50.621669 reg 0x0001: 0x00770020
1614 18:37:50.624625 reg 0x0002: 0x00000000
1615 18:37:50.628194 PCI: 00:1f.0 init finished in 21 msecs
1616 18:37:50.631383 PCI: 00:1f.2 init
1617 18:37:50.634980 Disabling ACPI via APMC.
1618 18:37:50.635097 APMC done.
1619 18:37:50.638172 PCI: 00:1f.2 init finished in 5 msecs
1620 18:37:50.651798 PCI: 01:00.0 init
1621 18:37:50.655021 PCI: 01:00.0 init finished in 0 msecs
1622 18:37:50.658285 PNP: 0c09.0 init
1623 18:37:50.661842 Google Chrome EC uptime: 8.416 seconds
1624 18:37:50.668366 Google Chrome AP resets since EC boot: 1
1625 18:37:50.671570 Google Chrome most recent AP reset causes:
1626 18:37:50.674767 0.348: 32775 shutdown: entering G3
1627 18:37:50.681269 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1628 18:37:50.684647 PNP: 0c09.0 init finished in 22 msecs
1629 18:37:50.690443 Devices initialized
1630 18:37:50.693836 Show all devs... After init.
1631 18:37:50.697164 Root Device: enabled 1
1632 18:37:50.697268 DOMAIN: 0000: enabled 1
1633 18:37:50.700823 CPU_CLUSTER: 0: enabled 1
1634 18:37:50.703747 PCI: 00:00.0: enabled 1
1635 18:37:50.707287 PCI: 00:02.0: enabled 1
1636 18:37:50.707387 PCI: 00:04.0: enabled 1
1637 18:37:50.710533 PCI: 00:05.0: enabled 1
1638 18:37:50.713878 PCI: 00:06.0: enabled 0
1639 18:37:50.717007 PCI: 00:07.0: enabled 0
1640 18:37:50.717115 PCI: 00:07.1: enabled 0
1641 18:37:50.720606 PCI: 00:07.2: enabled 0
1642 18:37:50.723849 PCI: 00:07.3: enabled 0
1643 18:37:50.727128 PCI: 00:08.0: enabled 1
1644 18:37:50.727228 PCI: 00:09.0: enabled 0
1645 18:37:50.730254 PCI: 00:0a.0: enabled 0
1646 18:37:50.733910 PCI: 00:0d.0: enabled 1
1647 18:37:50.737265 PCI: 00:0d.1: enabled 0
1648 18:37:50.737359 PCI: 00:0d.2: enabled 0
1649 18:37:50.740574 PCI: 00:0d.3: enabled 0
1650 18:37:50.743654 PCI: 00:0e.0: enabled 0
1651 18:37:50.743748 PCI: 00:10.2: enabled 1
1652 18:37:50.746934 PCI: 00:10.6: enabled 0
1653 18:37:50.750452 PCI: 00:10.7: enabled 0
1654 18:37:50.753740 PCI: 00:12.0: enabled 0
1655 18:37:50.753848 PCI: 00:12.6: enabled 0
1656 18:37:50.757020 PCI: 00:13.0: enabled 0
1657 18:37:50.760323 PCI: 00:14.0: enabled 1
1658 18:37:50.763538 PCI: 00:14.1: enabled 0
1659 18:37:50.763634 PCI: 00:14.2: enabled 1
1660 18:37:50.767046 PCI: 00:14.3: enabled 1
1661 18:37:50.770247 PCI: 00:15.0: enabled 1
1662 18:37:50.773610 PCI: 00:15.1: enabled 1
1663 18:37:50.773712 PCI: 00:15.2: enabled 1
1664 18:37:50.776790 PCI: 00:15.3: enabled 1
1665 18:37:50.780104 PCI: 00:16.0: enabled 1
1666 18:37:50.780212 PCI: 00:16.1: enabled 0
1667 18:37:50.783329 PCI: 00:16.2: enabled 0
1668 18:37:50.786666 PCI: 00:16.3: enabled 0
1669 18:37:50.790276 PCI: 00:16.4: enabled 0
1670 18:37:50.790370 PCI: 00:16.5: enabled 0
1671 18:37:50.793516 PCI: 00:17.0: enabled 0
1672 18:37:50.796868 PCI: 00:19.0: enabled 0
1673 18:37:50.800180 PCI: 00:19.1: enabled 1
1674 18:37:50.800274 PCI: 00:19.2: enabled 0
1675 18:37:50.803542 PCI: 00:1c.0: enabled 1
1676 18:37:50.806805 PCI: 00:1c.1: enabled 0
1677 18:37:50.809997 PCI: 00:1c.2: enabled 0
1678 18:37:50.810090 PCI: 00:1c.3: enabled 0
1679 18:37:50.813278 PCI: 00:1c.4: enabled 0
1680 18:37:50.816565 PCI: 00:1c.5: enabled 0
1681 18:37:50.819773 PCI: 00:1c.6: enabled 1
1682 18:37:50.819904 PCI: 00:1c.7: enabled 0
1683 18:37:50.823282 PCI: 00:1d.0: enabled 1
1684 18:37:50.826519 PCI: 00:1d.1: enabled 0
1685 18:37:50.826610 PCI: 00:1d.2: enabled 1
1686 18:37:50.829930 PCI: 00:1d.3: enabled 0
1687 18:37:50.833337 PCI: 00:1e.0: enabled 1
1688 18:37:50.836614 PCI: 00:1e.1: enabled 0
1689 18:37:50.836710 PCI: 00:1e.2: enabled 1
1690 18:37:50.839904 PCI: 00:1e.3: enabled 1
1691 18:37:50.843124 PCI: 00:1f.0: enabled 1
1692 18:37:50.846405 PCI: 00:1f.1: enabled 0
1693 18:37:50.846512 PCI: 00:1f.2: enabled 1
1694 18:37:50.849634 PCI: 00:1f.3: enabled 1
1695 18:37:50.853268 PCI: 00:1f.4: enabled 0
1696 18:37:50.856543 PCI: 00:1f.5: enabled 1
1697 18:37:50.856638 PCI: 00:1f.6: enabled 0
1698 18:37:50.859784 PCI: 00:1f.7: enabled 0
1699 18:37:50.863009 APIC: 00: enabled 1
1700 18:37:50.863102 GENERIC: 0.0: enabled 1
1701 18:37:50.866351 GENERIC: 0.0: enabled 1
1702 18:37:50.869656 GENERIC: 1.0: enabled 1
1703 18:37:50.872897 GENERIC: 0.0: enabled 1
1704 18:37:50.873004 GENERIC: 1.0: enabled 1
1705 18:37:50.876138 USB0 port 0: enabled 1
1706 18:37:50.879665 GENERIC: 0.0: enabled 1
1707 18:37:50.882990 USB0 port 0: enabled 1
1708 18:37:50.883085 GENERIC: 0.0: enabled 1
1709 18:37:50.886065 I2C: 00:1a: enabled 1
1710 18:37:50.889436 I2C: 00:31: enabled 1
1711 18:37:50.889534 I2C: 00:32: enabled 1
1712 18:37:50.892851 I2C: 00:10: enabled 1
1713 18:37:50.896018 I2C: 00:15: enabled 1
1714 18:37:50.896105 GENERIC: 0.0: enabled 0
1715 18:37:50.899287 GENERIC: 1.0: enabled 0
1716 18:37:50.902860 GENERIC: 0.0: enabled 1
1717 18:37:50.902956 SPI: 00: enabled 1
1718 18:37:50.906219 SPI: 00: enabled 1
1719 18:37:50.909508 PNP: 0c09.0: enabled 1
1720 18:37:50.909590 GENERIC: 0.0: enabled 1
1721 18:37:50.912567 USB3 port 0: enabled 1
1722 18:37:50.916195 USB3 port 1: enabled 1
1723 18:37:50.919472 USB3 port 2: enabled 0
1724 18:37:50.919556 USB3 port 3: enabled 0
1725 18:37:50.922697 USB2 port 0: enabled 0
1726 18:37:50.925818 USB2 port 1: enabled 1
1727 18:37:50.925901 USB2 port 2: enabled 1
1728 18:37:50.929437 USB2 port 3: enabled 0
1729 18:37:50.932766 USB2 port 4: enabled 1
1730 18:37:50.935913 USB2 port 5: enabled 0
1731 18:37:50.936012 USB2 port 6: enabled 0
1732 18:37:50.939126 USB2 port 7: enabled 0
1733 18:37:50.942714 USB2 port 8: enabled 0
1734 18:37:50.942796 USB2 port 9: enabled 0
1735 18:37:50.945887 USB3 port 0: enabled 0
1736 18:37:50.949128 USB3 port 1: enabled 1
1737 18:37:50.949221 USB3 port 2: enabled 0
1738 18:37:50.952705 USB3 port 3: enabled 0
1739 18:37:50.955961 GENERIC: 0.0: enabled 1
1740 18:37:50.959289 GENERIC: 1.0: enabled 1
1741 18:37:50.959379 APIC: 01: enabled 1
1742 18:37:50.962592 APIC: 03: enabled 1
1743 18:37:50.965566 APIC: 05: enabled 1
1744 18:37:50.965651 APIC: 07: enabled 1
1745 18:37:50.969190 APIC: 06: enabled 1
1746 18:37:50.969280 APIC: 02: enabled 1
1747 18:37:50.972414 APIC: 04: enabled 1
1748 18:37:50.975696 PCI: 01:00.0: enabled 1
1749 18:37:50.978858 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1750 18:37:50.985542 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1751 18:37:50.988884 ELOG: NV offset 0xf30000 size 0x1000
1752 18:37:50.995438 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1753 18:37:51.002093 ELOG: Event(17) added with size 13 at 2023-02-25 18:37:50 UTC
1754 18:37:51.008776 ELOG: Event(92) added with size 9 at 2023-02-25 18:37:50 UTC
1755 18:37:51.015572 ELOG: Event(93) added with size 9 at 2023-02-25 18:37:50 UTC
1756 18:37:51.022030 ELOG: Event(9E) added with size 10 at 2023-02-25 18:37:50 UTC
1757 18:37:51.028612 ELOG: Event(9F) added with size 14 at 2023-02-25 18:37:50 UTC
1758 18:37:51.035261 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1759 18:37:51.042039 ELOG: Event(A1) added with size 10 at 2023-02-25 18:37:50 UTC
1760 18:37:51.045394 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1761 18:37:51.051699 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1762 18:37:51.055275 Finalize devices...
1763 18:37:51.055395 Devices finalized
1764 18:37:51.061904 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1765 18:37:51.068439 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1766 18:37:51.071690 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1767 18:37:51.078214 ME: HFSTS1 : 0x80030055
1768 18:37:51.081712 ME: HFSTS2 : 0x30280116
1769 18:37:51.085057 ME: HFSTS3 : 0x00000050
1770 18:37:51.091724 ME: HFSTS4 : 0x00004000
1771 18:37:51.094750 ME: HFSTS5 : 0x00000000
1772 18:37:51.101516 ME: HFSTS6 : 0x00400006
1773 18:37:51.104884 ME: Manufacturing Mode : YES
1774 18:37:51.108209 ME: SPI Protection Mode Enabled : NO
1775 18:37:51.111529 ME: FW Partition Table : OK
1776 18:37:51.114645 ME: Bringup Loader Failure : NO
1777 18:37:51.118270 ME: Firmware Init Complete : NO
1778 18:37:51.121503 ME: Boot Options Present : NO
1779 18:37:51.124818 ME: Update In Progress : NO
1780 18:37:51.131411 ME: D0i3 Support : YES
1781 18:37:51.134873 ME: Low Power State Enabled : NO
1782 18:37:51.138061 ME: CPU Replaced : YES
1783 18:37:51.141333 ME: CPU Replacement Valid : YES
1784 18:37:51.144644 ME: Current Working State : 5
1785 18:37:51.147862 ME: Current Operation State : 1
1786 18:37:51.151482 ME: Current Operation Mode : 3
1787 18:37:51.154708 ME: Error Code : 0
1788 18:37:51.157862 ME: Enhanced Debug Mode : NO
1789 18:37:51.164411 ME: CPU Debug Disabled : YES
1790 18:37:51.167555 ME: TXT Support : NO
1791 18:37:51.174215 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1792 18:37:51.181061 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1793 18:37:51.184261 CBFS: 'fallback/slic' not found.
1794 18:37:51.187494 ACPI: Writing ACPI tables at 76b01000.
1795 18:37:51.190806 ACPI: * FACS
1796 18:37:51.190914 ACPI: * DSDT
1797 18:37:51.194213 Ramoops buffer: 0x100000@0x76a00000.
1798 18:37:51.200777 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1799 18:37:51.204054 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1800 18:37:51.207353 Google Chrome EC: version:
1801 18:37:51.210823 ro: voema_v2.0.7540-147f8d37d1
1802 18:37:51.214108 rw: voema_v2.0.7540-147f8d37d1
1803 18:37:51.217481 running image: 2
1804 18:37:51.223920 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1805 18:37:51.227138 ACPI: * FADT
1806 18:37:51.227233 SCI is IRQ9
1807 18:37:51.230539 ACPI: added table 1/32, length now 40
1808 18:37:51.233951 ACPI: * SSDT
1809 18:37:51.237189 Found 1 CPU(s) with 8 core(s) each.
1810 18:37:51.240801 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1811 18:37:51.244038 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1812 18:37:51.250583 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1813 18:37:51.253977 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1814 18:37:51.260498 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1815 18:37:51.263854 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1816 18:37:51.270310 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1817 18:37:51.273575 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1818 18:37:51.283606 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1819 18:37:51.286794 \_SB.PCI0.RP09: Added StorageD3Enable property
1820 18:37:51.290451 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1821 18:37:51.296803 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1822 18:37:51.300158 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1823 18:37:51.303302 PS2K: Passing 80 keymaps to kernel
1824 18:37:51.310281 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1825 18:37:51.316921 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1826 18:37:51.323284 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1827 18:37:51.330184 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1828 18:37:51.336740 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1829 18:37:51.343337 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1830 18:37:51.349715 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1831 18:37:51.356518 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1832 18:37:51.359823 ACPI: added table 2/32, length now 44
1833 18:37:51.363090 ACPI: * MCFG
1834 18:37:51.366414 ACPI: added table 3/32, length now 48
1835 18:37:51.369725 ACPI: * TPM2
1836 18:37:51.373030 TPM2 log created at 0x769f0000
1837 18:37:51.376287 ACPI: added table 4/32, length now 52
1838 18:37:51.376391 ACPI: * MADT
1839 18:37:51.379586 SCI is IRQ9
1840 18:37:51.382843 ACPI: added table 5/32, length now 56
1841 18:37:51.382950 current = 76b09850
1842 18:37:51.386129 ACPI: * DMAR
1843 18:37:51.389485 ACPI: added table 6/32, length now 60
1844 18:37:51.392771 ACPI: added table 7/32, length now 64
1845 18:37:51.396132 ACPI: * HPET
1846 18:37:51.399530 ACPI: added table 8/32, length now 68
1847 18:37:51.399631 ACPI: done.
1848 18:37:51.402851 ACPI tables: 35216 bytes.
1849 18:37:51.406152 smbios_write_tables: 769ef000
1850 18:37:51.409563 EC returned error result code 3
1851 18:37:51.412557 Couldn't obtain OEM name from CBI
1852 18:37:51.416165 Create SMBIOS type 16
1853 18:37:51.416279 Create SMBIOS type 17
1854 18:37:51.419493 GENERIC: 0.0 (WIFI Device)
1855 18:37:51.422765 SMBIOS tables: 1750 bytes.
1856 18:37:51.425976 Writing table forward entry at 0x00000500
1857 18:37:51.432482 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1858 18:37:51.435859 Writing coreboot table at 0x76b25000
1859 18:37:51.442439 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1860 18:37:51.446045 1. 0000000000001000-000000000009ffff: RAM
1861 18:37:51.452754 2. 00000000000a0000-00000000000fffff: RESERVED
1862 18:37:51.455975 3. 0000000000100000-00000000769eefff: RAM
1863 18:37:51.462591 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1864 18:37:51.465917 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1865 18:37:51.472524 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1866 18:37:51.478892 7. 0000000077000000-000000007fbfffff: RESERVED
1867 18:37:51.482224 8. 00000000c0000000-00000000cfffffff: RESERVED
1868 18:37:51.489169 9. 00000000f8000000-00000000f9ffffff: RESERVED
1869 18:37:51.492542 10. 00000000fb000000-00000000fb000fff: RESERVED
1870 18:37:51.495752 11. 00000000fe000000-00000000fe00ffff: RESERVED
1871 18:37:51.502127 12. 00000000fed80000-00000000fed87fff: RESERVED
1872 18:37:51.505415 13. 00000000fed90000-00000000fed92fff: RESERVED
1873 18:37:51.512416 14. 00000000feda0000-00000000feda1fff: RESERVED
1874 18:37:51.515412 15. 00000000fedc0000-00000000feddffff: RESERVED
1875 18:37:51.522241 16. 0000000100000000-00000002803fffff: RAM
1876 18:37:51.522341 Passing 4 GPIOs to payload:
1877 18:37:51.528874 NAME | PORT | POLARITY | VALUE
1878 18:37:51.535244 lid | undefined | high | high
1879 18:37:51.538809 power | undefined | high | low
1880 18:37:51.545347 oprom | undefined | high | low
1881 18:37:51.548574 EC in RW | 0x000000e5 | high | high
1882 18:37:51.555311 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 6023
1883 18:37:51.558522 coreboot table: 1576 bytes.
1884 18:37:51.561786 IMD ROOT 0. 0x76fff000 0x00001000
1885 18:37:51.565307 IMD SMALL 1. 0x76ffe000 0x00001000
1886 18:37:51.571832 FSP MEMORY 2. 0x76c4e000 0x003b0000
1887 18:37:51.575160 VPD 3. 0x76c4d000 0x00000367
1888 18:37:51.578618 RO MCACHE 4. 0x76c4c000 0x00000fdc
1889 18:37:51.581614 CONSOLE 5. 0x76c2c000 0x00020000
1890 18:37:51.584853 FMAP 6. 0x76c2b000 0x00000578
1891 18:37:51.588143 TIME STAMP 7. 0x76c2a000 0x00000910
1892 18:37:51.591501 VBOOT WORK 8. 0x76c16000 0x00014000
1893 18:37:51.595078 ROMSTG STCK 9. 0x76c15000 0x00001000
1894 18:37:51.601339 AFTER CAR 10. 0x76c0a000 0x0000b000
1895 18:37:51.604729 RAMSTAGE 11. 0x76b97000 0x00073000
1896 18:37:51.608035 REFCODE 12. 0x76b42000 0x00055000
1897 18:37:51.611334 SMM BACKUP 13. 0x76b32000 0x00010000
1898 18:37:51.614666 4f444749 14. 0x76b30000 0x00002000
1899 18:37:51.617962 EXT VBT15. 0x76b2d000 0x0000219f
1900 18:37:51.621227 COREBOOT 16. 0x76b25000 0x00008000
1901 18:37:51.624563 ACPI 17. 0x76b01000 0x00024000
1902 18:37:51.627793 ACPI GNVS 18. 0x76b00000 0x00001000
1903 18:37:51.634489 RAMOOPS 19. 0x76a00000 0x00100000
1904 18:37:51.637723 TPM2 TCGLOG20. 0x769f0000 0x00010000
1905 18:37:51.640956 SMBIOS 21. 0x769ef000 0x00000800
1906 18:37:51.641058 IMD small region:
1907 18:37:51.647974 IMD ROOT 0. 0x76ffec00 0x00000400
1908 18:37:51.651268 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1909 18:37:51.654537 POWER STATE 2. 0x76ffeb80 0x00000044
1910 18:37:51.657618 ROMSTAGE 3. 0x76ffeb60 0x00000004
1911 18:37:51.661004 MEM INFO 4. 0x76ffe980 0x000001e0
1912 18:37:51.667680 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1913 18:37:51.670873 MTRR: Physical address space:
1914 18:37:51.677798 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1915 18:37:51.684419 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1916 18:37:51.690892 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1917 18:37:51.697723 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1918 18:37:51.700687 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1919 18:37:51.707665 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1920 18:37:51.714226 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1921 18:37:51.717558 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 18:37:51.723945 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 18:37:51.727255 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 18:37:51.730492 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 18:37:51.733724 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 18:37:51.740664 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 18:37:51.743933 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 18:37:51.747245 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 18:37:51.750562 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 18:37:51.757228 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 18:37:51.760624 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 18:37:51.763900 call enable_fixed_mtrr()
1933 18:37:51.766997 CPU physical address size: 39 bits
1934 18:37:51.770699 MTRR: default type WB/UC MTRR counts: 6/6.
1935 18:37:51.773552 MTRR: UC selected as default type.
1936 18:37:51.780579 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1937 18:37:51.786886 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1938 18:37:51.793504 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1939 18:37:51.800106 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1940 18:37:51.806805 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1941 18:37:51.813286 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1942 18:37:51.816714 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 18:37:51.823220 MTRR: Fixed MSR 0x258 0x0606060606060606
1944 18:37:51.826501 MTRR: Fixed MSR 0x259 0x0000000000000000
1945 18:37:51.829719 MTRR: Fixed MSR 0x268 0x0606060606060606
1946 18:37:51.833094 MTRR: Fixed MSR 0x269 0x0606060606060606
1947 18:37:51.839996 MTRR: Fixed MSR 0x26a 0x0606060606060606
1948 18:37:51.843275 MTRR: Fixed MSR 0x26b 0x0606060606060606
1949 18:37:51.846573 MTRR: Fixed MSR 0x26c 0x0606060606060606
1950 18:37:51.849867 MTRR: Fixed MSR 0x26d 0x0606060606060606
1951 18:37:51.853072 MTRR: Fixed MSR 0x26e 0x0606060606060606
1952 18:37:51.859568 MTRR: Fixed MSR 0x26f 0x0606060606060606
1953 18:37:51.862874 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 18:37:51.866327 call enable_fixed_mtrr()
1955 18:37:51.869625 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 18:37:51.876123 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 18:37:51.879499 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 18:37:51.882797 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 18:37:51.886156 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 18:37:51.889485 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 18:37:51.896199 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 18:37:51.899498 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 18:37:51.902795 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 18:37:51.906145 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 18:37:51.910523 CPU physical address size: 39 bits
1966 18:37:51.917060 call enable_fixed_mtrr()
1967 18:37:51.920479 MTRR: Fixed MSR 0x250 0x0606060606060606
1968 18:37:51.923851 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 18:37:51.926846 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 18:37:51.933693 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 18:37:51.937040 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 18:37:51.940123 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 18:37:51.943392 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 18:37:51.947011 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 18:37:51.953571 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 18:37:51.956823 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 18:37:51.960138 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 18:37:51.963548 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 18:37:51.971120 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 18:37:51.971215 call enable_fixed_mtrr()
1981 18:37:51.977550 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 18:37:51.980870 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 18:37:51.984476 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 18:37:51.987786 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 18:37:51.994448 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 18:37:51.997629 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 18:37:52.000882 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 18:37:52.004368 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 18:37:52.010977 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 18:37:52.013924 CPU physical address size: 39 bits
1991 18:37:52.017575 call enable_fixed_mtrr()
1992 18:37:52.020901 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 18:37:52.024231 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 18:37:52.030825 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 18:37:52.033839 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 18:37:52.037499 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 18:37:52.040497 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 18:37:52.047487 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 18:37:52.050596 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 18:37:52.053939 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 18:37:52.057205 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 18:37:52.063765 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 18:37:52.067146 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 18:37:52.070714 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 18:37:52.077222 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 18:37:52.080580 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 18:37:52.083839 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 18:37:52.087104 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 18:37:52.093819 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 18:37:52.097000 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 18:37:52.100293 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 18:37:52.103645 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 18:37:52.109978 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 18:37:52.113371 call enable_fixed_mtrr()
2015 18:37:52.113463 call enable_fixed_mtrr()
2016 18:37:52.119940 CPU physical address size: 39 bits
2017 18:37:52.123301 CPU physical address size: 39 bits
2018 18:37:52.126642 CPU physical address size: 39 bits
2019 18:37:52.130026 CPU physical address size: 39 bits
2020 18:37:52.130117
2021 18:37:52.130188 MTRR check
2022 18:37:52.136622 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 18:37:52.136715 Fixed MTRRs : Enabled
2024 18:37:52.139937 Variable MTRRs: Enabled
2025 18:37:52.140027
2026 18:37:52.143184 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 18:37:52.149820 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 18:37:52.153037 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 18:37:52.156401 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 18:37:52.159679 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 18:37:52.166348 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 18:37:52.169672 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 18:37:52.172831 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 18:37:52.176064 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 18:37:52.182997 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 18:37:52.189644 BS: BS_WRITE_TABLES exit times (exec / console): 323 / 150 ms
2037 18:37:52.192974 call enable_fixed_mtrr()
2038 18:37:52.197000 Checking cr50 for pending updates
2039 18:37:52.197097 CPU physical address size: 39 bits
2040 18:37:52.202804 Reading cr50 TPM mode
2041 18:37:52.213030 BS: BS_PAYLOAD_LOAD entry times (exec / console): 13 / 6 ms
2042 18:37:52.222994 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2043 18:37:52.226386 Checking segment from ROM address 0xffc02b38
2044 18:37:52.229803 Checking segment from ROM address 0xffc02b54
2045 18:37:52.236546 Loading segment from ROM address 0xffc02b38
2046 18:37:52.236640 code (compression=0)
2047 18:37:52.246275 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2048 18:37:52.256173 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2049 18:37:52.256277 it's not compressed!
2050 18:37:52.395916 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2051 18:37:52.402481 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2052 18:37:52.409057 Loading segment from ROM address 0xffc02b54
2053 18:37:52.412371 Entry Point 0x30000000
2054 18:37:52.412464 Loaded segments
2055 18:37:52.418953 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2056 18:37:52.461970 Finalizing chipset.
2057 18:37:52.465466 Finalizing SMM.
2058 18:37:52.465572 APMC done.
2059 18:37:52.471978 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2060 18:37:52.475305 mp_park_aps done after 0 msecs.
2061 18:37:52.478604 Jumping to boot code at 0x30000000(0x76b25000)
2062 18:37:52.488278 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2063 18:37:52.488382
2064 18:37:52.488462
2065 18:37:52.488528
2066 18:37:52.491684 Starting depthcharge on Voema...
2067 18:37:52.491774
2068 18:37:52.492144 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2069 18:37:52.492254 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2070 18:37:52.492338 Setting prompt string to ['volteer:']
2071 18:37:52.492418 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2072 18:37:52.501617 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2073 18:37:52.501734
2074 18:37:52.508519 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2075 18:37:52.508611
2076 18:37:52.515116 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2077 18:37:52.515208
2078 18:37:52.518372 Failed to find eMMC card reader
2079 18:37:52.518461
2080 18:37:52.518531 Wipe memory regions:
2081 18:37:52.518596
2082 18:37:52.524951 [0x00000000001000, 0x000000000a0000)
2083 18:37:52.525041
2084 18:37:52.528130 [0x00000000100000, 0x00000030000000)
2085 18:37:52.553641
2086 18:37:52.556962 [0x00000032662db0, 0x000000769ef000)
2087 18:37:52.593090
2088 18:37:52.596351 [0x00000100000000, 0x00000280400000)
2089 18:37:52.796128
2090 18:37:52.799260 ec_init: CrosEC protocol v3 supported (256, 256)
2091 18:37:52.799355
2092 18:37:52.805882 update_port_state: port C0 state: usb enable 1 mux conn 0
2093 18:37:52.805973
2094 18:37:52.815668 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2095 18:37:52.815781
2096 18:37:52.822303 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2097 18:37:52.822394
2098 18:37:52.825605 send_conn_disc_msg: pmc_send_cmd succeeded
2099 18:37:53.258373
2100 18:37:53.258536 R8152: Initializing
2101 18:37:53.258608
2102 18:37:53.261538 Version 6 (ocp_data = 5c30)
2103 18:37:53.261643
2104 18:37:53.264768 R8152: Done initializing
2105 18:37:53.264883
2106 18:37:53.268070 Adding net device
2107 18:37:53.570214
2108 18:37:53.573510 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2109 18:37:53.573607
2110 18:37:53.573676
2111 18:37:53.573777
2112 18:37:53.576934 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2114 18:37:53.677796 volteer: tftpboot 192.168.201.1 9334712/tftp-deploy-5a7c7ulg/kernel/bzImage 9334712/tftp-deploy-5a7c7ulg/kernel/cmdline 9334712/tftp-deploy-5a7c7ulg/ramdisk/ramdisk.cpio.gz
2115 18:37:53.678007 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2116 18:37:53.678153 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2117 18:37:53.682159 tftpboot 192.168.201.1 9334712/tftp-deploy-5a7c7ulg/kernel/bzImy-5a7c7ulg/kernel/cmdline 9334712/tftp-deploy-5a7c7ulg/ramdisk/ramdisk.cpio.gz
2118 18:37:53.682252
2119 18:37:53.682322 Waiting for link
2120 18:37:53.886312
2121 18:37:53.886473 done.
2122 18:37:53.886563
2123 18:37:53.886656 MAC: 00:24:32:30:7c:e4
2124 18:37:53.886747
2125 18:37:53.889569 Sending DHCP discover... done.
2126 18:37:53.889675
2127 18:37:53.892858 Waiting for reply... done.
2128 18:37:53.892962
2129 18:37:53.895995 Sending DHCP request... done.
2130 18:37:53.896083
2131 18:37:53.899638 Waiting for reply... done.
2132 18:37:53.899727
2133 18:37:53.902748 My ip is 192.168.201.23
2134 18:37:53.902837
2135 18:37:53.906346 The DHCP server ip is 192.168.201.1
2136 18:37:53.906434
2137 18:37:53.912627 TFTP server IP predefined by user: 192.168.201.1
2138 18:37:53.912716
2139 18:37:53.919197 Bootfile predefined by user: 9334712/tftp-deploy-5a7c7ulg/kernel/bzImage
2140 18:37:53.919287
2141 18:37:53.922458 Sending tftp read request... done.
2142 18:37:53.922547
2143 18:37:53.925657 Waiting for the transfer...
2144 18:37:53.925783
2145 18:37:54.496645 00000000 ################################################################
2146 18:37:54.496804
2147 18:37:55.068932 00080000 ################################################################
2148 18:37:55.069088
2149 18:37:55.640718 00100000 ################################################################
2150 18:37:55.640874
2151 18:37:56.213615 00180000 ################################################################
2152 18:37:56.213775
2153 18:37:56.749599 00200000 ################################################################
2154 18:37:56.749807
2155 18:37:57.297706 00280000 ################################################################
2156 18:37:57.297897
2157 18:37:57.871475 00300000 ################################################################
2158 18:37:57.871641
2159 18:37:58.407615 00380000 ################################################################
2160 18:37:58.407774
2161 18:37:58.953212 00400000 ################################################################
2162 18:37:58.953373
2163 18:37:59.538531 00480000 ################################################################
2164 18:37:59.539026
2165 18:38:00.144046 00500000 ################################################################
2166 18:38:00.144203
2167 18:38:00.677782 00580000 ################################################################
2168 18:38:00.677949
2169 18:38:01.218434 00600000 ################################################################
2170 18:38:01.218588
2171 18:38:01.789834 00680000 ################################################################
2172 18:38:01.789988
2173 18:38:02.363234 00700000 ################################################################
2174 18:38:02.363398
2175 18:38:02.931864 00780000 ################################################################
2176 18:38:02.932020
2177 18:38:03.502692 00800000 ################################################################
2178 18:38:03.502854
2179 18:38:04.072350 00880000 ################################################################
2180 18:38:04.072503
2181 18:38:04.365953 00900000 ################################## done.
2182 18:38:04.366102
2183 18:38:04.369271 The bootfile was 9711616 bytes long.
2184 18:38:04.369362
2185 18:38:04.372652 Sending tftp read request... done.
2186 18:38:04.372743
2187 18:38:04.375875 Waiting for the transfer...
2188 18:38:04.375966
2189 18:38:04.970468 00000000 ################################################################
2190 18:38:04.970623
2191 18:38:05.573538 00080000 ################################################################
2192 18:38:05.573690
2193 18:38:06.161073 00100000 ################################################################
2194 18:38:06.161229
2195 18:38:06.747219 00180000 ################################################################
2196 18:38:06.747372
2197 18:38:07.349259 00200000 ################################################################
2198 18:38:07.349416
2199 18:38:07.944427 00280000 ################################################################
2200 18:38:07.944582
2201 18:38:08.531419 00300000 ################################################################
2202 18:38:08.531577
2203 18:38:09.124408 00380000 ################################################################
2204 18:38:09.124601
2205 18:38:09.699756 00400000 ################################################################
2206 18:38:09.699911
2207 18:38:10.256198 00480000 ################################################################
2208 18:38:10.256362
2209 18:38:10.900495 00500000 ################################################################
2210 18:38:10.901015
2211 18:38:11.613167 00580000 ################################################################
2212 18:38:11.613689
2213 18:38:12.313566 00600000 ################################################################
2214 18:38:12.314166
2215 18:38:13.034035 00680000 ################################################################
2216 18:38:13.034611
2217 18:38:13.776322 00700000 ################################################################
2218 18:38:13.776928
2219 18:38:14.497651 00780000 ################################################################
2220 18:38:14.498272
2221 18:38:15.208421 00800000 ################################################################
2222 18:38:15.208988
2223 18:38:15.834291 00880000 ################################################################
2224 18:38:15.834447
2225 18:38:16.367155 00900000 ################################################################
2226 18:38:16.367296
2227 18:38:16.981294 00980000 ################################################################
2228 18:38:16.981436
2229 18:38:17.517603 00a00000 ################################################################
2230 18:38:17.517767
2231 18:38:18.044939 00a80000 ################################################################
2232 18:38:18.045080
2233 18:38:18.595467 00b00000 ################################################################
2234 18:38:18.595611
2235 18:38:19.135898 00b80000 ################################################################
2236 18:38:19.136040
2237 18:38:19.674384 00c00000 ################################################################
2238 18:38:19.674560
2239 18:38:20.209012 00c80000 ################################################################
2240 18:38:20.209154
2241 18:38:20.744246 00d00000 ################################################################
2242 18:38:20.744423
2243 18:38:21.282084 00d80000 ################################################################
2244 18:38:21.282240
2245 18:38:21.825316 00e00000 ################################################################
2246 18:38:21.825457
2247 18:38:22.360956 00e80000 ################################################################
2248 18:38:22.361097
2249 18:38:22.978161 00f00000 ################################################################
2250 18:38:22.978783
2251 18:38:23.682846 00f80000 ################################################################
2252 18:38:23.683443
2253 18:38:24.395430 01000000 ################################################################
2254 18:38:24.395989
2255 18:38:25.085793 01080000 ################################################################
2256 18:38:25.086458
2257 18:38:25.717239 01100000 ################################################################
2258 18:38:25.717392
2259 18:38:26.311981 01180000 ################################################################
2260 18:38:26.312122
2261 18:38:26.880865 01200000 ################################################################
2262 18:38:26.881008
2263 18:38:27.515402 01280000 ################################################################
2264 18:38:27.515545
2265 18:38:28.171504 01300000 ################################################################
2266 18:38:28.171649
2267 18:38:28.796483 01380000 ################################################################
2268 18:38:28.796628
2269 18:38:29.380931 01400000 ################################################################
2270 18:38:29.381077
2271 18:38:29.970302 01480000 ################################################################
2272 18:38:29.970447
2273 18:38:30.600114 01500000 ################################################################
2274 18:38:30.600742
2275 18:38:31.268387 01580000 ################################################################
2276 18:38:31.268531
2277 18:38:31.843722 01600000 ################################################################
2278 18:38:31.843887
2279 18:38:32.453269 01680000 ################################################################
2280 18:38:32.453448
2281 18:38:33.038339 01700000 ################################################################
2282 18:38:33.038490
2283 18:38:33.581651 01780000 ################################################################
2284 18:38:33.581843
2285 18:38:34.133517 01800000 ################################################################
2286 18:38:34.133676
2287 18:38:34.660924 01880000 ################################################################
2288 18:38:34.661071
2289 18:38:35.180759 01900000 ################################################################
2290 18:38:35.180947
2291 18:38:35.735890 01980000 ################################################################
2292 18:38:35.736045
2293 18:38:36.270263 01a00000 ################################################################
2294 18:38:36.270413
2295 18:38:36.813985 01a80000 ################################################################
2296 18:38:36.814125
2297 18:38:37.349380 01b00000 ################################################################
2298 18:38:37.349533
2299 18:38:37.890358 01b80000 ################################################################
2300 18:38:37.890564
2301 18:38:38.428311 01c00000 ################################################################
2302 18:38:38.428460
2303 18:38:38.950061 01c80000 ################################################################
2304 18:38:38.950208
2305 18:38:39.485270 01d00000 ################################################################
2306 18:38:39.485426
2307 18:38:40.018779 01d80000 ################################################################
2308 18:38:40.018938
2309 18:38:40.555374 01e00000 ################################################################
2310 18:38:40.555532
2311 18:38:41.119589 01e80000 ################################################################
2312 18:38:41.119752
2313 18:38:41.693207 01f00000 ################################################################
2314 18:38:41.693362
2315 18:38:42.286470 01f80000 ################################################################
2316 18:38:42.286631
2317 18:38:42.861512 02000000 ################################################################
2318 18:38:42.861663
2319 18:38:43.428916 02080000 ################################################################
2320 18:38:43.429064
2321 18:38:44.002141 02100000 ################################################################
2322 18:38:44.002291
2323 18:38:44.580957 02180000 ################################################################
2324 18:38:44.581110
2325 18:38:44.798762 02200000 ###################### done.
2326 18:38:44.799311
2327 18:38:44.801764 Sending tftp read request... done.
2328 18:38:44.802230
2329 18:38:44.805304 Waiting for the transfer...
2330 18:38:44.805820
2331 18:38:44.806199 00000000 # done.
2332 18:38:44.806557
2333 18:38:44.815254 Command line loaded dynamically from TFTP file: 9334712/tftp-deploy-5a7c7ulg/kernel/cmdline
2334 18:38:44.815719
2335 18:38:44.828395 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2336 18:38:44.834916
2337 18:38:44.838014 Shutting down all USB controllers.
2338 18:38:44.838475
2339 18:38:44.838843 Removing current net device
2340 18:38:44.839185
2341 18:38:44.841422 Finalizing coreboot
2342 18:38:44.841916
2343 18:38:44.847715 Exiting depthcharge with code 4 at timestamp: 61018098
2344 18:38:44.848182
2345 18:38:44.848547
2346 18:38:44.848884 Starting kernel ...
2347 18:38:44.849249
2348 18:38:44.849606
2349 18:38:44.851062 end: 2.2.4 bootloader-commands (duration 00:00:52) [common]
2350 18:38:44.851564 start: 2.2.5 auto-login-action (timeout 00:03:50) [common]
2351 18:38:44.851952 Setting prompt string to ['Linux version [0-9]']
2352 18:38:44.852319 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2353 18:38:44.852686 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2355 18:42:34.851891 end: 2.2.5 auto-login-action (duration 00:03:50) [common]
2357 18:42:34.852149 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 230 seconds'
2359 18:42:34.852307 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2362 18:42:34.852610 end: 2 depthcharge-action (duration 00:05:00) [common]
2364 18:42:34.852904 Cleaning after the job
2365 18:42:34.852990 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334712/tftp-deploy-5a7c7ulg/ramdisk
2366 18:42:34.855472 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334712/tftp-deploy-5a7c7ulg/kernel
2367 18:42:34.856237 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334712/tftp-deploy-5a7c7ulg/modules
2368 18:42:34.856446 start: 4.1 power-off (timeout 00:00:30) [common]
2369 18:42:34.856597 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2370 18:42:37.025383 >> Command sent successfully.
2371 18:42:37.027705 Returned 0 in 2 seconds
2372 18:42:37.128567 end: 4.1 power-off (duration 00:00:02) [common]
2374 18:42:37.128894 start: 4.2 read-feedback (timeout 00:09:58) [common]
2375 18:42:37.129137 Listened to connection for namespace 'common' for up to 1s
2376 18:42:38.134013 Finalising connection for namespace 'common'
2377 18:42:38.134671 Disconnecting from shell: Finalise
2378 18:42:38.135088
2379 18:42:38.236433 end: 4.2 read-feedback (duration 00:00:01) [common]
2380 18:42:38.237024 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9334712
2381 18:42:38.265819 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9334712
2382 18:42:38.265994 JobError: Your job cannot terminate cleanly.