Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 18:43:55.599477 lava-dispatcher, installed at version: 2022.11
2 18:43:55.599686 start: 0 validate
3 18:43:55.599829 Start time: 2023-02-25 18:43:55.599821+00:00 (UTC)
4 18:43:55.599965 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:43:55.600112 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230217.0%2Famd64%2Finitrd.cpio.gz exists
6 18:43:55.892264 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:43:55.892450 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:43:56.175454 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:43:56.175637 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230217.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:43:56.465672 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:43:56.465855 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 18:43:56.758142 validate duration: 1.16
14 18:43:56.758469 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:43:56.758590 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:43:56.758691 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:43:56.758802 Not decompressing ramdisk as can be used compressed.
18 18:43:56.759002 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230217.0/amd64/initrd.cpio.gz
19 18:43:56.759090 saving as /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/ramdisk/initrd.cpio.gz
20 18:43:56.759165 total size: 5432115 (5MB)
21 18:43:56.760361 progress 0% (0MB)
22 18:43:56.761983 progress 5% (0MB)
23 18:43:56.763477 progress 10% (0MB)
24 18:43:56.764996 progress 15% (0MB)
25 18:43:56.766629 progress 20% (1MB)
26 18:43:56.768078 progress 25% (1MB)
27 18:43:56.769524 progress 30% (1MB)
28 18:43:56.771144 progress 35% (1MB)
29 18:43:56.772581 progress 40% (2MB)
30 18:43:56.774019 progress 45% (2MB)
31 18:43:56.775465 progress 50% (2MB)
32 18:43:56.777100 progress 55% (2MB)
33 18:43:56.778543 progress 60% (3MB)
34 18:43:56.780009 progress 65% (3MB)
35 18:43:56.781612 progress 70% (3MB)
36 18:43:56.783094 progress 75% (3MB)
37 18:43:56.784548 progress 80% (4MB)
38 18:43:56.785997 progress 85% (4MB)
39 18:43:56.787610 progress 90% (4MB)
40 18:43:56.789047 progress 95% (4MB)
41 18:43:56.790502 progress 100% (5MB)
42 18:43:56.790786 5MB downloaded in 0.03s (163.85MB/s)
43 18:43:56.790952 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:43:56.791240 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:43:56.791341 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:43:56.791440 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:43:56.791558 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 18:43:56.791635 saving as /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/kernel/bzImage
50 18:43:56.791706 total size: 9711616 (9MB)
51 18:43:56.791773 No compression specified
52 18:43:56.792915 progress 0% (0MB)
53 18:43:56.795579 progress 5% (0MB)
54 18:43:56.798322 progress 10% (0MB)
55 18:43:56.801006 progress 15% (1MB)
56 18:43:56.803673 progress 20% (1MB)
57 18:43:56.806341 progress 25% (2MB)
58 18:43:56.808825 progress 30% (2MB)
59 18:43:56.811503 progress 35% (3MB)
60 18:43:56.814165 progress 40% (3MB)
61 18:43:56.816826 progress 45% (4MB)
62 18:43:56.819487 progress 50% (4MB)
63 18:43:56.822131 progress 55% (5MB)
64 18:43:56.824651 progress 60% (5MB)
65 18:43:56.827283 progress 65% (6MB)
66 18:43:56.829917 progress 70% (6MB)
67 18:43:56.832546 progress 75% (6MB)
68 18:43:56.835160 progress 80% (7MB)
69 18:43:56.837605 progress 85% (7MB)
70 18:43:56.840230 progress 90% (8MB)
71 18:43:56.842842 progress 95% (8MB)
72 18:43:56.845478 progress 100% (9MB)
73 18:43:56.845703 9MB downloaded in 0.05s (171.54MB/s)
74 18:43:56.845870 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:43:56.846135 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:43:56.846235 start: 1.3 download-retry (timeout 00:10:00) [common]
78 18:43:56.846333 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 18:43:56.846449 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230217.0/amd64/full.rootfs.tar.xz
80 18:43:56.846524 saving as /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/nfsrootfs/full.rootfs.tar
81 18:43:56.846593 total size: 207188232 (197MB)
82 18:43:56.846661 Using unxz to decompress xz
83 18:43:56.850356 progress 0% (0MB)
84 18:43:57.468453 progress 5% (9MB)
85 18:43:58.070048 progress 10% (19MB)
86 18:43:58.732337 progress 15% (29MB)
87 18:43:59.149349 progress 20% (39MB)
88 18:43:59.543471 progress 25% (49MB)
89 18:44:00.202676 progress 30% (59MB)
90 18:44:00.815101 progress 35% (69MB)
91 18:44:01.479887 progress 40% (79MB)
92 18:44:02.097160 progress 45% (88MB)
93 18:44:02.740790 progress 50% (98MB)
94 18:44:03.441475 progress 55% (108MB)
95 18:44:04.204021 progress 60% (118MB)
96 18:44:04.371976 progress 65% (128MB)
97 18:44:04.533802 progress 70% (138MB)
98 18:44:04.641839 progress 75% (148MB)
99 18:44:04.719931 progress 80% (158MB)
100 18:44:04.798767 progress 85% (167MB)
101 18:44:04.918167 progress 90% (177MB)
102 18:44:05.214810 progress 95% (187MB)
103 18:44:05.869258 progress 100% (197MB)
104 18:44:05.876344 197MB downloaded in 9.03s (21.88MB/s)
105 18:44:05.876641 end: 1.3.1 http-download (duration 00:00:09) [common]
107 18:44:05.876940 end: 1.3 download-retry (duration 00:00:09) [common]
108 18:44:05.877043 start: 1.4 download-retry (timeout 00:09:51) [common]
109 18:44:05.877141 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 18:44:05.877267 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 18:44:05.877349 saving as /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/modules/modules.tar
112 18:44:05.877418 total size: 64832 (0MB)
113 18:44:05.877486 Using unxz to decompress xz
114 18:44:05.881041 progress 50% (0MB)
115 18:44:05.881445 progress 100% (0MB)
116 18:44:05.886031 0MB downloaded in 0.01s (7.18MB/s)
117 18:44:05.886267 end: 1.4.1 http-download (duration 00:00:00) [common]
119 18:44:05.886559 end: 1.4 download-retry (duration 00:00:00) [common]
120 18:44:05.886667 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 18:44:05.886776 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 18:44:08.116584 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9334750/extract-nfsrootfs-iofts441
123 18:44:08.116819 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 18:44:08.116941 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 18:44:08.117097 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw
126 18:44:08.117214 makedir: /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin
127 18:44:08.117308 makedir: /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/tests
128 18:44:08.117399 makedir: /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/results
129 18:44:08.117510 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-add-keys
130 18:44:08.117656 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-add-sources
131 18:44:08.117786 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-background-process-start
132 18:44:08.117915 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-background-process-stop
133 18:44:08.118042 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-common-functions
134 18:44:08.118166 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-echo-ipv4
135 18:44:08.118292 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-install-packages
136 18:44:08.118417 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-installed-packages
137 18:44:08.118541 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-os-build
138 18:44:08.118665 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-probe-channel
139 18:44:08.118789 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-probe-ip
140 18:44:08.118913 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-target-ip
141 18:44:08.119037 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-target-mac
142 18:44:08.119170 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-target-storage
143 18:44:08.119296 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-test-case
144 18:44:08.119422 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-test-event
145 18:44:08.119546 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-test-feedback
146 18:44:08.119670 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-test-raise
147 18:44:08.119792 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-test-reference
148 18:44:08.119918 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-test-runner
149 18:44:08.120044 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-test-set
150 18:44:08.120168 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-test-shell
151 18:44:08.120294 Updating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-add-keys (debian)
152 18:44:08.120422 Updating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-add-sources (debian)
153 18:44:08.120549 Updating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-install-packages (debian)
154 18:44:08.120675 Updating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-installed-packages (debian)
155 18:44:08.120801 Updating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/bin/lava-os-build (debian)
156 18:44:08.120909 Creating /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/environment
157 18:44:08.121005 LAVA metadata
158 18:44:08.121079 - LAVA_JOB_ID=9334750
159 18:44:08.121150 - LAVA_DISPATCHER_IP=192.168.201.1
160 18:44:08.121259 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
161 18:44:08.121332 skipped lava-vland-overlay
162 18:44:08.121419 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 18:44:08.121511 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
164 18:44:08.121581 skipped lava-multinode-overlay
165 18:44:08.121666 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 18:44:08.121758 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
167 18:44:08.121837 Loading test definitions
168 18:44:08.121939 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
169 18:44:08.122017 Using /lava-9334750 at stage 0
170 18:44:08.122276 uuid=9334750_1.5.2.3.1 testdef=None
171 18:44:08.122376 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 18:44:08.122474 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
173 18:44:08.122932 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 18:44:08.123355 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
176 18:44:08.123902 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 18:44:08.124168 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
179 18:44:08.124685 runner path: /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/0/tests/0_timesync-off test_uuid 9334750_1.5.2.3.1
180 18:44:08.124848 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 18:44:08.125110 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
183 18:44:08.125193 Using /lava-9334750 at stage 0
184 18:44:08.125303 Fetching tests from https://github.com/kernelci/test-definitions.git
185 18:44:08.125394 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/0/tests/1_kselftest-alsa'
186 18:44:14.661102 Running '/usr/bin/git checkout kernelci.org
187 18:44:14.811302 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
188 18:44:14.812077 uuid=9334750_1.5.2.3.5 testdef=None
189 18:44:14.812268 end: 1.5.2.3.5 git-repo-action (duration 00:00:07) [common]
191 18:44:14.812549 start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
192 18:44:14.813349 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 18:44:14.813622 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
195 18:44:14.814635 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 18:44:14.814911 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
198 18:44:14.815969 runner path: /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/0/tests/1_kselftest-alsa test_uuid 9334750_1.5.2.3.5
199 18:44:14.816070 BOARD='asus-C436FA-Flip-hatch'
200 18:44:14.816144 BRANCH='cip-gitlab'
201 18:44:14.816213 SKIPFILE='skipfile-lkft.yaml'
202 18:44:14.816280 SKIP_INSTALL='True'
203 18:44:14.816345 TESTPROG_URL='None'
204 18:44:14.816408 TST_CASENAME=''
205 18:44:14.816471 TST_CMDFILES='alsa'
206 18:44:14.816618 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
208 18:44:14.816851 Creating lava-test-runner.conf files
209 18:44:14.816924 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9334750/lava-overlay-t2zwamqw/lava-9334750/0 for stage 0
210 18:44:14.817018 - 0_timesync-off
211 18:44:14.817095 - 1_kselftest-alsa
212 18:44:14.817199 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
213 18:44:14.817296 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
214 18:44:23.150699 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
215 18:44:23.150869 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
216 18:44:23.150975 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
217 18:44:23.151107 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
218 18:44:23.151214 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
219 18:44:23.264831 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
220 18:44:23.265233 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
221 18:44:23.265377 extracting modules file /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9334750/extract-nfsrootfs-iofts441
222 18:44:23.270044 extracting modules file /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9334750/extract-overlay-ramdisk-ae7pm5li/ramdisk
223 18:44:23.274420 end: 1.5.4 extract-modules (duration 00:00:00) [common]
224 18:44:23.274567 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
225 18:44:23.274677 [common] Applying overlay to NFS
226 18:44:23.274772 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334750/compress-overlay-1hi8hd9_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9334750/extract-nfsrootfs-iofts441
227 18:44:23.791727 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
228 18:44:23.791926 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
229 18:44:23.792058 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
230 18:44:23.792190 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
231 18:44:23.792293 Building ramdisk /var/lib/lava/dispatcher/tmp/9334750/extract-overlay-ramdisk-ae7pm5li/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9334750/extract-overlay-ramdisk-ae7pm5li/ramdisk
232 18:44:23.829638 >> 24777 blocks
233 18:44:24.361958 rename /var/lib/lava/dispatcher/tmp/9334750/extract-overlay-ramdisk-ae7pm5li/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/ramdisk/ramdisk.cpio.gz
234 18:44:24.362434 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
235 18:44:24.362609 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
236 18:44:24.362745 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
237 18:44:24.362867 No mkimage arch provided, not using FIT.
238 18:44:24.362993 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
239 18:44:24.363119 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
240 18:44:24.363257 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
241 18:44:24.363388 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
242 18:44:24.363494 No LXC device requested
243 18:44:24.363638 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
244 18:44:24.363749 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
245 18:44:24.363846 end: 1.7 deploy-device-env (duration 00:00:00) [common]
246 18:44:24.363932 Checking files for TFTP limit of 4294967296 bytes.
247 18:44:24.364369 end: 1 tftp-deploy (duration 00:00:28) [common]
248 18:44:24.364490 start: 2 depthcharge-action (timeout 00:05:00) [common]
249 18:44:24.364602 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
250 18:44:24.364759 substitutions:
251 18:44:24.364844 - {DTB}: None
252 18:44:24.364919 - {INITRD}: 9334750/tftp-deploy-1094_7gi/ramdisk/ramdisk.cpio.gz
253 18:44:24.364993 - {KERNEL}: 9334750/tftp-deploy-1094_7gi/kernel/bzImage
254 18:44:24.365063 - {LAVA_MAC}: None
255 18:44:24.365132 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9334750/extract-nfsrootfs-iofts441
256 18:44:24.365202 - {NFS_SERVER_IP}: 192.168.201.1
257 18:44:24.365268 - {PRESEED_CONFIG}: None
258 18:44:24.365337 - {PRESEED_LOCAL}: None
259 18:44:24.365405 - {RAMDISK}: 9334750/tftp-deploy-1094_7gi/ramdisk/ramdisk.cpio.gz
260 18:44:24.365471 - {ROOT_PART}: None
261 18:44:24.365535 - {ROOT}: None
262 18:44:24.365600 - {SERVER_IP}: 192.168.201.1
263 18:44:24.365664 - {TEE}: None
264 18:44:24.365732 Parsed boot commands:
265 18:44:24.365795 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
266 18:44:24.365975 Parsed boot commands: tftpboot 192.168.201.1 9334750/tftp-deploy-1094_7gi/kernel/bzImage 9334750/tftp-deploy-1094_7gi/kernel/cmdline 9334750/tftp-deploy-1094_7gi/ramdisk/ramdisk.cpio.gz
267 18:44:24.366081 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
268 18:44:24.366186 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
269 18:44:24.366293 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
270 18:44:24.366401 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
271 18:44:24.366484 Not connected, no need to disconnect.
272 18:44:24.366583 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
273 18:44:24.366682 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
274 18:44:24.366766 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
275 18:44:24.370005 Setting prompt string to ['lava-test: # ']
276 18:44:24.370337 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
277 18:44:24.370464 end: 2.2.1 reset-connection (duration 00:00:00) [common]
278 18:44:24.370580 start: 2.2.2 reset-device (timeout 00:05:00) [common]
279 18:44:24.370685 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
280 18:44:24.370893 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
281 18:44:33.710071 >> Command sent successfully.
282 18:44:33.712299 Returned 0 in 9 seconds
283 18:44:33.813116 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
285 18:44:33.813520 end: 2.2.2 reset-device (duration 00:00:09) [common]
286 18:44:33.813647 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
287 18:44:33.813757 Setting prompt string to 'Starting depthcharge on Helios...'
288 18:44:33.813847 Changing prompt to 'Starting depthcharge on Helios...'
289 18:44:33.813941 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
290 18:44:33.814265 [Enter `^Ec?' for help]
291 18:44:33.814356
292 18:44:33.814468
293 18:44:33.814575 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 18:44:33.814664 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 18:44:33.814752 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 18:44:33.814838 CPU: AES supported, TXT NOT supported, VT supported
297 18:44:33.814923 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 18:44:33.815024 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 18:44:33.815126 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 18:44:33.815254 VBOOT: Loading verstage.
301 18:44:33.815337 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 18:44:33.815420 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 18:44:33.815504 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 18:44:33.815587 CBFS @ c08000 size 3f8000
305 18:44:33.815667 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 18:44:33.815748 CBFS: Locating 'fallback/verstage'
307 18:44:33.815830 CBFS: Found @ offset 10fb80 size 1072c
308 18:44:33.815913
309 18:44:33.815993
310 18:44:33.816074 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 18:44:33.816155 Probing TPM: . done!
312 18:44:33.816235 TPM ready after 0 ms
313 18:44:33.816316 Connected to device vid:did:rid of 1ae0:0028:00
314 18:44:33.816398 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
315 18:44:33.816484 Initialized TPM device CR50 revision 0
316 18:44:33.816566 tlcl_send_startup: Startup return code is 0
317 18:44:33.816648 TPM: setup succeeded
318 18:44:33.816728 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 18:44:33.816811 Chrome EC: UHEPI supported
320 18:44:33.816891 Phase 1
321 18:44:33.816973 FMAP: area GBB found @ c05000 (12288 bytes)
322 18:44:33.817069 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
323 18:44:33.817153 Phase 2
324 18:44:33.817248 Phase 3
325 18:44:33.817358 FMAP: area GBB found @ c05000 (12288 bytes)
326 18:44:33.817441 VB2:vb2_report_dev_firmware() This is developer signed firmware
327 18:44:33.817538 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 18:44:33.817636 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
329 18:44:33.817746 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 18:44:33.817826 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 18:44:33.817938 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
332 18:44:33.818018 VB2:vb2_verify_fw_preamble() Verifying preamble.
333 18:44:33.818127 Phase 4
334 18:44:33.818207 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
335 18:44:33.818303 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
336 18:44:33.818388 VB2:vb2_rsa_verify_digest() Digest check failed!
337 18:44:33.818471 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
338 18:44:33.818553 Saving nvdata
339 18:44:33.818634 Reboot requested (10020007)
340 18:44:33.818728 board_reset() called!
341 18:44:33.818807 full_reset() called!
342 18:44:37.392962
343 18:44:37.393135
344 18:44:37.403696 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
345 18:44:37.406248 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
346 18:44:37.413390 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
347 18:44:37.416405 CPU: AES supported, TXT NOT supported, VT supported
348 18:44:37.422690 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
349 18:44:37.426249 PCH: device id 0284 (rev 00) is Cometlake-U Premium
350 18:44:37.432612 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
351 18:44:37.436365 VBOOT: Loading verstage.
352 18:44:37.439729 FMAP: Found "FLASH" version 1.1 at 0xc04000.
353 18:44:37.446457 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
354 18:44:37.452499 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 18:44:37.452586 CBFS @ c08000 size 3f8000
356 18:44:37.459161 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 18:44:37.462684 CBFS: Locating 'fallback/verstage'
358 18:44:37.466454 CBFS: Found @ offset 10fb80 size 1072c
359 18:44:37.470128
360 18:44:37.470215
361 18:44:37.479522 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
362 18:44:37.493992 Probing TPM: . done!
363 18:44:37.497678 TPM ready after 0 ms
364 18:44:37.500900 Connected to device vid:did:rid of 1ae0:0028:00
365 18:44:37.511270 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
366 18:44:37.514353 Initialized TPM device CR50 revision 0
367 18:44:37.557156 tlcl_send_startup: Startup return code is 0
368 18:44:37.557269 TPM: setup succeeded
369 18:44:37.569752 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
370 18:44:37.573320 Chrome EC: UHEPI supported
371 18:44:37.576797 Phase 1
372 18:44:37.580167 FMAP: area GBB found @ c05000 (12288 bytes)
373 18:44:37.586803 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
374 18:44:37.593508 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
375 18:44:37.596845 Recovery requested (1009000e)
376 18:44:37.596941 Saving nvdata
377 18:44:37.608525 tlcl_extend: response is 0
378 18:44:37.617214 tlcl_extend: response is 0
379 18:44:37.624571 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 18:44:37.627883 CBFS @ c08000 size 3f8000
381 18:44:37.634500 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
382 18:44:37.637458 CBFS: Locating 'fallback/romstage'
383 18:44:37.641316 CBFS: Found @ offset 80 size 145fc
384 18:44:37.644191 Accumulated console time in verstage 98 ms
385 18:44:37.644297
386 18:44:37.644380
387 18:44:37.657616 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
388 18:44:37.664165 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
389 18:44:37.667100 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
390 18:44:37.670944 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
391 18:44:37.677117 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
392 18:44:37.680527 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
393 18:44:37.683549 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
394 18:44:37.686981 TCO_STS: 0000 0000
395 18:44:37.690574 GEN_PMCON: e0015238 00000200
396 18:44:37.693457 GBLRST_CAUSE: 00000000 00000000
397 18:44:37.693558 prev_sleep_state 5
398 18:44:37.697045 Boot Count incremented to 46436
399 18:44:37.703734 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
400 18:44:37.707505 CBFS @ c08000 size 3f8000
401 18:44:37.713771 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
402 18:44:37.713870 CBFS: Locating 'fspm.bin'
403 18:44:37.720230 CBFS: Found @ offset 5ffc0 size 71000
404 18:44:37.723870 Chrome EC: UHEPI supported
405 18:44:37.730085 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
406 18:44:37.733680 Probing TPM: done!
407 18:44:37.740204 Connected to device vid:did:rid of 1ae0:0028:00
408 18:44:37.750697 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
409 18:44:37.756729 Initialized TPM device CR50 revision 0
410 18:44:37.765583 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
411 18:44:37.772176 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
412 18:44:37.775109 MRC cache found, size 1948
413 18:44:37.778476 bootmode is set to: 2
414 18:44:37.781979 PRMRR disabled by config.
415 18:44:37.782078 SPD INDEX = 1
416 18:44:37.788580 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 18:44:37.792547 CBFS @ c08000 size 3f8000
418 18:44:37.798389 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 18:44:37.798523 CBFS: Locating 'spd.bin'
420 18:44:37.801704 CBFS: Found @ offset 5fb80 size 400
421 18:44:37.805378 SPD: module type is LPDDR3
422 18:44:37.808721 SPD: module part is
423 18:44:37.814999 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
424 18:44:37.818639 SPD: device width 4 bits, bus width 8 bits
425 18:44:37.821619 SPD: module size is 4096 MB (per channel)
426 18:44:37.825105 memory slot: 0 configuration done.
427 18:44:37.828152 memory slot: 2 configuration done.
428 18:44:37.879460 CBMEM:
429 18:44:37.882942 IMD: root @ 99fff000 254 entries.
430 18:44:37.885911 IMD: root @ 99ffec00 62 entries.
431 18:44:37.889280 External stage cache:
432 18:44:37.892561 IMD: root @ 9abff000 254 entries.
433 18:44:37.895991 IMD: root @ 9abfec00 62 entries.
434 18:44:37.902560 Chrome EC: clear events_b mask to 0x0000000020004000
435 18:44:37.915346 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
436 18:44:37.928625 tlcl_write: response is 0
437 18:44:37.937453 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
438 18:44:37.944485 MRC: TPM MRC hash updated successfully.
439 18:44:37.944593 2 DIMMs found
440 18:44:37.947903 SMM Memory Map
441 18:44:37.950936 SMRAM : 0x9a000000 0x1000000
442 18:44:37.954470 Subregion 0: 0x9a000000 0xa00000
443 18:44:37.957275 Subregion 1: 0x9aa00000 0x200000
444 18:44:37.960891 Subregion 2: 0x9ac00000 0x400000
445 18:44:37.964607 top_of_ram = 0x9a000000
446 18:44:37.967625 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
447 18:44:37.974404 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
448 18:44:37.977231 MTRR Range: Start=ff000000 End=0 (Size 1000000)
449 18:44:37.984148 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
450 18:44:37.987468 CBFS @ c08000 size 3f8000
451 18:44:37.990407 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
452 18:44:37.994042 CBFS: Locating 'fallback/postcar'
453 18:44:38.000416 CBFS: Found @ offset 107000 size 4b44
454 18:44:38.003940 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
455 18:44:38.016080 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
456 18:44:38.019150 Processing 180 relocs. Offset value of 0x97c0c000
457 18:44:38.028077 Accumulated console time in romstage 286 ms
458 18:44:38.028179
459 18:44:38.028256
460 18:44:38.038295 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
461 18:44:38.044669 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
462 18:44:38.047896 CBFS @ c08000 size 3f8000
463 18:44:38.051309 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
464 18:44:38.057716 CBFS: Locating 'fallback/ramstage'
465 18:44:38.060898 CBFS: Found @ offset 43380 size 1b9e8
466 18:44:38.067231 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
467 18:44:38.099995 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
468 18:44:38.103292 Processing 3976 relocs. Offset value of 0x98db0000
469 18:44:38.109342 Accumulated console time in postcar 52 ms
470 18:44:38.109448
471 18:44:38.109526
472 18:44:38.119623 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
473 18:44:38.126217 FMAP: area RO_VPD found @ c00000 (16384 bytes)
474 18:44:38.129130 WARNING: RO_VPD is uninitialized or empty.
475 18:44:38.132708 FMAP: area RW_VPD found @ af8000 (8192 bytes)
476 18:44:38.139863 FMAP: area RW_VPD found @ af8000 (8192 bytes)
477 18:44:38.139962 Normal boot.
478 18:44:38.145711 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
479 18:44:38.149262 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
480 18:44:38.152384 CBFS @ c08000 size 3f8000
481 18:44:38.159173 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
482 18:44:38.162660 CBFS: Locating 'cpu_microcode_blob.bin'
483 18:44:38.165758 CBFS: Found @ offset 14700 size 2ec00
484 18:44:38.169163 microcode: sig=0x806ec pf=0x4 revision=0xc9
485 18:44:38.172264 Skip microcode update
486 18:44:38.179303 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
487 18:44:38.179405 CBFS @ c08000 size 3f8000
488 18:44:38.186009 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
489 18:44:38.189220 CBFS: Locating 'fsps.bin'
490 18:44:38.192092 CBFS: Found @ offset d1fc0 size 35000
491 18:44:38.217793 Detected 4 core, 8 thread CPU.
492 18:44:38.220791 Setting up SMI for CPU
493 18:44:38.224490 IED base = 0x9ac00000
494 18:44:38.224581 IED size = 0x00400000
495 18:44:38.227455 Will perform SMM setup.
496 18:44:38.234652 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
497 18:44:38.240667 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
498 18:44:38.247195 Processing 16 relocs. Offset value of 0x00030000
499 18:44:38.247288 Attempting to start 7 APs
500 18:44:38.254020 Waiting for 10ms after sending INIT.
501 18:44:38.267504 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
502 18:44:38.267614 done.
503 18:44:38.270948 AP: slot 4 apic_id 3.
504 18:44:38.274079 AP: slot 1 apic_id 2.
505 18:44:38.277667 Waiting for 2nd SIPI to complete...done.
506 18:44:38.280586 AP: slot 5 apic_id 6.
507 18:44:38.280684 AP: slot 2 apic_id 7.
508 18:44:38.284115 AP: slot 7 apic_id 5.
509 18:44:38.287695 AP: slot 6 apic_id 4.
510 18:44:38.293944 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
511 18:44:38.297377 Processing 13 relocs. Offset value of 0x00038000
512 18:44:38.303869 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
513 18:44:38.310391 Installing SMM handler to 0x9a000000
514 18:44:38.317189 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
515 18:44:38.320279 Processing 658 relocs. Offset value of 0x9a010000
516 18:44:38.330204 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
517 18:44:38.333780 Processing 13 relocs. Offset value of 0x9a008000
518 18:44:38.340377 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
519 18:44:38.347129 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
520 18:44:38.350442 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
521 18:44:38.356879 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
522 18:44:38.363548 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
523 18:44:38.370002 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
524 18:44:38.373626 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
525 18:44:38.380140 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
526 18:44:38.383766 Clearing SMI status registers
527 18:44:38.387450 SMI_STS: PM1
528 18:44:38.387550 PM1_STS: PWRBTN
529 18:44:38.390128 TCO_STS: SECOND_TO
530 18:44:38.393436 New SMBASE 0x9a000000
531 18:44:38.397048 In relocation handler: CPU 0
532 18:44:38.399970 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
533 18:44:38.403587 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 18:44:38.407231 Relocation complete.
535 18:44:38.410169 New SMBASE 0x99fff400
536 18:44:38.413746 In relocation handler: CPU 3
537 18:44:38.416899 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
538 18:44:38.420390 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 18:44:38.423343 Relocation complete.
540 18:44:38.426963 New SMBASE 0x99fff800
541 18:44:38.427062 In relocation handler: CPU 2
542 18:44:38.433265 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
543 18:44:38.437155 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 18:44:38.439828 Relocation complete.
545 18:44:38.439925 New SMBASE 0x99ffec00
546 18:44:38.443363 In relocation handler: CPU 5
547 18:44:38.450528 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
548 18:44:38.452959 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 18:44:38.456474 Relocation complete.
550 18:44:38.456573 New SMBASE 0x99ffe800
551 18:44:38.459860 In relocation handler: CPU 6
552 18:44:38.466724 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
553 18:44:38.470234 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 18:44:38.473345 Relocation complete.
555 18:44:38.473444 New SMBASE 0x99ffe400
556 18:44:38.476401 In relocation handler: CPU 7
557 18:44:38.480034 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
558 18:44:38.486501 Writing SMRR. base = 0x9a000006, mask=0xff000800
559 18:44:38.490169 Relocation complete.
560 18:44:38.490262 New SMBASE 0x99fffc00
561 18:44:38.493083 In relocation handler: CPU 1
562 18:44:38.496382 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
563 18:44:38.502810 Writing SMRR. base = 0x9a000006, mask=0xff000800
564 18:44:38.502905 Relocation complete.
565 18:44:38.506393 New SMBASE 0x99fff000
566 18:44:38.509483 In relocation handler: CPU 4
567 18:44:38.513181 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
568 18:44:38.519501 Writing SMRR. base = 0x9a000006, mask=0xff000800
569 18:44:38.519591 Relocation complete.
570 18:44:38.522685 Initializing CPU #0
571 18:44:38.526278 CPU: vendor Intel device 806ec
572 18:44:38.529715 CPU: family 06, model 8e, stepping 0c
573 18:44:38.533313 Clearing out pending MCEs
574 18:44:38.536233 Setting up local APIC...
575 18:44:38.536320 apic_id: 0x00 done.
576 18:44:38.539712 Turbo is available but hidden
577 18:44:38.542741 Turbo is available and visible
578 18:44:38.546272 VMX status: enabled
579 18:44:38.549715 IA32_FEATURE_CONTROL status: locked
580 18:44:38.552525 Skip microcode update
581 18:44:38.552613 CPU #0 initialized
582 18:44:38.555981 Initializing CPU #3
583 18:44:38.556067 Initializing CPU #4
584 18:44:38.559699 Initializing CPU #1
585 18:44:38.562552 Initializing CPU #5
586 18:44:38.562635 Initializing CPU #2
587 18:44:38.566066 CPU: vendor Intel device 806ec
588 18:44:38.569062 CPU: family 06, model 8e, stepping 0c
589 18:44:38.573583 CPU: vendor Intel device 806ec
590 18:44:38.575804 CPU: family 06, model 8e, stepping 0c
591 18:44:38.579369 Clearing out pending MCEs
592 18:44:38.583011 Clearing out pending MCEs
593 18:44:38.585919 Setting up local APIC...
594 18:44:38.589370 CPU: vendor Intel device 806ec
595 18:44:38.593112 CPU: family 06, model 8e, stepping 0c
596 18:44:38.595983 CPU: vendor Intel device 806ec
597 18:44:38.599405 CPU: family 06, model 8e, stepping 0c
598 18:44:38.602966 Clearing out pending MCEs
599 18:44:38.605915 Clearing out pending MCEs
600 18:44:38.606007 Setting up local APIC...
601 18:44:38.609404 CPU: vendor Intel device 806ec
602 18:44:38.612406 CPU: family 06, model 8e, stepping 0c
603 18:44:38.616128 Clearing out pending MCEs
604 18:44:38.619205 Setting up local APIC...
605 18:44:38.622302 apic_id: 0x02 done.
606 18:44:38.622388 Setting up local APIC...
607 18:44:38.625923 Setting up local APIC...
608 18:44:38.628942 apic_id: 0x06 done.
609 18:44:38.629026 apic_id: 0x07 done.
610 18:44:38.632330 VMX status: enabled
611 18:44:38.635363 VMX status: enabled
612 18:44:38.638887 IA32_FEATURE_CONTROL status: locked
613 18:44:38.642534 IA32_FEATURE_CONTROL status: locked
614 18:44:38.645461 Skip microcode update
615 18:44:38.645547 Skip microcode update
616 18:44:38.649044 CPU #5 initialized
617 18:44:38.649129 CPU #2 initialized
618 18:44:38.652036 Initializing CPU #6
619 18:44:38.655276 Initializing CPU #7
620 18:44:38.658754 CPU: vendor Intel device 806ec
621 18:44:38.662375 CPU: family 06, model 8e, stepping 0c
622 18:44:38.662462 apic_id: 0x01 done.
623 18:44:38.665854 apic_id: 0x03 done.
624 18:44:38.668515 VMX status: enabled
625 18:44:38.668602 VMX status: enabled
626 18:44:38.672149 IA32_FEATURE_CONTROL status: locked
627 18:44:38.675644 IA32_FEATURE_CONTROL status: locked
628 18:44:38.678862 Skip microcode update
629 18:44:38.681933 Skip microcode update
630 18:44:38.682026 CPU #1 initialized
631 18:44:38.685756 CPU #4 initialized
632 18:44:38.688594 Clearing out pending MCEs
633 18:44:38.692278 CPU: vendor Intel device 806ec
634 18:44:38.695291 CPU: family 06, model 8e, stepping 0c
635 18:44:38.698916 Setting up local APIC...
636 18:44:38.698996 VMX status: enabled
637 18:44:38.701807 apic_id: 0x04 done.
638 18:44:38.705305 Clearing out pending MCEs
639 18:44:38.705411 VMX status: enabled
640 18:44:38.708890 Setting up local APIC...
641 18:44:38.712066 IA32_FEATURE_CONTROL status: locked
642 18:44:38.715157 IA32_FEATURE_CONTROL status: locked
643 18:44:38.718858 apic_id: 0x05 done.
644 18:44:38.721476 Skip microcode update
645 18:44:38.721580 VMX status: enabled
646 18:44:38.724890 CPU #6 initialized
647 18:44:38.728235 IA32_FEATURE_CONTROL status: locked
648 18:44:38.731872 Skip microcode update
649 18:44:38.731962 Skip microcode update
650 18:44:38.734857 CPU #3 initialized
651 18:44:38.734954 CPU #7 initialized
652 18:44:38.741590 bsp_do_flight_plan done after 461 msecs.
653 18:44:38.744879 CPU: frequency set to 4200 MHz
654 18:44:38.744970 Enabling SMIs.
655 18:44:38.745046 Locking SMM.
656 18:44:38.761263 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
657 18:44:38.764410 CBFS @ c08000 size 3f8000
658 18:44:38.771155 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
659 18:44:38.771259 CBFS: Locating 'vbt.bin'
660 18:44:38.774659 CBFS: Found @ offset 5f5c0 size 499
661 18:44:38.781153 Found a VBT of 4608 bytes after decompression
662 18:44:38.962316 Display FSP Version Info HOB
663 18:44:38.965205 Reference Code - CPU = 9.0.1e.30
664 18:44:38.968803 uCode Version = 0.0.0.ca
665 18:44:38.972197 TXT ACM version = ff.ff.ff.ffff
666 18:44:38.976074 Display FSP Version Info HOB
667 18:44:38.979616 Reference Code - ME = 9.0.1e.30
668 18:44:38.982271 MEBx version = 0.0.0.0
669 18:44:38.985495 ME Firmware Version = Consumer SKU
670 18:44:38.989075 Display FSP Version Info HOB
671 18:44:38.991738 Reference Code - CML PCH = 9.0.1e.30
672 18:44:38.995217 PCH-CRID Status = Disabled
673 18:44:38.998674 PCH-CRID Original Value = ff.ff.ff.ffff
674 18:44:39.001841 PCH-CRID New Value = ff.ff.ff.ffff
675 18:44:39.005435 OPROM - RST - RAID = ff.ff.ff.ffff
676 18:44:39.008350 ChipsetInit Base Version = ff.ff.ff.ffff
677 18:44:39.011726 ChipsetInit Oem Version = ff.ff.ff.ffff
678 18:44:39.015224 Display FSP Version Info HOB
679 18:44:39.021756 Reference Code - SA - System Agent = 9.0.1e.30
680 18:44:39.025412 Reference Code - MRC = 0.7.1.6c
681 18:44:39.025510 SA - PCIe Version = 9.0.1e.30
682 18:44:39.028134 SA-CRID Status = Disabled
683 18:44:39.032517 SA-CRID Original Value = 0.0.0.c
684 18:44:39.035336 SA-CRID New Value = 0.0.0.c
685 18:44:39.038203 OPROM - VBIOS = ff.ff.ff.ffff
686 18:44:39.041854 RTC Init
687 18:44:39.044797 Set power on after power failure.
688 18:44:39.044896 Disabling Deep S3
689 18:44:39.048382 Disabling Deep S3
690 18:44:39.048480 Disabling Deep S4
691 18:44:39.051799 Disabling Deep S4
692 18:44:39.054738 Disabling Deep S5
693 18:44:39.054836 Disabling Deep S5
694 18:44:39.061181 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
695 18:44:39.061281 Enumerating buses...
696 18:44:39.068415 Show all devs... Before device enumeration.
697 18:44:39.071430 Root Device: enabled 1
698 18:44:39.071529 CPU_CLUSTER: 0: enabled 1
699 18:44:39.074975 DOMAIN: 0000: enabled 1
700 18:44:39.078230 APIC: 00: enabled 1
701 18:44:39.078333 PCI: 00:00.0: enabled 1
702 18:44:39.081606 PCI: 00:02.0: enabled 1
703 18:44:39.084850 PCI: 00:04.0: enabled 0
704 18:44:39.088067 PCI: 00:05.0: enabled 0
705 18:44:39.088166 PCI: 00:12.0: enabled 1
706 18:44:39.090979 PCI: 00:12.5: enabled 0
707 18:44:39.094679 PCI: 00:12.6: enabled 0
708 18:44:39.097655 PCI: 00:14.0: enabled 1
709 18:44:39.097753 PCI: 00:14.1: enabled 0
710 18:44:39.100987 PCI: 00:14.3: enabled 1
711 18:44:39.104679 PCI: 00:14.5: enabled 0
712 18:44:39.104777 PCI: 00:15.0: enabled 1
713 18:44:39.107611 PCI: 00:15.1: enabled 1
714 18:44:39.111047 PCI: 00:15.2: enabled 0
715 18:44:39.114687 PCI: 00:15.3: enabled 0
716 18:44:39.114785 PCI: 00:16.0: enabled 1
717 18:44:39.117597 PCI: 00:16.1: enabled 0
718 18:44:39.121002 PCI: 00:16.2: enabled 0
719 18:44:39.124085 PCI: 00:16.3: enabled 0
720 18:44:39.124181 PCI: 00:16.4: enabled 0
721 18:44:39.127563 PCI: 00:16.5: enabled 0
722 18:44:39.130833 PCI: 00:17.0: enabled 1
723 18:44:39.134392 PCI: 00:19.0: enabled 1
724 18:44:39.134488 PCI: 00:19.1: enabled 0
725 18:44:39.137826 PCI: 00:19.2: enabled 0
726 18:44:39.140937 PCI: 00:1a.0: enabled 0
727 18:44:39.141033 PCI: 00:1c.0: enabled 0
728 18:44:39.144316 PCI: 00:1c.1: enabled 0
729 18:44:39.147827 PCI: 00:1c.2: enabled 0
730 18:44:39.150886 PCI: 00:1c.3: enabled 0
731 18:44:39.150983 PCI: 00:1c.4: enabled 0
732 18:44:39.154119 PCI: 00:1c.5: enabled 0
733 18:44:39.157581 PCI: 00:1c.6: enabled 0
734 18:44:39.160509 PCI: 00:1c.7: enabled 0
735 18:44:39.160611 PCI: 00:1d.0: enabled 1
736 18:44:39.163740 PCI: 00:1d.1: enabled 0
737 18:44:39.167206 PCI: 00:1d.2: enabled 0
738 18:44:39.170598 PCI: 00:1d.3: enabled 0
739 18:44:39.170694 PCI: 00:1d.4: enabled 0
740 18:44:39.174093 PCI: 00:1d.5: enabled 1
741 18:44:39.176948 PCI: 00:1e.0: enabled 1
742 18:44:39.180789 PCI: 00:1e.1: enabled 0
743 18:44:39.180891 PCI: 00:1e.2: enabled 1
744 18:44:39.183829 PCI: 00:1e.3: enabled 1
745 18:44:39.186880 PCI: 00:1f.0: enabled 1
746 18:44:39.186977 PCI: 00:1f.1: enabled 1
747 18:44:39.190743 PCI: 00:1f.2: enabled 1
748 18:44:39.193711 PCI: 00:1f.3: enabled 1
749 18:44:39.197575 PCI: 00:1f.4: enabled 1
750 18:44:39.197672 PCI: 00:1f.5: enabled 1
751 18:44:39.200508 PCI: 00:1f.6: enabled 0
752 18:44:39.203940 USB0 port 0: enabled 1
753 18:44:39.204038 I2C: 00:15: enabled 1
754 18:44:39.206898 I2C: 00:5d: enabled 1
755 18:44:39.210442 GENERIC: 0.0: enabled 1
756 18:44:39.214088 I2C: 00:1a: enabled 1
757 18:44:39.214185 I2C: 00:38: enabled 1
758 18:44:39.216860 I2C: 00:39: enabled 1
759 18:44:39.220407 I2C: 00:3a: enabled 1
760 18:44:39.220505 I2C: 00:3b: enabled 1
761 18:44:39.224186 PCI: 00:00.0: enabled 1
762 18:44:39.227213 SPI: 00: enabled 1
763 18:44:39.227313 SPI: 01: enabled 1
764 18:44:39.230303 PNP: 0c09.0: enabled 1
765 18:44:39.233818 USB2 port 0: enabled 1
766 18:44:39.233912 USB2 port 1: enabled 1
767 18:44:39.236673 USB2 port 2: enabled 0
768 18:44:39.239952 USB2 port 3: enabled 0
769 18:44:39.240038 USB2 port 5: enabled 0
770 18:44:39.243694 USB2 port 6: enabled 1
771 18:44:39.246783 USB2 port 9: enabled 1
772 18:44:39.250276 USB3 port 0: enabled 1
773 18:44:39.250365 USB3 port 1: enabled 1
774 18:44:39.253818 USB3 port 2: enabled 1
775 18:44:39.256440 USB3 port 3: enabled 1
776 18:44:39.256528 USB3 port 4: enabled 0
777 18:44:39.260158 APIC: 02: enabled 1
778 18:44:39.263308 APIC: 07: enabled 1
779 18:44:39.263391 APIC: 01: enabled 1
780 18:44:39.266428 APIC: 03: enabled 1
781 18:44:39.266511 APIC: 06: enabled 1
782 18:44:39.270177 APIC: 04: enabled 1
783 18:44:39.273114 APIC: 05: enabled 1
784 18:44:39.273199 Compare with tree...
785 18:44:39.276848 Root Device: enabled 1
786 18:44:39.280272 CPU_CLUSTER: 0: enabled 1
787 18:44:39.283876 APIC: 00: enabled 1
788 18:44:39.283971 APIC: 02: enabled 1
789 18:44:39.286631 APIC: 07: enabled 1
790 18:44:39.289942 APIC: 01: enabled 1
791 18:44:39.290028 APIC: 03: enabled 1
792 18:44:39.292982 APIC: 06: enabled 1
793 18:44:39.296655 APIC: 04: enabled 1
794 18:44:39.296740 APIC: 05: enabled 1
795 18:44:39.299585 DOMAIN: 0000: enabled 1
796 18:44:39.303286 PCI: 00:00.0: enabled 1
797 18:44:39.306783 PCI: 00:02.0: enabled 1
798 18:44:39.306870 PCI: 00:04.0: enabled 0
799 18:44:39.309765 PCI: 00:05.0: enabled 0
800 18:44:39.313180 PCI: 00:12.0: enabled 1
801 18:44:39.316152 PCI: 00:12.5: enabled 0
802 18:44:39.319567 PCI: 00:12.6: enabled 0
803 18:44:39.319653 PCI: 00:14.0: enabled 1
804 18:44:39.323060 USB0 port 0: enabled 1
805 18:44:39.326616 USB2 port 0: enabled 1
806 18:44:39.329566 USB2 port 1: enabled 1
807 18:44:39.333027 USB2 port 2: enabled 0
808 18:44:39.333114 USB2 port 3: enabled 0
809 18:44:39.336528 USB2 port 5: enabled 0
810 18:44:39.339701 USB2 port 6: enabled 1
811 18:44:39.342571 USB2 port 9: enabled 1
812 18:44:39.346050 USB3 port 0: enabled 1
813 18:44:39.349649 USB3 port 1: enabled 1
814 18:44:39.349736 USB3 port 2: enabled 1
815 18:44:39.352537 USB3 port 3: enabled 1
816 18:44:39.356114 USB3 port 4: enabled 0
817 18:44:39.359744 PCI: 00:14.1: enabled 0
818 18:44:39.363073 PCI: 00:14.3: enabled 1
819 18:44:39.363183 PCI: 00:14.5: enabled 0
820 18:44:39.366125 PCI: 00:15.0: enabled 1
821 18:44:39.369624 I2C: 00:15: enabled 1
822 18:44:39.372616 PCI: 00:15.1: enabled 1
823 18:44:39.376075 I2C: 00:5d: enabled 1
824 18:44:39.376169 GENERIC: 0.0: enabled 1
825 18:44:39.379711 PCI: 00:15.2: enabled 0
826 18:44:39.382634 PCI: 00:15.3: enabled 0
827 18:44:39.386205 PCI: 00:16.0: enabled 1
828 18:44:39.389106 PCI: 00:16.1: enabled 0
829 18:44:39.389198 PCI: 00:16.2: enabled 0
830 18:44:39.392380 PCI: 00:16.3: enabled 0
831 18:44:39.395914 PCI: 00:16.4: enabled 0
832 18:44:39.399614 PCI: 00:16.5: enabled 0
833 18:44:39.399701 PCI: 00:17.0: enabled 1
834 18:44:39.402492 PCI: 00:19.0: enabled 1
835 18:44:39.406253 I2C: 00:1a: enabled 1
836 18:44:39.409248 I2C: 00:38: enabled 1
837 18:44:39.412198 I2C: 00:39: enabled 1
838 18:44:39.412285 I2C: 00:3a: enabled 1
839 18:44:39.415719 I2C: 00:3b: enabled 1
840 18:44:39.419290 PCI: 00:19.1: enabled 0
841 18:44:39.422250 PCI: 00:19.2: enabled 0
842 18:44:39.422336 PCI: 00:1a.0: enabled 0
843 18:44:39.425674 PCI: 00:1c.0: enabled 0
844 18:44:39.428759 PCI: 00:1c.1: enabled 0
845 18:44:39.432389 PCI: 00:1c.2: enabled 0
846 18:44:39.435502 PCI: 00:1c.3: enabled 0
847 18:44:39.435589 PCI: 00:1c.4: enabled 0
848 18:44:39.438939 PCI: 00:1c.5: enabled 0
849 18:44:39.442420 PCI: 00:1c.6: enabled 0
850 18:44:39.445359 PCI: 00:1c.7: enabled 0
851 18:44:39.449057 PCI: 00:1d.0: enabled 1
852 18:44:39.449142 PCI: 00:1d.1: enabled 0
853 18:44:39.451950 PCI: 00:1d.2: enabled 0
854 18:44:39.455246 PCI: 00:1d.3: enabled 0
855 18:44:39.458992 PCI: 00:1d.4: enabled 0
856 18:44:39.462345 PCI: 00:1d.5: enabled 1
857 18:44:39.462428 PCI: 00:00.0: enabled 1
858 18:44:39.465326 PCI: 00:1e.0: enabled 1
859 18:44:39.468919 PCI: 00:1e.1: enabled 0
860 18:44:39.472265 PCI: 00:1e.2: enabled 1
861 18:44:39.472348 SPI: 00: enabled 1
862 18:44:39.475210 PCI: 00:1e.3: enabled 1
863 18:44:39.478728 SPI: 01: enabled 1
864 18:44:39.482211 PCI: 00:1f.0: enabled 1
865 18:44:39.485520 PNP: 0c09.0: enabled 1
866 18:44:39.485609 PCI: 00:1f.1: enabled 1
867 18:44:39.489292 PCI: 00:1f.2: enabled 1
868 18:44:39.491877 PCI: 00:1f.3: enabled 1
869 18:44:39.495521 PCI: 00:1f.4: enabled 1
870 18:44:39.495605 PCI: 00:1f.5: enabled 1
871 18:44:39.499035 PCI: 00:1f.6: enabled 0
872 18:44:39.501969 Root Device scanning...
873 18:44:39.505501 scan_static_bus for Root Device
874 18:44:39.508532 CPU_CLUSTER: 0 enabled
875 18:44:39.508618 DOMAIN: 0000 enabled
876 18:44:39.512054 DOMAIN: 0000 scanning...
877 18:44:39.515002 PCI: pci_scan_bus for bus 00
878 18:44:39.518485 PCI: 00:00.0 [8086/0000] ops
879 18:44:39.521993 PCI: 00:00.0 [8086/9b61] enabled
880 18:44:39.525515 PCI: 00:02.0 [8086/0000] bus ops
881 18:44:39.528380 PCI: 00:02.0 [8086/9b41] enabled
882 18:44:39.531590 PCI: 00:04.0 [8086/1903] disabled
883 18:44:39.535047 PCI: 00:08.0 [8086/1911] enabled
884 18:44:39.538454 PCI: 00:12.0 [8086/02f9] enabled
885 18:44:39.542086 PCI: 00:14.0 [8086/0000] bus ops
886 18:44:39.544791 PCI: 00:14.0 [8086/02ed] enabled
887 18:44:39.548465 PCI: 00:14.2 [8086/02ef] enabled
888 18:44:39.551590 PCI: 00:14.3 [8086/02f0] enabled
889 18:44:39.554911 PCI: 00:15.0 [8086/0000] bus ops
890 18:44:39.558528 PCI: 00:15.0 [8086/02e8] enabled
891 18:44:39.561434 PCI: 00:15.1 [8086/0000] bus ops
892 18:44:39.564880 PCI: 00:15.1 [8086/02e9] enabled
893 18:44:39.568443 PCI: 00:16.0 [8086/0000] ops
894 18:44:39.571640 PCI: 00:16.0 [8086/02e0] enabled
895 18:44:39.575074 PCI: 00:17.0 [8086/0000] ops
896 18:44:39.578292 PCI: 00:17.0 [8086/02d3] enabled
897 18:44:39.581821 PCI: 00:19.0 [8086/0000] bus ops
898 18:44:39.585071 PCI: 00:19.0 [8086/02c5] enabled
899 18:44:39.588223 PCI: 00:1d.0 [8086/0000] bus ops
900 18:44:39.591694 PCI: 00:1d.0 [8086/02b0] enabled
901 18:44:39.597960 PCI: Static device PCI: 00:1d.5 not found, disabling it.
902 18:44:39.601500 PCI: 00:1e.0 [8086/0000] ops
903 18:44:39.604718 PCI: 00:1e.0 [8086/02a8] enabled
904 18:44:39.608025 PCI: 00:1e.2 [8086/0000] bus ops
905 18:44:39.611676 PCI: 00:1e.2 [8086/02aa] enabled
906 18:44:39.614567 PCI: 00:1e.3 [8086/0000] bus ops
907 18:44:39.618314 PCI: 00:1e.3 [8086/02ab] enabled
908 18:44:39.621628 PCI: 00:1f.0 [8086/0000] bus ops
909 18:44:39.621722 PCI: 00:1f.0 [8086/0284] enabled
910 18:44:39.628147 PCI: Static device PCI: 00:1f.1 not found, disabling it.
911 18:44:39.634509 PCI: Static device PCI: 00:1f.2 not found, disabling it.
912 18:44:39.638169 PCI: 00:1f.3 [8086/0000] bus ops
913 18:44:39.641487 PCI: 00:1f.3 [8086/02c8] enabled
914 18:44:39.645054 PCI: 00:1f.4 [8086/0000] bus ops
915 18:44:39.647817 PCI: 00:1f.4 [8086/02a3] enabled
916 18:44:39.651337 PCI: 00:1f.5 [8086/0000] bus ops
917 18:44:39.654808 PCI: 00:1f.5 [8086/02a4] enabled
918 18:44:39.657651 PCI: Leftover static devices:
919 18:44:39.657743 PCI: 00:05.0
920 18:44:39.661338 PCI: 00:12.5
921 18:44:39.661428 PCI: 00:12.6
922 18:44:39.661502 PCI: 00:14.1
923 18:44:39.664765 PCI: 00:14.5
924 18:44:39.664850 PCI: 00:15.2
925 18:44:39.667664 PCI: 00:15.3
926 18:44:39.667747 PCI: 00:16.1
927 18:44:39.671076 PCI: 00:16.2
928 18:44:39.671167 PCI: 00:16.3
929 18:44:39.671240 PCI: 00:16.4
930 18:44:39.674586 PCI: 00:16.5
931 18:44:39.674669 PCI: 00:19.1
932 18:44:39.677569 PCI: 00:19.2
933 18:44:39.677651 PCI: 00:1a.0
934 18:44:39.677722 PCI: 00:1c.0
935 18:44:39.681278 PCI: 00:1c.1
936 18:44:39.681362 PCI: 00:1c.2
937 18:44:39.684326 PCI: 00:1c.3
938 18:44:39.684409 PCI: 00:1c.4
939 18:44:39.684482 PCI: 00:1c.5
940 18:44:39.687803 PCI: 00:1c.6
941 18:44:39.687889 PCI: 00:1c.7
942 18:44:39.691034 PCI: 00:1d.1
943 18:44:39.691127 PCI: 00:1d.2
944 18:44:39.694556 PCI: 00:1d.3
945 18:44:39.694639 PCI: 00:1d.4
946 18:44:39.694710 PCI: 00:1d.5
947 18:44:39.697984 PCI: 00:1e.1
948 18:44:39.698065 PCI: 00:1f.1
949 18:44:39.701082 PCI: 00:1f.2
950 18:44:39.701164 PCI: 00:1f.6
951 18:44:39.704082 PCI: Check your devicetree.cb.
952 18:44:39.707649 PCI: 00:02.0 scanning...
953 18:44:39.711248 scan_generic_bus for PCI: 00:02.0
954 18:44:39.714334 scan_generic_bus for PCI: 00:02.0 done
955 18:44:39.720664 scan_bus: scanning of bus PCI: 00:02.0 took 10195 usecs
956 18:44:39.720756 PCI: 00:14.0 scanning...
957 18:44:39.724223 scan_static_bus for PCI: 00:14.0
958 18:44:39.727799 USB0 port 0 enabled
959 18:44:39.730828 USB0 port 0 scanning...
960 18:44:39.734191 scan_static_bus for USB0 port 0
961 18:44:39.737800 USB2 port 0 enabled
962 18:44:39.737887 USB2 port 1 enabled
963 18:44:39.740834 USB2 port 2 disabled
964 18:44:39.740918 USB2 port 3 disabled
965 18:44:39.744055 USB2 port 5 disabled
966 18:44:39.747619 USB2 port 6 enabled
967 18:44:39.747704 USB2 port 9 enabled
968 18:44:39.751036 USB3 port 0 enabled
969 18:44:39.754006 USB3 port 1 enabled
970 18:44:39.754091 USB3 port 2 enabled
971 18:44:39.757683 USB3 port 3 enabled
972 18:44:39.757767 USB3 port 4 disabled
973 18:44:39.761525 USB2 port 0 scanning...
974 18:44:39.764036 scan_static_bus for USB2 port 0
975 18:44:39.767597 scan_static_bus for USB2 port 0 done
976 18:44:39.774140 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
977 18:44:39.777241 USB2 port 1 scanning...
978 18:44:39.780764 scan_static_bus for USB2 port 1
979 18:44:39.784278 scan_static_bus for USB2 port 1 done
980 18:44:39.787492 scan_bus: scanning of bus USB2 port 1 took 9699 usecs
981 18:44:39.790470 USB2 port 6 scanning...
982 18:44:39.794041 scan_static_bus for USB2 port 6
983 18:44:39.797377 scan_static_bus for USB2 port 6 done
984 18:44:39.803948 scan_bus: scanning of bus USB2 port 6 took 9699 usecs
985 18:44:39.807269 USB2 port 9 scanning...
986 18:44:39.810293 scan_static_bus for USB2 port 9
987 18:44:39.813966 scan_static_bus for USB2 port 9 done
988 18:44:39.820529 scan_bus: scanning of bus USB2 port 9 took 9706 usecs
989 18:44:39.820623 USB3 port 0 scanning...
990 18:44:39.823586 scan_static_bus for USB3 port 0
991 18:44:39.826988 scan_static_bus for USB3 port 0 done
992 18:44:39.833465 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
993 18:44:39.836978 USB3 port 1 scanning...
994 18:44:39.840633 scan_static_bus for USB3 port 1
995 18:44:39.843587 scan_static_bus for USB3 port 1 done
996 18:44:39.850069 scan_bus: scanning of bus USB3 port 1 took 9709 usecs
997 18:44:39.850169 USB3 port 2 scanning...
998 18:44:39.853641 scan_static_bus for USB3 port 2
999 18:44:39.860161 scan_static_bus for USB3 port 2 done
1000 18:44:39.863618 scan_bus: scanning of bus USB3 port 2 took 9708 usecs
1001 18:44:39.867197 USB3 port 3 scanning...
1002 18:44:39.870104 scan_static_bus for USB3 port 3
1003 18:44:39.873230 scan_static_bus for USB3 port 3 done
1004 18:44:39.879855 scan_bus: scanning of bus USB3 port 3 took 9709 usecs
1005 18:44:39.883400 scan_static_bus for USB0 port 0 done
1006 18:44:39.886341 scan_bus: scanning of bus USB0 port 0 took 155401 usecs
1007 18:44:39.893440 scan_static_bus for PCI: 00:14.0 done
1008 18:44:39.896649 scan_bus: scanning of bus PCI: 00:14.0 took 173035 usecs
1009 18:44:39.900432 PCI: 00:15.0 scanning...
1010 18:44:39.903576 scan_generic_bus for PCI: 00:15.0
1011 18:44:39.906553 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1012 18:44:39.913002 scan_generic_bus for PCI: 00:15.0 done
1013 18:44:39.916553 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
1014 18:44:39.920259 PCI: 00:15.1 scanning...
1015 18:44:39.922974 scan_generic_bus for PCI: 00:15.1
1016 18:44:39.926601 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1017 18:44:39.933125 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1018 18:44:39.936559 scan_generic_bus for PCI: 00:15.1 done
1019 18:44:39.942968 scan_bus: scanning of bus PCI: 00:15.1 took 18614 usecs
1020 18:44:39.943063 PCI: 00:19.0 scanning...
1021 18:44:39.946434 scan_generic_bus for PCI: 00:19.0
1022 18:44:39.953234 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1023 18:44:39.956024 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1024 18:44:39.959679 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1025 18:44:39.962734 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1026 18:44:39.969389 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1027 18:44:39.972844 scan_generic_bus for PCI: 00:19.0 done
1028 18:44:39.976256 scan_bus: scanning of bus PCI: 00:19.0 took 30735 usecs
1029 18:44:39.979347 PCI: 00:1d.0 scanning...
1030 18:44:39.982602 do_pci_scan_bridge for PCI: 00:1d.0
1031 18:44:39.986008 PCI: pci_scan_bus for bus 01
1032 18:44:39.989678 PCI: 01:00.0 [1c5c/1327] enabled
1033 18:44:39.992459 Enabling Common Clock Configuration
1034 18:44:39.999599 L1 Sub-State supported from root port 29
1035 18:44:40.002598 L1 Sub-State Support = 0xf
1036 18:44:40.002686 CommonModeRestoreTime = 0x28
1037 18:44:40.009061 Power On Value = 0x16, Power On Scale = 0x0
1038 18:44:40.009163 ASPM: Enabled L1
1039 18:44:40.015690 scan_bus: scanning of bus PCI: 00:1d.0 took 32780 usecs
1040 18:44:40.019097 PCI: 00:1e.2 scanning...
1041 18:44:40.022674 scan_generic_bus for PCI: 00:1e.2
1042 18:44:40.025708 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1043 18:44:40.029180 scan_generic_bus for PCI: 00:1e.2 done
1044 18:44:40.035689 scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
1045 18:44:40.038988 PCI: 00:1e.3 scanning...
1046 18:44:40.042753 scan_generic_bus for PCI: 00:1e.3
1047 18:44:40.045631 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1048 18:44:40.049111 scan_generic_bus for PCI: 00:1e.3 done
1049 18:44:40.055953 scan_bus: scanning of bus PCI: 00:1e.3 took 13996 usecs
1050 18:44:40.056053 PCI: 00:1f.0 scanning...
1051 18:44:40.059597 scan_static_bus for PCI: 00:1f.0
1052 18:44:40.062525 PNP: 0c09.0 enabled
1053 18:44:40.065979 scan_static_bus for PCI: 00:1f.0 done
1054 18:44:40.072520 scan_bus: scanning of bus PCI: 00:1f.0 took 12048 usecs
1055 18:44:40.076525 PCI: 00:1f.3 scanning...
1056 18:44:40.079039 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1057 18:44:40.082729 PCI: 00:1f.4 scanning...
1058 18:44:40.085914 scan_generic_bus for PCI: 00:1f.4
1059 18:44:40.088928 scan_generic_bus for PCI: 00:1f.4 done
1060 18:44:40.095994 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
1061 18:44:40.098965 PCI: 00:1f.5 scanning...
1062 18:44:40.102550 scan_generic_bus for PCI: 00:1f.5
1063 18:44:40.106053 scan_generic_bus for PCI: 00:1f.5 done
1064 18:44:40.112223 scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs
1065 18:44:40.118685 scan_bus: scanning of bus DOMAIN: 0000 took 605095 usecs
1066 18:44:40.122323 scan_static_bus for Root Device done
1067 18:44:40.125316 scan_bus: scanning of bus Root Device took 624966 usecs
1068 18:44:40.128979 done
1069 18:44:40.131922 Chrome EC: UHEPI supported
1070 18:44:40.135528 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1071 18:44:40.142194 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1072 18:44:40.148513 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1073 18:44:40.155525 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1074 18:44:40.158589 SPI flash protection: WPSW=0 SRP0=0
1075 18:44:40.165263 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1076 18:44:40.168304 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1077 18:44:40.171747 found VGA at PCI: 00:02.0
1078 18:44:40.174905 Setting up VGA for PCI: 00:02.0
1079 18:44:40.181896 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1080 18:44:40.184785 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1081 18:44:40.188170 Allocating resources...
1082 18:44:40.191801 Reading resources...
1083 18:44:40.194711 Root Device read_resources bus 0 link: 0
1084 18:44:40.198225 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1085 18:44:40.204506 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1086 18:44:40.207886 DOMAIN: 0000 read_resources bus 0 link: 0
1087 18:44:40.215224 PCI: 00:14.0 read_resources bus 0 link: 0
1088 18:44:40.218270 USB0 port 0 read_resources bus 0 link: 0
1089 18:44:40.226750 USB0 port 0 read_resources bus 0 link: 0 done
1090 18:44:40.230211 PCI: 00:14.0 read_resources bus 0 link: 0 done
1091 18:44:40.237085 PCI: 00:15.0 read_resources bus 1 link: 0
1092 18:44:40.240526 PCI: 00:15.0 read_resources bus 1 link: 0 done
1093 18:44:40.247429 PCI: 00:15.1 read_resources bus 2 link: 0
1094 18:44:40.250466 PCI: 00:15.1 read_resources bus 2 link: 0 done
1095 18:44:40.257711 PCI: 00:19.0 read_resources bus 3 link: 0
1096 18:44:40.264397 PCI: 00:19.0 read_resources bus 3 link: 0 done
1097 18:44:40.268072 PCI: 00:1d.0 read_resources bus 1 link: 0
1098 18:44:40.274478 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1099 18:44:40.277789 PCI: 00:1e.2 read_resources bus 4 link: 0
1100 18:44:40.284255 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1101 18:44:40.287559 PCI: 00:1e.3 read_resources bus 5 link: 0
1102 18:44:40.293982 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1103 18:44:40.297481 PCI: 00:1f.0 read_resources bus 0 link: 0
1104 18:44:40.304410 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1105 18:44:40.310745 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 18:44:40.313810 Root Device read_resources bus 0 link: 0 done
1107 18:44:40.317587 Done reading resources.
1108 18:44:40.324380 Show resources in subtree (Root Device)...After reading.
1109 18:44:40.327071 Root Device child on link 0 CPU_CLUSTER: 0
1110 18:44:40.330670 CPU_CLUSTER: 0 child on link 0 APIC: 00
1111 18:44:40.334391 APIC: 00
1112 18:44:40.334478 APIC: 02
1113 18:44:40.334554 APIC: 07
1114 18:44:40.337080 APIC: 01
1115 18:44:40.337164 APIC: 03
1116 18:44:40.337239 APIC: 06
1117 18:44:40.340566 APIC: 04
1118 18:44:40.340650 APIC: 05
1119 18:44:40.347193 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1120 18:44:40.353897 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1121 18:44:40.410523 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1122 18:44:40.410688 PCI: 00:00.0
1123 18:44:40.412083 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1124 18:44:40.412175 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1125 18:44:40.413002 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1126 18:44:40.413269 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1127 18:44:40.460287 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1128 18:44:40.460636 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1129 18:44:40.461179 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1130 18:44:40.461522 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1131 18:44:40.461997 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1132 18:44:40.462292 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1133 18:44:40.498039 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1134 18:44:40.498388 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1135 18:44:40.499658 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1136 18:44:40.499926 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1137 18:44:40.505819 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1138 18:44:40.515972 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1139 18:44:40.519052 PCI: 00:02.0
1140 18:44:40.529284 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 18:44:40.539205 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 18:44:40.545335 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 18:44:40.548981 PCI: 00:04.0
1144 18:44:40.549083 PCI: 00:08.0
1145 18:44:40.558726 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1146 18:44:40.561892 PCI: 00:12.0
1147 18:44:40.571953 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 18:44:40.574919 PCI: 00:14.0 child on link 0 USB0 port 0
1149 18:44:40.584788 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1150 18:44:40.591363 USB0 port 0 child on link 0 USB2 port 0
1151 18:44:40.591480 USB2 port 0
1152 18:44:40.594994 USB2 port 1
1153 18:44:40.595102 USB2 port 2
1154 18:44:40.598525 USB2 port 3
1155 18:44:40.598625 USB2 port 5
1156 18:44:40.601527 USB2 port 6
1157 18:44:40.601618 USB2 port 9
1158 18:44:40.604829 USB3 port 0
1159 18:44:40.604916 USB3 port 1
1160 18:44:40.608397 USB3 port 2
1161 18:44:40.608487 USB3 port 3
1162 18:44:40.611832 USB3 port 4
1163 18:44:40.614766 PCI: 00:14.2
1164 18:44:40.625155 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1165 18:44:40.634858 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1166 18:44:40.634961 PCI: 00:14.3
1167 18:44:40.644963 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 18:44:40.647873 PCI: 00:15.0 child on link 0 I2C: 01:15
1169 18:44:40.657926 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 18:44:40.661270 I2C: 01:15
1171 18:44:40.664852 PCI: 00:15.1 child on link 0 I2C: 02:5d
1172 18:44:40.674095 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1173 18:44:40.677846 I2C: 02:5d
1174 18:44:40.677938 GENERIC: 0.0
1175 18:44:40.681121 PCI: 00:16.0
1176 18:44:40.691195 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 18:44:40.691298 PCI: 00:17.0
1178 18:44:40.700806 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1179 18:44:40.710625 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1180 18:44:40.717135 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1181 18:44:40.727525 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1182 18:44:40.733845 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1183 18:44:40.743791 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1184 18:44:40.747183 PCI: 00:19.0 child on link 0 I2C: 03:1a
1185 18:44:40.757331 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 18:44:40.760024 I2C: 03:1a
1187 18:44:40.760129 I2C: 03:38
1188 18:44:40.763722 I2C: 03:39
1189 18:44:40.763813 I2C: 03:3a
1190 18:44:40.763898 I2C: 03:3b
1191 18:44:40.770304 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1192 18:44:40.776773 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 18:44:40.786828 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 18:44:40.796940 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 18:44:40.799989 PCI: 01:00.0
1196 18:44:40.810151 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 18:44:40.810304 PCI: 00:1e.0
1198 18:44:40.823112 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1199 18:44:40.833320 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1200 18:44:40.836135 PCI: 00:1e.2 child on link 0 SPI: 00
1201 18:44:40.846168 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 18:44:40.846265 SPI: 00
1203 18:44:40.849615 PCI: 00:1e.3 child on link 0 SPI: 01
1204 18:44:40.859811 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 18:44:40.862899 SPI: 01
1206 18:44:40.866187 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1207 18:44:40.876425 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1208 18:44:40.883007 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1209 18:44:40.886049 PNP: 0c09.0
1210 18:44:40.892986 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1211 18:44:40.896400 PCI: 00:1f.3
1212 18:44:40.906086 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1213 18:44:40.916239 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1214 18:44:40.919599 PCI: 00:1f.4
1215 18:44:40.925854 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1216 18:44:40.936229 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1217 18:44:40.939863 PCI: 00:1f.5
1218 18:44:40.945915 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1219 18:44:40.952352 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1220 18:44:40.959181 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1221 18:44:40.965770 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1222 18:44:40.969310 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1223 18:44:40.972308 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1224 18:44:40.979041 PCI: 00:17.0 18 * [0x60 - 0x67] io
1225 18:44:40.982717 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1226 18:44:40.989188 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1227 18:44:40.995798 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1228 18:44:41.002201 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1229 18:44:41.011951 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1230 18:44:41.018612 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1231 18:44:41.022354 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1232 18:44:41.028727 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1233 18:44:41.035546 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1234 18:44:41.038382 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1235 18:44:41.045491 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1236 18:44:41.048286 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1237 18:44:41.055186 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1238 18:44:41.058353 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1239 18:44:41.061790 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1240 18:44:41.068653 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1241 18:44:41.072095 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1242 18:44:41.077908 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1243 18:44:41.081425 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1244 18:44:41.087884 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1245 18:44:41.091166 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1246 18:44:41.098264 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1247 18:44:41.101368 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1248 18:44:41.108304 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1249 18:44:41.111192 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1250 18:44:41.117888 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1251 18:44:41.121333 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1252 18:44:41.128163 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1253 18:44:41.131232 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1254 18:44:41.137612 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1255 18:44:41.141416 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1256 18:44:41.150689 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1257 18:44:41.154332 avoid_fixed_resources: DOMAIN: 0000
1258 18:44:41.157286 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1259 18:44:41.164191 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1260 18:44:41.174103 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1261 18:44:41.180887 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1262 18:44:41.187550 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1263 18:44:41.197262 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1264 18:44:41.203889 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1265 18:44:41.210817 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 18:44:41.216932 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1267 18:44:41.227185 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1268 18:44:41.233251 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1269 18:44:41.239873 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1270 18:44:41.243450 Setting resources...
1271 18:44:41.249795 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1272 18:44:41.253247 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1273 18:44:41.256748 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1274 18:44:41.260273 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1275 18:44:41.266733 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1276 18:44:41.269683 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1277 18:44:41.276291 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1278 18:44:41.283205 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1279 18:44:41.293061 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1280 18:44:41.296236 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1281 18:44:41.303573 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1282 18:44:41.306116 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1283 18:44:41.313024 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1284 18:44:41.316322 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1285 18:44:41.322811 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1286 18:44:41.325924 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1287 18:44:41.329372 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1288 18:44:41.335975 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1289 18:44:41.339435 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1290 18:44:41.346464 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1291 18:44:41.349023 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1292 18:44:41.356156 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1293 18:44:41.359057 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1294 18:44:41.366038 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1295 18:44:41.369249 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1296 18:44:41.375453 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1297 18:44:41.379034 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1298 18:44:41.385569 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1299 18:44:41.388680 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1300 18:44:41.395338 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1301 18:44:41.398886 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1302 18:44:41.402309 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1303 18:44:41.412145 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1304 18:44:41.418715 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1305 18:44:41.425171 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1306 18:44:41.431727 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1307 18:44:41.438351 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1308 18:44:41.445462 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1309 18:44:41.448321 Root Device assign_resources, bus 0 link: 0
1310 18:44:41.455652 DOMAIN: 0000 assign_resources, bus 0 link: 0
1311 18:44:41.461876 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1312 18:44:41.471968 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1313 18:44:41.478403 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1314 18:44:41.488290 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1315 18:44:41.494914 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1316 18:44:41.504971 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1317 18:44:41.508585 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 18:44:41.514818 PCI: 00:14.0 assign_resources, bus 0 link: 0
1319 18:44:41.521534 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1320 18:44:41.531032 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1321 18:44:41.537855 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1322 18:44:41.548055 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1323 18:44:41.551362 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 18:44:41.554442 PCI: 00:15.0 assign_resources, bus 1 link: 0
1325 18:44:41.564455 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1326 18:44:41.567653 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 18:44:41.574461 PCI: 00:15.1 assign_resources, bus 2 link: 0
1328 18:44:41.580837 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1329 18:44:41.590745 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1330 18:44:41.598051 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1331 18:44:41.604285 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1332 18:44:41.614983 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1333 18:44:41.621146 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1334 18:44:41.627377 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1335 18:44:41.637433 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1336 18:44:41.640375 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 18:44:41.647029 PCI: 00:19.0 assign_resources, bus 3 link: 0
1338 18:44:41.654439 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1339 18:44:41.663777 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1340 18:44:41.670106 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1341 18:44:41.676696 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1342 18:44:41.683278 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1343 18:44:41.689574 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1344 18:44:41.696772 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1345 18:44:41.706789 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1346 18:44:41.709530 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 18:44:41.716421 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1348 18:44:41.722935 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1349 18:44:41.729666 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 18:44:41.733111 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1351 18:44:41.736597 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 18:44:41.743232 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1353 18:44:41.746313 LPC: Trying to open IO window from 800 size 1ff
1354 18:44:41.756277 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1355 18:44:41.762747 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1356 18:44:41.772612 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1357 18:44:41.779214 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1358 18:44:41.785824 DOMAIN: 0000 assign_resources, bus 0 link: 0
1359 18:44:41.789039 Root Device assign_resources, bus 0 link: 0
1360 18:44:41.792714 Done setting resources.
1361 18:44:41.799213 Show resources in subtree (Root Device)...After assigning values.
1362 18:44:41.802729 Root Device child on link 0 CPU_CLUSTER: 0
1363 18:44:41.805830 CPU_CLUSTER: 0 child on link 0 APIC: 00
1364 18:44:41.809207 APIC: 00
1365 18:44:41.809313 APIC: 02
1366 18:44:41.812180 APIC: 07
1367 18:44:41.812266 APIC: 01
1368 18:44:41.812348 APIC: 03
1369 18:44:41.815692 APIC: 06
1370 18:44:41.815792 APIC: 04
1371 18:44:41.815876 APIC: 05
1372 18:44:41.822369 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1373 18:44:41.832411 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1374 18:44:41.842002 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1375 18:44:41.845565 PCI: 00:00.0
1376 18:44:41.852051 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1377 18:44:41.862086 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1378 18:44:41.871916 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1379 18:44:41.881789 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1380 18:44:41.891566 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1381 18:44:41.901513 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1382 18:44:41.907965 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1383 18:44:41.917888 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1384 18:44:41.928143 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1385 18:44:41.937656 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1386 18:44:41.947580 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1387 18:44:41.957424 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1388 18:44:41.967296 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1389 18:44:41.977507 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1390 18:44:41.983766 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1391 18:44:41.993662 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1392 18:44:41.997190 PCI: 00:02.0
1393 18:44:42.007088 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1394 18:44:42.017226 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1395 18:44:42.026824 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1396 18:44:42.026931 PCI: 00:04.0
1397 18:44:42.029842 PCI: 00:08.0
1398 18:44:42.040178 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1399 18:44:42.040286 PCI: 00:12.0
1400 18:44:42.053244 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1401 18:44:42.056280 PCI: 00:14.0 child on link 0 USB0 port 0
1402 18:44:42.066269 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1403 18:44:42.069691 USB0 port 0 child on link 0 USB2 port 0
1404 18:44:42.073251 USB2 port 0
1405 18:44:42.073344 USB2 port 1
1406 18:44:42.076184 USB2 port 2
1407 18:44:42.076268 USB2 port 3
1408 18:44:42.079551 USB2 port 5
1409 18:44:42.079649 USB2 port 6
1410 18:44:42.083111 USB2 port 9
1411 18:44:42.086025 USB3 port 0
1412 18:44:42.086115 USB3 port 1
1413 18:44:42.089840 USB3 port 2
1414 18:44:42.089930 USB3 port 3
1415 18:44:42.092826 USB3 port 4
1416 18:44:42.092924 PCI: 00:14.2
1417 18:44:42.103228 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1418 18:44:42.112786 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1419 18:44:42.116047 PCI: 00:14.3
1420 18:44:42.126247 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1421 18:44:42.129078 PCI: 00:15.0 child on link 0 I2C: 01:15
1422 18:44:42.139039 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1423 18:44:42.142784 I2C: 01:15
1424 18:44:42.145644 PCI: 00:15.1 child on link 0 I2C: 02:5d
1425 18:44:42.155518 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1426 18:44:42.159089 I2C: 02:5d
1427 18:44:42.159178 GENERIC: 0.0
1428 18:44:42.162272 PCI: 00:16.0
1429 18:44:42.172142 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1430 18:44:42.172238 PCI: 00:17.0
1431 18:44:42.185256 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1432 18:44:42.195412 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1433 18:44:42.201738 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1434 18:44:42.211998 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1435 18:44:42.221556 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1436 18:44:42.231690 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1437 18:44:42.234697 PCI: 00:19.0 child on link 0 I2C: 03:1a
1438 18:44:42.244930 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1439 18:44:42.248272 I2C: 03:1a
1440 18:44:42.248383 I2C: 03:38
1441 18:44:42.251368 I2C: 03:39
1442 18:44:42.251466 I2C: 03:3a
1443 18:44:42.255075 I2C: 03:3b
1444 18:44:42.257849 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1445 18:44:42.267949 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1446 18:44:42.277897 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1447 18:44:42.287848 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1448 18:44:42.291054 PCI: 01:00.0
1449 18:44:42.300991 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1450 18:44:42.301091 PCI: 00:1e.0
1451 18:44:42.314394 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1452 18:44:42.324185 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1453 18:44:42.327241 PCI: 00:1e.2 child on link 0 SPI: 00
1454 18:44:42.337394 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1455 18:44:42.337495 SPI: 00
1456 18:44:42.343597 PCI: 00:1e.3 child on link 0 SPI: 01
1457 18:44:42.353805 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1458 18:44:42.353906 SPI: 01
1459 18:44:42.357402 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1460 18:44:42.366985 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1461 18:44:42.376745 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1462 18:44:42.376846 PNP: 0c09.0
1463 18:44:42.386614 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1464 18:44:42.386714 PCI: 00:1f.3
1465 18:44:42.399969 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1466 18:44:42.409724 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1467 18:44:42.409825 PCI: 00:1f.4
1468 18:44:42.419917 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1469 18:44:42.429569 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1470 18:44:42.433191 PCI: 00:1f.5
1471 18:44:42.443001 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1472 18:44:42.445974 Done allocating resources.
1473 18:44:42.449913 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1474 18:44:42.453653 Enabling resources...
1475 18:44:42.456449 PCI: 00:00.0 subsystem <- 8086/9b61
1476 18:44:42.459691 PCI: 00:00.0 cmd <- 06
1477 18:44:42.463064 PCI: 00:02.0 subsystem <- 8086/9b41
1478 18:44:42.466112 PCI: 00:02.0 cmd <- 03
1479 18:44:42.469705 PCI: 00:08.0 cmd <- 06
1480 18:44:42.472791 PCI: 00:12.0 subsystem <- 8086/02f9
1481 18:44:42.476231 PCI: 00:12.0 cmd <- 02
1482 18:44:42.479750 PCI: 00:14.0 subsystem <- 8086/02ed
1483 18:44:42.482663 PCI: 00:14.0 cmd <- 02
1484 18:44:42.482762 PCI: 00:14.2 cmd <- 02
1485 18:44:42.489473 PCI: 00:14.3 subsystem <- 8086/02f0
1486 18:44:42.489571 PCI: 00:14.3 cmd <- 02
1487 18:44:42.492386 PCI: 00:15.0 subsystem <- 8086/02e8
1488 18:44:42.496181 PCI: 00:15.0 cmd <- 02
1489 18:44:42.499353 PCI: 00:15.1 subsystem <- 8086/02e9
1490 18:44:42.502498 PCI: 00:15.1 cmd <- 02
1491 18:44:42.505806 PCI: 00:16.0 subsystem <- 8086/02e0
1492 18:44:42.509100 PCI: 00:16.0 cmd <- 02
1493 18:44:42.512362 PCI: 00:17.0 subsystem <- 8086/02d3
1494 18:44:42.515564 PCI: 00:17.0 cmd <- 03
1495 18:44:42.519047 PCI: 00:19.0 subsystem <- 8086/02c5
1496 18:44:42.522208 PCI: 00:19.0 cmd <- 02
1497 18:44:42.525741 PCI: 00:1d.0 bridge ctrl <- 0013
1498 18:44:42.529158 PCI: 00:1d.0 subsystem <- 8086/02b0
1499 18:44:42.531974 PCI: 00:1d.0 cmd <- 06
1500 18:44:42.535113 PCI: 00:1e.0 subsystem <- 8086/02a8
1501 18:44:42.538801 PCI: 00:1e.0 cmd <- 06
1502 18:44:42.542041 PCI: 00:1e.2 subsystem <- 8086/02aa
1503 18:44:42.542140 PCI: 00:1e.2 cmd <- 06
1504 18:44:42.548772 PCI: 00:1e.3 subsystem <- 8086/02ab
1505 18:44:42.548872 PCI: 00:1e.3 cmd <- 02
1506 18:44:42.552497 PCI: 00:1f.0 subsystem <- 8086/0284
1507 18:44:42.555357 PCI: 00:1f.0 cmd <- 407
1508 18:44:42.558891 PCI: 00:1f.3 subsystem <- 8086/02c8
1509 18:44:42.561833 PCI: 00:1f.3 cmd <- 02
1510 18:44:42.565499 PCI: 00:1f.4 subsystem <- 8086/02a3
1511 18:44:42.568694 PCI: 00:1f.4 cmd <- 03
1512 18:44:42.572369 PCI: 00:1f.5 subsystem <- 8086/02a4
1513 18:44:42.575334 PCI: 00:1f.5 cmd <- 406
1514 18:44:42.584083 PCI: 01:00.0 cmd <- 02
1515 18:44:42.589343 done.
1516 18:44:42.598199 ME: Version: 14.0.39.1367
1517 18:44:42.604514 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1518 18:44:42.608047 Initializing devices...
1519 18:44:42.608146 Root Device init ...
1520 18:44:42.614105 Chrome EC: Set SMI mask to 0x0000000000000000
1521 18:44:42.617443 Chrome EC: clear events_b mask to 0x0000000000000000
1522 18:44:42.624177 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1523 18:44:42.631278 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1524 18:44:42.637316 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1525 18:44:42.640965 Chrome EC: Set WAKE mask to 0x0000000000000000
1526 18:44:42.643617 Root Device init finished in 35194 usecs
1527 18:44:42.647562 CPU_CLUSTER: 0 init ...
1528 18:44:42.653811 CPU_CLUSTER: 0 init finished in 2447 usecs
1529 18:44:42.658267 PCI: 00:00.0 init ...
1530 18:44:42.661866 CPU TDP: 15 Watts
1531 18:44:42.665090 CPU PL2 = 64 Watts
1532 18:44:42.668437 PCI: 00:00.0 init finished in 7072 usecs
1533 18:44:42.671377 PCI: 00:02.0 init ...
1534 18:44:42.675074 PCI: 00:02.0 init finished in 2252 usecs
1535 18:44:42.677888 PCI: 00:08.0 init ...
1536 18:44:42.681550 PCI: 00:08.0 init finished in 2251 usecs
1537 18:44:42.684437 PCI: 00:12.0 init ...
1538 18:44:42.687906 PCI: 00:12.0 init finished in 2251 usecs
1539 18:44:42.691521 PCI: 00:14.0 init ...
1540 18:44:42.694638 PCI: 00:14.0 init finished in 2252 usecs
1541 18:44:42.697948 PCI: 00:14.2 init ...
1542 18:44:42.701188 PCI: 00:14.2 init finished in 2243 usecs
1543 18:44:42.704688 PCI: 00:14.3 init ...
1544 18:44:42.708063 PCI: 00:14.3 init finished in 2270 usecs
1545 18:44:42.711262 PCI: 00:15.0 init ...
1546 18:44:42.714743 DW I2C bus 0 at 0xd121f000 (400 KHz)
1547 18:44:42.717721 PCI: 00:15.0 init finished in 5975 usecs
1548 18:44:42.721284 PCI: 00:15.1 init ...
1549 18:44:42.724344 DW I2C bus 1 at 0xd1220000 (400 KHz)
1550 18:44:42.730990 PCI: 00:15.1 init finished in 5976 usecs
1551 18:44:42.731093 PCI: 00:16.0 init ...
1552 18:44:42.737423 PCI: 00:16.0 init finished in 2251 usecs
1553 18:44:42.740733 PCI: 00:19.0 init ...
1554 18:44:42.744527 DW I2C bus 4 at 0xd1222000 (400 KHz)
1555 18:44:42.747593 PCI: 00:19.0 init finished in 5976 usecs
1556 18:44:42.750989 PCI: 00:1d.0 init ...
1557 18:44:42.754201 Initializing PCH PCIe bridge.
1558 18:44:42.757874 PCI: 00:1d.0 init finished in 5282 usecs
1559 18:44:42.761048 PCI: 00:1f.0 init ...
1560 18:44:42.764108 IOAPIC: Initializing IOAPIC at 0xfec00000
1561 18:44:42.770620 IOAPIC: Bootstrap Processor Local APIC = 0x00
1562 18:44:42.770719 IOAPIC: ID = 0x02
1563 18:44:42.774340 IOAPIC: Dumping registers
1564 18:44:42.777198 reg 0x0000: 0x02000000
1565 18:44:42.780934 reg 0x0001: 0x00770020
1566 18:44:42.781033 reg 0x0002: 0x00000000
1567 18:44:42.787239 PCI: 00:1f.0 init finished in 23538 usecs
1568 18:44:42.790885 PCI: 00:1f.4 init ...
1569 18:44:42.793420 PCI: 00:1f.4 init finished in 2260 usecs
1570 18:44:42.804126 PCI: 01:00.0 init ...
1571 18:44:42.807655 PCI: 01:00.0 init finished in 2252 usecs
1572 18:44:42.811814 PNP: 0c09.0 init ...
1573 18:44:42.815366 Google Chrome EC uptime: 11.058 seconds
1574 18:44:42.821945 Google Chrome AP resets since EC boot: 0
1575 18:44:42.825545 Google Chrome most recent AP reset causes:
1576 18:44:42.832074 Google Chrome EC reset flags at last EC boot: reset-pin
1577 18:44:42.835601 PNP: 0c09.0 init finished in 20576 usecs
1578 18:44:42.838461 Devices initialized
1579 18:44:42.838558 Show all devs... After init.
1580 18:44:42.841859 Root Device: enabled 1
1581 18:44:42.845434 CPU_CLUSTER: 0: enabled 1
1582 18:44:42.848773 DOMAIN: 0000: enabled 1
1583 18:44:42.848871 APIC: 00: enabled 1
1584 18:44:42.851710 PCI: 00:00.0: enabled 1
1585 18:44:42.854960 PCI: 00:02.0: enabled 1
1586 18:44:42.858518 PCI: 00:04.0: enabled 0
1587 18:44:42.858617 PCI: 00:05.0: enabled 0
1588 18:44:42.862061 PCI: 00:12.0: enabled 1
1589 18:44:42.865099 PCI: 00:12.5: enabled 0
1590 18:44:42.868706 PCI: 00:12.6: enabled 0
1591 18:44:42.868805 PCI: 00:14.0: enabled 1
1592 18:44:42.871668 PCI: 00:14.1: enabled 0
1593 18:44:42.875065 PCI: 00:14.3: enabled 1
1594 18:44:42.875169 PCI: 00:14.5: enabled 0
1595 18:44:42.877937 PCI: 00:15.0: enabled 1
1596 18:44:42.881444 PCI: 00:15.1: enabled 1
1597 18:44:42.884593 PCI: 00:15.2: enabled 0
1598 18:44:42.884691 PCI: 00:15.3: enabled 0
1599 18:44:42.887969 PCI: 00:16.0: enabled 1
1600 18:44:42.891398 PCI: 00:16.1: enabled 0
1601 18:44:42.894442 PCI: 00:16.2: enabled 0
1602 18:44:42.894540 PCI: 00:16.3: enabled 0
1603 18:44:42.898023 PCI: 00:16.4: enabled 0
1604 18:44:42.901025 PCI: 00:16.5: enabled 0
1605 18:44:42.904590 PCI: 00:17.0: enabled 1
1606 18:44:42.904689 PCI: 00:19.0: enabled 1
1607 18:44:42.908304 PCI: 00:19.1: enabled 0
1608 18:44:42.910879 PCI: 00:19.2: enabled 0
1609 18:44:42.914261 PCI: 00:1a.0: enabled 0
1610 18:44:42.914360 PCI: 00:1c.0: enabled 0
1611 18:44:42.917698 PCI: 00:1c.1: enabled 0
1612 18:44:42.920761 PCI: 00:1c.2: enabled 0
1613 18:44:42.920859 PCI: 00:1c.3: enabled 0
1614 18:44:42.924142 PCI: 00:1c.4: enabled 0
1615 18:44:42.927751 PCI: 00:1c.5: enabled 0
1616 18:44:42.930647 PCI: 00:1c.6: enabled 0
1617 18:44:42.930745 PCI: 00:1c.7: enabled 0
1618 18:44:42.934051 PCI: 00:1d.0: enabled 1
1619 18:44:42.937392 PCI: 00:1d.1: enabled 0
1620 18:44:42.940991 PCI: 00:1d.2: enabled 0
1621 18:44:42.941089 PCI: 00:1d.3: enabled 0
1622 18:44:42.943861 PCI: 00:1d.4: enabled 0
1623 18:44:42.947581 PCI: 00:1d.5: enabled 0
1624 18:44:42.950849 PCI: 00:1e.0: enabled 1
1625 18:44:42.950947 PCI: 00:1e.1: enabled 0
1626 18:44:42.954037 PCI: 00:1e.2: enabled 1
1627 18:44:42.956921 PCI: 00:1e.3: enabled 1
1628 18:44:42.960360 PCI: 00:1f.0: enabled 1
1629 18:44:42.960459 PCI: 00:1f.1: enabled 0
1630 18:44:42.963730 PCI: 00:1f.2: enabled 0
1631 18:44:42.966884 PCI: 00:1f.3: enabled 1
1632 18:44:42.966981 PCI: 00:1f.4: enabled 1
1633 18:44:42.970329 PCI: 00:1f.5: enabled 1
1634 18:44:42.973545 PCI: 00:1f.6: enabled 0
1635 18:44:42.976908 USB0 port 0: enabled 1
1636 18:44:42.977007 I2C: 01:15: enabled 1
1637 18:44:42.980393 I2C: 02:5d: enabled 1
1638 18:44:42.983512 GENERIC: 0.0: enabled 1
1639 18:44:42.983609 I2C: 03:1a: enabled 1
1640 18:44:42.987032 I2C: 03:38: enabled 1
1641 18:44:42.990402 I2C: 03:39: enabled 1
1642 18:44:42.990507 I2C: 03:3a: enabled 1
1643 18:44:42.994111 I2C: 03:3b: enabled 1
1644 18:44:42.997098 PCI: 00:00.0: enabled 1
1645 18:44:42.997184 SPI: 00: enabled 1
1646 18:44:43.000244 SPI: 01: enabled 1
1647 18:44:43.003263 PNP: 0c09.0: enabled 1
1648 18:44:43.003347 USB2 port 0: enabled 1
1649 18:44:43.006766 USB2 port 1: enabled 1
1650 18:44:43.010185 USB2 port 2: enabled 0
1651 18:44:43.013681 USB2 port 3: enabled 0
1652 18:44:43.013766 USB2 port 5: enabled 0
1653 18:44:43.016537 USB2 port 6: enabled 1
1654 18:44:43.020018 USB2 port 9: enabled 1
1655 18:44:43.020108 USB3 port 0: enabled 1
1656 18:44:43.022961 USB3 port 1: enabled 1
1657 18:44:43.026516 USB3 port 2: enabled 1
1658 18:44:43.029485 USB3 port 3: enabled 1
1659 18:44:43.029572 USB3 port 4: enabled 0
1660 18:44:43.033110 APIC: 02: enabled 1
1661 18:44:43.033195 APIC: 07: enabled 1
1662 18:44:43.036765 APIC: 01: enabled 1
1663 18:44:43.039846 APIC: 03: enabled 1
1664 18:44:43.039931 APIC: 06: enabled 1
1665 18:44:43.043530 APIC: 04: enabled 1
1666 18:44:43.046300 APIC: 05: enabled 1
1667 18:44:43.046384 PCI: 00:08.0: enabled 1
1668 18:44:43.050080 PCI: 00:14.2: enabled 1
1669 18:44:43.052802 PCI: 01:00.0: enabled 1
1670 18:44:43.056380 Disabling ACPI via APMC:
1671 18:44:43.059693 done.
1672 18:44:43.063164 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1673 18:44:43.066777 ELOG: NV offset 0xaf0000 size 0x4000
1674 18:44:43.073135 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1675 18:44:43.079870 ELOG: Event(17) added with size 13 at 2023-02-25 18:44:42 UTC
1676 18:44:43.086783 ELOG: Event(92) added with size 9 at 2023-02-25 18:44:42 UTC
1677 18:44:43.093082 ELOG: Event(93) added with size 9 at 2023-02-25 18:44:42 UTC
1678 18:44:43.100417 ELOG: Event(9A) added with size 9 at 2023-02-25 18:44:42 UTC
1679 18:44:43.106761 ELOG: Event(9E) added with size 10 at 2023-02-25 18:44:42 UTC
1680 18:44:43.112860 ELOG: Event(9F) added with size 14 at 2023-02-25 18:44:42 UTC
1681 18:44:43.116497 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1682 18:44:43.123494 ELOG: Event(A1) added with size 10 at 2023-02-25 18:44:42 UTC
1683 18:44:43.133490 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1684 18:44:43.140169 ELOG: Event(A0) added with size 9 at 2023-02-25 18:44:42 UTC
1685 18:44:43.143231 elog_add_boot_reason: Logged dev mode boot
1686 18:44:43.146537 Finalize devices...
1687 18:44:43.146633 PCI: 00:17.0 final
1688 18:44:43.150056 Devices finalized
1689 18:44:43.153649 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1690 18:44:43.159885 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1691 18:44:43.163094 ME: HFSTS1 : 0x90000245
1692 18:44:43.166820 ME: HFSTS2 : 0x3B850126
1693 18:44:43.173251 ME: HFSTS3 : 0x00000020
1694 18:44:43.176415 ME: HFSTS4 : 0x00004800
1695 18:44:43.179828 ME: HFSTS5 : 0x00000000
1696 18:44:43.183521 ME: HFSTS6 : 0x40400006
1697 18:44:43.186498 ME: Manufacturing Mode : NO
1698 18:44:43.189691 ME: FW Partition Table : OK
1699 18:44:43.192743 ME: Bringup Loader Failure : NO
1700 18:44:43.196176 ME: Firmware Init Complete : YES
1701 18:44:43.199728 ME: Boot Options Present : NO
1702 18:44:43.203573 ME: Update In Progress : NO
1703 18:44:43.206289 ME: D0i3 Support : YES
1704 18:44:43.209932 ME: Low Power State Enabled : NO
1705 18:44:43.213125 ME: CPU Replaced : NO
1706 18:44:43.216018 ME: CPU Replacement Valid : YES
1707 18:44:43.219314 ME: Current Working State : 5
1708 18:44:43.222721 ME: Current Operation State : 1
1709 18:44:43.226298 ME: Current Operation Mode : 0
1710 18:44:43.229357 ME: Error Code : 0
1711 18:44:43.232784 ME: CPU Debug Disabled : YES
1712 18:44:43.235729 ME: TXT Support : NO
1713 18:44:43.242421 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1714 18:44:43.249338 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1715 18:44:43.249437 CBFS @ c08000 size 3f8000
1716 18:44:43.256302 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1717 18:44:43.259315 CBFS: Locating 'fallback/dsdt.aml'
1718 18:44:43.262230 CBFS: Found @ offset 10bb80 size 3fa5
1719 18:44:43.268827 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1720 18:44:43.272554 CBFS @ c08000 size 3f8000
1721 18:44:43.278648 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1722 18:44:43.278745 CBFS: Locating 'fallback/slic'
1723 18:44:43.284717 CBFS: 'fallback/slic' not found.
1724 18:44:43.291072 ACPI: Writing ACPI tables at 99b3e000.
1725 18:44:43.291177 ACPI: * FACS
1726 18:44:43.294544 ACPI: * DSDT
1727 18:44:43.297451 Ramoops buffer: 0x100000@0x99a3d000.
1728 18:44:43.300885 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1729 18:44:43.307276 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1730 18:44:43.311003 Google Chrome EC: version:
1731 18:44:43.314171 ro: helios_v2.0.2659-56403530b
1732 18:44:43.317879 rw: helios_v2.0.2849-c41de27e7d
1733 18:44:43.317978 running image: 1
1734 18:44:43.321562 ACPI: * FADT
1735 18:44:43.321660 SCI is IRQ9
1736 18:44:43.328588 ACPI: added table 1/32, length now 40
1737 18:44:43.328687 ACPI: * SSDT
1738 18:44:43.331447 Found 1 CPU(s) with 8 core(s) each.
1739 18:44:43.334874 Error: Could not locate 'wifi_sar' in VPD.
1740 18:44:43.341614 Checking CBFS for default SAR values
1741 18:44:43.344635 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1742 18:44:43.348190 CBFS @ c08000 size 3f8000
1743 18:44:43.354336 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1744 18:44:43.357692 CBFS: Locating 'wifi_sar_defaults.hex'
1745 18:44:43.361236 CBFS: Found @ offset 5fac0 size 77
1746 18:44:43.364912 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1747 18:44:43.371278 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1748 18:44:43.374641 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1749 18:44:43.381275 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1750 18:44:43.384305 failed to find key in VPD: dsm_calib_r0_0
1751 18:44:43.394735 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1752 18:44:43.397615 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1753 18:44:43.404467 failed to find key in VPD: dsm_calib_r0_1
1754 18:44:43.410858 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1755 18:44:43.417200 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1756 18:44:43.420840 failed to find key in VPD: dsm_calib_r0_2
1757 18:44:43.430774 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1758 18:44:43.433707 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1759 18:44:43.440567 failed to find key in VPD: dsm_calib_r0_3
1760 18:44:43.447282 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1761 18:44:43.453731 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1762 18:44:43.457209 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1763 18:44:43.463968 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1764 18:44:43.467078 EC returned error result code 1
1765 18:44:43.470593 EC returned error result code 1
1766 18:44:43.474567 EC returned error result code 1
1767 18:44:43.477596 PS2K: Bad resp from EC. Vivaldi disabled!
1768 18:44:43.484098 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1769 18:44:43.490703 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1770 18:44:43.494039 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1771 18:44:43.500739 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1772 18:44:43.503569 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1773 18:44:43.510486 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1774 18:44:43.517054 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1775 18:44:43.523519 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1776 18:44:43.526950 ACPI: added table 2/32, length now 44
1777 18:44:43.527049 ACPI: * MCFG
1778 18:44:43.533404 ACPI: added table 3/32, length now 48
1779 18:44:43.533503 ACPI: * TPM2
1780 18:44:43.536945 TPM2 log created at 99a2d000
1781 18:44:43.540018 ACPI: added table 4/32, length now 52
1782 18:44:43.543418 ACPI: * MADT
1783 18:44:43.543517 SCI is IRQ9
1784 18:44:43.547056 ACPI: added table 5/32, length now 56
1785 18:44:43.550298 current = 99b43ac0
1786 18:44:43.550396 ACPI: * DMAR
1787 18:44:43.553300 ACPI: added table 6/32, length now 60
1788 18:44:43.556284 ACPI: * IGD OpRegion
1789 18:44:43.559758 GMA: Found VBT in CBFS
1790 18:44:43.563337 GMA: Found valid VBT in CBFS
1791 18:44:43.566802 ACPI: added table 7/32, length now 64
1792 18:44:43.566893 ACPI: * HPET
1793 18:44:43.569720 ACPI: added table 8/32, length now 68
1794 18:44:43.573256 ACPI: done.
1795 18:44:43.577005 ACPI tables: 31744 bytes.
1796 18:44:43.580029 smbios_write_tables: 99a2c000
1797 18:44:43.583099 EC returned error result code 3
1798 18:44:43.586453 Couldn't obtain OEM name from CBI
1799 18:44:43.589645 Create SMBIOS type 17
1800 18:44:43.592786 PCI: 00:00.0 (Intel Cannonlake)
1801 18:44:43.592875 PCI: 00:14.3 (Intel WiFi)
1802 18:44:43.596375 SMBIOS tables: 939 bytes.
1803 18:44:43.599264 Writing table forward entry at 0x00000500
1804 18:44:43.606160 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1805 18:44:43.609647 Writing coreboot table at 0x99b62000
1806 18:44:43.615837 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1807 18:44:43.619393 1. 0000000000001000-000000000009ffff: RAM
1808 18:44:43.626187 2. 00000000000a0000-00000000000fffff: RESERVED
1809 18:44:43.629144 3. 0000000000100000-0000000099a2bfff: RAM
1810 18:44:43.636326 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1811 18:44:43.639382 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1812 18:44:43.645861 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1813 18:44:43.652437 7. 000000009a000000-000000009f7fffff: RESERVED
1814 18:44:43.656358 8. 00000000e0000000-00000000efffffff: RESERVED
1815 18:44:43.662080 9. 00000000fc000000-00000000fc000fff: RESERVED
1816 18:44:43.665587 10. 00000000fe000000-00000000fe00ffff: RESERVED
1817 18:44:43.668964 11. 00000000fed10000-00000000fed17fff: RESERVED
1818 18:44:43.675474 12. 00000000fed80000-00000000fed83fff: RESERVED
1819 18:44:43.679099 13. 00000000fed90000-00000000fed91fff: RESERVED
1820 18:44:43.685685 14. 00000000feda0000-00000000feda1fff: RESERVED
1821 18:44:43.688671 15. 0000000100000000-000000045e7fffff: RAM
1822 18:44:43.692102 Graphics framebuffer located at 0xc0000000
1823 18:44:43.695096 Passing 5 GPIOs to payload:
1824 18:44:43.701656 NAME | PORT | POLARITY | VALUE
1825 18:44:43.705134 write protect | undefined | high | low
1826 18:44:43.712123 lid | undefined | high | high
1827 18:44:43.718651 power | undefined | high | low
1828 18:44:43.721601 oprom | undefined | high | low
1829 18:44:43.728906 EC in RW | 0x000000cb | high | low
1830 18:44:43.728993 Board ID: 4
1831 18:44:43.735360 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1832 18:44:43.735451 CBFS @ c08000 size 3f8000
1833 18:44:43.741385 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1834 18:44:43.748219 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1835 18:44:43.751200 coreboot table: 1492 bytes.
1836 18:44:43.754961 IMD ROOT 0. 99fff000 00001000
1837 18:44:43.757981 IMD SMALL 1. 99ffe000 00001000
1838 18:44:43.761624 FSP MEMORY 2. 99c4e000 003b0000
1839 18:44:43.764579 CONSOLE 3. 99c2e000 00020000
1840 18:44:43.767964 FMAP 4. 99c2d000 0000054e
1841 18:44:43.771537 TIME STAMP 5. 99c2c000 00000910
1842 18:44:43.774595 VBOOT WORK 6. 99c18000 00014000
1843 18:44:43.778274 MRC DATA 7. 99c16000 00001958
1844 18:44:43.781541 ROMSTG STCK 8. 99c15000 00001000
1845 18:44:43.784566 AFTER CAR 9. 99c0b000 0000a000
1846 18:44:43.787798 RAMSTAGE 10. 99baf000 0005c000
1847 18:44:43.791503 REFCODE 11. 99b7a000 00035000
1848 18:44:43.794561 SMM BACKUP 12. 99b6a000 00010000
1849 18:44:43.798267 COREBOOT 13. 99b62000 00008000
1850 18:44:43.801523 ACPI 14. 99b3e000 00024000
1851 18:44:43.804485 ACPI GNVS 15. 99b3d000 00001000
1852 18:44:43.808098 RAMOOPS 16. 99a3d000 00100000
1853 18:44:43.811037 TPM2 TCGLOG17. 99a2d000 00010000
1854 18:44:43.814510 SMBIOS 18. 99a2c000 00000800
1855 18:44:43.817629 IMD small region:
1856 18:44:43.821312 IMD ROOT 0. 99ffec00 00000400
1857 18:44:43.824442 FSP RUNTIME 1. 99ffebe0 00000004
1858 18:44:43.827828 EC HOSTEVENT 2. 99ffebc0 00000008
1859 18:44:43.830730 POWER STATE 3. 99ffeb80 00000040
1860 18:44:43.834130 ROMSTAGE 4. 99ffeb60 00000004
1861 18:44:43.837849 MEM INFO 5. 99ffe9a0 000001b9
1862 18:44:43.841001 VPD 6. 99ffe920 0000006c
1863 18:44:43.844417 MTRR: Physical address space:
1864 18:44:43.850870 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1865 18:44:43.857386 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1866 18:44:43.864120 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1867 18:44:43.870421 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1868 18:44:43.873903 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1869 18:44:43.880993 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1870 18:44:43.887223 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1871 18:44:43.890405 MTRR: Fixed MSR 0x250 0x0606060606060606
1872 18:44:43.897186 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 18:44:43.900473 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 18:44:43.903529 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 18:44:43.906819 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 18:44:43.913337 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 18:44:43.916732 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 18:44:43.920053 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 18:44:43.923560 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 18:44:43.929838 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 18:44:43.933296 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 18:44:43.936829 call enable_fixed_mtrr()
1883 18:44:43.939952 CPU physical address size: 39 bits
1884 18:44:43.943267 MTRR: default type WB/UC MTRR counts: 6/8.
1885 18:44:43.946900 MTRR: WB selected as default type.
1886 18:44:43.953060 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1887 18:44:43.959737 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1888 18:44:43.966268 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1889 18:44:43.973353 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1890 18:44:43.979388 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1891 18:44:43.986150 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1892 18:44:43.989702 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 18:44:43.993102 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 18:44:43.999824 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 18:44:44.002854 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 18:44:44.006010 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 18:44:44.009288 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 18:44:44.012877 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 18:44:44.019094 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 18:44:44.022529 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 18:44:44.026057 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 18:44:44.029196 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 18:44:44.029282
1904 18:44:44.032497 MTRR check
1905 18:44:44.035948 Fixed MTRRs : Enabled
1906 18:44:44.036032 Variable MTRRs: Enabled
1907 18:44:44.038854
1908 18:44:44.038936 call enable_fixed_mtrr()
1909 18:44:44.046095 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1910 18:44:44.048972 CPU physical address size: 39 bits
1911 18:44:44.055512 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1912 18:44:44.059020 MTRR: Fixed MSR 0x250 0x0606060606060606
1913 18:44:44.062031 MTRR: Fixed MSR 0x258 0x0606060606060606
1914 18:44:44.065848 MTRR: Fixed MSR 0x259 0x0000000000000000
1915 18:44:44.072242 MTRR: Fixed MSR 0x268 0x0606060606060606
1916 18:44:44.075214 MTRR: Fixed MSR 0x269 0x0606060606060606
1917 18:44:44.078793 MTRR: Fixed MSR 0x26a 0x0606060606060606
1918 18:44:44.081914 MTRR: Fixed MSR 0x26b 0x0606060606060606
1919 18:44:44.088577 MTRR: Fixed MSR 0x26c 0x0606060606060606
1920 18:44:44.091860 MTRR: Fixed MSR 0x26d 0x0606060606060606
1921 18:44:44.095328 MTRR: Fixed MSR 0x26e 0x0606060606060606
1922 18:44:44.098203 MTRR: Fixed MSR 0x26f 0x0606060606060606
1923 18:44:44.104845 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 18:44:44.104933 call enable_fixed_mtrr()
1925 18:44:44.111658 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 18:44:44.115220 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 18:44:44.118418 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 18:44:44.121312 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 18:44:44.128342 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 18:44:44.131729 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 18:44:44.134674 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 18:44:44.138089 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 18:44:44.141343 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 18:44:44.147894 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 18:44:44.151271 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 18:44:44.154802 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 18:44:44.157678 call enable_fixed_mtrr()
1938 18:44:44.161459 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 18:44:44.168350 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 18:44:44.170947 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 18:44:44.174605 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 18:44:44.177643 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 18:44:44.180933 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 18:44:44.187447 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 18:44:44.191199 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 18:44:44.194310 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 18:44:44.197598 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 18:44:44.204239 CPU physical address size: 39 bits
1949 18:44:44.204329 call enable_fixed_mtrr()
1950 18:44:44.211017 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 18:44:44.214240 CPU physical address size: 39 bits
1952 18:44:44.217556 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 18:44:44.220439 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 18:44:44.227400 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 18:44:44.230606 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 18:44:44.233957 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 18:44:44.237250 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 18:44:44.243775 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 18:44:44.247256 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 18:44:44.250314 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 18:44:44.253773 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 18:44:44.256731 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 18:44:44.264028 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 18:44:44.266916 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 18:44:44.270350 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 18:44:44.273585 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 18:44:44.279901 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 18:44:44.283342 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 18:44:44.286943 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 18:44:44.289889 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 18:44:44.296953 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 18:44:44.300001 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 18:44:44.303015 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 18:44:44.306622 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 18:44:44.313549 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 18:44:44.316251 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 18:44:44.319790 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 18:44:44.323245 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 18:44:44.329728 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 18:44:44.332770 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 18:44:44.336287 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 18:44:44.339583 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 18:44:44.342994 call enable_fixed_mtrr()
1984 18:44:44.346360 call enable_fixed_mtrr()
1985 18:44:44.349537 CPU physical address size: 39 bits
1986 18:44:44.353234 CBFS @ c08000 size 3f8000
1987 18:44:44.356212 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1988 18:44:44.359612 CPU physical address size: 39 bits
1989 18:44:44.366038 CPU physical address size: 39 bits
1990 18:44:44.366141 call enable_fixed_mtrr()
1991 18:44:44.369735 CBFS: Locating 'fallback/payload'
1992 18:44:44.372772 CPU physical address size: 39 bits
1993 18:44:44.379359 CBFS: Found @ offset 1c96c0 size 3f798
1994 18:44:44.382855 Checking segment from ROM address 0xffdd16f8
1995 18:44:44.385752 Checking segment from ROM address 0xffdd1714
1996 18:44:44.392802 Loading segment from ROM address 0xffdd16f8
1997 18:44:44.392901 code (compression=0)
1998 18:44:44.402197 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1999 18:44:44.412496 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2000 18:44:44.412594 it's not compressed!
2001 18:44:44.505372 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2002 18:44:44.511897 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2003 18:44:44.514730 Loading segment from ROM address 0xffdd1714
2004 18:44:44.518312 Entry Point 0x30000000
2005 18:44:44.521836 Loaded segments
2006 18:44:44.527546 Finalizing chipset.
2007 18:44:44.530910 Finalizing SMM.
2008 18:44:44.533961 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2009 18:44:44.536982 mp_park_aps done after 0 msecs.
2010 18:44:44.543913 Jumping to boot code at 30000000(99b62000)
2011 18:44:44.550835 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2012 18:44:44.550971
2013 18:44:44.551055
2014 18:44:44.551138
2015 18:44:44.553582 Starting depthcharge on Helios...
2016 18:44:44.553677
2017 18:44:44.554040 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
2018 18:44:44.554154 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2019 18:44:44.554248 Setting prompt string to ['hatch:']
2020 18:44:44.554337 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2021 18:44:44.563219 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2022 18:44:44.563318
2023 18:44:44.570267 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2024 18:44:44.570367
2025 18:44:44.576684 board_setup: Info: eMMC controller not present; skipping
2026 18:44:44.576781
2027 18:44:44.580106 New NVMe Controller 0x30053ac0 @ 00:1d:00
2028 18:44:44.580204
2029 18:44:44.586780 board_setup: Info: SDHCI controller not present; skipping
2030 18:44:44.586907
2031 18:44:44.593197 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2032 18:44:44.593294
2033 18:44:44.593369 Wipe memory regions:
2034 18:44:44.593441
2035 18:44:44.596786 [0x00000000001000, 0x000000000a0000)
2036 18:44:44.596883
2037 18:44:44.599589 [0x00000000100000, 0x00000030000000)
2038 18:44:44.666491
2039 18:44:44.669534 [0x00000030657430, 0x00000099a2c000)
2040 18:44:44.816240
2041 18:44:44.819098 [0x00000100000000, 0x0000045e800000)
2042 18:44:46.275627
2043 18:44:46.275799 R8152: Initializing
2044 18:44:46.275879
2045 18:44:46.278711 Version 9 (ocp_data = 6010)
2046 18:44:46.282916
2047 18:44:46.283014 R8152: Done initializing
2048 18:44:46.283097
2049 18:44:46.286260 Adding net device
2050 18:44:46.769124
2051 18:44:46.769283 R8152: Initializing
2052 18:44:46.769363
2053 18:44:46.772213 Version 6 (ocp_data = 5c30)
2054 18:44:46.772311
2055 18:44:46.775858 R8152: Done initializing
2056 18:44:46.775955
2057 18:44:46.782130 net_add_device: Attemp to include the same device
2058 18:44:46.782229
2059 18:44:46.789380 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2060 18:44:46.789479
2061 18:44:46.789555
2062 18:44:46.789625
2063 18:44:46.789914 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2065 18:44:46.890725 hatch: tftpboot 192.168.201.1 9334750/tftp-deploy-1094_7gi/kernel/bzImage 9334750/tftp-deploy-1094_7gi/kernel/cmdline 9334750/tftp-deploy-1094_7gi/ramdisk/ramdisk.cpio.gz
2066 18:44:46.890912 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2067 18:44:46.891006 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2068 18:44:46.895429 tftpboot 192.168.201.1 9334750/tftp-deploy-1094_7gi/kernel/bzImoy-1094_7gi/kernel/cmdline 9334750/tftp-deploy-1094_7gi/ramdisk/ramdisk.cpio.gz
2069 18:44:46.895532
2070 18:44:46.895608 Waiting for link
2071 18:44:47.096356
2072 18:44:47.096530 done.
2073 18:44:47.096610
2074 18:44:47.096683 MAC: 00:24:32:50:1a:59
2075 18:44:47.096754
2076 18:44:47.099382 Sending DHCP discover... done.
2077 18:44:47.099483
2078 18:44:47.103566 Waiting for reply... done.
2079 18:44:47.103670
2080 18:44:47.105821 Sending DHCP request... done.
2081 18:44:47.105909
2082 18:44:47.109449 Waiting for reply... done.
2083 18:44:47.109532
2084 18:44:47.112816 My ip is 192.168.201.14
2085 18:44:47.112899
2086 18:44:47.116048 The DHCP server ip is 192.168.201.1
2087 18:44:47.116129
2088 18:44:47.119452 TFTP server IP predefined by user: 192.168.201.1
2089 18:44:47.119539
2090 18:44:47.126237 Bootfile predefined by user: 9334750/tftp-deploy-1094_7gi/kernel/bzImage
2091 18:44:47.126328
2092 18:44:47.128915 Sending tftp read request... done.
2093 18:44:47.128999
2094 18:44:47.135619 Waiting for the transfer...
2095 18:44:47.135706
2096 18:44:47.664223 00000000 ################################################################
2097 18:44:47.664390
2098 18:44:48.183128 00080000 ################################################################
2099 18:44:48.183280
2100 18:44:48.718768 00100000 ################################################################
2101 18:44:48.718930
2102 18:44:49.259058 00180000 ################################################################
2103 18:44:49.259230
2104 18:44:49.812064 00200000 ################################################################
2105 18:44:49.812238
2106 18:44:50.362517 00280000 ################################################################
2107 18:44:50.362683
2108 18:44:50.904535 00300000 ################################################################
2109 18:44:50.904691
2110 18:44:51.449404 00380000 ################################################################
2111 18:44:51.449576
2112 18:44:52.064179 00400000 ################################################################
2113 18:44:52.064669
2114 18:44:52.758654 00480000 ################################################################
2115 18:44:52.759228
2116 18:44:53.448031 00500000 ################################################################
2117 18:44:53.448579
2118 18:44:54.159680 00580000 ################################################################
2119 18:44:54.160209
2120 18:44:54.846945 00600000 ################################################################
2121 18:44:54.847579
2122 18:44:55.560475 00680000 ################################################################
2123 18:44:55.561027
2124 18:44:56.277417 00700000 ################################################################
2125 18:44:56.277986
2126 18:44:56.978517 00780000 ################################################################
2127 18:44:56.978686
2128 18:44:57.641559 00800000 ################################################################
2129 18:44:57.642104
2130 18:44:58.336825 00880000 ################################################################
2131 18:44:58.337391
2132 18:44:58.699138 00900000 ################################## done.
2133 18:44:58.699677
2134 18:44:58.702537 The bootfile was 9711616 bytes long.
2135 18:44:58.702984
2136 18:44:58.705503 Sending tftp read request... done.
2137 18:44:58.705990
2138 18:44:58.709035 Waiting for the transfer...
2139 18:44:58.709479
2140 18:44:59.374904 00000000 ################################################################
2141 18:44:59.375124
2142 18:45:00.034398 00080000 ################################################################
2143 18:45:00.034962
2144 18:45:00.711132 00100000 ################################################################
2145 18:45:00.711668
2146 18:45:01.380187 00180000 ################################################################
2147 18:45:01.380733
2148 18:45:02.053154 00200000 ################################################################
2149 18:45:02.053702
2150 18:45:02.723015 00280000 ################################################################
2151 18:45:02.723594
2152 18:45:03.414487 00300000 ################################################################
2153 18:45:03.415038
2154 18:45:04.107036 00380000 ################################################################
2155 18:45:04.107593
2156 18:45:04.770356 00400000 ################################################################
2157 18:45:04.770875
2158 18:45:05.466835 00480000 ################################################################
2159 18:45:05.467418
2160 18:45:05.829843 00500000 ################################## done.
2161 18:45:05.830363
2162 18:45:05.833021 Sending tftp read request... done.
2163 18:45:05.833434
2164 18:45:05.836563 Waiting for the transfer...
2165 18:45:05.837031
2166 18:45:05.837523 00000000 # done.
2167 18:45:05.837949
2168 18:45:05.846370 Command line loaded dynamically from TFTP file: 9334750/tftp-deploy-1094_7gi/kernel/cmdline
2169 18:45:05.846861
2170 18:45:05.869824 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9334750/extract-nfsrootfs-iofts441,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2171 18:45:05.870320
2172 18:45:05.876089 ec_init(0): CrosEC protocol v3 supported (256, 256)
2173 18:45:05.879750
2174 18:45:05.882772 Shutting down all USB controllers.
2175 18:45:05.883277
2176 18:45:05.883792 Removing current net device
2177 18:45:05.886703
2178 18:45:05.887181 Finalizing coreboot
2179 18:45:05.887544
2180 18:45:05.893375 Exiting depthcharge with code 4 at timestamp: 28676079
2181 18:45:05.893996
2182 18:45:05.894355
2183 18:45:05.894734 Starting kernel ...
2184 18:45:05.895060
2185 18:45:05.896481 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2186 18:45:05.897047 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2187 18:45:05.897439 Setting prompt string to ['Linux version [0-9]']
2188 18:45:05.897803 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 18:45:05.898189 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2190 18:45:05.899064
2192 18:49:23.898043 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2194 18:49:23.899491 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2196 18:49:23.900399 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2199 18:49:23.901950 end: 2 depthcharge-action (duration 00:05:00) [common]
2201 18:49:23.903236 Cleaning after the job
2202 18:49:23.903722 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/ramdisk
2203 18:49:23.905997 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/kernel
2204 18:49:23.909054 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/nfsrootfs
2205 18:49:23.975881 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334750/tftp-deploy-1094_7gi/modules
2206 18:49:23.976215 start: 4.1 power-off (timeout 00:00:30) [common]
2207 18:49:23.976394 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2208 18:49:26.162978 >> Command sent successfully.
2209 18:49:26.168004 Returned 0 in 2 seconds
2210 18:49:26.269186 end: 4.1 power-off (duration 00:00:02) [common]
2212 18:49:26.270754 start: 4.2 read-feedback (timeout 00:09:58) [common]
2213 18:49:26.271935 Listened to connection for namespace 'common' for up to 1s
2215 18:49:26.273310 Listened to connection for namespace 'common' for up to 1s
2216 18:49:27.275396 Finalising connection for namespace 'common'
2217 18:49:27.276125 Disconnecting from shell: Finalise
2218 18:49:27.276580
2219 18:49:27.378115 end: 4.2 read-feedback (duration 00:00:01) [common]
2220 18:49:27.378804 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9334750
2221 18:49:27.596435 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9334750
2222 18:49:27.596670 JobError: Your job cannot terminate cleanly.