Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 18:37:38.062153 lava-dispatcher, installed at version: 2022.11
2 18:37:38.062349 start: 0 validate
3 18:37:38.062493 Start time: 2023-02-25 18:37:38.062488+00:00 (UTC)
4 18:37:38.062668 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:37:38.062824 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230217.0%2Famd64%2Finitrd.cpio.gz exists
6 18:37:38.358975 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:37:38.359213 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:37:38.651454 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:37:38.652157 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230217.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:37:38.951118 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:37:38.951869 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 18:37:39.253814 validate duration: 1.19
14 18:37:39.255230 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:37:39.255843 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:37:39.256356 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:37:39.256854 Not decompressing ramdisk as can be used compressed.
18 18:37:39.257775 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230217.0/amd64/initrd.cpio.gz
19 18:37:39.258223 saving as /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/ramdisk/initrd.cpio.gz
20 18:37:39.258596 total size: 5432126 (5MB)
21 18:37:39.263762 progress 0% (0MB)
22 18:37:39.272103 progress 5% (0MB)
23 18:37:39.278169 progress 10% (0MB)
24 18:37:39.282544 progress 15% (0MB)
25 18:37:39.286414 progress 20% (1MB)
26 18:37:39.289372 progress 25% (1MB)
27 18:37:39.291860 progress 30% (1MB)
28 18:37:39.294618 progress 35% (1MB)
29 18:37:39.296783 progress 40% (2MB)
30 18:37:39.298921 progress 45% (2MB)
31 18:37:39.300833 progress 50% (2MB)
32 18:37:39.302944 progress 55% (2MB)
33 18:37:39.304744 progress 60% (3MB)
34 18:37:39.306417 progress 65% (3MB)
35 18:37:39.308251 progress 70% (3MB)
36 18:37:39.309938 progress 75% (3MB)
37 18:37:39.311425 progress 80% (4MB)
38 18:37:39.312897 progress 85% (4MB)
39 18:37:39.314540 progress 90% (4MB)
40 18:37:39.315878 progress 95% (4MB)
41 18:37:39.317238 progress 100% (5MB)
42 18:37:39.317504 5MB downloaded in 0.06s (87.93MB/s)
43 18:37:39.317668 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:37:39.317924 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:37:39.318018 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:37:39.318115 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:37:39.318225 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 18:37:39.318298 saving as /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/kernel/bzImage
50 18:37:39.318364 total size: 9711616 (9MB)
51 18:37:39.318427 No compression specified
52 18:37:41.322000 progress 0% (0MB)
53 18:37:41.324653 progress 5% (0MB)
54 18:37:41.327253 progress 10% (0MB)
55 18:37:41.329677 progress 15% (1MB)
56 18:37:41.332131 progress 20% (1MB)
57 18:37:41.334577 progress 25% (2MB)
58 18:37:41.336833 progress 30% (2MB)
59 18:37:41.339414 progress 35% (3MB)
60 18:37:41.342116 progress 40% (3MB)
61 18:37:41.344659 progress 45% (4MB)
62 18:37:41.347178 progress 50% (4MB)
63 18:37:41.349565 progress 55% (5MB)
64 18:37:41.351835 progress 60% (5MB)
65 18:37:41.354235 progress 65% (6MB)
66 18:37:41.356577 progress 70% (6MB)
67 18:37:41.359016 progress 75% (6MB)
68 18:37:41.361383 progress 80% (7MB)
69 18:37:41.363641 progress 85% (7MB)
70 18:37:41.366032 progress 90% (8MB)
71 18:37:41.368452 progress 95% (8MB)
72 18:37:41.370910 progress 100% (9MB)
73 18:37:41.371127 9MB downloaded in 2.05s (4.51MB/s)
74 18:37:41.371285 end: 1.2.1 http-download (duration 00:00:02) [common]
76 18:37:41.371559 end: 1.2 download-retry (duration 00:00:02) [common]
77 18:37:41.371651 start: 1.3 download-retry (timeout 00:09:58) [common]
78 18:37:41.371740 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 18:37:41.371846 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230217.0/amd64/full.rootfs.tar.xz
80 18:37:41.371914 saving as /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/nfsrootfs/full.rootfs.tar
81 18:37:41.371976 total size: 124173696 (118MB)
82 18:37:41.372037 Using unxz to decompress xz
83 18:37:41.375448 progress 0% (0MB)
84 18:37:41.817276 progress 5% (5MB)
85 18:37:42.270956 progress 10% (11MB)
86 18:37:42.729137 progress 15% (17MB)
87 18:37:43.187498 progress 20% (23MB)
88 18:37:43.528429 progress 25% (29MB)
89 18:37:43.861697 progress 30% (35MB)
90 18:37:44.134896 progress 35% (41MB)
91 18:37:44.289292 progress 40% (47MB)
92 18:37:44.659518 progress 45% (53MB)
93 18:37:45.017184 progress 50% (59MB)
94 18:37:45.354567 progress 55% (65MB)
95 18:37:45.702875 progress 60% (71MB)
96 18:37:46.035226 progress 65% (77MB)
97 18:37:46.408023 progress 70% (82MB)
98 18:37:46.819987 progress 75% (88MB)
99 18:37:47.235657 progress 80% (94MB)
100 18:37:47.365669 progress 85% (100MB)
101 18:37:47.524344 progress 90% (106MB)
102 18:37:47.854509 progress 95% (112MB)
103 18:37:48.221314 progress 100% (118MB)
104 18:37:48.227163 118MB downloaded in 6.86s (17.27MB/s)
105 18:37:48.227437 end: 1.3.1 http-download (duration 00:00:07) [common]
107 18:37:48.227711 end: 1.3 download-retry (duration 00:00:07) [common]
108 18:37:48.227806 start: 1.4 download-retry (timeout 00:09:51) [common]
109 18:37:48.227897 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 18:37:48.228013 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 18:37:48.228087 saving as /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/modules/modules.tar
112 18:37:48.228148 total size: 64832 (0MB)
113 18:37:48.228211 Using unxz to decompress xz
114 18:37:48.231487 progress 50% (0MB)
115 18:37:48.231863 progress 100% (0MB)
116 18:37:48.236051 0MB downloaded in 0.01s (7.83MB/s)
117 18:37:48.236283 end: 1.4.1 http-download (duration 00:00:00) [common]
119 18:37:48.236566 end: 1.4 download-retry (duration 00:00:00) [common]
120 18:37:48.236666 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 18:37:48.236773 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 18:37:49.941089 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9334689/extract-nfsrootfs-1xkkzqnu
123 18:37:49.941301 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 18:37:49.941419 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 18:37:49.941561 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo
126 18:37:49.941664 makedir: /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin
127 18:37:49.941749 makedir: /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/tests
128 18:37:49.941831 makedir: /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/results
129 18:37:49.941928 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-add-keys
130 18:37:49.942057 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-add-sources
131 18:37:49.942221 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-background-process-start
132 18:37:49.942336 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-background-process-stop
133 18:37:49.942448 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-common-functions
134 18:37:49.942560 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-echo-ipv4
135 18:37:49.942671 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-install-packages
136 18:37:49.942784 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-installed-packages
137 18:37:49.942894 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-os-build
138 18:37:49.943002 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-probe-channel
139 18:37:49.943111 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-probe-ip
140 18:37:49.943218 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-target-ip
141 18:37:49.943326 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-target-mac
142 18:37:49.943433 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-target-storage
143 18:37:49.943542 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-test-case
144 18:37:49.943651 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-test-event
145 18:37:49.943759 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-test-feedback
146 18:37:49.943866 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-test-raise
147 18:37:49.943975 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-test-reference
148 18:37:49.944083 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-test-runner
149 18:37:49.944190 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-test-set
150 18:37:49.944298 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-test-shell
151 18:37:49.944407 Updating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-install-packages (oe)
152 18:37:49.944520 Updating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/bin/lava-installed-packages (oe)
153 18:37:49.944616 Creating /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/environment
154 18:37:49.944702 LAVA metadata
155 18:37:49.944769 - LAVA_JOB_ID=9334689
156 18:37:49.944834 - LAVA_DISPATCHER_IP=192.168.201.1
157 18:37:49.944935 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 18:37:49.945002 skipped lava-vland-overlay
159 18:37:49.945083 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 18:37:49.945171 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 18:37:49.945236 skipped lava-multinode-overlay
162 18:37:49.945311 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 18:37:49.945394 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 18:37:49.945466 Loading test definitions
165 18:37:49.945556 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
166 18:37:49.945629 Using /lava-9334689 at stage 0
167 18:37:49.945725 Fetching tests from https://github.com/kernelci/test-definitions
168 18:37:49.945807 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/0/tests/0_ltp-ipc'
169 18:37:52.471284 Running '/usr/bin/git checkout kernelci.org
170 18:37:52.608157 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 18:37:52.608898 uuid=9334689_1.5.2.3.1 testdef=None
172 18:37:52.609056 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 18:37:52.609311 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
175 18:37:52.610125 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 18:37:52.610389 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
178 18:37:52.611399 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 18:37:52.611651 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
181 18:37:52.612614 runner path: /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/0/tests/0_ltp-ipc test_uuid 9334689_1.5.2.3.1
182 18:37:52.612707 SKIPFILE='skipfile-lkft.yaml'
183 18:37:52.612775 SKIP_INSTALL='true'
184 18:37:52.612835 TST_CMDFILES='ipc'
185 18:37:52.612972 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 18:37:52.613190 Creating lava-test-runner.conf files
188 18:37:52.613257 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9334689/lava-overlay-g5wljooo/lava-9334689/0 for stage 0
189 18:37:52.613340 - 0_ltp-ipc
190 18:37:52.613441 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
191 18:37:52.613533 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
192 18:38:00.002903 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 18:38:00.003064 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
194 18:38:00.003161 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 18:38:00.003266 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
196 18:38:00.003365 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
197 18:38:00.108556 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 18:38:00.108926 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
199 18:38:00.109133 extracting modules file /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9334689/extract-nfsrootfs-1xkkzqnu
200 18:38:00.113234 extracting modules file /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9334689/extract-overlay-ramdisk-3704y_v9/ramdisk
201 18:38:00.117095 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 18:38:00.117238 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
203 18:38:00.117340 [common] Applying overlay to NFS
204 18:38:00.117428 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334689/compress-overlay-mmdc1_d7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9334689/extract-nfsrootfs-1xkkzqnu
205 18:38:00.582254 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 18:38:00.582433 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
207 18:38:00.582556 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 18:38:00.582670 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
209 18:38:00.582765 Building ramdisk /var/lib/lava/dispatcher/tmp/9334689/extract-overlay-ramdisk-3704y_v9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9334689/extract-overlay-ramdisk-3704y_v9/ramdisk
210 18:38:00.617469 >> 24777 blocks
211 18:38:01.098231 rename /var/lib/lava/dispatcher/tmp/9334689/extract-overlay-ramdisk-3704y_v9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/ramdisk/ramdisk.cpio.gz
212 18:38:01.098654 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 18:38:01.098780 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
214 18:38:01.098885 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
215 18:38:01.098982 No mkimage arch provided, not using FIT.
216 18:38:01.099080 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 18:38:01.099172 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 18:38:01.099285 end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
219 18:38:01.099392 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
220 18:38:01.099500 No LXC device requested
221 18:38:01.099608 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 18:38:01.099705 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
223 18:38:01.099794 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 18:38:01.099898 Checking files for TFTP limit of 4294967296 bytes.
225 18:38:01.100341 end: 1 tftp-deploy (duration 00:00:22) [common]
226 18:38:01.100458 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 18:38:01.100561 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 18:38:01.100697 substitutions:
229 18:38:01.100769 - {DTB}: None
230 18:38:01.100836 - {INITRD}: 9334689/tftp-deploy-53vbtcvx/ramdisk/ramdisk.cpio.gz
231 18:38:01.100901 - {KERNEL}: 9334689/tftp-deploy-53vbtcvx/kernel/bzImage
232 18:38:01.100964 - {LAVA_MAC}: None
233 18:38:01.101031 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9334689/extract-nfsrootfs-1xkkzqnu
234 18:38:01.101094 - {NFS_SERVER_IP}: 192.168.201.1
235 18:38:01.101160 - {PRESEED_CONFIG}: None
236 18:38:01.101230 - {PRESEED_LOCAL}: None
237 18:38:01.101291 - {RAMDISK}: 9334689/tftp-deploy-53vbtcvx/ramdisk/ramdisk.cpio.gz
238 18:38:01.101350 - {ROOT_PART}: None
239 18:38:01.101409 - {ROOT}: None
240 18:38:01.101467 - {SERVER_IP}: 192.168.201.1
241 18:38:01.101525 - {TEE}: None
242 18:38:01.101583 Parsed boot commands:
243 18:38:01.101640 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 18:38:01.101800 Parsed boot commands: tftpboot 192.168.201.1 9334689/tftp-deploy-53vbtcvx/kernel/bzImage 9334689/tftp-deploy-53vbtcvx/kernel/cmdline 9334689/tftp-deploy-53vbtcvx/ramdisk/ramdisk.cpio.gz
245 18:38:01.101896 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 18:38:01.101987 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 18:38:01.102090 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 18:38:01.102184 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 18:38:01.102261 Not connected, no need to disconnect.
250 18:38:01.102344 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 18:38:01.102428 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 18:38:01.102498 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
253 18:38:01.105531 Setting prompt string to ['lava-test: # ']
254 18:38:01.105848 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 18:38:01.105960 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 18:38:01.106075 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 18:38:01.106171 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 18:38:01.106362 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
259 18:38:10.418347 >> Command sent successfully.
260 18:38:10.420429 Returned 0 in 9 seconds
261 18:38:10.521188 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
263 18:38:10.521525 end: 2.2.2 reset-device (duration 00:00:09) [common]
264 18:38:10.521629 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
265 18:38:10.521716 Setting prompt string to 'Starting depthcharge on Helios...'
266 18:38:10.521786 Changing prompt to 'Starting depthcharge on Helios...'
267 18:38:10.521857 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 18:38:10.522172 [Enter `^Ec?' for help]
269 18:38:10.522256
270 18:38:10.522325
271 18:38:10.522388 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 18:38:10.522453 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 18:38:10.522516 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 18:38:10.522577 CPU: AES supported, TXT NOT supported, VT supported
275 18:38:10.522636 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 18:38:10.522696 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 18:38:10.522754 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 18:38:10.522812 VBOOT: Loading verstage.
279 18:38:10.522870 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 18:38:10.522929 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 18:38:10.522987 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 18:38:10.523045 CBFS @ c08000 size 3f8000
283 18:38:10.523102 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 18:38:10.523160 CBFS: Locating 'fallback/verstage'
285 18:38:10.523217 CBFS: Found @ offset 10fb80 size 1072c
286 18:38:10.523275
287 18:38:10.523332
288 18:38:10.523389 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 18:38:10.523447 Probing TPM: . done!
290 18:38:10.523504 TPM ready after 0 ms
291 18:38:10.523562 Connected to device vid:did:rid of 1ae0:0028:00
292 18:38:10.523620 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 18:38:10.523682 Initialized TPM device CR50 revision 0
294 18:38:10.523740 tlcl_send_startup: Startup return code is 0
295 18:38:10.523798 TPM: setup succeeded
296 18:38:10.523855 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 18:38:10.523912 Chrome EC: UHEPI supported
298 18:38:10.523969 Phase 1
299 18:38:10.524026 FMAP: area GBB found @ c05000 (12288 bytes)
300 18:38:10.524083 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 18:38:10.524141 Phase 2
302 18:38:10.524198 Phase 3
303 18:38:10.524254 FMAP: area GBB found @ c05000 (12288 bytes)
304 18:38:10.524312 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 18:38:10.524369 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
306 18:38:10.524426 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 18:38:10.524483 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 18:38:10.524540 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 18:38:10.524598 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 18:38:10.524655 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 18:38:10.524711 Phase 4
312 18:38:10.524768 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
313 18:38:10.524826 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 18:38:10.524883 VB2:vb2_rsa_verify_digest() Digest check failed!
315 18:38:10.524941 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 18:38:10.524998 Saving nvdata
317 18:38:10.525054 Reboot requested (10020007)
318 18:38:10.525112 board_reset() called!
319 18:38:10.525169 full_reset() called!
320 18:38:14.099361
321 18:38:14.099502
322 18:38:14.109387 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 18:38:14.112799 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 18:38:14.119697 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 18:38:14.122458 CPU: AES supported, TXT NOT supported, VT supported
326 18:38:14.129253 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 18:38:14.132601 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 18:38:14.139320 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 18:38:14.142642 VBOOT: Loading verstage.
330 18:38:14.146009 FMAP: Found "FLASH" version 1.1 at 0xc04000.
331 18:38:14.152524 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 18:38:14.158499 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 18:38:14.158614 CBFS @ c08000 size 3f8000
334 18:38:14.165101 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 18:38:14.168434 CBFS: Locating 'fallback/verstage'
336 18:38:14.171849 CBFS: Found @ offset 10fb80 size 1072c
337 18:38:14.176522
338 18:38:14.176616
339 18:38:14.185964 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 18:38:14.200354 Probing TPM: . done!
341 18:38:14.203796 TPM ready after 0 ms
342 18:38:14.207349 Connected to device vid:did:rid of 1ae0:0028:00
343 18:38:14.217389 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 18:38:14.220823 Initialized TPM device CR50 revision 0
345 18:38:14.262960 tlcl_send_startup: Startup return code is 0
346 18:38:14.263072 TPM: setup succeeded
347 18:38:14.276101 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 18:38:14.279961 Chrome EC: UHEPI supported
349 18:38:14.282667 Phase 1
350 18:38:14.286056 FMAP: area GBB found @ c05000 (12288 bytes)
351 18:38:14.292691 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 18:38:14.299508 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 18:38:14.302891 Recovery requested (1009000e)
354 18:38:14.308798 Saving nvdata
355 18:38:14.314888 tlcl_extend: response is 0
356 18:38:14.323054 tlcl_extend: response is 0
357 18:38:14.330400 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 18:38:14.333841 CBFS @ c08000 size 3f8000
359 18:38:14.340050 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 18:38:14.343462 CBFS: Locating 'fallback/romstage'
361 18:38:14.346661 CBFS: Found @ offset 80 size 145fc
362 18:38:14.350024 Accumulated console time in verstage 98 ms
363 18:38:14.350152
364 18:38:14.350222
365 18:38:14.363339 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 18:38:14.369904 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 18:38:14.373346 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 18:38:14.376033 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 18:38:14.382992 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 18:38:14.386498 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 18:38:14.389098 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
372 18:38:14.392407 TCO_STS: 0000 0000
373 18:38:14.395890 GEN_PMCON: e0015238 00000200
374 18:38:14.399330 GBLRST_CAUSE: 00000000 00000000
375 18:38:14.399417 prev_sleep_state 5
376 18:38:14.402781 Boot Count incremented to 49302
377 18:38:14.410222 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 18:38:14.412982 CBFS @ c08000 size 3f8000
379 18:38:14.419880 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 18:38:14.419969 CBFS: Locating 'fspm.bin'
381 18:38:14.426311 CBFS: Found @ offset 5ffc0 size 71000
382 18:38:14.429668 Chrome EC: UHEPI supported
383 18:38:14.436642 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 18:38:14.439883 Probing TPM: done!
385 18:38:14.446609 Connected to device vid:did:rid of 1ae0:0028:00
386 18:38:14.456688 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 18:38:14.461855 Initialized TPM device CR50 revision 0
388 18:38:14.471200 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 18:38:14.481041 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 18:38:14.481130 MRC cache found, size 1948
391 18:38:14.484310 bootmode is set to: 2
392 18:38:14.487975 PRMRR disabled by config.
393 18:38:14.490660 SPD INDEX = 1
394 18:38:14.493966 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 18:38:14.497320 CBFS @ c08000 size 3f8000
396 18:38:14.503814 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 18:38:14.503932 CBFS: Locating 'spd.bin'
398 18:38:14.510772 CBFS: Found @ offset 5fb80 size 400
399 18:38:14.510859 SPD: module type is LPDDR3
400 18:38:14.514134 SPD: module part is
401 18:38:14.520264 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 18:38:14.523726 SPD: device width 4 bits, bus width 8 bits
403 18:38:14.527174 SPD: module size is 4096 MB (per channel)
404 18:38:14.530098 memory slot: 0 configuration done.
405 18:38:14.536876 memory slot: 2 configuration done.
406 18:38:14.585555 CBMEM:
407 18:38:14.589032 IMD: root @ 99fff000 254 entries.
408 18:38:14.592627 IMD: root @ 99ffec00 62 entries.
409 18:38:14.595287 External stage cache:
410 18:38:14.598728 IMD: root @ 9abff000 254 entries.
411 18:38:14.602184 IMD: root @ 9abfec00 62 entries.
412 18:38:14.608945 Chrome EC: clear events_b mask to 0x0000000020004000
413 18:38:14.621490 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 18:38:14.634312 tlcl_write: response is 0
415 18:38:14.643371 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 18:38:14.650231 MRC: TPM MRC hash updated successfully.
417 18:38:14.650319 2 DIMMs found
418 18:38:14.653463 SMM Memory Map
419 18:38:14.656811 SMRAM : 0x9a000000 0x1000000
420 18:38:14.660078 Subregion 0: 0x9a000000 0xa00000
421 18:38:14.663316 Subregion 1: 0x9aa00000 0x200000
422 18:38:14.666607 Subregion 2: 0x9ac00000 0x400000
423 18:38:14.669909 top_of_ram = 0x9a000000
424 18:38:14.673199 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 18:38:14.680061 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 18:38:14.683565 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 18:38:14.689754 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 18:38:14.693153 CBFS @ c08000 size 3f8000
429 18:38:14.696472 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 18:38:14.699886 CBFS: Locating 'fallback/postcar'
431 18:38:14.706162 CBFS: Found @ offset 107000 size 4b44
432 18:38:14.712922 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 18:38:14.722761 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 18:38:14.726258 Processing 180 relocs. Offset value of 0x97c0c000
435 18:38:14.734096 Accumulated console time in romstage 286 ms
436 18:38:14.734197
437 18:38:14.734265
438 18:38:14.744380 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 18:38:14.750499 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 18:38:14.753825 CBFS @ c08000 size 3f8000
441 18:38:14.760689 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 18:38:14.763884 CBFS: Locating 'fallback/ramstage'
443 18:38:14.767205 CBFS: Found @ offset 43380 size 1b9e8
444 18:38:14.773491 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 18:38:14.806282 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 18:38:14.809053 Processing 3976 relocs. Offset value of 0x98db0000
447 18:38:14.815701 Accumulated console time in postcar 52 ms
448 18:38:14.815788
449 18:38:14.815857
450 18:38:14.825947 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 18:38:14.832167 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 18:38:14.835571 WARNING: RO_VPD is uninitialized or empty.
453 18:38:14.839134 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 18:38:14.845370 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 18:38:14.845468 Normal boot.
456 18:38:14.852176 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 18:38:14.855609 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 18:38:14.858356 CBFS @ c08000 size 3f8000
459 18:38:14.865089 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 18:38:14.868796 CBFS: Locating 'cpu_microcode_blob.bin'
461 18:38:14.872144 CBFS: Found @ offset 14700 size 2ec00
462 18:38:14.875594 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 18:38:14.878229 Skip microcode update
464 18:38:14.885078 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 18:38:14.885169 CBFS @ c08000 size 3f8000
466 18:38:14.891840 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 18:38:14.894637 CBFS: Locating 'fsps.bin'
468 18:38:14.897999 CBFS: Found @ offset d1fc0 size 35000
469 18:38:14.923891 Detected 4 core, 8 thread CPU.
470 18:38:14.927263 Setting up SMI for CPU
471 18:38:14.930661 IED base = 0x9ac00000
472 18:38:14.934027 IED size = 0x00400000
473 18:38:14.934148 Will perform SMM setup.
474 18:38:14.940602 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 18:38:14.947058 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 18:38:14.953868 Processing 16 relocs. Offset value of 0x00030000
477 18:38:14.953957 Attempting to start 7 APs
478 18:38:14.960007 Waiting for 10ms after sending INIT.
479 18:38:14.973533 Waiting for 1st SIPI to complete...done.
480 18:38:14.973635 AP: slot 1 apic_id 1.
481 18:38:14.980303 Waiting for 2nd SIPI to complete...done.
482 18:38:14.980387 AP: slot 6 apic_id 3.
483 18:38:14.983678 AP: slot 4 apic_id 2.
484 18:38:14.987217 AP: slot 7 apic_id 7.
485 18:38:14.987304 AP: slot 5 apic_id 6.
486 18:38:14.990609 AP: slot 2 apic_id 5.
487 18:38:14.993824 AP: slot 3 apic_id 4.
488 18:38:14.999983 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 18:38:15.006663 Processing 13 relocs. Offset value of 0x00038000
490 18:38:15.013413 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 18:38:15.016806 Installing SMM handler to 0x9a000000
492 18:38:15.023095 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 18:38:15.029803 Processing 658 relocs. Offset value of 0x9a010000
494 18:38:15.036796 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 18:38:15.039560 Processing 13 relocs. Offset value of 0x9a008000
496 18:38:15.046683 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 18:38:15.052869 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 18:38:15.059606 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 18:38:15.063106 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 18:38:15.069246 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 18:38:15.076046 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 18:38:15.082148 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 18:38:15.088958 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 18:38:15.092279 Clearing SMI status registers
505 18:38:15.092364 SMI_STS: PM1
506 18:38:15.095552 PM1_STS: PWRBTN
507 18:38:15.095639 TCO_STS: SECOND_TO
508 18:38:15.099180 New SMBASE 0x9a000000
509 18:38:15.101952 In relocation handler: CPU 0
510 18:38:15.105330 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 18:38:15.112128 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 18:38:15.112217 Relocation complete.
513 18:38:15.115726 New SMBASE 0x99fffc00
514 18:38:15.118430 In relocation handler: CPU 1
515 18:38:15.121863 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
516 18:38:15.128518 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 18:38:15.128604 Relocation complete.
518 18:38:15.131857 New SMBASE 0x99ffec00
519 18:38:15.135237 In relocation handler: CPU 5
520 18:38:15.138582 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
521 18:38:15.144814 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 18:38:15.144893 Relocation complete.
523 18:38:15.148252 New SMBASE 0x99fff400
524 18:38:15.151526 In relocation handler: CPU 3
525 18:38:15.154904 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
526 18:38:15.158116 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 18:38:15.161624 Relocation complete.
528 18:38:15.164833 New SMBASE 0x99fff800
529 18:38:15.168219 In relocation handler: CPU 2
530 18:38:15.171523 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
531 18:38:15.174870 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 18:38:15.177581 Relocation complete.
533 18:38:15.181025 New SMBASE 0x99fff000
534 18:38:15.184520 In relocation handler: CPU 4
535 18:38:15.188043 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
536 18:38:15.190746 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 18:38:15.194402 Relocation complete.
538 18:38:15.197724 New SMBASE 0x99ffe800
539 18:38:15.201096 In relocation handler: CPU 6
540 18:38:15.203902 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
541 18:38:15.207317 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 18:38:15.210683 Relocation complete.
543 18:38:15.214177 New SMBASE 0x99ffe400
544 18:38:15.217648 In relocation handler: CPU 7
545 18:38:15.221024 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
546 18:38:15.223834 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 18:38:15.227265 Relocation complete.
548 18:38:15.230629 Initializing CPU #0
549 18:38:15.233977 CPU: vendor Intel device 806ec
550 18:38:15.237642 CPU: family 06, model 8e, stepping 0c
551 18:38:15.240417 Clearing out pending MCEs
552 18:38:15.240505 Setting up local APIC...
553 18:38:15.243803 apic_id: 0x00 done.
554 18:38:15.247425 Turbo is available but hidden
555 18:38:15.250303 Turbo is available and visible
556 18:38:15.250393 VMX status: enabled
557 18:38:15.257087 IA32_FEATURE_CONTROL status: locked
558 18:38:15.257174 Skip microcode update
559 18:38:15.259890 CPU #0 initialized
560 18:38:15.263307 Initializing CPU #1
561 18:38:15.263402 Initializing CPU #2
562 18:38:15.266624 Initializing CPU #6
563 18:38:15.266711 Initializing CPU #4
564 18:38:15.270124 CPU: vendor Intel device 806ec
565 18:38:15.276810 CPU: family 06, model 8e, stepping 0c
566 18:38:15.276897 CPU: vendor Intel device 806ec
567 18:38:15.283369 CPU: family 06, model 8e, stepping 0c
568 18:38:15.283457 Clearing out pending MCEs
569 18:38:15.286100 Clearing out pending MCEs
570 18:38:15.289473 Setting up local APIC...
571 18:38:15.293005 Initializing CPU #7
572 18:38:15.293092 Initializing CPU #5
573 18:38:15.296278 CPU: vendor Intel device 806ec
574 18:38:15.299711 CPU: family 06, model 8e, stepping 0c
575 18:38:15.303105 CPU: vendor Intel device 806ec
576 18:38:15.305876 CPU: family 06, model 8e, stepping 0c
577 18:38:15.309325 Clearing out pending MCEs
578 18:38:15.312734 Clearing out pending MCEs
579 18:38:15.316238 Setting up local APIC...
580 18:38:15.316333 Initializing CPU #3
581 18:38:15.319487 CPU: vendor Intel device 806ec
582 18:38:15.326329 CPU: family 06, model 8e, stepping 0c
583 18:38:15.326419 Setting up local APIC...
584 18:38:15.329642 Setting up local APIC...
585 18:38:15.332314 CPU: vendor Intel device 806ec
586 18:38:15.335558 CPU: family 06, model 8e, stepping 0c
587 18:38:15.339052 Clearing out pending MCEs
588 18:38:15.342382 apic_id: 0x03 done.
589 18:38:15.342469 apic_id: 0x02 done.
590 18:38:15.345929 VMX status: enabled
591 18:38:15.348750 VMX status: enabled
592 18:38:15.351987 IA32_FEATURE_CONTROL status: locked
593 18:38:15.355564 IA32_FEATURE_CONTROL status: locked
594 18:38:15.355652 Skip microcode update
595 18:38:15.358913 Skip microcode update
596 18:38:15.362338 CPU #6 initialized
597 18:38:15.362426 CPU #4 initialized
598 18:38:15.365693 Clearing out pending MCEs
599 18:38:15.369036 CPU: vendor Intel device 806ec
600 18:38:15.371730 CPU: family 06, model 8e, stepping 0c
601 18:38:15.375192 Setting up local APIC...
602 18:38:15.378584 apic_id: 0x07 done.
603 18:38:15.378672 apic_id: 0x06 done.
604 18:38:15.381908 VMX status: enabled
605 18:38:15.381995 VMX status: enabled
606 18:38:15.388744 IA32_FEATURE_CONTROL status: locked
607 18:38:15.392033 IA32_FEATURE_CONTROL status: locked
608 18:38:15.392121 Skip microcode update
609 18:38:15.395536 Skip microcode update
610 18:38:15.398295 CPU #7 initialized
611 18:38:15.398383 CPU #5 initialized
612 18:38:15.401661 Setting up local APIC...
613 18:38:15.405053 apic_id: 0x05 done.
614 18:38:15.405140 Clearing out pending MCEs
615 18:38:15.408301 VMX status: enabled
616 18:38:15.411737 Setting up local APIC...
617 18:38:15.411825 apic_id: 0x01 done.
618 18:38:15.418311 IA32_FEATURE_CONTROL status: locked
619 18:38:15.418399 apic_id: 0x04 done.
620 18:38:15.421126 Skip microcode update
621 18:38:15.421214 VMX status: enabled
622 18:38:15.425157 CPU #2 initialized
623 18:38:15.427849 IA32_FEATURE_CONTROL status: locked
624 18:38:15.431239 VMX status: enabled
625 18:38:15.431329 Skip microcode update
626 18:38:15.437898 IA32_FEATURE_CONTROL status: locked
627 18:38:15.437987 CPU #3 initialized
628 18:38:15.441342 Skip microcode update
629 18:38:15.441430 CPU #1 initialized
630 18:38:15.447981 bsp_do_flight_plan done after 466 msecs.
631 18:38:15.451410 CPU: frequency set to 4200 MHz
632 18:38:15.451501 Enabling SMIs.
633 18:38:15.454011 Locking SMM.
634 18:38:15.467638 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 18:38:15.471152 CBFS @ c08000 size 3f8000
636 18:38:15.477642 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 18:38:15.477730 CBFS: Locating 'vbt.bin'
638 18:38:15.484325 CBFS: Found @ offset 5f5c0 size 499
639 18:38:15.487077 Found a VBT of 4608 bytes after decompression
640 18:38:15.668686 Display FSP Version Info HOB
641 18:38:15.672205 Reference Code - CPU = 9.0.1e.30
642 18:38:15.675621 uCode Version = 0.0.0.ca
643 18:38:15.679180 TXT ACM version = ff.ff.ff.ffff
644 18:38:15.681869 Display FSP Version Info HOB
645 18:38:15.685341 Reference Code - ME = 9.0.1e.30
646 18:38:15.688699 MEBx version = 0.0.0.0
647 18:38:15.691904 ME Firmware Version = Consumer SKU
648 18:38:15.695230 Display FSP Version Info HOB
649 18:38:15.698663 Reference Code - CML PCH = 9.0.1e.30
650 18:38:15.701364 PCH-CRID Status = Disabled
651 18:38:15.704889 PCH-CRID Original Value = ff.ff.ff.ffff
652 18:38:15.708163 PCH-CRID New Value = ff.ff.ff.ffff
653 18:38:15.711454 OPROM - RST - RAID = ff.ff.ff.ffff
654 18:38:15.714888 ChipsetInit Base Version = ff.ff.ff.ffff
655 18:38:15.721346 ChipsetInit Oem Version = ff.ff.ff.ffff
656 18:38:15.721449 Display FSP Version Info HOB
657 18:38:15.727710 Reference Code - SA - System Agent = 9.0.1e.30
658 18:38:15.731091 Reference Code - MRC = 0.7.1.6c
659 18:38:15.734553 SA - PCIe Version = 9.0.1e.30
660 18:38:15.737265 SA-CRID Status = Disabled
661 18:38:15.740698 SA-CRID Original Value = 0.0.0.c
662 18:38:15.740785 SA-CRID New Value = 0.0.0.c
663 18:38:15.744063 OPROM - VBIOS = ff.ff.ff.ffff
664 18:38:15.747626 RTC Init
665 18:38:15.751001 Set power on after power failure.
666 18:38:15.751091 Disabling Deep S3
667 18:38:15.754426 Disabling Deep S3
668 18:38:15.758007 Disabling Deep S4
669 18:38:15.758178 Disabling Deep S4
670 18:38:15.760658 Disabling Deep S5
671 18:38:15.760786 Disabling Deep S5
672 18:38:15.767611 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
673 18:38:15.770930 Enumerating buses...
674 18:38:15.773793 Show all devs... Before device enumeration.
675 18:38:15.777141 Root Device: enabled 1
676 18:38:15.780515 CPU_CLUSTER: 0: enabled 1
677 18:38:15.780645 DOMAIN: 0000: enabled 1
678 18:38:15.783917 APIC: 00: enabled 1
679 18:38:15.787224 PCI: 00:00.0: enabled 1
680 18:38:15.787357 PCI: 00:02.0: enabled 1
681 18:38:15.789976 PCI: 00:04.0: enabled 0
682 18:38:15.794027 PCI: 00:05.0: enabled 0
683 18:38:15.796813 PCI: 00:12.0: enabled 1
684 18:38:15.796974 PCI: 00:12.5: enabled 0
685 18:38:15.800069 PCI: 00:12.6: enabled 0
686 18:38:15.803375 PCI: 00:14.0: enabled 1
687 18:38:15.807023 PCI: 00:14.1: enabled 0
688 18:38:15.807155 PCI: 00:14.3: enabled 1
689 18:38:15.809857 PCI: 00:14.5: enabled 0
690 18:38:15.813196 PCI: 00:15.0: enabled 1
691 18:38:15.816728 PCI: 00:15.1: enabled 1
692 18:38:15.816870 PCI: 00:15.2: enabled 0
693 18:38:15.819972 PCI: 00:15.3: enabled 0
694 18:38:15.823450 PCI: 00:16.0: enabled 1
695 18:38:15.826971 PCI: 00:16.1: enabled 0
696 18:38:15.827120 PCI: 00:16.2: enabled 0
697 18:38:15.829703 PCI: 00:16.3: enabled 0
698 18:38:15.833110 PCI: 00:16.4: enabled 0
699 18:38:15.836623 PCI: 00:16.5: enabled 0
700 18:38:15.836769 PCI: 00:17.0: enabled 1
701 18:38:15.839464 PCI: 00:19.0: enabled 1
702 18:38:15.842809 PCI: 00:19.1: enabled 0
703 18:38:15.846269 PCI: 00:19.2: enabled 0
704 18:38:15.846358 PCI: 00:1a.0: enabled 0
705 18:38:15.849754 PCI: 00:1c.0: enabled 0
706 18:38:15.853068 PCI: 00:1c.1: enabled 0
707 18:38:15.855719 PCI: 00:1c.2: enabled 0
708 18:38:15.855812 PCI: 00:1c.3: enabled 0
709 18:38:15.859216 PCI: 00:1c.4: enabled 0
710 18:38:15.862522 PCI: 00:1c.5: enabled 0
711 18:38:15.862661 PCI: 00:1c.6: enabled 0
712 18:38:15.865818 PCI: 00:1c.7: enabled 0
713 18:38:15.868670 PCI: 00:1d.0: enabled 1
714 18:38:15.872035 PCI: 00:1d.1: enabled 0
715 18:38:15.872123 PCI: 00:1d.2: enabled 0
716 18:38:15.875290 PCI: 00:1d.3: enabled 0
717 18:38:15.878718 PCI: 00:1d.4: enabled 0
718 18:38:15.882061 PCI: 00:1d.5: enabled 1
719 18:38:15.882213 PCI: 00:1e.0: enabled 1
720 18:38:15.885416 PCI: 00:1e.1: enabled 0
721 18:38:15.888855 PCI: 00:1e.2: enabled 1
722 18:38:15.891552 PCI: 00:1e.3: enabled 1
723 18:38:15.891639 PCI: 00:1f.0: enabled 1
724 18:38:15.895015 PCI: 00:1f.1: enabled 1
725 18:38:15.898275 PCI: 00:1f.2: enabled 1
726 18:38:15.901164 PCI: 00:1f.3: enabled 1
727 18:38:15.901294 PCI: 00:1f.4: enabled 1
728 18:38:15.904664 PCI: 00:1f.5: enabled 1
729 18:38:15.908156 PCI: 00:1f.6: enabled 0
730 18:38:15.911433 USB0 port 0: enabled 1
731 18:38:15.911521 I2C: 00:15: enabled 1
732 18:38:15.914826 I2C: 00:5d: enabled 1
733 18:38:15.917609 GENERIC: 0.0: enabled 1
734 18:38:15.917697 I2C: 00:1a: enabled 1
735 18:38:15.921011 I2C: 00:38: enabled 1
736 18:38:15.924495 I2C: 00:39: enabled 1
737 18:38:15.927854 I2C: 00:3a: enabled 1
738 18:38:15.927943 I2C: 00:3b: enabled 1
739 18:38:15.930770 PCI: 00:00.0: enabled 1
740 18:38:15.934230 SPI: 00: enabled 1
741 18:38:15.934317 SPI: 01: enabled 1
742 18:38:15.937608 PNP: 0c09.0: enabled 1
743 18:38:15.941230 USB2 port 0: enabled 1
744 18:38:15.941318 USB2 port 1: enabled 1
745 18:38:15.943801 USB2 port 2: enabled 0
746 18:38:15.947182 USB2 port 3: enabled 0
747 18:38:15.947269 USB2 port 5: enabled 0
748 18:38:15.950765 USB2 port 6: enabled 1
749 18:38:15.954026 USB2 port 9: enabled 1
750 18:38:15.956907 USB3 port 0: enabled 1
751 18:38:15.956994 USB3 port 1: enabled 1
752 18:38:15.960388 USB3 port 2: enabled 1
753 18:38:15.963892 USB3 port 3: enabled 1
754 18:38:15.963980 USB3 port 4: enabled 0
755 18:38:15.967336 APIC: 01: enabled 1
756 18:38:15.970292 APIC: 05: enabled 1
757 18:38:15.970384 APIC: 04: enabled 1
758 18:38:15.973625 APIC: 02: enabled 1
759 18:38:15.973712 APIC: 06: enabled 1
760 18:38:15.977148 APIC: 03: enabled 1
761 18:38:15.979846 APIC: 07: enabled 1
762 18:38:15.980029 Compare with tree...
763 18:38:15.983752 Root Device: enabled 1
764 18:38:15.986542 CPU_CLUSTER: 0: enabled 1
765 18:38:15.989885 APIC: 00: enabled 1
766 18:38:15.989974 APIC: 01: enabled 1
767 18:38:15.993285 APIC: 05: enabled 1
768 18:38:15.996792 APIC: 04: enabled 1
769 18:38:15.996908 APIC: 02: enabled 1
770 18:38:16.000240 APIC: 06: enabled 1
771 18:38:16.003034 APIC: 03: enabled 1
772 18:38:16.003122 APIC: 07: enabled 1
773 18:38:16.006423 DOMAIN: 0000: enabled 1
774 18:38:16.010039 PCI: 00:00.0: enabled 1
775 18:38:16.013290 PCI: 00:02.0: enabled 1
776 18:38:16.016088 PCI: 00:04.0: enabled 0
777 18:38:16.016176 PCI: 00:05.0: enabled 0
778 18:38:16.019413 PCI: 00:12.0: enabled 1
779 18:38:16.022696 PCI: 00:12.5: enabled 0
780 18:38:16.026010 PCI: 00:12.6: enabled 0
781 18:38:16.029479 PCI: 00:14.0: enabled 1
782 18:38:16.029570 USB0 port 0: enabled 1
783 18:38:16.032936 USB2 port 0: enabled 1
784 18:38:16.035653 USB2 port 1: enabled 1
785 18:38:16.039047 USB2 port 2: enabled 0
786 18:38:16.042577 USB2 port 3: enabled 0
787 18:38:16.045331 USB2 port 5: enabled 0
788 18:38:16.045420 USB2 port 6: enabled 1
789 18:38:16.049321 USB2 port 9: enabled 1
790 18:38:16.051918 USB3 port 0: enabled 1
791 18:38:16.055398 USB3 port 1: enabled 1
792 18:38:16.058863 USB3 port 2: enabled 1
793 18:38:16.061705 USB3 port 3: enabled 1
794 18:38:16.061787 USB3 port 4: enabled 0
795 18:38:16.065268 PCI: 00:14.1: enabled 0
796 18:38:16.068739 PCI: 00:14.3: enabled 1
797 18:38:16.072161 PCI: 00:14.5: enabled 0
798 18:38:16.074897 PCI: 00:15.0: enabled 1
799 18:38:16.074984 I2C: 00:15: enabled 1
800 18:38:16.078259 PCI: 00:15.1: enabled 1
801 18:38:16.081669 I2C: 00:5d: enabled 1
802 18:38:16.084967 GENERIC: 0.0: enabled 1
803 18:38:16.088260 PCI: 00:15.2: enabled 0
804 18:38:16.088348 PCI: 00:15.3: enabled 0
805 18:38:16.091514 PCI: 00:16.0: enabled 1
806 18:38:16.094994 PCI: 00:16.1: enabled 0
807 18:38:16.097685 PCI: 00:16.2: enabled 0
808 18:38:16.101218 PCI: 00:16.3: enabled 0
809 18:38:16.101333 PCI: 00:16.4: enabled 0
810 18:38:16.104590 PCI: 00:16.5: enabled 0
811 18:38:16.107872 PCI: 00:17.0: enabled 1
812 18:38:16.111297 PCI: 00:19.0: enabled 1
813 18:38:16.114153 I2C: 00:1a: enabled 1
814 18:38:16.114241 I2C: 00:38: enabled 1
815 18:38:16.117570 I2C: 00:39: enabled 1
816 18:38:16.120921 I2C: 00:3a: enabled 1
817 18:38:16.124380 I2C: 00:3b: enabled 1
818 18:38:16.127207 PCI: 00:19.1: enabled 0
819 18:38:16.127295 PCI: 00:19.2: enabled 0
820 18:38:16.130639 PCI: 00:1a.0: enabled 0
821 18:38:16.133802 PCI: 00:1c.0: enabled 0
822 18:38:16.137401 PCI: 00:1c.1: enabled 0
823 18:38:16.140269 PCI: 00:1c.2: enabled 0
824 18:38:16.140356 PCI: 00:1c.3: enabled 0
825 18:38:16.143651 PCI: 00:1c.4: enabled 0
826 18:38:16.147012 PCI: 00:1c.5: enabled 0
827 18:38:16.150336 PCI: 00:1c.6: enabled 0
828 18:38:16.153728 PCI: 00:1c.7: enabled 0
829 18:38:16.153809 PCI: 00:1d.0: enabled 1
830 18:38:16.156658 PCI: 00:1d.1: enabled 0
831 18:38:16.160007 PCI: 00:1d.2: enabled 0
832 18:38:16.163510 PCI: 00:1d.3: enabled 0
833 18:38:16.167057 PCI: 00:1d.4: enabled 0
834 18:38:16.167145 PCI: 00:1d.5: enabled 1
835 18:38:16.169591 PCI: 00:00.0: enabled 1
836 18:38:16.173078 PCI: 00:1e.0: enabled 1
837 18:38:16.176096 PCI: 00:1e.1: enabled 0
838 18:38:16.179456 PCI: 00:1e.2: enabled 1
839 18:38:16.179544 SPI: 00: enabled 1
840 18:38:16.182875 PCI: 00:1e.3: enabled 1
841 18:38:16.186332 SPI: 01: enabled 1
842 18:38:16.189636 PCI: 00:1f.0: enabled 1
843 18:38:16.189723 PNP: 0c09.0: enabled 1
844 18:38:16.192266 PCI: 00:1f.1: enabled 1
845 18:38:16.196243 PCI: 00:1f.2: enabled 1
846 18:38:16.199514 PCI: 00:1f.3: enabled 1
847 18:38:16.202298 PCI: 00:1f.4: enabled 1
848 18:38:16.202390 PCI: 00:1f.5: enabled 1
849 18:38:16.205642 PCI: 00:1f.6: enabled 0
850 18:38:16.209037 Root Device scanning...
851 18:38:16.212521 scan_static_bus for Root Device
852 18:38:16.215205 CPU_CLUSTER: 0 enabled
853 18:38:16.215292 DOMAIN: 0000 enabled
854 18:38:16.218757 DOMAIN: 0000 scanning...
855 18:38:16.221997 PCI: pci_scan_bus for bus 00
856 18:38:16.225420 PCI: 00:00.0 [8086/0000] ops
857 18:38:16.228800 PCI: 00:00.0 [8086/9b61] enabled
858 18:38:16.232272 PCI: 00:02.0 [8086/0000] bus ops
859 18:38:16.235049 PCI: 00:02.0 [8086/9b41] enabled
860 18:38:16.238496 PCI: 00:04.0 [8086/1903] disabled
861 18:38:16.241906 PCI: 00:08.0 [8086/1911] enabled
862 18:38:16.245302 PCI: 00:12.0 [8086/02f9] enabled
863 18:38:16.248078 PCI: 00:14.0 [8086/0000] bus ops
864 18:38:16.251467 PCI: 00:14.0 [8086/02ed] enabled
865 18:38:16.254844 PCI: 00:14.2 [8086/02ef] enabled
866 18:38:16.258252 PCI: 00:14.3 [8086/02f0] enabled
867 18:38:16.261670 PCI: 00:15.0 [8086/0000] bus ops
868 18:38:16.264551 PCI: 00:15.0 [8086/02e8] enabled
869 18:38:16.267743 PCI: 00:15.1 [8086/0000] bus ops
870 18:38:16.271123 PCI: 00:15.1 [8086/02e9] enabled
871 18:38:16.274676 PCI: 00:16.0 [8086/0000] ops
872 18:38:16.277481 PCI: 00:16.0 [8086/02e0] enabled
873 18:38:16.280883 PCI: 00:17.0 [8086/0000] ops
874 18:38:16.284436 PCI: 00:17.0 [8086/02d3] enabled
875 18:38:16.287925 PCI: 00:19.0 [8086/0000] bus ops
876 18:38:16.290728 PCI: 00:19.0 [8086/02c5] enabled
877 18:38:16.294202 PCI: 00:1d.0 [8086/0000] bus ops
878 18:38:16.297533 PCI: 00:1d.0 [8086/02b0] enabled
879 18:38:16.304243 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 18:38:16.307478 PCI: 00:1e.0 [8086/0000] ops
881 18:38:16.310753 PCI: 00:1e.0 [8086/02a8] enabled
882 18:38:16.314313 PCI: 00:1e.2 [8086/0000] bus ops
883 18:38:16.317086 PCI: 00:1e.2 [8086/02aa] enabled
884 18:38:16.320545 PCI: 00:1e.3 [8086/0000] bus ops
885 18:38:16.323952 PCI: 00:1e.3 [8086/02ab] enabled
886 18:38:16.327296 PCI: 00:1f.0 [8086/0000] bus ops
887 18:38:16.330582 PCI: 00:1f.0 [8086/0284] enabled
888 18:38:16.336698 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 18:38:16.340264 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 18:38:16.343575 PCI: 00:1f.3 [8086/0000] bus ops
891 18:38:16.346210 PCI: 00:1f.3 [8086/02c8] enabled
892 18:38:16.349691 PCI: 00:1f.4 [8086/0000] bus ops
893 18:38:16.353163 PCI: 00:1f.4 [8086/02a3] enabled
894 18:38:16.356592 PCI: 00:1f.5 [8086/0000] bus ops
895 18:38:16.359419 PCI: 00:1f.5 [8086/02a4] enabled
896 18:38:16.362915 PCI: Leftover static devices:
897 18:38:16.366514 PCI: 00:05.0
898 18:38:16.366601 PCI: 00:12.5
899 18:38:16.369915 PCI: 00:12.6
900 18:38:16.370011 PCI: 00:14.1
901 18:38:16.370122 PCI: 00:14.5
902 18:38:16.372696 PCI: 00:15.2
903 18:38:16.372783 PCI: 00:15.3
904 18:38:16.376073 PCI: 00:16.1
905 18:38:16.376161 PCI: 00:16.2
906 18:38:16.379640 PCI: 00:16.3
907 18:38:16.379728 PCI: 00:16.4
908 18:38:16.379825 PCI: 00:16.5
909 18:38:16.382973 PCI: 00:19.1
910 18:38:16.383068 PCI: 00:19.2
911 18:38:16.386349 PCI: 00:1a.0
912 18:38:16.386437 PCI: 00:1c.0
913 18:38:16.386506 PCI: 00:1c.1
914 18:38:16.389203 PCI: 00:1c.2
915 18:38:16.389290 PCI: 00:1c.3
916 18:38:16.392656 PCI: 00:1c.4
917 18:38:16.392743 PCI: 00:1c.5
918 18:38:16.395911 PCI: 00:1c.6
919 18:38:16.395999 PCI: 00:1c.7
920 18:38:16.396067 PCI: 00:1d.1
921 18:38:16.399367 PCI: 00:1d.2
922 18:38:16.399455 PCI: 00:1d.3
923 18:38:16.402542 PCI: 00:1d.4
924 18:38:16.402630 PCI: 00:1d.5
925 18:38:16.402698 PCI: 00:1e.1
926 18:38:16.406094 PCI: 00:1f.1
927 18:38:16.406194 PCI: 00:1f.2
928 18:38:16.408812 PCI: 00:1f.6
929 18:38:16.412171 PCI: Check your devicetree.cb.
930 18:38:16.412261 PCI: 00:02.0 scanning...
931 18:38:16.419101 scan_generic_bus for PCI: 00:02.0
932 18:38:16.422350 scan_generic_bus for PCI: 00:02.0 done
933 18:38:16.425561 scan_bus: scanning of bus PCI: 00:02.0 took 10200 usecs
934 18:38:16.429235 PCI: 00:14.0 scanning...
935 18:38:16.432052 scan_static_bus for PCI: 00:14.0
936 18:38:16.435472 USB0 port 0 enabled
937 18:38:16.438387 USB0 port 0 scanning...
938 18:38:16.441807 scan_static_bus for USB0 port 0
939 18:38:16.441895 USB2 port 0 enabled
940 18:38:16.445348 USB2 port 1 enabled
941 18:38:16.448219 USB2 port 2 disabled
942 18:38:16.448307 USB2 port 3 disabled
943 18:38:16.451593 USB2 port 5 disabled
944 18:38:16.455053 USB2 port 6 enabled
945 18:38:16.455142 USB2 port 9 enabled
946 18:38:16.458381 USB3 port 0 enabled
947 18:38:16.458469 USB3 port 1 enabled
948 18:38:16.461169 USB3 port 2 enabled
949 18:38:16.464579 USB3 port 3 enabled
950 18:38:16.464667 USB3 port 4 disabled
951 18:38:16.468113 USB2 port 0 scanning...
952 18:38:16.471720 scan_static_bus for USB2 port 0
953 18:38:16.474407 scan_static_bus for USB2 port 0 done
954 18:38:16.481169 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
955 18:38:16.484584 USB2 port 1 scanning...
956 18:38:16.487318 scan_static_bus for USB2 port 1
957 18:38:16.490635 scan_static_bus for USB2 port 1 done
958 18:38:16.497679 scan_bus: scanning of bus USB2 port 1 took 9711 usecs
959 18:38:16.497768 USB2 port 6 scanning...
960 18:38:16.500510 scan_static_bus for USB2 port 6
961 18:38:16.503818 scan_static_bus for USB2 port 6 done
962 18:38:16.510730 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
963 18:38:16.513969 USB2 port 9 scanning...
964 18:38:16.517231 scan_static_bus for USB2 port 9
965 18:38:16.520809 scan_static_bus for USB2 port 9 done
966 18:38:16.527067 scan_bus: scanning of bus USB2 port 9 took 9711 usecs
967 18:38:16.527160 USB3 port 0 scanning...
968 18:38:16.530558 scan_static_bus for USB3 port 0
969 18:38:16.536714 scan_static_bus for USB3 port 0 done
970 18:38:16.540310 scan_bus: scanning of bus USB3 port 0 took 9711 usecs
971 18:38:16.543605 USB3 port 1 scanning...
972 18:38:16.546683 scan_static_bus for USB3 port 1
973 18:38:16.550013 scan_static_bus for USB3 port 1 done
974 18:38:16.556264 scan_bus: scanning of bus USB3 port 1 took 9710 usecs
975 18:38:16.559877 USB3 port 2 scanning...
976 18:38:16.563263 scan_static_bus for USB3 port 2
977 18:38:16.566636 scan_static_bus for USB3 port 2 done
978 18:38:16.569406 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
979 18:38:16.573013 USB3 port 3 scanning...
980 18:38:16.576516 scan_static_bus for USB3 port 3
981 18:38:16.579407 scan_static_bus for USB3 port 3 done
982 18:38:16.586272 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
983 18:38:16.589122 scan_static_bus for USB0 port 0 done
984 18:38:16.595908 scan_bus: scanning of bus USB0 port 0 took 155440 usecs
985 18:38:16.599373 scan_static_bus for PCI: 00:14.0 done
986 18:38:16.605384 scan_bus: scanning of bus PCI: 00:14.0 took 173075 usecs
987 18:38:16.605472 PCI: 00:15.0 scanning...
988 18:38:16.612121 scan_generic_bus for PCI: 00:15.0
989 18:38:16.616048 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 18:38:16.619404 scan_generic_bus for PCI: 00:15.0 done
991 18:38:16.625619 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
992 18:38:16.625709 PCI: 00:15.1 scanning...
993 18:38:16.632350 scan_generic_bus for PCI: 00:15.1
994 18:38:16.635846 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 18:38:16.639282 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 18:38:16.641979 scan_generic_bus for PCI: 00:15.1 done
997 18:38:16.648806 scan_bus: scanning of bus PCI: 00:15.1 took 18632 usecs
998 18:38:16.651660 PCI: 00:19.0 scanning...
999 18:38:16.655043 scan_generic_bus for PCI: 00:19.0
1000 18:38:16.658457 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 18:38:16.662016 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 18:38:16.668372 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 18:38:16.671621 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 18:38:16.674546 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 18:38:16.678221 scan_generic_bus for PCI: 00:19.0 done
1006 18:38:16.684588 scan_bus: scanning of bus PCI: 00:19.0 took 30731 usecs
1007 18:38:16.687919 PCI: 00:1d.0 scanning...
1008 18:38:16.691481 do_pci_scan_bridge for PCI: 00:1d.0
1009 18:38:16.694175 PCI: pci_scan_bus for bus 01
1010 18:38:16.697650 PCI: 01:00.0 [1c5c/1327] enabled
1011 18:38:16.701120 Enabling Common Clock Configuration
1012 18:38:16.704573 L1 Sub-State supported from root port 29
1013 18:38:16.707285 L1 Sub-State Support = 0xf
1014 18:38:16.710515 CommonModeRestoreTime = 0x28
1015 18:38:16.713833 Power On Value = 0x16, Power On Scale = 0x0
1016 18:38:16.717249 ASPM: Enabled L1
1017 18:38:16.724094 scan_bus: scanning of bus PCI: 00:1d.0 took 32795 usecs
1018 18:38:16.724201 PCI: 00:1e.2 scanning...
1019 18:38:16.730893 scan_generic_bus for PCI: 00:1e.2
1020 18:38:16.733696 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 18:38:16.737181 scan_generic_bus for PCI: 00:1e.2 done
1022 18:38:16.744038 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
1023 18:38:16.744128 PCI: 00:1e.3 scanning...
1024 18:38:16.746717 scan_generic_bus for PCI: 00:1e.3
1025 18:38:16.753635 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 18:38:16.757195 scan_generic_bus for PCI: 00:1e.3 done
1027 18:38:16.760414 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1028 18:38:16.763146 PCI: 00:1f.0 scanning...
1029 18:38:16.767050 scan_static_bus for PCI: 00:1f.0
1030 18:38:16.770367 PNP: 0c09.0 enabled
1031 18:38:16.773445 scan_static_bus for PCI: 00:1f.0 done
1032 18:38:16.779638 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1033 18:38:16.783136 PCI: 00:1f.3 scanning...
1034 18:38:16.786628 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1035 18:38:16.790007 PCI: 00:1f.4 scanning...
1036 18:38:16.793324 scan_generic_bus for PCI: 00:1f.4
1037 18:38:16.796054 scan_generic_bus for PCI: 00:1f.4 done
1038 18:38:16.803034 scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs
1039 18:38:16.806420 PCI: 00:1f.5 scanning...
1040 18:38:16.809614 scan_generic_bus for PCI: 00:1f.5
1041 18:38:16.813002 scan_generic_bus for PCI: 00:1f.5 done
1042 18:38:16.819038 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1043 18:38:16.825988 scan_bus: scanning of bus DOMAIN: 0000 took 605234 usecs
1044 18:38:16.828925 scan_static_bus for Root Device done
1045 18:38:16.832191 scan_bus: scanning of bus Root Device took 625112 usecs
1046 18:38:16.835803 done
1047 18:38:16.839096 Chrome EC: UHEPI supported
1048 18:38:16.845933 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 18:38:16.848726 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 18:38:16.855502 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 18:38:16.862331 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 18:38:16.865778 SPI flash protection: WPSW=0 SRP0=1
1053 18:38:16.872039 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 18:38:16.875577 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 18:38:16.879043 found VGA at PCI: 00:02.0
1056 18:38:16.881842 Setting up VGA for PCI: 00:02.0
1057 18:38:16.888840 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 18:38:16.892297 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 18:38:16.894955 Allocating resources...
1060 18:38:16.898440 Reading resources...
1061 18:38:16.901987 Root Device read_resources bus 0 link: 0
1062 18:38:16.905364 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 18:38:16.911519 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 18:38:16.914955 DOMAIN: 0000 read_resources bus 0 link: 0
1065 18:38:16.922484 PCI: 00:14.0 read_resources bus 0 link: 0
1066 18:38:16.925911 USB0 port 0 read_resources bus 0 link: 0
1067 18:38:16.934022 USB0 port 0 read_resources bus 0 link: 0 done
1068 18:38:16.937365 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 18:38:16.944804 PCI: 00:15.0 read_resources bus 1 link: 0
1070 18:38:16.948199 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 18:38:16.954321 PCI: 00:15.1 read_resources bus 2 link: 0
1072 18:38:16.957746 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 18:38:16.965176 PCI: 00:19.0 read_resources bus 3 link: 0
1074 18:38:16.971970 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 18:38:16.975288 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 18:38:16.981568 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 18:38:16.985062 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 18:38:16.991500 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 18:38:16.994944 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 18:38:17.001580 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 18:38:17.004981 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 18:38:17.011254 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 18:38:17.018193 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 18:38:17.021241 Root Device read_resources bus 0 link: 0 done
1085 18:38:17.024586 Done reading resources.
1086 18:38:17.031492 Show resources in subtree (Root Device)...After reading.
1087 18:38:17.034231 Root Device child on link 0 CPU_CLUSTER: 0
1088 18:38:17.037664 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 18:38:17.041186 APIC: 00
1090 18:38:17.041268 APIC: 01
1091 18:38:17.041336 APIC: 05
1092 18:38:17.044082 APIC: 04
1093 18:38:17.044155 APIC: 02
1094 18:38:17.047497 APIC: 06
1095 18:38:17.047584 APIC: 03
1096 18:38:17.047652 APIC: 07
1097 18:38:17.054365 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 18:38:17.064049 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 18:38:17.113515 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 18:38:17.113617 PCI: 00:00.0
1101 18:38:17.113890 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 18:38:17.114150 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 18:38:17.114723 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 18:38:17.115010 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 18:38:17.163335 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 18:38:17.163669 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 18:38:17.163748 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 18:38:17.164012 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 18:38:17.164294 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 18:38:17.212969 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 18:38:17.213702 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 18:38:17.213989 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 18:38:17.214300 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 18:38:17.214386 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 18:38:17.214638 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 18:38:17.249226 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 18:38:17.249353 PCI: 00:02.0
1118 18:38:17.249681 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 18:38:17.253132 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 18:38:17.256053 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 18:38:17.256142 PCI: 00:04.0
1122 18:38:17.256212 PCI: 00:08.0
1123 18:38:17.269289 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 18:38:17.269381 PCI: 00:12.0
1125 18:38:17.278965 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 18:38:17.282353 PCI: 00:14.0 child on link 0 USB0 port 0
1127 18:38:17.292274 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 18:38:17.298611 USB0 port 0 child on link 0 USB2 port 0
1129 18:38:17.298699 USB2 port 0
1130 18:38:17.301892 USB2 port 1
1131 18:38:17.301980 USB2 port 2
1132 18:38:17.305173 USB2 port 3
1133 18:38:17.308601 USB2 port 5
1134 18:38:17.308688 USB2 port 6
1135 18:38:17.312009 USB2 port 9
1136 18:38:17.312096 USB3 port 0
1137 18:38:17.315346 USB3 port 1
1138 18:38:17.315433 USB3 port 2
1139 18:38:17.318139 USB3 port 3
1140 18:38:17.318230 USB3 port 4
1141 18:38:17.321455 PCI: 00:14.2
1142 18:38:17.331609 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 18:38:17.341450 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 18:38:17.341545 PCI: 00:14.3
1145 18:38:17.351062 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 18:38:17.357714 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 18:38:17.367323 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 18:38:17.367411 I2C: 01:15
1149 18:38:17.374303 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 18:38:17.383917 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 18:38:17.384012 I2C: 02:5d
1152 18:38:17.386791 GENERIC: 0.0
1153 18:38:17.386880 PCI: 00:16.0
1154 18:38:17.396659 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 18:38:17.400055 PCI: 00:17.0
1156 18:38:17.406910 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 18:38:17.416625 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 18:38:17.426359 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 18:38:17.433075 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 18:38:17.442646 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 18:38:17.449418 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 18:38:17.455531 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 18:38:17.466025 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 18:38:17.466165 I2C: 03:1a
1165 18:38:17.468807 I2C: 03:38
1166 18:38:17.468895 I2C: 03:39
1167 18:38:17.472341 I2C: 03:3a
1168 18:38:17.472429 I2C: 03:3b
1169 18:38:17.478591 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 18:38:17.485458 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 18:38:17.495273 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 18:38:17.504878 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 18:38:17.508315 PCI: 01:00.0
1174 18:38:17.517979 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 18:38:17.518092 PCI: 00:1e.0
1176 18:38:17.527613 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 18:38:17.537941 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 18:38:17.544165 PCI: 00:1e.2 child on link 0 SPI: 00
1179 18:38:17.553725 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 18:38:17.553820 SPI: 00
1181 18:38:17.557189 PCI: 00:1e.3 child on link 0 SPI: 01
1182 18:38:17.567060 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 18:38:17.570521 SPI: 01
1184 18:38:17.573964 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 18:38:17.583465 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 18:38:17.590501 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 18:38:17.593292 PNP: 0c09.0
1188 18:38:17.602898 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 18:38:17.603010 PCI: 00:1f.3
1190 18:38:17.612936 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 18:38:17.622964 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 18:38:17.625752 PCI: 00:1f.4
1193 18:38:17.636070 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 18:38:17.645753 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 18:38:17.645881 PCI: 00:1f.5
1196 18:38:17.655199 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 18:38:17.661639 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 18:38:17.668606 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 18:38:17.674775 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 18:38:17.678043 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 18:38:17.681543 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 18:38:17.684841 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 18:38:17.688345 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 18:38:17.694556 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 18:38:17.701447 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 18:38:17.711071 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 18:38:17.717196 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 18:38:17.724014 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 18:38:17.730570 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 18:38:17.736857 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 18:38:17.740536 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 18:38:17.746691 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 18:38:17.750104 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 18:38:17.756407 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 18:38:17.759646 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 18:38:17.766568 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 18:38:17.769999 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 18:38:17.776379 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 18:38:17.779311 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 18:38:17.785990 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 18:38:17.789507 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 18:38:17.795771 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 18:38:17.799223 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 18:38:17.805607 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 18:38:17.809028 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 18:38:17.815317 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 18:38:17.818659 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 18:38:17.825033 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 18:38:17.828281 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 18:38:17.835143 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 18:38:17.838592 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 18:38:17.845231 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 18:38:17.847850 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 18:38:17.858274 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 18:38:17.861500 avoid_fixed_resources: DOMAIN: 0000
1236 18:38:17.867719 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 18:38:17.874101 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 18:38:17.880836 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 18:38:17.887154 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 18:38:17.897447 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 18:38:17.903668 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 18:38:17.910519 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 18:38:17.920121 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 18:38:17.926423 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 18:38:17.933252 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 18:38:17.940117 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 18:38:17.949792 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 18:38:17.949949 Setting resources...
1249 18:38:17.956157 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 18:38:17.959568 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 18:38:17.965763 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 18:38:17.969218 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 18:38:17.972673 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 18:38:17.979055 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 18:38:17.985481 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 18:38:17.992232 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 18:38:17.998621 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 18:38:18.005420 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 18:38:18.008849 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 18:38:18.014875 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 18:38:18.018280 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 18:38:18.024983 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 18:38:18.028219 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 18:38:18.034462 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 18:38:18.037807 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 18:38:18.044185 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 18:38:18.047489 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 18:38:18.054320 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 18:38:18.057635 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 18:38:18.064487 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 18:38:18.067807 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 18:38:18.073990 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 18:38:18.077405 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 18:38:18.084386 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 18:38:18.087534 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 18:38:18.093673 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 18:38:18.097197 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 18:38:18.100081 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 18:38:18.106784 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 18:38:18.110365 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 18:38:18.120243 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 18:38:18.126274 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 18:38:18.133199 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 18:38:18.139896 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 18:38:18.145913 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 18:38:18.152872 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 18:38:18.159078 Root Device assign_resources, bus 0 link: 0
1288 18:38:18.162307 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 18:38:18.172381 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 18:38:18.179163 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 18:38:18.188507 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 18:38:18.195605 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 18:38:18.204881 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 18:38:18.211763 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 18:38:18.217800 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 18:38:18.221282 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 18:38:18.231158 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 18:38:18.237739 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 18:38:18.247176 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 18:38:18.253949 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 18:38:18.257524 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 18:38:18.264316 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 18:38:18.270370 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 18:38:18.276991 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 18:38:18.280433 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 18:38:18.290306 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 18:38:18.296412 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 18:38:18.306541 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 18:38:18.313004 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 18:38:18.319264 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 18:38:18.329388 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 18:38:18.336176 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 18:38:18.345697 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 18:38:18.348575 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 18:38:18.351966 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 18:38:18.362344 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 18:38:18.371793 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 18:38:18.378570 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 18:38:18.384781 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 18:38:18.391685 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 18:38:18.398468 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 18:38:18.404357 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 18:38:18.414251 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 18:38:18.417768 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 18:38:18.424605 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 18:38:18.431215 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 18:38:18.434046 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 18:38:18.440971 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 18:38:18.444389 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 18:38:18.451293 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 18:38:18.454633 LPC: Trying to open IO window from 800 size 1ff
1332 18:38:18.463949 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 18:38:18.470562 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 18:38:18.480898 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 18:38:18.487028 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 18:38:18.493651 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 18:38:18.496528 Root Device assign_resources, bus 0 link: 0
1338 18:38:18.499893 Done setting resources.
1339 18:38:18.506584 Show resources in subtree (Root Device)...After assigning values.
1340 18:38:18.510075 Root Device child on link 0 CPU_CLUSTER: 0
1341 18:38:18.516286 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 18:38:18.516372 APIC: 00
1343 18:38:18.516441 APIC: 01
1344 18:38:18.519895 APIC: 05
1345 18:38:18.519980 APIC: 04
1346 18:38:18.520047 APIC: 02
1347 18:38:18.522635 APIC: 06
1348 18:38:18.522720 APIC: 03
1349 18:38:18.525996 APIC: 07
1350 18:38:18.529328 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 18:38:18.539660 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 18:38:18.549132 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 18:38:18.552598 PCI: 00:00.0
1354 18:38:18.562632 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 18:38:18.572459 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 18:38:18.578561 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 18:38:18.588238 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 18:38:18.598535 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 18:38:18.608243 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 18:38:18.617903 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 18:38:18.627637 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 18:38:18.637398 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 18:38:18.644342 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 18:38:18.653836 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 18:38:18.663960 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 18:38:18.673515 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 18:38:18.683098 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 18:38:18.693521 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 18:38:18.703057 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 18:38:18.703167 PCI: 00:02.0
1371 18:38:18.712683 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 18:38:18.725890 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 18:38:18.732601 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 18:38:18.735308 PCI: 00:04.0
1375 18:38:18.735396 PCI: 00:08.0
1376 18:38:18.748326 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 18:38:18.748419 PCI: 00:12.0
1378 18:38:18.758612 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 18:38:18.765163 PCI: 00:14.0 child on link 0 USB0 port 0
1380 18:38:18.774680 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 18:38:18.778189 USB0 port 0 child on link 0 USB2 port 0
1382 18:38:18.781624 USB2 port 0
1383 18:38:18.781712 USB2 port 1
1384 18:38:18.785139 USB2 port 2
1385 18:38:18.785285 USB2 port 3
1386 18:38:18.788031 USB2 port 5
1387 18:38:18.788133 USB2 port 6
1388 18:38:18.791691 USB2 port 9
1389 18:38:18.791780 USB3 port 0
1390 18:38:18.794328 USB3 port 1
1391 18:38:18.794440 USB3 port 2
1392 18:38:18.797764 USB3 port 3
1393 18:38:18.801262 USB3 port 4
1394 18:38:18.801340 PCI: 00:14.2
1395 18:38:18.810775 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 18:38:18.820474 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 18:38:18.823846 PCI: 00:14.3
1398 18:38:18.833968 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 18:38:18.837270 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 18:38:18.847328 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 18:38:18.850355 I2C: 01:15
1402 18:38:18.853583 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 18:38:18.863206 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 18:38:18.866638 I2C: 02:5d
1405 18:38:18.866727 GENERIC: 0.0
1406 18:38:18.869902 PCI: 00:16.0
1407 18:38:18.879549 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 18:38:18.883003 PCI: 00:17.0
1409 18:38:18.893125 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 18:38:18.902964 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 18:38:18.912391 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 18:38:18.919328 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 18:38:18.928955 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 18:38:18.938562 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 18:38:18.945358 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 18:38:18.955186 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 18:38:18.955284 I2C: 03:1a
1418 18:38:18.958483 I2C: 03:38
1419 18:38:18.958622 I2C: 03:39
1420 18:38:18.961902 I2C: 03:3a
1421 18:38:18.962008 I2C: 03:3b
1422 18:38:18.964775 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 18:38:18.974383 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 18:38:18.984867 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 18:38:18.997199 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 18:38:18.997341 PCI: 01:00.0
1427 18:38:19.007798 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 18:38:19.010504 PCI: 00:1e.0
1429 18:38:19.020326 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 18:38:19.030364 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 18:38:19.036647 PCI: 00:1e.2 child on link 0 SPI: 00
1432 18:38:19.046792 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 18:38:19.046937 SPI: 00
1434 18:38:19.049586 PCI: 00:1e.3 child on link 0 SPI: 01
1435 18:38:19.059400 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 18:38:19.063044 SPI: 01
1437 18:38:19.065758 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 18:38:19.075708 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 18:38:19.085985 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 18:38:19.086140 PNP: 0c09.0
1441 18:38:19.095678 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 18:38:19.095771 PCI: 00:1f.3
1443 18:38:19.105409 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 18:38:19.118638 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 18:38:19.118736 PCI: 00:1f.4
1446 18:38:19.128748 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 18:38:19.138510 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 18:38:19.138634 PCI: 00:1f.5
1449 18:38:19.151096 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 18:38:19.151187 Done allocating resources.
1451 18:38:19.158011 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 18:38:19.161405 Enabling resources...
1453 18:38:19.164178 PCI: 00:00.0 subsystem <- 8086/9b61
1454 18:38:19.167441 PCI: 00:00.0 cmd <- 06
1455 18:38:19.170923 PCI: 00:02.0 subsystem <- 8086/9b41
1456 18:38:19.174322 PCI: 00:02.0 cmd <- 03
1457 18:38:19.177153 PCI: 00:08.0 cmd <- 06
1458 18:38:19.180748 PCI: 00:12.0 subsystem <- 8086/02f9
1459 18:38:19.184111 PCI: 00:12.0 cmd <- 02
1460 18:38:19.187010 PCI: 00:14.0 subsystem <- 8086/02ed
1461 18:38:19.190387 PCI: 00:14.0 cmd <- 02
1462 18:38:19.190468 PCI: 00:14.2 cmd <- 02
1463 18:38:19.197177 PCI: 00:14.3 subsystem <- 8086/02f0
1464 18:38:19.197259 PCI: 00:14.3 cmd <- 02
1465 18:38:19.203742 PCI: 00:15.0 subsystem <- 8086/02e8
1466 18:38:19.203822 PCI: 00:15.0 cmd <- 02
1467 18:38:19.207241 PCI: 00:15.1 subsystem <- 8086/02e9
1468 18:38:19.209920 PCI: 00:15.1 cmd <- 02
1469 18:38:19.213590 PCI: 00:16.0 subsystem <- 8086/02e0
1470 18:38:19.216963 PCI: 00:16.0 cmd <- 02
1471 18:38:19.220480 PCI: 00:17.0 subsystem <- 8086/02d3
1472 18:38:19.223118 PCI: 00:17.0 cmd <- 03
1473 18:38:19.226677 PCI: 00:19.0 subsystem <- 8086/02c5
1474 18:38:19.229553 PCI: 00:19.0 cmd <- 02
1475 18:38:19.232999 PCI: 00:1d.0 bridge ctrl <- 0013
1476 18:38:19.236494 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 18:38:19.239334 PCI: 00:1d.0 cmd <- 06
1478 18:38:19.243000 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 18:38:19.246363 PCI: 00:1e.0 cmd <- 06
1480 18:38:19.249633 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 18:38:19.252550 PCI: 00:1e.2 cmd <- 06
1482 18:38:19.255900 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 18:38:19.259375 PCI: 00:1e.3 cmd <- 02
1484 18:38:19.262687 PCI: 00:1f.0 subsystem <- 8086/0284
1485 18:38:19.265517 PCI: 00:1f.0 cmd <- 407
1486 18:38:19.268977 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 18:38:19.269063 PCI: 00:1f.3 cmd <- 02
1488 18:38:19.275418 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 18:38:19.275505 PCI: 00:1f.4 cmd <- 03
1490 18:38:19.278700 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 18:38:19.282295 PCI: 00:1f.5 cmd <- 406
1492 18:38:19.292085 PCI: 01:00.0 cmd <- 02
1493 18:38:19.297462 done.
1494 18:38:19.308724 ME: Version: 14.0.39.1367
1495 18:38:19.315075 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 11
1496 18:38:19.318439 Initializing devices...
1497 18:38:19.318519 Root Device init ...
1498 18:38:19.325378 Chrome EC: Set SMI mask to 0x0000000000000000
1499 18:38:19.331093 Chrome EC: clear events_b mask to 0x0000000000000000
1500 18:38:19.334520 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 18:38:19.341062 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 18:38:19.347997 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 18:38:19.350780 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 18:38:19.357877 Root Device init finished in 35214 usecs
1505 18:38:19.360576 CPU_CLUSTER: 0 init ...
1506 18:38:19.363896 CPU_CLUSTER: 0 init finished in 2445 usecs
1507 18:38:19.369950 PCI: 00:00.0 init ...
1508 18:38:19.373004 CPU TDP: 15 Watts
1509 18:38:19.375741 CPU PL2 = 64 Watts
1510 18:38:19.379362 PCI: 00:00.0 init finished in 7078 usecs
1511 18:38:19.382162 PCI: 00:02.0 init ...
1512 18:38:19.385596 PCI: 00:02.0 init finished in 2253 usecs
1513 18:38:19.389187 PCI: 00:08.0 init ...
1514 18:38:19.391819 PCI: 00:08.0 init finished in 2252 usecs
1515 18:38:19.395392 PCI: 00:12.0 init ...
1516 18:38:19.398748 PCI: 00:12.0 init finished in 2251 usecs
1517 18:38:19.401430 PCI: 00:14.0 init ...
1518 18:38:19.405031 PCI: 00:14.0 init finished in 2252 usecs
1519 18:38:19.408456 PCI: 00:14.2 init ...
1520 18:38:19.411239 PCI: 00:14.2 init finished in 2252 usecs
1521 18:38:19.414752 PCI: 00:14.3 init ...
1522 18:38:19.418267 PCI: 00:14.3 init finished in 2270 usecs
1523 18:38:19.421611 PCI: 00:15.0 init ...
1524 18:38:19.424953 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 18:38:19.431839 PCI: 00:15.0 init finished in 5974 usecs
1526 18:38:19.431926 PCI: 00:15.1 init ...
1527 18:38:19.438242 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 18:38:19.441693 PCI: 00:15.1 init finished in 5966 usecs
1529 18:38:19.444566 PCI: 00:16.0 init ...
1530 18:38:19.447973 PCI: 00:16.0 init finished in 2252 usecs
1531 18:38:19.451371 PCI: 00:19.0 init ...
1532 18:38:19.454336 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 18:38:19.457709 PCI: 00:19.0 init finished in 5977 usecs
1534 18:38:19.461254 PCI: 00:1d.0 init ...
1535 18:38:19.463905 Initializing PCH PCIe bridge.
1536 18:38:19.467385 PCI: 00:1d.0 init finished in 5282 usecs
1537 18:38:19.470870 PCI: 00:1f.0 init ...
1538 18:38:19.474435 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 18:38:19.480776 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 18:38:19.481001 IOAPIC: ID = 0x02
1541 18:38:19.484424 IOAPIC: Dumping registers
1542 18:38:19.487895 reg 0x0000: 0x02000000
1543 18:38:19.490730 reg 0x0001: 0x00770020
1544 18:38:19.494391 reg 0x0002: 0x00000000
1545 18:38:19.497255 PCI: 00:1f.0 init finished in 23538 usecs
1546 18:38:19.500744 PCI: 00:1f.4 init ...
1547 18:38:19.504082 PCI: 00:1f.4 init finished in 2261 usecs
1548 18:38:19.515586 PCI: 01:00.0 init ...
1549 18:38:19.519119 PCI: 01:00.0 init finished in 2251 usecs
1550 18:38:19.523432 PNP: 0c09.0 init ...
1551 18:38:19.529539 Google Chrome EC uptime: 11.093 seconds
1552 18:38:19.532994 Google Chrome AP resets since EC boot: 0
1553 18:38:19.535906 Google Chrome most recent AP reset causes:
1554 18:38:19.542882 Google Chrome EC reset flags at last EC boot: reset-pin
1555 18:38:19.545814 PNP: 0c09.0 init finished in 20588 usecs
1556 18:38:19.549148 Devices initialized
1557 18:38:19.552804 Show all devs... After init.
1558 18:38:19.553230 Root Device: enabled 1
1559 18:38:19.556282 CPU_CLUSTER: 0: enabled 1
1560 18:38:19.559037 DOMAIN: 0000: enabled 1
1561 18:38:19.562500 APIC: 00: enabled 1
1562 18:38:19.562914 PCI: 00:00.0: enabled 1
1563 18:38:19.565854 PCI: 00:02.0: enabled 1
1564 18:38:19.569168 PCI: 00:04.0: enabled 0
1565 18:38:19.569609 PCI: 00:05.0: enabled 0
1566 18:38:19.571905 PCI: 00:12.0: enabled 1
1567 18:38:19.575474 PCI: 00:12.5: enabled 0
1568 18:38:19.579024 PCI: 00:12.6: enabled 0
1569 18:38:19.579477 PCI: 00:14.0: enabled 1
1570 18:38:19.582493 PCI: 00:14.1: enabled 0
1571 18:38:19.585085 PCI: 00:14.3: enabled 1
1572 18:38:19.588745 PCI: 00:14.5: enabled 0
1573 18:38:19.589259 PCI: 00:15.0: enabled 1
1574 18:38:19.592302 PCI: 00:15.1: enabled 1
1575 18:38:19.595013 PCI: 00:15.2: enabled 0
1576 18:38:19.598511 PCI: 00:15.3: enabled 0
1577 18:38:19.598954 PCI: 00:16.0: enabled 1
1578 18:38:19.601721 PCI: 00:16.1: enabled 0
1579 18:38:19.605453 PCI: 00:16.2: enabled 0
1580 18:38:19.608023 PCI: 00:16.3: enabled 0
1581 18:38:19.608515 PCI: 00:16.4: enabled 0
1582 18:38:19.611645 PCI: 00:16.5: enabled 0
1583 18:38:19.615276 PCI: 00:17.0: enabled 1
1584 18:38:19.618024 PCI: 00:19.0: enabled 1
1585 18:38:19.618520 PCI: 00:19.1: enabled 0
1586 18:38:19.621652 PCI: 00:19.2: enabled 0
1587 18:38:19.624455 PCI: 00:1a.0: enabled 0
1588 18:38:19.628089 PCI: 00:1c.0: enabled 0
1589 18:38:19.628604 PCI: 00:1c.1: enabled 0
1590 18:38:19.630779 PCI: 00:1c.2: enabled 0
1591 18:38:19.634176 PCI: 00:1c.3: enabled 0
1592 18:38:19.637794 PCI: 00:1c.4: enabled 0
1593 18:38:19.638244 PCI: 00:1c.5: enabled 0
1594 18:38:19.640647 PCI: 00:1c.6: enabled 0
1595 18:38:19.644024 PCI: 00:1c.7: enabled 0
1596 18:38:19.647674 PCI: 00:1d.0: enabled 1
1597 18:38:19.648088 PCI: 00:1d.1: enabled 0
1598 18:38:19.650423 PCI: 00:1d.2: enabled 0
1599 18:38:19.654125 PCI: 00:1d.3: enabled 0
1600 18:38:19.656969 PCI: 00:1d.4: enabled 0
1601 18:38:19.657336 PCI: 00:1d.5: enabled 0
1602 18:38:19.660382 PCI: 00:1e.0: enabled 1
1603 18:38:19.663953 PCI: 00:1e.1: enabled 0
1604 18:38:19.666880 PCI: 00:1e.2: enabled 1
1605 18:38:19.667286 PCI: 00:1e.3: enabled 1
1606 18:38:19.670151 PCI: 00:1f.0: enabled 1
1607 18:38:19.673768 PCI: 00:1f.1: enabled 0
1608 18:38:19.674208 PCI: 00:1f.2: enabled 0
1609 18:38:19.676997 PCI: 00:1f.3: enabled 1
1610 18:38:19.679708 PCI: 00:1f.4: enabled 1
1611 18:38:19.683181 PCI: 00:1f.5: enabled 1
1612 18:38:19.683587 PCI: 00:1f.6: enabled 0
1613 18:38:19.686778 USB0 port 0: enabled 1
1614 18:38:19.690250 I2C: 01:15: enabled 1
1615 18:38:19.693108 I2C: 02:5d: enabled 1
1616 18:38:19.693592 GENERIC: 0.0: enabled 1
1617 18:38:19.696474 I2C: 03:1a: enabled 1
1618 18:38:19.699907 I2C: 03:38: enabled 1
1619 18:38:19.700382 I2C: 03:39: enabled 1
1620 18:38:19.703284 I2C: 03:3a: enabled 1
1621 18:38:19.706650 I2C: 03:3b: enabled 1
1622 18:38:19.707094 PCI: 00:00.0: enabled 1
1623 18:38:19.709583 SPI: 00: enabled 1
1624 18:38:19.712511 SPI: 01: enabled 1
1625 18:38:19.712933 PNP: 0c09.0: enabled 1
1626 18:38:19.715915 USB2 port 0: enabled 1
1627 18:38:19.719185 USB2 port 1: enabled 1
1628 18:38:19.719612 USB2 port 2: enabled 0
1629 18:38:19.722864 USB2 port 3: enabled 0
1630 18:38:19.725537 USB2 port 5: enabled 0
1631 18:38:19.728927 USB2 port 6: enabled 1
1632 18:38:19.729451 USB2 port 9: enabled 1
1633 18:38:19.732422 USB3 port 0: enabled 1
1634 18:38:19.735908 USB3 port 1: enabled 1
1635 18:38:19.736440 USB3 port 2: enabled 1
1636 18:38:19.739371 USB3 port 3: enabled 1
1637 18:38:19.742404 USB3 port 4: enabled 0
1638 18:38:19.742823 APIC: 01: enabled 1
1639 18:38:19.745708 APIC: 05: enabled 1
1640 18:38:19.748763 APIC: 04: enabled 1
1641 18:38:19.749192 APIC: 02: enabled 1
1642 18:38:19.752447 APIC: 06: enabled 1
1643 18:38:19.755651 APIC: 03: enabled 1
1644 18:38:19.756129 APIC: 07: enabled 1
1645 18:38:19.759174 PCI: 00:08.0: enabled 1
1646 18:38:19.761967 PCI: 00:14.2: enabled 1
1647 18:38:19.762476 PCI: 01:00.0: enabled 1
1648 18:38:19.766899 Disabling ACPI via APMC:
1649 18:38:19.771103 done.
1650 18:38:19.773671 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 18:38:19.777126 ELOG: NV offset 0xaf0000 size 0x4000
1652 18:38:19.784873 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 18:38:19.791031 ELOG: Event(17) added with size 13 at 2023-02-25 18:38:18 UTC
1654 18:38:19.798132 POST: Unexpected post code in previous boot: 0x73
1655 18:38:19.804026 ELOG: Event(A3) added with size 11 at 2023-02-25 18:38:18 UTC
1656 18:38:19.810843 ELOG: Event(A6) added with size 13 at 2023-02-25 18:38:18 UTC
1657 18:38:19.817061 ELOG: Event(92) added with size 9 at 2023-02-25 18:38:18 UTC
1658 18:38:19.824176 ELOG: Event(93) added with size 9 at 2023-02-25 18:38:18 UTC
1659 18:38:19.830211 ELOG: Event(9A) added with size 9 at 2023-02-25 18:38:18 UTC
1660 18:38:19.836548 ELOG: Event(9E) added with size 10 at 2023-02-25 18:38:18 UTC
1661 18:38:19.840004 ELOG: Event(9F) added with size 14 at 2023-02-25 18:38:18 UTC
1662 18:38:19.846394 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1663 18:38:19.852364 ELOG: Event(A1) added with size 10 at 2023-02-25 18:38:18 UTC
1664 18:38:19.862125 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1665 18:38:19.865608 ELOG: Event(A0) added with size 9 at 2023-02-25 18:38:18 UTC
1666 18:38:19.872085 elog_add_boot_reason: Logged dev mode boot
1667 18:38:19.872173 Finalize devices...
1668 18:38:19.875384 PCI: 00:17.0 final
1669 18:38:19.878848 Devices finalized
1670 18:38:19.882449 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1671 18:38:19.888863 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1672 18:38:19.891671 ME: HFSTS1 : 0x90000245
1673 18:38:19.895277 ME: HFSTS2 : 0x3B850126
1674 18:38:19.902254 ME: HFSTS3 : 0x00000020
1675 18:38:19.904866 ME: HFSTS4 : 0x00004800
1676 18:38:19.908393 ME: HFSTS5 : 0x00000000
1677 18:38:19.911782 ME: HFSTS6 : 0x40400006
1678 18:38:19.914651 ME: Manufacturing Mode : NO
1679 18:38:19.918194 ME: FW Partition Table : OK
1680 18:38:19.921672 ME: Bringup Loader Failure : NO
1681 18:38:19.924411 ME: Firmware Init Complete : YES
1682 18:38:19.927959 ME: Boot Options Present : NO
1683 18:38:19.930678 ME: Update In Progress : NO
1684 18:38:19.937860 ME: D0i3 Support : YES
1685 18:38:19.940535 ME: Low Power State Enabled : NO
1686 18:38:19.944217 ME: CPU Replaced : NO
1687 18:38:19.947662 ME: CPU Replacement Valid : YES
1688 18:38:19.950490 ME: Current Working State : 5
1689 18:38:19.954040 ME: Current Operation State : 1
1690 18:38:19.957550 ME: Current Operation Mode : 0
1691 18:38:19.960117 ME: Error Code : 0
1692 18:38:19.963811 ME: CPU Debug Disabled : YES
1693 18:38:19.967347 ME: TXT Support : NO
1694 18:38:19.970244 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1695 18:38:19.976992 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1696 18:38:19.980427 CBFS @ c08000 size 3f8000
1697 18:38:19.984001 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1698 18:38:19.986622 CBFS: Locating 'fallback/dsdt.aml'
1699 18:38:19.993511 CBFS: Found @ offset 10bb80 size 3fa5
1700 18:38:19.997165 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 18:38:20.000628 CBFS @ c08000 size 3f8000
1702 18:38:20.006923 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 18:38:20.010292 CBFS: Locating 'fallback/slic'
1704 18:38:20.013897 CBFS: 'fallback/slic' not found.
1705 18:38:20.020289 ACPI: Writing ACPI tables at 99b3e000.
1706 18:38:20.020684 ACPI: * FACS
1707 18:38:20.023825 ACPI: * DSDT
1708 18:38:20.026596 Ramoops buffer: 0x100000@0x99a3d000.
1709 18:38:20.030012 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1710 18:38:20.036724 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1711 18:38:20.039403 Google Chrome EC: version:
1712 18:38:20.042693 ro: helios_v2.0.2659-56403530b
1713 18:38:20.046151 rw: helios_v2.0.2849-c41de27e7d
1714 18:38:20.046564 running image: 1
1715 18:38:20.050521 ACPI: * FADT
1716 18:38:20.050940 SCI is IRQ9
1717 18:38:20.057188 ACPI: added table 1/32, length now 40
1718 18:38:20.057639 ACPI: * SSDT
1719 18:38:20.060519 Found 1 CPU(s) with 8 core(s) each.
1720 18:38:20.063446 Error: Could not locate 'wifi_sar' in VPD.
1721 18:38:20.070385 Checking CBFS for default SAR values
1722 18:38:20.073248 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1723 18:38:20.076887 CBFS @ c08000 size 3f8000
1724 18:38:20.083013 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1725 18:38:20.086447 CBFS: Locating 'wifi_sar_defaults.hex'
1726 18:38:20.089903 CBFS: Found @ offset 5fac0 size 77
1727 18:38:20.093375 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1728 18:38:20.099669 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1729 18:38:20.102507 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1730 18:38:20.109324 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1731 18:38:20.112614 failed to find key in VPD: dsm_calib_r0_0
1732 18:38:20.122389 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1733 18:38:20.125696 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1734 18:38:20.132091 failed to find key in VPD: dsm_calib_r0_1
1735 18:38:20.139039 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1736 18:38:20.145380 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1737 18:38:20.148952 failed to find key in VPD: dsm_calib_r0_2
1738 18:38:20.158562 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1739 18:38:20.164750 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1740 18:38:20.168334 failed to find key in VPD: dsm_calib_r0_3
1741 18:38:20.177504 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1742 18:38:20.181237 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1743 18:38:20.187508 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1744 18:38:20.191124 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1745 18:38:20.194531 EC returned error result code 1
1746 18:38:20.198205 EC returned error result code 1
1747 18:38:20.201143 EC returned error result code 1
1748 18:38:20.207764 PS2K: Bad resp from EC. Vivaldi disabled!
1749 18:38:20.211389 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1750 18:38:20.217579 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1751 18:38:20.223874 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1752 18:38:20.227444 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1753 18:38:20.234241 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1754 18:38:20.240733 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1755 18:38:20.244384 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1756 18:38:20.250457 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1757 18:38:20.254007 ACPI: added table 2/32, length now 44
1758 18:38:20.257000 ACPI: * MCFG
1759 18:38:20.260485 ACPI: added table 3/32, length now 48
1760 18:38:20.264082 ACPI: * TPM2
1761 18:38:20.264497 TPM2 log created at 99a2d000
1762 18:38:20.270364 ACPI: added table 4/32, length now 52
1763 18:38:20.270856 ACPI: * MADT
1764 18:38:20.273948 SCI is IRQ9
1765 18:38:20.276702 ACPI: added table 5/32, length now 56
1766 18:38:20.277122 current = 99b43ac0
1767 18:38:20.280265 ACPI: * DMAR
1768 18:38:20.283625 ACPI: added table 6/32, length now 60
1769 18:38:20.286464 ACPI: * IGD OpRegion
1770 18:38:20.286881 GMA: Found VBT in CBFS
1771 18:38:20.289774 GMA: Found valid VBT in CBFS
1772 18:38:20.293343 ACPI: added table 7/32, length now 64
1773 18:38:20.296236 ACPI: * HPET
1774 18:38:20.299715 ACPI: added table 8/32, length now 68
1775 18:38:20.303273 ACPI: done.
1776 18:38:20.303689 ACPI tables: 31744 bytes.
1777 18:38:20.306088 smbios_write_tables: 99a2c000
1778 18:38:20.309287 EC returned error result code 3
1779 18:38:20.315546 Couldn't obtain OEM name from CBI
1780 18:38:20.316034 Create SMBIOS type 17
1781 18:38:20.318967 PCI: 00:00.0 (Intel Cannonlake)
1782 18:38:20.322599 PCI: 00:14.3 (Intel WiFi)
1783 18:38:20.326042 SMBIOS tables: 939 bytes.
1784 18:38:20.328889 Writing table forward entry at 0x00000500
1785 18:38:20.335138 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1786 18:38:20.338873 Writing coreboot table at 0x99b62000
1787 18:38:20.345138 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1788 18:38:20.348503 1. 0000000000001000-000000000009ffff: RAM
1789 18:38:20.354785 2. 00000000000a0000-00000000000fffff: RESERVED
1790 18:38:20.358311 3. 0000000000100000-0000000099a2bfff: RAM
1791 18:38:20.364555 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1792 18:38:20.368071 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1793 18:38:20.374282 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1794 18:38:20.381385 7. 000000009a000000-000000009f7fffff: RESERVED
1795 18:38:20.384478 8. 00000000e0000000-00000000efffffff: RESERVED
1796 18:38:20.391340 9. 00000000fc000000-00000000fc000fff: RESERVED
1797 18:38:20.394048 10. 00000000fe000000-00000000fe00ffff: RESERVED
1798 18:38:20.397692 11. 00000000fed10000-00000000fed17fff: RESERVED
1799 18:38:20.403912 12. 00000000fed80000-00000000fed83fff: RESERVED
1800 18:38:20.407415 13. 00000000fed90000-00000000fed91fff: RESERVED
1801 18:38:20.413714 14. 00000000feda0000-00000000feda1fff: RESERVED
1802 18:38:20.416933 15. 0000000100000000-000000045e7fffff: RAM
1803 18:38:20.420474 Graphics framebuffer located at 0xc0000000
1804 18:38:20.423836 Passing 5 GPIOs to payload:
1805 18:38:20.430315 NAME | PORT | POLARITY | VALUE
1806 18:38:20.436617 write protect | undefined | high | low
1807 18:38:20.440415 lid | undefined | high | high
1808 18:38:20.446603 power | undefined | high | low
1809 18:38:20.449866 oprom | undefined | high | low
1810 18:38:20.456630 EC in RW | 0x000000cb | high | low
1811 18:38:20.457050 Board ID: 4
1812 18:38:20.463051 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1813 18:38:20.465830 CBFS @ c08000 size 3f8000
1814 18:38:20.472628 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1815 18:38:20.476153 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1816 18:38:20.479509 coreboot table: 1492 bytes.
1817 18:38:20.482510 IMD ROOT 0. 99fff000 00001000
1818 18:38:20.485951 IMD SMALL 1. 99ffe000 00001000
1819 18:38:20.488679 FSP MEMORY 2. 99c4e000 003b0000
1820 18:38:20.492114 CONSOLE 3. 99c2e000 00020000
1821 18:38:20.495719 FMAP 4. 99c2d000 0000054e
1822 18:38:20.498538 TIME STAMP 5. 99c2c000 00000910
1823 18:38:20.502051 VBOOT WORK 6. 99c18000 00014000
1824 18:38:20.505617 MRC DATA 7. 99c16000 00001958
1825 18:38:20.508299 ROMSTG STCK 8. 99c15000 00001000
1826 18:38:20.511863 AFTER CAR 9. 99c0b000 0000a000
1827 18:38:20.515295 RAMSTAGE 10. 99baf000 0005c000
1828 18:38:20.518053 REFCODE 11. 99b7a000 00035000
1829 18:38:20.525406 SMM BACKUP 12. 99b6a000 00010000
1830 18:38:20.528139 COREBOOT 13. 99b62000 00008000
1831 18:38:20.531471 ACPI 14. 99b3e000 00024000
1832 18:38:20.534978 ACPI GNVS 15. 99b3d000 00001000
1833 18:38:20.538501 RAMOOPS 16. 99a3d000 00100000
1834 18:38:20.541253 TPM2 TCGLOG17. 99a2d000 00010000
1835 18:38:20.544984 SMBIOS 18. 99a2c000 00000800
1836 18:38:20.545398 IMD small region:
1837 18:38:20.547688 IMD ROOT 0. 99ffec00 00000400
1838 18:38:20.551147 FSP RUNTIME 1. 99ffebe0 00000004
1839 18:38:20.554723 EC HOSTEVENT 2. 99ffebc0 00000008
1840 18:38:20.557535 POWER STATE 3. 99ffeb80 00000040
1841 18:38:20.564692 ROMSTAGE 4. 99ffeb60 00000004
1842 18:38:20.567522 MEM INFO 5. 99ffe9a0 000001b9
1843 18:38:20.571264 VPD 6. 99ffe920 0000006c
1844 18:38:20.574159 MTRR: Physical address space:
1845 18:38:20.580325 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1846 18:38:20.584194 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1847 18:38:20.590168 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1848 18:38:20.597241 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1849 18:38:20.603724 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1850 18:38:20.610126 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1851 18:38:20.616483 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1852 18:38:20.619544 MTRR: Fixed MSR 0x250 0x0606060606060606
1853 18:38:20.626392 MTRR: Fixed MSR 0x258 0x0606060606060606
1854 18:38:20.629319 MTRR: Fixed MSR 0x259 0x0000000000000000
1855 18:38:20.632762 MTRR: Fixed MSR 0x268 0x0606060606060606
1856 18:38:20.636334 MTRR: Fixed MSR 0x269 0x0606060606060606
1857 18:38:20.642656 MTRR: Fixed MSR 0x26a 0x0606060606060606
1858 18:38:20.645598 MTRR: Fixed MSR 0x26b 0x0606060606060606
1859 18:38:20.649157 MTRR: Fixed MSR 0x26c 0x0606060606060606
1860 18:38:20.652547 MTRR: Fixed MSR 0x26d 0x0606060606060606
1861 18:38:20.658927 MTRR: Fixed MSR 0x26e 0x0606060606060606
1862 18:38:20.662368 MTRR: Fixed MSR 0x26f 0x0606060606060606
1863 18:38:20.665352 call enable_fixed_mtrr()
1864 18:38:20.668952 CPU physical address size: 39 bits
1865 18:38:20.672416 MTRR: default type WB/UC MTRR counts: 6/8.
1866 18:38:20.675331 MTRR: WB selected as default type.
1867 18:38:20.682146 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1868 18:38:20.688449 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1869 18:38:20.694788 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1870 18:38:20.701558 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1871 18:38:20.707697 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1872 18:38:20.714853 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1873 18:38:20.717585 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 18:38:20.721002 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 18:38:20.727933 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 18:38:20.730559 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 18:38:20.734099 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 18:38:20.737596 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 18:38:20.744138 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 18:38:20.747423 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 18:38:20.750212 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 18:38:20.753655 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 18:38:20.760491 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 18:38:20.760911
1885 18:38:20.761241 MTRR check
1886 18:38:20.763395 Fixed MTRRs : Enabled
1887 18:38:20.766845 Variable MTRRs: Enabled
1888 18:38:20.767431
1889 18:38:20.770304 call enable_fixed_mtrr()
1890 18:38:20.773203 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1891 18:38:20.776676 CPU physical address size: 39 bits
1892 18:38:20.782978 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1893 18:38:20.786573 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 18:38:20.789956 MTRR: Fixed MSR 0x258 0x0606060606060606
1895 18:38:20.796364 MTRR: Fixed MSR 0x259 0x0000000000000000
1896 18:38:20.799853 MTRR: Fixed MSR 0x268 0x0606060606060606
1897 18:38:20.803255 MTRR: Fixed MSR 0x269 0x0606060606060606
1898 18:38:20.806581 MTRR: Fixed MSR 0x26a 0x0606060606060606
1899 18:38:20.812706 MTRR: Fixed MSR 0x26b 0x0606060606060606
1900 18:38:20.816416 MTRR: Fixed MSR 0x26c 0x0606060606060606
1901 18:38:20.819126 MTRR: Fixed MSR 0x26d 0x0606060606060606
1902 18:38:20.822719 MTRR: Fixed MSR 0x26e 0x0606060606060606
1903 18:38:20.829429 MTRR: Fixed MSR 0x26f 0x0606060606060606
1904 18:38:20.832092 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 18:38:20.835439 call enable_fixed_mtrr()
1906 18:38:20.839011 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 18:38:20.842032 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 18:38:20.845705 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 18:38:20.851933 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 18:38:20.855553 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 18:38:20.858932 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 18:38:20.861773 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 18:38:20.868209 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 18:38:20.871880 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 18:38:20.874666 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 18:38:20.877808 CPU physical address size: 39 bits
1917 18:38:20.881339 call enable_fixed_mtrr()
1918 18:38:20.884662 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 18:38:20.891258 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 18:38:20.894620 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 18:38:20.897953 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 18:38:20.901431 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 18:38:20.907681 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 18:38:20.910940 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 18:38:20.914458 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 18:38:20.917898 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 18:38:20.924369 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 18:38:20.927686 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 18:38:20.930368 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 18:38:20.936760 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 18:38:20.937176 call enable_fixed_mtrr()
1932 18:38:20.943400 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 18:38:20.946856 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 18:38:20.950016 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 18:38:20.953409 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 18:38:20.960179 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 18:38:20.963658 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 18:38:20.966264 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 18:38:20.969733 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 18:38:20.976560 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 18:38:20.979271 CPU physical address size: 39 bits
1942 18:38:20.982690 call enable_fixed_mtrr()
1943 18:38:20.983138 CBFS @ c08000 size 3f8000
1944 18:38:20.985963 CPU physical address size: 39 bits
1945 18:38:20.992790 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1946 18:38:20.996109 CBFS: Locating 'fallback/payload'
1947 18:38:20.998813 CPU physical address size: 39 bits
1948 18:38:21.005622 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 18:38:21.009014 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 18:38:21.011875 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 18:38:21.015199 MTRR: Fixed MSR 0x259 0x0000000000000000
1952 18:38:21.021999 MTRR: Fixed MSR 0x268 0x0606060606060606
1953 18:38:21.024809 MTRR: Fixed MSR 0x269 0x0606060606060606
1954 18:38:21.029612 MTRR: Fixed MSR 0x26a 0x0606060606060606
1955 18:38:21.031959 MTRR: Fixed MSR 0x26b 0x0606060606060606
1956 18:38:21.038458 MTRR: Fixed MSR 0x26c 0x0606060606060606
1957 18:38:21.041874 MTRR: Fixed MSR 0x26d 0x0606060606060606
1958 18:38:21.044817 MTRR: Fixed MSR 0x26e 0x0606060606060606
1959 18:38:21.048211 MTRR: Fixed MSR 0x26f 0x0606060606060606
1960 18:38:21.054712 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 18:38:21.057963 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 18:38:21.061554 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 18:38:21.064391 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 18:38:21.071592 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 18:38:21.074308 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 18:38:21.077782 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 18:38:21.080518 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 18:38:21.087427 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 18:38:21.090679 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 18:38:21.094358 call enable_fixed_mtrr()
1971 18:38:21.097024 CBFS: Found @ offset 1c96c0 size 3f798
1972 18:38:21.100589 call enable_fixed_mtrr()
1973 18:38:21.104060 CPU physical address size: 39 bits
1974 18:38:21.107101 CPU physical address size: 39 bits
1975 18:38:21.110551 Checking segment from ROM address 0xffdd16f8
1976 18:38:21.116613 Checking segment from ROM address 0xffdd1714
1977 18:38:21.120165 Loading segment from ROM address 0xffdd16f8
1978 18:38:21.123675 code (compression=0)
1979 18:38:21.129757 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1980 18:38:21.139616 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1981 18:38:21.143054 it's not compressed!
1982 18:38:21.234454 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1983 18:38:21.240921 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1984 18:38:21.244134 Loading segment from ROM address 0xffdd1714
1985 18:38:21.247375 Entry Point 0x30000000
1986 18:38:21.250730 Loaded segments
1987 18:38:21.256830 Finalizing chipset.
1988 18:38:21.259453 Finalizing SMM.
1989 18:38:21.262734 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1990 18:38:21.266113 mp_park_aps done after 0 msecs.
1991 18:38:21.273053 Jumping to boot code at 30000000(99b62000)
1992 18:38:21.279575 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1993 18:38:21.280034
1994 18:38:21.280401
1995 18:38:21.280732
1996 18:38:21.282442 Starting depthcharge on Helios...
1997 18:38:21.282891
1998 18:38:21.283983 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1999 18:38:21.284519 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2000 18:38:21.284946 Setting prompt string to ['hatch:']
2001 18:38:21.285375 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2002 18:38:21.292529 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2003 18:38:21.292981
2004 18:38:21.299275 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2005 18:38:21.299730
2006 18:38:21.305303 board_setup: Info: eMMC controller not present; skipping
2007 18:38:21.305789
2008 18:38:21.308576 New NVMe Controller 0x30053ac0 @ 00:1d:00
2009 18:38:21.309029
2010 18:38:21.315179 board_setup: Info: SDHCI controller not present; skipping
2011 18:38:21.315629
2012 18:38:21.321635 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2013 18:38:21.322129
2014 18:38:21.322494 Wipe memory regions:
2015 18:38:21.322831
2016 18:38:21.328133 [0x00000000001000, 0x000000000a0000)
2017 18:38:21.328655
2018 18:38:21.331692 [0x00000000100000, 0x00000030000000)
2019 18:38:21.395797
2020 18:38:21.399027 [0x00000030657430, 0x00000099a2c000)
2021 18:38:21.536066
2022 18:38:21.539561 [0x00000100000000, 0x0000045e800000)
2023 18:38:22.921901
2024 18:38:22.922044 R8152: Initializing
2025 18:38:22.922157
2026 18:38:22.924634 Version 9 (ocp_data = 6010)
2027 18:38:22.928903
2028 18:38:22.928992 R8152: Done initializing
2029 18:38:22.929061
2030 18:38:22.932224 Adding net device
2031 18:38:23.414766
2032 18:38:23.414912 R8152: Initializing
2033 18:38:23.414984
2034 18:38:23.417966 Version 6 (ocp_data = 5c30)
2035 18:38:23.418053
2036 18:38:23.421267 R8152: Done initializing
2037 18:38:23.421353
2038 18:38:23.428125 net_add_device: Attemp to include the same device
2039 18:38:23.428214
2040 18:38:23.434871 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2041 18:38:23.434959
2042 18:38:23.435036
2043 18:38:23.435102
2044 18:38:23.435373 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2046 18:38:23.536209 hatch: tftpboot 192.168.201.1 9334689/tftp-deploy-53vbtcvx/kernel/bzImage 9334689/tftp-deploy-53vbtcvx/kernel/cmdline 9334689/tftp-deploy-53vbtcvx/ramdisk/ramdisk.cpio.gz
2047 18:38:23.536371 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2048 18:38:23.536472 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2049 18:38:23.540849 tftpboot 192.168.201.1 9334689/tftp-deploy-53vbtcvx/kernel/bzImoy-53vbtcvx/kernel/cmdline 9334689/tftp-deploy-53vbtcvx/ramdisk/ramdisk.cpio.gz
2050 18:38:23.540939
2051 18:38:23.541007 Waiting for link
2052 18:38:23.741453
2053 18:38:23.741600 done.
2054 18:38:23.741674
2055 18:38:23.741740 MAC: 00:24:32:50:19:be
2056 18:38:23.741804
2057 18:38:23.744756 Sending DHCP discover... done.
2058 18:38:23.744849
2059 18:38:23.747971 Waiting for reply... done.
2060 18:38:23.748055
2061 18:38:23.751264 Sending DHCP request... done.
2062 18:38:23.751357
2063 18:38:23.754660 Waiting for reply... done.
2064 18:38:23.754740
2065 18:38:23.757379 My ip is 192.168.201.15
2066 18:38:23.757460
2067 18:38:23.760710 The DHCP server ip is 192.168.201.1
2068 18:38:23.760792
2069 18:38:23.763968 TFTP server IP predefined by user: 192.168.201.1
2070 18:38:23.764054
2071 18:38:23.770565 Bootfile predefined by user: 9334689/tftp-deploy-53vbtcvx/kernel/bzImage
2072 18:38:23.770653
2073 18:38:23.773986 Sending tftp read request... done.
2074 18:38:23.777356
2075 18:38:23.780700 Waiting for the transfer...
2076 18:38:23.780784
2077 18:38:24.311101 00000000 ################################################################
2078 18:38:24.311240
2079 18:38:24.833147 00080000 ################################################################
2080 18:38:24.833290
2081 18:38:25.366602 00100000 ################################################################
2082 18:38:25.366742
2083 18:38:25.903557 00180000 ################################################################
2084 18:38:25.903700
2085 18:38:26.442958 00200000 ################################################################
2086 18:38:26.443102
2087 18:38:26.977909 00280000 ################################################################
2088 18:38:26.978049
2089 18:38:27.521261 00300000 ################################################################
2090 18:38:27.521409
2091 18:38:28.051953 00380000 ################################################################
2092 18:38:28.052097
2093 18:38:28.580281 00400000 ################################################################
2094 18:38:28.580427
2095 18:38:29.124440 00480000 ################################################################
2096 18:38:29.124634
2097 18:38:29.658287 00500000 ################################################################
2098 18:38:29.658432
2099 18:38:30.232653 00580000 ################################################################
2100 18:38:30.232790
2101 18:38:30.805286 00600000 ################################################################
2102 18:38:30.805425
2103 18:38:31.336243 00680000 ################################################################
2104 18:38:31.336382
2105 18:38:31.880181 00700000 ################################################################
2106 18:38:31.880319
2107 18:38:32.428240 00780000 ################################################################
2108 18:38:32.428387
2109 18:38:32.969566 00800000 ################################################################
2110 18:38:32.969708
2111 18:38:33.529235 00880000 ################################################################
2112 18:38:33.529380
2113 18:38:33.831502 00900000 ################################## done.
2114 18:38:33.831637
2115 18:38:33.834833 The bootfile was 9711616 bytes long.
2116 18:38:33.834920
2117 18:38:33.838237 Sending tftp read request... done.
2118 18:38:33.838322
2119 18:38:33.841051 Waiting for the transfer...
2120 18:38:33.841136
2121 18:38:34.453805 00000000 ################################################################
2122 18:38:34.454511
2123 18:38:34.993117 00080000 ################################################################
2124 18:38:34.993260
2125 18:38:35.549424 00100000 ################################################################
2126 18:38:35.549564
2127 18:38:36.134418 00180000 ################################################################
2128 18:38:36.134563
2129 18:38:36.702496 00200000 ################################################################
2130 18:38:36.702639
2131 18:38:37.274054 00280000 ################################################################
2132 18:38:37.274231
2133 18:38:37.848638 00300000 ################################################################
2134 18:38:37.848778
2135 18:38:38.475149 00380000 ################################################################
2136 18:38:38.475670
2137 18:38:39.016858 00400000 ################################################################
2138 18:38:39.017051
2139 18:38:39.551948 00480000 ################################################################
2140 18:38:39.552141
2141 18:38:39.823204 00500000 ################################## done.
2142 18:38:39.823360
2143 18:38:39.825960 Sending tftp read request... done.
2144 18:38:39.826045
2145 18:38:39.829427 Waiting for the transfer...
2146 18:38:39.829523
2147 18:38:39.829620 00000000 # done.
2148 18:38:39.829717
2149 18:38:39.839660 Command line loaded dynamically from TFTP file: 9334689/tftp-deploy-53vbtcvx/kernel/cmdline
2150 18:38:39.839767
2151 18:38:39.865227 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9334689/extract-nfsrootfs-1xkkzqnu,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2152 18:38:39.865344
2153 18:38:39.872055 ec_init(0): CrosEC protocol v3 supported (256, 256)
2154 18:38:39.875598
2155 18:38:39.878969 Shutting down all USB controllers.
2156 18:38:39.879051
2157 18:38:39.879123 Removing current net device
2158 18:38:39.883146
2159 18:38:39.883229 Finalizing coreboot
2160 18:38:39.883299
2161 18:38:39.889944 Exiting depthcharge with code 4 at timestamp: 25950852
2162 18:38:39.890029
2163 18:38:39.890108
2164 18:38:39.890175 Starting kernel ...
2165 18:38:39.890241
2166 18:38:39.890303
2167 18:38:39.890677 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2168 18:38:39.890781 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2169 18:38:39.890860 Setting prompt string to ['Linux version [0-9]']
2170 18:38:39.890934 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2171 18:38:39.891006 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2173 18:43:00.891092 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2175 18:43:00.891319 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2177 18:43:00.891473 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2180 18:43:00.891765 end: 2 depthcharge-action (duration 00:05:00) [common]
2182 18:43:00.892043 Cleaning after the job
2183 18:43:00.892129 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/ramdisk
2184 18:43:00.892622 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/kernel
2185 18:43:00.893336 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/nfsrootfs
2186 18:43:00.943352 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334689/tftp-deploy-53vbtcvx/modules
2187 18:43:00.943675 start: 4.1 power-off (timeout 00:00:30) [common]
2188 18:43:00.943837 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2189 18:43:03.111721 >> Command sent successfully.
2190 18:43:03.117516 Returned 0 in 2 seconds
2191 18:43:03.218696 end: 4.1 power-off (duration 00:00:02) [common]
2193 18:43:03.220321 start: 4.2 read-feedback (timeout 00:09:58) [common]
2194 18:43:03.221558 Listened to connection for namespace 'common' for up to 1s
2196 18:43:03.224041 Listened to connection for namespace 'common' for up to 1s
2197 18:43:03.225238 Listened to connection for namespace 'common' for up to 1s
2198 18:43:03.226348 Listened to connection for namespace 'common' for up to 1s
2199 18:43:03.227495 Listened to connection for namespace 'common' for up to 1s
2200 18:43:03.228755 Listened to connection for namespace 'common' for up to 1s
2201 18:43:04.223257 Finalising connection for namespace 'common'
2202 18:43:04.223951 Disconnecting from shell: Finalise
2203 18:43:04.224387
2204 18:43:04.327382 end: 4.2 read-feedback (duration 00:00:01) [common]
2205 18:43:04.328016 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9334689
2206 18:43:04.519634 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9334689
2207 18:43:04.519838 JobError: Your job cannot terminate cleanly.