Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 18:43:58.294475 lava-dispatcher, installed at version: 2022.11
2 18:43:58.294665 start: 0 validate
3 18:43:58.294800 Start time: 2023-02-25 18:43:58.294793+00:00 (UTC)
4 18:43:58.294927 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:43:58.295051 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230217.0%2Famd64%2Finitrd.cpio.gz exists
6 18:43:58.586941 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:43:58.587114 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:43:58.876832 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:43:58.876992 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230217.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:43:59.167972 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:43:59.168141 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-14-ga8d1f73f2a28%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 18:43:59.453940 validate duration: 1.16
14 18:43:59.454268 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:43:59.454379 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:43:59.454482 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:43:59.454584 Not decompressing ramdisk as can be used compressed.
18 18:43:59.454800 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230217.0/amd64/initrd.cpio.gz
19 18:43:59.454872 saving as /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/ramdisk/initrd.cpio.gz
20 18:43:59.454937 total size: 5432126 (5MB)
21 18:43:59.456056 progress 0% (0MB)
22 18:43:59.457540 progress 5% (0MB)
23 18:43:59.458921 progress 10% (0MB)
24 18:43:59.460318 progress 15% (0MB)
25 18:43:59.461795 progress 20% (1MB)
26 18:43:59.463108 progress 25% (1MB)
27 18:43:59.464447 progress 30% (1MB)
28 18:43:59.465913 progress 35% (1MB)
29 18:43:59.467254 progress 40% (2MB)
30 18:43:59.468571 progress 45% (2MB)
31 18:43:59.469881 progress 50% (2MB)
32 18:43:59.471379 progress 55% (2MB)
33 18:43:59.472727 progress 60% (3MB)
34 18:43:59.474033 progress 65% (3MB)
35 18:43:59.475614 progress 70% (3MB)
36 18:43:59.477063 progress 75% (3MB)
37 18:43:59.478461 progress 80% (4MB)
38 18:43:59.479800 progress 85% (4MB)
39 18:43:59.481264 progress 90% (4MB)
40 18:43:59.482618 progress 95% (4MB)
41 18:43:59.483949 progress 100% (5MB)
42 18:43:59.484254 5MB downloaded in 0.03s (176.73MB/s)
43 18:43:59.484444 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:43:59.484710 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:43:59.484807 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:43:59.484951 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:43:59.485067 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 18:43:59.485163 saving as /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/kernel/bzImage
50 18:43:59.485229 total size: 9711616 (9MB)
51 18:43:59.485291 No compression specified
52 18:43:59.486442 progress 0% (0MB)
53 18:43:59.488826 progress 5% (0MB)
54 18:43:59.491417 progress 10% (0MB)
55 18:43:59.493868 progress 15% (1MB)
56 18:43:59.496327 progress 20% (1MB)
57 18:43:59.498800 progress 25% (2MB)
58 18:43:59.501055 progress 30% (2MB)
59 18:43:59.503528 progress 35% (3MB)
60 18:43:59.505951 progress 40% (3MB)
61 18:43:59.508435 progress 45% (4MB)
62 18:43:59.510904 progress 50% (4MB)
63 18:43:59.513335 progress 55% (5MB)
64 18:43:59.515648 progress 60% (5MB)
65 18:43:59.518028 progress 65% (6MB)
66 18:43:59.520451 progress 70% (6MB)
67 18:43:59.522899 progress 75% (6MB)
68 18:43:59.525294 progress 80% (7MB)
69 18:43:59.527550 progress 85% (7MB)
70 18:43:59.529942 progress 90% (8MB)
71 18:43:59.532396 progress 95% (8MB)
72 18:43:59.534841 progress 100% (9MB)
73 18:43:59.535049 9MB downloaded in 0.05s (185.92MB/s)
74 18:43:59.535199 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:43:59.535440 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:43:59.535531 start: 1.3 download-retry (timeout 00:10:00) [common]
78 18:43:59.535620 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 18:43:59.535729 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230217.0/amd64/full.rootfs.tar.xz
80 18:43:59.535797 saving as /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/nfsrootfs/full.rootfs.tar
81 18:43:59.535860 total size: 124173696 (118MB)
82 18:43:59.535923 Using unxz to decompress xz
83 18:43:59.539299 progress 0% (0MB)
84 18:43:59.986511 progress 5% (5MB)
85 18:44:00.449922 progress 10% (11MB)
86 18:44:00.920795 progress 15% (17MB)
87 18:44:01.393154 progress 20% (23MB)
88 18:44:01.744272 progress 25% (29MB)
89 18:44:02.084597 progress 30% (35MB)
90 18:44:02.362256 progress 35% (41MB)
91 18:44:02.517633 progress 40% (47MB)
92 18:44:02.892583 progress 45% (53MB)
93 18:44:03.256989 progress 50% (59MB)
94 18:44:03.597620 progress 55% (65MB)
95 18:44:03.950970 progress 60% (71MB)
96 18:44:04.290367 progress 65% (77MB)
97 18:44:04.667622 progress 70% (82MB)
98 18:44:05.091150 progress 75% (88MB)
99 18:44:05.515917 progress 80% (94MB)
100 18:44:05.646951 progress 85% (100MB)
101 18:44:05.809113 progress 90% (106MB)
102 18:44:06.144758 progress 95% (112MB)
103 18:44:06.519280 progress 100% (118MB)
104 18:44:06.524884 118MB downloaded in 6.99s (16.94MB/s)
105 18:44:06.525136 end: 1.3.1 http-download (duration 00:00:07) [common]
107 18:44:06.525414 end: 1.3 download-retry (duration 00:00:07) [common]
108 18:44:06.525508 start: 1.4 download-retry (timeout 00:09:53) [common]
109 18:44:06.525598 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 18:44:06.525715 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-14-ga8d1f73f2a28/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 18:44:06.525789 saving as /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/modules/modules.tar
112 18:44:06.525851 total size: 64832 (0MB)
113 18:44:06.525915 Using unxz to decompress xz
114 18:44:06.529223 progress 50% (0MB)
115 18:44:06.529597 progress 100% (0MB)
116 18:44:06.533901 0MB downloaded in 0.01s (7.69MB/s)
117 18:44:06.534143 end: 1.4.1 http-download (duration 00:00:00) [common]
119 18:44:06.534416 end: 1.4 download-retry (duration 00:00:00) [common]
120 18:44:06.534518 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 18:44:06.534622 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 18:44:08.238257 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9334730/extract-nfsrootfs-9h6_r0sy
123 18:44:08.238462 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 18:44:08.238567 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 18:44:08.238706 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_
126 18:44:08.238806 makedir: /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin
127 18:44:08.238891 makedir: /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/tests
128 18:44:08.238971 makedir: /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/results
129 18:44:08.239071 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-add-keys
130 18:44:08.239197 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-add-sources
131 18:44:08.239312 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-background-process-start
132 18:44:08.239423 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-background-process-stop
133 18:44:08.239536 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-common-functions
134 18:44:08.239645 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-echo-ipv4
135 18:44:08.239752 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-install-packages
136 18:44:08.239860 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-installed-packages
137 18:44:08.239966 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-os-build
138 18:44:08.240072 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-probe-channel
139 18:44:08.240191 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-probe-ip
140 18:44:08.240332 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-target-ip
141 18:44:08.240443 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-target-mac
142 18:44:08.240552 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-target-storage
143 18:44:08.240663 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-test-case
144 18:44:08.240771 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-test-event
145 18:44:08.240877 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-test-feedback
146 18:44:08.240983 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-test-raise
147 18:44:08.241089 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-test-reference
148 18:44:08.241195 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-test-runner
149 18:44:08.241300 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-test-set
150 18:44:08.241405 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-test-shell
151 18:44:08.241512 Updating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-install-packages (oe)
152 18:44:08.241621 Updating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/bin/lava-installed-packages (oe)
153 18:44:08.241717 Creating /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/environment
154 18:44:08.241801 LAVA metadata
155 18:44:08.241866 - LAVA_JOB_ID=9334730
156 18:44:08.241929 - LAVA_DISPATCHER_IP=192.168.201.1
157 18:44:08.242024 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 18:44:08.242130 skipped lava-vland-overlay
159 18:44:08.242208 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 18:44:08.242290 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 18:44:08.242352 skipped lava-multinode-overlay
162 18:44:08.242426 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 18:44:08.242506 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 18:44:08.242577 Loading test definitions
165 18:44:08.242666 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 18:44:08.242736 Using /lava-9334730 at stage 0
167 18:44:08.242830 Fetching tests from https://github.com/kernelci/test-definitions
168 18:44:08.242909 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/0/tests/0_ltp-timers'
169 18:44:11.892718 Running '/usr/bin/git checkout kernelci.org
170 18:44:12.029293 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 18:44:12.029961 uuid=9334730_1.5.2.3.1 testdef=None
172 18:44:12.030178 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 18:44:12.030433 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
175 18:44:12.031098 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 18:44:12.031339 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
178 18:44:12.032127 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 18:44:12.032373 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
181 18:44:12.033131 runner path: /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/0/tests/0_ltp-timers test_uuid 9334730_1.5.2.3.1
182 18:44:12.033231 GRP_TEST='TMR'
183 18:44:12.033297 SKIPFILE='skipfile-lkft.yaml'
184 18:44:12.033358 SKIP_INSTALL='true'
185 18:44:12.033417 TST_CMDFILES=''
186 18:44:12.033548 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 18:44:12.033764 Creating lava-test-runner.conf files
189 18:44:12.033828 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9334730/lava-overlay-d272t_c_/lava-9334730/0 for stage 0
190 18:44:12.033912 - 0_ltp-timers
191 18:44:12.034009 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
192 18:44:12.034137 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
193 18:44:19.494185 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 18:44:19.494340 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
195 18:44:19.494461 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 18:44:19.494564 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
197 18:44:19.494655 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
198 18:44:19.597792 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 18:44:19.598201 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
200 18:44:19.598312 extracting modules file /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9334730/extract-nfsrootfs-9h6_r0sy
201 18:44:19.602266 extracting modules file /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9334730/extract-overlay-ramdisk-u_jcgbqb/ramdisk
202 18:44:19.606014 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 18:44:19.606164 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
204 18:44:19.606250 [common] Applying overlay to NFS
205 18:44:19.606325 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9334730/compress-overlay-uvwr5_i5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9334730/extract-nfsrootfs-9h6_r0sy
206 18:44:20.062333 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 18:44:20.062497 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
208 18:44:20.062594 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 18:44:20.062683 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
210 18:44:20.062765 Building ramdisk /var/lib/lava/dispatcher/tmp/9334730/extract-overlay-ramdisk-u_jcgbqb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9334730/extract-overlay-ramdisk-u_jcgbqb/ramdisk
211 18:44:20.097163 >> 24777 blocks
212 18:44:20.564537 rename /var/lib/lava/dispatcher/tmp/9334730/extract-overlay-ramdisk-u_jcgbqb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/ramdisk/ramdisk.cpio.gz
213 18:44:20.564948 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 18:44:20.565072 start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
215 18:44:20.565174 start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
216 18:44:20.565266 No mkimage arch provided, not using FIT.
217 18:44:20.565356 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 18:44:20.565443 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 18:44:20.565542 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
220 18:44:20.565633 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
221 18:44:20.565712 No LXC device requested
222 18:44:20.565794 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 18:44:20.565882 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
224 18:44:20.565962 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 18:44:20.566032 Checking files for TFTP limit of 4294967296 bytes.
226 18:44:20.566418 end: 1 tftp-deploy (duration 00:00:21) [common]
227 18:44:20.566524 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 18:44:20.566615 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 18:44:20.566745 substitutions:
230 18:44:20.566813 - {DTB}: None
231 18:44:20.566876 - {INITRD}: 9334730/tftp-deploy-nlp3635d/ramdisk/ramdisk.cpio.gz
232 18:44:20.566936 - {KERNEL}: 9334730/tftp-deploy-nlp3635d/kernel/bzImage
233 18:44:20.566994 - {LAVA_MAC}: None
234 18:44:20.567059 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9334730/extract-nfsrootfs-9h6_r0sy
235 18:44:20.567126 - {NFS_SERVER_IP}: 192.168.201.1
236 18:44:20.567184 - {PRESEED_CONFIG}: None
237 18:44:20.567242 - {PRESEED_LOCAL}: None
238 18:44:20.567298 - {RAMDISK}: 9334730/tftp-deploy-nlp3635d/ramdisk/ramdisk.cpio.gz
239 18:44:20.567354 - {ROOT_PART}: None
240 18:44:20.567409 - {ROOT}: None
241 18:44:20.567465 - {SERVER_IP}: 192.168.201.1
242 18:44:20.567519 - {TEE}: None
243 18:44:20.567575 Parsed boot commands:
244 18:44:20.567629 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 18:44:20.567783 Parsed boot commands: tftpboot 192.168.201.1 9334730/tftp-deploy-nlp3635d/kernel/bzImage 9334730/tftp-deploy-nlp3635d/kernel/cmdline 9334730/tftp-deploy-nlp3635d/ramdisk/ramdisk.cpio.gz
246 18:44:20.567875 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 18:44:20.567962 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 18:44:20.568052 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 18:44:20.568140 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 18:44:20.568210 Not connected, no need to disconnect.
251 18:44:20.568286 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 18:44:20.568372 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 18:44:20.568441 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
254 18:44:20.571468 Setting prompt string to ['lava-test: # ']
255 18:44:20.571784 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 18:44:20.571928 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 18:44:20.572027 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 18:44:20.572118 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 18:44:20.572325 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
260 18:44:29.885292 >> Command sent successfully.
261 18:44:29.887502 Returned 0 in 9 seconds
262 18:44:29.988250 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
264 18:44:29.988564 end: 2.2.2 reset-device (duration 00:00:09) [common]
265 18:44:29.988671 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
266 18:44:29.988760 Setting prompt string to 'Starting depthcharge on Helios...'
267 18:44:29.988826 Changing prompt to 'Starting depthcharge on Helios...'
268 18:44:29.988893 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 18:44:29.989179 [Enter `^Ec?' for help]
270 18:44:29.989267
271 18:44:29.989334
272 18:44:29.989398 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 18:44:29.989466 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 18:44:29.989535 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 18:44:29.989593 CPU: AES supported, TXT NOT supported, VT supported
276 18:44:29.989651 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 18:44:29.989708 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 18:44:29.989776 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 18:44:29.989833 VBOOT: Loading verstage.
280 18:44:29.989889 FMAP: Found "FLASH" version 1.1 at 0xc04000.
281 18:44:29.989946 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 18:44:29.990002 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 18:44:29.990075 CBFS @ c08000 size 3f8000
284 18:44:29.990168 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 18:44:29.990224 CBFS: Locating 'fallback/verstage'
286 18:44:29.990281 CBFS: Found @ offset 10fb80 size 1072c
287 18:44:29.990346
288 18:44:29.990401
289 18:44:29.990457 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 18:44:29.990514 Probing TPM: . done!
291 18:44:29.990575 TPM ready after 0 ms
292 18:44:29.990634 Connected to device vid:did:rid of 1ae0:0028:00
293 18:44:29.990721 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
294 18:44:29.990779 Initialized TPM device CR50 revision 0
295 18:44:29.990853 tlcl_send_startup: Startup return code is 0
296 18:44:29.990929 TPM: setup succeeded
297 18:44:29.990988 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 18:44:29.991044 Chrome EC: UHEPI supported
299 18:44:29.991098 Phase 1
300 18:44:29.991164 FMAP: area GBB found @ c05000 (12288 bytes)
301 18:44:29.991220 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 18:44:29.991275 Phase 2
303 18:44:29.991330 Phase 3
304 18:44:29.991384 FMAP: area GBB found @ c05000 (12288 bytes)
305 18:44:29.991451 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 18:44:29.991507 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 18:44:29.991563 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
308 18:44:29.991618 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 18:44:29.991681 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 18:44:29.991739 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
311 18:44:29.991795 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 18:44:29.991850 Phase 4
313 18:44:29.991905 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
314 18:44:29.991970 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 18:44:29.992046 VB2:vb2_rsa_verify_digest() Digest check failed!
316 18:44:29.992118 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 18:44:29.992173 Saving nvdata
318 18:44:29.992239 Reboot requested (10020007)
319 18:44:29.992294 board_reset() called!
320 18:44:29.992349 full_reset() called!
321 18:44:33.566993
322 18:44:33.567138
323 18:44:33.577193 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 18:44:33.580442 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 18:44:33.586518 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 18:44:33.590591 CPU: AES supported, TXT NOT supported, VT supported
327 18:44:33.596402 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 18:44:33.600256 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 18:44:33.606466 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 18:44:33.609742 VBOOT: Loading verstage.
331 18:44:33.613103 FMAP: Found "FLASH" version 1.1 at 0xc04000.
332 18:44:33.619566 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 18:44:33.626334 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 18:44:33.626422 CBFS @ c08000 size 3f8000
335 18:44:33.633343 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 18:44:33.636474 CBFS: Locating 'fallback/verstage'
337 18:44:33.639694 CBFS: Found @ offset 10fb80 size 1072c
338 18:44:33.643512
339 18:44:33.643599
340 18:44:33.653878 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 18:44:33.668044 Probing TPM: . done!
342 18:44:33.671249 TPM ready after 0 ms
343 18:44:33.674883 Connected to device vid:did:rid of 1ae0:0028:00
344 18:44:33.684572 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
345 18:44:33.688256 Initialized TPM device CR50 revision 0
346 18:44:33.730959 tlcl_send_startup: Startup return code is 0
347 18:44:33.731073 TPM: setup succeeded
348 18:44:33.743183 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 18:44:33.746888 Chrome EC: UHEPI supported
350 18:44:33.750156 Phase 1
351 18:44:33.753372 FMAP: area GBB found @ c05000 (12288 bytes)
352 18:44:33.760189 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 18:44:33.766635 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 18:44:33.770296 Recovery requested (1009000e)
355 18:44:33.775862 Saving nvdata
356 18:44:33.782009 tlcl_extend: response is 0
357 18:44:33.790534 tlcl_extend: response is 0
358 18:44:33.797876 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 18:44:33.801263 CBFS @ c08000 size 3f8000
360 18:44:33.807571 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 18:44:33.810701 CBFS: Locating 'fallback/romstage'
362 18:44:33.813943 CBFS: Found @ offset 80 size 145fc
363 18:44:33.817628 Accumulated console time in verstage 98 ms
364 18:44:33.817708
365 18:44:33.817774
366 18:44:33.830659 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 18:44:33.837710 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 18:44:33.840882 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 18:44:33.844090 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 18:44:33.850925 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 18:44:33.854091 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 18:44:33.857250 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
373 18:44:33.860446 TCO_STS: 0000 0000
374 18:44:33.864123 GEN_PMCON: e0015238 00000200
375 18:44:33.866815 GBLRST_CAUSE: 00000000 00000000
376 18:44:33.866901 prev_sleep_state 5
377 18:44:33.870581 Boot Count incremented to 49303
378 18:44:33.877409 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 18:44:33.880541 CBFS @ c08000 size 3f8000
380 18:44:33.887454 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 18:44:33.887541 CBFS: Locating 'fspm.bin'
382 18:44:33.893925 CBFS: Found @ offset 5ffc0 size 71000
383 18:44:33.897133 Chrome EC: UHEPI supported
384 18:44:33.903536 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 18:44:33.907660 Probing TPM: done!
386 18:44:33.913767 Connected to device vid:did:rid of 1ae0:0028:00
387 18:44:33.923951 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
388 18:44:33.929799 Initialized TPM device CR50 revision 0
389 18:44:33.938628 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 18:44:33.948752 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 18:44:33.948839 MRC cache found, size 1948
392 18:44:33.951752 bootmode is set to: 2
393 18:44:33.955879 PRMRR disabled by config.
394 18:44:33.958330 SPD INDEX = 1
395 18:44:33.961906 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 18:44:33.965103 CBFS @ c08000 size 3f8000
397 18:44:33.971997 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 18:44:33.972083 CBFS: Locating 'spd.bin'
399 18:44:33.978180 CBFS: Found @ offset 5fb80 size 400
400 18:44:33.978267 SPD: module type is LPDDR3
401 18:44:33.981716 SPD: module part is
402 18:44:33.988063 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 18:44:33.991262 SPD: device width 4 bits, bus width 8 bits
404 18:44:33.994700 SPD: module size is 4096 MB (per channel)
405 18:44:34.001084 memory slot: 0 configuration done.
406 18:44:34.004258 memory slot: 2 configuration done.
407 18:44:34.053228 CBMEM:
408 18:44:34.056660 IMD: root @ 99fff000 254 entries.
409 18:44:34.059537 IMD: root @ 99ffec00 62 entries.
410 18:44:34.063387 External stage cache:
411 18:44:34.066539 IMD: root @ 9abff000 254 entries.
412 18:44:34.069818 IMD: root @ 9abfec00 62 entries.
413 18:44:34.076575 Chrome EC: clear events_b mask to 0x0000000020004000
414 18:44:34.089417 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 18:44:34.102744 tlcl_write: response is 0
416 18:44:34.111344 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 18:44:34.118167 MRC: TPM MRC hash updated successfully.
418 18:44:34.118257 2 DIMMs found
419 18:44:34.121157 SMM Memory Map
420 18:44:34.124298 SMRAM : 0x9a000000 0x1000000
421 18:44:34.128309 Subregion 0: 0x9a000000 0xa00000
422 18:44:34.131153 Subregion 1: 0x9aa00000 0x200000
423 18:44:34.134156 Subregion 2: 0x9ac00000 0x400000
424 18:44:34.137813 top_of_ram = 0x9a000000
425 18:44:34.140986 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 18:44:34.147413 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 18:44:34.150651 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 18:44:34.157521 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 18:44:34.161018 CBFS @ c08000 size 3f8000
430 18:44:34.163968 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 18:44:34.167092 CBFS: Locating 'fallback/postcar'
432 18:44:34.174493 CBFS: Found @ offset 107000 size 4b44
433 18:44:34.180307 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 18:44:34.190363 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 18:44:34.193360 Processing 180 relocs. Offset value of 0x97c0c000
436 18:44:34.201821 Accumulated console time in romstage 286 ms
437 18:44:34.201926
438 18:44:34.201997
439 18:44:34.211711 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 18:44:34.218829 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 18:44:34.221936 CBFS @ c08000 size 3f8000
442 18:44:34.228189 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 18:44:34.231895 CBFS: Locating 'fallback/ramstage'
444 18:44:34.235183 CBFS: Found @ offset 43380 size 1b9e8
445 18:44:34.241862 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 18:44:34.274027 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 18:44:34.280277 Processing 3976 relocs. Offset value of 0x98db0000
448 18:44:34.283278 Accumulated console time in postcar 52 ms
449 18:44:34.283358
450 18:44:34.283454
451 18:44:34.293650 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 18:44:34.299644 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 18:44:34.302854 WARNING: RO_VPD is uninitialized or empty.
454 18:44:34.306514 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 18:44:34.312856 FMAP: area RW_VPD found @ af8000 (8192 bytes)
456 18:44:34.312942 Normal boot.
457 18:44:34.319934 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 18:44:34.323045 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 18:44:34.326054 CBFS @ c08000 size 3f8000
460 18:44:34.332947 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 18:44:34.336161 CBFS: Locating 'cpu_microcode_blob.bin'
462 18:44:34.339330 CBFS: Found @ offset 14700 size 2ec00
463 18:44:34.346219 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 18:44:34.346307 Skip microcode update
465 18:44:34.352494 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 18:44:34.355729 CBFS @ c08000 size 3f8000
467 18:44:34.358822 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 18:44:34.362707 CBFS: Locating 'fsps.bin'
469 18:44:34.365809 CBFS: Found @ offset d1fc0 size 35000
470 18:44:34.391687 Detected 4 core, 8 thread CPU.
471 18:44:34.394862 Setting up SMI for CPU
472 18:44:34.398219 IED base = 0x9ac00000
473 18:44:34.401700 IED size = 0x00400000
474 18:44:34.401788 Will perform SMM setup.
475 18:44:34.407921 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 18:44:34.414613 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 18:44:34.421550 Processing 16 relocs. Offset value of 0x00030000
478 18:44:34.421639 Attempting to start 7 APs
479 18:44:34.427941 Waiting for 10ms after sending INIT.
480 18:44:34.441829 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
481 18:44:34.441918 done.
482 18:44:34.444763 AP: slot 6 apic_id 6.
483 18:44:34.447960 AP: slot 4 apic_id 7.
484 18:44:34.448048 AP: slot 5 apic_id 4.
485 18:44:34.451118 AP: slot 7 apic_id 5.
486 18:44:34.454385 Waiting for 2nd SIPI to complete...done.
487 18:44:34.458073 AP: slot 1 apic_id 3.
488 18:44:34.461599 AP: slot 2 apic_id 2.
489 18:44:34.468098 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 18:44:34.474514 Processing 13 relocs. Offset value of 0x00038000
491 18:44:34.481281 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 18:44:34.484318 Installing SMM handler to 0x9a000000
493 18:44:34.491313 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 18:44:34.497609 Processing 658 relocs. Offset value of 0x9a010000
495 18:44:34.504157 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 18:44:34.507581 Processing 13 relocs. Offset value of 0x9a008000
497 18:44:34.514223 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 18:44:34.520441 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 18:44:34.527327 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 18:44:34.530590 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 18:44:34.537001 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 18:44:34.543809 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 18:44:34.550148 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 18:44:34.557293 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 18:44:34.560532 Clearing SMI status registers
506 18:44:34.560620 SMI_STS: PM1
507 18:44:34.563306 PM1_STS: PWRBTN
508 18:44:34.563392 TCO_STS: SECOND_TO
509 18:44:34.567013 New SMBASE 0x9a000000
510 18:44:34.570037 In relocation handler: CPU 0
511 18:44:34.573388 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 18:44:34.579847 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 18:44:34.579935 Relocation complete.
514 18:44:34.583055 New SMBASE 0x99fff400
515 18:44:34.586880 In relocation handler: CPU 3
516 18:44:34.589924 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
517 18:44:34.593241 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 18:44:34.596530 Relocation complete.
519 18:44:34.599619 New SMBASE 0x99fffc00
520 18:44:34.602832 In relocation handler: CPU 1
521 18:44:34.606892 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
522 18:44:34.609843 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 18:44:34.613007 Relocation complete.
524 18:44:34.616065 New SMBASE 0x99fff800
525 18:44:34.619632 In relocation handler: CPU 2
526 18:44:34.622839 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
527 18:44:34.626193 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 18:44:34.629068 Relocation complete.
529 18:44:34.632386 New SMBASE 0x99fff000
530 18:44:34.635924 In relocation handler: CPU 4
531 18:44:34.639053 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
532 18:44:34.642859 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 18:44:34.645646 Relocation complete.
534 18:44:34.649424 New SMBASE 0x99ffe800
535 18:44:34.652616 In relocation handler: CPU 6
536 18:44:34.655715 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
537 18:44:34.658986 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 18:44:34.662260 Relocation complete.
539 18:44:34.665359 New SMBASE 0x99ffec00
540 18:44:34.669153 In relocation handler: CPU 5
541 18:44:34.672340 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
542 18:44:34.675456 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 18:44:34.678507 Relocation complete.
544 18:44:34.682396 New SMBASE 0x99ffe400
545 18:44:34.685531 In relocation handler: CPU 7
546 18:44:34.688529 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
547 18:44:34.692526 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 18:44:34.695048 Relocation complete.
549 18:44:34.698361 Initializing CPU #0
550 18:44:34.702179 CPU: vendor Intel device 806ec
551 18:44:34.704840 CPU: family 06, model 8e, stepping 0c
552 18:44:34.708117 Clearing out pending MCEs
553 18:44:34.708205 Setting up local APIC...
554 18:44:34.711575 apic_id: 0x00 done.
555 18:44:34.715135 Turbo is available but hidden
556 18:44:34.718182 Turbo is available and visible
557 18:44:34.718270 VMX status: enabled
558 18:44:34.724412 IA32_FEATURE_CONTROL status: locked
559 18:44:34.724499 Skip microcode update
560 18:44:34.727705 CPU #0 initialized
561 18:44:34.731548 Initializing CPU #3
562 18:44:34.731639 Initializing CPU #5
563 18:44:34.734749 Initializing CPU #7
564 18:44:34.734836 Initializing CPU #1
565 18:44:34.737915 Initializing CPU #2
566 18:44:34.740881 CPU: vendor Intel device 806ec
567 18:44:34.744655 CPU: family 06, model 8e, stepping 0c
568 18:44:34.748105 CPU: vendor Intel device 806ec
569 18:44:34.750747 CPU: family 06, model 8e, stepping 0c
570 18:44:34.754404 Clearing out pending MCEs
571 18:44:34.757862 Clearing out pending MCEs
572 18:44:34.760657 Setting up local APIC...
573 18:44:34.764089 CPU: vendor Intel device 806ec
574 18:44:34.767182 CPU: family 06, model 8e, stepping 0c
575 18:44:34.767270 Clearing out pending MCEs
576 18:44:34.770928 Initializing CPU #4
577 18:44:34.774324 Initializing CPU #6
578 18:44:34.777282 CPU: vendor Intel device 806ec
579 18:44:34.780305 CPU: family 06, model 8e, stepping 0c
580 18:44:34.784301 CPU: vendor Intel device 806ec
581 18:44:34.787049 CPU: family 06, model 8e, stepping 0c
582 18:44:34.790494 Clearing out pending MCEs
583 18:44:34.793866 Clearing out pending MCEs
584 18:44:34.793960 Setting up local APIC...
585 18:44:34.796974 apic_id: 0x02 done.
586 18:44:34.800087 Setting up local APIC...
587 18:44:34.803799 CPU: vendor Intel device 806ec
588 18:44:34.807316 CPU: family 06, model 8e, stepping 0c
589 18:44:34.809988 Setting up local APIC...
590 18:44:34.810098 apic_id: 0x03 done.
591 18:44:34.813907 VMX status: enabled
592 18:44:34.813994 VMX status: enabled
593 18:44:34.819793 IA32_FEATURE_CONTROL status: locked
594 18:44:34.823585 IA32_FEATURE_CONTROL status: locked
595 18:44:34.823689 Skip microcode update
596 18:44:34.826598 Skip microcode update
597 18:44:34.829906 CPU #2 initialized
598 18:44:34.829994 CPU #1 initialized
599 18:44:34.833493 apic_id: 0x01 done.
600 18:44:34.836602 Setting up local APIC...
601 18:44:34.836689 VMX status: enabled
602 18:44:34.839624 Clearing out pending MCEs
603 18:44:34.843396 CPU: vendor Intel device 806ec
604 18:44:34.846491 CPU: family 06, model 8e, stepping 0c
605 18:44:34.849637 Setting up local APIC...
606 18:44:34.852855 IA32_FEATURE_CONTROL status: locked
607 18:44:34.856525 Clearing out pending MCEs
608 18:44:34.856611 apic_id: 0x05 done.
609 18:44:34.859762 Setting up local APIC...
610 18:44:34.862750 Skip microcode update
611 18:44:34.866117 apic_id: 0x06 done.
612 18:44:34.866203 apic_id: 0x07 done.
613 18:44:34.869699 VMX status: enabled
614 18:44:34.869785 VMX status: enabled
615 18:44:34.876371 IA32_FEATURE_CONTROL status: locked
616 18:44:34.879604 IA32_FEATURE_CONTROL status: locked
617 18:44:34.879686 Skip microcode update
618 18:44:34.882483 CPU #3 initialized
619 18:44:34.886207 apic_id: 0x04 done.
620 18:44:34.886295 VMX status: enabled
621 18:44:34.889616 VMX status: enabled
622 18:44:34.892601 IA32_FEATURE_CONTROL status: locked
623 18:44:34.895660 IA32_FEATURE_CONTROL status: locked
624 18:44:34.899540 Skip microcode update
625 18:44:34.899624 Skip microcode update
626 18:44:34.902599 CPU #7 initialized
627 18:44:34.905776 CPU #5 initialized
628 18:44:34.905856 Skip microcode update
629 18:44:34.908827 CPU #6 initialized
630 18:44:34.908910 CPU #4 initialized
631 18:44:34.915737 bsp_do_flight_plan done after 456 msecs.
632 18:44:34.918875 CPU: frequency set to 4200 MHz
633 18:44:34.918955 Enabling SMIs.
634 18:44:34.919028 Locking SMM.
635 18:44:34.935364 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 18:44:34.938394 CBFS @ c08000 size 3f8000
637 18:44:34.945279 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 18:44:34.945397 CBFS: Locating 'vbt.bin'
639 18:44:34.951762 CBFS: Found @ offset 5f5c0 size 499
640 18:44:34.954746 Found a VBT of 4608 bytes after decompression
641 18:44:35.135731 Display FSP Version Info HOB
642 18:44:35.138838 Reference Code - CPU = 9.0.1e.30
643 18:44:35.142001 uCode Version = 0.0.0.ca
644 18:44:35.145108 TXT ACM version = ff.ff.ff.ffff
645 18:44:35.149006 Display FSP Version Info HOB
646 18:44:35.151813 Reference Code - ME = 9.0.1e.30
647 18:44:35.154895 MEBx version = 0.0.0.0
648 18:44:35.158504 ME Firmware Version = Consumer SKU
649 18:44:35.161577 Display FSP Version Info HOB
650 18:44:35.164771 Reference Code - CML PCH = 9.0.1e.30
651 18:44:35.167980 PCH-CRID Status = Disabled
652 18:44:35.171749 PCH-CRID Original Value = ff.ff.ff.ffff
653 18:44:35.174854 PCH-CRID New Value = ff.ff.ff.ffff
654 18:44:35.177684 OPROM - RST - RAID = ff.ff.ff.ffff
655 18:44:35.180949 ChipsetInit Base Version = ff.ff.ff.ffff
656 18:44:35.187850 ChipsetInit Oem Version = ff.ff.ff.ffff
657 18:44:35.187938 Display FSP Version Info HOB
658 18:44:35.194212 Reference Code - SA - System Agent = 9.0.1e.30
659 18:44:35.197158 Reference Code - MRC = 0.7.1.6c
660 18:44:35.201388 SA - PCIe Version = 9.0.1e.30
661 18:44:35.203938 SA-CRID Status = Disabled
662 18:44:35.207387 SA-CRID Original Value = 0.0.0.c
663 18:44:35.207474 SA-CRID New Value = 0.0.0.c
664 18:44:35.210532 OPROM - VBIOS = ff.ff.ff.ffff
665 18:44:35.214280 RTC Init
666 18:44:35.217324 Set power on after power failure.
667 18:44:35.217410 Disabling Deep S3
668 18:44:35.220540 Disabling Deep S3
669 18:44:35.224148 Disabling Deep S4
670 18:44:35.224236 Disabling Deep S4
671 18:44:35.227195 Disabling Deep S5
672 18:44:35.227282 Disabling Deep S5
673 18:44:35.234324 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
674 18:44:35.237331 Enumerating buses...
675 18:44:35.240608 Show all devs... Before device enumeration.
676 18:44:35.243771 Root Device: enabled 1
677 18:44:35.247332 CPU_CLUSTER: 0: enabled 1
678 18:44:35.247419 DOMAIN: 0000: enabled 1
679 18:44:35.250426 APIC: 00: enabled 1
680 18:44:35.253578 PCI: 00:00.0: enabled 1
681 18:44:35.253666 PCI: 00:02.0: enabled 1
682 18:44:35.257201 PCI: 00:04.0: enabled 0
683 18:44:35.260304 PCI: 00:05.0: enabled 0
684 18:44:35.263427 PCI: 00:12.0: enabled 1
685 18:44:35.263514 PCI: 00:12.5: enabled 0
686 18:44:35.266551 PCI: 00:12.6: enabled 0
687 18:44:35.270686 PCI: 00:14.0: enabled 1
688 18:44:35.273463 PCI: 00:14.1: enabled 0
689 18:44:35.273550 PCI: 00:14.3: enabled 1
690 18:44:35.276665 PCI: 00:14.5: enabled 0
691 18:44:35.280461 PCI: 00:15.0: enabled 1
692 18:44:35.283765 PCI: 00:15.1: enabled 1
693 18:44:35.283853 PCI: 00:15.2: enabled 0
694 18:44:35.287042 PCI: 00:15.3: enabled 0
695 18:44:35.289941 PCI: 00:16.0: enabled 1
696 18:44:35.290032 PCI: 00:16.1: enabled 0
697 18:44:35.292920 PCI: 00:16.2: enabled 0
698 18:44:35.296932 PCI: 00:16.3: enabled 0
699 18:44:35.300071 PCI: 00:16.4: enabled 0
700 18:44:35.300146 PCI: 00:16.5: enabled 0
701 18:44:35.303290 PCI: 00:17.0: enabled 1
702 18:44:35.306039 PCI: 00:19.0: enabled 1
703 18:44:35.309846 PCI: 00:19.1: enabled 0
704 18:44:35.309918 PCI: 00:19.2: enabled 0
705 18:44:35.313164 PCI: 00:1a.0: enabled 0
706 18:44:35.316289 PCI: 00:1c.0: enabled 0
707 18:44:35.319258 PCI: 00:1c.1: enabled 0
708 18:44:35.319331 PCI: 00:1c.2: enabled 0
709 18:44:35.322920 PCI: 00:1c.3: enabled 0
710 18:44:35.325802 PCI: 00:1c.4: enabled 0
711 18:44:35.329033 PCI: 00:1c.5: enabled 0
712 18:44:35.329111 PCI: 00:1c.6: enabled 0
713 18:44:35.332680 PCI: 00:1c.7: enabled 0
714 18:44:35.335708 PCI: 00:1d.0: enabled 1
715 18:44:35.338786 PCI: 00:1d.1: enabled 0
716 18:44:35.338872 PCI: 00:1d.2: enabled 0
717 18:44:35.342045 PCI: 00:1d.3: enabled 0
718 18:44:35.345850 PCI: 00:1d.4: enabled 0
719 18:44:35.348862 PCI: 00:1d.5: enabled 1
720 18:44:35.348948 PCI: 00:1e.0: enabled 1
721 18:44:35.351981 PCI: 00:1e.1: enabled 0
722 18:44:35.355214 PCI: 00:1e.2: enabled 1
723 18:44:35.358901 PCI: 00:1e.3: enabled 1
724 18:44:35.358987 PCI: 00:1f.0: enabled 1
725 18:44:35.361924 PCI: 00:1f.1: enabled 1
726 18:44:35.365058 PCI: 00:1f.2: enabled 1
727 18:44:35.368624 PCI: 00:1f.3: enabled 1
728 18:44:35.368711 PCI: 00:1f.4: enabled 1
729 18:44:35.371969 PCI: 00:1f.5: enabled 1
730 18:44:35.375194 PCI: 00:1f.6: enabled 0
731 18:44:35.375281 USB0 port 0: enabled 1
732 18:44:35.378369 I2C: 00:15: enabled 1
733 18:44:35.381510 I2C: 00:5d: enabled 1
734 18:44:35.384580 GENERIC: 0.0: enabled 1
735 18:44:35.384666 I2C: 00:1a: enabled 1
736 18:44:35.388167 I2C: 00:38: enabled 1
737 18:44:35.391762 I2C: 00:39: enabled 1
738 18:44:35.391848 I2C: 00:3a: enabled 1
739 18:44:35.394576 I2C: 00:3b: enabled 1
740 18:44:35.397688 PCI: 00:00.0: enabled 1
741 18:44:35.397775 SPI: 00: enabled 1
742 18:44:35.401627 SPI: 01: enabled 1
743 18:44:35.404754 PNP: 0c09.0: enabled 1
744 18:44:35.404836 USB2 port 0: enabled 1
745 18:44:35.407708 USB2 port 1: enabled 1
746 18:44:35.410710 USB2 port 2: enabled 0
747 18:44:35.414565 USB2 port 3: enabled 0
748 18:44:35.414651 USB2 port 5: enabled 0
749 18:44:35.417634 USB2 port 6: enabled 1
750 18:44:35.420953 USB2 port 9: enabled 1
751 18:44:35.421040 USB3 port 0: enabled 1
752 18:44:35.424058 USB3 port 1: enabled 1
753 18:44:35.427244 USB3 port 2: enabled 1
754 18:44:35.430387 USB3 port 3: enabled 1
755 18:44:35.430470 USB3 port 4: enabled 0
756 18:44:35.434204 APIC: 03: enabled 1
757 18:44:35.434280 APIC: 02: enabled 1
758 18:44:35.437277 APIC: 01: enabled 1
759 18:44:35.440746 APIC: 07: enabled 1
760 18:44:35.440822 APIC: 04: enabled 1
761 18:44:35.443866 APIC: 06: enabled 1
762 18:44:35.446904 APIC: 05: enabled 1
763 18:44:35.446978 Compare with tree...
764 18:44:35.450810 Root Device: enabled 1
765 18:44:35.453715 CPU_CLUSTER: 0: enabled 1
766 18:44:35.453789 APIC: 00: enabled 1
767 18:44:35.456857 APIC: 03: enabled 1
768 18:44:35.460545 APIC: 02: enabled 1
769 18:44:35.460621 APIC: 01: enabled 1
770 18:44:35.463708 APIC: 07: enabled 1
771 18:44:35.466811 APIC: 04: enabled 1
772 18:44:35.470075 APIC: 06: enabled 1
773 18:44:35.470151 APIC: 05: enabled 1
774 18:44:35.473066 DOMAIN: 0000: enabled 1
775 18:44:35.476286 PCI: 00:00.0: enabled 1
776 18:44:35.479712 PCI: 00:02.0: enabled 1
777 18:44:35.479787 PCI: 00:04.0: enabled 0
778 18:44:35.483233 PCI: 00:05.0: enabled 0
779 18:44:35.486290 PCI: 00:12.0: enabled 1
780 18:44:35.489574 PCI: 00:12.5: enabled 0
781 18:44:35.492684 PCI: 00:12.6: enabled 0
782 18:44:35.492758 PCI: 00:14.0: enabled 1
783 18:44:35.496279 USB0 port 0: enabled 1
784 18:44:35.499549 USB2 port 0: enabled 1
785 18:44:35.502780 USB2 port 1: enabled 1
786 18:44:35.505997 USB2 port 2: enabled 0
787 18:44:35.509130 USB2 port 3: enabled 0
788 18:44:35.509206 USB2 port 5: enabled 0
789 18:44:35.512710 USB2 port 6: enabled 1
790 18:44:35.515885 USB2 port 9: enabled 1
791 18:44:35.519265 USB3 port 0: enabled 1
792 18:44:35.522550 USB3 port 1: enabled 1
793 18:44:35.525444 USB3 port 2: enabled 1
794 18:44:35.525532 USB3 port 3: enabled 1
795 18:44:35.528620 USB3 port 4: enabled 0
796 18:44:35.532720 PCI: 00:14.1: enabled 0
797 18:44:35.535695 PCI: 00:14.3: enabled 1
798 18:44:35.538543 PCI: 00:14.5: enabled 0
799 18:44:35.538618 PCI: 00:15.0: enabled 1
800 18:44:35.541715 I2C: 00:15: enabled 1
801 18:44:35.544974 PCI: 00:15.1: enabled 1
802 18:44:35.548694 I2C: 00:5d: enabled 1
803 18:44:35.551922 GENERIC: 0.0: enabled 1
804 18:44:35.552000 PCI: 00:15.2: enabled 0
805 18:44:35.555065 PCI: 00:15.3: enabled 0
806 18:44:35.558730 PCI: 00:16.0: enabled 1
807 18:44:35.561967 PCI: 00:16.1: enabled 0
808 18:44:35.564823 PCI: 00:16.2: enabled 0
809 18:44:35.564916 PCI: 00:16.3: enabled 0
810 18:44:35.568130 PCI: 00:16.4: enabled 0
811 18:44:35.571132 PCI: 00:16.5: enabled 0
812 18:44:35.574812 PCI: 00:17.0: enabled 1
813 18:44:35.577974 PCI: 00:19.0: enabled 1
814 18:44:35.578060 I2C: 00:1a: enabled 1
815 18:44:35.581194 I2C: 00:38: enabled 1
816 18:44:35.584600 I2C: 00:39: enabled 1
817 18:44:35.587504 I2C: 00:3a: enabled 1
818 18:44:35.591224 I2C: 00:3b: enabled 1
819 18:44:35.591310 PCI: 00:19.1: enabled 0
820 18:44:35.594294 PCI: 00:19.2: enabled 0
821 18:44:35.597613 PCI: 00:1a.0: enabled 0
822 18:44:35.601070 PCI: 00:1c.0: enabled 0
823 18:44:35.604458 PCI: 00:1c.1: enabled 0
824 18:44:35.604543 PCI: 00:1c.2: enabled 0
825 18:44:35.607703 PCI: 00:1c.3: enabled 0
826 18:44:35.610630 PCI: 00:1c.4: enabled 0
827 18:44:35.614242 PCI: 00:1c.5: enabled 0
828 18:44:35.617397 PCI: 00:1c.6: enabled 0
829 18:44:35.617483 PCI: 00:1c.7: enabled 0
830 18:44:35.620473 PCI: 00:1d.0: enabled 1
831 18:44:35.623574 PCI: 00:1d.1: enabled 0
832 18:44:35.626820 PCI: 00:1d.2: enabled 0
833 18:44:35.630522 PCI: 00:1d.3: enabled 0
834 18:44:35.630609 PCI: 00:1d.4: enabled 0
835 18:44:35.633755 PCI: 00:1d.5: enabled 1
836 18:44:35.636869 PCI: 00:00.0: enabled 1
837 18:44:35.639992 PCI: 00:1e.0: enabled 1
838 18:44:35.643843 PCI: 00:1e.1: enabled 0
839 18:44:35.643922 PCI: 00:1e.2: enabled 1
840 18:44:35.646833 SPI: 00: enabled 1
841 18:44:35.650412 PCI: 00:1e.3: enabled 1
842 18:44:35.653237 SPI: 01: enabled 1
843 18:44:35.653318 PCI: 00:1f.0: enabled 1
844 18:44:35.656310 PNP: 0c09.0: enabled 1
845 18:44:35.660052 PCI: 00:1f.1: enabled 1
846 18:44:35.663081 PCI: 00:1f.2: enabled 1
847 18:44:35.666412 PCI: 00:1f.3: enabled 1
848 18:44:35.666494 PCI: 00:1f.4: enabled 1
849 18:44:35.669323 PCI: 00:1f.5: enabled 1
850 18:44:35.673240 PCI: 00:1f.6: enabled 0
851 18:44:35.676319 Root Device scanning...
852 18:44:35.679532 scan_static_bus for Root Device
853 18:44:35.682826 CPU_CLUSTER: 0 enabled
854 18:44:35.682901 DOMAIN: 0000 enabled
855 18:44:35.685794 DOMAIN: 0000 scanning...
856 18:44:35.689685 PCI: pci_scan_bus for bus 00
857 18:44:35.693111 PCI: 00:00.0 [8086/0000] ops
858 18:44:35.695881 PCI: 00:00.0 [8086/9b61] enabled
859 18:44:35.698905 PCI: 00:02.0 [8086/0000] bus ops
860 18:44:35.702715 PCI: 00:02.0 [8086/9b41] enabled
861 18:44:35.705817 PCI: 00:04.0 [8086/1903] disabled
862 18:44:35.708919 PCI: 00:08.0 [8086/1911] enabled
863 18:44:35.712259 PCI: 00:12.0 [8086/02f9] enabled
864 18:44:35.715658 PCI: 00:14.0 [8086/0000] bus ops
865 18:44:35.718678 PCI: 00:14.0 [8086/02ed] enabled
866 18:44:35.721744 PCI: 00:14.2 [8086/02ef] enabled
867 18:44:35.725591 PCI: 00:14.3 [8086/02f0] enabled
868 18:44:35.728890 PCI: 00:15.0 [8086/0000] bus ops
869 18:44:35.731734 PCI: 00:15.0 [8086/02e8] enabled
870 18:44:35.735466 PCI: 00:15.1 [8086/0000] bus ops
871 18:44:35.738674 PCI: 00:15.1 [8086/02e9] enabled
872 18:44:35.741771 PCI: 00:16.0 [8086/0000] ops
873 18:44:35.744828 PCI: 00:16.0 [8086/02e0] enabled
874 18:44:35.748030 PCI: 00:17.0 [8086/0000] ops
875 18:44:35.751286 PCI: 00:17.0 [8086/02d3] enabled
876 18:44:35.755091 PCI: 00:19.0 [8086/0000] bus ops
877 18:44:35.758169 PCI: 00:19.0 [8086/02c5] enabled
878 18:44:35.761113 PCI: 00:1d.0 [8086/0000] bus ops
879 18:44:35.765134 PCI: 00:1d.0 [8086/02b0] enabled
880 18:44:35.771172 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 18:44:35.774255 PCI: 00:1e.0 [8086/0000] ops
882 18:44:35.777734 PCI: 00:1e.0 [8086/02a8] enabled
883 18:44:35.781329 PCI: 00:1e.2 [8086/0000] bus ops
884 18:44:35.784428 PCI: 00:1e.2 [8086/02aa] enabled
885 18:44:35.787572 PCI: 00:1e.3 [8086/0000] bus ops
886 18:44:35.790806 PCI: 00:1e.3 [8086/02ab] enabled
887 18:44:35.794541 PCI: 00:1f.0 [8086/0000] bus ops
888 18:44:35.797634 PCI: 00:1f.0 [8086/0284] enabled
889 18:44:35.800684 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 18:44:35.807612 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 18:44:35.810857 PCI: 00:1f.3 [8086/0000] bus ops
892 18:44:35.813916 PCI: 00:1f.3 [8086/02c8] enabled
893 18:44:35.817933 PCI: 00:1f.4 [8086/0000] bus ops
894 18:44:35.820803 PCI: 00:1f.4 [8086/02a3] enabled
895 18:44:35.823886 PCI: 00:1f.5 [8086/0000] bus ops
896 18:44:35.827064 PCI: 00:1f.5 [8086/02a4] enabled
897 18:44:35.830358 PCI: Leftover static devices:
898 18:44:35.833603 PCI: 00:05.0
899 18:44:35.833690 PCI: 00:12.5
900 18:44:35.833758 PCI: 00:12.6
901 18:44:35.837189 PCI: 00:14.1
902 18:44:35.837274 PCI: 00:14.5
903 18:44:35.840381 PCI: 00:15.2
904 18:44:35.840467 PCI: 00:15.3
905 18:44:35.840535 PCI: 00:16.1
906 18:44:35.843496 PCI: 00:16.2
907 18:44:35.843581 PCI: 00:16.3
908 18:44:35.846583 PCI: 00:16.4
909 18:44:35.846668 PCI: 00:16.5
910 18:44:35.849885 PCI: 00:19.1
911 18:44:35.849970 PCI: 00:19.2
912 18:44:35.850037 PCI: 00:1a.0
913 18:44:35.852949 PCI: 00:1c.0
914 18:44:35.853034 PCI: 00:1c.1
915 18:44:35.856785 PCI: 00:1c.2
916 18:44:35.856870 PCI: 00:1c.3
917 18:44:35.856938 PCI: 00:1c.4
918 18:44:35.859863 PCI: 00:1c.5
919 18:44:35.859949 PCI: 00:1c.6
920 18:44:35.863266 PCI: 00:1c.7
921 18:44:35.863352 PCI: 00:1d.1
922 18:44:35.866254 PCI: 00:1d.2
923 18:44:35.866339 PCI: 00:1d.3
924 18:44:35.866407 PCI: 00:1d.4
925 18:44:35.869918 PCI: 00:1d.5
926 18:44:35.870004 PCI: 00:1e.1
927 18:44:35.873177 PCI: 00:1f.1
928 18:44:35.873262 PCI: 00:1f.2
929 18:44:35.873329 PCI: 00:1f.6
930 18:44:35.876336 PCI: Check your devicetree.cb.
931 18:44:35.879305 PCI: 00:02.0 scanning...
932 18:44:35.882585 scan_generic_bus for PCI: 00:02.0
933 18:44:35.889482 scan_generic_bus for PCI: 00:02.0 done
934 18:44:35.892322 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
935 18:44:35.895554 PCI: 00:14.0 scanning...
936 18:44:35.899337 scan_static_bus for PCI: 00:14.0
937 18:44:35.902405 USB0 port 0 enabled
938 18:44:35.902491 USB0 port 0 scanning...
939 18:44:35.906023 scan_static_bus for USB0 port 0
940 18:44:35.909320 USB2 port 0 enabled
941 18:44:35.912434 USB2 port 1 enabled
942 18:44:35.912520 USB2 port 2 disabled
943 18:44:35.915839 USB2 port 3 disabled
944 18:44:35.918914 USB2 port 5 disabled
945 18:44:35.919005 USB2 port 6 enabled
946 18:44:35.922738 USB2 port 9 enabled
947 18:44:35.925420 USB3 port 0 enabled
948 18:44:35.925506 USB3 port 1 enabled
949 18:44:35.928602 USB3 port 2 enabled
950 18:44:35.928688 USB3 port 3 enabled
951 18:44:35.932086 USB3 port 4 disabled
952 18:44:35.935529 USB2 port 0 scanning...
953 18:44:35.938428 scan_static_bus for USB2 port 0
954 18:44:35.942061 scan_static_bus for USB2 port 0 done
955 18:44:35.948305 scan_bus: scanning of bus USB2 port 0 took 9708 usecs
956 18:44:35.948391 USB2 port 1 scanning...
957 18:44:35.951498 scan_static_bus for USB2 port 1
958 18:44:35.958815 scan_static_bus for USB2 port 1 done
959 18:44:35.961584 scan_bus: scanning of bus USB2 port 1 took 9699 usecs
960 18:44:35.964734 USB2 port 6 scanning...
961 18:44:35.967996 scan_static_bus for USB2 port 6
962 18:44:35.971166 scan_static_bus for USB2 port 6 done
963 18:44:35.978067 scan_bus: scanning of bus USB2 port 6 took 9716 usecs
964 18:44:35.981152 USB2 port 9 scanning...
965 18:44:35.984440 scan_static_bus for USB2 port 9
966 18:44:35.987952 scan_static_bus for USB2 port 9 done
967 18:44:35.990569 scan_bus: scanning of bus USB2 port 9 took 9710 usecs
968 18:44:35.994403 USB3 port 0 scanning...
969 18:44:35.997561 scan_static_bus for USB3 port 0
970 18:44:36.000833 scan_static_bus for USB3 port 0 done
971 18:44:36.007199 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
972 18:44:36.010352 USB3 port 1 scanning...
973 18:44:36.013754 scan_static_bus for USB3 port 1
974 18:44:36.017326 scan_static_bus for USB3 port 1 done
975 18:44:36.023646 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
976 18:44:36.023732 USB3 port 2 scanning...
977 18:44:36.027464 scan_static_bus for USB3 port 2
978 18:44:36.033406 scan_static_bus for USB3 port 2 done
979 18:44:36.036853 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
980 18:44:36.039790 USB3 port 3 scanning...
981 18:44:36.043510 scan_static_bus for USB3 port 3
982 18:44:36.046830 scan_static_bus for USB3 port 3 done
983 18:44:36.052939 scan_bus: scanning of bus USB3 port 3 took 9687 usecs
984 18:44:36.056251 scan_static_bus for USB0 port 0 done
985 18:44:36.063193 scan_bus: scanning of bus USB0 port 0 took 155372 usecs
986 18:44:36.066193 scan_static_bus for PCI: 00:14.0 done
987 18:44:36.069277 scan_bus: scanning of bus PCI: 00:14.0 took 172992 usecs
988 18:44:36.072494 PCI: 00:15.0 scanning...
989 18:44:36.076281 scan_generic_bus for PCI: 00:15.0
990 18:44:36.082622 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 18:44:36.085631 scan_generic_bus for PCI: 00:15.0 done
992 18:44:36.092148 scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
993 18:44:36.092234 PCI: 00:15.1 scanning...
994 18:44:36.095944 scan_generic_bus for PCI: 00:15.1
995 18:44:36.102389 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 18:44:36.105482 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 18:44:36.108541 scan_generic_bus for PCI: 00:15.1 done
998 18:44:36.114801 scan_bus: scanning of bus PCI: 00:15.1 took 18597 usecs
999 18:44:36.118804 PCI: 00:19.0 scanning...
1000 18:44:36.121660 scan_generic_bus for PCI: 00:19.0
1001 18:44:36.124699 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 18:44:36.128494 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 18:44:36.135040 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 18:44:36.137868 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 18:44:36.141566 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 18:44:36.144933 scan_generic_bus for PCI: 00:19.0 done
1007 18:44:36.151075 scan_bus: scanning of bus PCI: 00:19.0 took 30736 usecs
1008 18:44:36.154158 PCI: 00:1d.0 scanning...
1009 18:44:36.157396 do_pci_scan_bridge for PCI: 00:1d.0
1010 18:44:36.161161 PCI: pci_scan_bus for bus 01
1011 18:44:36.164354 PCI: 01:00.0 [1c5c/1327] enabled
1012 18:44:36.167482 Enabling Common Clock Configuration
1013 18:44:36.171321 L1 Sub-State supported from root port 29
1014 18:44:36.174250 L1 Sub-State Support = 0xf
1015 18:44:36.177342 CommonModeRestoreTime = 0x28
1016 18:44:36.180580 Power On Value = 0x16, Power On Scale = 0x0
1017 18:44:36.184432 ASPM: Enabled L1
1018 18:44:36.190471 scan_bus: scanning of bus PCI: 00:1d.0 took 32779 usecs
1019 18:44:36.190557 PCI: 00:1e.2 scanning...
1020 18:44:36.193851 scan_generic_bus for PCI: 00:1e.2
1021 18:44:36.200186 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 18:44:36.203809 scan_generic_bus for PCI: 00:1e.2 done
1023 18:44:36.209817 scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs
1024 18:44:36.209904 PCI: 00:1e.3 scanning...
1025 18:44:36.213543 scan_generic_bus for PCI: 00:1e.3
1026 18:44:36.220151 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 18:44:36.222985 scan_generic_bus for PCI: 00:1e.3 done
1028 18:44:36.226538 scan_bus: scanning of bus PCI: 00:1e.3 took 13996 usecs
1029 18:44:36.229502 PCI: 00:1f.0 scanning...
1030 18:44:36.233231 scan_static_bus for PCI: 00:1f.0
1031 18:44:36.236333 PNP: 0c09.0 enabled
1032 18:44:36.239465 scan_static_bus for PCI: 00:1f.0 done
1033 18:44:36.246246 scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
1034 18:44:36.249158 PCI: 00:1f.3 scanning...
1035 18:44:36.252741 scan_bus: scanning of bus PCI: 00:1f.3 took 2853 usecs
1036 18:44:36.255815 PCI: 00:1f.4 scanning...
1037 18:44:36.259245 scan_generic_bus for PCI: 00:1f.4
1038 18:44:36.262330 scan_generic_bus for PCI: 00:1f.4 done
1039 18:44:36.268705 scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs
1040 18:44:36.272305 PCI: 00:1f.5 scanning...
1041 18:44:36.275674 scan_generic_bus for PCI: 00:1f.5
1042 18:44:36.278742 scan_generic_bus for PCI: 00:1f.5 done
1043 18:44:36.285474 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1044 18:44:36.291855 scan_bus: scanning of bus DOMAIN: 0000 took 605066 usecs
1045 18:44:36.294955 scan_static_bus for Root Device done
1046 18:44:36.301779 scan_bus: scanning of bus Root Device took 624940 usecs
1047 18:44:36.301867 done
1048 18:44:36.304879 Chrome EC: UHEPI supported
1049 18:44:36.311597 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 18:44:36.314623 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 18:44:36.321576 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 18:44:36.328565 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 18:44:36.331476 SPI flash protection: WPSW=0 SRP0=1
1054 18:44:36.338300 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 18:44:36.341450 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1056 18:44:36.345200 found VGA at PCI: 00:02.0
1057 18:44:36.348427 Setting up VGA for PCI: 00:02.0
1058 18:44:36.354610 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 18:44:36.357922 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 18:44:36.361523 Allocating resources...
1061 18:44:36.364586 Reading resources...
1062 18:44:36.368134 Root Device read_resources bus 0 link: 0
1063 18:44:36.370987 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 18:44:36.377863 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 18:44:36.380819 DOMAIN: 0000 read_resources bus 0 link: 0
1066 18:44:36.388500 PCI: 00:14.0 read_resources bus 0 link: 0
1067 18:44:36.392326 USB0 port 0 read_resources bus 0 link: 0
1068 18:44:36.400488 USB0 port 0 read_resources bus 0 link: 0 done
1069 18:44:36.403113 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 18:44:36.411024 PCI: 00:15.0 read_resources bus 1 link: 0
1071 18:44:36.414189 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 18:44:36.420499 PCI: 00:15.1 read_resources bus 2 link: 0
1073 18:44:36.424040 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 18:44:36.431397 PCI: 00:19.0 read_resources bus 3 link: 0
1075 18:44:36.438275 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 18:44:36.441760 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 18:44:36.447581 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 18:44:36.451317 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 18:44:36.457550 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 18:44:36.460810 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 18:44:36.467760 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 18:44:36.471027 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 18:44:36.477250 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 18:44:36.484033 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 18:44:36.487487 Root Device read_resources bus 0 link: 0 done
1086 18:44:36.490773 Done reading resources.
1087 18:44:36.497388 Show resources in subtree (Root Device)...After reading.
1088 18:44:36.500634 Root Device child on link 0 CPU_CLUSTER: 0
1089 18:44:36.503595 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 18:44:36.506779 APIC: 00
1091 18:44:36.506857 APIC: 03
1092 18:44:36.510278 APIC: 02
1093 18:44:36.510355 APIC: 01
1094 18:44:36.510424 APIC: 07
1095 18:44:36.513558 APIC: 04
1096 18:44:36.513631 APIC: 06
1097 18:44:36.513697 APIC: 05
1098 18:44:36.519880 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 18:44:36.529857 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 18:44:36.580153 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 18:44:36.580244 PCI: 00:00.0
1102 18:44:36.580504 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 18:44:36.581107 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 18:44:36.581360 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 18:44:36.581783 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 18:44:36.629386 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 18:44:36.629956 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 18:44:36.631088 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 18:44:36.631579 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 18:44:36.631881 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 18:44:36.678887 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 18:44:36.679269 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 18:44:36.679729 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 18:44:36.680023 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 18:44:36.680632 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 18:44:36.715709 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 18:44:36.716011 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 18:44:36.716088 PCI: 00:02.0
1119 18:44:36.716340 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 18:44:36.719714 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 18:44:36.722652 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 18:44:36.722730 PCI: 00:04.0
1123 18:44:36.722795 PCI: 00:08.0
1124 18:44:36.732546 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 18:44:36.735647 PCI: 00:12.0
1126 18:44:36.745654 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 18:44:36.748712 PCI: 00:14.0 child on link 0 USB0 port 0
1128 18:44:36.758788 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 18:44:36.765116 USB0 port 0 child on link 0 USB2 port 0
1130 18:44:36.765204 USB2 port 0
1131 18:44:36.768106 USB2 port 1
1132 18:44:36.768197 USB2 port 2
1133 18:44:36.771513 USB2 port 3
1134 18:44:36.771602 USB2 port 5
1135 18:44:36.774874 USB2 port 6
1136 18:44:36.774962 USB2 port 9
1137 18:44:36.778270 USB3 port 0
1138 18:44:36.781354 USB3 port 1
1139 18:44:36.781442 USB3 port 2
1140 18:44:36.784648 USB3 port 3
1141 18:44:36.784723 USB3 port 4
1142 18:44:36.788497 PCI: 00:14.2
1143 18:44:36.797829 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 18:44:36.807680 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 18:44:36.807762 PCI: 00:14.3
1146 18:44:36.817149 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 18:44:36.823722 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 18:44:36.833700 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 18:44:36.833789 I2C: 01:15
1150 18:44:36.836690 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 18:44:36.846790 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 18:44:36.849865 I2C: 02:5d
1153 18:44:36.849940 GENERIC: 0.0
1154 18:44:36.853726 PCI: 00:16.0
1155 18:44:36.862993 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 18:44:36.866160 PCI: 00:17.0
1157 18:44:36.872742 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 18:44:36.882617 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 18:44:36.892563 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 18:44:36.898924 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 18:44:36.909092 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 18:44:36.915410 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 18:44:36.921597 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 18:44:36.931881 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 18:44:36.931975 I2C: 03:1a
1166 18:44:36.934892 I2C: 03:38
1167 18:44:36.934983 I2C: 03:39
1168 18:44:36.938653 I2C: 03:3a
1169 18:44:36.938742 I2C: 03:3b
1170 18:44:36.944643 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 18:44:36.951128 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 18:44:36.960848 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 18:44:36.970863 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 18:44:36.974049 PCI: 01:00.0
1175 18:44:36.984050 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 18:44:36.984134 PCI: 00:1e.0
1177 18:44:36.997032 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 18:44:37.006508 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 18:44:37.009731 PCI: 00:1e.2 child on link 0 SPI: 00
1180 18:44:37.019801 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 18:44:37.019886 SPI: 00
1182 18:44:37.022840 PCI: 00:1e.3 child on link 0 SPI: 01
1183 18:44:37.032621 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 18:44:37.035793 SPI: 01
1185 18:44:37.039477 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 18:44:37.049290 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 18:44:37.058959 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 18:44:37.059048 PNP: 0c09.0
1189 18:44:37.068886 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 18:44:37.068974 PCI: 00:1f.3
1191 18:44:37.079008 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 18:44:37.088323 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 18:44:37.091443 PCI: 00:1f.4
1194 18:44:37.101916 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 18:44:37.111758 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 18:44:37.111845 PCI: 00:1f.5
1197 18:44:37.121292 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 18:44:37.127946 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 18:44:37.134699 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 18:44:37.140923 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 18:44:37.144385 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 18:44:37.147268 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 18:44:37.150870 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 18:44:37.153982 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 18:44:37.160121 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 18:44:37.167100 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 18:44:37.176984 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 18:44:37.183274 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 18:44:37.190386 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 18:44:37.196650 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 18:44:37.203185 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 18:44:37.206017 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 18:44:37.212950 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 18:44:37.216426 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 18:44:37.222481 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 18:44:37.225731 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 18:44:37.232419 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 18:44:37.235508 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 18:44:37.242429 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 18:44:37.245463 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 18:44:37.251930 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 18:44:37.254972 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 18:44:37.261595 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 18:44:37.265719 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 18:44:37.271857 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 18:44:37.275634 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 18:44:37.281740 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 18:44:37.284892 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 18:44:37.291181 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 18:44:37.294892 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 18:44:37.301095 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 18:44:37.304626 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 18:44:37.311334 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 18:44:37.314276 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 18:44:37.323948 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 18:44:37.326920 avoid_fixed_resources: DOMAIN: 0000
1237 18:44:37.333462 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 18:44:37.336875 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 18:44:37.346665 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 18:44:37.353427 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 18:44:37.363504 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 18:44:37.369687 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 18:44:37.376024 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 18:44:37.385982 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 18:44:37.392434 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 18:44:37.399037 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 18:44:37.406033 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 18:44:37.415366 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 18:44:37.415454 Setting resources...
1250 18:44:37.422391 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 18:44:37.425445 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 18:44:37.432045 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 18:44:37.434838 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 18:44:37.438573 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 18:44:37.445040 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 18:44:37.451790 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 18:44:37.457997 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 18:44:37.464629 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 18:44:37.471532 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 18:44:37.474393 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 18:44:37.481130 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 18:44:37.484569 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 18:44:37.490791 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 18:44:37.494688 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 18:44:37.500688 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 18:44:37.503887 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 18:44:37.510417 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 18:44:37.513684 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 18:44:37.520554 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 18:44:37.523677 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 18:44:37.530011 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 18:44:37.533850 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 18:44:37.540335 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 18:44:37.543514 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 18:44:37.549580 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 18:44:37.553679 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 18:44:37.556344 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 18:44:37.563216 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 18:44:37.566411 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 18:44:37.572441 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 18:44:37.576388 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 18:44:37.585480 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 18:44:37.592859 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 18:44:37.598866 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 18:44:37.605799 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 18:44:37.611919 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 18:44:37.618896 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 18:44:37.625363 Root Device assign_resources, bus 0 link: 0
1289 18:44:37.628094 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 18:44:37.638035 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 18:44:37.644900 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 18:44:37.654830 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 18:44:37.661162 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 18:44:37.671041 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 18:44:37.677375 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 18:44:37.684175 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 18:44:37.687288 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 18:44:37.697464 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 18:44:37.703464 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 18:44:37.710077 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 18:44:37.720500 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 18:44:37.723642 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 18:44:37.729818 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 18:44:37.736778 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 18:44:37.742909 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 18:44:37.746689 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 18:44:37.756163 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 18:44:37.762535 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 18:44:37.769155 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 18:44:37.779341 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 18:44:37.785816 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 18:44:37.795529 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 18:44:37.802326 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 18:44:37.808522 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 18:44:37.814973 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 18:44:37.818682 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 18:44:37.828649 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 18:44:37.838033 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 18:44:37.845051 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 18:44:37.847841 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 18:44:37.858298 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 18:44:37.861493 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 18:44:37.871317 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 18:44:37.877809 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 18:44:37.884667 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 18:44:37.887597 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 18:44:37.897305 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 18:44:37.900932 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 18:44:37.907215 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 18:44:37.910253 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 18:44:37.917062 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 18:44:37.920107 LPC: Trying to open IO window from 800 size 1ff
1333 18:44:37.930228 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 18:44:37.936532 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 18:44:37.946227 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 18:44:37.952931 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 18:44:37.960018 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 18:44:37.962983 Root Device assign_resources, bus 0 link: 0
1339 18:44:37.966027 Done setting resources.
1340 18:44:37.972945 Show resources in subtree (Root Device)...After assigning values.
1341 18:44:37.976085 Root Device child on link 0 CPU_CLUSTER: 0
1342 18:44:37.979265 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 18:44:37.982577 APIC: 00
1344 18:44:37.982653 APIC: 03
1345 18:44:37.985904 APIC: 02
1346 18:44:37.985980 APIC: 01
1347 18:44:37.986065 APIC: 07
1348 18:44:37.989435 APIC: 04
1349 18:44:37.989507 APIC: 06
1350 18:44:37.992339 APIC: 05
1351 18:44:37.995513 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 18:44:38.005760 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 18:44:38.014953 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 18:44:38.018770 PCI: 00:00.0
1355 18:44:38.028193 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 18:44:38.034813 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 18:44:38.044871 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 18:44:38.054582 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 18:44:38.064091 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 18:44:38.073982 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 18:44:38.084207 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 18:44:38.094227 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 18:44:38.100549 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 18:44:38.110382 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 18:44:38.119858 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 18:44:38.129918 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 18:44:38.139650 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 18:44:38.149856 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 18:44:38.159349 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 18:44:38.166060 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 18:44:38.169414 PCI: 00:02.0
1372 18:44:38.179285 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 18:44:38.188911 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 18:44:38.198995 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 18:44:38.202133 PCI: 00:04.0
1376 18:44:38.202219 PCI: 00:08.0
1377 18:44:38.211960 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 18:44:38.214906 PCI: 00:12.0
1379 18:44:38.224824 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 18:44:38.228594 PCI: 00:14.0 child on link 0 USB0 port 0
1381 18:44:38.241359 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 18:44:38.244900 USB0 port 0 child on link 0 USB2 port 0
1383 18:44:38.244989 USB2 port 0
1384 18:44:38.248157 USB2 port 1
1385 18:44:38.248244 USB2 port 2
1386 18:44:38.251132 USB2 port 3
1387 18:44:38.254379 USB2 port 5
1388 18:44:38.254466 USB2 port 6
1389 18:44:38.257559 USB2 port 9
1390 18:44:38.257663 USB3 port 0
1391 18:44:38.260706 USB3 port 1
1392 18:44:38.260794 USB3 port 2
1393 18:44:38.264692 USB3 port 3
1394 18:44:38.264779 USB3 port 4
1395 18:44:38.267682 PCI: 00:14.2
1396 18:44:38.277967 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 18:44:38.287459 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 18:44:38.290472 PCI: 00:14.3
1399 18:44:38.300388 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 18:44:38.303733 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 18:44:38.313099 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 18:44:38.316722 I2C: 01:15
1403 18:44:38.320028 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 18:44:38.329832 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 18:44:38.333222 I2C: 02:5d
1406 18:44:38.333320 GENERIC: 0.0
1407 18:44:38.336368 PCI: 00:16.0
1408 18:44:38.345950 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 18:44:38.346060 PCI: 00:17.0
1410 18:44:38.358889 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 18:44:38.368730 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 18:44:38.375577 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 18:44:38.385215 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 18:44:38.395372 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 18:44:38.404814 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 18:44:38.407898 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 18:44:38.420801 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 18:44:38.420927 I2C: 03:1a
1419 18:44:38.423917 I2C: 03:38
1420 18:44:38.423999 I2C: 03:39
1421 18:44:38.424064 I2C: 03:3a
1422 18:44:38.427803 I2C: 03:3b
1423 18:44:38.430767 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 18:44:38.440926 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 18:44:38.450673 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 18:44:38.460445 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 18:44:38.463434 PCI: 01:00.0
1428 18:44:38.473253 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 18:44:38.476832 PCI: 00:1e.0
1430 18:44:38.486428 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 18:44:38.496169 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 18:44:38.499332 PCI: 00:1e.2 child on link 0 SPI: 00
1433 18:44:38.509519 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 18:44:38.512738 SPI: 00
1435 18:44:38.516016 PCI: 00:1e.3 child on link 0 SPI: 01
1436 18:44:38.525694 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 18:44:38.528783 SPI: 01
1438 18:44:38.531905 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 18:44:38.542192 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 18:44:38.548491 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 18:44:38.551858 PNP: 0c09.0
1442 18:44:38.561511 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 18:44:38.561603 PCI: 00:1f.3
1444 18:44:38.571682 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 18:44:38.581655 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 18:44:38.584598 PCI: 00:1f.4
1447 18:44:38.594442 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 18:44:38.603976 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 18:44:38.604065 PCI: 00:1f.5
1450 18:44:38.613941 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 18:44:38.617617 Done allocating resources.
1452 18:44:38.623714 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 18:44:38.627005 Enabling resources...
1454 18:44:38.630587 PCI: 00:00.0 subsystem <- 8086/9b61
1455 18:44:38.633985 PCI: 00:00.0 cmd <- 06
1456 18:44:38.636894 PCI: 00:02.0 subsystem <- 8086/9b41
1457 18:44:38.640078 PCI: 00:02.0 cmd <- 03
1458 18:44:38.643272 PCI: 00:08.0 cmd <- 06
1459 18:44:38.646503 PCI: 00:12.0 subsystem <- 8086/02f9
1460 18:44:38.649643 PCI: 00:12.0 cmd <- 02
1461 18:44:38.652901 PCI: 00:14.0 subsystem <- 8086/02ed
1462 18:44:38.652988 PCI: 00:14.0 cmd <- 02
1463 18:44:38.656659 PCI: 00:14.2 cmd <- 02
1464 18:44:38.659671 PCI: 00:14.3 subsystem <- 8086/02f0
1465 18:44:38.663389 PCI: 00:14.3 cmd <- 02
1466 18:44:38.666742 PCI: 00:15.0 subsystem <- 8086/02e8
1467 18:44:38.669844 PCI: 00:15.0 cmd <- 02
1468 18:44:38.672827 PCI: 00:15.1 subsystem <- 8086/02e9
1469 18:44:38.675944 PCI: 00:15.1 cmd <- 02
1470 18:44:38.679308 PCI: 00:16.0 subsystem <- 8086/02e0
1471 18:44:38.682941 PCI: 00:16.0 cmd <- 02
1472 18:44:38.686252 PCI: 00:17.0 subsystem <- 8086/02d3
1473 18:44:38.689335 PCI: 00:17.0 cmd <- 03
1474 18:44:38.692537 PCI: 00:19.0 subsystem <- 8086/02c5
1475 18:44:38.695637 PCI: 00:19.0 cmd <- 02
1476 18:44:38.699241 PCI: 00:1d.0 bridge ctrl <- 0013
1477 18:44:38.702586 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 18:44:38.705462 PCI: 00:1d.0 cmd <- 06
1479 18:44:38.708533 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 18:44:38.712292 PCI: 00:1e.0 cmd <- 06
1481 18:44:38.715535 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 18:44:38.715610 PCI: 00:1e.2 cmd <- 06
1483 18:44:38.722516 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 18:44:38.722597 PCI: 00:1e.3 cmd <- 02
1485 18:44:38.728441 PCI: 00:1f.0 subsystem <- 8086/0284
1486 18:44:38.728526 PCI: 00:1f.0 cmd <- 407
1487 18:44:38.731768 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 18:44:38.735270 PCI: 00:1f.3 cmd <- 02
1489 18:44:38.738720 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 18:44:38.741641 PCI: 00:1f.4 cmd <- 03
1491 18:44:38.744821 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 18:44:38.747963 PCI: 00:1f.5 cmd <- 406
1493 18:44:38.757556 PCI: 01:00.0 cmd <- 02
1494 18:44:38.762190 done.
1495 18:44:38.776025 ME: Version: 14.0.39.1367
1496 18:44:38.783063 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1497 18:44:38.786140 Initializing devices...
1498 18:44:38.786231 Root Device init ...
1499 18:44:38.792378 Chrome EC: Set SMI mask to 0x0000000000000000
1500 18:44:38.799078 Chrome EC: clear events_b mask to 0x0000000000000000
1501 18:44:38.802526 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 18:44:38.809105 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 18:44:38.815419 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 18:44:38.818654 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 18:44:38.825527 Root Device init finished in 35283 usecs
1506 18:44:38.828566 CPU_CLUSTER: 0 init ...
1507 18:44:38.831817 CPU_CLUSTER: 0 init finished in 2446 usecs
1508 18:44:38.836668 PCI: 00:00.0 init ...
1509 18:44:38.840437 CPU TDP: 15 Watts
1510 18:44:38.843494 CPU PL2 = 64 Watts
1511 18:44:38.846632 PCI: 00:00.0 init finished in 7074 usecs
1512 18:44:38.850068 PCI: 00:02.0 init ...
1513 18:44:38.853165 PCI: 00:02.0 init finished in 2243 usecs
1514 18:44:38.856324 PCI: 00:08.0 init ...
1515 18:44:38.859867 PCI: 00:08.0 init finished in 2250 usecs
1516 18:44:38.863136 PCI: 00:12.0 init ...
1517 18:44:38.866136 PCI: 00:12.0 init finished in 2251 usecs
1518 18:44:38.870379 PCI: 00:14.0 init ...
1519 18:44:38.873249 PCI: 00:14.0 init finished in 2252 usecs
1520 18:44:38.876256 PCI: 00:14.2 init ...
1521 18:44:38.879258 PCI: 00:14.2 init finished in 2250 usecs
1522 18:44:38.882543 PCI: 00:14.3 init ...
1523 18:44:38.886264 PCI: 00:14.3 init finished in 2269 usecs
1524 18:44:38.889423 PCI: 00:15.0 init ...
1525 18:44:38.892519 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 18:44:38.899142 PCI: 00:15.0 init finished in 5965 usecs
1527 18:44:38.899229 PCI: 00:15.1 init ...
1528 18:44:38.905737 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 18:44:38.908616 PCI: 00:15.1 init finished in 5973 usecs
1530 18:44:38.912421 PCI: 00:16.0 init ...
1531 18:44:38.915636 PCI: 00:16.0 init finished in 2241 usecs
1532 18:44:38.918957 PCI: 00:19.0 init ...
1533 18:44:38.921917 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 18:44:38.925128 PCI: 00:19.0 init finished in 5971 usecs
1535 18:44:38.928747 PCI: 00:1d.0 init ...
1536 18:44:38.931916 Initializing PCH PCIe bridge.
1537 18:44:38.935055 PCI: 00:1d.0 init finished in 5281 usecs
1538 18:44:38.938792 PCI: 00:1f.0 init ...
1539 18:44:38.942011 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 18:44:38.948364 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 18:44:38.948456 IOAPIC: ID = 0x02
1542 18:44:38.952039 IOAPIC: Dumping registers
1543 18:44:38.955230 reg 0x0000: 0x02000000
1544 18:44:38.958653 reg 0x0001: 0x00770020
1545 18:44:38.961496 reg 0x0002: 0x00000000
1546 18:44:38.965070 PCI: 00:1f.0 init finished in 23512 usecs
1547 18:44:38.968136 PCI: 00:1f.4 init ...
1548 18:44:38.971362 PCI: 00:1f.4 init finished in 2260 usecs
1549 18:44:38.982936 PCI: 01:00.0 init ...
1550 18:44:38.986136 PCI: 01:00.0 init finished in 2250 usecs
1551 18:44:38.990499 PNP: 0c09.0 init ...
1552 18:44:38.997250 Google Chrome EC uptime: 11.092 seconds
1553 18:44:39.000322 Google Chrome AP resets since EC boot: 0
1554 18:44:39.003662 Google Chrome most recent AP reset causes:
1555 18:44:39.009871 Google Chrome EC reset flags at last EC boot: reset-pin
1556 18:44:39.013647 PNP: 0c09.0 init finished in 20612 usecs
1557 18:44:39.016980 Devices initialized
1558 18:44:39.020129 Show all devs... After init.
1559 18:44:39.020202 Root Device: enabled 1
1560 18:44:39.023620 CPU_CLUSTER: 0: enabled 1
1561 18:44:39.026663 DOMAIN: 0000: enabled 1
1562 18:44:39.026750 APIC: 00: enabled 1
1563 18:44:39.030205 PCI: 00:00.0: enabled 1
1564 18:44:39.032988 PCI: 00:02.0: enabled 1
1565 18:44:39.036351 PCI: 00:04.0: enabled 0
1566 18:44:39.036438 PCI: 00:05.0: enabled 0
1567 18:44:39.039329 PCI: 00:12.0: enabled 1
1568 18:44:39.043108 PCI: 00:12.5: enabled 0
1569 18:44:39.046344 PCI: 00:12.6: enabled 0
1570 18:44:39.046431 PCI: 00:14.0: enabled 1
1571 18:44:39.049479 PCI: 00:14.1: enabled 0
1572 18:44:39.052563 PCI: 00:14.3: enabled 1
1573 18:44:39.056285 PCI: 00:14.5: enabled 0
1574 18:44:39.056372 PCI: 00:15.0: enabled 1
1575 18:44:39.059429 PCI: 00:15.1: enabled 1
1576 18:44:39.062928 PCI: 00:15.2: enabled 0
1577 18:44:39.065950 PCI: 00:15.3: enabled 0
1578 18:44:39.066032 PCI: 00:16.0: enabled 1
1579 18:44:39.068914 PCI: 00:16.1: enabled 0
1580 18:44:39.072655 PCI: 00:16.2: enabled 0
1581 18:44:39.076092 PCI: 00:16.3: enabled 0
1582 18:44:39.076181 PCI: 00:16.4: enabled 0
1583 18:44:39.078730 PCI: 00:16.5: enabled 0
1584 18:44:39.082740 PCI: 00:17.0: enabled 1
1585 18:44:39.085542 PCI: 00:19.0: enabled 1
1586 18:44:39.085628 PCI: 00:19.1: enabled 0
1587 18:44:39.088915 PCI: 00:19.2: enabled 0
1588 18:44:39.091808 PCI: 00:1a.0: enabled 0
1589 18:44:39.095483 PCI: 00:1c.0: enabled 0
1590 18:44:39.095569 PCI: 00:1c.1: enabled 0
1591 18:44:39.098820 PCI: 00:1c.2: enabled 0
1592 18:44:39.101838 PCI: 00:1c.3: enabled 0
1593 18:44:39.101932 PCI: 00:1c.4: enabled 0
1594 18:44:39.104931 PCI: 00:1c.5: enabled 0
1595 18:44:39.108119 PCI: 00:1c.6: enabled 0
1596 18:44:39.112145 PCI: 00:1c.7: enabled 0
1597 18:44:39.112231 PCI: 00:1d.0: enabled 1
1598 18:44:39.115078 PCI: 00:1d.1: enabled 0
1599 18:44:39.118350 PCI: 00:1d.2: enabled 0
1600 18:44:39.121776 PCI: 00:1d.3: enabled 0
1601 18:44:39.121861 PCI: 00:1d.4: enabled 0
1602 18:44:39.124712 PCI: 00:1d.5: enabled 0
1603 18:44:39.127796 PCI: 00:1e.0: enabled 1
1604 18:44:39.131060 PCI: 00:1e.1: enabled 0
1605 18:44:39.131155 PCI: 00:1e.2: enabled 1
1606 18:44:39.134681 PCI: 00:1e.3: enabled 1
1607 18:44:39.138081 PCI: 00:1f.0: enabled 1
1608 18:44:39.141063 PCI: 00:1f.1: enabled 0
1609 18:44:39.141153 PCI: 00:1f.2: enabled 0
1610 18:44:39.144881 PCI: 00:1f.3: enabled 1
1611 18:44:39.147689 PCI: 00:1f.4: enabled 1
1612 18:44:39.150836 PCI: 00:1f.5: enabled 1
1613 18:44:39.150922 PCI: 00:1f.6: enabled 0
1614 18:44:39.154038 USB0 port 0: enabled 1
1615 18:44:39.157254 I2C: 01:15: enabled 1
1616 18:44:39.157340 I2C: 02:5d: enabled 1
1617 18:44:39.160938 GENERIC: 0.0: enabled 1
1618 18:44:39.163935 I2C: 03:1a: enabled 1
1619 18:44:39.167733 I2C: 03:38: enabled 1
1620 18:44:39.167818 I2C: 03:39: enabled 1
1621 18:44:39.170791 I2C: 03:3a: enabled 1
1622 18:44:39.173667 I2C: 03:3b: enabled 1
1623 18:44:39.173753 PCI: 00:00.0: enabled 1
1624 18:44:39.177475 SPI: 00: enabled 1
1625 18:44:39.177562 SPI: 01: enabled 1
1626 18:44:39.180810 PNP: 0c09.0: enabled 1
1627 18:44:39.183734 USB2 port 0: enabled 1
1628 18:44:39.186695 USB2 port 1: enabled 1
1629 18:44:39.186781 USB2 port 2: enabled 0
1630 18:44:39.190684 USB2 port 3: enabled 0
1631 18:44:39.193535 USB2 port 5: enabled 0
1632 18:44:39.193621 USB2 port 6: enabled 1
1633 18:44:39.196679 USB2 port 9: enabled 1
1634 18:44:39.199903 USB3 port 0: enabled 1
1635 18:44:39.203711 USB3 port 1: enabled 1
1636 18:44:39.203828 USB3 port 2: enabled 1
1637 18:44:39.206797 USB3 port 3: enabled 1
1638 18:44:39.209977 USB3 port 4: enabled 0
1639 18:44:39.210085 APIC: 03: enabled 1
1640 18:44:39.213443 APIC: 02: enabled 1
1641 18:44:39.216797 APIC: 01: enabled 1
1642 18:44:39.216886 APIC: 07: enabled 1
1643 18:44:39.219856 APIC: 04: enabled 1
1644 18:44:39.222833 APIC: 06: enabled 1
1645 18:44:39.222919 APIC: 05: enabled 1
1646 18:44:39.226216 PCI: 00:08.0: enabled 1
1647 18:44:39.229404 PCI: 00:14.2: enabled 1
1648 18:44:39.229490 PCI: 01:00.0: enabled 1
1649 18:44:39.233717 Disabling ACPI via APMC:
1650 18:44:39.237829 done.
1651 18:44:39.241035 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 18:44:39.244137 ELOG: NV offset 0xaf0000 size 0x4000
1653 18:44:39.251707 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 18:44:39.258707 ELOG: Event(17) added with size 13 at 2023-02-25 18:44:39 UTC
1655 18:44:39.265093 POST: Unexpected post code in previous boot: 0x73
1656 18:44:39.271331 ELOG: Event(A3) added with size 11 at 2023-02-25 18:44:39 UTC
1657 18:44:39.278008 ELOG: Event(A6) added with size 13 at 2023-02-25 18:44:39 UTC
1658 18:44:39.284329 ELOG: Event(92) added with size 9 at 2023-02-25 18:44:39 UTC
1659 18:44:39.291152 ELOG: Event(93) added with size 9 at 2023-02-25 18:44:39 UTC
1660 18:44:39.297754 ELOG: Event(9A) added with size 9 at 2023-02-25 18:44:39 UTC
1661 18:44:39.301172 ELOG: Event(9E) added with size 10 at 2023-02-25 18:44:39 UTC
1662 18:44:39.307473 ELOG: Event(9F) added with size 14 at 2023-02-25 18:44:39 UTC
1663 18:44:39.313944 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1664 18:44:39.320408 ELOG: Event(A1) added with size 10 at 2023-02-25 18:44:39 UTC
1665 18:44:39.327540 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1666 18:44:39.333494 ELOG: Event(A0) added with size 9 at 2023-02-25 18:44:39 UTC
1667 18:44:39.340293 elog_add_boot_reason: Logged dev mode boot
1668 18:44:39.340380 Finalize devices...
1669 18:44:39.343335 PCI: 00:17.0 final
1670 18:44:39.343426 Devices finalized
1671 18:44:39.350556 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1672 18:44:39.356895 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1673 18:44:39.360326 ME: HFSTS1 : 0x90000245
1674 18:44:39.363488 ME: HFSTS2 : 0x3B850126
1675 18:44:39.366650 ME: HFSTS3 : 0x00000020
1676 18:44:39.373434 ME: HFSTS4 : 0x00004800
1677 18:44:39.376528 ME: HFSTS5 : 0x00000000
1678 18:44:39.379642 ME: HFSTS6 : 0x40400006
1679 18:44:39.383322 ME: Manufacturing Mode : NO
1680 18:44:39.386741 ME: FW Partition Table : OK
1681 18:44:39.389771 ME: Bringup Loader Failure : NO
1682 18:44:39.393005 ME: Firmware Init Complete : YES
1683 18:44:39.396146 ME: Boot Options Present : NO
1684 18:44:39.399767 ME: Update In Progress : NO
1685 18:44:39.402771 ME: D0i3 Support : YES
1686 18:44:39.405957 ME: Low Power State Enabled : NO
1687 18:44:39.409285 ME: CPU Replaced : NO
1688 18:44:39.412187 ME: CPU Replacement Valid : YES
1689 18:44:39.416329 ME: Current Working State : 5
1690 18:44:39.419173 ME: Current Operation State : 1
1691 18:44:39.422582 ME: Current Operation Mode : 0
1692 18:44:39.425630 ME: Error Code : 0
1693 18:44:39.428693 ME: CPU Debug Disabled : YES
1694 18:44:39.432122 ME: TXT Support : NO
1695 18:44:39.438847 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1696 18:44:39.445137 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 18:44:39.445273 CBFS @ c08000 size 3f8000
1698 18:44:39.452100 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 18:44:39.455361 CBFS: Locating 'fallback/dsdt.aml'
1700 18:44:39.458281 CBFS: Found @ offset 10bb80 size 3fa5
1701 18:44:39.464637 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1702 18:44:39.468285 CBFS @ c08000 size 3f8000
1703 18:44:39.474866 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1704 18:44:39.477873 CBFS: Locating 'fallback/slic'
1705 18:44:39.481063 CBFS: 'fallback/slic' not found.
1706 18:44:39.484451 ACPI: Writing ACPI tables at 99b3e000.
1707 18:44:39.487483 ACPI: * FACS
1708 18:44:39.487575 ACPI: * DSDT
1709 18:44:39.494786 Ramoops buffer: 0x100000@0x99a3d000.
1710 18:44:39.497828 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1711 18:44:39.500949 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1712 18:44:39.504435 Google Chrome EC: version:
1713 18:44:39.507659 ro: helios_v2.0.2659-56403530b
1714 18:44:39.510685 rw: helios_v2.0.2849-c41de27e7d
1715 18:44:39.513833 running image: 1
1716 18:44:39.517714 ACPI: * FADT
1717 18:44:39.517816 SCI is IRQ9
1718 18:44:39.523918 ACPI: added table 1/32, length now 40
1719 18:44:39.524007 ACPI: * SSDT
1720 18:44:39.527088 Found 1 CPU(s) with 8 core(s) each.
1721 18:44:39.533820 Error: Could not locate 'wifi_sar' in VPD.
1722 18:44:39.536817 Checking CBFS for default SAR values
1723 18:44:39.540078 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1724 18:44:39.543577 CBFS @ c08000 size 3f8000
1725 18:44:39.549785 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1726 18:44:39.553808 CBFS: Locating 'wifi_sar_defaults.hex'
1727 18:44:39.556631 CBFS: Found @ offset 5fac0 size 77
1728 18:44:39.559995 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1729 18:44:39.566005 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1730 18:44:39.569750 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1731 18:44:39.576142 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1732 18:44:39.579225 failed to find key in VPD: dsm_calib_r0_0
1733 18:44:39.589188 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1734 18:44:39.595564 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1735 18:44:39.598759 failed to find key in VPD: dsm_calib_r0_1
1736 18:44:39.605664 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1737 18:44:39.611922 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1738 18:44:39.615741 failed to find key in VPD: dsm_calib_r0_2
1739 18:44:39.624971 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1740 18:44:39.632039 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1741 18:44:39.635161 failed to find key in VPD: dsm_calib_r0_3
1742 18:44:39.645223 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1743 18:44:39.648132 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1744 18:44:39.655061 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1745 18:44:39.658046 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1746 18:44:39.661322 EC returned error result code 1
1747 18:44:39.665236 EC returned error result code 1
1748 18:44:39.668578 EC returned error result code 1
1749 18:44:39.674779 PS2K: Bad resp from EC. Vivaldi disabled!
1750 18:44:39.678583 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1751 18:44:39.684511 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1752 18:44:39.691391 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1753 18:44:39.694553 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1754 18:44:39.701001 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1755 18:44:39.707964 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1756 18:44:39.711008 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1757 18:44:39.717816 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1758 18:44:39.720950 ACPI: added table 2/32, length now 44
1759 18:44:39.724100 ACPI: * MCFG
1760 18:44:39.727304 ACPI: added table 3/32, length now 48
1761 18:44:39.730473 ACPI: * TPM2
1762 18:44:39.733814 TPM2 log created at 99a2d000
1763 18:44:39.737239 ACPI: added table 4/32, length now 52
1764 18:44:39.737326 ACPI: * MADT
1765 18:44:39.740533 SCI is IRQ9
1766 18:44:39.743547 ACPI: added table 5/32, length now 56
1767 18:44:39.743635 current = 99b43ac0
1768 18:44:39.747378 ACPI: * DMAR
1769 18:44:39.749964 ACPI: added table 6/32, length now 60
1770 18:44:39.753527 ACPI: * IGD OpRegion
1771 18:44:39.753613 GMA: Found VBT in CBFS
1772 18:44:39.756901 GMA: Found valid VBT in CBFS
1773 18:44:39.763334 ACPI: added table 7/32, length now 64
1774 18:44:39.763422 ACPI: * HPET
1775 18:44:39.766383 ACPI: added table 8/32, length now 68
1776 18:44:39.769846 ACPI: done.
1777 18:44:39.769932 ACPI tables: 31744 bytes.
1778 18:44:39.773021 smbios_write_tables: 99a2c000
1779 18:44:39.776116 EC returned error result code 3
1780 18:44:39.783114 Couldn't obtain OEM name from CBI
1781 18:44:39.783201 Create SMBIOS type 17
1782 18:44:39.786100 PCI: 00:00.0 (Intel Cannonlake)
1783 18:44:39.789280 PCI: 00:14.3 (Intel WiFi)
1784 18:44:39.792375 SMBIOS tables: 939 bytes.
1785 18:44:39.796602 Writing table forward entry at 0x00000500
1786 18:44:39.802671 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1787 18:44:39.805953 Writing coreboot table at 0x99b62000
1788 18:44:39.812633 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1789 18:44:39.815775 1. 0000000000001000-000000000009ffff: RAM
1790 18:44:39.821995 2. 00000000000a0000-00000000000fffff: RESERVED
1791 18:44:39.825653 3. 0000000000100000-0000000099a2bfff: RAM
1792 18:44:39.832012 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1793 18:44:39.835291 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1794 18:44:39.842024 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1795 18:44:39.848054 7. 000000009a000000-000000009f7fffff: RESERVED
1796 18:44:39.851808 8. 00000000e0000000-00000000efffffff: RESERVED
1797 18:44:39.858297 9. 00000000fc000000-00000000fc000fff: RESERVED
1798 18:44:39.861220 10. 00000000fe000000-00000000fe00ffff: RESERVED
1799 18:44:39.864399 11. 00000000fed10000-00000000fed17fff: RESERVED
1800 18:44:39.870952 12. 00000000fed80000-00000000fed83fff: RESERVED
1801 18:44:39.874476 13. 00000000fed90000-00000000fed91fff: RESERVED
1802 18:44:39.881212 14. 00000000feda0000-00000000feda1fff: RESERVED
1803 18:44:39.884184 15. 0000000100000000-000000045e7fffff: RAM
1804 18:44:39.887608 Graphics framebuffer located at 0xc0000000
1805 18:44:39.890827 Passing 5 GPIOs to payload:
1806 18:44:39.897246 NAME | PORT | POLARITY | VALUE
1807 18:44:39.904380 write protect | undefined | high | low
1808 18:44:39.907236 lid | undefined | high | high
1809 18:44:39.913398 power | undefined | high | low
1810 18:44:39.917069 oprom | undefined | high | low
1811 18:44:39.923542 EC in RW | 0x000000cb | high | low
1812 18:44:39.923633 Board ID: 4
1813 18:44:39.930122 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1814 18:44:39.933301 CBFS @ c08000 size 3f8000
1815 18:44:39.936648 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1816 18:44:39.942887 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1817 18:44:39.946508 coreboot table: 1492 bytes.
1818 18:44:39.949867 IMD ROOT 0. 99fff000 00001000
1819 18:44:39.952595 IMD SMALL 1. 99ffe000 00001000
1820 18:44:39.955835 FSP MEMORY 2. 99c4e000 003b0000
1821 18:44:39.959538 CONSOLE 3. 99c2e000 00020000
1822 18:44:39.962705 FMAP 4. 99c2d000 0000054e
1823 18:44:39.965953 TIME STAMP 5. 99c2c000 00000910
1824 18:44:39.968895 VBOOT WORK 6. 99c18000 00014000
1825 18:44:39.972321 MRC DATA 7. 99c16000 00001958
1826 18:44:39.975487 ROMSTG STCK 8. 99c15000 00001000
1827 18:44:39.979275 AFTER CAR 9. 99c0b000 0000a000
1828 18:44:39.982361 RAMSTAGE 10. 99baf000 0005c000
1829 18:44:39.985386 REFCODE 11. 99b7a000 00035000
1830 18:44:39.989161 SMM BACKUP 12. 99b6a000 00010000
1831 18:44:39.992089 COREBOOT 13. 99b62000 00008000
1832 18:44:39.995439 ACPI 14. 99b3e000 00024000
1833 18:44:39.998447 ACPI GNVS 15. 99b3d000 00001000
1834 18:44:40.001556 RAMOOPS 16. 99a3d000 00100000
1835 18:44:40.008466 TPM2 TCGLOG17. 99a2d000 00010000
1836 18:44:40.011634 SMBIOS 18. 99a2c000 00000800
1837 18:44:40.011714 IMD small region:
1838 18:44:40.014874 IMD ROOT 0. 99ffec00 00000400
1839 18:44:40.018495 FSP RUNTIME 1. 99ffebe0 00000004
1840 18:44:40.021669 EC HOSTEVENT 2. 99ffebc0 00000008
1841 18:44:40.024642 POWER STATE 3. 99ffeb80 00000040
1842 18:44:40.031480 ROMSTAGE 4. 99ffeb60 00000004
1843 18:44:40.034600 MEM INFO 5. 99ffe9a0 000001b9
1844 18:44:40.037679 VPD 6. 99ffe920 0000006c
1845 18:44:40.041018 MTRR: Physical address space:
1846 18:44:40.047315 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1847 18:44:40.050641 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1848 18:44:40.057402 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1849 18:44:40.064129 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1850 18:44:40.070467 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1851 18:44:40.077004 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1852 18:44:40.083838 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1853 18:44:40.086995 MTRR: Fixed MSR 0x250 0x0606060606060606
1854 18:44:40.089935 MTRR: Fixed MSR 0x258 0x0606060606060606
1855 18:44:40.096934 MTRR: Fixed MSR 0x259 0x0000000000000000
1856 18:44:40.100086 MTRR: Fixed MSR 0x268 0x0606060606060606
1857 18:44:40.103219 MTRR: Fixed MSR 0x269 0x0606060606060606
1858 18:44:40.106373 MTRR: Fixed MSR 0x26a 0x0606060606060606
1859 18:44:40.113267 MTRR: Fixed MSR 0x26b 0x0606060606060606
1860 18:44:40.116698 MTRR: Fixed MSR 0x26c 0x0606060606060606
1861 18:44:40.119603 MTRR: Fixed MSR 0x26d 0x0606060606060606
1862 18:44:40.123419 MTRR: Fixed MSR 0x26e 0x0606060606060606
1863 18:44:40.129766 MTRR: Fixed MSR 0x26f 0x0606060606060606
1864 18:44:40.132495 call enable_fixed_mtrr()
1865 18:44:40.136509 CPU physical address size: 39 bits
1866 18:44:40.139483 MTRR: default type WB/UC MTRR counts: 6/8.
1867 18:44:40.142868 MTRR: WB selected as default type.
1868 18:44:40.148984 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1869 18:44:40.156297 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1870 18:44:40.162060 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1871 18:44:40.168584 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1872 18:44:40.175505 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1873 18:44:40.178672 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1874 18:44:40.186231 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 18:44:40.189302 MTRR: Fixed MSR 0x258 0x0606060606060606
1876 18:44:40.192441 MTRR: Fixed MSR 0x259 0x0000000000000000
1877 18:44:40.196254 MTRR: Fixed MSR 0x268 0x0606060606060606
1878 18:44:40.202513 MTRR: Fixed MSR 0x269 0x0606060606060606
1879 18:44:40.205582 MTRR: Fixed MSR 0x26a 0x0606060606060606
1880 18:44:40.208818 MTRR: Fixed MSR 0x26b 0x0606060606060606
1881 18:44:40.212607 MTRR: Fixed MSR 0x26c 0x0606060606060606
1882 18:44:40.219196 MTRR: Fixed MSR 0x26d 0x0606060606060606
1883 18:44:40.222330 MTRR: Fixed MSR 0x26e 0x0606060606060606
1884 18:44:40.225510 MTRR: Fixed MSR 0x26f 0x0606060606060606
1885 18:44:40.225596
1886 18:44:40.228509 MTRR check
1887 18:44:40.228595 Fixed MTRRs : Enabled
1888 18:44:40.232241 Variable MTRRs: Enabled
1889 18:44:40.232334
1890 18:44:40.235270 call enable_fixed_mtrr()
1891 18:44:40.241732 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1892 18:44:40.245233 CPU physical address size: 39 bits
1893 18:44:40.248314 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1894 18:44:40.255140 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 18:44:40.257945 MTRR: Fixed MSR 0x250 0x0606060606060606
1896 18:44:40.261943 MTRR: Fixed MSR 0x258 0x0606060606060606
1897 18:44:40.265135 MTRR: Fixed MSR 0x259 0x0000000000000000
1898 18:44:40.271382 MTRR: Fixed MSR 0x268 0x0606060606060606
1899 18:44:40.274608 MTRR: Fixed MSR 0x269 0x0606060606060606
1900 18:44:40.277752 MTRR: Fixed MSR 0x26a 0x0606060606060606
1901 18:44:40.280912 MTRR: Fixed MSR 0x26b 0x0606060606060606
1902 18:44:40.287771 MTRR: Fixed MSR 0x26c 0x0606060606060606
1903 18:44:40.290921 MTRR: Fixed MSR 0x26d 0x0606060606060606
1904 18:44:40.293999 MTRR: Fixed MSR 0x26e 0x0606060606060606
1905 18:44:40.297829 MTRR: Fixed MSR 0x26f 0x0606060606060606
1906 18:44:40.304117 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 18:44:40.307036 call enable_fixed_mtrr()
1908 18:44:40.310292 MTRR: Fixed MSR 0x259 0x0000000000000000
1909 18:44:40.313382 MTRR: Fixed MSR 0x268 0x0606060606060606
1910 18:44:40.316765 MTRR: Fixed MSR 0x269 0x0606060606060606
1911 18:44:40.323516 MTRR: Fixed MSR 0x26a 0x0606060606060606
1912 18:44:40.326613 MTRR: Fixed MSR 0x26b 0x0606060606060606
1913 18:44:40.329713 MTRR: Fixed MSR 0x26c 0x0606060606060606
1914 18:44:40.333497 MTRR: Fixed MSR 0x26d 0x0606060606060606
1915 18:44:40.339798 MTRR: Fixed MSR 0x26e 0x0606060606060606
1916 18:44:40.343093 MTRR: Fixed MSR 0x26f 0x0606060606060606
1917 18:44:40.346243 CPU physical address size: 39 bits
1918 18:44:40.349917 call enable_fixed_mtrr()
1919 18:44:40.352700 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 18:44:40.355814 MTRR: Fixed MSR 0x250 0x0606060606060606
1921 18:44:40.362416 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 18:44:40.366033 MTRR: Fixed MSR 0x259 0x0000000000000000
1923 18:44:40.369494 MTRR: Fixed MSR 0x268 0x0606060606060606
1924 18:44:40.372443 MTRR: Fixed MSR 0x269 0x0606060606060606
1925 18:44:40.379427 MTRR: Fixed MSR 0x26a 0x0606060606060606
1926 18:44:40.382623 MTRR: Fixed MSR 0x26b 0x0606060606060606
1927 18:44:40.385597 MTRR: Fixed MSR 0x26c 0x0606060606060606
1928 18:44:40.388794 MTRR: Fixed MSR 0x26d 0x0606060606060606
1929 18:44:40.395517 MTRR: Fixed MSR 0x26e 0x0606060606060606
1930 18:44:40.398936 MTRR: Fixed MSR 0x26f 0x0606060606060606
1931 18:44:40.401919 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 18:44:40.405040 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 18:44:40.412111 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 18:44:40.415027 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 18:44:40.418186 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 18:44:40.421270 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 18:44:40.428276 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 18:44:40.431373 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 18:44:40.434452 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 18:44:40.437479 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 18:44:40.441113 call enable_fixed_mtrr()
1942 18:44:40.444550 call enable_fixed_mtrr()
1943 18:44:40.447543 CPU physical address size: 39 bits
1944 18:44:40.450652 CBFS @ c08000 size 3f8000
1945 18:44:40.457266 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1946 18:44:40.461158 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 18:44:40.464107 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 18:44:40.467204 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 18:44:40.474192 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 18:44:40.477388 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 18:44:40.480733 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 18:44:40.483612 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 18:44:40.490819 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 18:44:40.493686 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 18:44:40.496720 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 18:44:40.499943 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 18:44:40.506657 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 18:44:40.509859 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 18:44:40.513317 call enable_fixed_mtrr()
1960 18:44:40.516372 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 18:44:40.519597 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 18:44:40.523060 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 18:44:40.529376 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 18:44:40.532465 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 18:44:40.536270 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 18:44:40.539259 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 18:44:40.545562 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 18:44:40.549327 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 18:44:40.552763 CPU physical address size: 39 bits
1970 18:44:40.555844 call enable_fixed_mtrr()
1971 18:44:40.558972 CPU physical address size: 39 bits
1972 18:44:40.562035 CPU physical address size: 39 bits
1973 18:44:40.565753 CPU physical address size: 39 bits
1974 18:44:40.568997 CBFS: Locating 'fallback/payload'
1975 18:44:40.575270 CBFS: Found @ offset 1c96c0 size 3f798
1976 18:44:40.578919 Checking segment from ROM address 0xffdd16f8
1977 18:44:40.581962 Checking segment from ROM address 0xffdd1714
1978 18:44:40.588811 Loading segment from ROM address 0xffdd16f8
1979 18:44:40.588888 code (compression=0)
1980 18:44:40.598094 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1981 18:44:40.607930 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1982 18:44:40.608018 it's not compressed!
1983 18:44:40.701291 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1984 18:44:40.708205 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1985 18:44:40.711072 Loading segment from ROM address 0xffdd1714
1986 18:44:40.714269 Entry Point 0x30000000
1987 18:44:40.718267 Loaded segments
1988 18:44:40.723460 Finalizing chipset.
1989 18:44:40.726607 Finalizing SMM.
1990 18:44:40.730009 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1991 18:44:40.733350 mp_park_aps done after 0 msecs.
1992 18:44:40.739611 Jumping to boot code at 30000000(99b62000)
1993 18:44:40.746476 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1994 18:44:40.746564
1995 18:44:40.746636
1996 18:44:40.746699
1997 18:44:40.749935 Starting depthcharge on Helios...
1998 18:44:40.750022
1999 18:44:40.750399 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
2000 18:44:40.750501 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2001 18:44:40.750584 Setting prompt string to ['hatch:']
2002 18:44:40.750665 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2003 18:44:40.759562 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2004 18:44:40.759651
2005 18:44:40.765960 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2006 18:44:40.766047
2007 18:44:40.772291 board_setup: Info: eMMC controller not present; skipping
2008 18:44:40.772378
2009 18:44:40.775460 New NVMe Controller 0x30053ac0 @ 00:1d:00
2010 18:44:40.775547
2011 18:44:40.782510 board_setup: Info: SDHCI controller not present; skipping
2012 18:44:40.782597
2013 18:44:40.788931 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2014 18:44:40.789027
2015 18:44:40.789097 Wipe memory regions:
2016 18:44:40.789162
2017 18:44:40.795563 [0x00000000001000, 0x000000000a0000)
2018 18:44:40.795651
2019 18:44:40.798754 [0x00000000100000, 0x00000030000000)
2020 18:44:40.862818
2021 18:44:40.865699 [0x00000030657430, 0x00000099a2c000)
2022 18:44:41.003163
2023 18:44:41.005909 [0x00000100000000, 0x0000045e800000)
2024 18:44:42.388804
2025 18:44:42.388962 R8152: Initializing
2026 18:44:42.389079
2027 18:44:42.391811 Version 9 (ocp_data = 6010)
2028 18:44:42.396016
2029 18:44:42.396102 R8152: Done initializing
2030 18:44:42.396170
2031 18:44:42.399147 Adding net device
2032 18:44:42.881957
2033 18:44:42.882135 R8152: Initializing
2034 18:44:42.882208
2035 18:44:42.885687 Version 6 (ocp_data = 5c30)
2036 18:44:42.885777
2037 18:44:42.888678 R8152: Done initializing
2038 18:44:42.888765
2039 18:44:42.895854 net_add_device: Attemp to include the same device
2040 18:44:42.895978
2041 18:44:42.902486 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2042 18:44:42.902580
2043 18:44:42.902648
2044 18:44:42.902716
2045 18:44:42.902991 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2047 18:44:43.003721 hatch: tftpboot 192.168.201.1 9334730/tftp-deploy-nlp3635d/kernel/bzImage 9334730/tftp-deploy-nlp3635d/kernel/cmdline 9334730/tftp-deploy-nlp3635d/ramdisk/ramdisk.cpio.gz
2048 18:44:43.003896 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2049 18:44:43.003988 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2050 18:44:43.008188 tftpboot 192.168.201.1 9334730/tftp-deploy-nlp3635d/kernel/bzImoy-nlp3635d/kernel/cmdline 9334730/tftp-deploy-nlp3635d/ramdisk/ramdisk.cpio.gz
2051 18:44:43.008280
2052 18:44:43.008348 Waiting for link
2053 18:44:43.208812
2054 18:44:43.208953 done.
2055 18:44:43.209026
2056 18:44:43.209093 MAC: 00:24:32:50:19:be
2057 18:44:43.209155
2058 18:44:43.212105 Sending DHCP discover... done.
2059 18:44:43.212187
2060 18:44:43.215110 Waiting for reply... done.
2061 18:44:43.215192
2062 18:44:43.218708 Sending DHCP request... done.
2063 18:44:43.218790
2064 18:44:43.221764 Waiting for reply... done.
2065 18:44:43.221841
2066 18:44:43.225440 My ip is 192.168.201.15
2067 18:44:43.225517
2068 18:44:43.228478 The DHCP server ip is 192.168.201.1
2069 18:44:43.228559
2070 18:44:43.231758 TFTP server IP predefined by user: 192.168.201.1
2071 18:44:43.231834
2072 18:44:43.238419 Bootfile predefined by user: 9334730/tftp-deploy-nlp3635d/kernel/bzImage
2073 18:44:43.241694
2074 18:44:43.245027 Sending tftp read request... done.
2075 18:44:43.245120
2076 18:44:43.248542 Waiting for the transfer...
2077 18:44:43.248622
2078 18:44:43.790417 00000000 ################################################################
2079 18:44:43.790558
2080 18:44:44.329605 00080000 ################################################################
2081 18:44:44.329751
2082 18:44:44.876266 00100000 ################################################################
2083 18:44:44.876405
2084 18:44:45.428903 00180000 ################################################################
2085 18:44:45.429046
2086 18:44:45.981450 00200000 ################################################################
2087 18:44:45.981590
2088 18:44:46.535937 00280000 ################################################################
2089 18:44:46.536079
2090 18:44:47.092567 00300000 ################################################################
2091 18:44:47.092718
2092 18:44:47.653547 00380000 ################################################################
2093 18:44:47.653707
2094 18:44:48.218374 00400000 ################################################################
2095 18:44:48.218555
2096 18:44:48.759946 00480000 ################################################################
2097 18:44:48.760111
2098 18:44:49.315069 00500000 ################################################################
2099 18:44:49.315219
2100 18:44:49.867250 00580000 ################################################################
2101 18:44:49.867406
2102 18:44:50.420602 00600000 ################################################################
2103 18:44:50.420743
2104 18:44:50.985522 00680000 ################################################################
2105 18:44:50.985664
2106 18:44:51.546037 00700000 ################################################################
2107 18:44:51.546221
2108 18:44:52.071392 00780000 ################################################################
2109 18:44:52.071542
2110 18:44:52.592381 00800000 ################################################################
2111 18:44:52.592538
2112 18:44:53.135941 00880000 ################################################################
2113 18:44:53.136091
2114 18:44:53.422197 00900000 ################################## done.
2115 18:44:53.422343
2116 18:44:53.425417 The bootfile was 9711616 bytes long.
2117 18:44:53.425494
2118 18:44:53.428532 Sending tftp read request... done.
2119 18:44:53.428619
2120 18:44:53.432199 Waiting for the transfer...
2121 18:44:53.432274
2122 18:44:53.938631 00000000 ################################################################
2123 18:44:53.938782
2124 18:44:54.443586 00080000 ################################################################
2125 18:44:54.443738
2126 18:44:54.962086 00100000 ################################################################
2127 18:44:54.962278
2128 18:44:55.486286 00180000 ################################################################
2129 18:44:55.486439
2130 18:44:55.994479 00200000 ################################################################
2131 18:44:55.994629
2132 18:44:56.497131 00280000 ################################################################
2133 18:44:56.497310
2134 18:44:57.021315 00300000 ################################################################
2135 18:44:57.021474
2136 18:44:57.533210 00380000 ################################################################
2137 18:44:57.533361
2138 18:44:58.046793 00400000 ################################################################
2139 18:44:58.046940
2140 18:44:58.551629 00480000 ################################################################
2141 18:44:58.551777
2142 18:44:58.825958 00500000 ################################## done.
2143 18:44:58.826135
2144 18:44:58.829191 Sending tftp read request... done.
2145 18:44:58.829269
2146 18:44:58.832478 Waiting for the transfer...
2147 18:44:58.832566
2148 18:44:58.832634 00000000 # done.
2149 18:44:58.832700
2150 18:44:58.842430 Command line loaded dynamically from TFTP file: 9334730/tftp-deploy-nlp3635d/kernel/cmdline
2151 18:44:58.842519
2152 18:44:58.868742 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9334730/extract-nfsrootfs-9h6_r0sy,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2153 18:44:58.868843
2154 18:44:58.874701 ec_init(0): CrosEC protocol v3 supported (256, 256)
2155 18:44:58.879079
2156 18:44:58.882101 Shutting down all USB controllers.
2157 18:44:58.882200
2158 18:44:58.882271 Removing current net device
2159 18:44:58.886233
2160 18:44:58.886376 Finalizing coreboot
2161 18:44:58.886451
2162 18:44:58.892948 Exiting depthcharge with code 4 at timestamp: 25483744
2163 18:44:58.893094
2164 18:44:58.893165
2165 18:44:58.893230 Starting kernel ...
2166 18:44:58.893293
2167 18:44:58.893354
2168 18:44:58.893727 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2169 18:44:58.893825 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2170 18:44:58.893901 Setting prompt string to ['Linux version [0-9]']
2171 18:44:58.893976 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 18:44:58.894046 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2174 18:49:20.894841 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2176 18:49:20.896101 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2178 18:49:20.897082 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2181 18:49:20.898752 end: 2 depthcharge-action (duration 00:05:00) [common]
2183 18:49:20.899493 Cleaning after the job
2184 18:49:20.899577 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/ramdisk
2185 18:49:20.900047 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/kernel
2186 18:49:20.900702 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/nfsrootfs
2187 18:49:20.948934 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9334730/tftp-deploy-nlp3635d/modules
2188 18:49:20.949281 start: 4.1 power-off (timeout 00:00:30) [common]
2189 18:49:20.949441 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2190 18:49:23.114304 >> Command sent successfully.
2191 18:49:23.120450 Returned 0 in 2 seconds
2192 18:49:23.221770 end: 4.1 power-off (duration 00:00:02) [common]
2194 18:49:23.223399 start: 4.2 read-feedback (timeout 00:09:58) [common]
2195 18:49:23.224599 Listened to connection for namespace 'common' for up to 1s
2197 18:49:23.226613 Listened to connection for namespace 'common' for up to 1s
2198 18:49:23.226926 Listened to connection for namespace 'common' for up to 1s
2199 18:49:23.227257 Listened to connection for namespace 'common' for up to 1s
2200 18:49:23.227599 Listened to connection for namespace 'common' for up to 1s
2201 18:49:24.227952 Finalising connection for namespace 'common'
2202 18:49:24.228659 Disconnecting from shell: Finalise
2203 18:49:24.229085
2204 18:49:24.331739 end: 4.2 read-feedback (duration 00:00:01) [common]
2205 18:49:24.332399 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9334730
2206 18:49:24.487763 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9334730
2207 18:49:24.487963 JobError: Your job cannot terminate cleanly.