Boot log: acer-cb317-1h-c3z6-dedede

    1 15:41:19.752786  lava-dispatcher, installed at version: 2022.11
    2 15:41:19.753018  start: 0 validate
    3 15:41:19.753201  Start time: 2023-03-03 15:41:19.753193+00:00 (UTC)
    4 15:41:19.753368  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:41:19.753527  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230224.0%2Fx86%2Frootfs.cpio.gz exists
    6 15:41:20.029775  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:41:20.029958  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:41:20.312599  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:41:20.312799  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 15:41:20.588707  validate duration: 0.84
   12 15:41:20.589026  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 15:41:20.589171  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 15:41:20.589293  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 15:41:20.589418  Not decompressing ramdisk as can be used compressed.
   16 15:41:20.589631  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230224.0/x86/rootfs.cpio.gz
   17 15:41:20.589708  saving as /var/lib/lava/dispatcher/tmp/9406184/tftp-deploy-9wtickmb/ramdisk/rootfs.cpio.gz
   18 15:41:20.589778  total size: 8423893 (8MB)
   19 15:41:20.590918  progress   0% (0MB)
   20 15:41:20.593336  progress   5% (0MB)
   21 15:41:20.595724  progress  10% (0MB)
   22 15:41:20.598207  progress  15% (1MB)
   23 15:41:20.600626  progress  20% (1MB)
   24 15:41:20.603049  progress  25% (2MB)
   25 15:41:20.605499  progress  30% (2MB)
   26 15:41:20.607728  progress  35% (2MB)
   27 15:41:20.610132  progress  40% (3MB)
   28 15:41:20.612614  progress  45% (3MB)
   29 15:41:20.615001  progress  50% (4MB)
   30 15:41:20.617369  progress  55% (4MB)
   31 15:41:20.619799  progress  60% (4MB)
   32 15:41:20.622196  progress  65% (5MB)
   33 15:41:20.624458  progress  70% (5MB)
   34 15:41:20.626830  progress  75% (6MB)
   35 15:41:20.629190  progress  80% (6MB)
   36 15:41:20.631590  progress  85% (6MB)
   37 15:41:20.633966  progress  90% (7MB)
   38 15:41:20.636351  progress  95% (7MB)
   39 15:41:20.638711  progress 100% (8MB)
   40 15:41:20.638907  8MB downloaded in 0.05s (163.54MB/s)
   41 15:41:20.639107  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 15:41:20.639399  end: 1.1 download-retry (duration 00:00:00) [common]
   44 15:41:20.639497  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 15:41:20.639593  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 15:41:20.639714  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 15:41:20.639792  saving as /var/lib/lava/dispatcher/tmp/9406184/tftp-deploy-9wtickmb/kernel/bzImage
   48 15:41:20.639861  total size: 9707520 (9MB)
   49 15:41:20.639929  No compression specified
   50 15:41:20.641089  progress   0% (0MB)
   51 15:41:20.643860  progress   5% (0MB)
   52 15:41:20.646683  progress  10% (0MB)
   53 15:41:20.649523  progress  15% (1MB)
   54 15:41:20.652283  progress  20% (1MB)
   55 15:41:20.654993  progress  25% (2MB)
   56 15:41:20.657558  progress  30% (2MB)
   57 15:41:20.660401  progress  35% (3MB)
   58 15:41:20.663181  progress  40% (3MB)
   59 15:41:20.665965  progress  45% (4MB)
   60 15:41:20.668735  progress  50% (4MB)
   61 15:41:20.671327  progress  55% (5MB)
   62 15:41:20.674078  progress  60% (5MB)
   63 15:41:20.676899  progress  65% (6MB)
   64 15:41:20.679693  progress  70% (6MB)
   65 15:41:20.682410  progress  75% (6MB)
   66 15:41:20.685002  progress  80% (7MB)
   67 15:41:20.687739  progress  85% (7MB)
   68 15:41:20.690459  progress  90% (8MB)
   69 15:41:20.693169  progress  95% (8MB)
   70 15:41:20.695992  progress 100% (9MB)
   71 15:41:20.696215  9MB downloaded in 0.06s (164.29MB/s)
   72 15:41:20.696382  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 15:41:20.696653  end: 1.2 download-retry (duration 00:00:00) [common]
   75 15:41:20.696756  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 15:41:20.696865  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 15:41:20.696996  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 15:41:20.697075  saving as /var/lib/lava/dispatcher/tmp/9406184/tftp-deploy-9wtickmb/modules/modules.tar
   79 15:41:20.697147  total size: 64716 (0MB)
   80 15:41:20.697218  Using unxz to decompress xz
   81 15:41:20.700838  progress  50% (0MB)
   82 15:41:20.701268  progress 100% (0MB)
   83 15:41:20.705982  0MB downloaded in 0.01s (6.99MB/s)
   84 15:41:20.706234  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 15:41:20.706540  end: 1.3 download-retry (duration 00:00:00) [common]
   87 15:41:20.706660  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   88 15:41:20.706776  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   89 15:41:20.706878  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 15:41:20.706977  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   91 15:41:20.707180  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme
   92 15:41:20.707307  makedir: /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin
   93 15:41:20.707403  makedir: /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/tests
   94 15:41:20.707500  makedir: /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/results
   95 15:41:20.707619  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-add-keys
   96 15:41:20.707765  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-add-sources
   97 15:41:20.707899  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-background-process-start
   98 15:41:20.708042  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-background-process-stop
   99 15:41:20.708170  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-common-functions
  100 15:41:20.708295  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-echo-ipv4
  101 15:41:20.708425  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-install-packages
  102 15:41:20.708549  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-installed-packages
  103 15:41:20.708673  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-os-build
  104 15:41:20.708800  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-probe-channel
  105 15:41:20.708933  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-probe-ip
  106 15:41:20.709056  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-target-ip
  107 15:41:20.709178  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-target-mac
  108 15:41:20.709307  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-target-storage
  109 15:41:20.709433  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-test-case
  110 15:41:20.709568  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-test-event
  111 15:41:20.709692  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-test-feedback
  112 15:41:20.709813  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-test-raise
  113 15:41:20.709941  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-test-reference
  114 15:41:20.710063  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-test-runner
  115 15:41:20.710192  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-test-set
  116 15:41:20.710335  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-test-shell
  117 15:41:20.710479  Updating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-install-packages (oe)
  118 15:41:20.710606  Updating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/bin/lava-installed-packages (oe)
  119 15:41:20.710724  Creating /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/environment
  120 15:41:20.710836  LAVA metadata
  121 15:41:20.710918  - LAVA_JOB_ID=9406184
  122 15:41:20.710992  - LAVA_DISPATCHER_IP=192.168.201.1
  123 15:41:20.711137  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  124 15:41:20.711215  skipped lava-vland-overlay
  125 15:41:20.711305  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 15:41:20.711404  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  127 15:41:20.711486  skipped lava-multinode-overlay
  128 15:41:20.711572  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 15:41:20.711665  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  130 15:41:20.711756  Loading test definitions
  131 15:41:20.711871  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  132 15:41:20.711963  Using /lava-9406184 at stage 0
  133 15:41:20.712276  uuid=9406184_1.4.2.3.1 testdef=None
  134 15:41:20.712415  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 15:41:20.712546  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  136 15:41:20.713129  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 15:41:20.713397  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  139 15:41:20.714057  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 15:41:20.714339  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  142 15:41:20.714974  runner path: /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/0/tests/0_dmesg test_uuid 9406184_1.4.2.3.1
  143 15:41:20.715154  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 15:41:20.715427  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  146 15:41:20.715516  Using /lava-9406184 at stage 1
  147 15:41:20.715795  uuid=9406184_1.4.2.3.5 testdef=None
  148 15:41:20.715899  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 15:41:20.716010  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  150 15:41:20.716524  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 15:41:20.716780  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  153 15:41:20.717492  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 15:41:20.717783  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  156 15:41:20.718446  runner path: /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/1/tests/1_bootrr test_uuid 9406184_1.4.2.3.5
  157 15:41:20.718612  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 15:41:20.718859  Creating lava-test-runner.conf files
  160 15:41:20.718937  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/0 for stage 0
  161 15:41:20.719034  - 0_dmesg
  162 15:41:20.719133  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406184/lava-overlay-s1wmgvme/lava-9406184/1 for stage 1
  163 15:41:20.719227  - 1_bootrr
  164 15:41:20.719338  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 15:41:20.719439  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  166 15:41:20.726737  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 15:41:20.726881  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  168 15:41:20.726990  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 15:41:20.727123  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 15:41:20.727244  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  171 15:41:20.934845  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 15:41:20.935243  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  173 15:41:20.935375  extracting modules file /var/lib/lava/dispatcher/tmp/9406184/tftp-deploy-9wtickmb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406184/extract-overlay-ramdisk-ax4b1i65/ramdisk
  174 15:41:20.940174  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 15:41:20.940309  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  176 15:41:20.940404  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9406184/compress-overlay-puratz7t/overlay-1.4.2.4.tar.gz to ramdisk
  177 15:41:20.940493  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9406184/compress-overlay-puratz7t/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9406184/extract-overlay-ramdisk-ax4b1i65/ramdisk
  178 15:41:20.944863  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 15:41:20.944994  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  180 15:41:20.945094  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 15:41:20.945194  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  182 15:41:20.945284  Building ramdisk /var/lib/lava/dispatcher/tmp/9406184/extract-overlay-ramdisk-ax4b1i65/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9406184/extract-overlay-ramdisk-ax4b1i65/ramdisk
  183 15:41:21.016558  >> 48350 blocks

  184 15:41:21.890201  rename /var/lib/lava/dispatcher/tmp/9406184/extract-overlay-ramdisk-ax4b1i65/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9406184/tftp-deploy-9wtickmb/ramdisk/ramdisk.cpio.gz
  185 15:41:21.890648  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 15:41:21.890792  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  187 15:41:21.890912  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  188 15:41:21.891035  No mkimage arch provided, not using FIT.
  189 15:41:21.891150  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 15:41:21.891254  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 15:41:21.891362  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 15:41:21.891473  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  193 15:41:21.891571  No LXC device requested
  194 15:41:21.891710  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 15:41:21.891817  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  196 15:41:21.891918  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 15:41:21.892004  Checking files for TFTP limit of 4294967296 bytes.
  198 15:41:21.892463  end: 1 tftp-deploy (duration 00:00:01) [common]
  199 15:41:21.892599  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 15:41:21.892744  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 15:41:21.892897  substitutions:
  202 15:41:21.892973  - {DTB}: None
  203 15:41:21.893060  - {INITRD}: 9406184/tftp-deploy-9wtickmb/ramdisk/ramdisk.cpio.gz
  204 15:41:21.893133  - {KERNEL}: 9406184/tftp-deploy-9wtickmb/kernel/bzImage
  205 15:41:21.893203  - {LAVA_MAC}: None
  206 15:41:21.893270  - {PRESEED_CONFIG}: None
  207 15:41:21.893334  - {PRESEED_LOCAL}: None
  208 15:41:21.893397  - {RAMDISK}: 9406184/tftp-deploy-9wtickmb/ramdisk/ramdisk.cpio.gz
  209 15:41:21.893460  - {ROOT_PART}: None
  210 15:41:21.893524  - {ROOT}: None
  211 15:41:21.893592  - {SERVER_IP}: 192.168.201.1
  212 15:41:21.893656  - {TEE}: None
  213 15:41:21.893718  Parsed boot commands:
  214 15:41:21.893782  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 15:41:21.893959  Parsed boot commands: tftpboot 192.168.201.1 9406184/tftp-deploy-9wtickmb/kernel/bzImage 9406184/tftp-deploy-9wtickmb/kernel/cmdline 9406184/tftp-deploy-9wtickmb/ramdisk/ramdisk.cpio.gz
  216 15:41:21.894068  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 15:41:21.894180  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 15:41:21.894284  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 15:41:21.894383  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 15:41:21.894463  Not connected, no need to disconnect.
  221 15:41:21.894551  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 15:41:21.894649  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 15:41:21.894728  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-2'
  224 15:41:21.898142  Setting prompt string to ['lava-test: # ']
  225 15:41:21.898606  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 15:41:21.898804  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 15:41:21.898980  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 15:41:21.899136  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 15:41:21.899782  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=reboot'
  230 15:41:31.255992  >> Command sent successfully.

  231 15:41:31.259186  Returned 0 in 9 seconds
  232 15:41:31.359998  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  234 15:41:31.360392  end: 2.2.2 reset-device (duration 00:00:09) [common]
  235 15:41:31.360508  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  236 15:41:31.360625  Setting prompt string to 'Starting depthcharge on Magolor...'
  237 15:41:31.360717  Changing prompt to 'Starting depthcharge on Magolor...'
  238 15:41:31.360812  depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
  239 15:41:31.361149  [Enter `^Ec?' for help]

  240 15:41:31.361250  

  241 15:41:31.361327  

  242 15:41:31.361398  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...

  243 15:41:31.361481  CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz

  244 15:41:31.361552  CPU: ID 906c0, Jasperlake A0, ucode: 2400001f

  245 15:41:31.361630  CPU: AES supported, TXT NOT supported, VT supported

  246 15:41:31.361712  MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1

  247 15:41:31.361788  PCH: device id 4d87 (rev 01) is Jasperlake Super

  248 15:41:31.361853  IGD: device id 4e55 (rev 01) is Jasperlake GT4

  249 15:41:31.361925  VBOOT: Loading verstage.

  250 15:41:31.361990  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  251 15:41:31.362053  FMAP: base = 0xff000000 size = 0x1000000 #areas = 32

  252 15:41:31.362119  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  253 15:41:31.362212  CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec

  254 15:41:31.362279  

  255 15:41:31.362349  

  256 15:41:31.362425  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...

  257 15:41:31.362489  Probing TPM: . done!

  258 15:41:31.362552  TPM ready after 0 ms

  259 15:41:31.362615  Connected to device vid:did:rid of 1ae0:0028:00

  260 15:41:31.362677  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  261 15:41:31.362741  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  262 15:41:31.362817  Initialized TPM device CR50 revision 0

  263 15:41:31.362891  tlcl_send_startup: Startup return code is 0

  264 15:41:31.362971  TPM: setup succeeded

  265 15:41:31.363038  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  266 15:41:31.363119  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  267 15:41:31.363193  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  268 15:41:31.363256  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  269 15:41:31.363320  Chrome EC: UHEPI supported

  270 15:41:31.363397  Phase 1

  271 15:41:31.363462  FMAP: area GBB found @ c05000 (12288 bytes)

  272 15:41:31.363525  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  273 15:41:31.363598  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  274 15:41:31.363668  Recovery requested (1009000e)

  275 15:41:31.363732  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 15:41:31.363795  tlcl_extend: response is 0

  277 15:41:31.363870  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 15:41:31.363953  tlcl_extend: response is 0

  279 15:41:31.364020  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  280 15:41:31.364086  CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4

  281 15:41:31.364164  BS: verstage times (exec / console): total (unknown) / 124 ms

  282 15:41:31.364230  

  283 15:41:31.364301  

  284 15:41:31.364373  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...

  285 15:41:31.364441  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 15:41:31.364515  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 15:41:31.364578  gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000

  288 15:41:31.364640  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 15:41:31.364709  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  290 15:41:31.364772  gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000

  291 15:41:31.364833  TCO_STS:   0000 0001

  292 15:41:31.364912  GEN_PMCON: d0015038 00002200

  293 15:41:31.364995  GBLRST_CAUSE: 00000000 00000000

  294 15:41:31.365060  prev_sleep_state 5

  295 15:41:31.365127  Boot Count incremented to 11169

  296 15:41:31.365197  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  297 15:41:31.365261  CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000

  298 15:41:31.365323  Chrome EC: UHEPI supported

  299 15:41:31.365395  FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)

  300 15:41:31.365465  Probing TPM:  done!

  301 15:41:31.365527  Connected to device vid:did:rid of 1ae0:0028:00

  302 15:41:31.365596  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  303 15:41:31.365661  Initialized TPM device CR50 revision 0

  304 15:41:31.365732  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  305 15:41:31.365795  MRC: Hash idx 0x100b comparison successful.

  306 15:41:31.365858  MRC cache found, size 5458

  307 15:41:31.365943  bootmode is set to: 2

  308 15:41:31.366006  SPD INDEX = 0

  309 15:41:31.366068  CBFS: Found 'spd.bin' @0x40c40 size 0x600

  310 15:41:31.366130  SPD: module type is LPDDR4X

  311 15:41:31.366192  SPD: module part number is MT53E512M32D2NP-046 WT:E

  312 15:41:31.366255  SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb

  313 15:41:31.366317  SPD: device width 16 bits, bus width 32 bits

  314 15:41:31.366409  SPD: module size is 4096 MB (per channel)

  315 15:41:31.366483  meminit_channels: DRAM half-populated

  316 15:41:31.366554  CBMEM:

  317 15:41:31.366618  IMD: root @ 0x76fff000 254 entries.

  318 15:41:31.366680  IMD: root @ 0x76ffec00 62 entries.

  319 15:41:31.366741  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  320 15:41:31.366811  WARNING: RO_VPD is uninitialized or empty.

  321 15:41:31.366874  FMAP: area RW_VPD found @ bfc000 (8192 bytes)

  322 15:41:31.366952  External stage cache:

  323 15:41:31.367030  IMD: root @ 0x7b3ff000 254 entries.

  324 15:41:31.367110  IMD: root @ 0x7b3fec00 62 entries.

  325 15:41:31.367176  FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)

  326 15:41:31.367239  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  327 15:41:31.367302  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

  328 15:41:31.367374  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  329 15:41:31.367451  cse_lite: Skip switching to RW in the recovery path

  330 15:41:31.367516  1 DIMMs found

  331 15:41:31.367594  SMM Memory Map

  332 15:41:31.367657  SMRAM       : 0x7b000000 0x800000

  333 15:41:31.367931   Subregion 0: 0x7b000000 0x200000

  334 15:41:31.368031   Subregion 1: 0x7b200000 0x200000

  335 15:41:31.368104   Subregion 2: 0x7b400000 0x400000

  336 15:41:31.368172  top_of_ram = 0x77000000

  337 15:41:31.368235  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  338 15:41:31.368298  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  339 15:41:31.368360  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  340 15:41:31.368423  CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c

  341 15:41:31.368488  Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)

  342 15:41:31.368558  Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90

  343 15:41:31.368633  Processing 188 relocs. Offset value of 0x74c0e000

  344 15:41:31.368697  BS: romstage times (exec / console): total (unknown) / 255 ms

  345 15:41:31.368775  

  346 15:41:31.368838  

  347 15:41:31.368900  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...

  348 15:41:31.368970  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  349 15:41:31.369034  CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488

  350 15:41:31.369112  Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)

  351 15:41:31.369179  Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70

  352 15:41:31.369241  Processing 4805 relocs. Offset value of 0x75da8000

  353 15:41:31.369304  BS: postcar times (exec / console): total (unknown) / 42 ms

  354 15:41:31.369365  

  355 15:41:31.369435  

  356 15:41:31.369504  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...

  357 15:41:31.369567  Normal boot

  358 15:41:31.369646  EC returned error result code 3

  359 15:41:31.369708  FW_CONFIG value is 0x204

  360 15:41:31.369779  GENERIC: 0.0 disabled by fw_config

  361 15:41:31.369843  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  362 15:41:31.369905  I2C: 00:10 disabled by fw_config

  363 15:41:31.369967  I2C: 00:10 disabled by fw_config

  364 15:41:31.370036  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  365 15:41:31.370099  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  366 15:41:31.370178  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  367 15:41:31.370243  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  368 15:41:31.370305  fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED

  369 15:41:31.370367  I2C: 00:10 disabled by fw_config

  370 15:41:31.370429  fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED

  371 15:41:31.373867  fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED

  372 15:41:31.377366  I2C: 00:1a disabled by fw_config

  373 15:41:31.380853  I2C: 00:1a disabled by fw_config

  374 15:41:31.387705  fw_config match found: AUDIO_AMP=UNPROVISIONED

  375 15:41:31.390418  fw_config match found: AUDIO_AMP=UNPROVISIONED

  376 15:41:31.393870  GENERIC: 0.0 disabled by fw_config

  377 15:41:31.400763  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  378 15:41:31.404254  CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000

  379 15:41:31.410354  microcode: sig=0x906c0 pf=0x1 revision=0x2400001f

  380 15:41:31.413904  microcode: Update skipped, already up-to-date

  381 15:41:31.420528  CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906

  382 15:41:31.446560  Detected 2 core, 2 thread CPU.

  383 15:41:31.449924  Setting up SMI for CPU

  384 15:41:31.453368  IED base = 0x7b400000

  385 15:41:31.453505  IED size = 0x00400000

  386 15:41:31.456830  Will perform SMM setup.

  387 15:41:31.459569  CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.

  388 15:41:31.469888  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  389 15:41:31.473212  Processing 16 relocs. Offset value of 0x00030000

  390 15:41:31.476691  Attempting to start 1 APs

  391 15:41:31.480052  Waiting for 10ms after sending INIT.

  392 15:41:31.496670  Waiting for 1st SIPI to complete...done.

  393 15:41:31.496915  AP: slot 1 apic_id 2.

  394 15:41:31.503349  Waiting for 2nd SIPI to complete...done.

  395 15:41:31.510172  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  396 15:41:31.516322  Processing 13 relocs. Offset value of 0x00038000

  397 15:41:31.516482  Unable to locate Global NVS

  398 15:41:31.526586  SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)

  399 15:41:31.529326  Installing permanent SMM handler to 0x7b000000

  400 15:41:31.539716  Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10

  401 15:41:31.543106  Processing 704 relocs. Offset value of 0x7b010000

  402 15:41:31.552719  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  403 15:41:31.556097  Processing 13 relocs. Offset value of 0x7b008000

  404 15:41:31.562935  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  405 15:41:31.566326  Unable to locate Global NVS

  406 15:41:31.572692  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)

  407 15:41:31.576092  Clearing SMI status registers

  408 15:41:31.576304  SMI_STS: PM1 

  409 15:41:31.579605  PM1_STS: PWRBTN 

  410 15:41:31.579756  TCO_STS: INTRD_DET 

  411 15:41:31.582336  GPE0 STD STS: 

  412 15:41:31.588946  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  413 15:41:31.592293  In relocation handler: CPU 0

  414 15:41:31.595877  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  415 15:41:31.602761  Writing SMRR. base = 0x7b000006, mask=0xff800800

  416 15:41:31.602912  Relocation complete.

  417 15:41:31.612336  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  418 15:41:31.612496  In relocation handler: CPU 1

  419 15:41:31.619295  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  420 15:41:31.622824  Writing SMRR. base = 0x7b000006, mask=0xff800800

  421 15:41:31.625494  Relocation complete.

  422 15:41:31.625629  Initializing CPU #0

  423 15:41:31.628991  CPU: vendor Intel device 906c0

  424 15:41:31.635914  CPU: family 06, model 9c, stepping 00

  425 15:41:31.636045  Clearing out pending MCEs

  426 15:41:31.638671  Setting up local APIC...

  427 15:41:31.642009   apic_id: 0x00 done.

  428 15:41:31.645680  Turbo is available but hidden

  429 15:41:31.648889  Turbo is available and visible

  430 15:41:31.652343  microcode: Update skipped, already up-to-date

  431 15:41:31.655200  CPU #0 initialized

  432 15:41:31.655330  Initializing CPU #1

  433 15:41:31.658793  CPU: vendor Intel device 906c0

  434 15:41:31.662222  CPU: family 06, model 9c, stepping 00

  435 15:41:31.665690  Clearing out pending MCEs

  436 15:41:31.668464  Setting up local APIC...

  437 15:41:31.672009   apic_id: 0x02 done.

  438 15:41:31.675575  microcode: Update skipped, already up-to-date

  439 15:41:31.678887  CPU #1 initialized

  440 15:41:31.682339  bsp_do_flight_plan done after 175 msecs.

  441 15:41:31.685159  CPU: frequency set to 2800 MHz

  442 15:41:31.685295  Enabling SMIs.

  443 15:41:31.692221  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms

  444 15:41:31.702617  Probing TPM:  done!

  445 15:41:31.709637  Connected to device vid:did:rid of 1ae0:0028:00

  446 15:41:31.719414  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  447 15:41:31.723019  Initialized TPM device CR50 revision 0

  448 15:41:31.725754  CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc

  449 15:41:31.732702  Found a VBT of 7680 bytes after decompression

  450 15:41:31.739221  WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called

  451 15:41:31.774131  Detected 2 core, 2 thread CPU.

  452 15:41:31.777524  Detected 2 core, 2 thread CPU.

  453 15:41:32.140868  Display FSP Version Info HOB

  454 15:41:32.144177  Reference Code - CPU = 8.7.22.30

  455 15:41:32.147486  uCode Version = 24.0.0.1f

  456 15:41:32.150926  TXT ACM version = ff.ff.ff.ffff

  457 15:41:32.153700  Reference Code - ME = 8.7.22.30

  458 15:41:32.157156  MEBx version = 0.0.0.0

  459 15:41:32.160653  ME Firmware Version = Consumer SKU

  460 15:41:32.164018  Reference Code - PCH = 8.7.22.30

  461 15:41:32.167402  PCH-CRID Status = Disabled

  462 15:41:32.170845  PCH-CRID Original Value = ff.ff.ff.ffff

  463 15:41:32.173514  PCH-CRID New Value = ff.ff.ff.ffff

  464 15:41:32.177012  OPROM - RST - RAID = ff.ff.ff.ffff

  465 15:41:32.180446  PCH Hsio Version = 4.0.0.0

  466 15:41:32.183824  Reference Code - SA - System Agent = 8.7.22.30

  467 15:41:32.187207  Reference Code - MRC = 0.0.4.68

  468 15:41:32.190651  SA - PCIe Version = 8.7.22.30

  469 15:41:32.193386  SA-CRID Status = Disabled

  470 15:41:32.196818  SA-CRID Original Value = 0.0.0.0

  471 15:41:32.200137  SA-CRID New Value = 0.0.0.0

  472 15:41:32.203685  OPROM - VBIOS = ff.ff.ff.ffff

  473 15:41:32.207062  IO Manageability Engine FW Version = ff.ff.ff.ffff

  474 15:41:32.209914  PHY Build Version = ff.ff.ff.ffff

  475 15:41:32.216883  Thunderbolt(TM) FW Version = ff.ff.ff.ffff

  476 15:41:32.220320  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  477 15:41:32.223723  ITSS IRQ Polarities Before:

  478 15:41:32.226472  IPC0: 0xffffffff

  479 15:41:32.226572  IPC1: 0xffffffff

  480 15:41:32.229970  IPC2: 0xffffffff

  481 15:41:32.230075  IPC3: 0xffffffff

  482 15:41:32.233561  ITSS IRQ Polarities After:

  483 15:41:32.236912  IPC0: 0xffffffff

  484 15:41:32.237026  IPC1: 0xffffffff

  485 15:41:32.239810  IPC2: 0xffffffff

  486 15:41:32.239917  IPC3: 0xffffffff

  487 15:41:32.253066  pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.

  488 15:41:32.260122  BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms

  489 15:41:32.260331  Enumerating buses...

  490 15:41:32.266312  Show all devs... Before device enumeration.

  491 15:41:32.269712  Root Device: enabled 1

  492 15:41:32.269879  CPU_CLUSTER: 0: enabled 1

  493 15:41:32.273087  DOMAIN: 0000: enabled 1

  494 15:41:32.276643  PCI: 00:00.0: enabled 1

  495 15:41:32.279516  PCI: 00:02.0: enabled 1

  496 15:41:32.279690  PCI: 00:04.0: enabled 1

  497 15:41:32.282879  PCI: 00:05.0: enabled 1

  498 15:41:32.286219  PCI: 00:09.0: enabled 0

  499 15:41:32.286382  PCI: 00:12.6: enabled 0

  500 15:41:32.289499  PCI: 00:14.0: enabled 1

  501 15:41:32.292851  PCI: 00:14.1: enabled 0

  502 15:41:32.296303  PCI: 00:14.2: enabled 0

  503 15:41:32.296430  PCI: 00:14.3: enabled 1

  504 15:41:32.299670  PCI: 00:14.5: enabled 1

  505 15:41:32.303088  PCI: 00:15.0: enabled 1

  506 15:41:32.306465  PCI: 00:15.1: enabled 1

  507 15:41:32.306605  PCI: 00:15.2: enabled 1

  508 15:41:32.309924  PCI: 00:15.3: enabled 1

  509 15:41:32.313310  PCI: 00:16.0: enabled 1

  510 15:41:32.313432  PCI: 00:16.1: enabled 0

  511 15:41:32.316071  PCI: 00:16.4: enabled 0

  512 15:41:32.319980  PCI: 00:16.5: enabled 0

  513 15:41:32.322777  PCI: 00:17.0: enabled 0

  514 15:41:32.322877  PCI: 00:19.0: enabled 1

  515 15:41:32.326193  PCI: 00:19.1: enabled 0

  516 15:41:32.329701  PCI: 00:19.2: enabled 1

  517 15:41:32.333096  PCI: 00:1a.0: enabled 1

  518 15:41:32.333216  PCI: 00:1c.0: enabled 0

  519 15:41:32.336533  PCI: 00:1c.1: enabled 0

  520 15:41:32.339376  PCI: 00:1c.2: enabled 0

  521 15:41:32.342906  PCI: 00:1c.3: enabled 0

  522 15:41:32.343021  PCI: 00:1c.4: enabled 0

  523 15:41:32.346436  PCI: 00:1c.5: enabled 0

  524 15:41:32.349241  PCI: 00:1c.6: enabled 0

  525 15:41:32.352600  PCI: 00:1c.7: enabled 1

  526 15:41:32.352769  PCI: 00:1e.0: enabled 0

  527 15:41:32.356129  PCI: 00:1e.1: enabled 0

  528 15:41:32.359678  PCI: 00:1e.2: enabled 1

  529 15:41:32.359783  PCI: 00:1e.3: enabled 0

  530 15:41:32.362346  PCI: 00:1f.0: enabled 1

  531 15:41:32.365752  PCI: 00:1f.1: enabled 1

  532 15:41:32.369238  PCI: 00:1f.2: enabled 1

  533 15:41:32.369356  PCI: 00:1f.3: enabled 1

  534 15:41:32.372712  PCI: 00:1f.4: enabled 0

  535 15:41:32.376128  PCI: 00:1f.5: enabled 1

  536 15:41:32.379471  PCI: 00:1f.7: enabled 0

  537 15:41:32.379641  GENERIC: 0.0: enabled 1

  538 15:41:32.382468  GENERIC: 0.0: enabled 1

  539 15:41:32.385813  USB0 port 0: enabled 1

  540 15:41:32.389187  GENERIC: 0.0: enabled 1

  541 15:41:32.389321  I2C: 00:2c: enabled 1

  542 15:41:32.392513  I2C: 00:15: enabled 1

  543 15:41:32.395892  GENERIC: 0.0: enabled 0

  544 15:41:32.396020  I2C: 00:15: enabled 1

  545 15:41:32.399255  I2C: 00:10: enabled 0

  546 15:41:32.401934  I2C: 00:10: enabled 0

  547 15:41:32.402050  I2C: 00:2c: enabled 1

  548 15:41:32.405413  I2C: 00:40: enabled 1

  549 15:41:32.408832  I2C: 00:10: enabled 1

  550 15:41:32.408950  I2C: 00:39: enabled 1

  551 15:41:32.412220  I2C: 00:36: enabled 1

  552 15:41:32.415647  I2C: 00:10: enabled 0

  553 15:41:32.415769  I2C: 00:0c: enabled 1

  554 15:41:32.418997  I2C: 00:50: enabled 1

  555 15:41:32.422390  I2C: 00:1a: enabled 1

  556 15:41:32.422501  I2C: 00:1a: enabled 0

  557 15:41:32.425185  I2C: 00:1a: enabled 0

  558 15:41:32.428529  I2C: 00:28: enabled 1

  559 15:41:32.428656  I2C: 00:29: enabled 1

  560 15:41:32.432001  PCI: 00:00.0: enabled 1

  561 15:41:32.435445  SPI: 00: enabled 1

  562 15:41:32.438421  PNP: 0c09.0: enabled 1

  563 15:41:32.438550  GENERIC: 0.0: enabled 0

  564 15:41:32.441911  USB2 port 0: enabled 1

  565 15:41:32.445342  USB2 port 1: enabled 1

  566 15:41:32.445477  USB2 port 2: enabled 1

  567 15:41:32.448736  USB2 port 3: enabled 1

  568 15:41:32.452105  USB2 port 4: enabled 0

  569 15:41:32.452223  USB2 port 5: enabled 1

  570 15:41:32.454929  USB2 port 6: enabled 0

  571 15:41:32.458423  USB2 port 7: enabled 1

  572 15:41:32.461884  USB3 port 0: enabled 1

  573 15:41:32.462014  USB3 port 1: enabled 1

  574 15:41:32.465296  USB3 port 2: enabled 1

  575 15:41:32.468825  USB3 port 3: enabled 1

  576 15:41:32.468947  APIC: 00: enabled 1

  577 15:41:32.471489  APIC: 02: enabled 1

  578 15:41:32.474994  Compare with tree...

  579 15:41:32.475134  Root Device: enabled 1

  580 15:41:32.478439   CPU_CLUSTER: 0: enabled 1

  581 15:41:32.481912    APIC: 00: enabled 1

  582 15:41:32.482041    APIC: 02: enabled 1

  583 15:41:32.485250   DOMAIN: 0000: enabled 1

  584 15:41:32.488735    PCI: 00:00.0: enabled 1

  585 15:41:32.492096    PCI: 00:02.0: enabled 1

  586 15:41:32.495350    PCI: 00:04.0: enabled 1

  587 15:41:32.495479     GENERIC: 0.0: enabled 1

  588 15:41:32.497892    PCI: 00:05.0: enabled 1

  589 15:41:32.501288     GENERIC: 0.0: enabled 1

  590 15:41:32.504633    PCI: 00:09.0: enabled 0

  591 15:41:32.507976    PCI: 00:12.6: enabled 0

  592 15:41:32.508103    PCI: 00:14.0: enabled 1

  593 15:41:32.511420     USB0 port 0: enabled 1

  594 15:41:32.514729      USB2 port 0: enabled 1

  595 15:41:32.518103      USB2 port 1: enabled 1

  596 15:41:32.521627      USB2 port 2: enabled 1

  597 15:41:32.524934      USB2 port 3: enabled 1

  598 15:41:32.525066      USB2 port 4: enabled 0

  599 15:41:32.527761      USB2 port 5: enabled 1

  600 15:41:32.531067      USB2 port 6: enabled 0

  601 15:41:32.534385      USB2 port 7: enabled 1

  602 15:41:32.537955      USB3 port 0: enabled 1

  603 15:41:32.541330      USB3 port 1: enabled 1

  604 15:41:32.541450      USB3 port 2: enabled 1

  605 15:41:32.544333      USB3 port 3: enabled 1

  606 15:41:32.547725    PCI: 00:14.1: enabled 0

  607 15:41:32.551313    PCI: 00:14.2: enabled 0

  608 15:41:32.554777    PCI: 00:14.3: enabled 1

  609 15:41:32.554973     GENERIC: 0.0: enabled 1

  610 15:41:32.557568    PCI: 00:14.5: enabled 1

  611 15:41:32.560999    PCI: 00:15.0: enabled 1

  612 15:41:32.564336     I2C: 00:2c: enabled 1

  613 15:41:32.564455     I2C: 00:15: enabled 1

  614 15:41:32.567776    PCI: 00:15.1: enabled 1

  615 15:41:32.571205    PCI: 00:15.2: enabled 1

  616 15:41:32.573941     GENERIC: 0.0: enabled 0

  617 15:41:32.577508     I2C: 00:15: enabled 1

  618 15:41:32.577688     I2C: 00:10: enabled 0

  619 15:41:32.580859     I2C: 00:10: enabled 0

  620 15:41:32.584362     I2C: 00:2c: enabled 1

  621 15:41:32.587308     I2C: 00:40: enabled 1

  622 15:41:32.587487     I2C: 00:10: enabled 1

  623 15:41:32.590761     I2C: 00:39: enabled 1

  624 15:41:32.593885    PCI: 00:15.3: enabled 1

  625 15:41:32.597181     I2C: 00:36: enabled 1

  626 15:41:32.600532     I2C: 00:10: enabled 0

  627 15:41:32.600652     I2C: 00:0c: enabled 1

  628 15:41:32.603793     I2C: 00:50: enabled 1

  629 15:41:32.607185    PCI: 00:16.0: enabled 1

  630 15:41:32.610561    PCI: 00:16.1: enabled 0

  631 15:41:32.610690    PCI: 00:16.4: enabled 0

  632 15:41:32.613909    PCI: 00:16.5: enabled 0

  633 15:41:32.617308    PCI: 00:17.0: enabled 0

  634 15:41:32.620874    PCI: 00:19.0: enabled 1

  635 15:41:32.623730     I2C: 00:1a: enabled 1

  636 15:41:32.623892     I2C: 00:1a: enabled 0

  637 15:41:32.627022     I2C: 00:1a: enabled 0

  638 15:41:32.630408     I2C: 00:28: enabled 1

  639 15:41:32.633919     I2C: 00:29: enabled 1

  640 15:41:32.634034    PCI: 00:19.1: enabled 0

  641 15:41:32.637316    PCI: 00:19.2: enabled 1

  642 15:41:32.640668    PCI: 00:1a.0: enabled 1

  643 15:41:32.643558    PCI: 00:1e.0: enabled 0

  644 15:41:32.647116    PCI: 00:1e.1: enabled 0

  645 15:41:32.647274    PCI: 00:1e.2: enabled 1

  646 15:41:32.650646     SPI: 00: enabled 1

  647 15:41:32.653430    PCI: 00:1e.3: enabled 0

  648 15:41:32.656874    PCI: 00:1f.0: enabled 1

  649 15:41:32.656989     PNP: 0c09.0: enabled 1

  650 15:41:32.660262    PCI: 00:1f.1: enabled 1

  651 15:41:32.663550    PCI: 00:1f.2: enabled 1

  652 15:41:32.666889    PCI: 00:1f.3: enabled 1

  653 15:41:32.670338     GENERIC: 0.0: enabled 0

  654 15:41:32.670448    PCI: 00:1f.4: enabled 0

  655 15:41:32.673808    PCI: 00:1f.5: enabled 1

  656 15:41:32.676595    PCI: 00:1f.7: enabled 0

  657 15:41:32.680110  Root Device scanning...

  658 15:41:32.683673  scan_static_bus for Root Device

  659 15:41:32.686622  CPU_CLUSTER: 0 enabled

  660 15:41:32.686751  DOMAIN: 0000 enabled

  661 15:41:32.690222  DOMAIN: 0000 scanning...

  662 15:41:32.693038  PCI: pci_scan_bus for bus 00

  663 15:41:32.696445  PCI: 00:00.0 [8086/0000] ops

  664 15:41:32.699930  PCI: 00:00.0 [8086/4e22] enabled

  665 15:41:32.703376  PCI: 00:02.0 [8086/0000] bus ops

  666 15:41:32.706801  PCI: 00:02.0 [8086/4e55] enabled

  667 15:41:32.710106  PCI: 00:04.0 [8086/0000] bus ops

  668 15:41:32.713466  PCI: 00:04.0 [8086/4e03] enabled

  669 15:41:32.716293  PCI: 00:05.0 [8086/0000] bus ops

  670 15:41:32.719845  PCI: 00:05.0 [8086/4e19] enabled

  671 15:41:32.723231  PCI: 00:08.0 [8086/4e11] enabled

  672 15:41:32.726724  PCI: 00:14.0 [8086/0000] bus ops

  673 15:41:32.730234  PCI: 00:14.0 [8086/4ded] enabled

  674 15:41:32.732999  PCI: 00:14.2 [8086/4def] disabled

  675 15:41:32.736339  PCI: 00:14.3 [8086/0000] bus ops

  676 15:41:32.739660  PCI: 00:14.3 [8086/4df0] enabled

  677 15:41:32.743243  PCI: 00:14.5 [8086/0000] ops

  678 15:41:32.746649  PCI: 00:14.5 [8086/4df8] enabled

  679 15:41:32.750081  PCI: 00:15.0 [8086/0000] bus ops

  680 15:41:32.753448  PCI: 00:15.0 [8086/4de8] enabled

  681 15:41:32.756249  PCI: 00:15.1 [8086/0000] bus ops

  682 15:41:32.759577  PCI: 00:15.1 [8086/4de9] enabled

  683 15:41:32.763072  PCI: 00:15.2 [8086/0000] bus ops

  684 15:41:32.766550  PCI: 00:15.2 [8086/4dea] enabled

  685 15:41:32.769990  PCI: 00:15.3 [8086/0000] bus ops

  686 15:41:32.773418  PCI: 00:15.3 [8086/4deb] enabled

  687 15:41:32.776170  PCI: 00:16.0 [8086/0000] ops

  688 15:41:32.779517  PCI: 00:16.0 [8086/4de0] enabled

  689 15:41:32.783033  PCI: 00:19.0 [8086/0000] bus ops

  690 15:41:32.786475  PCI: 00:19.0 [8086/4dc5] enabled

  691 15:41:32.786605  PCI: 00:19.2 [8086/0000] ops

  692 15:41:32.790008  PCI: 00:19.2 [8086/4dc7] enabled

  693 15:41:32.792720  PCI: 00:1a.0 [8086/0000] ops

  694 15:41:32.796235  PCI: 00:1a.0 [8086/4dc4] enabled

  695 15:41:32.799522  PCI: 00:1e.0 [8086/0000] ops

  696 15:41:32.802953  PCI: 00:1e.0 [8086/4da8] disabled

  697 15:41:32.806343  PCI: 00:1e.2 [8086/0000] bus ops

  698 15:41:32.809842  PCI: 00:1e.2 [8086/4daa] enabled

  699 15:41:32.813225  PCI: 00:1f.0 [8086/0000] bus ops

  700 15:41:32.816604  PCI: 00:1f.0 [8086/4d87] enabled

  701 15:41:32.823159  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  702 15:41:32.823317  RTC Init

  703 15:41:32.826423  Set power on after power failure.

  704 15:41:32.829818  Disabling Deep S3

  705 15:41:32.829939  Disabling Deep S3

  706 15:41:32.832609  Disabling Deep S4

  707 15:41:32.836069  Disabling Deep S4

  708 15:41:32.836191  Disabling Deep S5

  709 15:41:32.839482  Disabling Deep S5

  710 15:41:32.843017  PCI: 00:1f.2 [0000/0000] hidden

  711 15:41:32.846282  PCI: 00:1f.3 [8086/0000] bus ops

  712 15:41:32.849561  PCI: 00:1f.3 [8086/4dc8] enabled

  713 15:41:32.852865  PCI: 00:1f.5 [8086/0000] bus ops

  714 15:41:32.856288  PCI: 00:1f.5 [8086/4da4] enabled

  715 15:41:32.859650  PCI: Leftover static devices:

  716 15:41:32.859781  PCI: 00:12.6

  717 15:41:32.859862  PCI: 00:09.0

  718 15:41:32.863068  PCI: 00:14.1

  719 15:41:32.863194  PCI: 00:16.1

  720 15:41:32.865872  PCI: 00:16.4

  721 15:41:32.865981  PCI: 00:16.5

  722 15:41:32.866059  PCI: 00:17.0

  723 15:41:32.869219  PCI: 00:19.1

  724 15:41:32.869331  PCI: 00:1e.1

  725 15:41:32.872707  PCI: 00:1e.3

  726 15:41:32.872822  PCI: 00:1f.1

  727 15:41:32.876214  PCI: 00:1f.4

  728 15:41:32.876327  PCI: 00:1f.7

  729 15:41:32.879648  PCI: Check your devicetree.cb.

  730 15:41:32.882396  PCI: 00:02.0 scanning...

  731 15:41:32.885930  scan_generic_bus for PCI: 00:02.0

  732 15:41:32.889465  scan_generic_bus for PCI: 00:02.0 done

  733 15:41:32.892934  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  734 15:41:32.895743  PCI: 00:04.0 scanning...

  735 15:41:32.899254  scan_generic_bus for PCI: 00:04.0

  736 15:41:32.902682  GENERIC: 0.0 enabled

  737 15:41:32.909361  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  738 15:41:32.912071  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  739 15:41:32.915612  PCI: 00:05.0 scanning...

  740 15:41:32.918980  scan_generic_bus for PCI: 00:05.0

  741 15:41:32.922337  GENERIC: 0.0 enabled

  742 15:41:32.925663  bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done

  743 15:41:32.932120  scan_bus: bus PCI: 00:05.0 finished in 11 msecs

  744 15:41:32.935470  PCI: 00:14.0 scanning...

  745 15:41:32.938859  scan_static_bus for PCI: 00:14.0

  746 15:41:32.939024  USB0 port 0 enabled

  747 15:41:32.942227  USB0 port 0 scanning...

  748 15:41:32.945678  scan_static_bus for USB0 port 0

  749 15:41:32.948420  USB2 port 0 enabled

  750 15:41:32.948586  USB2 port 1 enabled

  751 15:41:32.951936  USB2 port 2 enabled

  752 15:41:32.955313  USB2 port 3 enabled

  753 15:41:32.955501  USB2 port 4 disabled

  754 15:41:32.958776  USB2 port 5 enabled

  755 15:41:32.958948  USB2 port 6 disabled

  756 15:41:32.962092  USB2 port 7 enabled

  757 15:41:32.965655  USB3 port 0 enabled

  758 15:41:32.965823  USB3 port 1 enabled

  759 15:41:32.968434  USB3 port 2 enabled

  760 15:41:32.971907  USB3 port 3 enabled

  761 15:41:32.972084  USB2 port 0 scanning...

  762 15:41:32.975401  scan_static_bus for USB2 port 0

  763 15:41:32.978784  scan_static_bus for USB2 port 0 done

  764 15:41:32.985063  scan_bus: bus USB2 port 0 finished in 6 msecs

  765 15:41:32.988661  USB2 port 1 scanning...

  766 15:41:32.992068  scan_static_bus for USB2 port 1

  767 15:41:32.994949  scan_static_bus for USB2 port 1 done

  768 15:41:32.998477  scan_bus: bus USB2 port 1 finished in 6 msecs

  769 15:41:33.001883  USB2 port 2 scanning...

  770 15:41:33.005332  scan_static_bus for USB2 port 2

  771 15:41:33.008034  scan_static_bus for USB2 port 2 done

  772 15:41:33.011489  scan_bus: bus USB2 port 2 finished in 6 msecs

  773 15:41:33.014859  USB2 port 3 scanning...

  774 15:41:33.018241  scan_static_bus for USB2 port 3

  775 15:41:33.021709  scan_static_bus for USB2 port 3 done

  776 15:41:33.027921  scan_bus: bus USB2 port 3 finished in 6 msecs

  777 15:41:33.028069  USB2 port 5 scanning...

  778 15:41:33.031255  scan_static_bus for USB2 port 5

  779 15:41:33.034684  scan_static_bus for USB2 port 5 done

  780 15:41:33.041506  scan_bus: bus USB2 port 5 finished in 6 msecs

  781 15:41:33.044910  USB2 port 7 scanning...

  782 15:41:33.048362  scan_static_bus for USB2 port 7

  783 15:41:33.051132  scan_static_bus for USB2 port 7 done

  784 15:41:33.054542  scan_bus: bus USB2 port 7 finished in 6 msecs

  785 15:41:33.057927  USB3 port 0 scanning...

  786 15:41:33.061375  scan_static_bus for USB3 port 0

  787 15:41:33.064825  scan_static_bus for USB3 port 0 done

  788 15:41:33.067578  scan_bus: bus USB3 port 0 finished in 6 msecs

  789 15:41:33.070964  USB3 port 1 scanning...

  790 15:41:33.074445  scan_static_bus for USB3 port 1

  791 15:41:33.077876  scan_static_bus for USB3 port 1 done

  792 15:41:33.084288  scan_bus: bus USB3 port 1 finished in 6 msecs

  793 15:41:33.084446  USB3 port 2 scanning...

  794 15:41:33.087762  scan_static_bus for USB3 port 2

  795 15:41:33.094079  scan_static_bus for USB3 port 2 done

  796 15:41:33.097650  scan_bus: bus USB3 port 2 finished in 6 msecs

  797 15:41:33.100927  USB3 port 3 scanning...

  798 15:41:33.104377  scan_static_bus for USB3 port 3

  799 15:41:33.107609  scan_static_bus for USB3 port 3 done

  800 15:41:33.110959  scan_bus: bus USB3 port 3 finished in 6 msecs

  801 15:41:33.114279  scan_static_bus for USB0 port 0 done

  802 15:41:33.121101  scan_bus: bus USB0 port 0 finished in 172 msecs

  803 15:41:33.123846  scan_static_bus for PCI: 00:14.0 done

  804 15:41:33.127279  scan_bus: bus PCI: 00:14.0 finished in 189 msecs

  805 15:41:33.130653  PCI: 00:14.3 scanning...

  806 15:41:33.133879  scan_static_bus for PCI: 00:14.3

  807 15:41:33.137156  GENERIC: 0.0 enabled

  808 15:41:33.140582  scan_static_bus for PCI: 00:14.3 done

  809 15:41:33.143932  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  810 15:41:33.147169  PCI: 00:15.0 scanning...

  811 15:41:33.150667  scan_static_bus for PCI: 00:15.0

  812 15:41:33.154021  I2C: 00:2c enabled

  813 15:41:33.154199  I2C: 00:15 enabled

  814 15:41:33.156840  scan_static_bus for PCI: 00:15.0 done

  815 15:41:33.163597  scan_bus: bus PCI: 00:15.0 finished in 11 msecs

  816 15:41:33.167069  PCI: 00:15.1 scanning...

  817 15:41:33.170478  scan_static_bus for PCI: 00:15.1

  818 15:41:33.173915  scan_static_bus for PCI: 00:15.1 done

  819 15:41:33.177391  scan_bus: bus PCI: 00:15.1 finished in 7 msecs

  820 15:41:33.180048  PCI: 00:15.2 scanning...

  821 15:41:33.183475  scan_static_bus for PCI: 00:15.2

  822 15:41:33.186984  GENERIC: 0.0 disabled

  823 15:41:33.187175  I2C: 00:15 enabled

  824 15:41:33.190423  I2C: 00:10 disabled

  825 15:41:33.193908  I2C: 00:10 disabled

  826 15:41:33.194101  I2C: 00:2c enabled

  827 15:41:33.196732  I2C: 00:40 enabled

  828 15:41:33.196920  I2C: 00:10 enabled

  829 15:41:33.200309  I2C: 00:39 enabled

  830 15:41:33.203579  scan_static_bus for PCI: 00:15.2 done

  831 15:41:33.210499  scan_bus: bus PCI: 00:15.2 finished in 23 msecs

  832 15:41:33.210675  PCI: 00:15.3 scanning...

  833 15:41:33.213249  scan_static_bus for PCI: 00:15.3

  834 15:41:33.216808  I2C: 00:36 enabled

  835 15:41:33.220130  I2C: 00:10 disabled

  836 15:41:33.220280  I2C: 00:0c enabled

  837 15:41:33.223609  I2C: 00:50 enabled

  838 15:41:33.226458  scan_static_bus for PCI: 00:15.3 done

  839 15:41:33.229846  scan_bus: bus PCI: 00:15.3 finished in 14 msecs

  840 15:41:33.233362  PCI: 00:19.0 scanning...

  841 15:41:33.236791  scan_static_bus for PCI: 00:19.0

  842 15:41:33.240217  I2C: 00:1a enabled

  843 15:41:33.240342  I2C: 00:1a disabled

  844 15:41:33.243644  I2C: 00:1a disabled

  845 15:41:33.246989  I2C: 00:28 enabled

  846 15:41:33.247152  I2C: 00:29 enabled

  847 15:41:33.249842  scan_static_bus for PCI: 00:19.0 done

  848 15:41:33.256763  scan_bus: bus PCI: 00:19.0 finished in 17 msecs

  849 15:41:33.256919  PCI: 00:1e.2 scanning...

  850 15:41:33.263611  scan_generic_bus for PCI: 00:1e.2

  851 15:41:33.263762  SPI: 00 enabled

  852 15:41:33.269772  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

  853 15:41:33.273297  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

  854 15:41:33.276698  PCI: 00:1f.0 scanning...

  855 15:41:33.280119  scan_static_bus for PCI: 00:1f.0

  856 15:41:33.283671  PNP: 0c09.0 enabled

  857 15:41:33.283871  PNP: 0c09.0 scanning...

  858 15:41:33.286950  scan_static_bus for PNP: 0c09.0

  859 15:41:33.293244  scan_static_bus for PNP: 0c09.0 done

  860 15:41:33.296751  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

  861 15:41:33.299500  scan_static_bus for PCI: 00:1f.0 done

  862 15:41:33.306348  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

  863 15:41:33.306582  PCI: 00:1f.3 scanning...

  864 15:41:33.309692  scan_static_bus for PCI: 00:1f.3

  865 15:41:33.313046  GENERIC: 0.0 disabled

  866 15:41:33.316617  scan_static_bus for PCI: 00:1f.3 done

  867 15:41:33.322653  scan_bus: bus PCI: 00:1f.3 finished in 9 msecs

  868 15:41:33.322857  PCI: 00:1f.5 scanning...

  869 15:41:33.329389  scan_generic_bus for PCI: 00:1f.5

  870 15:41:33.332780  scan_generic_bus for PCI: 00:1f.5 done

  871 15:41:33.336182  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

  872 15:41:33.342807  scan_bus: bus DOMAIN: 0000 finished in 646 msecs

  873 15:41:33.346191  scan_static_bus for Root Device done

  874 15:41:33.349552  scan_bus: bus Root Device finished in 665 msecs

  875 15:41:33.349710  done

  876 15:41:33.356467  BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1085 ms

  877 15:41:33.359237  Chrome EC: UHEPI supported

  878 15:41:33.366162  FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)

  879 15:41:33.372328  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

  880 15:41:33.375801  SPI flash protection: WPSW=0 SRP0=1

  881 15:41:33.379295  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

  882 15:41:33.385910  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

  883 15:41:33.388746  found VGA at PCI: 00:02.0

  884 15:41:33.392213  Setting up VGA for PCI: 00:02.0

  885 15:41:33.395630  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

  886 15:41:33.401921  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

  887 15:41:33.405388  Allocating resources...

  888 15:41:33.405538  Reading resources...

  889 15:41:33.412105  Root Device read_resources bus 0 link: 0

  890 15:41:33.415406  CPU_CLUSTER: 0 read_resources bus 0 link: 0

  891 15:41:33.418966  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

  892 15:41:33.425773  DOMAIN: 0000 read_resources bus 0 link: 0

  893 15:41:33.428511  PCI: 00:04.0 read_resources bus 1 link: 0

  894 15:41:33.435418  PCI: 00:04.0 read_resources bus 1 link: 0 done

  895 15:41:33.438872  PCI: 00:05.0 read_resources bus 2 link: 0

  896 15:41:33.445692  PCI: 00:05.0 read_resources bus 2 link: 0 done

  897 15:41:33.449154  PCI: 00:14.0 read_resources bus 0 link: 0

  898 15:41:33.451884  USB0 port 0 read_resources bus 0 link: 0

  899 15:41:33.459991  USB0 port 0 read_resources bus 0 link: 0 done

  900 15:41:33.463411  PCI: 00:14.0 read_resources bus 0 link: 0 done

  901 15:41:33.470371  PCI: 00:14.3 read_resources bus 0 link: 0

  902 15:41:33.473171  PCI: 00:14.3 read_resources bus 0 link: 0 done

  903 15:41:33.529400  PCI: 00:15.0 read_resources bus 0 link: 0

  904 15:41:33.529764  PCI: 00:15.0 read_resources bus 0 link: 0 done

  905 15:41:33.529886  PCI: 00:15.2 read_resources bus 0 link: 0

  906 15:41:33.529971  PCI: 00:15.2 read_resources bus 0 link: 0 done

  907 15:41:33.530249  PCI: 00:15.3 read_resources bus 0 link: 0

  908 15:41:33.530336  PCI: 00:15.3 read_resources bus 0 link: 0 done

  909 15:41:33.530407  PCI: 00:19.0 read_resources bus 0 link: 0

  910 15:41:33.530475  PCI: 00:19.0 read_resources bus 0 link: 0 done

  911 15:41:33.530781  PCI: 00:1e.2 read_resources bus 3 link: 0

  912 15:41:33.531079  PCI: 00:1e.2 read_resources bus 3 link: 0 done

  913 15:41:33.531171  PCI: 00:1f.0 read_resources bus 0 link: 0

  914 15:41:33.580095  PCI: 00:1f.0 read_resources bus 0 link: 0 done

  915 15:41:33.580844  PCI: 00:1f.3 read_resources bus 0 link: 0

  916 15:41:33.580963  PCI: 00:1f.3 read_resources bus 0 link: 0 done

  917 15:41:33.581273  DOMAIN: 0000 read_resources bus 0 link: 0 done

  918 15:41:33.581365  Root Device read_resources bus 0 link: 0 done

  919 15:41:33.581464  Done reading resources.

  920 15:41:33.581561  Show resources in subtree (Root Device)...After reading.

  921 15:41:33.581834   Root Device child on link 0 CPU_CLUSTER: 0

  922 15:41:33.581924    CPU_CLUSTER: 0 child on link 0 APIC: 00

  923 15:41:33.582015     APIC: 00

  924 15:41:33.582096     APIC: 02

  925 15:41:33.582373    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  926 15:41:33.629952    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  927 15:41:33.630337    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

  928 15:41:33.630450     PCI: 00:00.0

  929 15:41:33.630744     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

  930 15:41:33.630841     PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

  931 15:41:33.631137     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

  932 15:41:33.636983     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

  933 15:41:33.643098     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

  934 15:41:33.653476     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

  935 15:41:33.663054     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

  936 15:41:33.673215     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

  937 15:41:33.682808     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

  938 15:41:33.689533     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

  939 15:41:33.699711     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

  940 15:41:33.709368     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

  941 15:41:33.718977     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

  942 15:41:33.725904     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

  943 15:41:33.735407     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

  944 15:41:33.745858     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

  945 15:41:33.755870     PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10

  946 15:41:33.765685     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

  947 15:41:33.775426     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

  948 15:41:33.775664     PCI: 00:02.0

  949 15:41:33.785161     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  950 15:41:33.798402     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

  951 15:41:33.805381     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

  952 15:41:33.808838     PCI: 00:04.0 child on link 0 GENERIC: 0.0

  953 15:41:33.818432     PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  954 15:41:33.821706      GENERIC: 0.0

  955 15:41:33.825146     PCI: 00:05.0 child on link 0 GENERIC: 0.0

  956 15:41:33.835234     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  957 15:41:33.838548      GENERIC: 0.0

  958 15:41:33.838685     PCI: 00:08.0

  959 15:41:33.848313     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  960 15:41:33.855025     PCI: 00:14.0 child on link 0 USB0 port 0

  961 15:41:33.864651     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  962 15:41:33.868006      USB0 port 0 child on link 0 USB2 port 0

  963 15:41:33.871419       USB2 port 0

  964 15:41:33.871549       USB2 port 1

  965 15:41:33.874974       USB2 port 2

  966 15:41:33.875080       USB2 port 3

  967 15:41:33.877823       USB2 port 4

  968 15:41:33.877924       USB2 port 5

  969 15:41:33.881375       USB2 port 6

  970 15:41:33.881496       USB2 port 7

  971 15:41:33.884823       USB3 port 0

  972 15:41:33.884943       USB3 port 1

  973 15:41:33.888264       USB3 port 2

  974 15:41:33.888383       USB3 port 3

  975 15:41:33.891609     PCI: 00:14.2

  976 15:41:33.894422     PCI: 00:14.3 child on link 0 GENERIC: 0.0

  977 15:41:33.904722     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

  978 15:41:33.908122      GENERIC: 0.0

  979 15:41:33.908255     PCI: 00:14.5

  980 15:41:33.917958     PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  981 15:41:33.924814     PCI: 00:15.0 child on link 0 I2C: 00:2c

  982 15:41:33.934309     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  983 15:41:33.934452      I2C: 00:2c

  984 15:41:33.937710      I2C: 00:15

  985 15:41:33.937818     PCI: 00:15.1

  986 15:41:33.947919     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  987 15:41:33.951179     PCI: 00:15.2 child on link 0 GENERIC: 0.0

  988 15:41:33.960529     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  989 15:41:33.964039      GENERIC: 0.0

  990 15:41:33.964143      I2C: 00:15

  991 15:41:33.967482      I2C: 00:10

  992 15:41:33.967577      I2C: 00:10

  993 15:41:33.970742      I2C: 00:2c

  994 15:41:33.970833      I2C: 00:40

  995 15:41:33.974206      I2C: 00:10

  996 15:41:33.974297      I2C: 00:39

  997 15:41:33.980996     PCI: 00:15.3 child on link 0 I2C: 00:36

  998 15:41:33.990882     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  999 15:41:33.991042      I2C: 00:36

 1000 15:41:33.991136      I2C: 00:10

 1001 15:41:33.994351      I2C: 00:0c

 1002 15:41:33.994456      I2C: 00:50

 1003 15:41:33.997071     PCI: 00:16.0

 1004 15:41:34.007343     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1005 15:41:34.010836     PCI: 00:19.0 child on link 0 I2C: 00:1a

 1006 15:41:34.020423     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1007 15:41:34.023814      I2C: 00:1a

 1008 15:41:34.023950      I2C: 00:1a

 1009 15:41:34.027199      I2C: 00:1a

 1010 15:41:34.027304      I2C: 00:28

 1011 15:41:34.030694      I2C: 00:29

 1012 15:41:34.030788     PCI: 00:19.2

 1013 15:41:34.040243     PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1014 15:41:34.050630     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1015 15:41:34.053384     PCI: 00:1a.0

 1016 15:41:34.063526     PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1017 15:41:34.063682     PCI: 00:1e.0

 1018 15:41:34.070494     PCI: 00:1e.2 child on link 0 SPI: 00

 1019 15:41:34.080251     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1020 15:41:34.080392      SPI: 00

 1021 15:41:34.083684     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1022 15:41:34.093178     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1023 15:41:34.093324      PNP: 0c09.0

 1024 15:41:34.103378      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1025 15:41:34.106747     PCI: 00:1f.2

 1026 15:41:34.112839     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1027 15:41:34.123256     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1

 1028 15:41:34.129952     PCI: 00:1f.3 child on link 0 GENERIC: 0.0

 1029 15:41:34.139684     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1030 15:41:34.149781     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1031 15:41:34.149930      GENERIC: 0.0

 1032 15:41:34.152690     PCI: 00:1f.5

 1033 15:41:34.159471     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1034 15:41:34.169141  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1035 15:41:34.175906  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1036 15:41:34.182776  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1037 15:41:34.188924   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1038 15:41:34.196012   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1039 15:41:34.206097   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1040 15:41:34.208879   DOMAIN: 0000: Resource ranges:

 1041 15:41:34.212404   * Base: 1000, Size: 800, Tag: 100

 1042 15:41:34.215961   * Base: 1900, Size: e700, Tag: 100

 1043 15:41:34.219416    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1044 15:41:34.225634  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1045 15:41:34.232446  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1046 15:41:34.242690   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1047 15:41:34.249076   update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)

 1048 15:41:34.255905   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1049 15:41:34.265383   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1050 15:41:34.272233   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1051 15:41:34.278655   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1052 15:41:34.288939   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1053 15:41:34.295340   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1054 15:41:34.302233   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1055 15:41:34.312059   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1056 15:41:34.318253   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1057 15:41:34.325293   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1058 15:41:34.334894   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1059 15:41:34.341798   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1060 15:41:34.347882   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1061 15:41:34.354634   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1062 15:41:34.364524   update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)

 1063 15:41:34.371357   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1064 15:41:34.381520   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1065 15:41:34.387920   update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)

 1066 15:41:34.394801   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1067 15:41:34.397498   DOMAIN: 0000: Resource ranges:

 1068 15:41:34.401006   * Base: 7fc00000, Size: 40400000, Tag: 200

 1069 15:41:34.407959   * Base: d0000000, Size: 2b000000, Tag: 200

 1070 15:41:34.411236   * Base: fb001000, Size: 2fff000, Tag: 200

 1071 15:41:34.414062   * Base: fe010000, Size: 22000, Tag: 200

 1072 15:41:34.420930   * Base: fe033000, Size: a4d000, Tag: 200

 1073 15:41:34.424429   * Base: fea88000, Size: 2f8000, Tag: 200

 1074 15:41:34.427189   * Base: fed88000, Size: 8000, Tag: 200

 1075 15:41:34.430569   * Base: fed93000, Size: d000, Tag: 200

 1076 15:41:34.434068   * Base: feda2000, Size: 125e000, Tag: 200

 1077 15:41:34.441105   * Base: 180400000, Size: 7e7fc00000, Tag: 100200

 1078 15:41:34.447226    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1079 15:41:34.454133    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1080 15:41:34.460865    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1081 15:41:34.467678    PCI: 00:1f.3 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1082 15:41:34.473741    PCI: 00:04.0 10 *  [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem

 1083 15:41:34.480714    PCI: 00:14.0 10 *  [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem

 1084 15:41:34.487325    PCI: 00:14.3 10 *  [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem

 1085 15:41:34.493380    PCI: 00:1f.3 10 *  [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem

 1086 15:41:34.500343    PCI: 00:08.0 10 *  [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem

 1087 15:41:34.506969    PCI: 00:14.5 10 *  [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem

 1088 15:41:34.513716    PCI: 00:15.0 10 *  [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem

 1089 15:41:34.520370    PCI: 00:15.1 10 *  [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem

 1090 15:41:34.526972    PCI: 00:15.2 10 *  [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem

 1091 15:41:34.533144    PCI: 00:15.3 10 *  [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem

 1092 15:41:34.539888    PCI: 00:16.0 10 *  [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem

 1093 15:41:34.546555    PCI: 00:19.0 10 *  [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem

 1094 15:41:34.553276    PCI: 00:19.2 18 *  [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem

 1095 15:41:34.560151    PCI: 00:1a.0 10 *  [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem

 1096 15:41:34.566183    PCI: 00:1e.2 10 *  [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem

 1097 15:41:34.572891    PCI: 00:1f.5 10 *  [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem

 1098 15:41:34.579612  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1099 15:41:34.586540  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1100 15:41:34.592822  Root Device assign_resources, bus 0 link: 0

 1101 15:41:34.596046  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1102 15:41:34.606270  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1103 15:41:34.612555  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1104 15:41:34.622839  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1105 15:41:34.629093  PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64

 1106 15:41:34.632437  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1107 15:41:34.639349  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1108 15:41:34.645514  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1109 15:41:34.652515  PCI: 00:05.0 assign_resources, bus 2 link: 0

 1110 15:41:34.655986  PCI: 00:05.0 assign_resources, bus 2 link: 0

 1111 15:41:34.665717  PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64

 1112 15:41:34.672220  PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64

 1113 15:41:34.675596  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1114 15:41:34.681723  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1115 15:41:34.688576  PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64

 1116 15:41:34.694818  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1117 15:41:34.698072  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1118 15:41:34.708340  PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64

 1119 15:41:34.715157  PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64

 1120 15:41:34.718456  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1121 15:41:34.724626  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1122 15:41:34.731506  PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64

 1123 15:41:34.741498  PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64

 1124 15:41:34.744872  PCI: 00:15.2 assign_resources, bus 0 link: 0

 1125 15:41:34.747595  PCI: 00:15.2 assign_resources, bus 0 link: 0

 1126 15:41:34.758211  PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64

 1127 15:41:34.761582  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1128 15:41:34.768351  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1129 15:41:34.774825  PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64

 1130 15:41:34.784887  PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64

 1131 15:41:34.788345  PCI: 00:19.0 assign_resources, bus 0 link: 0

 1132 15:41:34.790921  PCI: 00:19.0 assign_resources, bus 0 link: 0

 1133 15:41:34.801104  PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64

 1134 15:41:34.807864  PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64

 1135 15:41:34.817402  PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64

 1136 15:41:34.820722  PCI: 00:1e.2 assign_resources, bus 3 link: 0

 1137 15:41:34.824175  PCI: 00:1e.2 assign_resources, bus 3 link: 0

 1138 15:41:34.830971  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1139 15:41:34.834312  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1140 15:41:34.841119  LPC: Trying to open IO window from 800 size 1ff

 1141 15:41:34.847790  PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64

 1142 15:41:34.857976  PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64

 1143 15:41:34.860694  PCI: 00:1f.3 assign_resources, bus 0 link: 0

 1144 15:41:34.864122  PCI: 00:1f.3 assign_resources, bus 0 link: 0

 1145 15:41:34.873885  PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem

 1146 15:41:34.877248  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1147 15:41:34.883676  Root Device assign_resources, bus 0 link: 0

 1148 15:41:34.883835  Done setting resources.

 1149 15:41:34.890753  Show resources in subtree (Root Device)...After assigning values.

 1150 15:41:34.897302   Root Device child on link 0 CPU_CLUSTER: 0

 1151 15:41:34.900764    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1152 15:41:34.900932     APIC: 00

 1153 15:41:34.904198     APIC: 02

 1154 15:41:34.907584    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1155 15:41:34.916914    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1156 15:41:34.926918    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1157 15:41:34.927066     PCI: 00:00.0

 1158 15:41:34.937159     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1159 15:41:34.946654     PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1160 15:41:34.956791     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1161 15:41:34.966939     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1162 15:41:34.973587     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1163 15:41:34.983394     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1164 15:41:34.993415     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1165 15:41:35.002912     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1166 15:41:35.013146     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1167 15:41:35.023176     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1168 15:41:35.029908     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1169 15:41:35.039641     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1170 15:41:35.049504     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1171 15:41:35.059012     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1172 15:41:35.069241     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1173 15:41:35.075919     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1174 15:41:35.085567     PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1175 15:41:35.095304     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1176 15:41:35.105443     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1177 15:41:35.108798     PCI: 00:02.0

 1178 15:41:35.118925     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1179 15:41:35.128361     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1180 15:41:35.138542     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1181 15:41:35.141767     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1182 15:41:35.151915     PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10

 1183 15:41:35.155354      GENERIC: 0.0

 1184 15:41:35.158768     PCI: 00:05.0 child on link 0 GENERIC: 0.0

 1185 15:41:35.168281     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1186 15:41:35.171687      GENERIC: 0.0

 1187 15:41:35.171809     PCI: 00:08.0

 1188 15:41:35.181568     PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10

 1189 15:41:35.188226     PCI: 00:14.0 child on link 0 USB0 port 0

 1190 15:41:35.198304     PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10

 1191 15:41:35.201880      USB0 port 0 child on link 0 USB2 port 0

 1192 15:41:35.204504       USB2 port 0

 1193 15:41:35.204610       USB2 port 1

 1194 15:41:35.207898       USB2 port 2

 1195 15:41:35.207999       USB2 port 3

 1196 15:41:35.211391       USB2 port 4

 1197 15:41:35.211494       USB2 port 5

 1198 15:41:35.214831       USB2 port 6

 1199 15:41:35.214932       USB2 port 7

 1200 15:41:35.218224       USB3 port 0

 1201 15:41:35.221521       USB3 port 1

 1202 15:41:35.221630       USB3 port 2

 1203 15:41:35.224947       USB3 port 3

 1204 15:41:35.225053     PCI: 00:14.2

 1205 15:41:35.227792     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1206 15:41:35.241411     PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10

 1207 15:41:35.241584      GENERIC: 0.0

 1208 15:41:35.244240     PCI: 00:14.5

 1209 15:41:35.254367     PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10

 1210 15:41:35.257844     PCI: 00:15.0 child on link 0 I2C: 00:2c

 1211 15:41:35.267524     PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10

 1212 15:41:35.270792      I2C: 00:2c

 1213 15:41:35.270923      I2C: 00:15

 1214 15:41:35.274272     PCI: 00:15.1

 1215 15:41:35.284266     PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10

 1216 15:41:35.287571     PCI: 00:15.2 child on link 0 GENERIC: 0.0

 1217 15:41:35.297581     PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10

 1218 15:41:35.301013      GENERIC: 0.0

 1219 15:41:35.301162      I2C: 00:15

 1220 15:41:35.304239      I2C: 00:10

 1221 15:41:35.304341      I2C: 00:10

 1222 15:41:35.307475      I2C: 00:2c

 1223 15:41:35.307574      I2C: 00:40

 1224 15:41:35.307664      I2C: 00:10

 1225 15:41:35.310533      I2C: 00:39

 1226 15:41:35.313869     PCI: 00:15.3 child on link 0 I2C: 00:36

 1227 15:41:35.324147     PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10

 1228 15:41:35.327515      I2C: 00:36

 1229 15:41:35.327635      I2C: 00:10

 1230 15:41:35.330861      I2C: 00:0c

 1231 15:41:35.330964      I2C: 00:50

 1232 15:41:35.334175     PCI: 00:16.0

 1233 15:41:35.343819     PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10

 1234 15:41:35.347101     PCI: 00:19.0 child on link 0 I2C: 00:1a

 1235 15:41:35.357181     PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10

 1236 15:41:35.359979      I2C: 00:1a

 1237 15:41:35.360091      I2C: 00:1a

 1238 15:41:35.363457      I2C: 00:1a

 1239 15:41:35.363559      I2C: 00:28

 1240 15:41:35.366893      I2C: 00:29

 1241 15:41:35.366994     PCI: 00:19.2

 1242 15:41:35.377127     PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1243 15:41:35.390351     PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18

 1244 15:41:35.390558     PCI: 00:1a.0

 1245 15:41:35.399964     PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10

 1246 15:41:35.403381     PCI: 00:1e.0

 1247 15:41:35.406814     PCI: 00:1e.2 child on link 0 SPI: 00

 1248 15:41:35.416838     PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10

 1249 15:41:35.416990      SPI: 00

 1250 15:41:35.422987     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1251 15:41:35.429646     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1252 15:41:35.432871      PNP: 0c09.0

 1253 15:41:35.439740      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1254 15:41:35.443069     PCI: 00:1f.2

 1255 15:41:35.453378     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1256 15:41:35.463119     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1

 1257 15:41:35.466413     PCI: 00:1f.3 child on link 0 GENERIC: 0.0

 1258 15:41:35.475841     PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10

 1259 15:41:35.485997     PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20

 1260 15:41:35.489359      GENERIC: 0.0

 1261 15:41:35.489485     PCI: 00:1f.5

 1262 15:41:35.499465     PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10

 1263 15:41:35.502727  Done allocating resources.

 1264 15:41:35.508969  BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2097 ms

 1265 15:41:35.513030  Enabling resources...

 1266 15:41:35.515534  PCI: 00:00.0 subsystem <- 8086/4e22

 1267 15:41:35.519597  PCI: 00:00.0 cmd <- 06

 1268 15:41:35.522959  PCI: 00:02.0 subsystem <- 8086/4e55

 1269 15:41:35.525669  PCI: 00:02.0 cmd <- 03

 1270 15:41:35.528944  PCI: 00:04.0 subsystem <- 8086/4e03

 1271 15:41:35.529065  PCI: 00:04.0 cmd <- 02

 1272 15:41:35.532256  PCI: 00:05.0 bridge ctrl <- 0003

 1273 15:41:35.539009  PCI: 00:05.0 subsystem <- 8086/4e19

 1274 15:41:35.539148  PCI: 00:05.0 cmd <- 02

 1275 15:41:35.542643  PCI: 00:08.0 cmd <- 06

 1276 15:41:35.546033  PCI: 00:14.0 subsystem <- 8086/4ded

 1277 15:41:35.548986  PCI: 00:14.0 cmd <- 02

 1278 15:41:35.552259  PCI: 00:14.3 subsystem <- 8086/4df0

 1279 15:41:35.555696  PCI: 00:14.3 cmd <- 02

 1280 15:41:35.558862  PCI: 00:14.5 subsystem <- 8086/4df8

 1281 15:41:35.562305  PCI: 00:14.5 cmd <- 06

 1282 15:41:35.565688  PCI: 00:15.0 subsystem <- 8086/4de8

 1283 15:41:35.565786  PCI: 00:15.0 cmd <- 02

 1284 15:41:35.572467  PCI: 00:15.1 subsystem <- 8086/4de9

 1285 15:41:35.572572  PCI: 00:15.1 cmd <- 02

 1286 15:41:35.575877  PCI: 00:15.2 subsystem <- 8086/4dea

 1287 15:41:35.578468  PCI: 00:15.2 cmd <- 02

 1288 15:41:35.582383  PCI: 00:15.3 subsystem <- 8086/4deb

 1289 15:41:35.585756  PCI: 00:15.3 cmd <- 02

 1290 15:41:35.588949  PCI: 00:16.0 subsystem <- 8086/4de0

 1291 15:41:35.592257  PCI: 00:16.0 cmd <- 02

 1292 15:41:35.595625  PCI: 00:19.0 subsystem <- 8086/4dc5

 1293 15:41:35.598936  PCI: 00:19.0 cmd <- 02

 1294 15:41:35.601531  PCI: 00:19.2 subsystem <- 8086/4dc7

 1295 15:41:35.604944  PCI: 00:19.2 cmd <- 06

 1296 15:41:35.608449  PCI: 00:1a.0 subsystem <- 8086/4dc4

 1297 15:41:35.608548  PCI: 00:1a.0 cmd <- 06

 1298 15:41:35.615039  PCI: 00:1e.2 subsystem <- 8086/4daa

 1299 15:41:35.615156  PCI: 00:1e.2 cmd <- 06

 1300 15:41:35.618433  PCI: 00:1f.0 subsystem <- 8086/4d87

 1301 15:41:35.621801  PCI: 00:1f.0 cmd <- 407

 1302 15:41:35.625213  PCI: 00:1f.3 subsystem <- 8086/4dc8

 1303 15:41:35.628683  PCI: 00:1f.3 cmd <- 02

 1304 15:41:35.631413  PCI: 00:1f.5 subsystem <- 8086/4da4

 1305 15:41:35.634799  PCI: 00:1f.5 cmd <- 406

 1306 15:41:35.638899  done.

 1307 15:41:35.642231  BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms

 1308 15:41:35.645691  Initializing devices...

 1309 15:41:35.648957  Root Device init

 1310 15:41:35.649055  mainboard: EC init

 1311 15:41:35.655732  Chrome EC: Set SMI mask to 0x0000000000000000

 1312 15:41:35.658995  FMAP: area RW_ELOG found @ bfa000 (4096 bytes)

 1313 15:41:35.661785  ELOG: NV offset 0xbfa000 size 0x1000

 1314 15:41:35.669788  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1315 15:41:35.676649  ELOG: Event(17) added with size 13 at 2023-03-03 15:41:35 UTC

 1316 15:41:35.683539  ELOG: Event(91) added with size 10 at 2023-03-03 15:41:35 UTC

 1317 15:41:35.690170  Chrome EC: clear events_b mask to 0x0000000000800000

 1318 15:41:35.696658  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1319 15:41:35.699988  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1320 15:41:35.706755  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e

 1321 15:41:35.713078  Chrome EC: Set WAKE mask to 0x0000000000000000

 1322 15:41:35.716365  Root Device init finished in 64 msecs

 1323 15:41:35.719613  PCI: 00:00.0 init

 1324 15:41:35.723219  CPU TDP = 6 Watts

 1325 15:41:35.723336  CPU PL1 = 7 Watts

 1326 15:41:35.726675  CPU PL2 = 12 Watts

 1327 15:41:35.730032  PCI: 00:00.0 init finished in 6 msecs

 1328 15:41:35.732785  PCI: 00:02.0 init

 1329 15:41:35.732888  GMA: Found VBT in CBFS

 1330 15:41:35.736071  GMA: Found valid VBT in CBFS

 1331 15:41:35.742686  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1332 15:41:35.749346                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1333 15:41:35.752818  PCI: 00:02.0 init finished in 18 msecs

 1334 15:41:35.756293  PCI: 00:08.0 init

 1335 15:41:35.759828  PCI: 00:08.0 init finished in 0 msecs

 1336 15:41:35.763181  PCI: 00:14.0 init

 1337 15:41:35.766566  XHCI: Updated LFPS sampling OFF time to 9 ms

 1338 15:41:35.769918  PCI: 00:14.0 init finished in 4 msecs

 1339 15:41:35.773378  PCI: 00:15.0 init

 1340 15:41:35.776695  I2C bus 0 version 0x3230302a

 1341 15:41:35.780197  DW I2C bus 0 at 0x7fd2a000 (400 KHz)

 1342 15:41:35.783554  PCI: 00:15.0 init finished in 6 msecs

 1343 15:41:35.786970  PCI: 00:15.1 init

 1344 15:41:35.790669  I2C bus 1 version 0x3230302a

 1345 15:41:35.793948  DW I2C bus 1 at 0x7fd2b000 (400 KHz)

 1346 15:41:35.796619  PCI: 00:15.1 init finished in 6 msecs

 1347 15:41:35.800737  PCI: 00:15.2 init

 1348 15:41:35.800871  I2C bus 2 version 0x3230302a

 1349 15:41:35.806742  DW I2C bus 2 at 0x7fd2c000 (400 KHz)

 1350 15:41:35.810117  PCI: 00:15.2 init finished in 6 msecs

 1351 15:41:35.810261  PCI: 00:15.3 init

 1352 15:41:35.813533  I2C bus 3 version 0x3230302a

 1353 15:41:35.816811  DW I2C bus 3 at 0x7fd2d000 (400 KHz)

 1354 15:41:35.820233  PCI: 00:15.3 init finished in 6 msecs

 1355 15:41:35.823693  PCI: 00:16.0 init

 1356 15:41:35.826972  PCI: 00:16.0 init finished in 0 msecs

 1357 15:41:35.830458  PCI: 00:19.0 init

 1358 15:41:35.833907  I2C bus 4 version 0x3230302a

 1359 15:41:35.836661  DW I2C bus 4 at 0x7fd2f000 (400 KHz)

 1360 15:41:35.840560  PCI: 00:19.0 init finished in 6 msecs

 1361 15:41:35.843314  PCI: 00:1a.0 init

 1362 15:41:35.846716  PCI: 00:1a.0 init finished in 0 msecs

 1363 15:41:35.850002  PCI: 00:1f.0 init

 1364 15:41:35.853319  IOAPIC: Initializing IOAPIC at 0xfec00000

 1365 15:41:35.856683  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1366 15:41:35.860076  IOAPIC: ID = 0x02

 1367 15:41:35.863307  IOAPIC: Dumping registers

 1368 15:41:35.863458    reg 0x0000: 0x02000000

 1369 15:41:35.866528    reg 0x0001: 0x00770020

 1370 15:41:35.869868    reg 0x0002: 0x00000000

 1371 15:41:35.873207  PCI: 00:1f.0 init finished in 21 msecs

 1372 15:41:35.876497  PCI: 00:1f.2 init

 1373 15:41:35.876596  Disabling ACPI via APMC.

 1374 15:41:35.882756  APMC done.

 1375 15:41:35.886079  PCI: 00:1f.2 init finished in 6 msecs

 1376 15:41:35.896927  PNP: 0c09.0 init

 1377 15:41:35.907538  Google Chrome EC uptime: 6.604 seconds

 1378 15:41:35.910943  Google Chrome AP resets since EC boot: 0

 1379 15:41:35.914308  Google Chrome most recent AP reset causes:

 1380 15:41:35.921042  Google Chrome EC reset flags at last EC boot: reset-pin

 1381 15:41:35.924320  PNP: 0c09.0 init finished in 23 msecs

 1382 15:41:35.927748  Devices initialized

 1383 15:41:35.927852  Show all devs... After init.

 1384 15:41:35.931078  Root Device: enabled 1

 1385 15:41:35.934622  CPU_CLUSTER: 0: enabled 1

 1386 15:41:35.937961  DOMAIN: 0000: enabled 1

 1387 15:41:35.938074  PCI: 00:00.0: enabled 1

 1388 15:41:35.941206  PCI: 00:02.0: enabled 1

 1389 15:41:35.944457  PCI: 00:04.0: enabled 1

 1390 15:41:35.947944  PCI: 00:05.0: enabled 1

 1391 15:41:35.948044  PCI: 00:09.0: enabled 0

 1392 15:41:35.951280  PCI: 00:12.6: enabled 0

 1393 15:41:35.953957  PCI: 00:14.0: enabled 1

 1394 15:41:35.957307  PCI: 00:14.1: enabled 0

 1395 15:41:35.957414  PCI: 00:14.2: enabled 0

 1396 15:41:35.960796  PCI: 00:14.3: enabled 1

 1397 15:41:35.964347  PCI: 00:14.5: enabled 1

 1398 15:41:35.964445  PCI: 00:15.0: enabled 1

 1399 15:41:35.967539  PCI: 00:15.1: enabled 1

 1400 15:41:35.971004  PCI: 00:15.2: enabled 1

 1401 15:41:35.974276  PCI: 00:15.3: enabled 1

 1402 15:41:35.974384  PCI: 00:16.0: enabled 1

 1403 15:41:35.977338  PCI: 00:16.1: enabled 0

 1404 15:41:35.980831  PCI: 00:16.4: enabled 0

 1405 15:41:35.984195  PCI: 00:16.5: enabled 0

 1406 15:41:35.984293  PCI: 00:17.0: enabled 0

 1407 15:41:35.987715  PCI: 00:19.0: enabled 1

 1408 15:41:35.990882  PCI: 00:19.1: enabled 0

 1409 15:41:35.994321  PCI: 00:19.2: enabled 1

 1410 15:41:35.994457  PCI: 00:1a.0: enabled 1

 1411 15:41:35.997565  PCI: 00:1c.0: enabled 0

 1412 15:41:36.000612  PCI: 00:1c.1: enabled 0

 1413 15:41:36.000708  PCI: 00:1c.2: enabled 0

 1414 15:41:36.004103  PCI: 00:1c.3: enabled 0

 1415 15:41:36.007364  PCI: 00:1c.4: enabled 0

 1416 15:41:36.010648  PCI: 00:1c.5: enabled 0

 1417 15:41:36.010758  PCI: 00:1c.6: enabled 0

 1418 15:41:36.014846  PCI: 00:1c.7: enabled 1

 1419 15:41:36.018300  PCI: 00:1e.0: enabled 0

 1420 15:41:36.018416  PCI: 00:1e.1: enabled 0

 1421 15:41:36.022210  PCI: 00:1e.2: enabled 1

 1422 15:41:36.026156  PCI: 00:1e.3: enabled 0

 1423 15:41:36.026269  PCI: 00:1f.0: enabled 1

 1424 15:41:36.029572  PCI: 00:1f.1: enabled 0

 1425 15:41:36.032923  PCI: 00:1f.2: enabled 1

 1426 15:41:36.033035  PCI: 00:1f.3: enabled 1

 1427 15:41:36.036367  PCI: 00:1f.4: enabled 0

 1428 15:41:36.039151  PCI: 00:1f.5: enabled 1

 1429 15:41:36.042645  PCI: 00:1f.7: enabled 0

 1430 15:41:36.042761  GENERIC: 0.0: enabled 1

 1431 15:41:36.045966  GENERIC: 0.0: enabled 1

 1432 15:41:36.049573  USB0 port 0: enabled 1

 1433 15:41:36.049677  GENERIC: 0.0: enabled 1

 1434 15:41:36.052305  I2C: 00:2c: enabled 1

 1435 15:41:36.055858  I2C: 00:15: enabled 1

 1436 15:41:36.059394  GENERIC: 0.0: enabled 0

 1437 15:41:36.059493  I2C: 00:15: enabled 1

 1438 15:41:36.062132  I2C: 00:10: enabled 0

 1439 15:41:36.065617  I2C: 00:10: enabled 0

 1440 15:41:36.065721  I2C: 00:2c: enabled 1

 1441 15:41:36.069003  I2C: 00:40: enabled 1

 1442 15:41:36.072309  I2C: 00:10: enabled 1

 1443 15:41:36.072430  I2C: 00:39: enabled 1

 1444 15:41:36.075787  I2C: 00:36: enabled 1

 1445 15:41:36.079009  I2C: 00:10: enabled 0

 1446 15:41:36.079135  I2C: 00:0c: enabled 1

 1447 15:41:36.082428  I2C: 00:50: enabled 1

 1448 15:41:36.085737  I2C: 00:1a: enabled 1

 1449 15:41:36.085848  I2C: 00:1a: enabled 0

 1450 15:41:36.089137  I2C: 00:1a: enabled 0

 1451 15:41:36.092347  I2C: 00:28: enabled 1

 1452 15:41:36.092447  I2C: 00:29: enabled 1

 1453 15:41:36.095777  PCI: 00:00.0: enabled 1

 1454 15:41:36.098601  SPI: 00: enabled 1

 1455 15:41:36.098699  PNP: 0c09.0: enabled 1

 1456 15:41:36.102375  GENERIC: 0.0: enabled 0

 1457 15:41:36.105160  USB2 port 0: enabled 1

 1458 15:41:36.108636  USB2 port 1: enabled 1

 1459 15:41:36.108743  USB2 port 2: enabled 1

 1460 15:41:36.111919  USB2 port 3: enabled 1

 1461 15:41:36.115258  USB2 port 4: enabled 0

 1462 15:41:36.115352  USB2 port 5: enabled 1

 1463 15:41:36.118770  USB2 port 6: enabled 0

 1464 15:41:36.121990  USB2 port 7: enabled 1

 1465 15:41:36.122089  USB3 port 0: enabled 1

 1466 15:41:36.125380  USB3 port 1: enabled 1

 1467 15:41:36.128704  USB3 port 2: enabled 1

 1468 15:41:36.131957  USB3 port 3: enabled 1

 1469 15:41:36.132053  APIC: 00: enabled 1

 1470 15:41:36.135247  APIC: 02: enabled 1

 1471 15:41:36.135344  PCI: 00:08.0: enabled 1

 1472 15:41:36.142224  BS: BS_DEV_INIT run times (exec / console): 30 / 464 ms

 1473 15:41:36.148609  ELOG: Event(92) added with size 9 at 2023-03-03 15:41:36 UTC

 1474 15:41:36.155360  ELOG: Event(93) added with size 9 at 2023-03-03 15:41:36 UTC

 1475 15:41:36.162035  ELOG: Event(9E) added with size 10 at 2023-03-03 15:41:36 UTC

 1476 15:41:36.168805  ELOG: Event(9F) added with size 14 at 2023-03-03 15:41:36 UTC

 1477 15:41:36.172049  BS: BS_DEV_INIT exit times (exec / console): 1 / 24 ms

 1478 15:41:36.178687  ELOG: Event(A1) added with size 10 at 2023-03-03 15:41:36 UTC

 1479 15:41:36.188191  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1480 15:41:36.192229  ELOG: Event(A0) added with size 9 at 2023-03-03 15:41:36 UTC

 1481 15:41:36.198741  elog_add_boot_reason: Logged dev mode boot

 1482 15:41:36.202128  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1483 15:41:36.205383  Finalize devices...

 1484 15:41:36.208074  Devices finalized

 1485 15:41:36.211457  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1486 15:41:36.218355  FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)

 1487 15:41:36.225154  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1488 15:41:36.227860  ME: HFSTS1                  : 0x80030045

 1489 15:41:36.231233  ME: HFSTS2                  : 0x30280136

 1490 15:41:36.234638  ME: HFSTS3                  : 0x00000050

 1491 15:41:36.241439  ME: HFSTS4                  : 0x00004000

 1492 15:41:36.244847  ME: HFSTS5                  : 0x00000000

 1493 15:41:36.248283  ME: HFSTS6                  : 0x40400006

 1494 15:41:36.251688  ME: Manufacturing Mode      : NO

 1495 15:41:36.254367  ME: FW Partition Table      : OK

 1496 15:41:36.257776  ME: Bringup Loader Failure  : NO

 1497 15:41:36.261167  ME: Firmware Init Complete  : NO

 1498 15:41:36.264641  ME: Boot Options Present    : NO

 1499 15:41:36.268011  ME: Update In Progress      : NO

 1500 15:41:36.271312  ME: D0i3 Support            : YES

 1501 15:41:36.274692  ME: Low Power State Enabled : NO

 1502 15:41:36.277979  ME: CPU Replaced            : YES

 1503 15:41:36.281418  ME: CPU Replacement Valid   : YES

 1504 15:41:36.284294  ME: Current Working State   : 5

 1505 15:41:36.287615  ME: Current Operation State : 1

 1506 15:41:36.291138  ME: Current Operation Mode  : 3

 1507 15:41:36.294495  ME: Error Code              : 0

 1508 15:41:36.297771  ME: CPU Debug Disabled      : YES

 1509 15:41:36.301228  ME: TXT Support             : NO

 1510 15:41:36.307563  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms

 1511 15:41:36.310775  CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2

 1512 15:41:36.318117  ACPI: Writing ACPI tables at 76b27000.

 1513 15:41:36.318248  ACPI:    * FACS

 1514 15:41:36.321030  ACPI:    * DSDT

 1515 15:41:36.324502  Ramoops buffer: 0x100000@0x76a26000.

 1516 15:41:36.327896  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1517 15:41:36.334323  FMAP: area RW_VPD found @ bfc000 (8192 bytes)

 1518 15:41:36.337605  Google Chrome EC: version:

 1519 15:41:36.341033  	ro: magolor_1.1.9999-103b6f9

 1520 15:41:36.341139  	rw: magolor_1.1.9999-103b6f9

 1521 15:41:36.344377    running image: 1

 1522 15:41:36.350969  PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000

 1523 15:41:36.354403  ACPI:    * FADT

 1524 15:41:36.354524  SCI is IRQ9

 1525 15:41:36.357883  ACPI: added table 1/32, length now 40

 1526 15:41:36.361141  ACPI:     * SSDT

 1527 15:41:36.364587  Found 1 CPU(s) with 2 core(s) each.

 1528 15:41:36.367961  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1529 15:41:36.374744  \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h

 1530 15:41:36.377962  Could not locate 'wifi_sar' in VPD.

 1531 15:41:36.381291  Checking CBFS for default SAR values

 1532 15:41:36.387533  wifi_sar_defaults.hex has bad len in CBFS

 1533 15:41:36.390763  failed from getting SAR limits!

 1534 15:41:36.394212  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1535 15:41:36.397393  \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c

 1536 15:41:36.404203  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15

 1537 15:41:36.407524  \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15

 1538 15:41:36.414057  \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c

 1539 15:41:36.420868  \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40

 1540 15:41:36.424189  \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10

 1541 15:41:36.430872  \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39

 1542 15:41:36.437014  \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h

 1543 15:41:36.440324  \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch

 1544 15:41:36.447067  \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h

 1545 15:41:36.453821  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a

 1546 15:41:36.457166  \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28

 1547 15:41:36.463833  \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29

 1548 15:41:36.467352  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1549 15:41:37.741818  PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]

 1550 15:41:37.745672  PS2K: Passing 101 keymaps to kernel

 1551 15:41:37.749047  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1552 15:41:37.756030  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1

 1553 15:41:37.762742  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1554 15:41:37.769342  \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3

 1555 15:41:37.772833  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1556 15:41:37.779421  \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7

 1557 15:41:37.782715  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1558 15:41:37.789581  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1

 1559 15:41:37.795570  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1560 15:41:37.802886  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3

 1561 15:41:37.805601  ACPI: added table 2/32, length now 44

 1562 15:41:37.805709  ACPI:    * MCFG

 1563 15:41:37.808981  ACPI: added table 3/32, length now 48

 1564 15:41:37.812334  ACPI:    * TPM2

 1565 15:41:37.815701  TPM2 log created at 0x76a16000

 1566 15:41:37.819071  ACPI: added table 4/32, length now 52

 1567 15:41:37.819192  ACPI:    * MADT

 1568 15:41:37.822452  SCI is IRQ9

 1569 15:41:37.825862  ACPI: added table 5/32, length now 56

 1570 15:41:37.829269  current = 76b2d580

 1571 15:41:37.829374  ACPI:    * DMAR

 1572 15:41:37.832685  ACPI: added table 6/32, length now 60

 1573 15:41:37.836018  ACPI: added table 7/32, length now 64

 1574 15:41:37.839293  ACPI:    * HPET

 1575 15:41:37.842648  ACPI: added table 8/32, length now 68

 1576 15:41:37.842762  ACPI: done.

 1577 15:41:37.845385  ACPI tables: 26304 bytes.

 1578 15:41:37.849476  smbios_write_tables: 76a15000

 1579 15:41:37.852736  EC returned error result code 3

 1580 15:41:37.856287  Couldn't obtain OEM name from CBI

 1581 15:41:37.858977  Create SMBIOS type 16

 1582 15:41:37.862412  Create SMBIOS type 17

 1583 15:41:37.865735  GENERIC: 0.0 (WIFI Device)

 1584 15:41:37.865850  SMBIOS tables: 913 bytes.

 1585 15:41:37.872901  Writing table forward entry at 0x00000500

 1586 15:41:37.876178  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929

 1587 15:41:37.882875  Writing coreboot table at 0x76b4b000

 1588 15:41:37.886274   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1589 15:41:37.892257   1. 0000000000001000-000000000009ffff: RAM

 1590 15:41:37.895764   2. 00000000000a0000-00000000000fffff: RESERVED

 1591 15:41:37.899255   3. 0000000000100000-0000000076a14fff: RAM

 1592 15:41:37.905743   4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES

 1593 15:41:37.912453   5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE

 1594 15:41:37.915929   6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES

 1595 15:41:37.921984   7. 0000000077000000-000000007fbfffff: RESERVED

 1596 15:41:37.925404   8. 00000000c0000000-00000000cfffffff: RESERVED

 1597 15:41:37.932146   9. 00000000fb000000-00000000fb000fff: RESERVED

 1598 15:41:37.935676  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1599 15:41:37.942247  11. 00000000fea80000-00000000fea87fff: RESERVED

 1600 15:41:37.945619  12. 00000000fed80000-00000000fed87fff: RESERVED

 1601 15:41:37.949007  13. 00000000fed90000-00000000fed92fff: RESERVED

 1602 15:41:37.955192  14. 00000000feda0000-00000000feda1fff: RESERVED

 1603 15:41:37.958502  15. 0000000100000000-00000001803fffff: RAM

 1604 15:41:37.961808  Passing 4 GPIOs to payload:

 1605 15:41:37.968482              NAME |       PORT | POLARITY |     VALUE

 1606 15:41:37.971840               lid |  undefined |     high |      high

 1607 15:41:37.978815             power |  undefined |     high |       low

 1608 15:41:37.981552             oprom |  undefined |     high |       low

 1609 15:41:37.988689          EC in RW | 0x000000b9 |     high |       low

 1610 15:41:37.994814  Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 1789

 1611 15:41:37.998197  coreboot table: 1504 bytes.

 1612 15:41:38.001597  IMD ROOT    0. 0x76fff000 0x00001000

 1613 15:41:38.005065  IMD SMALL   1. 0x76ffe000 0x00001000

 1614 15:41:38.008339  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1615 15:41:38.011752  CONSOLE     3. 0x76c2e000 0x00020000

 1616 15:41:38.014988  FMAP        4. 0x76c2d000 0x00000578

 1617 15:41:38.018353  TIME STAMP  5. 0x76c2c000 0x00000910

 1618 15:41:38.025026  VBOOT WORK  6. 0x76c18000 0x00014000

 1619 15:41:38.028615  ROMSTG STCK 7. 0x76c17000 0x00001000

 1620 15:41:38.031896  AFTER CAR   8. 0x76c0d000 0x0000a000

 1621 15:41:38.035059  RAMSTAGE    9. 0x76ba7000 0x00066000

 1622 15:41:38.038395  REFCODE    10. 0x76b67000 0x00040000

 1623 15:41:38.041702  SMM BACKUP 11. 0x76b57000 0x00010000

 1624 15:41:38.044936  4f444749   12. 0x76b55000 0x00002000

 1625 15:41:38.048233  EXT VBT13. 0x76b53000 0x00001c43

 1626 15:41:38.051625  COREBOOT   14. 0x76b4b000 0x00008000

 1627 15:41:38.054778  ACPI       15. 0x76b27000 0x00024000

 1628 15:41:38.061646  ACPI GNVS  16. 0x76b26000 0x00001000

 1629 15:41:38.064962  RAMOOPS    17. 0x76a26000 0x00100000

 1630 15:41:38.068332  TPM2 TCGLOG18. 0x76a16000 0x00010000

 1631 15:41:38.071632  SMBIOS     19. 0x76a15000 0x00000800

 1632 15:41:38.071740  IMD small region:

 1633 15:41:38.078211    IMD ROOT    0. 0x76ffec00 0x00000400

 1634 15:41:38.081573    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1635 15:41:38.084825    VPD         2. 0x76ffeb80 0x0000004c

 1636 15:41:38.088099    POWER STATE 3. 0x76ffeb40 0x00000040

 1637 15:41:38.091514    ROMSTAGE    4. 0x76ffeb20 0x00000004

 1638 15:41:38.098189    MEM INFO    5. 0x76ffe940 0x000001e0

 1639 15:41:38.100941  BS: BS_WRITE_TABLES run times (exec / console): 1273 / 517 ms

 1640 15:41:38.104314  MTRR: Physical address space:

 1641 15:41:38.110991  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1642 15:41:38.117840  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1643 15:41:38.124460  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1644 15:41:38.130749  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1645 15:41:38.137321  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1646 15:41:38.143843  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1647 15:41:38.150409  0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6

 1648 15:41:38.153856  MTRR: Fixed MSR 0x250 0x0606060606060606

 1649 15:41:38.157238  MTRR: Fixed MSR 0x258 0x0606060606060606

 1650 15:41:38.160431  MTRR: Fixed MSR 0x259 0x0000000000000000

 1651 15:41:38.163719  MTRR: Fixed MSR 0x268 0x0606060606060606

 1652 15:41:38.170546  MTRR: Fixed MSR 0x269 0x0606060606060606

 1653 15:41:38.173920  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1654 15:41:38.177276  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1655 15:41:38.180702  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1656 15:41:38.186710  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1657 15:41:38.189951  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1658 15:41:38.193370  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1659 15:41:38.196768  call enable_fixed_mtrr()

 1660 15:41:38.200171  CPU physical address size: 39 bits

 1661 15:41:38.203571  MTRR: default type WB/UC MTRR counts: 6/5.

 1662 15:41:38.206820  MTRR: UC selected as default type.

 1663 15:41:38.213360  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1664 15:41:38.220303  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1665 15:41:38.226438  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1666 15:41:38.233155  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1667 15:41:38.239861  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1668 15:41:38.239974  

 1669 15:41:38.240053  MTRR check

 1670 15:41:38.243126  Fixed MTRRs   : Enabled

 1671 15:41:38.246394  Variable MTRRs: Enabled

 1672 15:41:38.246494  

 1673 15:41:38.249808  MTRR: Fixed MSR 0x250 0x0606060606060606

 1674 15:41:38.253224  MTRR: Fixed MSR 0x258 0x0606060606060606

 1675 15:41:38.259912  MTRR: Fixed MSR 0x259 0x0000000000000000

 1676 15:41:38.263282  MTRR: Fixed MSR 0x268 0x0606060606060606

 1677 15:41:38.266576  MTRR: Fixed MSR 0x269 0x0606060606060606

 1678 15:41:38.269261  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1679 15:41:38.276451  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1680 15:41:38.279189  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1681 15:41:38.282606  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1682 15:41:38.285905  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1683 15:41:38.292685  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1684 15:41:38.296022  BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms

 1685 15:41:38.299409  call enable_fixed_mtrr()

 1686 15:41:38.303381  Checking cr50 for pending updates

 1687 15:41:38.306655  CPU physical address size: 39 bits

 1688 15:41:38.310655  Reading cr50 TPM mode

 1689 15:41:38.320067  BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms

 1690 15:41:38.327508  CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38

 1691 15:41:38.330913  Checking segment from ROM address 0xfff9d5b8

 1692 15:41:38.337483  Checking segment from ROM address 0xfff9d5d4

 1693 15:41:38.340696  Loading segment from ROM address 0xfff9d5b8

 1694 15:41:38.344429    code (compression=0)

 1695 15:41:38.351109    New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00

 1696 15:41:38.361142  Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00

 1697 15:41:38.363822  it's not compressed!

 1698 15:41:38.489206  [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0

 1699 15:41:38.495706  Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370

 1700 15:41:38.503296  Loading segment from ROM address 0xfff9d5d4

 1701 15:41:38.506655    Entry Point 0x30000000

 1702 15:41:38.506764  Loaded segments

 1703 15:41:38.513439  BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms

 1704 15:41:38.529192  Finalizing chipset.

 1705 15:41:38.532621  Finalizing SMM.

 1706 15:41:38.532745  APMC done.

 1707 15:41:38.539522  BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms

 1708 15:41:38.542194  mp_park_aps done after 0 msecs.

 1709 15:41:38.545627  Jumping to boot code at 0x30000000(0x76b4b000)

 1710 15:41:38.556068  CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes

 1711 15:41:38.556207  

 1712 15:41:38.556306  

 1713 15:41:38.556381  

 1714 15:41:38.558831  Starting depthcharge on Magolor...

 1715 15:41:38.558918  

 1716 15:41:38.559303  end: 2.2.3 depthcharge-start (duration 00:00:07) [common]
 1717 15:41:38.559423  start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
 1718 15:41:38.559532  Setting prompt string to ['dedede:']
 1719 15:41:38.559622  bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:43)
 1720 15:41:38.568720  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1721 15:41:38.568830  

 1722 15:41:38.575553  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1723 15:41:38.575653  

 1724 15:41:38.578914  fw_config match found: AUDIO_AMP=UNPROVISIONED

 1725 15:41:38.579024  

 1726 15:41:38.582173  Wipe memory regions:

 1727 15:41:38.582277  

 1728 15:41:38.585552  	[0x00000000001000, 0x000000000a0000)

 1729 15:41:38.585640  

 1730 15:41:38.588867  	[0x00000000100000, 0x00000030000000)

 1731 15:41:38.717820  

 1732 15:41:38.721145  	[0x00000031062170, 0x00000076a15000)

 1733 15:41:38.890155  

 1734 15:41:38.892920  	[0x00000100000000, 0x00000180400000)

 1735 15:41:39.955163  

 1736 15:41:39.955346  R8152: Initializing

 1737 15:41:39.955434  

 1738 15:41:39.958548  Version 9 (ocp_data = 6010)

 1739 15:41:39.958640  

 1740 15:41:39.962029  R8152: Done initializing

 1741 15:41:39.962122  

 1742 15:41:39.965460  Adding net device

 1743 15:41:39.965567  

 1744 15:41:39.968160  [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48

 1745 15:41:39.968268  

 1746 15:41:39.971578  

 1747 15:41:39.971681  

 1748 15:41:39.971980  Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1750 15:41:40.072757  dedede: tftpboot 192.168.201.1 9406184/tftp-deploy-9wtickmb/kernel/bzImage 9406184/tftp-deploy-9wtickmb/kernel/cmdline 9406184/tftp-deploy-9wtickmb/ramdisk/ramdisk.cpio.gz

 1751 15:41:40.072938  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1752 15:41:40.073048  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
 1753 15:41:40.076942  tftpboot 192.168.201.1 9406184/tftp-deploy-9wtickmb/kernel/bzImy-9wtickmb/kernel/cmdline 9406184/tftp-deploy-9wtickmb/ramdisk/ramdisk.cpio.gz

 1754 15:41:40.077044  

 1755 15:41:40.077121  Waiting for link

 1756 15:41:40.279320  

 1757 15:41:40.279485  done.

 1758 15:41:40.279576  

 1759 15:41:40.279665  MAC: 00:e0:4c:78:86:ac

 1760 15:41:40.279740  

 1761 15:41:40.282002  Sending DHCP discover... done.

 1762 15:41:40.282091  

 1763 15:41:40.285376  Waiting for reply... done.

 1764 15:41:40.285468  

 1765 15:41:40.288756  Sending DHCP request... done.

 1766 15:41:40.288862  

 1767 15:41:40.292165  Waiting for reply... done.

 1768 15:41:40.295533  

 1769 15:41:40.295625  My ip is 192.168.201.16

 1770 15:41:40.295701  

 1771 15:41:40.298948  The DHCP server ip is 192.168.201.1

 1772 15:41:40.299043  

 1773 15:41:40.305536  TFTP server IP predefined by user: 192.168.201.1

 1774 15:41:40.305641  

 1775 15:41:40.312212  Bootfile predefined by user: 9406184/tftp-deploy-9wtickmb/kernel/bzImage

 1776 15:41:40.312305  

 1777 15:41:40.315656  Sending tftp read request... done.

 1778 15:41:40.315758  

 1779 15:41:40.318278  Waiting for the transfer... 

 1780 15:41:40.318372  

 1781 15:41:40.587198  00000000 ################################################################

 1782 15:41:40.587352  

 1783 15:41:40.856098  00080000 ################################################################

 1784 15:41:40.856258  

 1785 15:41:41.121394  00100000 ################################################################

 1786 15:41:41.121555  

 1787 15:41:41.386501  00180000 ################################################################

 1788 15:41:41.386661  

 1789 15:41:41.645600  00200000 ################################################################

 1790 15:41:41.645757  

 1791 15:41:41.909578  00280000 ################################################################

 1792 15:41:41.909739  

 1793 15:41:42.178648  00300000 ################################################################

 1794 15:41:42.178801  

 1795 15:41:42.446305  00380000 ################################################################

 1796 15:41:42.446467  

 1797 15:41:42.721760  00400000 ################################################################

 1798 15:41:42.721914  

 1799 15:41:42.996650  00480000 ################################################################

 1800 15:41:42.996827  

 1801 15:41:43.266786  00500000 ################################################################

 1802 15:41:43.266944  

 1803 15:41:43.548596  00580000 ################################################################

 1804 15:41:43.548756  

 1805 15:41:43.829658  00600000 ################################################################

 1806 15:41:43.829813  

 1807 15:41:44.113870  00680000 ################################################################

 1808 15:41:44.114033  

 1809 15:41:44.388914  00700000 ################################################################

 1810 15:41:44.389085  

 1811 15:41:44.662585  00780000 ################################################################

 1812 15:41:44.662758  

 1813 15:41:44.924247  00800000 ################################################################

 1814 15:41:44.924405  

 1815 15:41:45.185587  00880000 ################################################################

 1816 15:41:45.185738  

 1817 15:41:45.318791  00900000 ################################## done.

 1818 15:41:45.318942  

 1819 15:41:45.322212  The bootfile was 9707520 bytes long.

 1820 15:41:45.322312  

 1821 15:41:45.325688  Sending tftp read request... done.

 1822 15:41:45.325781  

 1823 15:41:45.329136  Waiting for the transfer... 

 1824 15:41:45.329241  

 1825 15:41:45.588443  00000000 ################################################################

 1826 15:41:45.588596  

 1827 15:41:45.851920  00080000 ################################################################

 1828 15:41:45.852088  

 1829 15:41:46.111114  00100000 ################################################################

 1830 15:41:46.111338  

 1831 15:41:46.369298  00180000 ################################################################

 1832 15:41:46.369471  

 1833 15:41:46.624484  00200000 ################################################################

 1834 15:41:46.624661  

 1835 15:41:46.885696  00280000 ################################################################

 1836 15:41:46.885873  

 1837 15:41:47.174213  00300000 ################################################################

 1838 15:41:47.174387  

 1839 15:41:47.460953  00380000 ################################################################

 1840 15:41:47.461120  

 1841 15:41:47.744043  00400000 ################################################################

 1842 15:41:47.744219  

 1843 15:41:48.021740  00480000 ################################################################

 1844 15:41:48.021892  

 1845 15:41:48.295657  00500000 ################################################################

 1846 15:41:48.295809  

 1847 15:41:48.576017  00580000 ################################################################

 1848 15:41:48.576205  

 1849 15:41:48.846692  00600000 ################################################################

 1850 15:41:48.846888  

 1851 15:41:49.124755  00680000 ################################################################

 1852 15:41:49.124913  

 1853 15:41:49.409995  00700000 ################################################################

 1854 15:41:49.410196  

 1855 15:41:49.701703  00780000 ################################################################

 1856 15:41:49.701869  

 1857 15:41:49.802839  00800000 ######################## done.

 1858 15:41:49.805485  

 1859 15:41:49.808978  Sending tftp read request... done.

 1860 15:41:49.809117  

 1861 15:41:49.809200  Waiting for the transfer... 

 1862 15:41:49.809273  

 1863 15:41:49.812378  00000000 # done.

 1864 15:41:49.812507  

 1865 15:41:49.822567  Command line loaded dynamically from TFTP file: 9406184/tftp-deploy-9wtickmb/kernel/cmdline

 1866 15:41:49.822726  

 1867 15:41:49.832618  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 1868 15:41:50.361123  

 1869 15:41:50.364533  ec_init: CrosEC protocol v3 supported (256, 256)

 1870 15:41:50.390789  

 1871 15:41:50.394146  Shutting down all USB controllers.

 1872 15:41:50.394295  

 1873 15:41:50.394377  Removing current net device

 1874 15:41:50.394459  

 1875 15:41:50.397564  Finalizing coreboot

 1876 15:41:50.397696  

 1877 15:41:50.403765  Exiting depthcharge with code 4 at timestamp: 19925273

 1878 15:41:50.403915  

 1879 15:41:50.403994  

 1880 15:41:50.404065  Starting kernel ...

 1881 15:41:50.404133  

 1882 15:41:50.404199  

 1883 15:41:50.404624  end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
 1884 15:41:50.404743  start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
 1885 15:41:50.404832  Setting prompt string to ['Linux version [0-9]']
 1886 15:41:50.404914  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1887 15:41:50.404994  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 1889 15:46:21.404997  end: 2.2.5 auto-login-action (duration 00:04:31) [common]
 1891 15:46:21.405240  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
 1893 15:46:21.405415  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 1896 15:46:21.405704  end: 2 depthcharge-action (duration 00:05:00) [common]
 1898 15:46:21.405961  Cleaning after the job
 1899 15:46:21.406053  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406184/tftp-deploy-9wtickmb/ramdisk
 1900 15:46:21.406770  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406184/tftp-deploy-9wtickmb/kernel
 1901 15:46:21.407590  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406184/tftp-deploy-9wtickmb/modules
 1902 15:46:21.407816  start: 5.1 power-off (timeout 00:00:30) [common]
 1903 15:46:21.407997  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=off'
 1904 15:46:23.590928  >> Command sent successfully.

 1905 15:46:23.593338  Returned 0 in 2 seconds
 1906 15:46:23.694131  end: 5.1 power-off (duration 00:00:02) [common]
 1908 15:46:23.694492  start: 5.2 read-feedback (timeout 00:09:58) [common]
 1909 15:46:23.694811  Listened to connection for namespace 'common' for up to 1s
 1911 15:46:23.695229  Listened to connection for namespace 'common' for up to 1s
 1912 15:46:24.699189  Finalising connection for namespace 'common'
 1913 15:46:24.699368  Disconnecting from shell: Finalise
 1914 15:46:24.699460  
 1915 15:46:24.800195  end: 5.2 read-feedback (duration 00:00:01) [common]
 1916 15:46:24.800361  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9406184
 1917 15:46:24.805847  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9406184
 1918 15:46:24.805995  JobError: Your job cannot terminate cleanly.