Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 15:46:21.579167 lava-dispatcher, installed at version: 2022.11
2 15:46:21.579345 start: 0 validate
3 15:46:21.579475 Start time: 2023-03-03 15:46:21.579468+00:00 (UTC)
4 15:46:21.579601 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:46:21.579733 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230224.0%2Fx86%2Frootfs.cpio.gz exists
6 15:46:21.582737 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:46:21.582857 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:46:21.862018 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:46:21.862670 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:46:22.148660 validate duration: 0.57
12 15:46:22.148953 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:46:22.149102 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:46:22.149291 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:46:22.149449 Not decompressing ramdisk as can be used compressed.
16 15:46:22.149701 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230224.0/x86/rootfs.cpio.gz
17 15:46:22.149776 saving as /var/lib/lava/dispatcher/tmp/9406192/tftp-deploy-m827jeoj/ramdisk/rootfs.cpio.gz
18 15:46:22.149842 total size: 8423893 (8MB)
19 15:46:22.437564 progress 0% (0MB)
20 15:46:22.450760 progress 5% (0MB)
21 15:46:22.464297 progress 10% (0MB)
22 15:46:22.480887 progress 15% (1MB)
23 15:46:22.493934 progress 20% (1MB)
24 15:46:22.507031 progress 25% (2MB)
25 15:46:22.517641 progress 30% (2MB)
26 15:46:22.526837 progress 35% (2MB)
27 15:46:22.537977 progress 40% (3MB)
28 15:46:22.548203 progress 45% (3MB)
29 15:46:22.559055 progress 50% (4MB)
30 15:46:22.571367 progress 55% (4MB)
31 15:46:22.581368 progress 60% (4MB)
32 15:46:22.592205 progress 65% (5MB)
33 15:46:22.602147 progress 70% (5MB)
34 15:46:22.612569 progress 75% (6MB)
35 15:46:22.625085 progress 80% (6MB)
36 15:46:22.634923 progress 85% (6MB)
37 15:46:22.646018 progress 90% (7MB)
38 15:46:22.658079 progress 95% (7MB)
39 15:46:22.667344 progress 100% (8MB)
40 15:46:22.667522 8MB downloaded in 0.52s (15.52MB/s)
41 15:46:22.667682 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:46:22.667969 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:46:22.668058 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:46:22.668146 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:46:22.668248 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:46:22.668317 saving as /var/lib/lava/dispatcher/tmp/9406192/tftp-deploy-m827jeoj/kernel/bzImage
48 15:46:22.668378 total size: 9707520 (9MB)
49 15:46:22.668439 No compression specified
50 15:46:22.676285 progress 0% (0MB)
51 15:46:22.695717 progress 5% (0MB)
52 15:46:22.708122 progress 10% (0MB)
53 15:46:22.723798 progress 15% (1MB)
54 15:46:22.737906 progress 20% (1MB)
55 15:46:22.752956 progress 25% (2MB)
56 15:46:22.764477 progress 30% (2MB)
57 15:46:22.779454 progress 35% (3MB)
58 15:46:22.795168 progress 40% (3MB)
59 15:46:22.812977 progress 45% (4MB)
60 15:46:22.828886 progress 50% (4MB)
61 15:46:22.847049 progress 55% (5MB)
62 15:46:22.866188 progress 60% (5MB)
63 15:46:22.885297 progress 65% (6MB)
64 15:46:22.904095 progress 70% (6MB)
65 15:46:22.923211 progress 75% (6MB)
66 15:46:22.939300 progress 80% (7MB)
67 15:46:22.958941 progress 85% (7MB)
68 15:46:22.978472 progress 90% (8MB)
69 15:46:22.998561 progress 95% (8MB)
70 15:46:23.013365 progress 100% (9MB)
71 15:46:23.013873 9MB downloaded in 0.35s (26.80MB/s)
72 15:46:23.014264 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:46:23.014928 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:46:23.015183 start: 1.3 download-retry (timeout 00:09:59) [common]
76 15:46:23.015427 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 15:46:23.015724 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:46:23.015921 saving as /var/lib/lava/dispatcher/tmp/9406192/tftp-deploy-m827jeoj/modules/modules.tar
79 15:46:23.016096 total size: 64716 (0MB)
80 15:46:23.016266 Using unxz to decompress xz
81 15:46:23.029983 progress 50% (0MB)
82 15:46:23.032781 progress 100% (0MB)
83 15:46:23.042529 0MB downloaded in 0.03s (2.34MB/s)
84 15:46:23.043139 end: 1.3.1 http-download (duration 00:00:00) [common]
86 15:46:23.043903 end: 1.3 download-retry (duration 00:00:00) [common]
87 15:46:23.044185 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 15:46:23.044459 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 15:46:23.044703 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 15:46:23.044954 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 15:46:23.045389 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2
92 15:46:23.045696 makedir: /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin
93 15:46:23.045934 makedir: /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/tests
94 15:46:23.046158 makedir: /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/results
95 15:46:23.046438 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-add-keys
96 15:46:23.046792 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-add-sources
97 15:46:23.047127 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-background-process-start
98 15:46:23.047445 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-background-process-stop
99 15:46:23.047790 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-common-functions
100 15:46:23.048104 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-echo-ipv4
101 15:46:23.048420 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-install-packages
102 15:46:23.048733 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-installed-packages
103 15:46:23.049035 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-os-build
104 15:46:23.049340 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-probe-channel
105 15:46:23.049655 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-probe-ip
106 15:46:23.049957 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-target-ip
107 15:46:23.050260 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-target-mac
108 15:46:23.050564 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-target-storage
109 15:46:23.050870 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-test-case
110 15:46:23.051173 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-test-event
111 15:46:23.051488 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-test-feedback
112 15:46:23.051818 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-test-raise
113 15:46:23.052140 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-test-reference
114 15:46:23.052449 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-test-runner
115 15:46:23.052750 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-test-set
116 15:46:23.053053 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-test-shell
117 15:46:23.053362 Updating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-install-packages (oe)
118 15:46:23.053678 Updating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/bin/lava-installed-packages (oe)
119 15:46:23.053951 Creating /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/environment
120 15:46:23.054198 LAVA metadata
121 15:46:23.054392 - LAVA_JOB_ID=9406192
122 15:46:23.054579 - LAVA_DISPATCHER_IP=192.168.201.1
123 15:46:23.054865 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 15:46:23.055053 skipped lava-vland-overlay
125 15:46:23.055271 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 15:46:23.055512 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 15:46:23.055701 skipped lava-multinode-overlay
128 15:46:23.055920 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 15:46:23.056154 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 15:46:23.056365 Loading test definitions
131 15:46:23.056628 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 15:46:23.056835 Using /lava-9406192 at stage 0
133 15:46:23.057548 uuid=9406192_1.4.2.3.1 testdef=None
134 15:46:23.057801 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 15:46:23.058063 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 15:46:23.059404 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 15:46:23.060068 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 15:46:23.061637 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 15:46:23.062302 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 15:46:23.063841 runner path: /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/0/tests/0_dmesg test_uuid 9406192_1.4.2.3.1
143 15:46:23.064201 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 15:46:23.064718 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 15:46:23.064883 Using /lava-9406192 at stage 1
147 15:46:23.065425 uuid=9406192_1.4.2.3.5 testdef=None
148 15:46:23.065626 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 15:46:23.065823 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 15:46:23.066814 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 15:46:23.067314 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 15:46:23.068598 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 15:46:23.069136 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 15:46:23.070193 runner path: /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/1/tests/1_bootrr test_uuid 9406192_1.4.2.3.5
157 15:46:23.070461 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 15:46:23.070855 Creating lava-test-runner.conf files
160 15:46:23.070981 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/0 for stage 0
161 15:46:23.071137 - 0_dmesg
162 15:46:23.071277 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406192/lava-overlay-s8639yk2/lava-9406192/1 for stage 1
163 15:46:23.071433 - 1_bootrr
164 15:46:23.071605 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 15:46:23.071778 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 15:46:23.081258 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 15:46:23.081407 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 15:46:23.081537 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 15:46:23.081661 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 15:46:23.081784 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 15:46:23.267787 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 15:46:23.268135 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 15:46:23.268254 extracting modules file /var/lib/lava/dispatcher/tmp/9406192/tftp-deploy-m827jeoj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406192/extract-overlay-ramdisk-50d3ybkx/ramdisk
174 15:46:23.272363 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 15:46:23.272479 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 15:46:23.272564 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9406192/compress-overlay-anvv7vas/overlay-1.4.2.4.tar.gz to ramdisk
177 15:46:23.272639 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9406192/compress-overlay-anvv7vas/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9406192/extract-overlay-ramdisk-50d3ybkx/ramdisk
178 15:46:23.276401 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 15:46:23.276512 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 15:46:23.276603 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 15:46:23.276695 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 15:46:23.276773 Building ramdisk /var/lib/lava/dispatcher/tmp/9406192/extract-overlay-ramdisk-50d3ybkx/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9406192/extract-overlay-ramdisk-50d3ybkx/ramdisk
183 15:46:23.345958 >> 48350 blocks
184 15:46:24.100558 rename /var/lib/lava/dispatcher/tmp/9406192/extract-overlay-ramdisk-50d3ybkx/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9406192/tftp-deploy-m827jeoj/ramdisk/ramdisk.cpio.gz
185 15:46:24.100981 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 15:46:24.101107 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 15:46:24.101211 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 15:46:24.101311 No mkimage arch provided, not using FIT.
189 15:46:24.101406 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 15:46:24.101494 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 15:46:24.101598 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 15:46:24.101698 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 15:46:24.101778 No LXC device requested
194 15:46:24.101862 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 15:46:24.101948 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 15:46:24.102045 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 15:46:24.102165 Checking files for TFTP limit of 4294967296 bytes.
198 15:46:24.102586 end: 1 tftp-deploy (duration 00:00:02) [common]
199 15:46:24.102702 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 15:46:24.102802 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 15:46:24.102940 substitutions:
202 15:46:24.103008 - {DTB}: None
203 15:46:24.103075 - {INITRD}: 9406192/tftp-deploy-m827jeoj/ramdisk/ramdisk.cpio.gz
204 15:46:24.103137 - {KERNEL}: 9406192/tftp-deploy-m827jeoj/kernel/bzImage
205 15:46:24.103198 - {LAVA_MAC}: None
206 15:46:24.103262 - {PRESEED_CONFIG}: None
207 15:46:24.103321 - {PRESEED_LOCAL}: None
208 15:46:24.103378 - {RAMDISK}: 9406192/tftp-deploy-m827jeoj/ramdisk/ramdisk.cpio.gz
209 15:46:24.103437 - {ROOT_PART}: None
210 15:46:24.103495 - {ROOT}: None
211 15:46:24.103552 - {SERVER_IP}: 192.168.201.1
212 15:46:24.103629 - {TEE}: None
213 15:46:24.103741 Parsed boot commands:
214 15:46:24.103838 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 15:46:24.104001 Parsed boot commands: tftpboot 192.168.201.1 9406192/tftp-deploy-m827jeoj/kernel/bzImage 9406192/tftp-deploy-m827jeoj/kernel/cmdline 9406192/tftp-deploy-m827jeoj/ramdisk/ramdisk.cpio.gz
216 15:46:24.104096 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 15:46:24.104191 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 15:46:24.104288 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 15:46:24.104378 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 15:46:24.104455 Not connected, no need to disconnect.
221 15:46:24.104534 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 15:46:24.104620 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 15:46:24.104689 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
224 15:46:24.107895 Setting prompt string to ['lava-test: # ']
225 15:46:24.108243 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 15:46:24.108375 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 15:46:24.108496 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 15:46:24.108619 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 15:46:24.109124 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
230 15:46:33.442634 >> Command sent successfully.
231 15:46:33.444804 Returned 0 in 9 seconds
232 15:46:33.545602 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 15:46:33.545927 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 15:46:33.546033 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 15:46:33.546120 Setting prompt string to 'Starting depthcharge on Voema...'
237 15:46:33.546189 Changing prompt to 'Starting depthcharge on Voema...'
238 15:46:33.546259 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 15:46:33.546540 [Enter `^Ec?' for help]
240 15:46:33.546628
241 15:46:33.546710
242 15:46:33.546775 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 15:46:33.546842 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 15:46:33.546905 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 15:46:33.546965 CPU: AES supported, TXT NOT supported, VT supported
246 15:46:33.547025 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 15:46:33.547087 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 15:46:33.547145 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 15:46:33.547203 VBOOT: Loading verstage.
250 15:46:33.547261 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 15:46:33.547319 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 15:46:33.547377 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 15:46:33.547434 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 15:46:33.547492 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 15:46:33.547550
256 15:46:33.547606
257 15:46:33.547663 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 15:46:33.547759 Probing TPM: . done!
259 15:46:33.547817 TPM ready after 0 ms
260 15:46:33.547874 Connected to device vid:did:rid of 1ae0:0028:00
261 15:46:33.547933 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
262 15:46:33.547993 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 15:46:33.548052 Initialized TPM device CR50 revision 0
264 15:46:33.548108 tlcl_send_startup: Startup return code is 0
265 15:46:33.548165 TPM: setup succeeded
266 15:46:33.548223 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 15:46:33.548298 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 15:46:33.548358 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 15:46:33.548416 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 15:46:33.548497 Chrome EC: UHEPI supported
271 15:46:33.548558 Phase 1
272 15:46:33.548616 FMAP: area GBB found @ 1805000 (458752 bytes)
273 15:46:33.548674 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 15:46:33.548732 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 15:46:33.548790 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 15:46:33.548847 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 15:46:33.548904 Recovery requested (1009000e)
278 15:46:33.548961 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 15:46:33.549019 tlcl_extend: response is 0
280 15:46:33.549075 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 15:46:33.549132 tlcl_extend: response is 0
282 15:46:33.549189 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 15:46:33.549246 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 15:46:33.549304 BS: verstage times (exec / console): total (unknown) / 142 ms
285 15:46:33.549361
286 15:46:33.549417
287 15:46:33.549473 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 15:46:33.549531 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 15:46:33.549588 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 15:46:33.549645 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 15:46:33.549702 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 15:46:33.549760 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 15:46:33.549818 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 15:46:33.549874 TCO_STS: 0000 0000
295 15:46:33.549931 GEN_PMCON: d0015038 00002200
296 15:46:33.549989 GBLRST_CAUSE: 00000000 00000000
297 15:46:33.550044 HPR_CAUSE0: 00000000
298 15:46:33.550101 prev_sleep_state 5
299 15:46:33.550158 Boot Count incremented to 15037
300 15:46:33.550215 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 15:46:33.550273 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 15:46:33.550330 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 15:46:33.550387 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 15:46:33.550444 Chrome EC: UHEPI supported
305 15:46:33.550501 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 15:46:33.550558 Probing TPM: done!
307 15:46:33.550615 Connected to device vid:did:rid of 1ae0:0028:00
308 15:46:33.553701 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
309 15:46:33.556856 Initialized TPM device CR50 revision 0
310 15:46:33.571830 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 15:46:33.578660 MRC: Hash idx 0x100b comparison successful.
312 15:46:33.581890 MRC cache found, size faa8
313 15:46:33.581981 bootmode is set to: 2
314 15:46:33.584876 SPD index = 2
315 15:46:33.591556 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 15:46:33.594709 SPD: module type is LPDDR4X
317 15:46:33.597879 SPD: module part number is MT53D1G64D4NW-046
318 15:46:33.604699 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
319 15:46:33.611129 SPD: device width 16 bits, bus width 16 bits
320 15:46:33.614401 SPD: module size is 2048 MB (per channel)
321 15:46:34.044998 CBMEM:
322 15:46:34.048237 IMD: root @ 0x76fff000 254 entries.
323 15:46:34.051522 IMD: root @ 0x76ffec00 62 entries.
324 15:46:34.054621 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 15:46:34.060971 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 15:46:34.064692 External stage cache:
327 15:46:34.067897 IMD: root @ 0x7b3ff000 254 entries.
328 15:46:34.071219 IMD: root @ 0x7b3fec00 62 entries.
329 15:46:34.086668 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 15:46:34.092967 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 15:46:34.099925 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 15:46:34.113592 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 15:46:34.120044 cse_lite: Skip switching to RW in the recovery path
334 15:46:34.120178 8 DIMMs found
335 15:46:34.123773 SMM Memory Map
336 15:46:34.126895 SMRAM : 0x7b000000 0x800000
337 15:46:34.129969 Subregion 0: 0x7b000000 0x200000
338 15:46:34.133164 Subregion 1: 0x7b200000 0x200000
339 15:46:34.136987 Subregion 2: 0x7b400000 0x400000
340 15:46:34.137114 top_of_ram = 0x77000000
341 15:46:34.143440 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 15:46:34.149717 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 15:46:34.152896 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 15:46:34.159846 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 15:46:34.166129 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 15:46:34.173201 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 15:46:34.183191 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 15:46:34.190042 Processing 211 relocs. Offset value of 0x74c0b000
349 15:46:34.196298 BS: romstage times (exec / console): total (unknown) / 277 ms
350 15:46:34.202632
351 15:46:34.202762
352 15:46:34.213291 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 15:46:34.216365 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 15:46:34.222777 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 15:46:34.232421 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 15:46:34.239465 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 15:46:34.245673 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 15:46:34.288630 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 15:46:34.295489 Processing 5008 relocs. Offset value of 0x75d98000
360 15:46:34.302410 BS: postcar times (exec / console): total (unknown) / 59 ms
361 15:46:34.302501
362 15:46:34.302570
363 15:46:34.311845 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 15:46:34.311937 Normal boot
365 15:46:34.315355 FW_CONFIG value is 0x804c02
366 15:46:34.318606 PCI: 00:07.0 disabled by fw_config
367 15:46:34.321707 PCI: 00:07.1 disabled by fw_config
368 15:46:34.328769 PCI: 00:0d.2 disabled by fw_config
369 15:46:34.331955 PCI: 00:1c.7 disabled by fw_config
370 15:46:34.335105 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 15:46:34.341506 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 15:46:34.347929 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 15:46:34.351673 GENERIC: 0.0 disabled by fw_config
374 15:46:34.355018 GENERIC: 1.0 disabled by fw_config
375 15:46:34.358268 fw_config match found: DB_USB=USB3_ACTIVE
376 15:46:34.361553 fw_config match found: DB_USB=USB3_ACTIVE
377 15:46:34.367827 fw_config match found: DB_USB=USB3_ACTIVE
378 15:46:34.371024 fw_config match found: DB_USB=USB3_ACTIVE
379 15:46:34.374804 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 15:46:34.384203 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 15:46:34.391114 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 15:46:34.397396 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 15:46:34.404394 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 15:46:34.407508 microcode: Update skipped, already up-to-date
385 15:46:34.413800 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 15:46:34.442721 Detected 4 core, 8 thread CPU.
387 15:46:34.445897 Setting up SMI for CPU
388 15:46:34.449128 IED base = 0x7b400000
389 15:46:34.452337 IED size = 0x00400000
390 15:46:34.452425 Will perform SMM setup.
391 15:46:34.459389 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
392 15:46:34.465707 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 15:46:34.472025 Processing 16 relocs. Offset value of 0x00030000
394 15:46:34.475672 Attempting to start 7 APs
395 15:46:34.478830 Waiting for 10ms after sending INIT.
396 15:46:34.494542 Waiting for 1st SIPI to complete...AP: slot 6 apic_id 1.
397 15:46:34.497606 AP: slot 7 apic_id 4.
398 15:46:34.501304 AP: slot 5 apic_id 2.
399 15:46:34.501393 AP: slot 1 apic_id 3.
400 15:46:34.504551 AP: slot 2 apic_id 5.
401 15:46:34.507728 AP: slot 3 apic_id 7.
402 15:46:34.507816 AP: slot 4 apic_id 6.
403 15:46:34.511263 done.
404 15:46:34.514413 Waiting for 2nd SIPI to complete...done.
405 15:46:34.520698 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 15:46:34.527250 Processing 13 relocs. Offset value of 0x00038000
407 15:46:34.530392 Unable to locate Global NVS
408 15:46:34.537364 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 15:46:34.540430 Installing permanent SMM handler to 0x7b000000
410 15:46:34.550548 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 15:46:34.553908 Processing 794 relocs. Offset value of 0x7b010000
412 15:46:34.563939 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 15:46:34.566989 Processing 13 relocs. Offset value of 0x7b008000
414 15:46:34.573220 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 15:46:34.580298 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 15:46:34.586673 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 15:46:34.589945 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 15:46:34.596386 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 15:46:34.603394 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 15:46:34.609839 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 15:46:34.612846 Unable to locate Global NVS
422 15:46:34.619420 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 15:46:34.622590 Clearing SMI status registers
424 15:46:34.626245 SMI_STS: PM1
425 15:46:34.626360 PM1_STS: PWRBTN
426 15:46:34.633152 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 15:46:34.635819 In relocation handler: CPU 0
428 15:46:34.642425 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 15:46:34.645692 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 15:46:34.648887 Relocation complete.
431 15:46:34.655831 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
432 15:46:34.658985 In relocation handler: CPU 6
433 15:46:34.662226 New SMBASE=0x7affe800 IEDBASE=0x7b400000
434 15:46:34.665414 Relocation complete.
435 15:46:34.672265 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
436 15:46:34.675469 In relocation handler: CPU 7
437 15:46:34.678576 New SMBASE=0x7affe400 IEDBASE=0x7b400000
438 15:46:34.685020 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 15:46:34.685127 Relocation complete.
440 15:46:34.691943 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
441 15:46:34.695013 In relocation handler: CPU 2
442 15:46:34.701844 New SMBASE=0x7afff800 IEDBASE=0x7b400000
443 15:46:34.701984 Relocation complete.
444 15:46:34.708354 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 15:46:34.711660 In relocation handler: CPU 1
446 15:46:34.718527 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 15:46:34.718631 Relocation complete.
448 15:46:34.724941 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
449 15:46:34.727986 In relocation handler: CPU 5
450 15:46:34.734271 New SMBASE=0x7affec00 IEDBASE=0x7b400000
451 15:46:34.738042 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 15:46:34.741270 Relocation complete.
453 15:46:34.747932 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
454 15:46:34.751159 In relocation handler: CPU 4
455 15:46:34.754444 New SMBASE=0x7afff000 IEDBASE=0x7b400000
456 15:46:34.761051 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 15:46:34.761144 Relocation complete.
458 15:46:34.767567 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
459 15:46:34.770740 In relocation handler: CPU 3
460 15:46:34.777078 New SMBASE=0x7afff400 IEDBASE=0x7b400000
461 15:46:34.777171 Relocation complete.
462 15:46:34.780821 Initializing CPU #0
463 15:46:34.784032 CPU: vendor Intel device 806c1
464 15:46:34.787234 CPU: family 06, model 8c, stepping 01
465 15:46:34.790441 Clearing out pending MCEs
466 15:46:34.793638 Setting up local APIC...
467 15:46:34.793728 apic_id: 0x00 done.
468 15:46:34.796740 Turbo is available but hidden
469 15:46:34.800519 Turbo is available and visible
470 15:46:34.806725 microcode: Update skipped, already up-to-date
471 15:46:34.806821 CPU #0 initialized
472 15:46:34.809981 Initializing CPU #6
473 15:46:34.813923 Initializing CPU #3
474 15:46:34.814013 Initializing CPU #4
475 15:46:34.817052 CPU: vendor Intel device 806c1
476 15:46:34.820174 CPU: family 06, model 8c, stepping 01
477 15:46:34.823479 CPU: vendor Intel device 806c1
478 15:46:34.826495 CPU: family 06, model 8c, stepping 01
479 15:46:34.830217 Clearing out pending MCEs
480 15:46:34.833340 Initializing CPU #1
481 15:46:34.836518 Setting up local APIC...
482 15:46:34.839738 CPU: vendor Intel device 806c1
483 15:46:34.842940 CPU: family 06, model 8c, stepping 01
484 15:46:34.843032 Initializing CPU #2
485 15:46:34.846212 apic_id: 0x07 done.
486 15:46:34.849404 Clearing out pending MCEs
487 15:46:34.849494 Initializing CPU #7
488 15:46:34.852684 CPU: vendor Intel device 806c1
489 15:46:34.859826 CPU: family 06, model 8c, stepping 01
490 15:46:34.859918 CPU: vendor Intel device 806c1
491 15:46:34.866843 CPU: family 06, model 8c, stepping 01
492 15:46:34.866934 Clearing out pending MCEs
493 15:46:34.870692 Clearing out pending MCEs
494 15:46:34.873982 Setting up local APIC...
495 15:46:34.877303 CPU: vendor Intel device 806c1
496 15:46:34.880505 CPU: family 06, model 8c, stepping 01
497 15:46:34.880602 Setting up local APIC...
498 15:46:34.883643 Clearing out pending MCEs
499 15:46:34.886887 Initializing CPU #5
500 15:46:34.890804 Setting up local APIC...
501 15:46:34.890894 Setting up local APIC...
502 15:46:34.894059 apic_id: 0x03 done.
503 15:46:34.897281 CPU: vendor Intel device 806c1
504 15:46:34.900445 CPU: family 06, model 8c, stepping 01
505 15:46:34.906856 microcode: Update skipped, already up-to-date
506 15:46:34.906948 Clearing out pending MCEs
507 15:46:34.909963 CPU #1 initialized
508 15:46:34.913278 Setting up local APIC...
509 15:46:34.913367 apic_id: 0x05 done.
510 15:46:34.916574 apic_id: 0x04 done.
511 15:46:34.920253 microcode: Update skipped, already up-to-date
512 15:46:34.926637 microcode: Update skipped, already up-to-date
513 15:46:34.926732 CPU #2 initialized
514 15:46:34.929803 CPU #7 initialized
515 15:46:34.932974 Clearing out pending MCEs
516 15:46:34.936792 apic_id: 0x02 done.
517 15:46:34.939901 microcode: Update skipped, already up-to-date
518 15:46:34.943077 apic_id: 0x06 done.
519 15:46:34.943176 CPU #3 initialized
520 15:46:34.949617 microcode: Update skipped, already up-to-date
521 15:46:34.952836 microcode: Update skipped, already up-to-date
522 15:46:34.956006 Setting up local APIC...
523 15:46:34.956099 CPU #5 initialized
524 15:46:34.959351 apic_id: 0x01 done.
525 15:46:34.963139 CPU #4 initialized
526 15:46:34.966335 microcode: Update skipped, already up-to-date
527 15:46:34.969590 CPU #6 initialized
528 15:46:34.972787 bsp_do_flight_plan done after 454 msecs.
529 15:46:34.975998 CPU: frequency set to 4400 MHz
530 15:46:34.976087 Enabling SMIs.
531 15:46:34.982880 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 15:46:34.998929 SATAXPCIE1 indicates PCIe NVMe is present
533 15:46:35.002102 Probing TPM: done!
534 15:46:35.005814 Connected to device vid:did:rid of 1ae0:0028:00
535 15:46:35.016814 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
536 15:46:35.019909 Initialized TPM device CR50 revision 0
537 15:46:35.023080 Enabling S0i3.4
538 15:46:35.029543 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 15:46:35.033342 Found a VBT of 8704 bytes after decompression
540 15:46:35.039584 cse_lite: CSE RO boot. HybridStorageMode disabled
541 15:46:35.046146 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 15:46:35.122162 FSPS returned 0
543 15:46:35.125269 Executing Phase 1 of FspMultiPhaseSiInit
544 15:46:35.135209 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 15:46:35.138859 port C0 DISC req: usage 1 usb3 1 usb2 5
546 15:46:35.141926 Raw Buffer output 0 00000511
547 15:46:35.145216 Raw Buffer output 1 00000000
548 15:46:35.149058 pmc_send_ipc_cmd succeeded
549 15:46:35.155500 port C1 DISC req: usage 1 usb3 2 usb2 3
550 15:46:35.155596 Raw Buffer output 0 00000321
551 15:46:35.158772 Raw Buffer output 1 00000000
552 15:46:35.163275 pmc_send_ipc_cmd succeeded
553 15:46:35.168454 Detected 4 core, 8 thread CPU.
554 15:46:35.171727 Detected 4 core, 8 thread CPU.
555 15:46:35.371875 Display FSP Version Info HOB
556 15:46:35.374950 Reference Code - CPU = a.0.4c.31
557 15:46:35.378169 uCode Version = 0.0.0.86
558 15:46:35.381275 TXT ACM version = ff.ff.ff.ffff
559 15:46:35.385121 Reference Code - ME = a.0.4c.31
560 15:46:35.388219 MEBx version = 0.0.0.0
561 15:46:35.391407 ME Firmware Version = Consumer SKU
562 15:46:35.394715 Reference Code - PCH = a.0.4c.31
563 15:46:35.397957 PCH-CRID Status = Disabled
564 15:46:35.401168 PCH-CRID Original Value = ff.ff.ff.ffff
565 15:46:35.404397 PCH-CRID New Value = ff.ff.ff.ffff
566 15:46:35.407700 OPROM - RST - RAID = ff.ff.ff.ffff
567 15:46:35.411437 PCH Hsio Version = 4.0.0.0
568 15:46:35.414686 Reference Code - SA - System Agent = a.0.4c.31
569 15:46:35.417799 Reference Code - MRC = 2.0.0.1
570 15:46:35.421042 SA - PCIe Version = a.0.4c.31
571 15:46:35.424236 SA-CRID Status = Disabled
572 15:46:35.427411 SA-CRID Original Value = 0.0.0.1
573 15:46:35.430598 SA-CRID New Value = 0.0.0.1
574 15:46:35.433780 OPROM - VBIOS = ff.ff.ff.ffff
575 15:46:35.437636 IO Manageability Engine FW Version = 11.1.4.0
576 15:46:35.440784 PHY Build Version = 0.0.0.e0
577 15:46:35.444007 Thunderbolt(TM) FW Version = 0.0.0.0
578 15:46:35.451486 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 15:46:35.454585 ITSS IRQ Polarities Before:
580 15:46:35.454705 IPC0: 0xffffffff
581 15:46:35.458442 IPC1: 0xffffffff
582 15:46:35.458522 IPC2: 0xffffffff
583 15:46:35.461617 IPC3: 0xffffffff
584 15:46:35.464782 ITSS IRQ Polarities After:
585 15:46:35.464860 IPC0: 0xffffffff
586 15:46:35.467956 IPC1: 0xffffffff
587 15:46:35.468034 IPC2: 0xffffffff
588 15:46:35.471182 IPC3: 0xffffffff
589 15:46:35.474401 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 15:46:35.487714 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 15:46:35.497889 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 15:46:35.510669 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 15:46:35.517271 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
594 15:46:35.520558 Enumerating buses...
595 15:46:35.523841 Show all devs... Before device enumeration.
596 15:46:35.527071 Root Device: enabled 1
597 15:46:35.527172 DOMAIN: 0000: enabled 1
598 15:46:35.530916 CPU_CLUSTER: 0: enabled 1
599 15:46:35.534127 PCI: 00:00.0: enabled 1
600 15:46:35.537274 PCI: 00:02.0: enabled 1
601 15:46:35.537362 PCI: 00:04.0: enabled 1
602 15:46:35.540499 PCI: 00:05.0: enabled 1
603 15:46:35.543553 PCI: 00:06.0: enabled 0
604 15:46:35.547286 PCI: 00:07.0: enabled 0
605 15:46:35.547373 PCI: 00:07.1: enabled 0
606 15:46:35.550510 PCI: 00:07.2: enabled 0
607 15:46:35.553754 PCI: 00:07.3: enabled 0
608 15:46:35.556990 PCI: 00:08.0: enabled 1
609 15:46:35.557077 PCI: 00:09.0: enabled 0
610 15:46:35.560092 PCI: 00:0a.0: enabled 0
611 15:46:35.563365 PCI: 00:0d.0: enabled 1
612 15:46:35.566651 PCI: 00:0d.1: enabled 0
613 15:46:35.566738 PCI: 00:0d.2: enabled 0
614 15:46:35.569898 PCI: 00:0d.3: enabled 0
615 15:46:35.573703 PCI: 00:0e.0: enabled 0
616 15:46:35.576876 PCI: 00:10.2: enabled 1
617 15:46:35.576963 PCI: 00:10.6: enabled 0
618 15:46:35.580066 PCI: 00:10.7: enabled 0
619 15:46:35.583420 PCI: 00:12.0: enabled 0
620 15:46:35.583506 PCI: 00:12.6: enabled 0
621 15:46:35.586592 PCI: 00:13.0: enabled 0
622 15:46:35.589820 PCI: 00:14.0: enabled 1
623 15:46:35.593053 PCI: 00:14.1: enabled 0
624 15:46:35.593140 PCI: 00:14.2: enabled 1
625 15:46:35.596198 PCI: 00:14.3: enabled 1
626 15:46:35.600032 PCI: 00:15.0: enabled 1
627 15:46:35.603127 PCI: 00:15.1: enabled 1
628 15:46:35.603215 PCI: 00:15.2: enabled 1
629 15:46:35.606322 PCI: 00:15.3: enabled 1
630 15:46:35.609545 PCI: 00:16.0: enabled 1
631 15:46:35.612747 PCI: 00:16.1: enabled 0
632 15:46:35.612830 PCI: 00:16.2: enabled 0
633 15:46:35.615875 PCI: 00:16.3: enabled 0
634 15:46:35.619823 PCI: 00:16.4: enabled 0
635 15:46:35.622450 PCI: 00:16.5: enabled 0
636 15:46:35.622536 PCI: 00:17.0: enabled 1
637 15:46:35.626277 PCI: 00:19.0: enabled 0
638 15:46:35.629387 PCI: 00:19.1: enabled 1
639 15:46:35.632756 PCI: 00:19.2: enabled 0
640 15:46:35.632850 PCI: 00:1c.0: enabled 1
641 15:46:35.636007 PCI: 00:1c.1: enabled 0
642 15:46:35.639136 PCI: 00:1c.2: enabled 0
643 15:46:35.642283 PCI: 00:1c.3: enabled 0
644 15:46:35.642391 PCI: 00:1c.4: enabled 0
645 15:46:35.645620 PCI: 00:1c.5: enabled 0
646 15:46:35.648832 PCI: 00:1c.6: enabled 1
647 15:46:35.652497 PCI: 00:1c.7: enabled 0
648 15:46:35.652625 PCI: 00:1d.0: enabled 1
649 15:46:35.655686 PCI: 00:1d.1: enabled 0
650 15:46:35.658908 PCI: 00:1d.2: enabled 1
651 15:46:35.662149 PCI: 00:1d.3: enabled 0
652 15:46:35.662310 PCI: 00:1e.0: enabled 1
653 15:46:35.665392 PCI: 00:1e.1: enabled 0
654 15:46:35.668712 PCI: 00:1e.2: enabled 1
655 15:46:35.672003 PCI: 00:1e.3: enabled 1
656 15:46:35.672219 PCI: 00:1f.0: enabled 1
657 15:46:35.675390 PCI: 00:1f.1: enabled 0
658 15:46:35.678492 PCI: 00:1f.2: enabled 1
659 15:46:35.678758 PCI: 00:1f.3: enabled 1
660 15:46:35.681813 PCI: 00:1f.4: enabled 0
661 15:46:35.685156 PCI: 00:1f.5: enabled 1
662 15:46:35.688921 PCI: 00:1f.6: enabled 0
663 15:46:35.689269 PCI: 00:1f.7: enabled 0
664 15:46:35.692033 APIC: 00: enabled 1
665 15:46:35.695308 GENERIC: 0.0: enabled 1
666 15:46:35.698535 GENERIC: 0.0: enabled 1
667 15:46:35.698883 GENERIC: 1.0: enabled 1
668 15:46:35.701765 GENERIC: 0.0: enabled 1
669 15:46:35.705046 GENERIC: 1.0: enabled 1
670 15:46:35.708184 USB0 port 0: enabled 1
671 15:46:35.708534 GENERIC: 0.0: enabled 1
672 15:46:35.711977 USB0 port 0: enabled 1
673 15:46:35.715022 GENERIC: 0.0: enabled 1
674 15:46:35.715370 I2C: 00:1a: enabled 1
675 15:46:35.718104 I2C: 00:31: enabled 1
676 15:46:35.721358 I2C: 00:32: enabled 1
677 15:46:35.721704 I2C: 00:10: enabled 1
678 15:46:35.724991 I2C: 00:15: enabled 1
679 15:46:35.728310 GENERIC: 0.0: enabled 0
680 15:46:35.731560 GENERIC: 1.0: enabled 0
681 15:46:35.732033 GENERIC: 0.0: enabled 1
682 15:46:35.734694 SPI: 00: enabled 1
683 15:46:35.737928 SPI: 00: enabled 1
684 15:46:35.738305 PNP: 0c09.0: enabled 1
685 15:46:35.741173 GENERIC: 0.0: enabled 1
686 15:46:35.744370 USB3 port 0: enabled 1
687 15:46:35.744715 USB3 port 1: enabled 1
688 15:46:35.748061 USB3 port 2: enabled 0
689 15:46:35.751080 USB3 port 3: enabled 0
690 15:46:35.754258 USB2 port 0: enabled 0
691 15:46:35.754599 USB2 port 1: enabled 1
692 15:46:35.757411 USB2 port 2: enabled 1
693 15:46:35.760688 USB2 port 3: enabled 0
694 15:46:35.761035 USB2 port 4: enabled 1
695 15:46:35.764730 USB2 port 5: enabled 0
696 15:46:35.767904 USB2 port 6: enabled 0
697 15:46:35.771237 USB2 port 7: enabled 0
698 15:46:35.771581 USB2 port 8: enabled 0
699 15:46:35.774597 USB2 port 9: enabled 0
700 15:46:35.777943 USB3 port 0: enabled 0
701 15:46:35.778406 USB3 port 1: enabled 1
702 15:46:35.780943 USB3 port 2: enabled 0
703 15:46:35.784154 USB3 port 3: enabled 0
704 15:46:35.787404 GENERIC: 0.0: enabled 1
705 15:46:35.787905 GENERIC: 1.0: enabled 1
706 15:46:35.790362 APIC: 03: enabled 1
707 15:46:35.794198 APIC: 05: enabled 1
708 15:46:35.794582 APIC: 07: enabled 1
709 15:46:35.797612 APIC: 06: enabled 1
710 15:46:35.798134 APIC: 02: enabled 1
711 15:46:35.800679 APIC: 01: enabled 1
712 15:46:35.803925 APIC: 04: enabled 1
713 15:46:35.804306 Compare with tree...
714 15:46:35.807243 Root Device: enabled 1
715 15:46:35.810502 DOMAIN: 0000: enabled 1
716 15:46:35.813690 PCI: 00:00.0: enabled 1
717 15:46:35.814104 PCI: 00:02.0: enabled 1
718 15:46:35.816858 PCI: 00:04.0: enabled 1
719 15:46:35.820040 GENERIC: 0.0: enabled 1
720 15:46:35.823846 PCI: 00:05.0: enabled 1
721 15:46:35.827076 PCI: 00:06.0: enabled 0
722 15:46:35.827551 PCI: 00:07.0: enabled 0
723 15:46:35.830321 GENERIC: 0.0: enabled 1
724 15:46:35.833617 PCI: 00:07.1: enabled 0
725 15:46:35.836915 GENERIC: 1.0: enabled 1
726 15:46:35.840120 PCI: 00:07.2: enabled 0
727 15:46:35.843180 GENERIC: 0.0: enabled 1
728 15:46:35.843604 PCI: 00:07.3: enabled 0
729 15:46:35.846508 GENERIC: 1.0: enabled 1
730 15:46:35.850245 PCI: 00:08.0: enabled 1
731 15:46:35.853328 PCI: 00:09.0: enabled 0
732 15:46:35.856447 PCI: 00:0a.0: enabled 0
733 15:46:35.856835 PCI: 00:0d.0: enabled 1
734 15:46:35.859660 USB0 port 0: enabled 1
735 15:46:35.862982 USB3 port 0: enabled 1
736 15:46:35.866346 USB3 port 1: enabled 1
737 15:46:35.869610 USB3 port 2: enabled 0
738 15:46:35.870040 USB3 port 3: enabled 0
739 15:46:35.872908 PCI: 00:0d.1: enabled 0
740 15:46:35.876076 PCI: 00:0d.2: enabled 0
741 15:46:35.879324 GENERIC: 0.0: enabled 1
742 15:46:35.882532 PCI: 00:0d.3: enabled 0
743 15:46:35.886352 PCI: 00:0e.0: enabled 0
744 15:46:35.886749 PCI: 00:10.2: enabled 1
745 15:46:35.889477 PCI: 00:10.6: enabled 0
746 15:46:35.892665 PCI: 00:10.7: enabled 0
747 15:46:35.895783 PCI: 00:12.0: enabled 0
748 15:46:35.899042 PCI: 00:12.6: enabled 0
749 15:46:35.899372 PCI: 00:13.0: enabled 0
750 15:46:35.902762 PCI: 00:14.0: enabled 1
751 15:46:35.906120 USB0 port 0: enabled 1
752 15:46:35.909497 USB2 port 0: enabled 0
753 15:46:35.912692 USB2 port 1: enabled 1
754 15:46:35.913066 USB2 port 2: enabled 1
755 15:46:35.915919 USB2 port 3: enabled 0
756 15:46:35.919192 USB2 port 4: enabled 1
757 15:46:35.922490 USB2 port 5: enabled 0
758 15:46:35.925448 USB2 port 6: enabled 0
759 15:46:35.928764 USB2 port 7: enabled 0
760 15:46:35.929176 USB2 port 8: enabled 0
761 15:46:35.931978 USB2 port 9: enabled 0
762 15:46:35.935248 USB3 port 0: enabled 0
763 15:46:35.938565 USB3 port 1: enabled 1
764 15:46:35.942259 USB3 port 2: enabled 0
765 15:46:35.945554 USB3 port 3: enabled 0
766 15:46:35.945985 PCI: 00:14.1: enabled 0
767 15:46:35.948686 PCI: 00:14.2: enabled 1
768 15:46:35.951828 PCI: 00:14.3: enabled 1
769 15:46:35.955110 GENERIC: 0.0: enabled 1
770 15:46:35.958813 PCI: 00:15.0: enabled 1
771 15:46:35.959211 I2C: 00:1a: enabled 1
772 15:46:35.961863 I2C: 00:31: enabled 1
773 15:46:35.965265 I2C: 00:32: enabled 1
774 15:46:35.968382 PCI: 00:15.1: enabled 1
775 15:46:35.968770 I2C: 00:10: enabled 1
776 15:46:35.971655 PCI: 00:15.2: enabled 1
777 15:46:35.974902 PCI: 00:15.3: enabled 1
778 15:46:35.978087 PCI: 00:16.0: enabled 1
779 15:46:35.981352 PCI: 00:16.1: enabled 0
780 15:46:35.981737 PCI: 00:16.2: enabled 0
781 15:46:35.984635 PCI: 00:16.3: enabled 0
782 15:46:35.988350 PCI: 00:16.4: enabled 0
783 15:46:35.991492 PCI: 00:16.5: enabled 0
784 15:46:35.994643 PCI: 00:17.0: enabled 1
785 15:46:35.995029 PCI: 00:19.0: enabled 0
786 15:46:35.997882 PCI: 00:19.1: enabled 1
787 15:46:36.001087 I2C: 00:15: enabled 1
788 15:46:36.004944 PCI: 00:19.2: enabled 0
789 15:46:36.008146 PCI: 00:1d.0: enabled 1
790 15:46:36.008532 GENERIC: 0.0: enabled 1
791 15:46:36.011407 PCI: 00:1e.0: enabled 1
792 15:46:36.014590 PCI: 00:1e.1: enabled 0
793 15:46:36.017579 PCI: 00:1e.2: enabled 1
794 15:46:36.020879 SPI: 00: enabled 1
795 15:46:36.021267 PCI: 00:1e.3: enabled 1
796 15:46:36.024057 SPI: 00: enabled 1
797 15:46:36.027725 PCI: 00:1f.0: enabled 1
798 15:46:36.031032 PNP: 0c09.0: enabled 1
799 15:46:36.031417 PCI: 00:1f.1: enabled 0
800 15:46:36.034368 PCI: 00:1f.2: enabled 1
801 15:46:36.037620 GENERIC: 0.0: enabled 1
802 15:46:36.089381 GENERIC: 0.0: enabled 1
803 15:46:36.090034 GENERIC: 1.0: enabled 1
804 15:46:36.090437 PCI: 00:1f.3: enabled 1
805 15:46:36.090839 PCI: 00:1f.4: enabled 0
806 15:46:36.091210 PCI: 00:1f.5: enabled 1
807 15:46:36.091607 PCI: 00:1f.6: enabled 0
808 15:46:36.092010 PCI: 00:1f.7: enabled 0
809 15:46:36.092400 CPU_CLUSTER: 0: enabled 1
810 15:46:36.092764 APIC: 00: enabled 1
811 15:46:36.093110 APIC: 03: enabled 1
812 15:46:36.093451 APIC: 05: enabled 1
813 15:46:36.093782 APIC: 07: enabled 1
814 15:46:36.094161 APIC: 06: enabled 1
815 15:46:36.094510 APIC: 02: enabled 1
816 15:46:36.094906 APIC: 01: enabled 1
817 15:46:36.095633 APIC: 04: enabled 1
818 15:46:36.096080 Root Device scanning...
819 15:46:36.096519 scan_static_bus for Root Device
820 15:46:36.096906 DOMAIN: 0000 enabled
821 15:46:36.097332 CPU_CLUSTER: 0 enabled
822 15:46:36.139535 DOMAIN: 0000 scanning...
823 15:46:36.140024 PCI: pci_scan_bus for bus 00
824 15:46:36.140740 PCI: 00:00.0 [8086/0000] ops
825 15:46:36.141129 PCI: 00:00.0 [8086/9a12] enabled
826 15:46:36.141444 PCI: 00:02.0 [8086/0000] bus ops
827 15:46:36.141949 PCI: 00:02.0 [8086/9a40] enabled
828 15:46:36.142334 PCI: 00:04.0 [8086/0000] bus ops
829 15:46:36.142656 PCI: 00:04.0 [8086/9a03] enabled
830 15:46:36.142943 PCI: 00:05.0 [8086/9a19] enabled
831 15:46:36.143243 PCI: 00:07.0 [0000/0000] hidden
832 15:46:36.143520 PCI: 00:08.0 [8086/9a11] enabled
833 15:46:36.143850 PCI: 00:0a.0 [8086/9a0d] disabled
834 15:46:36.144551 PCI: 00:0d.0 [8086/0000] bus ops
835 15:46:36.144895 PCI: 00:0d.0 [8086/9a13] enabled
836 15:46:36.145177 PCI: 00:14.0 [8086/0000] bus ops
837 15:46:36.145449 PCI: 00:14.0 [8086/a0ed] enabled
838 15:46:36.189781 PCI: 00:14.2 [8086/a0ef] enabled
839 15:46:36.190674 PCI: 00:14.3 [8086/0000] bus ops
840 15:46:36.191038 PCI: 00:14.3 [8086/a0f0] enabled
841 15:46:36.191352 PCI: 00:15.0 [8086/0000] bus ops
842 15:46:36.191647 PCI: 00:15.0 [8086/a0e8] enabled
843 15:46:36.191990 PCI: 00:15.1 [8086/0000] bus ops
844 15:46:36.192300 PCI: 00:15.1 [8086/a0e9] enabled
845 15:46:36.192601 PCI: 00:15.2 [8086/0000] bus ops
846 15:46:36.192898 PCI: 00:15.2 [8086/a0ea] enabled
847 15:46:36.193551 PCI: 00:15.3 [8086/0000] bus ops
848 15:46:36.193872 PCI: 00:15.3 [8086/a0eb] enabled
849 15:46:36.194183 PCI: 00:16.0 [8086/0000] ops
850 15:46:36.194501 PCI: 00:16.0 [8086/a0e0] enabled
851 15:46:36.194806 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 15:46:36.195634 PCI: 00:19.0 [8086/0000] bus ops
853 15:46:36.196073 PCI: 00:19.0 [8086/a0c5] disabled
854 15:46:36.198716 PCI: 00:19.1 [8086/0000] bus ops
855 15:46:36.202540 PCI: 00:19.1 [8086/a0c6] enabled
856 15:46:36.205800 PCI: 00:1d.0 [8086/0000] bus ops
857 15:46:36.209097 PCI: 00:1d.0 [8086/a0b0] enabled
858 15:46:36.212120 PCI: 00:1e.0 [8086/0000] ops
859 15:46:36.215818 PCI: 00:1e.0 [8086/a0a8] enabled
860 15:46:36.218779 PCI: 00:1e.2 [8086/0000] bus ops
861 15:46:36.221930 PCI: 00:1e.2 [8086/a0aa] enabled
862 15:46:36.225205 PCI: 00:1e.3 [8086/0000] bus ops
863 15:46:36.228358 PCI: 00:1e.3 [8086/a0ab] enabled
864 15:46:36.232105 PCI: 00:1f.0 [8086/0000] bus ops
865 15:46:36.235044 PCI: 00:1f.0 [8086/a087] enabled
866 15:46:36.238208 RTC Init
867 15:46:36.241490 Set power on after power failure.
868 15:46:36.241896 Disabling Deep S3
869 15:46:36.244784 Disabling Deep S3
870 15:46:36.245228 Disabling Deep S4
871 15:46:36.247969 Disabling Deep S4
872 15:46:36.251179 Disabling Deep S5
873 15:46:36.251630 Disabling Deep S5
874 15:46:36.255155 PCI: 00:1f.2 [0000/0000] hidden
875 15:46:36.258317 PCI: 00:1f.3 [8086/0000] bus ops
876 15:46:36.261297 PCI: 00:1f.3 [8086/a0c8] enabled
877 15:46:36.264578 PCI: 00:1f.5 [8086/0000] bus ops
878 15:46:36.267645 PCI: 00:1f.5 [8086/a0a4] enabled
879 15:46:36.270676 PCI: Leftover static devices:
880 15:46:36.274523 PCI: 00:10.2
881 15:46:36.274894 PCI: 00:10.6
882 15:46:36.275216 PCI: 00:10.7
883 15:46:36.277809 PCI: 00:06.0
884 15:46:36.278229 PCI: 00:07.1
885 15:46:36.281056 PCI: 00:07.2
886 15:46:36.281429 PCI: 00:07.3
887 15:46:36.284052 PCI: 00:09.0
888 15:46:36.284472 PCI: 00:0d.1
889 15:46:36.284818 PCI: 00:0d.2
890 15:46:36.287431 PCI: 00:0d.3
891 15:46:36.287834 PCI: 00:0e.0
892 15:46:36.290843 PCI: 00:12.0
893 15:46:36.291221 PCI: 00:12.6
894 15:46:36.291520 PCI: 00:13.0
895 15:46:36.293947 PCI: 00:14.1
896 15:46:36.294321 PCI: 00:16.1
897 15:46:36.297143 PCI: 00:16.2
898 15:46:36.297520 PCI: 00:16.3
899 15:46:36.300307 PCI: 00:16.4
900 15:46:36.300687 PCI: 00:16.5
901 15:46:36.300985 PCI: 00:17.0
902 15:46:36.303378 PCI: 00:19.2
903 15:46:36.303783 PCI: 00:1e.1
904 15:46:36.307055 PCI: 00:1f.1
905 15:46:36.307549 PCI: 00:1f.4
906 15:46:36.310082 PCI: 00:1f.6
907 15:46:36.310456 PCI: 00:1f.7
908 15:46:36.313303 PCI: Check your devicetree.cb.
909 15:46:36.316491 PCI: 00:02.0 scanning...
910 15:46:36.320028 scan_generic_bus for PCI: 00:02.0
911 15:46:36.323268 scan_generic_bus for PCI: 00:02.0 done
912 15:46:36.326393 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 15:46:36.329637 PCI: 00:04.0 scanning...
914 15:46:36.333275 scan_generic_bus for PCI: 00:04.0
915 15:46:36.336870 GENERIC: 0.0 enabled
916 15:46:36.343262 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 15:46:36.346600 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 15:46:36.349884 PCI: 00:0d.0 scanning...
919 15:46:36.353083 scan_static_bus for PCI: 00:0d.0
920 15:46:36.356316 USB0 port 0 enabled
921 15:46:36.356731 USB0 port 0 scanning...
922 15:46:36.359640 scan_static_bus for USB0 port 0
923 15:46:36.363191 USB3 port 0 enabled
924 15:46:36.366265 USB3 port 1 enabled
925 15:46:36.366647 USB3 port 2 disabled
926 15:46:36.369311 USB3 port 3 disabled
927 15:46:36.372653 USB3 port 0 scanning...
928 15:46:36.376131 scan_static_bus for USB3 port 0
929 15:46:36.379303 scan_static_bus for USB3 port 0 done
930 15:46:36.382423 scan_bus: bus USB3 port 0 finished in 6 msecs
931 15:46:36.385679 USB3 port 1 scanning...
932 15:46:36.388946 scan_static_bus for USB3 port 1
933 15:46:36.392331 scan_static_bus for USB3 port 1 done
934 15:46:36.399684 scan_bus: bus USB3 port 1 finished in 6 msecs
935 15:46:36.402972 scan_static_bus for USB0 port 0 done
936 15:46:36.405999 scan_bus: bus USB0 port 0 finished in 43 msecs
937 15:46:36.409314 scan_static_bus for PCI: 00:0d.0 done
938 15:46:36.415610 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 15:46:36.418586 PCI: 00:14.0 scanning...
940 15:46:36.421930 scan_static_bus for PCI: 00:14.0
941 15:46:36.422482 USB0 port 0 enabled
942 15:46:36.425065 USB0 port 0 scanning...
943 15:46:36.428819 scan_static_bus for USB0 port 0
944 15:46:36.431985 USB2 port 0 disabled
945 15:46:36.432501 USB2 port 1 enabled
946 15:46:36.435089 USB2 port 2 enabled
947 15:46:36.438277 USB2 port 3 disabled
948 15:46:36.438686 USB2 port 4 enabled
949 15:46:36.441992 USB2 port 5 disabled
950 15:46:36.445201 USB2 port 6 disabled
951 15:46:36.445612 USB2 port 7 disabled
952 15:46:36.448519 USB2 port 8 disabled
953 15:46:36.451831 USB2 port 9 disabled
954 15:46:36.452260 USB3 port 0 disabled
955 15:46:36.455106 USB3 port 1 enabled
956 15:46:36.458116 USB3 port 2 disabled
957 15:46:36.458533 USB3 port 3 disabled
958 15:46:36.461389 USB2 port 1 scanning...
959 15:46:36.464352 scan_static_bus for USB2 port 1
960 15:46:36.468386 scan_static_bus for USB2 port 1 done
961 15:46:36.471320 scan_bus: bus USB2 port 1 finished in 6 msecs
962 15:46:36.474519 USB2 port 2 scanning...
963 15:46:36.477786 scan_static_bus for USB2 port 2
964 15:46:36.480990 scan_static_bus for USB2 port 2 done
965 15:46:36.488067 scan_bus: bus USB2 port 2 finished in 6 msecs
966 15:46:36.490657 USB2 port 4 scanning...
967 15:46:36.494520 scan_static_bus for USB2 port 4
968 15:46:36.497715 scan_static_bus for USB2 port 4 done
969 15:46:36.500978 scan_bus: bus USB2 port 4 finished in 6 msecs
970 15:46:36.504217 USB3 port 1 scanning...
971 15:46:36.507287 scan_static_bus for USB3 port 1
972 15:46:36.510401 scan_static_bus for USB3 port 1 done
973 15:46:36.513609 scan_bus: bus USB3 port 1 finished in 6 msecs
974 15:46:36.520715 scan_static_bus for USB0 port 0 done
975 15:46:36.523856 scan_bus: bus USB0 port 0 finished in 93 msecs
976 15:46:36.526936 scan_static_bus for PCI: 00:14.0 done
977 15:46:36.533322 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
978 15:46:36.533738 PCI: 00:14.3 scanning...
979 15:46:36.540259 scan_static_bus for PCI: 00:14.3
980 15:46:36.540647 GENERIC: 0.0 enabled
981 15:46:36.543581 scan_static_bus for PCI: 00:14.3 done
982 15:46:36.550027 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 15:46:36.553296 PCI: 00:15.0 scanning...
984 15:46:36.556493 scan_static_bus for PCI: 00:15.0
985 15:46:36.556881 I2C: 00:1a enabled
986 15:46:36.559783 I2C: 00:31 enabled
987 15:46:36.560199 I2C: 00:32 enabled
988 15:46:36.566717 scan_static_bus for PCI: 00:15.0 done
989 15:46:36.569891 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 15:46:36.573090 PCI: 00:15.1 scanning...
991 15:46:36.576149 scan_static_bus for PCI: 00:15.1
992 15:46:36.576527 I2C: 00:10 enabled
993 15:46:36.582715 scan_static_bus for PCI: 00:15.1 done
994 15:46:36.585932 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 15:46:36.589252 PCI: 00:15.2 scanning...
996 15:46:36.593031 scan_static_bus for PCI: 00:15.2
997 15:46:36.596172 scan_static_bus for PCI: 00:15.2 done
998 15:46:36.599871 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 15:46:36.602828 PCI: 00:15.3 scanning...
1000 15:46:36.606021 scan_static_bus for PCI: 00:15.3
1001 15:46:36.609091 scan_static_bus for PCI: 00:15.3 done
1002 15:46:36.615823 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 15:46:36.618825 PCI: 00:19.1 scanning...
1004 15:46:36.622609 scan_static_bus for PCI: 00:19.1
1005 15:46:36.623015 I2C: 00:15 enabled
1006 15:46:36.625792 scan_static_bus for PCI: 00:19.1 done
1007 15:46:36.632180 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 15:46:36.635475 PCI: 00:1d.0 scanning...
1009 15:46:36.639159 do_pci_scan_bridge for PCI: 00:1d.0
1010 15:46:36.642230 PCI: pci_scan_bus for bus 01
1011 15:46:36.645383 PCI: 01:00.0 [15b7/5009] enabled
1012 15:46:36.645821 GENERIC: 0.0 enabled
1013 15:46:36.651782 Enabling Common Clock Configuration
1014 15:46:36.655110 L1 Sub-State supported from root port 29
1015 15:46:36.658715 L1 Sub-State Support = 0x5
1016 15:46:36.661970 CommonModeRestoreTime = 0x28
1017 15:46:36.665281 Power On Value = 0x16, Power On Scale = 0x0
1018 15:46:36.665699 ASPM: Enabled L1
1019 15:46:36.671821 PCIe: Max_Payload_Size adjusted to 128
1020 15:46:36.675117 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 15:46:36.678330 PCI: 00:1e.2 scanning...
1022 15:46:36.682409 scan_generic_bus for PCI: 00:1e.2
1023 15:46:36.682947 SPI: 00 enabled
1024 15:46:36.688450 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 15:46:36.694960 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 15:46:36.695393 PCI: 00:1e.3 scanning...
1027 15:46:36.701827 scan_generic_bus for PCI: 00:1e.3
1028 15:46:36.702267 SPI: 00 enabled
1029 15:46:36.708263 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 15:46:36.711805 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 15:46:36.715379 PCI: 00:1f.0 scanning...
1032 15:46:36.718434 scan_static_bus for PCI: 00:1f.0
1033 15:46:36.721496 PNP: 0c09.0 enabled
1034 15:46:36.724567 PNP: 0c09.0 scanning...
1035 15:46:36.727922 scan_static_bus for PNP: 0c09.0
1036 15:46:36.731064 scan_static_bus for PNP: 0c09.0 done
1037 15:46:36.734318 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 15:46:36.738122 scan_static_bus for PCI: 00:1f.0 done
1039 15:46:36.744344 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 15:46:36.747501 PCI: 00:1f.2 scanning...
1041 15:46:36.750853 scan_static_bus for PCI: 00:1f.2
1042 15:46:36.751259 GENERIC: 0.0 enabled
1043 15:46:36.753922 GENERIC: 0.0 scanning...
1044 15:46:36.757029 scan_static_bus for GENERIC: 0.0
1045 15:46:36.760353 GENERIC: 0.0 enabled
1046 15:46:36.763671 GENERIC: 1.0 enabled
1047 15:46:36.766951 scan_static_bus for GENERIC: 0.0 done
1048 15:46:36.770682 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 15:46:36.773940 scan_static_bus for PCI: 00:1f.2 done
1050 15:46:36.780370 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 15:46:36.783753 PCI: 00:1f.3 scanning...
1052 15:46:36.786714 scan_static_bus for PCI: 00:1f.3
1053 15:46:36.790020 scan_static_bus for PCI: 00:1f.3 done
1054 15:46:36.793336 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 15:46:36.796480 PCI: 00:1f.5 scanning...
1056 15:46:36.799861 scan_generic_bus for PCI: 00:1f.5
1057 15:46:36.802900 scan_generic_bus for PCI: 00:1f.5 done
1058 15:46:36.809521 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 15:46:36.813238 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1060 15:46:36.816547 scan_static_bus for Root Device done
1061 15:46:36.822730 scan_bus: bus Root Device finished in 735 msecs
1062 15:46:36.823141 done
1063 15:46:36.829011 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1064 15:46:36.832369 Chrome EC: UHEPI supported
1065 15:46:36.839546 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 15:46:36.845676 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 15:46:36.848932 SPI flash protection: WPSW=0 SRP0=1
1068 15:46:36.852041 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 15:46:36.859047 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1070 15:46:36.862133 found VGA at PCI: 00:02.0
1071 15:46:36.865399 Setting up VGA for PCI: 00:02.0
1072 15:46:36.872311 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 15:46:36.875412 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 15:46:36.878708 Allocating resources...
1075 15:46:36.879242 Reading resources...
1076 15:46:36.885507 Root Device read_resources bus 0 link: 0
1077 15:46:36.888865 DOMAIN: 0000 read_resources bus 0 link: 0
1078 15:46:36.895251 PCI: 00:04.0 read_resources bus 1 link: 0
1079 15:46:36.898608 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 15:46:36.905235 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 15:46:36.908324 USB0 port 0 read_resources bus 0 link: 0
1082 15:46:36.914576 USB0 port 0 read_resources bus 0 link: 0 done
1083 15:46:36.918426 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 15:46:36.924688 PCI: 00:14.0 read_resources bus 0 link: 0
1085 15:46:36.927978 USB0 port 0 read_resources bus 0 link: 0
1086 15:46:36.934355 USB0 port 0 read_resources bus 0 link: 0 done
1087 15:46:36.937669 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 15:46:36.944263 PCI: 00:14.3 read_resources bus 0 link: 0
1089 15:46:36.947409 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 15:46:36.954352 PCI: 00:15.0 read_resources bus 0 link: 0
1091 15:46:36.957646 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 15:46:36.964159 PCI: 00:15.1 read_resources bus 0 link: 0
1093 15:46:36.967390 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 15:46:36.973825 PCI: 00:19.1 read_resources bus 0 link: 0
1095 15:46:36.977575 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 15:46:36.984086 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 15:46:36.987062 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 15:46:36.994130 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 15:46:36.997339 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 15:46:37.003616 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 15:46:37.006981 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 15:46:37.013813 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 15:46:37.017080 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 15:46:37.023379 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 15:46:37.026688 GENERIC: 0.0 read_resources bus 0 link: 0
1106 15:46:37.032962 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 15:46:37.036149 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 15:46:37.042794 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 15:46:37.046010 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 15:46:37.052893 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 15:46:37.056213 Root Device read_resources bus 0 link: 0 done
1112 15:46:37.059424 Done reading resources.
1113 15:46:37.065582 Show resources in subtree (Root Device)...After reading.
1114 15:46:37.068810 Root Device child on link 0 DOMAIN: 0000
1115 15:46:37.072069 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 15:46:37.082217 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 15:46:37.092203 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 15:46:37.095361 PCI: 00:00.0
1119 15:46:37.105138 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 15:46:37.114873 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 15:46:37.121496 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 15:46:37.131536 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 15:46:37.141405 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 15:46:37.150839 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 15:46:37.161287 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 15:46:37.170830 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 15:46:37.177928 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 15:46:37.187491 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 15:46:37.197195 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 15:46:37.206834 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 15:46:37.217164 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 15:46:37.226514 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 15:46:37.233424 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 15:46:37.243254 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 15:46:37.252797 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 15:46:37.263138 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 15:46:37.272700 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 15:46:37.282237 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 15:46:37.286190 PCI: 00:02.0
1140 15:46:37.295775 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 15:46:37.305357 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 15:46:37.311583 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 15:46:37.318152 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 15:46:37.328326 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 15:46:37.328750 GENERIC: 0.0
1146 15:46:37.331583 PCI: 00:05.0
1147 15:46:37.341671 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 15:46:37.344835 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 15:46:37.348085 GENERIC: 0.0
1150 15:46:37.348583 PCI: 00:08.0
1151 15:46:37.357907 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 15:46:37.361120 PCI: 00:0a.0
1153 15:46:37.364127 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 15:46:37.374490 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 15:46:37.380652 USB0 port 0 child on link 0 USB3 port 0
1156 15:46:37.381065 USB3 port 0
1157 15:46:37.383747 USB3 port 1
1158 15:46:37.384153 USB3 port 2
1159 15:46:37.386982 USB3 port 3
1160 15:46:37.390742 PCI: 00:14.0 child on link 0 USB0 port 0
1161 15:46:37.400168 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 15:46:37.407087 USB0 port 0 child on link 0 USB2 port 0
1163 15:46:37.407603 USB2 port 0
1164 15:46:37.410096 USB2 port 1
1165 15:46:37.410504 USB2 port 2
1166 15:46:37.413511 USB2 port 3
1167 15:46:37.413921 USB2 port 4
1168 15:46:37.416608 USB2 port 5
1169 15:46:37.417018 USB2 port 6
1170 15:46:37.419920 USB2 port 7
1171 15:46:37.423048 USB2 port 8
1172 15:46:37.423456 USB2 port 9
1173 15:46:37.426787 USB3 port 0
1174 15:46:37.427207 USB3 port 1
1175 15:46:37.430323 USB3 port 2
1176 15:46:37.430840 USB3 port 3
1177 15:46:37.433207 PCI: 00:14.2
1178 15:46:37.442875 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 15:46:37.453037 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 15:46:37.456236 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 15:46:37.466262 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 15:46:37.469436 GENERIC: 0.0
1183 15:46:37.472805 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 15:46:37.482375 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 15:46:37.485723 I2C: 00:1a
1186 15:46:37.486314 I2C: 00:31
1187 15:46:37.486698 I2C: 00:32
1188 15:46:37.492066 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 15:46:37.502173 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 15:46:37.502632 I2C: 00:10
1191 15:46:37.505419 PCI: 00:15.2
1192 15:46:37.515132 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 15:46:37.515596 PCI: 00:15.3
1194 15:46:37.525401 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 15:46:37.528518 PCI: 00:16.0
1196 15:46:37.538301 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 15:46:37.538762 PCI: 00:19.0
1198 15:46:37.544990 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 15:46:37.555057 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 15:46:37.555647 I2C: 00:15
1201 15:46:37.561498 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 15:46:37.567452 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 15:46:37.577883 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 15:46:37.587634 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 15:46:37.591160 GENERIC: 0.0
1206 15:46:37.591618 PCI: 01:00.0
1207 15:46:37.600656 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 15:46:37.610213 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1209 15:46:37.613634 PCI: 00:1e.0
1210 15:46:37.624029 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1211 15:46:37.627331 PCI: 00:1e.2 child on link 0 SPI: 00
1212 15:46:37.636548 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 15:46:37.639734 SPI: 00
1214 15:46:37.643439 PCI: 00:1e.3 child on link 0 SPI: 00
1215 15:46:37.653119 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 15:46:37.653579 SPI: 00
1217 15:46:37.659467 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1218 15:46:37.666188 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1219 15:46:37.669484 PNP: 0c09.0
1220 15:46:37.679143 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1221 15:46:37.682340 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1222 15:46:37.692558 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1223 15:46:37.702303 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1224 15:46:37.705434 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1225 15:46:37.708733 GENERIC: 0.0
1226 15:46:37.709175 GENERIC: 1.0
1227 15:46:37.711928 PCI: 00:1f.3
1228 15:46:37.721731 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 15:46:37.731815 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1230 15:46:37.732275 PCI: 00:1f.5
1231 15:46:37.741413 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 15:46:37.745221 CPU_CLUSTER: 0 child on link 0 APIC: 00
1233 15:46:37.748486 APIC: 00
1234 15:46:37.748922 APIC: 03
1235 15:46:37.749272 APIC: 05
1236 15:46:37.751819 APIC: 07
1237 15:46:37.752264 APIC: 06
1238 15:46:37.755024 APIC: 02
1239 15:46:37.755431 APIC: 01
1240 15:46:37.755790 APIC: 04
1241 15:46:37.764339 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1242 15:46:37.768027 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1243 15:46:37.774285 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1244 15:46:37.780824 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1245 15:46:37.784099 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1246 15:46:37.791032 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1247 15:46:37.797501 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1248 15:46:37.803613 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1249 15:46:37.813892 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1250 15:46:37.820350 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1251 15:46:37.826714 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1252 15:46:37.833721 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1253 15:46:37.840141 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1254 15:46:37.849531 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1255 15:46:37.852909 DOMAIN: 0000: Resource ranges:
1256 15:46:37.856769 * Base: 1000, Size: 800, Tag: 100
1257 15:46:37.860014 * Base: 1900, Size: e700, Tag: 100
1258 15:46:37.863147 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1259 15:46:37.869499 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1260 15:46:37.875763 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1261 15:46:37.885579 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1262 15:46:37.892691 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1263 15:46:37.898838 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1264 15:46:37.909050 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1265 15:46:37.915544 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1266 15:46:37.925274 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1267 15:46:37.932111 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1268 15:46:37.938558 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1269 15:46:37.948181 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1270 15:46:37.954644 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1271 15:46:37.961728 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1272 15:46:37.971189 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1273 15:46:37.978289 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1274 15:46:37.984608 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1275 15:46:37.994274 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1276 15:46:38.001010 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1277 15:46:38.007235 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1278 15:46:38.018036 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1279 15:46:38.024121 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1280 15:46:38.030865 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1281 15:46:38.040246 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1282 15:46:38.047405 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1283 15:46:38.050332 DOMAIN: 0000: Resource ranges:
1284 15:46:38.053536 * Base: 7fc00000, Size: 40400000, Tag: 200
1285 15:46:38.060048 * Base: d0000000, Size: 28000000, Tag: 200
1286 15:46:38.063225 * Base: fa000000, Size: 1000000, Tag: 200
1287 15:46:38.066866 * Base: fb001000, Size: 2fff000, Tag: 200
1288 15:46:38.073239 * Base: fe010000, Size: 2e000, Tag: 200
1289 15:46:38.076240 * Base: fe03f000, Size: d41000, Tag: 200
1290 15:46:38.080147 * Base: fed88000, Size: 8000, Tag: 200
1291 15:46:38.083273 * Base: fed93000, Size: d000, Tag: 200
1292 15:46:38.089754 * Base: feda2000, Size: 1e000, Tag: 200
1293 15:46:38.093273 * Base: fede0000, Size: 1220000, Tag: 200
1294 15:46:38.096023 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1295 15:46:38.102687 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1296 15:46:38.112906 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1297 15:46:38.119370 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1298 15:46:38.125922 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1299 15:46:38.132444 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1300 15:46:38.138652 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1301 15:46:38.146251 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1302 15:46:38.152385 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1303 15:46:38.158830 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1304 15:46:38.165184 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1305 15:46:38.172025 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1306 15:46:38.178495 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1307 15:46:38.184994 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1308 15:46:38.191406 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1309 15:46:38.198312 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1310 15:46:38.204866 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1311 15:46:38.211203 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1312 15:46:38.218153 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1313 15:46:38.224504 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1314 15:46:38.231401 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1315 15:46:38.237628 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1316 15:46:38.244128 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1317 15:46:38.251215 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1318 15:46:38.260901 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1319 15:46:38.261455 PCI: 00:1d.0: Resource ranges:
1320 15:46:38.267059 * Base: 7fc00000, Size: 100000, Tag: 200
1321 15:46:38.273602 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1322 15:46:38.280248 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1323 15:46:38.286751 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 15:46:38.296907 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 15:46:38.300127 Root Device assign_resources, bus 0 link: 0
1326 15:46:38.303174 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 15:46:38.313272 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 15:46:38.319956 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 15:46:38.329399 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 15:46:38.336415 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 15:46:38.342985 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 15:46:38.346156 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 15:46:38.355686 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 15:46:38.362120 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 15:46:38.372342 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 15:46:38.375526 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 15:46:38.378939 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 15:46:38.388368 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 15:46:38.392280 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 15:46:38.398344 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 15:46:38.404744 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 15:46:38.414714 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 15:46:38.420955 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 15:46:38.427456 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 15:46:38.431233 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 15:46:38.437768 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 15:46:38.444000 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 15:46:38.447646 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 15:46:38.457445 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 15:46:38.460573 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 15:46:38.467379 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 15:46:38.473860 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 15:46:38.483460 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 15:46:38.490384 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 15:46:38.500222 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 15:46:38.503435 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 15:46:38.506616 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 15:46:38.516798 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 15:46:38.526168 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 15:46:38.536493 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 15:46:38.539597 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 15:46:38.548994 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 15:46:38.556041 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1364 15:46:38.559080 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 15:46:38.569273 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1366 15:46:38.572603 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1367 15:46:38.579501 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 15:46:38.585831 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1369 15:46:38.592186 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1370 15:46:38.595386 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 15:46:38.601907 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1372 15:46:38.605117 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 15:46:38.608354 LPC: Trying to open IO window from 800 size 1ff
1374 15:46:38.619326 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1375 15:46:38.625900 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1376 15:46:38.634979 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1377 15:46:38.638368 DOMAIN: 0000 assign_resources, bus 0 link: 0
1378 15:46:38.645102 Root Device assign_resources, bus 0 link: 0
1379 15:46:38.645556 Done setting resources.
1380 15:46:38.652131 Show resources in subtree (Root Device)...After assigning values.
1381 15:46:38.658350 Root Device child on link 0 DOMAIN: 0000
1382 15:46:38.661898 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1383 15:46:38.671176 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1384 15:46:38.681400 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1385 15:46:38.681862 PCI: 00:00.0
1386 15:46:38.691241 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1387 15:46:38.700730 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1388 15:46:38.710497 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1389 15:46:38.720713 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1390 15:46:38.730071 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1391 15:46:38.739765 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1392 15:46:38.750108 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1393 15:46:38.756436 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1394 15:46:38.766505 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1395 15:46:38.776198 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1396 15:46:38.786249 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1397 15:46:38.796080 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1398 15:46:38.805887 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1399 15:46:38.812031 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1400 15:46:38.822118 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1401 15:46:38.831547 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1402 15:46:38.841890 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1403 15:46:38.851472 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1404 15:46:38.861407 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1405 15:46:38.871007 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1406 15:46:38.871466 PCI: 00:02.0
1407 15:46:38.884433 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1408 15:46:38.893900 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1409 15:46:38.904166 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1410 15:46:38.907369 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1411 15:46:38.916869 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1412 15:46:38.920311 GENERIC: 0.0
1413 15:46:38.920767 PCI: 00:05.0
1414 15:46:38.933393 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1415 15:46:38.936647 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1416 15:46:38.937106 GENERIC: 0.0
1417 15:46:38.940137 PCI: 00:08.0
1418 15:46:38.950265 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1419 15:46:38.953251 PCI: 00:0a.0
1420 15:46:38.956454 PCI: 00:0d.0 child on link 0 USB0 port 0
1421 15:46:38.966625 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1422 15:46:38.970131 USB0 port 0 child on link 0 USB3 port 0
1423 15:46:38.972992 USB3 port 0
1424 15:46:38.976248 USB3 port 1
1425 15:46:38.976704 USB3 port 2
1426 15:46:38.979420 USB3 port 3
1427 15:46:38.982642 PCI: 00:14.0 child on link 0 USB0 port 0
1428 15:46:38.992527 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1429 15:46:38.996314 USB0 port 0 child on link 0 USB2 port 0
1430 15:46:38.999842 USB2 port 0
1431 15:46:39.002645 USB2 port 1
1432 15:46:39.003133 USB2 port 2
1433 15:46:39.005874 USB2 port 3
1434 15:46:39.006327 USB2 port 4
1435 15:46:39.009207 USB2 port 5
1436 15:46:39.009700 USB2 port 6
1437 15:46:39.012347 USB2 port 7
1438 15:46:39.012799 USB2 port 8
1439 15:46:39.015450 USB2 port 9
1440 15:46:39.015919 USB3 port 0
1441 15:46:39.019291 USB3 port 1
1442 15:46:39.019781 USB3 port 2
1443 15:46:39.022521 USB3 port 3
1444 15:46:39.025651 PCI: 00:14.2
1445 15:46:39.035176 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1446 15:46:39.045528 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1447 15:46:39.048814 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1448 15:46:39.058397 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1449 15:46:39.061728 GENERIC: 0.0
1450 15:46:39.065277 PCI: 00:15.0 child on link 0 I2C: 00:1a
1451 15:46:39.074570 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1452 15:46:39.078312 I2C: 00:1a
1453 15:46:39.078759 I2C: 00:31
1454 15:46:39.081658 I2C: 00:32
1455 15:46:39.085193 PCI: 00:15.1 child on link 0 I2C: 00:10
1456 15:46:39.094437 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1457 15:46:39.097617 I2C: 00:10
1458 15:46:39.098062 PCI: 00:15.2
1459 15:46:39.108143 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1460 15:46:39.111556 PCI: 00:15.3
1461 15:46:39.121248 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1462 15:46:39.121795 PCI: 00:16.0
1463 15:46:39.134318 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1464 15:46:39.134924 PCI: 00:19.0
1465 15:46:39.137426 PCI: 00:19.1 child on link 0 I2C: 00:15
1466 15:46:39.150584 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1467 15:46:39.151079 I2C: 00:15
1468 15:46:39.153813 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1469 15:46:39.163517 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1470 15:46:39.177392 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1471 15:46:39.186638 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1472 15:46:39.189865 GENERIC: 0.0
1473 15:46:39.190315 PCI: 01:00.0
1474 15:46:39.199810 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1475 15:46:39.209486 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1476 15:46:39.212851 PCI: 00:1e.0
1477 15:46:39.222500 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1478 15:46:39.226289 PCI: 00:1e.2 child on link 0 SPI: 00
1479 15:46:39.239415 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1480 15:46:39.239935 SPI: 00
1481 15:46:39.242643 PCI: 00:1e.3 child on link 0 SPI: 00
1482 15:46:39.252155 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1483 15:46:39.255296 SPI: 00
1484 15:46:39.258689 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1485 15:46:39.268969 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1486 15:46:39.269425 PNP: 0c09.0
1487 15:46:39.278354 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1488 15:46:39.281779 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1489 15:46:39.292195 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1490 15:46:39.301828 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1491 15:46:39.304949 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1492 15:46:39.308237 GENERIC: 0.0
1493 15:46:39.308680 GENERIC: 1.0
1494 15:46:39.311389 PCI: 00:1f.3
1495 15:46:39.321466 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1496 15:46:39.331536 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1497 15:46:39.334764 PCI: 00:1f.5
1498 15:46:39.344338 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1499 15:46:39.347604 CPU_CLUSTER: 0 child on link 0 APIC: 00
1500 15:46:39.350817 APIC: 00
1501 15:46:39.351262 APIC: 03
1502 15:46:39.351661 APIC: 05
1503 15:46:39.354010 APIC: 07
1504 15:46:39.354455 APIC: 06
1505 15:46:39.357936 APIC: 02
1506 15:46:39.358381 APIC: 01
1507 15:46:39.358737 APIC: 04
1508 15:46:39.361059 Done allocating resources.
1509 15:46:39.367495 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1510 15:46:39.373960 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1511 15:46:39.377045 Configure GPIOs for I2S audio on UP4.
1512 15:46:39.384150 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1513 15:46:39.387525 Enabling resources...
1514 15:46:39.390547 PCI: 00:00.0 subsystem <- 8086/9a12
1515 15:46:39.393756 PCI: 00:00.0 cmd <- 06
1516 15:46:39.397069 PCI: 00:02.0 subsystem <- 8086/9a40
1517 15:46:39.400243 PCI: 00:02.0 cmd <- 03
1518 15:46:39.403433 PCI: 00:04.0 subsystem <- 8086/9a03
1519 15:46:39.403924 PCI: 00:04.0 cmd <- 02
1520 15:46:39.410238 PCI: 00:05.0 subsystem <- 8086/9a19
1521 15:46:39.410694 PCI: 00:05.0 cmd <- 02
1522 15:46:39.417123 PCI: 00:08.0 subsystem <- 8086/9a11
1523 15:46:39.417698 PCI: 00:08.0 cmd <- 06
1524 15:46:39.420162 PCI: 00:0d.0 subsystem <- 8086/9a13
1525 15:46:39.423648 PCI: 00:0d.0 cmd <- 02
1526 15:46:39.427011 PCI: 00:14.0 subsystem <- 8086/a0ed
1527 15:46:39.429564 PCI: 00:14.0 cmd <- 02
1528 15:46:39.433220 PCI: 00:14.2 subsystem <- 8086/a0ef
1529 15:46:39.436446 PCI: 00:14.2 cmd <- 02
1530 15:46:39.439660 PCI: 00:14.3 subsystem <- 8086/a0f0
1531 15:46:39.442798 PCI: 00:14.3 cmd <- 02
1532 15:46:39.445928 PCI: 00:15.0 subsystem <- 8086/a0e8
1533 15:46:39.449278 PCI: 00:15.0 cmd <- 02
1534 15:46:39.453077 PCI: 00:15.1 subsystem <- 8086/a0e9
1535 15:46:39.456117 PCI: 00:15.1 cmd <- 02
1536 15:46:39.459300 PCI: 00:15.2 subsystem <- 8086/a0ea
1537 15:46:39.459782 PCI: 00:15.2 cmd <- 02
1538 15:46:39.466130 PCI: 00:15.3 subsystem <- 8086/a0eb
1539 15:46:39.466674 PCI: 00:15.3 cmd <- 02
1540 15:46:39.469208 PCI: 00:16.0 subsystem <- 8086/a0e0
1541 15:46:39.472390 PCI: 00:16.0 cmd <- 02
1542 15:46:39.476442 PCI: 00:19.1 subsystem <- 8086/a0c6
1543 15:46:39.479356 PCI: 00:19.1 cmd <- 02
1544 15:46:39.482447 PCI: 00:1d.0 bridge ctrl <- 0013
1545 15:46:39.485595 PCI: 00:1d.0 subsystem <- 8086/a0b0
1546 15:46:39.489146 PCI: 00:1d.0 cmd <- 06
1547 15:46:39.492093 PCI: 00:1e.0 subsystem <- 8086/a0a8
1548 15:46:39.495272 PCI: 00:1e.0 cmd <- 06
1549 15:46:39.499165 PCI: 00:1e.2 subsystem <- 8086/a0aa
1550 15:46:39.502386 PCI: 00:1e.2 cmd <- 06
1551 15:46:39.505561 PCI: 00:1e.3 subsystem <- 8086/a0ab
1552 15:46:39.508642 PCI: 00:1e.3 cmd <- 02
1553 15:46:39.511786 PCI: 00:1f.0 subsystem <- 8086/a087
1554 15:46:39.514876 PCI: 00:1f.0 cmd <- 407
1555 15:46:39.518608 PCI: 00:1f.3 subsystem <- 8086/a0c8
1556 15:46:39.519069 PCI: 00:1f.3 cmd <- 02
1557 15:46:39.525195 PCI: 00:1f.5 subsystem <- 8086/a0a4
1558 15:46:39.525731 PCI: 00:1f.5 cmd <- 406
1559 15:46:39.530735 PCI: 01:00.0 cmd <- 02
1560 15:46:39.535220 done.
1561 15:46:39.538329 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1562 15:46:39.541607 Initializing devices...
1563 15:46:39.544577 Root Device init
1564 15:46:39.547811 Chrome EC: Set SMI mask to 0x0000000000000000
1565 15:46:39.554977 Chrome EC: clear events_b mask to 0x0000000000000000
1566 15:46:39.561335 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1567 15:46:39.567778 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1568 15:46:39.570955 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1569 15:46:39.577490 Chrome EC: Set WAKE mask to 0x0000000000000000
1570 15:46:39.580746 fw_config match found: DB_USB=USB3_ACTIVE
1571 15:46:39.587619 Configure Right Type-C port orientation for retimer
1572 15:46:39.590770 Root Device init finished in 42 msecs
1573 15:46:39.593893 PCI: 00:00.0 init
1574 15:46:39.597047 CPU TDP = 9 Watts
1575 15:46:39.597493 CPU PL1 = 9 Watts
1576 15:46:39.600535 CPU PL2 = 40 Watts
1577 15:46:39.601051 CPU PL4 = 83 Watts
1578 15:46:39.607388 PCI: 00:00.0 init finished in 8 msecs
1579 15:46:39.607912 PCI: 00:02.0 init
1580 15:46:39.610553 GMA: Found VBT in CBFS
1581 15:46:39.613622 GMA: Found valid VBT in CBFS
1582 15:46:39.620527 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1583 15:46:39.626941 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1584 15:46:39.629996 PCI: 00:02.0 init finished in 18 msecs
1585 15:46:39.633166 PCI: 00:05.0 init
1586 15:46:39.636837 PCI: 00:05.0 init finished in 0 msecs
1587 15:46:39.639902 PCI: 00:08.0 init
1588 15:46:39.643134 PCI: 00:08.0 init finished in 0 msecs
1589 15:46:39.646283 PCI: 00:14.0 init
1590 15:46:39.650120 PCI: 00:14.0 init finished in 0 msecs
1591 15:46:39.653267 PCI: 00:14.2 init
1592 15:46:39.656533 PCI: 00:14.2 init finished in 0 msecs
1593 15:46:39.659886 PCI: 00:15.0 init
1594 15:46:39.660343 I2C bus 0 version 0x3230302a
1595 15:46:39.666335 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1596 15:46:39.669550 PCI: 00:15.0 init finished in 6 msecs
1597 15:46:39.670009 PCI: 00:15.1 init
1598 15:46:39.672661 I2C bus 1 version 0x3230302a
1599 15:46:39.675860 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1600 15:46:39.682908 PCI: 00:15.1 init finished in 6 msecs
1601 15:46:39.683407 PCI: 00:15.2 init
1602 15:46:39.686000 I2C bus 2 version 0x3230302a
1603 15:46:39.689078 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1604 15:46:39.692303 PCI: 00:15.2 init finished in 6 msecs
1605 15:46:39.696057 PCI: 00:15.3 init
1606 15:46:39.698968 I2C bus 3 version 0x3230302a
1607 15:46:39.702107 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1608 15:46:39.705933 PCI: 00:15.3 init finished in 6 msecs
1609 15:46:39.709187 PCI: 00:16.0 init
1610 15:46:39.712104 PCI: 00:16.0 init finished in 0 msecs
1611 15:46:39.715122 PCI: 00:19.1 init
1612 15:46:39.718909 I2C bus 5 version 0x3230302a
1613 15:46:39.722194 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1614 15:46:39.725437 PCI: 00:19.1 init finished in 6 msecs
1615 15:46:39.728761 PCI: 00:1d.0 init
1616 15:46:39.731945 Initializing PCH PCIe bridge.
1617 15:46:39.735137 PCI: 00:1d.0 init finished in 3 msecs
1618 15:46:39.738389 PCI: 00:1f.0 init
1619 15:46:39.742106 IOAPIC: Initializing IOAPIC at 0xfec00000
1620 15:46:39.745090 IOAPIC: Bootstrap Processor Local APIC = 0x00
1621 15:46:39.748373 IOAPIC: ID = 0x02
1622 15:46:39.751651 IOAPIC: Dumping registers
1623 15:46:39.754787 reg 0x0000: 0x02000000
1624 15:46:39.755240 reg 0x0001: 0x00770020
1625 15:46:39.757954 reg 0x0002: 0x00000000
1626 15:46:39.761256 PCI: 00:1f.0 init finished in 21 msecs
1627 15:46:39.764560 PCI: 00:1f.2 init
1628 15:46:39.767800 Disabling ACPI via APMC.
1629 15:46:39.771791 APMC done.
1630 15:46:39.774963 PCI: 00:1f.2 init finished in 6 msecs
1631 15:46:39.787095 PCI: 01:00.0 init
1632 15:46:39.789783 PCI: 01:00.0 init finished in 0 msecs
1633 15:46:39.793262 PNP: 0c09.0 init
1634 15:46:39.799820 Google Chrome EC uptime: 8.265 seconds
1635 15:46:39.803473 Google Chrome AP resets since EC boot: 1
1636 15:46:39.806786 Google Chrome most recent AP reset causes:
1637 15:46:39.810221 0.451: 32775 shutdown: entering G3
1638 15:46:39.816163 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1639 15:46:39.819997 PNP: 0c09.0 init finished in 24 msecs
1640 15:46:39.826416 Devices initialized
1641 15:46:39.829709 Show all devs... After init.
1642 15:46:39.833093 Root Device: enabled 1
1643 15:46:39.833599 DOMAIN: 0000: enabled 1
1644 15:46:39.836343 CPU_CLUSTER: 0: enabled 1
1645 15:46:39.840206 PCI: 00:00.0: enabled 1
1646 15:46:39.843135 PCI: 00:02.0: enabled 1
1647 15:46:39.846297 PCI: 00:04.0: enabled 1
1648 15:46:39.846805 PCI: 00:05.0: enabled 1
1649 15:46:39.849662 PCI: 00:06.0: enabled 0
1650 15:46:39.852563 PCI: 00:07.0: enabled 0
1651 15:46:39.853263 PCI: 00:07.1: enabled 0
1652 15:46:39.855925 PCI: 00:07.2: enabled 0
1653 15:46:39.859632 PCI: 00:07.3: enabled 0
1654 15:46:39.862769 PCI: 00:08.0: enabled 1
1655 15:46:39.863203 PCI: 00:09.0: enabled 0
1656 15:46:39.866042 PCI: 00:0a.0: enabled 0
1657 15:46:39.869380 PCI: 00:0d.0: enabled 1
1658 15:46:39.872586 PCI: 00:0d.1: enabled 0
1659 15:46:39.873082 PCI: 00:0d.2: enabled 0
1660 15:46:39.875820 PCI: 00:0d.3: enabled 0
1661 15:46:39.879455 PCI: 00:0e.0: enabled 0
1662 15:46:39.882426 PCI: 00:10.2: enabled 1
1663 15:46:39.882975 PCI: 00:10.6: enabled 0
1664 15:46:39.885641 PCI: 00:10.7: enabled 0
1665 15:46:39.888756 PCI: 00:12.0: enabled 0
1666 15:46:39.892029 PCI: 00:12.6: enabled 0
1667 15:46:39.892512 PCI: 00:13.0: enabled 0
1668 15:46:39.895256 PCI: 00:14.0: enabled 1
1669 15:46:39.898445 PCI: 00:14.1: enabled 0
1670 15:46:39.902320 PCI: 00:14.2: enabled 1
1671 15:46:39.902763 PCI: 00:14.3: enabled 1
1672 15:46:39.905572 PCI: 00:15.0: enabled 1
1673 15:46:39.908637 PCI: 00:15.1: enabled 1
1674 15:46:39.912009 PCI: 00:15.2: enabled 1
1675 15:46:39.912455 PCI: 00:15.3: enabled 1
1676 15:46:39.915112 PCI: 00:16.0: enabled 1
1677 15:46:39.918812 PCI: 00:16.1: enabled 0
1678 15:46:39.921894 PCI: 00:16.2: enabled 0
1679 15:46:39.922338 PCI: 00:16.3: enabled 0
1680 15:46:39.925168 PCI: 00:16.4: enabled 0
1681 15:46:39.928377 PCI: 00:16.5: enabled 0
1682 15:46:39.931566 PCI: 00:17.0: enabled 0
1683 15:46:39.932096 PCI: 00:19.0: enabled 0
1684 15:46:39.934952 PCI: 00:19.1: enabled 1
1685 15:46:39.938150 PCI: 00:19.2: enabled 0
1686 15:46:39.938638 PCI: 00:1c.0: enabled 1
1687 15:46:39.941899 PCI: 00:1c.1: enabled 0
1688 15:46:39.945179 PCI: 00:1c.2: enabled 0
1689 15:46:39.948351 PCI: 00:1c.3: enabled 0
1690 15:46:39.948805 PCI: 00:1c.4: enabled 0
1691 15:46:39.952187 PCI: 00:1c.5: enabled 0
1692 15:46:39.954573 PCI: 00:1c.6: enabled 1
1693 15:46:39.958217 PCI: 00:1c.7: enabled 0
1694 15:46:39.958687 PCI: 00:1d.0: enabled 1
1695 15:46:39.961359 PCI: 00:1d.1: enabled 0
1696 15:46:39.964614 PCI: 00:1d.2: enabled 1
1697 15:46:39.967881 PCI: 00:1d.3: enabled 0
1698 15:46:39.968361 PCI: 00:1e.0: enabled 1
1699 15:46:39.971085 PCI: 00:1e.1: enabled 0
1700 15:46:39.974330 PCI: 00:1e.2: enabled 1
1701 15:46:39.977640 PCI: 00:1e.3: enabled 1
1702 15:46:39.978176 PCI: 00:1f.0: enabled 1
1703 15:46:39.980648 PCI: 00:1f.1: enabled 0
1704 15:46:39.983947 PCI: 00:1f.2: enabled 1
1705 15:46:39.987308 PCI: 00:1f.3: enabled 1
1706 15:46:39.987770 PCI: 00:1f.4: enabled 0
1707 15:46:39.991199 PCI: 00:1f.5: enabled 1
1708 15:46:39.993672 PCI: 00:1f.6: enabled 0
1709 15:46:39.997491 PCI: 00:1f.7: enabled 0
1710 15:46:39.997937 APIC: 00: enabled 1
1711 15:46:40.000796 GENERIC: 0.0: enabled 1
1712 15:46:40.003958 GENERIC: 0.0: enabled 1
1713 15:46:40.004411 GENERIC: 1.0: enabled 1
1714 15:46:40.007228 GENERIC: 0.0: enabled 1
1715 15:46:40.010575 GENERIC: 1.0: enabled 1
1716 15:46:40.013521 USB0 port 0: enabled 1
1717 15:46:40.013973 GENERIC: 0.0: enabled 1
1718 15:46:40.016975 USB0 port 0: enabled 1
1719 15:46:40.020524 GENERIC: 0.0: enabled 1
1720 15:46:40.024117 I2C: 00:1a: enabled 1
1721 15:46:40.024590 I2C: 00:31: enabled 1
1722 15:46:40.027320 I2C: 00:32: enabled 1
1723 15:46:40.030782 I2C: 00:10: enabled 1
1724 15:46:40.031351 I2C: 00:15: enabled 1
1725 15:46:40.033926 GENERIC: 0.0: enabled 0
1726 15:46:40.036903 GENERIC: 1.0: enabled 0
1727 15:46:40.039916 GENERIC: 0.0: enabled 1
1728 15:46:40.040381 SPI: 00: enabled 1
1729 15:46:40.043023 SPI: 00: enabled 1
1730 15:46:40.043509 PNP: 0c09.0: enabled 1
1731 15:46:40.046874 GENERIC: 0.0: enabled 1
1732 15:46:40.049892 USB3 port 0: enabled 1
1733 15:46:40.053147 USB3 port 1: enabled 1
1734 15:46:40.053612 USB3 port 2: enabled 0
1735 15:46:40.056279 USB3 port 3: enabled 0
1736 15:46:40.060033 USB2 port 0: enabled 0
1737 15:46:40.060550 USB2 port 1: enabled 1
1738 15:46:40.063119 USB2 port 2: enabled 1
1739 15:46:40.066961 USB2 port 3: enabled 0
1740 15:46:40.069923 USB2 port 4: enabled 1
1741 15:46:40.070394 USB2 port 5: enabled 0
1742 15:46:40.073030 USB2 port 6: enabled 0
1743 15:46:40.076221 USB2 port 7: enabled 0
1744 15:46:40.076721 USB2 port 8: enabled 0
1745 15:46:40.079396 USB2 port 9: enabled 0
1746 15:46:40.082697 USB3 port 0: enabled 0
1747 15:46:40.086325 USB3 port 1: enabled 1
1748 15:46:40.086791 USB3 port 2: enabled 0
1749 15:46:40.089590 USB3 port 3: enabled 0
1750 15:46:40.092847 GENERIC: 0.0: enabled 1
1751 15:46:40.093311 GENERIC: 1.0: enabled 1
1752 15:46:40.096213 APIC: 03: enabled 1
1753 15:46:40.099276 APIC: 05: enabled 1
1754 15:46:40.099769 APIC: 07: enabled 1
1755 15:46:40.102499 APIC: 06: enabled 1
1756 15:46:40.105943 APIC: 02: enabled 1
1757 15:46:40.106535 APIC: 01: enabled 1
1758 15:46:40.108923 APIC: 04: enabled 1
1759 15:46:40.112103 PCI: 01:00.0: enabled 1
1760 15:46:40.115435 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1761 15:46:40.122453 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1762 15:46:40.125812 ELOG: NV offset 0xf30000 size 0x1000
1763 15:46:40.132224 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1764 15:46:40.138636 ELOG: Event(17) added with size 13 at 2023-03-03 15:46:39 UTC
1765 15:46:40.144970 ELOG: Event(92) added with size 9 at 2023-03-03 15:46:39 UTC
1766 15:46:40.152001 ELOG: Event(93) added with size 9 at 2023-03-03 15:46:39 UTC
1767 15:46:40.158330 ELOG: Event(9E) added with size 10 at 2023-03-03 15:46:39 UTC
1768 15:46:40.164739 ELOG: Event(9F) added with size 14 at 2023-03-03 15:46:39 UTC
1769 15:46:40.171219 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1770 15:46:40.177666 ELOG: Event(A1) added with size 10 at 2023-03-03 15:46:39 UTC
1771 15:46:40.184769 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1772 15:46:40.191098 ELOG: Event(A0) added with size 9 at 2023-03-03 15:46:39 UTC
1773 15:46:40.194238 elog_add_boot_reason: Logged dev mode boot
1774 15:46:40.201246 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1775 15:46:40.204477 Finalize devices...
1776 15:46:40.204925 Devices finalized
1777 15:46:40.211097 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1778 15:46:40.214498 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1779 15:46:40.220838 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1780 15:46:40.227505 ME: HFSTS1 : 0x80030055
1781 15:46:40.231062 ME: HFSTS2 : 0x30280116
1782 15:46:40.234282 ME: HFSTS3 : 0x00000050
1783 15:46:40.240564 ME: HFSTS4 : 0x00004000
1784 15:46:40.243747 ME: HFSTS5 : 0x00000000
1785 15:46:40.246855 ME: HFSTS6 : 0x40400006
1786 15:46:40.253064 ME: Manufacturing Mode : YES
1787 15:46:40.256830 ME: SPI Protection Mode Enabled : NO
1788 15:46:40.259904 ME: FW Partition Table : OK
1789 15:46:40.263069 ME: Bringup Loader Failure : NO
1790 15:46:40.266205 ME: Firmware Init Complete : NO
1791 15:46:40.270116 ME: Boot Options Present : NO
1792 15:46:40.273310 ME: Update In Progress : NO
1793 15:46:40.276439 ME: D0i3 Support : YES
1794 15:46:40.282988 ME: Low Power State Enabled : NO
1795 15:46:40.286360 ME: CPU Replaced : YES
1796 15:46:40.289427 ME: CPU Replacement Valid : YES
1797 15:46:40.292525 ME: Current Working State : 5
1798 15:46:40.295965 ME: Current Operation State : 1
1799 15:46:40.299715 ME: Current Operation Mode : 3
1800 15:46:40.302719 ME: Error Code : 0
1801 15:46:40.305940 ME: Enhanced Debug Mode : NO
1802 15:46:40.312295 ME: CPU Debug Disabled : YES
1803 15:46:40.316134 ME: TXT Support : NO
1804 15:46:40.322651 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1805 15:46:40.328958 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1806 15:46:40.331943 CBFS: 'fallback/slic' not found.
1807 15:46:40.335878 ACPI: Writing ACPI tables at 76b01000.
1808 15:46:40.339082 ACPI: * FACS
1809 15:46:40.339531 ACPI: * DSDT
1810 15:46:40.342464 Ramoops buffer: 0x100000@0x76a00000.
1811 15:46:40.348764 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1812 15:46:40.351750 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1813 15:46:40.356202 Google Chrome EC: version:
1814 15:46:40.359393 ro: voema_v2.0.10114-a447f03e46
1815 15:46:40.362504 rw: voema_v2.0.10114-a447f03e46
1816 15:46:40.365713 running image: 2
1817 15:46:40.372338 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1818 15:46:40.375983 ACPI: * FADT
1819 15:46:40.376434 SCI is IRQ9
1820 15:46:40.382363 ACPI: added table 1/32, length now 40
1821 15:46:40.382863 ACPI: * SSDT
1822 15:46:40.385748 Found 1 CPU(s) with 8 core(s) each.
1823 15:46:40.392152 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1824 15:46:40.395665 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1825 15:46:40.398597 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1826 15:46:40.405636 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1827 15:46:40.408505 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1828 15:46:40.415647 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1829 15:46:40.418531 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1830 15:46:40.425007 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1831 15:46:40.431714 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1832 15:46:40.434989 \_SB.PCI0.RP09: Added StorageD3Enable property
1833 15:46:40.441366 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1834 15:46:40.444613 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1835 15:46:40.452289 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1836 15:46:40.455535 PS2K: Passing 80 keymaps to kernel
1837 15:46:40.461709 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1838 15:46:40.468883 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1839 15:46:40.475146 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1840 15:46:40.481743 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1841 15:46:40.488338 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1842 15:46:40.494905 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1843 15:46:40.501949 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1844 15:46:40.508067 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1845 15:46:40.511138 ACPI: added table 2/32, length now 44
1846 15:46:40.514639 ACPI: * MCFG
1847 15:46:40.517854 ACPI: added table 3/32, length now 48
1848 15:46:40.518327 ACPI: * TPM2
1849 15:46:40.521041 TPM2 log created at 0x769f0000
1850 15:46:40.524297 ACPI: added table 4/32, length now 52
1851 15:46:40.528196 ACPI: * MADT
1852 15:46:40.528645 SCI is IRQ9
1853 15:46:40.531307 ACPI: added table 5/32, length now 56
1854 15:46:40.534280 current = 76b09850
1855 15:46:40.537430 ACPI: * DMAR
1856 15:46:40.540608 ACPI: added table 6/32, length now 60
1857 15:46:40.544495 ACPI: added table 7/32, length now 64
1858 15:46:40.544942 ACPI: * HPET
1859 15:46:40.551024 ACPI: added table 8/32, length now 68
1860 15:46:40.551520 ACPI: done.
1861 15:46:40.554227 ACPI tables: 35216 bytes.
1862 15:46:40.557354 smbios_write_tables: 769ef000
1863 15:46:40.560535 EC returned error result code 3
1864 15:46:40.564009 Couldn't obtain OEM name from CBI
1865 15:46:40.567050 Create SMBIOS type 16
1866 15:46:40.570258 Create SMBIOS type 17
1867 15:46:40.573526 GENERIC: 0.0 (WIFI Device)
1868 15:46:40.573983 SMBIOS tables: 1734 bytes.
1869 15:46:40.580714 Writing table forward entry at 0x00000500
1870 15:46:40.587221 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1871 15:46:40.590428 Writing coreboot table at 0x76b25000
1872 15:46:40.596859 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1873 15:46:40.599880 1. 0000000000001000-000000000009ffff: RAM
1874 15:46:40.603173 2. 00000000000a0000-00000000000fffff: RESERVED
1875 15:46:40.609489 3. 0000000000100000-00000000769eefff: RAM
1876 15:46:40.613387 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1877 15:46:40.619822 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1878 15:46:40.626236 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1879 15:46:40.629626 7. 0000000077000000-000000007fbfffff: RESERVED
1880 15:46:40.636064 8. 00000000c0000000-00000000cfffffff: RESERVED
1881 15:46:40.639633 9. 00000000f8000000-00000000f9ffffff: RESERVED
1882 15:46:40.646113 10. 00000000fb000000-00000000fb000fff: RESERVED
1883 15:46:40.649288 11. 00000000fe000000-00000000fe00ffff: RESERVED
1884 15:46:40.652384 12. 00000000fed80000-00000000fed87fff: RESERVED
1885 15:46:40.659277 13. 00000000fed90000-00000000fed92fff: RESERVED
1886 15:46:40.662775 14. 00000000feda0000-00000000feda1fff: RESERVED
1887 15:46:40.669470 15. 00000000fedc0000-00000000feddffff: RESERVED
1888 15:46:40.672425 16. 0000000100000000-00000004803fffff: RAM
1889 15:46:40.675912 Passing 4 GPIOs to payload:
1890 15:46:40.682315 NAME | PORT | POLARITY | VALUE
1891 15:46:40.685424 lid | undefined | high | high
1892 15:46:40.692288 power | undefined | high | low
1893 15:46:40.695293 oprom | undefined | high | low
1894 15:46:40.702088 EC in RW | 0x000000e5 | high | high
1895 15:46:40.708483 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1896 15:46:40.711523 coreboot table: 1576 bytes.
1897 15:46:40.715134 IMD ROOT 0. 0x76fff000 0x00001000
1898 15:46:40.718459 IMD SMALL 1. 0x76ffe000 0x00001000
1899 15:46:40.721649 FSP MEMORY 2. 0x76c4e000 0x003b0000
1900 15:46:40.724858 VPD 3. 0x76c4d000 0x00000367
1901 15:46:40.728047 RO MCACHE 4. 0x76c4c000 0x00000fdc
1902 15:46:40.734507 CONSOLE 5. 0x76c2c000 0x00020000
1903 15:46:40.738237 FMAP 6. 0x76c2b000 0x00000578
1904 15:46:40.741471 TIME STAMP 7. 0x76c2a000 0x00000910
1905 15:46:40.744716 VBOOT WORK 8. 0x76c16000 0x00014000
1906 15:46:40.747911 ROMSTG STCK 9. 0x76c15000 0x00001000
1907 15:46:40.751165 AFTER CAR 10. 0x76c0a000 0x0000b000
1908 15:46:40.754446 RAMSTAGE 11. 0x76b97000 0x00073000
1909 15:46:40.761253 REFCODE 12. 0x76b42000 0x00055000
1910 15:46:40.764381 SMM BACKUP 13. 0x76b32000 0x00010000
1911 15:46:40.767428 4f444749 14. 0x76b30000 0x00002000
1912 15:46:40.770657 EXT VBT15. 0x76b2d000 0x0000219f
1913 15:46:40.774467 COREBOOT 16. 0x76b25000 0x00008000
1914 15:46:40.777677 ACPI 17. 0x76b01000 0x00024000
1915 15:46:40.781023 ACPI GNVS 18. 0x76b00000 0x00001000
1916 15:46:40.784132 RAMOOPS 19. 0x76a00000 0x00100000
1917 15:46:40.790388 TPM2 TCGLOG20. 0x769f0000 0x00010000
1918 15:46:40.793611 SMBIOS 21. 0x769ef000 0x00000800
1919 15:46:40.794073 IMD small region:
1920 15:46:40.796684 IMD ROOT 0. 0x76ffec00 0x00000400
1921 15:46:40.803939 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1922 15:46:40.807154 POWER STATE 2. 0x76ffeb80 0x00000044
1923 15:46:40.810362 ROMSTAGE 3. 0x76ffeb60 0x00000004
1924 15:46:40.813436 MEM INFO 4. 0x76ffe980 0x000001e0
1925 15:46:40.819861 BS: BS_WRITE_TABLES run times (exec / console): 9 / 484 ms
1926 15:46:40.823041 MTRR: Physical address space:
1927 15:46:40.830371 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1928 15:46:40.836807 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1929 15:46:40.843022 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1930 15:46:40.849905 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1931 15:46:40.853114 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1932 15:46:40.859625 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1933 15:46:40.865963 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1934 15:46:40.869637 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 15:46:40.876500 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 15:46:40.879390 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 15:46:40.882497 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 15:46:40.886179 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 15:46:40.892670 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 15:46:40.895736 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 15:46:40.899220 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 15:46:40.902433 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 15:46:40.908973 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 15:46:40.912093 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 15:46:40.915918 call enable_fixed_mtrr()
1946 15:46:40.918984 CPU physical address size: 39 bits
1947 15:46:40.925487 MTRR: default type WB/UC MTRR counts: 6/7.
1948 15:46:40.928707 MTRR: WB selected as default type.
1949 15:46:40.935781 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1950 15:46:40.938847 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1951 15:46:40.945105 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1952 15:46:40.952098 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1953 15:46:40.958544 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1954 15:46:40.965061 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1955 15:46:40.972452 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 15:46:40.975688 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 15:46:40.978922 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 15:46:40.985253 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 15:46:40.988332 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 15:46:40.991591 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 15:46:40.994937 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 15:46:40.998728 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 15:46:41.005099 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 15:46:41.008474 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 15:46:41.011565 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 15:46:41.012086
1967 15:46:41.016261 MTRR check
1968 15:46:41.019406 call enable_fixed_mtrr()
1969 15:46:41.019991 Fixed MTRRs : Enabled
1970 15:46:41.022452 Variable MTRRs: Enabled
1971 15:46:41.022902
1972 15:46:41.025683 CPU physical address size: 39 bits
1973 15:46:41.033574 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
1974 15:46:41.039852 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 15:46:41.043234 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 15:46:41.046491 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 15:46:41.050308 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 15:46:41.056515 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 15:46:41.059794 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 15:46:41.062897 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 15:46:41.066081 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 15:46:41.072927 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 15:46:41.076257 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 15:46:41.079451 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 15:46:41.082666 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 15:46:41.090343 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 15:46:41.094168 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 15:46:41.097161 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 15:46:41.100204 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 15:46:41.107340 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 15:46:41.110599 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 15:46:41.113590 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 15:46:41.116960 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 15:46:41.123270 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 15:46:41.126333 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 15:46:41.130145 call enable_fixed_mtrr()
1997 15:46:41.133352 call enable_fixed_mtrr()
1998 15:46:41.136529 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 15:46:41.139752 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 15:46:41.146281 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 15:46:41.149542 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 15:46:41.152743 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 15:46:41.155823 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 15:46:41.163051 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 15:46:41.166225 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 15:46:41.169687 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 15:46:41.172889 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 15:46:41.179331 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 15:46:41.182539 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 15:46:41.188958 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 15:46:41.189458 call enable_fixed_mtrr()
2012 15:46:41.195957 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 15:46:41.199214 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 15:46:41.202542 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 15:46:41.205781 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 15:46:41.212003 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 15:46:41.215861 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 15:46:41.219147 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 15:46:41.222133 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 15:46:41.228790 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 15:46:41.232349 CPU physical address size: 39 bits
2022 15:46:41.236559 call enable_fixed_mtrr()
2023 15:46:41.241071 Checking cr50 for pending updates
2024 15:46:41.244672 CPU physical address size: 39 bits
2025 15:46:41.247856 CPU physical address size: 39 bits
2026 15:46:41.254765 CPU physical address size: 39 bits
2027 15:46:41.258084 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 15:46:41.261340 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 15:46:41.264544 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 15:46:41.268361 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 15:46:41.274779 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 15:46:41.277721 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 15:46:41.281016 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 15:46:41.287898 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 15:46:41.291199 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 15:46:41.294676 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 15:46:41.297515 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 15:46:41.303779 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 15:46:41.307053 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 15:46:41.310348 call enable_fixed_mtrr()
2041 15:46:41.314100 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 15:46:41.320532 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 15:46:41.323681 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 15:46:41.326961 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 15:46:41.330207 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 15:46:41.336680 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 15:46:41.339618 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 15:46:41.342980 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 15:46:41.346251 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 15:46:41.351721 CPU physical address size: 39 bits
2051 15:46:41.358003 call enable_fixed_mtrr()
2052 15:46:41.361915 Reading cr50 TPM mode
2053 15:46:41.365168 CPU physical address size: 39 bits
2054 15:46:41.371527 BS: BS_PAYLOAD_LOAD entry times (exec / console): 324 / 6 ms
2055 15:46:41.377864 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2056 15:46:41.385078 Checking segment from ROM address 0xffc02b38
2057 15:46:41.388063 Checking segment from ROM address 0xffc02b54
2058 15:46:41.391472 Loading segment from ROM address 0xffc02b38
2059 15:46:41.394532 code (compression=0)
2060 15:46:41.404264 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2061 15:46:41.410864 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2062 15:46:41.413971 it's not compressed!
2063 15:46:41.553424 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2064 15:46:41.559589 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2065 15:46:41.566601 Loading segment from ROM address 0xffc02b54
2066 15:46:41.569845 Entry Point 0x30000000
2067 15:46:41.570585 Loaded segments
2068 15:46:41.576282 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2069 15:46:41.621963 Finalizing chipset.
2070 15:46:41.625070 Finalizing SMM.
2071 15:46:41.625585 APMC done.
2072 15:46:41.631421 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2073 15:46:41.634639 mp_park_aps done after 0 msecs.
2074 15:46:41.637850 Jumping to boot code at 0x30000000(0x76b25000)
2075 15:46:41.647860 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2076 15:46:41.651065
2077 15:46:41.651666
2078 15:46:41.652070
2079 15:46:41.654316 Starting depthcharge on Voema...
2080 15:46:41.654806
2081 15:46:41.655861 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2082 15:46:41.656397 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2083 15:46:41.656842 Setting prompt string to ['volteer:']
2084 15:46:41.657234 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2085 15:46:41.661299 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2086 15:46:41.661758
2087 15:46:41.667682 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2088 15:46:41.668176
2089 15:46:41.674053 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2090 15:46:41.674506
2091 15:46:41.677219 Failed to find eMMC card reader
2092 15:46:41.677678
2093 15:46:41.680363 Wipe memory regions:
2094 15:46:41.680819
2095 15:46:41.684197 [0x00000000001000, 0x000000000a0000)
2096 15:46:41.684703
2097 15:46:41.687222 [0x00000000100000, 0x00000030000000)
2098 15:46:41.721946
2099 15:46:41.725144 [0x00000032662db0, 0x000000769ef000)
2100 15:46:41.772672
2101 15:46:41.775790 [0x00000100000000, 0x00000480400000)
2102 15:46:42.425721
2103 15:46:42.428759 ec_init: CrosEC protocol v3 supported (256, 256)
2104 15:46:42.859869
2105 15:46:42.860447 R8152: Initializing
2106 15:46:42.860855
2107 15:46:42.862915 Version 6 (ocp_data = 5c30)
2108 15:46:42.863366
2109 15:46:42.866153 R8152: Done initializing
2110 15:46:42.866725
2111 15:46:42.869184 Adding net device
2112 15:46:43.170808
2113 15:46:43.173907 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2114 15:46:43.174367
2115 15:46:43.174724
2116 15:46:43.175063
2117 15:46:43.177561 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2119 15:46:43.279311 volteer: tftpboot 192.168.201.1 9406192/tftp-deploy-m827jeoj/kernel/bzImage 9406192/tftp-deploy-m827jeoj/kernel/cmdline 9406192/tftp-deploy-m827jeoj/ramdisk/ramdisk.cpio.gz
2120 15:46:43.280098 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2121 15:46:43.280676 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2122 15:46:43.285493 tftpboot 192.168.201.1 9406192/tftp-deploy-m827jeoj/kernel/bzImoy-m827jeoj/kernel/cmdline 9406192/tftp-deploy-m827jeoj/ramdisk/ramdisk.cpio.gz
2123 15:46:43.285972
2124 15:46:43.286613 Waiting for link
2125 15:46:43.488796
2126 15:46:43.489516 done.
2127 15:46:43.489881
2128 15:46:43.490353 MAC: 00:24:32:30:7d:ab
2129 15:46:43.490766
2130 15:46:43.491786 Sending DHCP discover... done.
2131 15:46:43.492193
2132 15:46:43.495073 Waiting for reply... done.
2133 15:46:43.495509
2134 15:46:43.498408 Sending DHCP request... done.
2135 15:46:43.498847
2136 15:46:43.505029 Waiting for reply... done.
2137 15:46:43.505479
2138 15:46:43.505879 My ip is 192.168.201.20
2139 15:46:43.506219
2140 15:46:43.511462 The DHCP server ip is 192.168.201.1
2141 15:46:43.511943
2142 15:46:43.514711 TFTP server IP predefined by user: 192.168.201.1
2143 15:46:43.515216
2144 15:46:43.521662 Bootfile predefined by user: 9406192/tftp-deploy-m827jeoj/kernel/bzImage
2145 15:46:43.522143
2146 15:46:43.524799 Sending tftp read request... done.
2147 15:46:43.525240
2148 15:46:43.532108 Waiting for the transfer...
2149 15:46:43.532646
2150 15:46:44.078132 00000000 ################################################################
2151 15:46:44.078334
2152 15:46:44.602436 00080000 ################################################################
2153 15:46:44.602587
2154 15:46:45.145565 00100000 ################################################################
2155 15:46:45.145703
2156 15:46:45.696356 00180000 ################################################################
2157 15:46:45.696500
2158 15:46:46.233110 00200000 ################################################################
2159 15:46:46.233255
2160 15:46:46.768382 00280000 ################################################################
2161 15:46:46.768563
2162 15:46:47.305496 00300000 ################################################################
2163 15:46:47.305643
2164 15:46:47.843709 00380000 ################################################################
2165 15:46:47.843859
2166 15:46:48.390422 00400000 ################################################################
2167 15:46:48.390562
2168 15:46:48.943984 00480000 ################################################################
2169 15:46:48.944129
2170 15:46:49.480261 00500000 ################################################################
2171 15:46:49.480434
2172 15:46:49.990879 00580000 ################################################################
2173 15:46:49.991027
2174 15:46:50.495986 00600000 ################################################################
2175 15:46:50.496127
2176 15:46:51.006219 00680000 ################################################################
2177 15:46:51.006361
2178 15:46:51.537654 00700000 ################################################################
2179 15:46:51.537800
2180 15:46:52.052471 00780000 ################################################################
2181 15:46:52.052617
2182 15:46:52.560528 00800000 ################################################################
2183 15:46:52.560681
2184 15:46:53.078354 00880000 ################################################################
2185 15:46:53.078512
2186 15:46:53.347592 00900000 ################################## done.
2187 15:46:53.347752
2188 15:46:53.351038 The bootfile was 9707520 bytes long.
2189 15:46:53.351128
2190 15:46:53.354097 Sending tftp read request... done.
2191 15:46:53.354187
2192 15:46:53.357303 Waiting for the transfer...
2193 15:46:53.357391
2194 15:46:53.868892 00000000 ################################################################
2195 15:46:53.869088
2196 15:46:54.410019 00080000 ################################################################
2197 15:46:54.410177
2198 15:46:54.938931 00100000 ################################################################
2199 15:46:54.939091
2200 15:46:55.449028 00180000 ################################################################
2201 15:46:55.449182
2202 15:46:55.964733 00200000 ################################################################
2203 15:46:55.964892
2204 15:46:56.497266 00280000 ################################################################
2205 15:46:56.497426
2206 15:46:57.014381 00300000 ################################################################
2207 15:46:57.014524
2208 15:46:57.548253 00380000 ################################################################
2209 15:46:57.548395
2210 15:46:58.062708 00400000 ################################################################
2211 15:46:58.062864
2212 15:46:58.581544 00480000 ################################################################
2213 15:46:58.581721
2214 15:46:59.112161 00500000 ################################################################
2215 15:46:59.112310
2216 15:46:59.653325 00580000 ################################################################
2217 15:46:59.653503
2218 15:47:00.170421 00600000 ################################################################
2219 15:47:00.170581
2220 15:47:00.702391 00680000 ################################################################
2221 15:47:00.702553
2222 15:47:01.247387 00700000 ################################################################
2223 15:47:01.247533
2224 15:47:01.797403 00780000 ################################################################
2225 15:47:01.797576
2226 15:47:02.007281 00800000 ######################## done.
2227 15:47:02.007454
2228 15:47:02.010332 Sending tftp read request... done.
2229 15:47:02.010422
2230 15:47:02.014155 Waiting for the transfer...
2231 15:47:02.014285
2232 15:47:02.014354 00000000 # done.
2233 15:47:02.014420
2234 15:47:02.023892 Command line loaded dynamically from TFTP file: 9406192/tftp-deploy-m827jeoj/kernel/cmdline
2235 15:47:02.024026
2236 15:47:02.036908 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2237 15:47:02.041234
2238 15:47:02.044671 Shutting down all USB controllers.
2239 15:47:02.044771
2240 15:47:02.044841 Removing current net device
2241 15:47:02.044914
2242 15:47:02.047642 Finalizing coreboot
2243 15:47:02.047773
2244 15:47:02.054165 Exiting depthcharge with code 4 at timestamp: 28982528
2245 15:47:02.054271
2246 15:47:02.054351
2247 15:47:02.054416 Starting kernel ...
2248 15:47:02.054477
2249 15:47:02.054883 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2250 15:47:02.054991 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2251 15:47:02.055104 Setting prompt string to ['Linux version [0-9]']
2252 15:47:02.055180 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2253 15:47:02.055257 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2254 15:47:02.057230
2256 15:51:24.055215 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2258 15:51:24.055508 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2260 15:51:24.055697 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2263 15:51:24.056023 end: 2 depthcharge-action (duration 00:05:00) [common]
2265 15:51:24.056295 Cleaning after the job
2266 15:51:24.056386 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406192/tftp-deploy-m827jeoj/ramdisk
2267 15:51:24.057063 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406192/tftp-deploy-m827jeoj/kernel
2268 15:51:24.057737 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406192/tftp-deploy-m827jeoj/modules
2269 15:51:24.057929 start: 5.1 power-off (timeout 00:00:30) [common]
2270 15:51:24.058078 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2271 15:51:26.234348 >> Command sent successfully.
2272 15:51:26.243653 Returned 0 in 2 seconds
2273 15:51:26.345353 end: 5.1 power-off (duration 00:00:02) [common]
2275 15:51:26.346918 start: 5.2 read-feedback (timeout 00:09:58) [common]
2276 15:51:26.348064 Listened to connection for namespace 'common' for up to 1s
2277 15:51:27.351991 Finalising connection for namespace 'common'
2278 15:51:27.352635 Disconnecting from shell: Finalise
2279 15:51:27.353048
2280 15:51:27.454363 end: 5.2 read-feedback (duration 00:00:01) [common]
2281 15:51:27.454914 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9406192
2282 15:51:27.478573 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9406192
2283 15:51:27.479047 JobError: Your job cannot terminate cleanly.