Boot log: asus-C436FA-Flip-hatch

    1 15:42:38.605017  lava-dispatcher, installed at version: 2022.11
    2 15:42:38.605224  start: 0 validate
    3 15:42:38.605359  Start time: 2023-03-03 15:42:38.605353+00:00 (UTC)
    4 15:42:38.605507  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:42:38.605633  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230224.0%2Famd64%2Finitrd.cpio.gz exists
    6 15:42:38.881374  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:42:38.881560  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:42:39.156645  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:42:39.156813  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230224.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 15:42:39.430584  Using caching service: 'http://localhost/cache/?uri=%s'
   11 15:42:39.430830  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 15:42:39.699546  validate duration: 1.09
   14 15:42:39.699866  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 15:42:39.699981  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 15:42:39.700088  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 15:42:39.700186  Not decompressing ramdisk as can be used compressed.
   18 15:42:39.700328  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230224.0/amd64/initrd.cpio.gz
   19 15:42:39.700400  saving as /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/ramdisk/initrd.cpio.gz
   20 15:42:39.700466  total size: 5432116 (5MB)
   21 15:42:39.701582  progress   0% (0MB)
   22 15:42:39.703155  progress   5% (0MB)
   23 15:42:39.704591  progress  10% (0MB)
   24 15:42:39.706078  progress  15% (0MB)
   25 15:42:39.707656  progress  20% (1MB)
   26 15:42:39.709048  progress  25% (1MB)
   27 15:42:39.710458  progress  30% (1MB)
   28 15:42:39.712016  progress  35% (1MB)
   29 15:42:39.713420  progress  40% (2MB)
   30 15:42:39.714829  progress  45% (2MB)
   31 15:42:39.716233  progress  50% (2MB)
   32 15:42:39.717781  progress  55% (2MB)
   33 15:42:39.719186  progress  60% (3MB)
   34 15:42:39.720588  progress  65% (3MB)
   35 15:42:39.722162  progress  70% (3MB)
   36 15:42:39.723548  progress  75% (3MB)
   37 15:42:39.724960  progress  80% (4MB)
   38 15:42:39.726348  progress  85% (4MB)
   39 15:42:39.727926  progress  90% (4MB)
   40 15:42:39.729312  progress  95% (4MB)
   41 15:42:39.730730  progress 100% (5MB)
   42 15:42:39.731015  5MB downloaded in 0.03s (169.61MB/s)
   43 15:42:39.731200  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 15:42:39.731471  end: 1.1 download-retry (duration 00:00:00) [common]
   46 15:42:39.731564  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 15:42:39.731663  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 15:42:39.731784  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 15:42:39.731860  saving as /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/kernel/bzImage
   50 15:42:39.731941  total size: 9707520 (9MB)
   51 15:42:39.732006  No compression specified
   52 15:42:39.733116  progress   0% (0MB)
   53 15:42:39.735688  progress   5% (0MB)
   54 15:42:39.738333  progress  10% (0MB)
   55 15:42:39.740924  progress  15% (1MB)
   56 15:42:39.743518  progress  20% (1MB)
   57 15:42:39.746099  progress  25% (2MB)
   58 15:42:39.748512  progress  30% (2MB)
   59 15:42:39.751120  progress  35% (3MB)
   60 15:42:39.753699  progress  40% (3MB)
   61 15:42:39.756292  progress  45% (4MB)
   62 15:42:39.758857  progress  50% (4MB)
   63 15:42:39.761264  progress  55% (5MB)
   64 15:42:39.763808  progress  60% (5MB)
   65 15:42:39.766337  progress  65% (6MB)
   66 15:42:39.768892  progress  70% (6MB)
   67 15:42:39.771428  progress  75% (6MB)
   68 15:42:39.773845  progress  80% (7MB)
   69 15:42:39.776445  progress  85% (7MB)
   70 15:42:39.779044  progress  90% (8MB)
   71 15:42:39.781649  progress  95% (8MB)
   72 15:42:39.784288  progress 100% (9MB)
   73 15:42:39.784512  9MB downloaded in 0.05s (176.12MB/s)
   74 15:42:39.784688  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 15:42:39.784962  end: 1.2 download-retry (duration 00:00:00) [common]
   77 15:42:39.785056  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 15:42:39.785152  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 15:42:39.785280  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230224.0/amd64/full.rootfs.tar.xz
   80 15:42:39.785351  saving as /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/nfsrootfs/full.rootfs.tar
   81 15:42:39.785427  total size: 133373888 (127MB)
   82 15:42:39.785493  Using unxz to decompress xz
   83 15:42:39.789097  progress   0% (0MB)
   84 15:42:40.146982  progress   5% (6MB)
   85 15:42:40.533153  progress  10% (12MB)
   86 15:42:40.855421  progress  15% (19MB)
   87 15:42:41.069123  progress  20% (25MB)
   88 15:42:41.333384  progress  25% (31MB)
   89 15:42:41.701123  progress  30% (38MB)
   90 15:42:42.070357  progress  35% (44MB)
   91 15:42:42.507088  progress  40% (50MB)
   92 15:42:42.920841  progress  45% (57MB)
   93 15:42:43.306089  progress  50% (63MB)
   94 15:42:43.699900  progress  55% (69MB)
   95 15:42:44.090461  progress  60% (76MB)
   96 15:42:44.487357  progress  65% (82MB)
   97 15:42:44.889474  progress  70% (89MB)
   98 15:42:45.278074  progress  75% (95MB)
   99 15:42:45.761827  progress  80% (101MB)
  100 15:42:46.236528  progress  85% (108MB)
  101 15:42:46.537525  progress  90% (114MB)
  102 15:42:46.911051  progress  95% (120MB)
  103 15:42:47.333785  progress 100% (127MB)
  104 15:42:47.339175  127MB downloaded in 7.55s (16.84MB/s)
  105 15:42:47.339457  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 15:42:47.339734  end: 1.3 download-retry (duration 00:00:08) [common]
  108 15:42:47.339836  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 15:42:47.339929  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 15:42:47.340046  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 15:42:47.340122  saving as /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/modules/modules.tar
  112 15:42:47.340186  total size: 64716 (0MB)
  113 15:42:47.340253  Using unxz to decompress xz
  114 15:42:47.343680  progress  50% (0MB)
  115 15:42:47.344095  progress 100% (0MB)
  116 15:42:47.348456  0MB downloaded in 0.01s (7.47MB/s)
  117 15:42:47.348712  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 15:42:47.348998  end: 1.4 download-retry (duration 00:00:00) [common]
  120 15:42:47.349101  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 15:42:47.349207  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 15:42:48.663878  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9406236/extract-nfsrootfs-oimu4jlz
  123 15:42:48.664076  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  124 15:42:48.664183  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  125 15:42:48.664322  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5
  126 15:42:48.664426  makedir: /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin
  127 15:42:48.664513  makedir: /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/tests
  128 15:42:48.664595  makedir: /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/results
  129 15:42:48.664695  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-add-keys
  130 15:42:48.664824  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-add-sources
  131 15:42:48.664939  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-background-process-start
  132 15:42:48.665058  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-background-process-stop
  133 15:42:48.665177  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-common-functions
  134 15:42:48.665288  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-echo-ipv4
  135 15:42:48.665400  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-install-packages
  136 15:42:48.665520  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-installed-packages
  137 15:42:48.665634  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-os-build
  138 15:42:48.665749  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-probe-channel
  139 15:42:48.665859  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-probe-ip
  140 15:42:48.665969  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-target-ip
  141 15:42:48.666086  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-target-mac
  142 15:42:48.666198  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-target-storage
  143 15:42:48.666312  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-test-case
  144 15:42:48.666423  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-test-event
  145 15:42:48.666532  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-test-feedback
  146 15:42:48.666641  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-test-raise
  147 15:42:48.666750  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-test-reference
  148 15:42:48.666860  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-test-runner
  149 15:42:48.666968  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-test-set
  150 15:42:48.667078  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-test-shell
  151 15:42:48.667190  Updating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-install-packages (oe)
  152 15:42:48.667309  Updating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/bin/lava-installed-packages (oe)
  153 15:42:48.667423  Creating /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/environment
  154 15:42:48.667526  LAVA metadata
  155 15:42:48.667596  - LAVA_JOB_ID=9406236
  156 15:42:48.667661  - LAVA_DISPATCHER_IP=192.168.201.1
  157 15:42:48.667762  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  158 15:42:48.667839  skipped lava-vland-overlay
  159 15:42:48.667917  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  160 15:42:48.667999  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  161 15:42:48.668063  skipped lava-multinode-overlay
  162 15:42:48.668138  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  163 15:42:48.668219  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  164 15:42:48.668292  Loading test definitions
  165 15:42:48.668382  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
  166 15:42:48.668454  Using /lava-9406236 at stage 0
  167 15:42:48.668716  uuid=9406236_1.5.2.3.1 testdef=None
  168 15:42:48.668809  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  169 15:42:48.668898  start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
  170 15:42:48.669397  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  172 15:42:48.669640  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
  173 15:42:48.670248  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  175 15:42:48.670496  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
  176 15:42:48.671044  runner path: /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/0/tests/0_dmesg test_uuid 9406236_1.5.2.3.1
  177 15:42:48.671193  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  179 15:42:48.671450  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
  180 15:42:48.671526  Using /lava-9406236 at stage 1
  181 15:42:48.671779  uuid=9406236_1.5.2.3.5 testdef=None
  182 15:42:48.671871  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  183 15:42:48.671960  start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
  184 15:42:48.672411  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  186 15:42:48.672686  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
  187 15:42:48.673385  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  189 15:42:48.673644  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
  190 15:42:48.674263  runner path: /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/1/tests/1_bootrr test_uuid 9406236_1.5.2.3.5
  191 15:42:48.674411  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  193 15:42:48.674626  Creating lava-test-runner.conf files
  194 15:42:48.674691  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/0 for stage 0
  195 15:42:48.674774  - 0_dmesg
  196 15:42:48.674853  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406236/lava-overlay-3dkja9i5/lava-9406236/1 for stage 1
  197 15:42:48.674937  - 1_bootrr
  198 15:42:48.675031  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  199 15:42:48.675119  start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
  200 15:42:48.681248  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  201 15:42:48.681381  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
  202 15:42:48.681478  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  203 15:42:48.681570  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  204 15:42:48.681660  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
  205 15:42:48.789830  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  206 15:42:48.790241  start: 1.5.4 extract-modules (timeout 00:09:51) [common]
  207 15:42:48.790367  extracting modules file /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406236/extract-nfsrootfs-oimu4jlz
  208 15:42:48.794646  extracting modules file /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406236/extract-overlay-ramdisk-l5rfcyuc/ramdisk
  209 15:42:48.798676  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  210 15:42:48.798806  start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
  211 15:42:48.798900  [common] Applying overlay to NFS
  212 15:42:48.798981  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9406236/compress-overlay-pfrtqbin/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9406236/extract-nfsrootfs-oimu4jlz
  213 15:42:48.803104  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  214 15:42:48.803229  start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
  215 15:42:48.803323  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  216 15:42:48.803429  start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
  217 15:42:48.803525  Building ramdisk /var/lib/lava/dispatcher/tmp/9406236/extract-overlay-ramdisk-l5rfcyuc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9406236/extract-overlay-ramdisk-l5rfcyuc/ramdisk
  218 15:42:48.838477  >> 24777 blocks

  219 15:42:49.322115  rename /var/lib/lava/dispatcher/tmp/9406236/extract-overlay-ramdisk-l5rfcyuc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/ramdisk/ramdisk.cpio.gz
  220 15:42:49.322560  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  221 15:42:49.322706  start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
  222 15:42:49.322826  start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
  223 15:42:49.322940  No mkimage arch provided, not using FIT.
  224 15:42:49.323049  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  225 15:42:49.323153  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  226 15:42:49.323270  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  227 15:42:49.323379  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
  228 15:42:49.323480  No LXC device requested
  229 15:42:49.323573  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  230 15:42:49.323676  start: 1.7 deploy-device-env (timeout 00:09:50) [common]
  231 15:42:49.323778  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  232 15:42:49.323855  Checking files for TFTP limit of 4294967296 bytes.
  233 15:42:49.324291  end: 1 tftp-deploy (duration 00:00:10) [common]
  234 15:42:49.324408  start: 2 depthcharge-action (timeout 00:05:00) [common]
  235 15:42:49.324527  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  236 15:42:49.324667  substitutions:
  237 15:42:49.324753  - {DTB}: None
  238 15:42:49.324823  - {INITRD}: 9406236/tftp-deploy-gplx1_wg/ramdisk/ramdisk.cpio.gz
  239 15:42:49.324887  - {KERNEL}: 9406236/tftp-deploy-gplx1_wg/kernel/bzImage
  240 15:42:49.324970  - {LAVA_MAC}: None
  241 15:42:49.325033  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9406236/extract-nfsrootfs-oimu4jlz
  242 15:42:49.325094  - {NFS_SERVER_IP}: 192.168.201.1
  243 15:42:49.325157  - {PRESEED_CONFIG}: None
  244 15:42:49.325237  - {PRESEED_LOCAL}: None
  245 15:42:49.325297  - {RAMDISK}: 9406236/tftp-deploy-gplx1_wg/ramdisk/ramdisk.cpio.gz
  246 15:42:49.325355  - {ROOT_PART}: None
  247 15:42:49.325413  - {ROOT}: None
  248 15:42:49.325494  - {SERVER_IP}: 192.168.201.1
  249 15:42:49.325554  - {TEE}: None
  250 15:42:49.325612  Parsed boot commands:
  251 15:42:49.325670  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  252 15:42:49.325845  Parsed boot commands: tftpboot 192.168.201.1 9406236/tftp-deploy-gplx1_wg/kernel/bzImage 9406236/tftp-deploy-gplx1_wg/kernel/cmdline 9406236/tftp-deploy-gplx1_wg/ramdisk/ramdisk.cpio.gz
  253 15:42:49.325952  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  254 15:42:49.326052  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  255 15:42:49.326158  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  256 15:42:49.326264  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  257 15:42:49.326338  Not connected, no need to disconnect.
  258 15:42:49.326422  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  259 15:42:49.326525  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  260 15:42:49.326601  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
  261 15:42:49.329639  Setting prompt string to ['lava-test: # ']
  262 15:42:49.329991  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  263 15:42:49.330122  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  264 15:42:49.330232  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  265 15:42:49.330340  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  266 15:42:49.330539  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  267 15:42:58.653981  >> Command sent successfully.

  268 15:42:58.656097  Returned 0 in 9 seconds
  269 15:42:58.756847  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  271 15:42:58.757178  end: 2.2.2 reset-device (duration 00:00:09) [common]
  272 15:42:58.757295  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  273 15:42:58.757388  Setting prompt string to 'Starting depthcharge on Helios...'
  274 15:42:58.757465  Changing prompt to 'Starting depthcharge on Helios...'
  275 15:42:58.757538  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  276 15:42:58.757836  [Enter `^Ec?' for help]

  277 15:42:58.757921  

  278 15:42:58.758004  

  279 15:42:58.758116  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  280 15:42:58.758193  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  281 15:42:58.758259  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  282 15:42:58.758326  CPU: AES supported, TXT NOT supported, VT supported

  283 15:42:58.758387  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  284 15:42:58.758447  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  285 15:42:58.758522  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  286 15:42:58.758582  VBOOT: Loading verstage.

  287 15:42:58.758645  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  288 15:42:58.758706  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  289 15:42:58.758765  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  290 15:42:58.758823  CBFS @ c08000 size 3f8000

  291 15:42:58.758902  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  292 15:42:58.758963  CBFS: Locating 'fallback/verstage'

  293 15:42:58.759021  CBFS: Found @ offset 10fb80 size 1072c

  294 15:42:58.759081  

  295 15:42:58.759141  

  296 15:42:58.759203  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  297 15:42:58.759263  Probing TPM: . done!

  298 15:42:58.759324  TPM ready after 0 ms

  299 15:42:58.759383  Connected to device vid:did:rid of 1ae0:0028:00

  300 15:42:58.759441  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  301 15:42:58.759506  Initialized TPM device CR50 revision 0

  302 15:42:58.759579  tlcl_send_startup: Startup return code is 0

  303 15:42:58.759639  TPM: setup succeeded

  304 15:42:58.759697  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  305 15:42:58.759756  Chrome EC: UHEPI supported

  306 15:42:58.759817  Phase 1

  307 15:42:58.759874  FMAP: area GBB found @ c05000 (12288 bytes)

  308 15:42:58.759946  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  309 15:42:58.760008  Phase 2

  310 15:42:58.760069  Phase 3

  311 15:42:58.760127  FMAP: area GBB found @ c05000 (12288 bytes)

  312 15:42:58.760184  VB2:vb2_report_dev_firmware() This is developer signed firmware

  313 15:42:58.760245  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  314 15:42:58.760319  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  315 15:42:58.760378  VB2:vb2_verify_keyblock() Checking keyblock signature...

  316 15:42:58.760437  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  317 15:42:58.760494  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  318 15:42:58.760557  VB2:vb2_verify_fw_preamble() Verifying preamble.

  319 15:42:58.760626  Phase 4

  320 15:42:58.760686  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  321 15:42:58.760745  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  322 15:42:58.760809  VB2:vb2_rsa_verify_digest() Digest check failed!

  323 15:42:58.760866  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  324 15:42:58.760924  Saving nvdata

  325 15:42:58.760995  Reboot requested (10020007)

  326 15:42:58.761059  board_reset() called!

  327 15:42:58.761117  full_reset() called!

  328 15:43:02.334895  

  329 15:43:02.335041  

  330 15:43:02.344990  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  331 15:43:02.347810  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  332 15:43:02.354522  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  333 15:43:02.357957  CPU: AES supported, TXT NOT supported, VT supported

  334 15:43:02.364333  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  335 15:43:02.367732  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  336 15:43:02.374195  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  337 15:43:02.377686  VBOOT: Loading verstage.

  338 15:43:02.380564  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  339 15:43:02.387570  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  340 15:43:02.394010  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  341 15:43:02.394156  CBFS @ c08000 size 3f8000

  342 15:43:02.400515  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  343 15:43:02.404009  CBFS: Locating 'fallback/verstage'

  344 15:43:02.406853  CBFS: Found @ offset 10fb80 size 1072c

  345 15:43:02.411787  

  346 15:43:02.411883  

  347 15:43:02.421053  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  348 15:43:02.435380  Probing TPM: . done!

  349 15:43:02.438805  TPM ready after 0 ms

  350 15:43:02.442227  Connected to device vid:did:rid of 1ae0:0028:00

  351 15:43:02.452218  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  352 15:43:02.455699  Initialized TPM device CR50 revision 0

  353 15:43:02.497791  tlcl_send_startup: Startup return code is 0

  354 15:43:02.497937  TPM: setup succeeded

  355 15:43:02.511146  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  356 15:43:02.514822  Chrome EC: UHEPI supported

  357 15:43:02.517681  Phase 1

  358 15:43:02.521294  FMAP: area GBB found @ c05000 (12288 bytes)

  359 15:43:02.527655  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  360 15:43:02.534125  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  361 15:43:02.537573  Recovery requested (1009000e)

  362 15:43:02.543849  Saving nvdata

  363 15:43:02.548815  tlcl_extend: response is 0

  364 15:43:02.558724  tlcl_extend: response is 0

  365 15:43:02.565687  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  366 15:43:02.568384  CBFS @ c08000 size 3f8000

  367 15:43:02.575385  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  368 15:43:02.578849  CBFS: Locating 'fallback/romstage'

  369 15:43:02.581802  CBFS: Found @ offset 80 size 145fc

  370 15:43:02.585446  Accumulated console time in verstage 98 ms

  371 15:43:02.585563  

  372 15:43:02.588246  

  373 15:43:02.598056  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  374 15:43:02.604584  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  375 15:43:02.608170  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  376 15:43:02.611699  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  377 15:43:02.618083  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  378 15:43:02.621025  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  379 15:43:02.624643  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  380 15:43:02.628192  TCO_STS:   0000 0000

  381 15:43:02.631014  GEN_PMCON: e0015238 00000200

  382 15:43:02.634488  GBLRST_CAUSE: 00000000 00000000

  383 15:43:02.637333  prev_sleep_state 5

  384 15:43:02.640986  Boot Count incremented to 49756

  385 15:43:02.644548  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  386 15:43:02.647335  CBFS @ c08000 size 3f8000

  387 15:43:02.654483  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  388 15:43:02.657314  CBFS: Locating 'fspm.bin'

  389 15:43:02.660825  CBFS: Found @ offset 5ffc0 size 71000

  390 15:43:02.664352  Chrome EC: UHEPI supported

  391 15:43:02.670686  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  392 15:43:02.674756  Probing TPM:  done!

  393 15:43:02.681595  Connected to device vid:did:rid of 1ae0:0028:00

  394 15:43:02.691557  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  395 15:43:02.697016  Initialized TPM device CR50 revision 0

  396 15:43:02.706421  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  397 15:43:02.716626  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  398 15:43:02.716749  MRC cache found, size 1948

  399 15:43:02.719522  bootmode is set to: 2

  400 15:43:02.723079  PRMRR disabled by config.

  401 15:43:02.725963  SPD INDEX = 1

  402 15:43:02.729513  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  403 15:43:02.732465  CBFS @ c08000 size 3f8000

  404 15:43:02.739046  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  405 15:43:02.739143  CBFS: Locating 'spd.bin'

  406 15:43:02.742578  CBFS: Found @ offset 5fb80 size 400

  407 15:43:02.746205  SPD: module type is LPDDR3

  408 15:43:02.749191  SPD: module part is 

  409 15:43:02.755679  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  410 15:43:02.759276  SPD: device width 4 bits, bus width 8 bits

  411 15:43:02.762235  SPD: module size is 4096 MB (per channel)

  412 15:43:02.765587  memory slot: 0 configuration done.

  413 15:43:02.772494  memory slot: 2 configuration done.

  414 15:43:02.820608  CBMEM:

  415 15:43:02.823969  IMD: root @ 99fff000 254 entries.

  416 15:43:02.827475  IMD: root @ 99ffec00 62 entries.

  417 15:43:02.830310  External stage cache:

  418 15:43:02.833956  IMD: root @ 9abff000 254 entries.

  419 15:43:02.837019  IMD: root @ 9abfec00 62 entries.

  420 15:43:02.844089  Chrome EC: clear events_b mask to 0x0000000020004000

  421 15:43:02.856651  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  422 15:43:02.869211  tlcl_write: response is 0

  423 15:43:02.878748  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  424 15:43:02.884917  MRC: TPM MRC hash updated successfully.

  425 15:43:02.885016  2 DIMMs found

  426 15:43:02.888475  SMM Memory Map

  427 15:43:02.892097  SMRAM       : 0x9a000000 0x1000000

  428 15:43:02.894824   Subregion 0: 0x9a000000 0xa00000

  429 15:43:02.898340   Subregion 1: 0x9aa00000 0x200000

  430 15:43:02.901857   Subregion 2: 0x9ac00000 0x400000

  431 15:43:02.904887  top_of_ram = 0x9a000000

  432 15:43:02.908337  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  433 15:43:02.914569  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  434 15:43:02.918496  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  435 15:43:02.924862  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  436 15:43:02.927751  CBFS @ c08000 size 3f8000

  437 15:43:02.931269  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  438 15:43:02.937610  CBFS: Locating 'fallback/postcar'

  439 15:43:02.941341  CBFS: Found @ offset 107000 size 4b44

  440 15:43:02.947260  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  441 15:43:02.957997  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  442 15:43:02.960952  Processing 180 relocs. Offset value of 0x97c0c000

  443 15:43:02.969725  Accumulated console time in romstage 286 ms

  444 15:43:02.969815  

  445 15:43:02.969887  

  446 15:43:02.979406  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  447 15:43:02.985798  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  448 15:43:02.989321  CBFS @ c08000 size 3f8000

  449 15:43:02.995845  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  450 15:43:02.998748  CBFS: Locating 'fallback/ramstage'

  451 15:43:03.002262  CBFS: Found @ offset 43380 size 1b9e8

  452 15:43:03.008929  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  453 15:43:03.041254  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  454 15:43:03.044754  Processing 3976 relocs. Offset value of 0x98db0000

  455 15:43:03.051148  Accumulated console time in postcar 52 ms

  456 15:43:03.051242  

  457 15:43:03.051313  

  458 15:43:03.061004  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  459 15:43:03.067261  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  460 15:43:03.070620  WARNING: RO_VPD is uninitialized or empty.

  461 15:43:03.074087  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  462 15:43:03.080959  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  463 15:43:03.081050  Normal boot.

  464 15:43:03.087326  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  465 15:43:03.090983  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  466 15:43:03.093935  CBFS @ c08000 size 3f8000

  467 15:43:03.100233  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  468 15:43:03.103718  CBFS: Locating 'cpu_microcode_blob.bin'

  469 15:43:03.107302  CBFS: Found @ offset 14700 size 2ec00

  470 15:43:03.110158  microcode: sig=0x806ec pf=0x4 revision=0xc9

  471 15:43:03.113630  Skip microcode update

  472 15:43:03.120172  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  473 15:43:03.120273  CBFS @ c08000 size 3f8000

  474 15:43:03.126576  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  475 15:43:03.129915  CBFS: Locating 'fsps.bin'

  476 15:43:03.133447  CBFS: Found @ offset d1fc0 size 35000

  477 15:43:03.159608  Detected 4 core, 8 thread CPU.

  478 15:43:03.162384  Setting up SMI for CPU

  479 15:43:03.166038  IED base = 0x9ac00000

  480 15:43:03.169350  IED size = 0x00400000

  481 15:43:03.169448  Will perform SMM setup.

  482 15:43:03.175502  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  483 15:43:03.182407  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  484 15:43:03.189034  Processing 16 relocs. Offset value of 0x00030000

  485 15:43:03.189121  Attempting to start 7 APs

  486 15:43:03.195239  Waiting for 10ms after sending INIT.

  487 15:43:03.209011  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  488 15:43:03.209118  done.

  489 15:43:03.212519  AP: slot 6 apic_id 5.

  490 15:43:03.215406  AP: slot 7 apic_id 4.

  491 15:43:03.215499  AP: slot 4 apic_id 3.

  492 15:43:03.218980  AP: slot 1 apic_id 2.

  493 15:43:03.222657  AP: slot 5 apic_id 7.

  494 15:43:03.222740  AP: slot 2 apic_id 6.

  495 15:43:03.228752  Waiting for 2nd SIPI to complete...done.

  496 15:43:03.235871  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  497 15:43:03.242384  Processing 13 relocs. Offset value of 0x00038000

  498 15:43:03.248877  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  499 15:43:03.251752  Installing SMM handler to 0x9a000000

  500 15:43:03.258839  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  501 15:43:03.265368  Processing 658 relocs. Offset value of 0x9a010000

  502 15:43:03.271637  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  503 15:43:03.275212  Processing 13 relocs. Offset value of 0x9a008000

  504 15:43:03.281440  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  505 15:43:03.288556  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  506 15:43:03.294967  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  507 15:43:03.298389  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  508 15:43:03.304847  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  509 15:43:03.311259  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  510 15:43:03.317641  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  511 15:43:03.324725  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  512 15:43:03.327590  Clearing SMI status registers

  513 15:43:03.327711  SMI_STS: PM1 

  514 15:43:03.331164  PM1_STS: PWRBTN 

  515 15:43:03.331255  TCO_STS: SECOND_TO 

  516 15:43:03.334040  New SMBASE 0x9a000000

  517 15:43:03.337563  In relocation handler: CPU 0

  518 15:43:03.341020  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  519 15:43:03.347588  Writing SMRR. base = 0x9a000006, mask=0xff000800

  520 15:43:03.347676  Relocation complete.

  521 15:43:03.350476  New SMBASE 0x99fff400

  522 15:43:03.353972  In relocation handler: CPU 3

  523 15:43:03.357504  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  524 15:43:03.364049  Writing SMRR. base = 0x9a000006, mask=0xff000800

  525 15:43:03.364146  Relocation complete.

  526 15:43:03.366780  New SMBASE 0x99fffc00

  527 15:43:03.370247  In relocation handler: CPU 1

  528 15:43:03.373632  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  529 15:43:03.380451  Writing SMRR. base = 0x9a000006, mask=0xff000800

  530 15:43:03.380537  Relocation complete.

  531 15:43:03.383152  New SMBASE 0x99fff000

  532 15:43:03.386542  In relocation handler: CPU 4

  533 15:43:03.390056  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  534 15:43:03.396193  Writing SMRR. base = 0x9a000006, mask=0xff000800

  535 15:43:03.396289  Relocation complete.

  536 15:43:03.399779  New SMBASE 0x99fff800

  537 15:43:03.403411  In relocation handler: CPU 2

  538 15:43:03.406135  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  539 15:43:03.413183  Writing SMRR. base = 0x9a000006, mask=0xff000800

  540 15:43:03.413273  Relocation complete.

  541 15:43:03.416034  New SMBASE 0x99ffec00

  542 15:43:03.419601  In relocation handler: CPU 5

  543 15:43:03.422476  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  544 15:43:03.429040  Writing SMRR. base = 0x9a000006, mask=0xff000800

  545 15:43:03.429139  Relocation complete.

  546 15:43:03.432533  New SMBASE 0x99ffe400

  547 15:43:03.435834  In relocation handler: CPU 7

  548 15:43:03.439421  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  549 15:43:03.445754  Writing SMRR. base = 0x9a000006, mask=0xff000800

  550 15:43:03.445847  Relocation complete.

  551 15:43:03.449385  New SMBASE 0x99ffe800

  552 15:43:03.452317  In relocation handler: CPU 6

  553 15:43:03.455838  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  554 15:43:03.462214  Writing SMRR. base = 0x9a000006, mask=0xff000800

  555 15:43:03.462330  Relocation complete.

  556 15:43:03.465098  Initializing CPU #0

  557 15:43:03.468704  CPU: vendor Intel device 806ec

  558 15:43:03.472270  CPU: family 06, model 8e, stepping 0c

  559 15:43:03.475131  Clearing out pending MCEs

  560 15:43:03.478603  Setting up local APIC...

  561 15:43:03.478694   apic_id: 0x00 done.

  562 15:43:03.482025  Turbo is available but hidden

  563 15:43:03.485468  Turbo is available and visible

  564 15:43:03.488320  VMX status: enabled

  565 15:43:03.491870  IA32_FEATURE_CONTROL status: locked

  566 15:43:03.495299  Skip microcode update

  567 15:43:03.495399  CPU #0 initialized

  568 15:43:03.498000  Initializing CPU #3

  569 15:43:03.498090  Initializing CPU #4

  570 15:43:03.501481  Initializing CPU #1

  571 15:43:03.505123  CPU: vendor Intel device 806ec

  572 15:43:03.507832  CPU: family 06, model 8e, stepping 0c

  573 15:43:03.511483  CPU: vendor Intel device 806ec

  574 15:43:03.515554  CPU: family 06, model 8e, stepping 0c

  575 15:43:03.517781  Clearing out pending MCEs

  576 15:43:03.521337  Clearing out pending MCEs

  577 15:43:03.525065  Setting up local APIC...

  578 15:43:03.525157  Initializing CPU #2

  579 15:43:03.527859  Initializing CPU #5

  580 15:43:03.531374  CPU: vendor Intel device 806ec

  581 15:43:03.534828  CPU: family 06, model 8e, stepping 0c

  582 15:43:03.538109  CPU: vendor Intel device 806ec

  583 15:43:03.540962  CPU: family 06, model 8e, stepping 0c

  584 15:43:03.544501  Clearing out pending MCEs

  585 15:43:03.547876  Clearing out pending MCEs

  586 15:43:03.551419  CPU: vendor Intel device 806ec

  587 15:43:03.554197  CPU: family 06, model 8e, stepping 0c

  588 15:43:03.554282  Setting up local APIC...

  589 15:43:03.557679  Initializing CPU #6

  590 15:43:03.561204  Initializing CPU #7

  591 15:43:03.563987  CPU: vendor Intel device 806ec

  592 15:43:03.567684  CPU: family 06, model 8e, stepping 0c

  593 15:43:03.570489  CPU: vendor Intel device 806ec

  594 15:43:03.574029  CPU: family 06, model 8e, stepping 0c

  595 15:43:03.577430  Clearing out pending MCEs

  596 15:43:03.577521  Clearing out pending MCEs

  597 15:43:03.580862  Setting up local APIC...

  598 15:43:03.584327  Setting up local APIC...

  599 15:43:03.587183   apic_id: 0x05 done.

  600 15:43:03.587316  Setting up local APIC...

  601 15:43:03.590610   apic_id: 0x01 done.

  602 15:43:03.594027  VMX status: enabled

  603 15:43:03.594122   apic_id: 0x04 done.

  604 15:43:03.597468  IA32_FEATURE_CONTROL status: locked

  605 15:43:03.600262  VMX status: enabled

  606 15:43:03.603852  Skip microcode update

  607 15:43:03.607341  IA32_FEATURE_CONTROL status: locked

  608 15:43:03.607425  CPU #6 initialized

  609 15:43:03.610128  Skip microcode update

  610 15:43:03.613737  Clearing out pending MCEs

  611 15:43:03.617191   apic_id: 0x06 done.

  612 15:43:03.617274  Setting up local APIC...

  613 15:43:03.620089   apic_id: 0x02 done.

  614 15:43:03.623602  Setting up local APIC...

  615 15:43:03.623681  CPU #7 initialized

  616 15:43:03.627180  VMX status: enabled

  617 15:43:03.630018   apic_id: 0x07 done.

  618 15:43:03.633535  IA32_FEATURE_CONTROL status: locked

  619 15:43:03.633627  VMX status: enabled

  620 15:43:03.637045  Skip microcode update

  621 15:43:03.639883  IA32_FEATURE_CONTROL status: locked

  622 15:43:03.643379  CPU #2 initialized

  623 15:43:03.643479  Skip microcode update

  624 15:43:03.646968  VMX status: enabled

  625 15:43:03.649798   apic_id: 0x03 done.

  626 15:43:03.653373  IA32_FEATURE_CONTROL status: locked

  627 15:43:03.653468  VMX status: enabled

  628 15:43:03.656225  Skip microcode update

  629 15:43:03.659668  IA32_FEATURE_CONTROL status: locked

  630 15:43:03.663195  CPU #1 initialized

  631 15:43:03.663280  Skip microcode update

  632 15:43:03.666537  CPU #5 initialized

  633 15:43:03.670132  VMX status: enabled

  634 15:43:03.670216  CPU #4 initialized

  635 15:43:03.672957  IA32_FEATURE_CONTROL status: locked

  636 15:43:03.676474  Skip microcode update

  637 15:43:03.679919  CPU #3 initialized

  638 15:43:03.682546  bsp_do_flight_plan done after 452 msecs.

  639 15:43:03.686000  CPU: frequency set to 4200 MHz

  640 15:43:03.686103  Enabling SMIs.

  641 15:43:03.689276  Locking SMM.

  642 15:43:03.703273  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  643 15:43:03.706687  CBFS @ c08000 size 3f8000

  644 15:43:03.713127  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  645 15:43:03.713238  CBFS: Locating 'vbt.bin'

  646 15:43:03.719484  CBFS: Found @ offset 5f5c0 size 499

  647 15:43:03.723169  Found a VBT of 4608 bytes after decompression

  648 15:43:03.908780  Display FSP Version Info HOB

  649 15:43:03.912276  Reference Code - CPU = 9.0.1e.30

  650 15:43:03.915143  uCode Version = 0.0.0.ca

  651 15:43:03.918715  TXT ACM version = ff.ff.ff.ffff

  652 15:43:03.922023  Display FSP Version Info HOB

  653 15:43:03.924783  Reference Code - ME = 9.0.1e.30

  654 15:43:03.928394  MEBx version = 0.0.0.0

  655 15:43:03.931234  ME Firmware Version = Consumer SKU

  656 15:43:03.934700  Display FSP Version Info HOB

  657 15:43:03.938281  Reference Code - CML PCH = 9.0.1e.30

  658 15:43:03.941755  PCH-CRID Status = Disabled

  659 15:43:03.944514  PCH-CRID Original Value = ff.ff.ff.ffff

  660 15:43:03.948052  PCH-CRID New Value = ff.ff.ff.ffff

  661 15:43:03.950931  OPROM - RST - RAID = ff.ff.ff.ffff

  662 15:43:03.954444  ChipsetInit Base Version = ff.ff.ff.ffff

  663 15:43:03.957996  ChipsetInit Oem Version = ff.ff.ff.ffff

  664 15:43:03.960821  Display FSP Version Info HOB

  665 15:43:03.968044  Reference Code - SA - System Agent = 9.0.1e.30

  666 15:43:03.970859  Reference Code - MRC = 0.7.1.6c

  667 15:43:03.974428  SA - PCIe Version = 9.0.1e.30

  668 15:43:03.974529  SA-CRID Status = Disabled

  669 15:43:03.977900  SA-CRID Original Value = 0.0.0.c

  670 15:43:03.980694  SA-CRID New Value = 0.0.0.c

  671 15:43:03.984307  OPROM - VBIOS = ff.ff.ff.ffff

  672 15:43:03.987622  RTC Init

  673 15:43:03.990389  Set power on after power failure.

  674 15:43:03.990483  Disabling Deep S3

  675 15:43:03.993609  Disabling Deep S3

  676 15:43:03.997020  Disabling Deep S4

  677 15:43:03.997124  Disabling Deep S4

  678 15:43:04.000609  Disabling Deep S5

  679 15:43:04.000708  Disabling Deep S5

  680 15:43:04.006914  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1

  681 15:43:04.010568  Enumerating buses...

  682 15:43:04.013405  Show all devs... Before device enumeration.

  683 15:43:04.017002  Root Device: enabled 1

  684 15:43:04.020560  CPU_CLUSTER: 0: enabled 1

  685 15:43:04.020648  DOMAIN: 0000: enabled 1

  686 15:43:04.023301  APIC: 00: enabled 1

  687 15:43:04.026947  PCI: 00:00.0: enabled 1

  688 15:43:04.027042  PCI: 00:02.0: enabled 1

  689 15:43:04.029678  PCI: 00:04.0: enabled 0

  690 15:43:04.033355  PCI: 00:05.0: enabled 0

  691 15:43:04.036176  PCI: 00:12.0: enabled 1

  692 15:43:04.036259  PCI: 00:12.5: enabled 0

  693 15:43:04.040007  PCI: 00:12.6: enabled 0

  694 15:43:04.042864  PCI: 00:14.0: enabled 1

  695 15:43:04.046323  PCI: 00:14.1: enabled 0

  696 15:43:04.046409  PCI: 00:14.3: enabled 1

  697 15:43:04.049951  PCI: 00:14.5: enabled 0

  698 15:43:04.052787  PCI: 00:15.0: enabled 1

  699 15:43:04.056192  PCI: 00:15.1: enabled 1

  700 15:43:04.056275  PCI: 00:15.2: enabled 0

  701 15:43:04.059174  PCI: 00:15.3: enabled 0

  702 15:43:04.062301  PCI: 00:16.0: enabled 1

  703 15:43:04.065841  PCI: 00:16.1: enabled 0

  704 15:43:04.065926  PCI: 00:16.2: enabled 0

  705 15:43:04.069313  PCI: 00:16.3: enabled 0

  706 15:43:04.072176  PCI: 00:16.4: enabled 0

  707 15:43:04.075774  PCI: 00:16.5: enabled 0

  708 15:43:04.075872  PCI: 00:17.0: enabled 1

  709 15:43:04.078627  PCI: 00:19.0: enabled 1

  710 15:43:04.082008  PCI: 00:19.1: enabled 0

  711 15:43:04.085644  PCI: 00:19.2: enabled 0

  712 15:43:04.085746  PCI: 00:1a.0: enabled 0

  713 15:43:04.088826  PCI: 00:1c.0: enabled 0

  714 15:43:04.092305  PCI: 00:1c.1: enabled 0

  715 15:43:04.095051  PCI: 00:1c.2: enabled 0

  716 15:43:04.095144  PCI: 00:1c.3: enabled 0

  717 15:43:04.098558  PCI: 00:1c.4: enabled 0

  718 15:43:04.101946  PCI: 00:1c.5: enabled 0

  719 15:43:04.105336  PCI: 00:1c.6: enabled 0

  720 15:43:04.105426  PCI: 00:1c.7: enabled 0

  721 15:43:04.108644  PCI: 00:1d.0: enabled 1

  722 15:43:04.111523  PCI: 00:1d.1: enabled 0

  723 15:43:04.111615  PCI: 00:1d.2: enabled 0

  724 15:43:04.114975  PCI: 00:1d.3: enabled 0

  725 15:43:04.118455  PCI: 00:1d.4: enabled 0

  726 15:43:04.121913  PCI: 00:1d.5: enabled 1

  727 15:43:04.122022  PCI: 00:1e.0: enabled 1

  728 15:43:04.124761  PCI: 00:1e.1: enabled 0

  729 15:43:04.128203  PCI: 00:1e.2: enabled 1

  730 15:43:04.131738  PCI: 00:1e.3: enabled 1

  731 15:43:04.131822  PCI: 00:1f.0: enabled 1

  732 15:43:04.134581  PCI: 00:1f.1: enabled 1

  733 15:43:04.138168  PCI: 00:1f.2: enabled 1

  734 15:43:04.141021  PCI: 00:1f.3: enabled 1

  735 15:43:04.141105  PCI: 00:1f.4: enabled 1

  736 15:43:04.144677  PCI: 00:1f.5: enabled 1

  737 15:43:04.147561  PCI: 00:1f.6: enabled 0

  738 15:43:04.151159  USB0 port 0: enabled 1

  739 15:43:04.151279  I2C: 00:15: enabled 1

  740 15:43:04.153984  I2C: 00:5d: enabled 1

  741 15:43:04.157461  GENERIC: 0.0: enabled 1

  742 15:43:04.157566  I2C: 00:1a: enabled 1

  743 15:43:04.160823  I2C: 00:38: enabled 1

  744 15:43:04.164555  I2C: 00:39: enabled 1

  745 15:43:04.164648  I2C: 00:3a: enabled 1

  746 15:43:04.167388  I2C: 00:3b: enabled 1

  747 15:43:04.170923  PCI: 00:00.0: enabled 1

  748 15:43:04.171015  SPI: 00: enabled 1

  749 15:43:04.173728  SPI: 01: enabled 1

  750 15:43:04.177375  PNP: 0c09.0: enabled 1

  751 15:43:04.177467  USB2 port 0: enabled 1

  752 15:43:04.180114  USB2 port 1: enabled 1

  753 15:43:04.183949  USB2 port 2: enabled 0

  754 15:43:04.186637  USB2 port 3: enabled 0

  755 15:43:04.186725  USB2 port 5: enabled 0

  756 15:43:04.190123  USB2 port 6: enabled 1

  757 15:43:04.193496  USB2 port 9: enabled 1

  758 15:43:04.193583  USB3 port 0: enabled 1

  759 15:43:04.196996  USB3 port 1: enabled 1

  760 15:43:04.199756  USB3 port 2: enabled 1

  761 15:43:04.203171  USB3 port 3: enabled 1

  762 15:43:04.203264  USB3 port 4: enabled 0

  763 15:43:04.206672  APIC: 02: enabled 1

  764 15:43:04.210029  APIC: 06: enabled 1

  765 15:43:04.210131  APIC: 01: enabled 1

  766 15:43:04.212815  APIC: 03: enabled 1

  767 15:43:04.212910  APIC: 07: enabled 1

  768 15:43:04.216383  APIC: 05: enabled 1

  769 15:43:04.219986  APIC: 04: enabled 1

  770 15:43:04.220090  Compare with tree...

  771 15:43:04.222781  Root Device: enabled 1

  772 15:43:04.226194   CPU_CLUSTER: 0: enabled 1

  773 15:43:04.229732    APIC: 00: enabled 1

  774 15:43:04.229822    APIC: 02: enabled 1

  775 15:43:04.232670    APIC: 06: enabled 1

  776 15:43:04.236316    APIC: 01: enabled 1

  777 15:43:04.236414    APIC: 03: enabled 1

  778 15:43:04.239196    APIC: 07: enabled 1

  779 15:43:04.242691    APIC: 05: enabled 1

  780 15:43:04.242778    APIC: 04: enabled 1

  781 15:43:04.245576   DOMAIN: 0000: enabled 1

  782 15:43:04.249119    PCI: 00:00.0: enabled 1

  783 15:43:04.252504    PCI: 00:02.0: enabled 1

  784 15:43:04.255428    PCI: 00:04.0: enabled 0

  785 15:43:04.255520    PCI: 00:05.0: enabled 0

  786 15:43:04.258918    PCI: 00:12.0: enabled 1

  787 15:43:04.262247    PCI: 00:12.5: enabled 0

  788 15:43:04.265209    PCI: 00:12.6: enabled 0

  789 15:43:04.268985    PCI: 00:14.0: enabled 1

  790 15:43:04.269077     USB0 port 0: enabled 1

  791 15:43:04.271761      USB2 port 0: enabled 1

  792 15:43:04.275286      USB2 port 1: enabled 1

  793 15:43:04.278068      USB2 port 2: enabled 0

  794 15:43:04.281591      USB2 port 3: enabled 0

  795 15:43:04.285103      USB2 port 5: enabled 0

  796 15:43:04.285192      USB2 port 6: enabled 1

  797 15:43:04.288603      USB2 port 9: enabled 1

  798 15:43:04.291421      USB3 port 0: enabled 1

  799 15:43:04.294817      USB3 port 1: enabled 1

  800 15:43:04.298394      USB3 port 2: enabled 1

  801 15:43:04.301065      USB3 port 3: enabled 1

  802 15:43:04.301163      USB3 port 4: enabled 0

  803 15:43:04.304540    PCI: 00:14.1: enabled 0

  804 15:43:04.308118    PCI: 00:14.3: enabled 1

  805 15:43:04.311464    PCI: 00:14.5: enabled 0

  806 15:43:04.314281    PCI: 00:15.0: enabled 1

  807 15:43:04.314390     I2C: 00:15: enabled 1

  808 15:43:04.317717    PCI: 00:15.1: enabled 1

  809 15:43:04.321238     I2C: 00:5d: enabled 1

  810 15:43:04.324073     GENERIC: 0.0: enabled 1

  811 15:43:04.327552    PCI: 00:15.2: enabled 0

  812 15:43:04.327647    PCI: 00:15.3: enabled 0

  813 15:43:04.330948    PCI: 00:16.0: enabled 1

  814 15:43:04.334457    PCI: 00:16.1: enabled 0

  815 15:43:04.337293    PCI: 00:16.2: enabled 0

  816 15:43:04.340886    PCI: 00:16.3: enabled 0

  817 15:43:04.340978    PCI: 00:16.4: enabled 0

  818 15:43:04.344427    PCI: 00:16.5: enabled 0

  819 15:43:04.347483    PCI: 00:17.0: enabled 1

  820 15:43:04.350919    PCI: 00:19.0: enabled 1

  821 15:43:04.353686     I2C: 00:1a: enabled 1

  822 15:43:04.353769     I2C: 00:38: enabled 1

  823 15:43:04.357024     I2C: 00:39: enabled 1

  824 15:43:04.360519     I2C: 00:3a: enabled 1

  825 15:43:04.363825     I2C: 00:3b: enabled 1

  826 15:43:04.363922    PCI: 00:19.1: enabled 0

  827 15:43:04.366777    PCI: 00:19.2: enabled 0

  828 15:43:04.370315    PCI: 00:1a.0: enabled 0

  829 15:43:04.373756    PCI: 00:1c.0: enabled 0

  830 15:43:04.376759    PCI: 00:1c.1: enabled 0

  831 15:43:04.376850    PCI: 00:1c.2: enabled 0

  832 15:43:04.380305    PCI: 00:1c.3: enabled 0

  833 15:43:04.383669    PCI: 00:1c.4: enabled 0

  834 15:43:04.386486    PCI: 00:1c.5: enabled 0

  835 15:43:04.389982    PCI: 00:1c.6: enabled 0

  836 15:43:04.390079    PCI: 00:1c.7: enabled 0

  837 15:43:04.392904    PCI: 00:1d.0: enabled 1

  838 15:43:04.396324    PCI: 00:1d.1: enabled 0

  839 15:43:04.399772    PCI: 00:1d.2: enabled 0

  840 15:43:04.403224    PCI: 00:1d.3: enabled 0

  841 15:43:04.403317    PCI: 00:1d.4: enabled 0

  842 15:43:04.406028    PCI: 00:1d.5: enabled 1

  843 15:43:04.409547     PCI: 00:00.0: enabled 1

  844 15:43:04.413040    PCI: 00:1e.0: enabled 1

  845 15:43:04.416450    PCI: 00:1e.1: enabled 0

  846 15:43:04.419238    PCI: 00:1e.2: enabled 1

  847 15:43:04.419330     SPI: 00: enabled 1

  848 15:43:04.422907    PCI: 00:1e.3: enabled 1

  849 15:43:04.425651     SPI: 01: enabled 1

  850 15:43:04.425745    PCI: 00:1f.0: enabled 1

  851 15:43:04.429159     PNP: 0c09.0: enabled 1

  852 15:43:04.432649    PCI: 00:1f.1: enabled 1

  853 15:43:04.435570    PCI: 00:1f.2: enabled 1

  854 15:43:04.439138    PCI: 00:1f.3: enabled 1

  855 15:43:04.441914    PCI: 00:1f.4: enabled 1

  856 15:43:04.442016    PCI: 00:1f.5: enabled 1

  857 15:43:04.445505    PCI: 00:1f.6: enabled 0

  858 15:43:04.448946  Root Device scanning...

  859 15:43:04.451782  scan_static_bus for Root Device

  860 15:43:04.455231  CPU_CLUSTER: 0 enabled

  861 15:43:04.455318  DOMAIN: 0000 enabled

  862 15:43:04.458703  DOMAIN: 0000 scanning...

  863 15:43:04.461614  PCI: pci_scan_bus for bus 00

  864 15:43:04.465031  PCI: 00:00.0 [8086/0000] ops

  865 15:43:04.468569  PCI: 00:00.0 [8086/9b61] enabled

  866 15:43:04.471391  PCI: 00:02.0 [8086/0000] bus ops

  867 15:43:04.475000  PCI: 00:02.0 [8086/9b41] enabled

  868 15:43:04.478552  PCI: 00:04.0 [8086/1903] disabled

  869 15:43:04.481257  PCI: 00:08.0 [8086/1911] enabled

  870 15:43:04.484823  PCI: 00:12.0 [8086/02f9] enabled

  871 15:43:04.488274  PCI: 00:14.0 [8086/0000] bus ops

  872 15:43:04.491147  PCI: 00:14.0 [8086/02ed] enabled

  873 15:43:04.494710  PCI: 00:14.2 [8086/02ef] enabled

  874 15:43:04.498045  PCI: 00:14.3 [8086/02f0] enabled

  875 15:43:04.500720  PCI: 00:15.0 [8086/0000] bus ops

  876 15:43:04.504269  PCI: 00:15.0 [8086/02e8] enabled

  877 15:43:04.507752  PCI: 00:15.1 [8086/0000] bus ops

  878 15:43:04.511294  PCI: 00:15.1 [8086/02e9] enabled

  879 15:43:04.514056  PCI: 00:16.0 [8086/0000] ops

  880 15:43:04.517587  PCI: 00:16.0 [8086/02e0] enabled

  881 15:43:04.520410  PCI: 00:17.0 [8086/0000] ops

  882 15:43:04.524027  PCI: 00:17.0 [8086/02d3] enabled

  883 15:43:04.527585  PCI: 00:19.0 [8086/0000] bus ops

  884 15:43:04.530546  PCI: 00:19.0 [8086/02c5] enabled

  885 15:43:04.533916  PCI: 00:1d.0 [8086/0000] bus ops

  886 15:43:04.536831  PCI: 00:1d.0 [8086/02b0] enabled

  887 15:43:04.543780  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  888 15:43:04.546586  PCI: 00:1e.0 [8086/0000] ops

  889 15:43:04.550224  PCI: 00:1e.0 [8086/02a8] enabled

  890 15:43:04.553708  PCI: 00:1e.2 [8086/0000] bus ops

  891 15:43:04.556586  PCI: 00:1e.2 [8086/02aa] enabled

  892 15:43:04.560000  PCI: 00:1e.3 [8086/0000] bus ops

  893 15:43:04.563520  PCI: 00:1e.3 [8086/02ab] enabled

  894 15:43:04.566283  PCI: 00:1f.0 [8086/0000] bus ops

  895 15:43:04.569914  PCI: 00:1f.0 [8086/0284] enabled

  896 15:43:04.576366  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  897 15:43:04.579825  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  898 15:43:04.582635  PCI: 00:1f.3 [8086/0000] bus ops

  899 15:43:04.586297  PCI: 00:1f.3 [8086/02c8] enabled

  900 15:43:04.589160  PCI: 00:1f.4 [8086/0000] bus ops

  901 15:43:04.592907  PCI: 00:1f.4 [8086/02a3] enabled

  902 15:43:04.595742  PCI: 00:1f.5 [8086/0000] bus ops

  903 15:43:04.599191  PCI: 00:1f.5 [8086/02a4] enabled

  904 15:43:04.602548  PCI: Leftover static devices:

  905 15:43:04.605964  PCI: 00:05.0

  906 15:43:04.606055  PCI: 00:12.5

  907 15:43:04.608914  PCI: 00:12.6

  908 15:43:04.609017  PCI: 00:14.1

  909 15:43:04.609087  PCI: 00:14.5

  910 15:43:04.612686  PCI: 00:15.2

  911 15:43:04.612777  PCI: 00:15.3

  912 15:43:04.615398  PCI: 00:16.1

  913 15:43:04.615485  PCI: 00:16.2

  914 15:43:04.618856  PCI: 00:16.3

  915 15:43:04.618939  PCI: 00:16.4

  916 15:43:04.619005  PCI: 00:16.5

  917 15:43:04.621795  PCI: 00:19.1

  918 15:43:04.621876  PCI: 00:19.2

  919 15:43:04.625324  PCI: 00:1a.0

  920 15:43:04.625404  PCI: 00:1c.0

  921 15:43:04.625470  PCI: 00:1c.1

  922 15:43:04.629006  PCI: 00:1c.2

  923 15:43:04.629085  PCI: 00:1c.3

  924 15:43:04.631779  PCI: 00:1c.4

  925 15:43:04.631853  PCI: 00:1c.5

  926 15:43:04.635271  PCI: 00:1c.6

  927 15:43:04.635346  PCI: 00:1c.7

  928 15:43:04.635409  PCI: 00:1d.1

  929 15:43:04.638183  PCI: 00:1d.2

  930 15:43:04.638258  PCI: 00:1d.3

  931 15:43:04.641714  PCI: 00:1d.4

  932 15:43:04.641783  PCI: 00:1d.5

  933 15:43:04.641844  PCI: 00:1e.1

  934 15:43:04.645021  PCI: 00:1f.1

  935 15:43:04.645116  PCI: 00:1f.2

  936 15:43:04.647990  PCI: 00:1f.6

  937 15:43:04.651390  PCI: Check your devicetree.cb.

  938 15:43:04.651469  PCI: 00:02.0 scanning...

  939 15:43:04.657887  scan_generic_bus for PCI: 00:02.0

  940 15:43:04.661441  scan_generic_bus for PCI: 00:02.0 done

  941 15:43:04.664810  scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs

  942 15:43:04.668394  PCI: 00:14.0 scanning...

  943 15:43:04.671257  scan_static_bus for PCI: 00:14.0

  944 15:43:04.674868  USB0 port 0 enabled

  945 15:43:04.677642  USB0 port 0 scanning...

  946 15:43:04.681141  scan_static_bus for USB0 port 0

  947 15:43:04.681229  USB2 port 0 enabled

  948 15:43:04.684124  USB2 port 1 enabled

  949 15:43:04.687591  USB2 port 2 disabled

  950 15:43:04.687678  USB2 port 3 disabled

  951 15:43:04.691188  USB2 port 5 disabled

  952 15:43:04.693977  USB2 port 6 enabled

  953 15:43:04.694066  USB2 port 9 enabled

  954 15:43:04.697571  USB3 port 0 enabled

  955 15:43:04.697659  USB3 port 1 enabled

  956 15:43:04.700953  USB3 port 2 enabled

  957 15:43:04.704370  USB3 port 3 enabled

  958 15:43:04.704463  USB3 port 4 disabled

  959 15:43:04.707114  USB2 port 0 scanning...

  960 15:43:04.710493  scan_static_bus for USB2 port 0

  961 15:43:04.713865  scan_static_bus for USB2 port 0 done

  962 15:43:04.720207  scan_bus: scanning of bus USB2 port 0 took 9696 usecs

  963 15:43:04.723770  USB2 port 1 scanning...

  964 15:43:04.726497  scan_static_bus for USB2 port 1

  965 15:43:04.730146  scan_static_bus for USB2 port 1 done

  966 15:43:04.736729  scan_bus: scanning of bus USB2 port 1 took 9701 usecs

  967 15:43:04.736817  USB2 port 6 scanning...

  968 15:43:04.740281  scan_static_bus for USB2 port 6

  969 15:43:04.743130  scan_static_bus for USB2 port 6 done

  970 15:43:04.749649  scan_bus: scanning of bus USB2 port 6 took 9702 usecs

  971 15:43:04.753188  USB2 port 9 scanning...

  972 15:43:04.756094  scan_static_bus for USB2 port 9

  973 15:43:04.759545  scan_static_bus for USB2 port 9 done

  974 15:43:04.765938  scan_bus: scanning of bus USB2 port 9 took 9701 usecs

  975 15:43:04.766032  USB3 port 0 scanning...

  976 15:43:04.769371  scan_static_bus for USB3 port 0

  977 15:43:04.776338  scan_static_bus for USB3 port 0 done

  978 15:43:04.779236  scan_bus: scanning of bus USB3 port 0 took 9695 usecs

  979 15:43:04.782721  USB3 port 1 scanning...

  980 15:43:04.786204  scan_static_bus for USB3 port 1

  981 15:43:04.789073  scan_static_bus for USB3 port 1 done

  982 15:43:04.795656  scan_bus: scanning of bus USB3 port 1 took 9692 usecs

  983 15:43:04.798476  USB3 port 2 scanning...

  984 15:43:04.801984  scan_static_bus for USB3 port 2

  985 15:43:04.805470  scan_static_bus for USB3 port 2 done

  986 15:43:04.808848  scan_bus: scanning of bus USB3 port 2 took 9695 usecs

  987 15:43:04.812200  USB3 port 3 scanning...

  988 15:43:04.815089  scan_static_bus for USB3 port 3

  989 15:43:04.818593  scan_static_bus for USB3 port 3 done

  990 15:43:04.825433  scan_bus: scanning of bus USB3 port 3 took 9694 usecs

  991 15:43:04.828277  scan_static_bus for USB0 port 0 done

  992 15:43:04.834694  scan_bus: scanning of bus USB0 port 0 took 155313 usecs

  993 15:43:04.838272  scan_static_bus for PCI: 00:14.0 done

  994 15:43:04.844685  scan_bus: scanning of bus PCI: 00:14.0 took 172929 usecs

  995 15:43:04.844786  PCI: 00:15.0 scanning...

  996 15:43:04.851775  scan_generic_bus for PCI: 00:15.0

  997 15:43:04.854542  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

  998 15:43:04.858191  scan_generic_bus for PCI: 00:15.0 done

  999 15:43:04.864671  scan_bus: scanning of bus PCI: 00:15.0 took 14295 usecs

 1000 15:43:04.864758  PCI: 00:15.1 scanning...

 1001 15:43:04.871644  scan_generic_bus for PCI: 00:15.1

 1002 15:43:04.874419  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1003 15:43:04.877960  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1004 15:43:04.880780  scan_generic_bus for PCI: 00:15.1 done

 1005 15:43:04.887962  scan_bus: scanning of bus PCI: 00:15.1 took 18628 usecs

 1006 15:43:04.890737  PCI: 00:19.0 scanning...

 1007 15:43:04.894338  scan_generic_bus for PCI: 00:19.0

 1008 15:43:04.897252  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1009 15:43:04.900800  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1010 15:43:04.907045  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1011 15:43:04.910381  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1012 15:43:04.913959  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1013 15:43:04.917422  scan_generic_bus for PCI: 00:19.0 done

 1014 15:43:04.923503  scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs

 1015 15:43:04.927093  PCI: 00:1d.0 scanning...

 1016 15:43:04.930505  do_pci_scan_bridge for PCI: 00:1d.0

 1017 15:43:04.933342  PCI: pci_scan_bus for bus 01

 1018 15:43:04.936859  PCI: 01:00.0 [1c5c/1327] enabled

 1019 15:43:04.939718  Enabling Common Clock Configuration

 1020 15:43:04.943070  L1 Sub-State supported from root port 29

 1021 15:43:04.946600  L1 Sub-State Support = 0xf

 1022 15:43:04.950099  CommonModeRestoreTime = 0x28

 1023 15:43:04.953002  Power On Value = 0x16, Power On Scale = 0x0

 1024 15:43:04.956590  ASPM: Enabled L1

 1025 15:43:04.963055  scan_bus: scanning of bus PCI: 00:1d.0 took 32781 usecs

 1026 15:43:04.963143  PCI: 00:1e.2 scanning...

 1027 15:43:04.969294  scan_generic_bus for PCI: 00:1e.2

 1028 15:43:04.972666  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1029 15:43:04.976076  scan_generic_bus for PCI: 00:1e.2 done

 1030 15:43:04.982587  scan_bus: scanning of bus PCI: 00:1e.2 took 13991 usecs

 1031 15:43:04.982684  PCI: 00:1e.3 scanning...

 1032 15:43:04.986043  scan_generic_bus for PCI: 00:1e.3

 1033 15:43:04.992394  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1034 15:43:04.995956  scan_generic_bus for PCI: 00:1e.3 done

 1035 15:43:05.002337  scan_bus: scanning of bus PCI: 00:1e.3 took 13992 usecs

 1036 15:43:05.002434  PCI: 00:1f.0 scanning...

 1037 15:43:05.005258  scan_static_bus for PCI: 00:1f.0

 1038 15:43:05.008584  PNP: 0c09.0 enabled

 1039 15:43:05.012040  scan_static_bus for PCI: 00:1f.0 done

 1040 15:43:05.018272  scan_bus: scanning of bus PCI: 00:1f.0 took 12048 usecs

 1041 15:43:05.021642  PCI: 00:1f.3 scanning...

 1042 15:43:05.025067  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1043 15:43:05.028551  PCI: 00:1f.4 scanning...

 1044 15:43:05.031391  scan_generic_bus for PCI: 00:1f.4

 1045 15:43:05.038407  scan_generic_bus for PCI: 00:1f.4 done

 1046 15:43:05.041252  scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs

 1047 15:43:05.044717  PCI: 00:1f.5 scanning...

 1048 15:43:05.048201  scan_generic_bus for PCI: 00:1f.5

 1049 15:43:05.051068  scan_generic_bus for PCI: 00:1f.5 done

 1050 15:43:05.058104  scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs

 1051 15:43:05.064551  scan_bus: scanning of bus DOMAIN: 0000 took 604842 usecs

 1052 15:43:05.067378  scan_static_bus for Root Device done

 1053 15:43:05.074197  scan_bus: scanning of bus Root Device took 624718 usecs

 1054 15:43:05.074286  done

 1055 15:43:05.077632  Chrome EC: UHEPI supported

 1056 15:43:05.084184  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1057 15:43:05.087673  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1058 15:43:05.093955  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1059 15:43:05.101031  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1060 15:43:05.104620  SPI flash protection: WPSW=0 SRP0=1

 1061 15:43:05.111138  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1062 15:43:05.114016  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1063 15:43:05.117478  found VGA at PCI: 00:02.0

 1064 15:43:05.120837  Setting up VGA for PCI: 00:02.0

 1065 15:43:05.127116  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1066 15:43:05.130590  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1067 15:43:05.133559  Allocating resources...

 1068 15:43:05.137182  Reading resources...

 1069 15:43:05.140173  Root Device read_resources bus 0 link: 0

 1070 15:43:05.143806  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1071 15:43:05.150123  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1072 15:43:05.153603  DOMAIN: 0000 read_resources bus 0 link: 0

 1073 15:43:05.161343  PCI: 00:14.0 read_resources bus 0 link: 0

 1074 15:43:05.164294  USB0 port 0 read_resources bus 0 link: 0

 1075 15:43:05.172780  USB0 port 0 read_resources bus 0 link: 0 done

 1076 15:43:05.175535  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1077 15:43:05.183227  PCI: 00:15.0 read_resources bus 1 link: 0

 1078 15:43:05.186039  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1079 15:43:05.193072  PCI: 00:15.1 read_resources bus 2 link: 0

 1080 15:43:05.196023  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1081 15:43:05.204008  PCI: 00:19.0 read_resources bus 3 link: 0

 1082 15:43:05.210438  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1083 15:43:05.213914  PCI: 00:1d.0 read_resources bus 1 link: 0

 1084 15:43:05.220675  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1085 15:43:05.223525  PCI: 00:1e.2 read_resources bus 4 link: 0

 1086 15:43:05.230584  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1087 15:43:05.233326  PCI: 00:1e.3 read_resources bus 5 link: 0

 1088 15:43:05.240338  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1089 15:43:05.243016  PCI: 00:1f.0 read_resources bus 0 link: 0

 1090 15:43:05.250074  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1091 15:43:05.256397  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1092 15:43:05.260020  Root Device read_resources bus 0 link: 0 done

 1093 15:43:05.262721  Done reading resources.

 1094 15:43:05.269786  Show resources in subtree (Root Device)...After reading.

 1095 15:43:05.272665   Root Device child on link 0 CPU_CLUSTER: 0

 1096 15:43:05.276265    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1097 15:43:05.279033     APIC: 00

 1098 15:43:05.279182     APIC: 02

 1099 15:43:05.282526     APIC: 06

 1100 15:43:05.282621     APIC: 01

 1101 15:43:05.282692     APIC: 03

 1102 15:43:05.285993     APIC: 07

 1103 15:43:05.286089     APIC: 05

 1104 15:43:05.286163     APIC: 04

 1105 15:43:05.292437    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1106 15:43:05.334204    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1107 15:43:05.334557    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1108 15:43:05.334679     PCI: 00:00.0

 1109 15:43:05.334776     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1110 15:43:05.335047     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1111 15:43:05.341393     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1112 15:43:05.351449     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1113 15:43:05.357722     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1114 15:43:05.367782     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1115 15:43:05.377015     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1116 15:43:05.387199     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1117 15:43:05.396598     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1118 15:43:05.406484     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1119 15:43:05.416550     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1120 15:43:05.422947     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1121 15:43:05.433018     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1122 15:43:05.442769     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1123 15:43:05.452019     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1124 15:43:05.462145     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1125 15:43:05.465009     PCI: 00:02.0

 1126 15:43:05.475490     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1127 15:43:05.485289     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1128 15:43:05.491710     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1129 15:43:05.494548     PCI: 00:04.0

 1130 15:43:05.494644     PCI: 00:08.0

 1131 15:43:05.504492     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1132 15:43:05.508168     PCI: 00:12.0

 1133 15:43:05.517338     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1134 15:43:05.520761     PCI: 00:14.0 child on link 0 USB0 port 0

 1135 15:43:05.530509     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1136 15:43:05.537357      USB0 port 0 child on link 0 USB2 port 0

 1137 15:43:05.537453       USB2 port 0

 1138 15:43:05.540602       USB2 port 1

 1139 15:43:05.540687       USB2 port 2

 1140 15:43:05.544233       USB2 port 3

 1141 15:43:05.544318       USB2 port 5

 1142 15:43:05.547124       USB2 port 6

 1143 15:43:05.547221       USB2 port 9

 1144 15:43:05.550670       USB3 port 0

 1145 15:43:05.553536       USB3 port 1

 1146 15:43:05.553625       USB3 port 2

 1147 15:43:05.557019       USB3 port 3

 1148 15:43:05.557108       USB3 port 4

 1149 15:43:05.559816     PCI: 00:14.2

 1150 15:43:05.569792     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1151 15:43:05.579999     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1152 15:43:05.580106     PCI: 00:14.3

 1153 15:43:05.589150     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1154 15:43:05.596288     PCI: 00:15.0 child on link 0 I2C: 01:15

 1155 15:43:05.605976     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1156 15:43:05.606116      I2C: 01:15

 1157 15:43:05.608866     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1158 15:43:05.618659     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1159 15:43:05.622035      I2C: 02:5d

 1160 15:43:05.622140      GENERIC: 0.0

 1161 15:43:05.625413     PCI: 00:16.0

 1162 15:43:05.635263     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1163 15:43:05.638826     PCI: 00:17.0

 1164 15:43:05.645070     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1165 15:43:05.655004     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1166 15:43:05.664245     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1167 15:43:05.671349     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1168 15:43:05.681225     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1169 15:43:05.687464     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1170 15:43:05.693639     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1171 15:43:05.703784     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1172 15:43:05.703914      I2C: 03:1a

 1173 15:43:05.707280      I2C: 03:38

 1174 15:43:05.707380      I2C: 03:39

 1175 15:43:05.710010      I2C: 03:3a

 1176 15:43:05.710128      I2C: 03:3b

 1177 15:43:05.716856     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1178 15:43:05.723179     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1179 15:43:05.733509     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1180 15:43:05.743139     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1181 15:43:05.743238      PCI: 01:00.0

 1182 15:43:05.755715      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1183 15:43:05.755816     PCI: 00:1e.0

 1184 15:43:05.765643     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1185 15:43:05.775461     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1186 15:43:05.782536     PCI: 00:1e.2 child on link 0 SPI: 00

 1187 15:43:05.792274     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1188 15:43:05.792369      SPI: 00

 1189 15:43:05.795099     PCI: 00:1e.3 child on link 0 SPI: 01

 1190 15:43:05.804907     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1191 15:43:05.808389      SPI: 01

 1192 15:43:05.811277     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1193 15:43:05.821247     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1194 15:43:05.830954     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1195 15:43:05.831061      PNP: 0c09.0

 1196 15:43:05.840938      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1197 15:43:05.841036     PCI: 00:1f.3

 1198 15:43:05.850692     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1199 15:43:05.860628     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1200 15:43:05.863523     PCI: 00:1f.4

 1201 15:43:05.873315     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1202 15:43:05.883290     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1203 15:43:05.883386     PCI: 00:1f.5

 1204 15:43:05.892618     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1205 15:43:05.899696  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1206 15:43:05.906030  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1207 15:43:05.912490  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1208 15:43:05.916101  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1209 15:43:05.918871  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1210 15:43:05.922512  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1211 15:43:05.925875  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1212 15:43:05.932054  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1213 15:43:05.938411  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1214 15:43:05.948741  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1215 15:43:05.954949  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1216 15:43:05.964961  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1217 15:43:05.967822  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1218 15:43:05.974889  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1219 15:43:05.981451  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1220 15:43:05.984309  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1221 15:43:05.988010  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1222 15:43:05.994308  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1223 15:43:05.997075  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1224 15:43:06.004154  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1225 15:43:06.007434  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1226 15:43:06.013796  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1227 15:43:06.016757  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1228 15:43:06.023875  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1229 15:43:06.026715  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1230 15:43:06.033578  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1231 15:43:06.036408  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1232 15:43:06.043235  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1233 15:43:06.046609  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1234 15:43:06.052889  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1235 15:43:06.056444  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1236 15:43:06.062816  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1237 15:43:06.065693  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1238 15:43:06.072162  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1239 15:43:06.075662  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1240 15:43:06.082127  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1241 15:43:06.085738  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1242 15:43:06.095002  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1243 15:43:06.098473  avoid_fixed_resources: DOMAIN: 0000

 1244 15:43:06.104955  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1245 15:43:06.111888  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1246 15:43:06.118236  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1247 15:43:06.124568  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1248 15:43:06.134169  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1249 15:43:06.141067  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1250 15:43:06.147349  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1251 15:43:06.157091  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1252 15:43:06.164177  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1253 15:43:06.170581  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1254 15:43:06.180351  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1255 15:43:06.187160  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1256 15:43:06.187255  Setting resources...

 1257 15:43:06.193710  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1258 15:43:06.199974  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1259 15:43:06.203524  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1260 15:43:06.206390  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1261 15:43:06.210007  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1262 15:43:06.216394  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1263 15:43:06.222730  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1264 15:43:06.229222  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1265 15:43:06.236181  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1266 15:43:06.242409  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1267 15:43:06.245793  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1268 15:43:06.252231  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1269 15:43:06.255658  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1270 15:43:06.262072  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1271 15:43:06.265644  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1272 15:43:06.272216  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1273 15:43:06.275159  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1274 15:43:06.281555  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1275 15:43:06.285000  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1276 15:43:06.291478  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1277 15:43:06.294992  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1278 15:43:06.301276  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1279 15:43:06.304637  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1280 15:43:06.311018  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1281 15:43:06.314472  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1282 15:43:06.321265  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1283 15:43:06.324094  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1284 15:43:06.331201  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1285 15:43:06.334177  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1286 15:43:06.340400  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1287 15:43:06.343998  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1288 15:43:06.350393  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1289 15:43:06.357259  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1290 15:43:06.363535  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1291 15:43:06.369870  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1292 15:43:06.379807  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1293 15:43:06.383376  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1294 15:43:06.389927  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1295 15:43:06.396329  Root Device assign_resources, bus 0 link: 0

 1296 15:43:06.399136  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1297 15:43:06.409080  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1298 15:43:06.416387  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1299 15:43:06.425536  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1300 15:43:06.432160  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1301 15:43:06.441952  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1302 15:43:06.448763  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1303 15:43:06.455221  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1304 15:43:06.458694  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1305 15:43:06.468083  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1306 15:43:06.474455  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1307 15:43:06.484536  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1308 15:43:06.490918  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1309 15:43:06.497390  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1310 15:43:06.500718  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1311 15:43:06.510515  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1312 15:43:06.514152  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1313 15:43:06.517662  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1314 15:43:06.526961  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1315 15:43:06.533787  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1316 15:43:06.543576  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1317 15:43:06.550397  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1318 15:43:06.556325  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1319 15:43:06.566551  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1320 15:43:06.572838  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1321 15:43:06.582985  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1322 15:43:06.585795  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1323 15:43:06.592313  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1324 15:43:06.599434  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1325 15:43:06.608541  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1326 15:43:06.618601  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1327 15:43:06.622098  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1328 15:43:06.628414  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1329 15:43:06.635059  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1330 15:43:06.641418  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1331 15:43:06.651311  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1332 15:43:06.654758  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1333 15:43:06.661049  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1334 15:43:06.668046  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1335 15:43:06.674440  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1336 15:43:06.677348  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1337 15:43:06.684564  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1338 15:43:06.687508  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1339 15:43:06.693884  LPC: Trying to open IO window from 800 size 1ff

 1340 15:43:06.700316  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1341 15:43:06.710450  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1342 15:43:06.716686  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1343 15:43:06.726653  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1344 15:43:06.729547  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1345 15:43:06.736057  Root Device assign_resources, bus 0 link: 0

 1346 15:43:06.736148  Done setting resources.

 1347 15:43:06.742644  Show resources in subtree (Root Device)...After assigning values.

 1348 15:43:06.749655   Root Device child on link 0 CPU_CLUSTER: 0

 1349 15:43:06.752430    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1350 15:43:06.752519     APIC: 00

 1351 15:43:06.755953     APIC: 02

 1352 15:43:06.756042     APIC: 06

 1353 15:43:06.756113     APIC: 01

 1354 15:43:06.759401     APIC: 03

 1355 15:43:06.759484     APIC: 07

 1356 15:43:06.762920     APIC: 05

 1357 15:43:06.763006     APIC: 04

 1358 15:43:06.765653    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1359 15:43:06.775616    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1360 15:43:06.788819    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1361 15:43:06.788920     PCI: 00:00.0

 1362 15:43:06.798795     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1363 15:43:06.808171     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1364 15:43:06.818089     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1365 15:43:06.828141     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1366 15:43:06.835143     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1367 15:43:06.844325     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1368 15:43:06.853898     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1369 15:43:06.863605     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1370 15:43:06.873486     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1371 15:43:06.883419     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1372 15:43:06.893376     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1373 15:43:06.899713     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1374 15:43:06.909640     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1375 15:43:06.919401     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1376 15:43:06.929254     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1377 15:43:06.939106     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1378 15:43:06.942727     PCI: 00:02.0

 1379 15:43:06.952528     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1380 15:43:06.962224     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1381 15:43:06.972018     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1382 15:43:06.972127     PCI: 00:04.0

 1383 15:43:06.975056     PCI: 00:08.0

 1384 15:43:06.984991     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1385 15:43:06.985087     PCI: 00:12.0

 1386 15:43:06.998014     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1387 15:43:07.001538     PCI: 00:14.0 child on link 0 USB0 port 0

 1388 15:43:07.011257     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1389 15:43:07.017572      USB0 port 0 child on link 0 USB2 port 0

 1390 15:43:07.017672       USB2 port 0

 1391 15:43:07.020386       USB2 port 1

 1392 15:43:07.020470       USB2 port 2

 1393 15:43:07.023944       USB2 port 3

 1394 15:43:07.024026       USB2 port 5

 1395 15:43:07.027555       USB2 port 6

 1396 15:43:07.027639       USB2 port 9

 1397 15:43:07.030336       USB3 port 0

 1398 15:43:07.030416       USB3 port 1

 1399 15:43:07.033804       USB3 port 2

 1400 15:43:07.033887       USB3 port 3

 1401 15:43:07.036759       USB3 port 4

 1402 15:43:07.040442     PCI: 00:14.2

 1403 15:43:07.049760     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1404 15:43:07.060000     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1405 15:43:07.060105     PCI: 00:14.3

 1406 15:43:07.069753     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1407 15:43:07.076146     PCI: 00:15.0 child on link 0 I2C: 01:15

 1408 15:43:07.085989     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1409 15:43:07.086109      I2C: 01:15

 1410 15:43:07.092657     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1411 15:43:07.102355     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1412 15:43:07.102469      I2C: 02:5d

 1413 15:43:07.105856      GENERIC: 0.0

 1414 15:43:07.105952     PCI: 00:16.0

 1415 15:43:07.118536     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1416 15:43:07.118645     PCI: 00:17.0

 1417 15:43:07.128176     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1418 15:43:07.137952     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1419 15:43:07.148010     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1420 15:43:07.157727     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1421 15:43:07.167458     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1422 15:43:07.177176     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1423 15:43:07.180706     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1424 15:43:07.190505     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1425 15:43:07.193352      I2C: 03:1a

 1426 15:43:07.193442      I2C: 03:38

 1427 15:43:07.196817      I2C: 03:39

 1428 15:43:07.196904      I2C: 03:3a

 1429 15:43:07.200368      I2C: 03:3b

 1430 15:43:07.203355     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1431 15:43:07.213323     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1432 15:43:07.223170     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1433 15:43:07.233043     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1434 15:43:07.236597      PCI: 01:00.0

 1435 15:43:07.245729      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1436 15:43:07.245836     PCI: 00:1e.0

 1437 15:43:07.259363     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1438 15:43:07.269253     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1439 15:43:07.272086     PCI: 00:1e.2 child on link 0 SPI: 00

 1440 15:43:07.281742     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1441 15:43:07.285279      SPI: 00

 1442 15:43:07.288142     PCI: 00:1e.3 child on link 0 SPI: 01

 1443 15:43:07.298165     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1444 15:43:07.298274      SPI: 01

 1445 15:43:07.304472     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1446 15:43:07.311560     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1447 15:43:07.321399     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1448 15:43:07.324185      PNP: 0c09.0

 1449 15:43:07.330752      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1450 15:43:07.334402     PCI: 00:1f.3

 1451 15:43:07.343604     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1452 15:43:07.353724     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1453 15:43:07.357164     PCI: 00:1f.4

 1454 15:43:07.366685     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1455 15:43:07.376500     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1456 15:43:07.376606     PCI: 00:1f.5

 1457 15:43:07.386372     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1458 15:43:07.389771  Done allocating resources.

 1459 15:43:07.396421  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1460 15:43:07.399356  Enabling resources...

 1461 15:43:07.402995  PCI: 00:00.0 subsystem <- 8086/9b61

 1462 15:43:07.405662  PCI: 00:00.0 cmd <- 06

 1463 15:43:07.409248  PCI: 00:02.0 subsystem <- 8086/9b41

 1464 15:43:07.412785  PCI: 00:02.0 cmd <- 03

 1465 15:43:07.412876  PCI: 00:08.0 cmd <- 06

 1466 15:43:07.419142  PCI: 00:12.0 subsystem <- 8086/02f9

 1467 15:43:07.419236  PCI: 00:12.0 cmd <- 02

 1468 15:43:07.422519  PCI: 00:14.0 subsystem <- 8086/02ed

 1469 15:43:07.426008  PCI: 00:14.0 cmd <- 02

 1470 15:43:07.428885  PCI: 00:14.2 cmd <- 02

 1471 15:43:07.432411  PCI: 00:14.3 subsystem <- 8086/02f0

 1472 15:43:07.435368  PCI: 00:14.3 cmd <- 02

 1473 15:43:07.438943  PCI: 00:15.0 subsystem <- 8086/02e8

 1474 15:43:07.441729  PCI: 00:15.0 cmd <- 02

 1475 15:43:07.445147  PCI: 00:15.1 subsystem <- 8086/02e9

 1476 15:43:07.448781  PCI: 00:15.1 cmd <- 02

 1477 15:43:07.451570  PCI: 00:16.0 subsystem <- 8086/02e0

 1478 15:43:07.455020  PCI: 00:16.0 cmd <- 02

 1479 15:43:07.458547  PCI: 00:17.0 subsystem <- 8086/02d3

 1480 15:43:07.461299  PCI: 00:17.0 cmd <- 03

 1481 15:43:07.464723  PCI: 00:19.0 subsystem <- 8086/02c5

 1482 15:43:07.468174  PCI: 00:19.0 cmd <- 02

 1483 15:43:07.471660  PCI: 00:1d.0 bridge ctrl <- 0013

 1484 15:43:07.474465  PCI: 00:1d.0 subsystem <- 8086/02b0

 1485 15:43:07.477541  PCI: 00:1d.0 cmd <- 06

 1486 15:43:07.481082  PCI: 00:1e.0 subsystem <- 8086/02a8

 1487 15:43:07.481181  PCI: 00:1e.0 cmd <- 06

 1488 15:43:07.487545  PCI: 00:1e.2 subsystem <- 8086/02aa

 1489 15:43:07.487636  PCI: 00:1e.2 cmd <- 06

 1490 15:43:07.490932  PCI: 00:1e.3 subsystem <- 8086/02ab

 1491 15:43:07.494420  PCI: 00:1e.3 cmd <- 02

 1492 15:43:07.497242  PCI: 00:1f.0 subsystem <- 8086/0284

 1493 15:43:07.500923  PCI: 00:1f.0 cmd <- 407

 1494 15:43:07.503770  PCI: 00:1f.3 subsystem <- 8086/02c8

 1495 15:43:07.507187  PCI: 00:1f.3 cmd <- 02

 1496 15:43:07.510695  PCI: 00:1f.4 subsystem <- 8086/02a3

 1497 15:43:07.513656  PCI: 00:1f.4 cmd <- 03

 1498 15:43:07.517335  PCI: 00:1f.5 subsystem <- 8086/02a4

 1499 15:43:07.520239  PCI: 00:1f.5 cmd <- 406

 1500 15:43:07.529024  PCI: 01:00.0 cmd <- 02

 1501 15:43:07.533969  done.

 1502 15:43:07.547973  ME: Version: 14.0.39.1367

 1503 15:43:07.554365  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13

 1504 15:43:07.557865  Initializing devices...

 1505 15:43:07.557986  Root Device init ...

 1506 15:43:07.564205  Chrome EC: Set SMI mask to 0x0000000000000000

 1507 15:43:07.567592  Chrome EC: clear events_b mask to 0x0000000000000000

 1508 15:43:07.574006  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1509 15:43:07.580965  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1510 15:43:07.587389  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1511 15:43:07.590987  Chrome EC: Set WAKE mask to 0x0000000000000000

 1512 15:43:07.593804  Root Device init finished in 35201 usecs

 1513 15:43:07.597407  CPU_CLUSTER: 0 init ...

 1514 15:43:07.603815  CPU_CLUSTER: 0 init finished in 2439 usecs

 1515 15:43:07.608509  PCI: 00:00.0 init ...

 1516 15:43:07.612034  CPU TDP: 15 Watts

 1517 15:43:07.615050  CPU PL2 = 64 Watts

 1518 15:43:07.617980  PCI: 00:00.0 init finished in 7074 usecs

 1519 15:43:07.621680  PCI: 00:02.0 init ...

 1520 15:43:07.624605  PCI: 00:02.0 init finished in 2253 usecs

 1521 15:43:07.628211  PCI: 00:08.0 init ...

 1522 15:43:07.630981  PCI: 00:08.0 init finished in 2254 usecs

 1523 15:43:07.634401  PCI: 00:12.0 init ...

 1524 15:43:07.638075  PCI: 00:12.0 init finished in 2252 usecs

 1525 15:43:07.641418  PCI: 00:14.0 init ...

 1526 15:43:07.644310  PCI: 00:14.0 init finished in 2243 usecs

 1527 15:43:07.647746  PCI: 00:14.2 init ...

 1528 15:43:07.650657  PCI: 00:14.2 init finished in 2253 usecs

 1529 15:43:07.654185  PCI: 00:14.3 init ...

 1530 15:43:07.657675  PCI: 00:14.3 init finished in 2270 usecs

 1531 15:43:07.660668  PCI: 00:15.0 init ...

 1532 15:43:07.663963  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1533 15:43:07.670964  PCI: 00:15.0 init finished in 5971 usecs

 1534 15:43:07.671088  PCI: 00:15.1 init ...

 1535 15:43:07.676922  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1536 15:43:07.680321  PCI: 00:15.1 init finished in 5978 usecs

 1537 15:43:07.683808  PCI: 00:16.0 init ...

 1538 15:43:07.686544  PCI: 00:16.0 init finished in 2253 usecs

 1539 15:43:07.690153  PCI: 00:19.0 init ...

 1540 15:43:07.693680  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1541 15:43:07.696545  PCI: 00:19.0 init finished in 5975 usecs

 1542 15:43:07.700100  PCI: 00:1d.0 init ...

 1543 15:43:07.703543  Initializing PCH PCIe bridge.

 1544 15:43:07.706431  PCI: 00:1d.0 init finished in 5277 usecs

 1545 15:43:07.710654  PCI: 00:1f.0 init ...

 1546 15:43:07.713410  IOAPIC: Initializing IOAPIC at 0xfec00000

 1547 15:43:07.719972  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1548 15:43:07.720087  IOAPIC: ID = 0x02

 1549 15:43:07.723665  IOAPIC: Dumping registers

 1550 15:43:07.726558    reg 0x0000: 0x02000000

 1551 15:43:07.730074    reg 0x0001: 0x00770020

 1552 15:43:07.732975    reg 0x0002: 0x00000000

 1553 15:43:07.736487  PCI: 00:1f.0 init finished in 23554 usecs

 1554 15:43:07.739322  PCI: 00:1f.4 init ...

 1555 15:43:07.742775  PCI: 00:1f.4 init finished in 2262 usecs

 1556 15:43:07.754568  PCI: 01:00.0 init ...

 1557 15:43:07.757507  PCI: 01:00.0 init finished in 2252 usecs

 1558 15:43:07.762060  PNP: 0c09.0 init ...

 1559 15:43:07.768602  Google Chrome EC uptime: 11.100 seconds

 1560 15:43:07.772089  Google Chrome AP resets since EC boot: 0

 1561 15:43:07.774892  Google Chrome most recent AP reset causes:

 1562 15:43:07.781329  Google Chrome EC reset flags at last EC boot: reset-pin

 1563 15:43:07.784909  PNP: 0c09.0 init finished in 20562 usecs

 1564 15:43:07.788004  Devices initialized

 1565 15:43:07.791690  Show all devs... After init.

 1566 15:43:07.791783  Root Device: enabled 1

 1567 15:43:07.794537  CPU_CLUSTER: 0: enabled 1

 1568 15:43:07.798144  DOMAIN: 0000: enabled 1

 1569 15:43:07.800954  APIC: 00: enabled 1

 1570 15:43:07.801044  PCI: 00:00.0: enabled 1

 1571 15:43:07.804681  PCI: 00:02.0: enabled 1

 1572 15:43:07.807634  PCI: 00:04.0: enabled 0

 1573 15:43:07.811220  PCI: 00:05.0: enabled 0

 1574 15:43:07.811309  PCI: 00:12.0: enabled 1

 1575 15:43:07.813960  PCI: 00:12.5: enabled 0

 1576 15:43:07.817515  PCI: 00:12.6: enabled 0

 1577 15:43:07.817600  PCI: 00:14.0: enabled 1

 1578 15:43:07.821185  PCI: 00:14.1: enabled 0

 1579 15:43:07.824102  PCI: 00:14.3: enabled 1

 1580 15:43:07.827074  PCI: 00:14.5: enabled 0

 1581 15:43:07.827163  PCI: 00:15.0: enabled 1

 1582 15:43:07.830679  PCI: 00:15.1: enabled 1

 1583 15:43:07.834296  PCI: 00:15.2: enabled 0

 1584 15:43:07.837136  PCI: 00:15.3: enabled 0

 1585 15:43:07.837253  PCI: 00:16.0: enabled 1

 1586 15:43:07.840057  PCI: 00:16.1: enabled 0

 1587 15:43:07.843553  PCI: 00:16.2: enabled 0

 1588 15:43:07.847039  PCI: 00:16.3: enabled 0

 1589 15:43:07.847125  PCI: 00:16.4: enabled 0

 1590 15:43:07.849807  PCI: 00:16.5: enabled 0

 1591 15:43:07.853319  PCI: 00:17.0: enabled 1

 1592 15:43:07.856834  PCI: 00:19.0: enabled 1

 1593 15:43:07.856926  PCI: 00:19.1: enabled 0

 1594 15:43:07.859677  PCI: 00:19.2: enabled 0

 1595 15:43:07.863288  PCI: 00:1a.0: enabled 0

 1596 15:43:07.866872  PCI: 00:1c.0: enabled 0

 1597 15:43:07.866955  PCI: 00:1c.1: enabled 0

 1598 15:43:07.869628  PCI: 00:1c.2: enabled 0

 1599 15:43:07.872984  PCI: 00:1c.3: enabled 0

 1600 15:43:07.876468  PCI: 00:1c.4: enabled 0

 1601 15:43:07.876571  PCI: 00:1c.5: enabled 0

 1602 15:43:07.879293  PCI: 00:1c.6: enabled 0

 1603 15:43:07.882641  PCI: 00:1c.7: enabled 0

 1604 15:43:07.885992  PCI: 00:1d.0: enabled 1

 1605 15:43:07.886085  PCI: 00:1d.1: enabled 0

 1606 15:43:07.889507  PCI: 00:1d.2: enabled 0

 1607 15:43:07.892332  PCI: 00:1d.3: enabled 0

 1608 15:43:07.896030  PCI: 00:1d.4: enabled 0

 1609 15:43:07.896112  PCI: 00:1d.5: enabled 0

 1610 15:43:07.899475  PCI: 00:1e.0: enabled 1

 1611 15:43:07.902355  PCI: 00:1e.1: enabled 0

 1612 15:43:07.906021  PCI: 00:1e.2: enabled 1

 1613 15:43:07.906127  PCI: 00:1e.3: enabled 1

 1614 15:43:07.908909  PCI: 00:1f.0: enabled 1

 1615 15:43:07.912696  PCI: 00:1f.1: enabled 0

 1616 15:43:07.915459  PCI: 00:1f.2: enabled 0

 1617 15:43:07.915561  PCI: 00:1f.3: enabled 1

 1618 15:43:07.919026  PCI: 00:1f.4: enabled 1

 1619 15:43:07.921944  PCI: 00:1f.5: enabled 1

 1620 15:43:07.922036  PCI: 00:1f.6: enabled 0

 1621 15:43:07.925579  USB0 port 0: enabled 1

 1622 15:43:07.928545  I2C: 01:15: enabled 1

 1623 15:43:07.932350  I2C: 02:5d: enabled 1

 1624 15:43:07.932437  GENERIC: 0.0: enabled 1

 1625 15:43:07.935253  I2C: 03:1a: enabled 1

 1626 15:43:07.938827  I2C: 03:38: enabled 1

 1627 15:43:07.938914  I2C: 03:39: enabled 1

 1628 15:43:07.941658  I2C: 03:3a: enabled 1

 1629 15:43:07.944680  I2C: 03:3b: enabled 1

 1630 15:43:07.948378  PCI: 00:00.0: enabled 1

 1631 15:43:07.948470  SPI: 00: enabled 1

 1632 15:43:07.951228  SPI: 01: enabled 1

 1633 15:43:07.951314  PNP: 0c09.0: enabled 1

 1634 15:43:07.954838  USB2 port 0: enabled 1

 1635 15:43:07.958437  USB2 port 1: enabled 1

 1636 15:43:07.961349  USB2 port 2: enabled 0

 1637 15:43:07.961444  USB2 port 3: enabled 0

 1638 15:43:07.964899  USB2 port 5: enabled 0

 1639 15:43:07.967808  USB2 port 6: enabled 1

 1640 15:43:07.967893  USB2 port 9: enabled 1

 1641 15:43:07.971318  USB3 port 0: enabled 1

 1642 15:43:07.974219  USB3 port 1: enabled 1

 1643 15:43:07.977884  USB3 port 2: enabled 1

 1644 15:43:07.977973  USB3 port 3: enabled 1

 1645 15:43:07.981601  USB3 port 4: enabled 0

 1646 15:43:07.984513  APIC: 02: enabled 1

 1647 15:43:07.984623  APIC: 06: enabled 1

 1648 15:43:07.987384  APIC: 01: enabled 1

 1649 15:43:07.987475  APIC: 03: enabled 1

 1650 15:43:07.990811  APIC: 07: enabled 1

 1651 15:43:07.994196  APIC: 05: enabled 1

 1652 15:43:07.994293  APIC: 04: enabled 1

 1653 15:43:07.997105  PCI: 00:08.0: enabled 1

 1654 15:43:08.000722  PCI: 00:14.2: enabled 1

 1655 15:43:08.003628  PCI: 01:00.0: enabled 1

 1656 15:43:08.007191  Disabling ACPI via APMC:

 1657 15:43:08.007282  done.

 1658 15:43:08.013714  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1659 15:43:08.017299  ELOG: NV offset 0xaf0000 size 0x4000

 1660 15:43:08.023669  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1661 15:43:08.030178  ELOG: Event(17) added with size 13 at 2023-03-03 15:43:08 UTC

 1662 15:43:08.037220  POST: Unexpected post code in previous boot: 0x73

 1663 15:43:08.043711  ELOG: Event(A3) added with size 11 at 2023-03-03 15:43:08 UTC

 1664 15:43:08.050375  ELOG: Event(A6) added with size 13 at 2023-03-03 15:43:08 UTC

 1665 15:43:08.056785  ELOG: Event(92) added with size 9 at 2023-03-03 15:43:08 UTC

 1666 15:43:08.063479  ELOG: Event(93) added with size 9 at 2023-03-03 15:43:08 UTC

 1667 15:43:08.066481  ELOG: Event(9A) added with size 9 at 2023-03-03 15:43:08 UTC

 1668 15:43:08.072912  ELOG: Event(9E) added with size 10 at 2023-03-03 15:43:08 UTC

 1669 15:43:08.079779  ELOG: Event(9F) added with size 14 at 2023-03-03 15:43:08 UTC

 1670 15:43:08.086081  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1671 15:43:08.092577  ELOG: Event(A1) added with size 10 at 2023-03-03 15:43:08 UTC

 1672 15:43:08.099139  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1673 15:43:08.105592  ELOG: Event(A0) added with size 9 at 2023-03-03 15:43:08 UTC

 1674 15:43:08.112202  elog_add_boot_reason: Logged dev mode boot

 1675 15:43:08.112305  Finalize devices...

 1676 15:43:08.115856  PCI: 00:17.0 final

 1677 15:43:08.115936  Devices finalized

 1678 15:43:08.122177  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1679 15:43:08.128815  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 1

 1680 15:43:08.132450  ME: HFSTS1                  : 0x90000245

 1681 15:43:08.135455  ME: HFSTS2                  : 0x3B850126

 1682 15:43:08.138969  ME: HFSTS3                  : 0x00000020

 1683 15:43:08.145607  ME: HFSTS4                  : 0x00004800

 1684 15:43:08.148589  ME: HFSTS5                  : 0x00000000

 1685 15:43:08.151589  ME: HFSTS6                  : 0x40400006

 1686 15:43:08.155030  ME: Manufacturing Mode      : NO

 1687 15:43:08.158583  ME: FW Partition Table      : OK

 1688 15:43:08.161556  ME: Bringup Loader Failure  : NO

 1689 15:43:08.165253  ME: Firmware Init Complete  : YES

 1690 15:43:08.168115  ME: Boot Options Present    : NO

 1691 15:43:08.171797  ME: Update In Progress      : NO

 1692 15:43:08.174679  ME: D0i3 Support            : YES

 1693 15:43:08.178227  ME: Low Power State Enabled : NO

 1694 15:43:08.181723  ME: CPU Replaced            : NO

 1695 15:43:08.184448  ME: CPU Replacement Valid   : YES

 1696 15:43:08.187908  ME: Current Working State   : 5

 1697 15:43:08.191424  ME: Current Operation State : 1

 1698 15:43:08.194247  ME: Current Operation Mode  : 0

 1699 15:43:08.197423  ME: Error Code              : 0

 1700 15:43:08.200997  ME: CPU Debug Disabled      : YES

 1701 15:43:08.204531  ME: TXT Support             : NO

 1702 15:43:08.211036  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1703 15:43:08.217613  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1704 15:43:08.217725  CBFS @ c08000 size 3f8000

 1705 15:43:08.224169  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1706 15:43:08.227152  CBFS: Locating 'fallback/dsdt.aml'

 1707 15:43:08.230662  CBFS: Found @ offset 10bb80 size 3fa5

 1708 15:43:08.237322  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1709 15:43:08.240237  CBFS @ c08000 size 3f8000

 1710 15:43:08.246701  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1711 15:43:08.250207  CBFS: Locating 'fallback/slic'

 1712 15:43:08.253716  CBFS: 'fallback/slic' not found.

 1713 15:43:08.256382  ACPI: Writing ACPI tables at 99b3e000.

 1714 15:43:08.259937  ACPI:    * FACS

 1715 15:43:08.260032  ACPI:    * DSDT

 1716 15:43:08.266349  Ramoops buffer: 0x100000@0x99a3d000.

 1717 15:43:08.269956  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1718 15:43:08.272697  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1719 15:43:08.277035  Google Chrome EC: version:

 1720 15:43:08.279794  	ro: helios_v2.0.2659-56403530b

 1721 15:43:08.283275  	rw: helios_v2.0.2849-c41de27e7d

 1722 15:43:08.286721    running image: 1

 1723 15:43:08.289496  ACPI:    * FADT

 1724 15:43:08.289594  SCI is IRQ9

 1725 15:43:08.296530  ACPI: added table 1/32, length now 40

 1726 15:43:08.296627  ACPI:     * SSDT

 1727 15:43:08.299616  Found 1 CPU(s) with 8 core(s) each.

 1728 15:43:08.305849  Error: Could not locate 'wifi_sar' in VPD.

 1729 15:43:08.309222  Checking CBFS for default SAR values

 1730 15:43:08.312830  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1731 15:43:08.316433  CBFS @ c08000 size 3f8000

 1732 15:43:08.322793  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1733 15:43:08.325624  CBFS: Locating 'wifi_sar_defaults.hex'

 1734 15:43:08.329148  CBFS: Found @ offset 5fac0 size 77

 1735 15:43:08.332677  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1736 15:43:08.339257  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1737 15:43:08.342167  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1738 15:43:08.348490  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1739 15:43:08.352177  failed to find key in VPD: dsm_calib_r0_0

 1740 15:43:08.361977  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1741 15:43:08.365364  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1742 15:43:08.371297  failed to find key in VPD: dsm_calib_r0_1

 1743 15:43:08.378537  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1744 15:43:08.384833  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1745 15:43:08.387727  failed to find key in VPD: dsm_calib_r0_2

 1746 15:43:08.397641  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1747 15:43:08.404468  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1748 15:43:08.407821  failed to find key in VPD: dsm_calib_r0_3

 1749 15:43:08.417546  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1750 15:43:08.420458  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1751 15:43:08.427457  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1752 15:43:08.431027  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1753 15:43:08.433913  EC returned error result code 1

 1754 15:43:08.437571  EC returned error result code 1

 1755 15:43:08.441222  EC returned error result code 1

 1756 15:43:08.447520  PS2K: Bad resp from EC. Vivaldi disabled!

 1757 15:43:08.450422  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1758 15:43:08.456961  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1759 15:43:08.463542  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1760 15:43:08.467392  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1761 15:43:08.473356  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1762 15:43:08.480050  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1763 15:43:08.486401  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1764 15:43:08.489879  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1765 15:43:08.496248  ACPI: added table 2/32, length now 44

 1766 15:43:08.496341  ACPI:    * MCFG

 1767 15:43:08.500003  ACPI: added table 3/32, length now 48

 1768 15:43:08.502761  ACPI:    * TPM2

 1769 15:43:08.506132  TPM2 log created at 99a2d000

 1770 15:43:08.509596  ACPI: added table 4/32, length now 52

 1771 15:43:08.509687  ACPI:    * MADT

 1772 15:43:08.512479  SCI is IRQ9

 1773 15:43:08.516167  ACPI: added table 5/32, length now 56

 1774 15:43:08.516257  current = 99b43ac0

 1775 15:43:08.519667  ACPI:    * DMAR

 1776 15:43:08.522533  ACPI: added table 6/32, length now 60

 1777 15:43:08.526209  ACPI:    * IGD OpRegion

 1778 15:43:08.529061  GMA: Found VBT in CBFS

 1779 15:43:08.529144  GMA: Found valid VBT in CBFS

 1780 15:43:08.535527  ACPI: added table 7/32, length now 64

 1781 15:43:08.535625  ACPI:    * HPET

 1782 15:43:08.539275  ACPI: added table 8/32, length now 68

 1783 15:43:08.542143  ACPI: done.

 1784 15:43:08.542230  ACPI tables: 31744 bytes.

 1785 15:43:08.545107  smbios_write_tables: 99a2c000

 1786 15:43:08.548625  EC returned error result code 3

 1787 15:43:08.555537  Couldn't obtain OEM name from CBI

 1788 15:43:08.555625  Create SMBIOS type 17

 1789 15:43:08.558438  PCI: 00:00.0 (Intel Cannonlake)

 1790 15:43:08.562238  PCI: 00:14.3 (Intel WiFi)

 1791 15:43:08.565175  SMBIOS tables: 939 bytes.

 1792 15:43:08.568160  Writing table forward entry at 0x00000500

 1793 15:43:08.575344  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1794 15:43:08.578169  Writing coreboot table at 0x99b62000

 1795 15:43:08.584713   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1796 15:43:08.588137   1. 0000000000001000-000000000009ffff: RAM

 1797 15:43:08.594639   2. 00000000000a0000-00000000000fffff: RESERVED

 1798 15:43:08.597532   3. 0000000000100000-0000000099a2bfff: RAM

 1799 15:43:08.604194   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1800 15:43:08.607458   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1801 15:43:08.613878   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1802 15:43:08.620311   7. 000000009a000000-000000009f7fffff: RESERVED

 1803 15:43:08.624054   8. 00000000e0000000-00000000efffffff: RESERVED

 1804 15:43:08.630133   9. 00000000fc000000-00000000fc000fff: RESERVED

 1805 15:43:08.633685  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1806 15:43:08.640367  11. 00000000fed10000-00000000fed17fff: RESERVED

 1807 15:43:08.643286  12. 00000000fed80000-00000000fed83fff: RESERVED

 1808 15:43:08.647137  13. 00000000fed90000-00000000fed91fff: RESERVED

 1809 15:43:08.652804  14. 00000000feda0000-00000000feda1fff: RESERVED

 1810 15:43:08.656401  15. 0000000100000000-000000045e7fffff: RAM

 1811 15:43:08.662994  Graphics framebuffer located at 0xc0000000

 1812 15:43:08.663119  Passing 5 GPIOs to payload:

 1813 15:43:08.669321              NAME |       PORT | POLARITY |     VALUE

 1814 15:43:08.675910     write protect |  undefined |     high |       low

 1815 15:43:08.679502               lid |  undefined |     high |      high

 1816 15:43:08.685982             power |  undefined |     high |       low

 1817 15:43:08.689361             oprom |  undefined |     high |       low

 1818 15:43:08.695718          EC in RW | 0x000000cb |     high |       low

 1819 15:43:08.699307  Board ID: 4

 1820 15:43:08.702233  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1821 15:43:08.705138  CBFS @ c08000 size 3f8000

 1822 15:43:08.711846  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1823 15:43:08.715461  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87

 1824 15:43:08.718272  coreboot table: 1492 bytes.

 1825 15:43:08.721737  IMD ROOT    0. 99fff000 00001000

 1826 15:43:08.724717  IMD SMALL   1. 99ffe000 00001000

 1827 15:43:08.728514  FSP MEMORY  2. 99c4e000 003b0000

 1828 15:43:08.731384  CONSOLE     3. 99c2e000 00020000

 1829 15:43:08.734937  FMAP        4. 99c2d000 0000054e

 1830 15:43:08.737824  TIME STAMP  5. 99c2c000 00000910

 1831 15:43:08.741498  VBOOT WORK  6. 99c18000 00014000

 1832 15:43:08.748269  MRC DATA    7. 99c16000 00001958

 1833 15:43:08.751120  ROMSTG STCK 8. 99c15000 00001000

 1834 15:43:08.754055  AFTER CAR   9. 99c0b000 0000a000

 1835 15:43:08.757667  RAMSTAGE   10. 99baf000 0005c000

 1836 15:43:08.760636  REFCODE    11. 99b7a000 00035000

 1837 15:43:08.764486  SMM BACKUP 12. 99b6a000 00010000

 1838 15:43:08.767468  COREBOOT   13. 99b62000 00008000

 1839 15:43:08.770445  ACPI       14. 99b3e000 00024000

 1840 15:43:08.774135  ACPI GNVS  15. 99b3d000 00001000

 1841 15:43:08.777083  RAMOOPS    16. 99a3d000 00100000

 1842 15:43:08.780653  TPM2 TCGLOG17. 99a2d000 00010000

 1843 15:43:08.783533  SMBIOS     18. 99a2c000 00000800

 1844 15:43:08.783643  IMD small region:

 1845 15:43:08.787233    IMD ROOT    0. 99ffec00 00000400

 1846 15:43:08.790037    FSP RUNTIME 1. 99ffebe0 00000004

 1847 15:43:08.796466    EC HOSTEVENT 2. 99ffebc0 00000008

 1848 15:43:08.800143    POWER STATE 3. 99ffeb80 00000040

 1849 15:43:08.803654    ROMSTAGE    4. 99ffeb60 00000004

 1850 15:43:08.806700    MEM INFO    5. 99ffe9a0 000001b9

 1851 15:43:08.810018    VPD         6. 99ffe920 0000006c

 1852 15:43:08.812937  MTRR: Physical address space:

 1853 15:43:08.819608  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1854 15:43:08.826635  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1855 15:43:08.833196  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1856 15:43:08.836100  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1857 15:43:08.842755  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1858 15:43:08.849278  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1859 15:43:08.855592  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1860 15:43:08.859165  MTRR: Fixed MSR 0x250 0x0606060606060606

 1861 15:43:08.865631  MTRR: Fixed MSR 0x258 0x0606060606060606

 1862 15:43:08.868564  MTRR: Fixed MSR 0x259 0x0000000000000000

 1863 15:43:08.872256  MTRR: Fixed MSR 0x268 0x0606060606060606

 1864 15:43:08.875233  MTRR: Fixed MSR 0x269 0x0606060606060606

 1865 15:43:08.881808  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1866 15:43:08.884756  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1867 15:43:08.888229  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1868 15:43:08.891795  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1869 15:43:08.898136  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1870 15:43:08.901510  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1871 15:43:08.904395  call enable_fixed_mtrr()

 1872 15:43:08.908208  CPU physical address size: 39 bits

 1873 15:43:08.911109  MTRR: default type WB/UC MTRR counts: 6/8.

 1874 15:43:08.914606  MTRR: WB selected as default type.

 1875 15:43:08.920997  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1876 15:43:08.927415  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1877 15:43:08.934009  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1878 15:43:08.940439  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1879 15:43:08.946804  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1880 15:43:08.953395  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1881 15:43:08.957118  MTRR: Fixed MSR 0x250 0x0606060606060606

 1882 15:43:08.963377  MTRR: Fixed MSR 0x258 0x0606060606060606

 1883 15:43:08.966281  MTRR: Fixed MSR 0x259 0x0000000000000000

 1884 15:43:08.969933  MTRR: Fixed MSR 0x268 0x0606060606060606

 1885 15:43:08.973285  MTRR: Fixed MSR 0x269 0x0606060606060606

 1886 15:43:08.979931  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1887 15:43:08.982642  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1888 15:43:08.986298  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1889 15:43:08.989136  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1890 15:43:08.995589  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1891 15:43:08.998965  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1892 15:43:08.999062  

 1893 15:43:09.002289  MTRR check

 1894 15:43:09.002380  Fixed MTRRs   : Enabled

 1895 15:43:09.005622  Variable MTRRs: Enabled

 1896 15:43:09.005732  

 1897 15:43:09.009045  call enable_fixed_mtrr()

 1898 15:43:09.012019  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1899 15:43:09.018923  CPU physical address size: 39 bits

 1900 15:43:09.022272  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1901 15:43:09.025009  MTRR: Fixed MSR 0x250 0x0606060606060606

 1902 15:43:09.032053  MTRR: Fixed MSR 0x258 0x0606060606060606

 1903 15:43:09.035034  MTRR: Fixed MSR 0x259 0x0000000000000000

 1904 15:43:09.038482  MTRR: Fixed MSR 0x268 0x0606060606060606

 1905 15:43:09.041361  MTRR: Fixed MSR 0x269 0x0606060606060606

 1906 15:43:09.048381  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1907 15:43:09.051206  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1908 15:43:09.054789  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1909 15:43:09.057711  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1910 15:43:09.064669  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1911 15:43:09.067712  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1912 15:43:09.071294  MTRR: Fixed MSR 0x250 0x0606060606060606

 1913 15:43:09.074080  call enable_fixed_mtrr()

 1914 15:43:09.077610  MTRR: Fixed MSR 0x258 0x0606060606060606

 1915 15:43:09.084157  MTRR: Fixed MSR 0x259 0x0000000000000000

 1916 15:43:09.087119  MTRR: Fixed MSR 0x268 0x0606060606060606

 1917 15:43:09.090688  MTRR: Fixed MSR 0x269 0x0606060606060606

 1918 15:43:09.094127  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1919 15:43:09.100655  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1920 15:43:09.104032  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1921 15:43:09.106771  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1922 15:43:09.110124  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1923 15:43:09.116742  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1924 15:43:09.120123  CPU physical address size: 39 bits

 1925 15:43:09.123575  call enable_fixed_mtrr()

 1926 15:43:09.123693  CBFS @ c08000 size 3f8000

 1927 15:43:09.129982  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1928 15:43:09.132933  CBFS: Locating 'fallback/payload'

 1929 15:43:09.136620  MTRR: Fixed MSR 0x250 0x0606060606060606

 1930 15:43:09.143023  MTRR: Fixed MSR 0x258 0x0606060606060606

 1931 15:43:09.146497  MTRR: Fixed MSR 0x259 0x0000000000000000

 1932 15:43:09.149484  MTRR: Fixed MSR 0x268 0x0606060606060606

 1933 15:43:09.152392  MTRR: Fixed MSR 0x269 0x0606060606060606

 1934 15:43:09.159239  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1935 15:43:09.162951  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1936 15:43:09.165789  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1937 15:43:09.169439  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1938 15:43:09.175810  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1939 15:43:09.178550  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1940 15:43:09.182145  MTRR: Fixed MSR 0x250 0x0606060606060606

 1941 15:43:09.185700  call enable_fixed_mtrr()

 1942 15:43:09.188689  MTRR: Fixed MSR 0x258 0x0606060606060606

 1943 15:43:09.194973  MTRR: Fixed MSR 0x259 0x0000000000000000

 1944 15:43:09.198553  MTRR: Fixed MSR 0x268 0x0606060606060606

 1945 15:43:09.202018  MTRR: Fixed MSR 0x269 0x0606060606060606

 1946 15:43:09.205420  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1947 15:43:09.211807  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1948 15:43:09.215417  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1949 15:43:09.218256  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1950 15:43:09.221637  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1951 15:43:09.228097  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1952 15:43:09.231519  CPU physical address size: 39 bits

 1953 15:43:09.235203  call enable_fixed_mtrr()

 1954 15:43:09.238032  CPU physical address size: 39 bits

 1955 15:43:09.241484  CBFS: Found @ offset 1c96c0 size 3f798

 1956 15:43:09.244353  CPU physical address size: 39 bits

 1957 15:43:09.248002  Checking segment from ROM address 0xffdd16f8

 1958 15:43:09.254551  MTRR: Fixed MSR 0x250 0x0606060606060606

 1959 15:43:09.257431  MTRR: Fixed MSR 0x258 0x0606060606060606

 1960 15:43:09.260994  MTRR: Fixed MSR 0x259 0x0000000000000000

 1961 15:43:09.264429  MTRR: Fixed MSR 0x268 0x0606060606060606

 1962 15:43:09.270841  MTRR: Fixed MSR 0x269 0x0606060606060606

 1963 15:43:09.273787  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1964 15:43:09.277385  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1965 15:43:09.280274  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1966 15:43:09.287308  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1967 15:43:09.290169  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1968 15:43:09.293652  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1969 15:43:09.297094  MTRR: Fixed MSR 0x250 0x0606060606060606

 1970 15:43:09.300072  call enable_fixed_mtrr()

 1971 15:43:09.303693  MTRR: Fixed MSR 0x258 0x0606060606060606

 1972 15:43:09.310071  MTRR: Fixed MSR 0x259 0x0000000000000000

 1973 15:43:09.313582  MTRR: Fixed MSR 0x268 0x0606060606060606

 1974 15:43:09.316533  MTRR: Fixed MSR 0x269 0x0606060606060606

 1975 15:43:09.320031  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1976 15:43:09.326215  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1977 15:43:09.329219  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1978 15:43:09.332852  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1979 15:43:09.335753  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1980 15:43:09.342193  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1981 15:43:09.345741  CPU physical address size: 39 bits

 1982 15:43:09.349324  call enable_fixed_mtrr()

 1983 15:43:09.352361  Checking segment from ROM address 0xffdd1714

 1984 15:43:09.355892  CPU physical address size: 39 bits

 1985 15:43:09.361798  Loading segment from ROM address 0xffdd16f8

 1986 15:43:09.361905    code (compression=0)

 1987 15:43:09.372105    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1988 15:43:09.378410  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1989 15:43:09.381983  it's not compressed!

 1990 15:43:09.474068  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1991 15:43:09.481226  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1992 15:43:09.487619  Loading segment from ROM address 0xffdd1714

 1993 15:43:09.487726    Entry Point 0x30000000

 1994 15:43:09.490539  Loaded segments

 1995 15:43:09.496479  Finalizing chipset.

 1996 15:43:09.500034  Finalizing SMM.

 1997 15:43:09.502952  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 1998 15:43:09.506470  mp_park_aps done after 0 msecs.

 1999 15:43:09.512721  Jumping to boot code at 30000000(99b62000)

 2000 15:43:09.519136  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2001 15:43:09.519251  

 2002 15:43:09.519329  

 2003 15:43:09.519394  

 2004 15:43:09.522807  Starting depthcharge on Helios...

 2005 15:43:09.523182  end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
 2006 15:43:09.523310  start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
 2007 15:43:09.523401  Setting prompt string to ['hatch:']
 2008 15:43:09.523488  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
 2009 15:43:09.526276  

 2010 15:43:09.532717  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2011 15:43:09.532819  

 2012 15:43:09.539295  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2013 15:43:09.539393  

 2014 15:43:09.545894  board_setup: Info: eMMC controller not present; skipping

 2015 15:43:09.545988  

 2016 15:43:09.548871  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2017 15:43:09.548955  

 2018 15:43:09.555293  board_setup: Info: SDHCI controller not present; skipping

 2019 15:43:09.555392  

 2020 15:43:09.561761  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2021 15:43:09.561858  

 2022 15:43:09.561928  Wipe memory regions:

 2023 15:43:09.561995  

 2024 15:43:09.568336  	[0x00000000001000, 0x000000000a0000)

 2025 15:43:09.568433  

 2026 15:43:09.571898  	[0x00000000100000, 0x00000030000000)

 2027 15:43:09.635398  

 2028 15:43:09.639118  	[0x00000030657430, 0x00000099a2c000)

 2029 15:43:09.776080  

 2030 15:43:09.778834  	[0x00000100000000, 0x0000045e800000)

 2031 15:43:11.161842  

 2032 15:43:11.161981  R8152: Initializing

 2033 15:43:11.162060  

 2034 15:43:11.164807  Version 9 (ocp_data = 6010)

 2035 15:43:11.169187  

 2036 15:43:11.169267  R8152: Done initializing

 2037 15:43:11.169341  

 2038 15:43:11.172096  Adding net device

 2039 15:43:11.654854  

 2040 15:43:11.655007  R8152: Initializing

 2041 15:43:11.655103  

 2042 15:43:11.658385  Version 6 (ocp_data = 5c30)

 2043 15:43:11.658472  

 2044 15:43:11.661369  R8152: Done initializing

 2045 15:43:11.661452  

 2046 15:43:11.668349  net_add_device: Attemp to include the same device

 2047 15:43:11.668441  

 2048 15:43:11.674776  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2049 15:43:11.674863  

 2050 15:43:11.674944  

 2051 15:43:11.675009  

 2052 15:43:11.675311  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2054 15:43:11.776080  hatch: tftpboot 192.168.201.1 9406236/tftp-deploy-gplx1_wg/kernel/bzImage 9406236/tftp-deploy-gplx1_wg/kernel/cmdline 9406236/tftp-deploy-gplx1_wg/ramdisk/ramdisk.cpio.gz

 2055 15:43:11.776259  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2056 15:43:11.776352  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
 2057 15:43:11.780367  tftpboot 192.168.201.1 9406236/tftp-deploy-gplx1_wg/kernel/bzImoy-gplx1_wg/kernel/cmdline 9406236/tftp-deploy-gplx1_wg/ramdisk/ramdisk.cpio.gz

 2058 15:43:11.780457  

 2059 15:43:11.780525  Waiting for link

 2060 15:43:11.981330  

 2061 15:43:11.981498  done.

 2062 15:43:11.981582  

 2063 15:43:11.981659  MAC: 00:24:32:50:19:be

 2064 15:43:11.981748  

 2065 15:43:11.984340  Sending DHCP discover... done.

 2066 15:43:11.984492  

 2067 15:43:11.987329  Waiting for reply... done.

 2068 15:43:11.987472  

 2069 15:43:11.990867  Sending DHCP request... done.

 2070 15:43:11.991022  

 2071 15:43:11.994517  Waiting for reply... done.

 2072 15:43:11.994686  

 2073 15:43:11.997470  My ip is 192.168.201.15

 2074 15:43:11.997601  

 2075 15:43:12.001102  The DHCP server ip is 192.168.201.1

 2076 15:43:12.001260  

 2077 15:43:12.004102  TFTP server IP predefined by user: 192.168.201.1

 2078 15:43:12.004238  

 2079 15:43:12.010707  Bootfile predefined by user: 9406236/tftp-deploy-gplx1_wg/kernel/bzImage

 2080 15:43:12.013618  

 2081 15:43:12.017379  Sending tftp read request... done.

 2082 15:43:12.017485  

 2083 15:43:12.021066  Waiting for the transfer... 

 2084 15:43:12.021224  

 2085 15:43:12.576146  00000000 ################################################################

 2086 15:43:12.576283  

 2087 15:43:13.114027  00080000 ################################################################

 2088 15:43:13.114187  

 2089 15:43:13.664197  00100000 ################################################################

 2090 15:43:13.664343  

 2091 15:43:14.182769  00180000 ################################################################

 2092 15:43:14.182910  

 2093 15:43:14.693706  00200000 ################################################################

 2094 15:43:14.693844  

 2095 15:43:15.218579  00280000 ################################################################

 2096 15:43:15.218730  

 2097 15:43:15.750866  00300000 ################################################################

 2098 15:43:15.751031  

 2099 15:43:16.271377  00380000 ################################################################

 2100 15:43:16.271518  

 2101 15:43:16.814079  00400000 ################################################################

 2102 15:43:16.814223  

 2103 15:43:17.345607  00480000 ################################################################

 2104 15:43:17.345754  

 2105 15:43:17.876021  00500000 ################################################################

 2106 15:43:17.876176  

 2107 15:43:18.435642  00580000 ################################################################

 2108 15:43:18.435792  

 2109 15:43:19.005652  00600000 ################################################################

 2110 15:43:19.005797  

 2111 15:43:19.548792  00680000 ################################################################

 2112 15:43:19.548945  

 2113 15:43:20.084193  00700000 ################################################################

 2114 15:43:20.084342  

 2115 15:43:20.622564  00780000 ################################################################

 2116 15:43:20.622708  

 2117 15:43:21.156861  00800000 ################################################################

 2118 15:43:21.157006  

 2119 15:43:21.782920  00880000 ################################################################

 2120 15:43:21.783063  

 2121 15:43:22.116586  00900000 ################################## done.

 2122 15:43:22.116735  

 2123 15:43:22.119504  The bootfile was 9707520 bytes long.

 2124 15:43:22.119602  

 2125 15:43:22.122964  Sending tftp read request... done.

 2126 15:43:22.123056  

 2127 15:43:22.126456  Waiting for the transfer... 

 2128 15:43:22.126553  

 2129 15:43:22.686657  00000000 ################################################################

 2130 15:43:22.686808  

 2131 15:43:23.212383  00080000 ################################################################

 2132 15:43:23.212523  

 2133 15:43:23.749251  00100000 ################################################################

 2134 15:43:23.749410  

 2135 15:43:24.257430  00180000 ################################################################

 2136 15:43:24.257585  

 2137 15:43:24.777687  00200000 ################################################################

 2138 15:43:24.777849  

 2139 15:43:25.291202  00280000 ################################################################

 2140 15:43:25.291346  

 2141 15:43:25.821319  00300000 ################################################################

 2142 15:43:25.821489  

 2143 15:43:26.349572  00380000 ################################################################

 2144 15:43:26.349712  

 2145 15:43:26.883468  00400000 ################################################################

 2146 15:43:26.883608  

 2147 15:43:27.413097  00480000 ################################################################

 2148 15:43:27.413267  

 2149 15:43:27.694528  00500000 ################################## done.

 2150 15:43:27.694681  

 2151 15:43:27.698075  Sending tftp read request... done.

 2152 15:43:27.698160  

 2153 15:43:27.700934  Waiting for the transfer... 

 2154 15:43:27.701022  

 2155 15:43:27.701099  00000000 # done.

 2156 15:43:27.701168  

 2157 15:43:27.710997  Command line loaded dynamically from TFTP file: 9406236/tftp-deploy-gplx1_wg/kernel/cmdline

 2158 15:43:27.711088  

 2159 15:43:27.736537  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9406236/extract-nfsrootfs-oimu4jlz,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2160 15:43:27.736676  

 2161 15:43:27.743028  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2162 15:43:27.747899  

 2163 15:43:27.750577  Shutting down all USB controllers.

 2164 15:43:27.750663  

 2165 15:43:27.750733  Removing current net device

 2166 15:43:27.754946  

 2167 15:43:27.755029  Finalizing coreboot

 2168 15:43:27.755097  

 2169 15:43:27.761458  Exiting depthcharge with code 4 at timestamp: 25585553

 2170 15:43:27.761554  

 2171 15:43:27.761624  

 2172 15:43:27.761688  Starting kernel ...

 2173 15:43:27.761750  

 2174 15:43:27.761823  

 2175 15:43:27.762220  end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
 2176 15:43:27.762325  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2177 15:43:27.762402  Setting prompt string to ['Linux version [0-9]']
 2178 15:43:27.762505  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2179 15:43:27.762579  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2181 15:47:49.762598  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2183 15:47:49.762845  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2185 15:47:49.763088  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2188 15:47:49.763459  end: 2 depthcharge-action (duration 00:05:00) [common]
 2190 15:47:49.763776  Cleaning after the job
 2191 15:47:49.763864  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/ramdisk
 2192 15:47:49.764333  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/kernel
 2193 15:47:49.765022  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/nfsrootfs
 2194 15:47:49.796009  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406236/tftp-deploy-gplx1_wg/modules
 2195 15:47:49.796313  start: 5.1 power-off (timeout 00:00:30) [common]
 2196 15:47:49.796482  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2197 15:47:51.965944  >> Command sent successfully.

 2198 15:47:51.968280  Returned 0 in 2 seconds
 2199 15:47:52.069104  end: 5.1 power-off (duration 00:00:02) [common]
 2201 15:47:52.069449  start: 5.2 read-feedback (timeout 00:09:58) [common]
 2202 15:47:52.069686  Listened to connection for namespace 'common' for up to 1s
 2204 15:47:52.070082  Listened to connection for namespace 'common' for up to 1s
 2205 15:47:52.070389  Listened to connection for namespace 'common' for up to 1s
 2206 15:47:52.070713  Listened to connection for namespace 'common' for up to 1s
 2207 15:47:52.071052  Listened to connection for namespace 'common' for up to 1s
 2208 15:47:52.071408  Listened to connection for namespace 'common' for up to 1s
 2209 15:47:53.072715  Finalising connection for namespace 'common'
 2210 15:47:53.072908  Disconnecting from shell: Finalise
 2211 15:47:53.072997  
 2212 15:47:53.174034  end: 5.2 read-feedback (duration 00:00:01) [common]
 2213 15:47:53.174416  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9406236
 2214 15:47:53.264028  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9406236
 2215 15:47:53.264236  JobError: Your job cannot terminate cleanly.