Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 15:49:19.896202 lava-dispatcher, installed at version: 2022.11
2 15:49:19.896401 start: 0 validate
3 15:49:19.896541 Start time: 2023-03-03 15:49:19.896533+00:00 (UTC)
4 15:49:19.896681 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:49:19.896811 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230224.0%2Famd64%2Finitrd.cpio.gz exists
6 15:49:20.181033 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:49:20.181729 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:49:20.462859 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:49:20.463529 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230224.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:49:20.754884 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:49:20.755617 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:49:21.043325 validate duration: 1.15
14 15:49:21.044628 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:49:21.045179 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:49:21.045648 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:49:21.046213 Not decompressing ramdisk as can be used compressed.
18 15:49:21.047140 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230224.0/amd64/initrd.cpio.gz
19 15:49:21.047504 saving as /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/ramdisk/initrd.cpio.gz
20 15:49:21.047847 total size: 5432116 (5MB)
21 15:49:21.053261 progress 0% (0MB)
22 15:49:21.060554 progress 5% (0MB)
23 15:49:21.067050 progress 10% (0MB)
24 15:49:21.069719 progress 15% (0MB)
25 15:49:21.071176 progress 20% (1MB)
26 15:49:21.072479 progress 25% (1MB)
27 15:49:21.073758 progress 30% (1MB)
28 15:49:21.075251 progress 35% (1MB)
29 15:49:21.076531 progress 40% (2MB)
30 15:49:21.077838 progress 45% (2MB)
31 15:49:21.079827 progress 50% (2MB)
32 15:49:21.082483 progress 55% (2MB)
33 15:49:21.085609 progress 60% (3MB)
34 15:49:21.088488 progress 65% (3MB)
35 15:49:21.091731 progress 70% (3MB)
36 15:49:21.094032 progress 75% (3MB)
37 15:49:21.096667 progress 80% (4MB)
38 15:49:21.098809 progress 85% (4MB)
39 15:49:21.101473 progress 90% (4MB)
40 15:49:21.104597 progress 95% (4MB)
41 15:49:21.106887 progress 100% (5MB)
42 15:49:21.107164 5MB downloaded in 0.06s (87.33MB/s)
43 15:49:21.107334 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:49:21.107589 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:49:21.107686 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:49:21.107779 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:49:21.107888 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:49:21.107963 saving as /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/kernel/bzImage
50 15:49:21.108028 total size: 9707520 (9MB)
51 15:49:21.108092 No compression specified
52 15:49:21.110015 progress 0% (0MB)
53 15:49:21.114988 progress 5% (0MB)
54 15:49:21.119809 progress 10% (0MB)
55 15:49:21.124024 progress 15% (1MB)
56 15:49:21.129183 progress 20% (1MB)
57 15:49:21.134749 progress 25% (2MB)
58 15:49:21.138777 progress 30% (2MB)
59 15:49:21.143961 progress 35% (3MB)
60 15:49:21.148188 progress 40% (3MB)
61 15:49:21.153777 progress 45% (4MB)
62 15:49:21.158683 progress 50% (4MB)
63 15:49:21.163567 progress 55% (5MB)
64 15:49:21.168081 progress 60% (5MB)
65 15:49:21.172590 progress 65% (6MB)
66 15:49:21.178155 progress 70% (6MB)
67 15:49:21.183126 progress 75% (6MB)
68 15:49:21.187526 progress 80% (7MB)
69 15:49:21.192445 progress 85% (7MB)
70 15:49:21.197379 progress 90% (8MB)
71 15:49:21.202330 progress 95% (8MB)
72 15:49:21.206990 progress 100% (9MB)
73 15:49:21.207243 9MB downloaded in 0.10s (93.32MB/s)
74 15:49:21.207402 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:49:21.207647 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:49:21.207738 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:49:21.207835 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:49:21.207945 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230224.0/amd64/full.rootfs.tar.xz
80 15:49:21.208013 saving as /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/nfsrootfs/full.rootfs.tar
81 15:49:21.208077 total size: 133373888 (127MB)
82 15:49:21.208140 Using unxz to decompress xz
83 15:49:21.212021 progress 0% (0MB)
84 15:49:21.552072 progress 5% (6MB)
85 15:49:21.928068 progress 10% (12MB)
86 15:49:22.226402 progress 15% (19MB)
87 15:49:22.431643 progress 20% (25MB)
88 15:49:22.686263 progress 25% (31MB)
89 15:49:23.045539 progress 30% (38MB)
90 15:49:23.403674 progress 35% (44MB)
91 15:49:23.809624 progress 40% (50MB)
92 15:49:24.190716 progress 45% (57MB)
93 15:49:24.548932 progress 50% (63MB)
94 15:49:24.918122 progress 55% (69MB)
95 15:49:25.282681 progress 60% (76MB)
96 15:49:25.646748 progress 65% (82MB)
97 15:49:26.021291 progress 70% (89MB)
98 15:49:26.396644 progress 75% (95MB)
99 15:49:26.859220 progress 80% (101MB)
100 15:49:27.304533 progress 85% (108MB)
101 15:49:27.585838 progress 90% (114MB)
102 15:49:27.936070 progress 95% (120MB)
103 15:49:28.346394 progress 100% (127MB)
104 15:49:28.351667 127MB downloaded in 7.14s (17.81MB/s)
105 15:49:28.351936 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:49:28.352259 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:49:28.352373 start: 1.4 download-retry (timeout 00:09:53) [common]
109 15:49:28.352491 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 15:49:28.352628 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:49:28.352712 saving as /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/modules/modules.tar
112 15:49:28.352801 total size: 64716 (0MB)
113 15:49:28.352891 Using unxz to decompress xz
114 15:49:28.366493 progress 50% (0MB)
115 15:49:28.369549 progress 100% (0MB)
116 15:49:28.371979 0MB downloaded in 0.02s (3.22MB/s)
117 15:49:28.372231 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:49:28.372543 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:49:28.372661 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 15:49:28.372789 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 15:49:29.539691 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9406185/extract-nfsrootfs-xrh13146
123 15:49:29.539917 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 15:49:29.540049 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 15:49:29.540208 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7
126 15:49:29.540332 makedir: /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin
127 15:49:29.540434 makedir: /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/tests
128 15:49:29.540542 makedir: /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/results
129 15:49:29.540661 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-add-keys
130 15:49:29.540813 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-add-sources
131 15:49:29.540954 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-background-process-start
132 15:49:29.541091 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-background-process-stop
133 15:49:29.541225 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-common-functions
134 15:49:29.541357 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-echo-ipv4
135 15:49:29.541492 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-install-packages
136 15:49:29.541622 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-installed-packages
137 15:49:29.541757 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-os-build
138 15:49:29.541889 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-probe-channel
139 15:49:29.542024 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-probe-ip
140 15:49:29.542160 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-target-ip
141 15:49:29.542293 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-target-mac
142 15:49:29.542426 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-target-storage
143 15:49:29.542561 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-test-case
144 15:49:29.542706 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-test-event
145 15:49:29.542841 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-test-feedback
146 15:49:29.542975 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-test-raise
147 15:49:29.543106 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-test-reference
148 15:49:29.543242 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-test-runner
149 15:49:29.543371 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-test-set
150 15:49:29.543508 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-test-shell
151 15:49:29.543640 Updating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-install-packages (oe)
152 15:49:29.543780 Updating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/bin/lava-installed-packages (oe)
153 15:49:29.543897 Creating /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/environment
154 15:49:29.544003 LAVA metadata
155 15:49:29.544083 - LAVA_JOB_ID=9406185
156 15:49:29.544168 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:49:29.544297 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 15:49:29.544376 skipped lava-vland-overlay
159 15:49:29.544481 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:49:29.544584 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:49:29.544661 skipped lava-multinode-overlay
162 15:49:29.544766 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:49:29.544869 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:49:29.544958 Loading test definitions
165 15:49:29.545075 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 15:49:29.545164 Using /lava-9406185 at stage 0
167 15:49:29.545460 uuid=9406185_1.5.2.3.1 testdef=None
168 15:49:29.545567 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 15:49:29.545675 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 15:49:29.546184 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 15:49:29.546456 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 15:49:29.547110 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 15:49:29.547391 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 15:49:29.547971 runner path: /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/0/tests/0_dmesg test_uuid 9406185_1.5.2.3.1
177 15:49:29.548136 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 15:49:29.548414 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 15:49:29.548503 Using /lava-9406185 at stage 1
181 15:49:29.548785 uuid=9406185_1.5.2.3.5 testdef=None
182 15:49:29.548892 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 15:49:29.549004 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 15:49:29.549480 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 15:49:29.549747 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 15:49:29.550360 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 15:49:29.550863 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 15:49:29.551457 runner path: /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/1/tests/1_bootrr test_uuid 9406185_1.5.2.3.5
191 15:49:29.551622 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 15:49:29.551869 Creating lava-test-runner.conf files
194 15:49:29.551956 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/0 for stage 0
195 15:49:29.552064 - 0_dmesg
196 15:49:29.552159 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406185/lava-overlay-yx8rfzk7/lava-9406185/1 for stage 1
197 15:49:29.552266 - 1_bootrr
198 15:49:29.552377 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 15:49:29.552487 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 15:49:29.557677 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 15:49:29.557800 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 15:49:29.557905 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 15:49:29.558019 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 15:49:29.558126 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 15:49:29.658422 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 15:49:29.658833 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 15:49:29.658973 extracting modules file /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406185/extract-nfsrootfs-xrh13146
208 15:49:29.662701 extracting modules file /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406185/extract-overlay-ramdisk-780jczzj/ramdisk
209 15:49:29.666168 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 15:49:29.666298 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 15:49:29.666398 [common] Applying overlay to NFS
212 15:49:29.666489 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9406185/compress-overlay-0dqcsm07/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9406185/extract-nfsrootfs-xrh13146
213 15:49:29.670069 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 15:49:29.670194 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 15:49:29.670309 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 15:49:29.670421 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 15:49:29.670520 Building ramdisk /var/lib/lava/dispatcher/tmp/9406185/extract-overlay-ramdisk-780jczzj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9406185/extract-overlay-ramdisk-780jczzj/ramdisk
218 15:49:29.701540 >> 24777 blocks
219 15:49:30.170748 rename /var/lib/lava/dispatcher/tmp/9406185/extract-overlay-ramdisk-780jczzj/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/ramdisk/ramdisk.cpio.gz
220 15:49:30.171160 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 15:49:30.171331 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 15:49:30.171494 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 15:49:30.171638 No mkimage arch provided, not using FIT.
224 15:49:30.171776 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 15:49:30.171908 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 15:49:30.172056 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 15:49:30.172199 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 15:49:30.172319 No LXC device requested
229 15:49:30.172441 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 15:49:30.172575 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 15:49:30.172705 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 15:49:30.172819 Checking files for TFTP limit of 4294967296 bytes.
233 15:49:30.173363 end: 1 tftp-deploy (duration 00:00:09) [common]
234 15:49:30.173484 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 15:49:30.173584 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 15:49:30.173714 substitutions:
237 15:49:30.173787 - {DTB}: None
238 15:49:30.173853 - {INITRD}: 9406185/tftp-deploy-ytdi6f4u/ramdisk/ramdisk.cpio.gz
239 15:49:30.173915 - {KERNEL}: 9406185/tftp-deploy-ytdi6f4u/kernel/bzImage
240 15:49:30.173981 - {LAVA_MAC}: None
241 15:49:30.174041 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9406185/extract-nfsrootfs-xrh13146
242 15:49:30.174102 - {NFS_SERVER_IP}: 192.168.201.1
243 15:49:30.174163 - {PRESEED_CONFIG}: None
244 15:49:30.174222 - {PRESEED_LOCAL}: None
245 15:49:30.174285 - {RAMDISK}: 9406185/tftp-deploy-ytdi6f4u/ramdisk/ramdisk.cpio.gz
246 15:49:30.174344 - {ROOT_PART}: None
247 15:49:30.174401 - {ROOT}: None
248 15:49:30.174456 - {SERVER_IP}: 192.168.201.1
249 15:49:30.174517 - {TEE}: None
250 15:49:30.174580 Parsed boot commands:
251 15:49:30.174639 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 15:49:30.174798 Parsed boot commands: tftpboot 192.168.201.1 9406185/tftp-deploy-ytdi6f4u/kernel/bzImage 9406185/tftp-deploy-ytdi6f4u/kernel/cmdline 9406185/tftp-deploy-ytdi6f4u/ramdisk/ramdisk.cpio.gz
253 15:49:30.174897 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 15:49:30.174988 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 15:49:30.175085 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 15:49:30.175179 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 15:49:30.175252 Not connected, no need to disconnect.
258 15:49:30.175333 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 15:49:30.175421 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 15:49:30.175493 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
261 15:49:30.178186 Setting prompt string to ['lava-test: # ']
262 15:49:30.178459 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 15:49:30.178577 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 15:49:30.178725 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 15:49:30.178820 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 15:49:30.179000 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
267 15:49:39.517016 >> Command sent successfully.
268 15:49:39.526548 Returned 0 in 9 seconds
269 15:49:39.628164 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
271 15:49:39.629845 end: 2.2.2 reset-device (duration 00:00:09) [common]
272 15:49:39.630537 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
273 15:49:39.631086 Setting prompt string to 'Starting depthcharge on Voema...'
274 15:49:39.631539 Changing prompt to 'Starting depthcharge on Voema...'
275 15:49:39.632033 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 15:49:39.633373 [Enter `^Ec?' for help]
277 15:49:39.633863
278 15:49:39.634356
279 15:49:39.634841 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 15:49:39.635303 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
281 15:49:39.635731 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 15:49:39.636181 CPU: AES supported, TXT NOT supported, VT supported
283 15:49:39.636606 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 15:49:39.637036 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 15:49:39.637456 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 15:49:39.637869 VBOOT: Loading verstage.
287 15:49:39.638288 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 15:49:39.638724 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 15:49:39.639134 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 15:49:39.639558 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 15:49:39.639987 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 15:49:39.640395
293 15:49:39.640809
294 15:49:39.641212 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 15:49:39.641612 Probing TPM: . done!
296 15:49:39.642007 TPM ready after 0 ms
297 15:49:39.642402 Connected to device vid:did:rid of 1ae0:0028:00
298 15:49:39.642831 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 15:49:39.643259 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 15:49:39.643661 Initialized TPM device CR50 revision 0
301 15:49:39.644061 tlcl_send_startup: Startup return code is 0
302 15:49:39.644455 TPM: setup succeeded
303 15:49:39.644849 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 15:49:39.645250 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 15:49:39.645645 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 15:49:39.646037 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 15:49:39.646428 Chrome EC: UHEPI supported
308 15:49:39.646850 Phase 1
309 15:49:39.647250 FMAP: area GBB found @ 1805000 (458752 bytes)
310 15:49:39.647654 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 15:49:39.648052 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 15:49:39.648452 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 15:49:39.648850 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 15:49:39.649255 Recovery requested (1009000e)
315 15:49:39.649644 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 15:49:39.650054 tlcl_extend: response is 0
317 15:49:39.650395 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 15:49:39.650754 tlcl_extend: response is 0
319 15:49:39.651099 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 15:49:39.651520 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 15:49:39.651924 BS: verstage times (exec / console): total (unknown) / 142 ms
322 15:49:39.652321
323 15:49:39.652710
324 15:49:39.653102 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 15:49:39.653549 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 15:49:39.653912 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 15:49:39.654196 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 15:49:39.654484 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 15:49:39.654782 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 15:49:39.655065 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 15:49:39.655345 TCO_STS: 0000 0000
332 15:49:39.655652 GEN_PMCON: d0015038 00002200
333 15:49:39.655936 GBLRST_CAUSE: 00000000 00000000
334 15:49:39.656227 HPR_CAUSE0: 00000000
335 15:49:39.656513 prev_sleep_state 5
336 15:49:39.656801 Boot Count incremented to 15036
337 15:49:39.657094 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 15:49:39.657382 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 15:49:39.657672 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 15:49:39.657957 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 15:49:39.658235 Chrome EC: UHEPI supported
342 15:49:39.658514 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 15:49:39.658811 Probing TPM: done!
344 15:49:39.659283 Connected to device vid:did:rid of 1ae0:0028:00
345 15:49:39.659497 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
346 15:49:39.659723 Initialized TPM device CR50 revision 0
347 15:49:39.659944 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 15:49:39.660163 MRC: Hash idx 0x100b comparison successful.
349 15:49:39.660377 MRC cache found, size faa8
350 15:49:39.660588 bootmode is set to: 2
351 15:49:39.661052 SPD index = 2
352 15:49:39.666532 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 15:49:39.669883 SPD: module type is LPDDR4X
354 15:49:39.673062 SPD: module part number is MT53D1G64D4NW-046
355 15:49:39.679574 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
356 15:49:39.686027 SPD: device width 16 bits, bus width 16 bits
357 15:49:39.689621 SPD: module size is 2048 MB (per channel)
358 15:49:40.119488 CBMEM:
359 15:49:40.122556 IMD: root @ 0x76fff000 254 entries.
360 15:49:40.125773 IMD: root @ 0x76ffec00 62 entries.
361 15:49:40.128808 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 15:49:40.135231 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 15:49:40.138530 External stage cache:
364 15:49:40.142140 IMD: root @ 0x7b3ff000 254 entries.
365 15:49:40.145410 IMD: root @ 0x7b3fec00 62 entries.
366 15:49:40.160661 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 15:49:40.167239 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 15:49:40.173666 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 15:49:40.187372 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 15:49:40.193897 cse_lite: Skip switching to RW in the recovery path
371 15:49:40.194377 8 DIMMs found
372 15:49:40.197437 SMM Memory Map
373 15:49:40.200809 SMRAM : 0x7b000000 0x800000
374 15:49:40.203815 Subregion 0: 0x7b000000 0x200000
375 15:49:40.207341 Subregion 1: 0x7b200000 0x200000
376 15:49:40.210719 Subregion 2: 0x7b400000 0x400000
377 15:49:40.211187 top_of_ram = 0x77000000
378 15:49:40.217054 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 15:49:40.223832 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 15:49:40.226896 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 15:49:40.233618 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 15:49:40.240092 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 15:49:40.247061 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 15:49:40.257099 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 15:49:40.263643 Processing 211 relocs. Offset value of 0x74c0b000
386 15:49:40.269973 BS: romstage times (exec / console): total (unknown) / 277 ms
387 15:49:40.276370
388 15:49:40.276942
389 15:49:40.283569 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 15:49:40.290106 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 15:49:40.296848 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 15:49:40.306427 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 15:49:40.313090 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 15:49:40.319785 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 15:49:40.363037 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 15:49:40.369456 Processing 5008 relocs. Offset value of 0x75d98000
397 15:49:40.372885 BS: postcar times (exec / console): total (unknown) / 59 ms
398 15:49:40.376230
399 15:49:40.376679
400 15:49:40.385640 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 15:49:40.386197 Normal boot
402 15:49:40.389774 FW_CONFIG value is 0x804c02
403 15:49:40.393041 PCI: 00:07.0 disabled by fw_config
404 15:49:40.396206 PCI: 00:07.1 disabled by fw_config
405 15:49:40.402704 PCI: 00:0d.2 disabled by fw_config
406 15:49:40.406051 PCI: 00:1c.7 disabled by fw_config
407 15:49:40.409265 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 15:49:40.415762 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 15:49:40.422478 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 15:49:40.425819 GENERIC: 0.0 disabled by fw_config
411 15:49:40.428964 GENERIC: 1.0 disabled by fw_config
412 15:49:40.432571 fw_config match found: DB_USB=USB3_ACTIVE
413 15:49:40.435562 fw_config match found: DB_USB=USB3_ACTIVE
414 15:49:40.442476 fw_config match found: DB_USB=USB3_ACTIVE
415 15:49:40.445520 fw_config match found: DB_USB=USB3_ACTIVE
416 15:49:40.448869 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 15:49:40.458875 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 15:49:40.465586 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 15:49:40.472097 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 15:49:40.478847 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 15:49:40.482217 microcode: Update skipped, already up-to-date
422 15:49:40.488715 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 15:49:40.516896 Detected 4 core, 8 thread CPU.
424 15:49:40.520206 Setting up SMI for CPU
425 15:49:40.523348 IED base = 0x7b400000
426 15:49:40.523896 IED size = 0x00400000
427 15:49:40.527044 Will perform SMM setup.
428 15:49:40.533244 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
429 15:49:40.540064 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 15:49:40.546913 Processing 16 relocs. Offset value of 0x00030000
431 15:49:40.549881 Attempting to start 7 APs
432 15:49:40.553227 Waiting for 10ms after sending INIT.
433 15:49:40.569076 Waiting for 1st SIPI to complete...AP: slot 6 apic_id 1.
434 15:49:40.569545 done.
435 15:49:40.572146 AP: slot 3 apic_id 6.
436 15:49:40.575353 AP: slot 4 apic_id 7.
437 15:49:40.575832 AP: slot 1 apic_id 3.
438 15:49:40.578522 AP: slot 5 apic_id 2.
439 15:49:40.581827 AP: slot 2 apic_id 4.
440 15:49:40.585129 AP: slot 7 apic_id 5.
441 15:49:40.588554 Waiting for 2nd SIPI to complete...done.
442 15:49:40.595256 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 15:49:40.601638 Processing 13 relocs. Offset value of 0x00038000
444 15:49:40.605033 Unable to locate Global NVS
445 15:49:40.611333 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 15:49:40.614811 Installing permanent SMM handler to 0x7b000000
447 15:49:40.624488 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 15:49:40.627578 Processing 794 relocs. Offset value of 0x7b010000
449 15:49:40.637425 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 15:49:40.640934 Processing 13 relocs. Offset value of 0x7b008000
451 15:49:40.647797 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 15:49:40.654139 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 15:49:40.660688 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 15:49:40.667269 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 15:49:40.670371 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 15:49:40.676887 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 15:49:40.683697 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 15:49:40.686939 Unable to locate Global NVS
459 15:49:40.693118 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 15:49:40.696554 Clearing SMI status registers
461 15:49:40.700089 SMI_STS: PM1
462 15:49:40.700574 PM1_STS: PWRBTN
463 15:49:40.709664 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 15:49:40.710210 In relocation handler: CPU 0
465 15:49:40.716615 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 15:49:40.719992 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 15:49:40.723265 Relocation complete.
468 15:49:40.729401 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
469 15:49:40.732832 In relocation handler: CPU 6
470 15:49:40.735816 New SMBASE=0x7affe800 IEDBASE=0x7b400000
471 15:49:40.739376 Relocation complete.
472 15:49:40.745530 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
473 15:49:40.748859 In relocation handler: CPU 2
474 15:49:40.752375 New SMBASE=0x7afff800 IEDBASE=0x7b400000
475 15:49:40.758725 Writing SMRR. base = 0x7b000006, mask=0xff800c00
476 15:49:40.758990 Relocation complete.
477 15:49:40.768649 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
478 15:49:40.771774 In relocation handler: CPU 7
479 15:49:40.775070 New SMBASE=0x7affe400 IEDBASE=0x7b400000
480 15:49:40.775164 Relocation complete.
481 15:49:40.785206 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
482 15:49:40.788588 In relocation handler: CPU 3
483 15:49:40.791621 New SMBASE=0x7afff400 IEDBASE=0x7b400000
484 15:49:40.794858 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 15:49:40.798722 Relocation complete.
486 15:49:40.804980 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
487 15:49:40.808199 In relocation handler: CPU 4
488 15:49:40.811475 New SMBASE=0x7afff000 IEDBASE=0x7b400000
489 15:49:40.814642 Relocation complete.
490 15:49:40.821207 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
491 15:49:40.824365 In relocation handler: CPU 5
492 15:49:40.827606 New SMBASE=0x7affec00 IEDBASE=0x7b400000
493 15:49:40.834398 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 15:49:40.834494 Relocation complete.
495 15:49:40.844046 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
496 15:49:40.847848 In relocation handler: CPU 1
497 15:49:40.851137 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
498 15:49:40.851638 Relocation complete.
499 15:49:40.854228 Initializing CPU #0
500 15:49:40.857530 CPU: vendor Intel device 806c1
501 15:49:40.860827 CPU: family 06, model 8c, stepping 01
502 15:49:40.864005 Clearing out pending MCEs
503 15:49:40.867612 Setting up local APIC...
504 15:49:40.870655 apic_id: 0x00 done.
505 15:49:40.871128 Turbo is available but hidden
506 15:49:40.874355 Turbo is available and visible
507 15:49:40.880919 microcode: Update skipped, already up-to-date
508 15:49:40.881513 CPU #0 initialized
509 15:49:40.884245 Initializing CPU #3
510 15:49:40.887430 Initializing CPU #4
511 15:49:40.887912 Initializing CPU #6
512 15:49:40.890588 Initializing CPU #7
513 15:49:40.894000 Initializing CPU #2
514 15:49:40.897073 CPU: vendor Intel device 806c1
515 15:49:40.900497 CPU: family 06, model 8c, stepping 01
516 15:49:40.903640 CPU: vendor Intel device 806c1
517 15:49:40.906803 CPU: family 06, model 8c, stepping 01
518 15:49:40.910545 Clearing out pending MCEs
519 15:49:40.911091 Clearing out pending MCEs
520 15:49:40.913681 Setting up local APIC...
521 15:49:40.917137 Initializing CPU #5
522 15:49:40.920305 CPU: vendor Intel device 806c1
523 15:49:40.923180 CPU: family 06, model 8c, stepping 01
524 15:49:40.926685 CPU: vendor Intel device 806c1
525 15:49:40.930062 CPU: family 06, model 8c, stepping 01
526 15:49:40.933121 Clearing out pending MCEs
527 15:49:40.933637 apic_id: 0x05 done.
528 15:49:40.936649 Setting up local APIC...
529 15:49:40.939960 Initializing CPU #1
530 15:49:40.943523 CPU: vendor Intel device 806c1
531 15:49:40.947319 CPU: family 06, model 8c, stepping 01
532 15:49:40.950823 CPU: vendor Intel device 806c1
533 15:49:40.954385 CPU: family 06, model 8c, stepping 01
534 15:49:40.954924 Clearing out pending MCEs
535 15:49:40.957707 Clearing out pending MCEs
536 15:49:40.960950 Setting up local APIC...
537 15:49:40.964244 Clearing out pending MCEs
538 15:49:40.967740 Setting up local APIC...
539 15:49:40.968218 Setting up local APIC...
540 15:49:40.970871 apic_id: 0x04 done.
541 15:49:40.973981 CPU: vendor Intel device 806c1
542 15:49:40.977596 CPU: family 06, model 8c, stepping 01
543 15:49:40.980513 Clearing out pending MCEs
544 15:49:40.983971 Setting up local APIC...
545 15:49:40.984479 apic_id: 0x02 done.
546 15:49:40.987105 apic_id: 0x03 done.
547 15:49:40.990728 microcode: Update skipped, already up-to-date
548 15:49:40.993920 apic_id: 0x07 done.
549 15:49:40.997334 apic_id: 0x06 done.
550 15:49:41.000657 microcode: Update skipped, already up-to-date
551 15:49:41.003881 microcode: Update skipped, already up-to-date
552 15:49:41.007096 CPU #4 initialized
553 15:49:41.010153 microcode: Update skipped, already up-to-date
554 15:49:41.016861 microcode: Update skipped, already up-to-date
555 15:49:41.017512 CPU #7 initialized
556 15:49:41.020381 CPU #2 initialized
557 15:49:41.023780 Setting up local APIC...
558 15:49:41.024359 CPU #3 initialized
559 15:49:41.030154 microcode: Update skipped, already up-to-date
560 15:49:41.030722 CPU #5 initialized
561 15:49:41.033531 CPU #1 initialized
562 15:49:41.036593 apic_id: 0x01 done.
563 15:49:41.039944 microcode: Update skipped, already up-to-date
564 15:49:41.043591 CPU #6 initialized
565 15:49:41.046873 bsp_do_flight_plan done after 454 msecs.
566 15:49:41.049856 CPU: frequency set to 4400 MHz
567 15:49:41.050420 Enabling SMIs.
568 15:49:41.056332 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
569 15:49:41.073675 SATAXPCIE1 indicates PCIe NVMe is present
570 15:49:41.076859 Probing TPM: done!
571 15:49:41.079884 Connected to device vid:did:rid of 1ae0:0028:00
572 15:49:41.090518 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
573 15:49:41.093867 Initialized TPM device CR50 revision 0
574 15:49:41.097180 Enabling S0i3.4
575 15:49:41.103997 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 15:49:41.107176 Found a VBT of 8704 bytes after decompression
577 15:49:41.113730 cse_lite: CSE RO boot. HybridStorageMode disabled
578 15:49:41.120227 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 15:49:41.195987 FSPS returned 0
580 15:49:41.199296 Executing Phase 1 of FspMultiPhaseSiInit
581 15:49:41.209423 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 15:49:41.212379 port C0 DISC req: usage 1 usb3 1 usb2 5
583 15:49:41.215629 Raw Buffer output 0 00000511
584 15:49:41.219076 Raw Buffer output 1 00000000
585 15:49:41.222898 pmc_send_ipc_cmd succeeded
586 15:49:41.229476 port C1 DISC req: usage 1 usb3 2 usb2 3
587 15:49:41.230084 Raw Buffer output 0 00000321
588 15:49:41.232655 Raw Buffer output 1 00000000
589 15:49:41.237218 pmc_send_ipc_cmd succeeded
590 15:49:41.242234 Detected 4 core, 8 thread CPU.
591 15:49:41.245371 Detected 4 core, 8 thread CPU.
592 15:49:41.445743 Display FSP Version Info HOB
593 15:49:41.448842 Reference Code - CPU = a.0.4c.31
594 15:49:41.452228 uCode Version = 0.0.0.86
595 15:49:41.455925 TXT ACM version = ff.ff.ff.ffff
596 15:49:41.458680 Reference Code - ME = a.0.4c.31
597 15:49:41.462302 MEBx version = 0.0.0.0
598 15:49:41.465424 ME Firmware Version = Consumer SKU
599 15:49:41.468807 Reference Code - PCH = a.0.4c.31
600 15:49:41.471943 PCH-CRID Status = Disabled
601 15:49:41.475113 PCH-CRID Original Value = ff.ff.ff.ffff
602 15:49:41.478690 PCH-CRID New Value = ff.ff.ff.ffff
603 15:49:41.481841 OPROM - RST - RAID = ff.ff.ff.ffff
604 15:49:41.485270 PCH Hsio Version = 4.0.0.0
605 15:49:41.488585 Reference Code - SA - System Agent = a.0.4c.31
606 15:49:41.491668 Reference Code - MRC = 2.0.0.1
607 15:49:41.494990 SA - PCIe Version = a.0.4c.31
608 15:49:41.498147 SA-CRID Status = Disabled
609 15:49:41.501783 SA-CRID Original Value = 0.0.0.1
610 15:49:41.505121 SA-CRID New Value = 0.0.0.1
611 15:49:41.508227 OPROM - VBIOS = ff.ff.ff.ffff
612 15:49:41.511717 IO Manageability Engine FW Version = 11.1.4.0
613 15:49:41.514941 PHY Build Version = 0.0.0.e0
614 15:49:41.518399 Thunderbolt(TM) FW Version = 0.0.0.0
615 15:49:41.525449 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 15:49:41.528964 ITSS IRQ Polarities Before:
617 15:49:41.529512 IPC0: 0xffffffff
618 15:49:41.532392 IPC1: 0xffffffff
619 15:49:41.533089 IPC2: 0xffffffff
620 15:49:41.535843 IPC3: 0xffffffff
621 15:49:41.539229 ITSS IRQ Polarities After:
622 15:49:41.539730 IPC0: 0xffffffff
623 15:49:41.542492 IPC1: 0xffffffff
624 15:49:41.542999 IPC2: 0xffffffff
625 15:49:41.545741 IPC3: 0xffffffff
626 15:49:41.549077 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 15:49:41.562389 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 15:49:41.572318 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 15:49:41.585279 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 15:49:41.591871 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
631 15:49:41.592361 Enumerating buses...
632 15:49:41.598603 Show all devs... Before device enumeration.
633 15:49:41.599112 Root Device: enabled 1
634 15:49:41.601916 DOMAIN: 0000: enabled 1
635 15:49:41.605235 CPU_CLUSTER: 0: enabled 1
636 15:49:41.608278 PCI: 00:00.0: enabled 1
637 15:49:41.611866 PCI: 00:02.0: enabled 1
638 15:49:41.612346 PCI: 00:04.0: enabled 1
639 15:49:41.615015 PCI: 00:05.0: enabled 1
640 15:49:41.618183 PCI: 00:06.0: enabled 0
641 15:49:41.621631 PCI: 00:07.0: enabled 0
642 15:49:41.622093 PCI: 00:07.1: enabled 0
643 15:49:41.624791 PCI: 00:07.2: enabled 0
644 15:49:41.628159 PCI: 00:07.3: enabled 0
645 15:49:41.628626 PCI: 00:08.0: enabled 1
646 15:49:41.631257 PCI: 00:09.0: enabled 0
647 15:49:41.634716 PCI: 00:0a.0: enabled 0
648 15:49:41.638104 PCI: 00:0d.0: enabled 1
649 15:49:41.638611 PCI: 00:0d.1: enabled 0
650 15:49:41.641224 PCI: 00:0d.2: enabled 0
651 15:49:41.644747 PCI: 00:0d.3: enabled 0
652 15:49:41.648005 PCI: 00:0e.0: enabled 0
653 15:49:41.648475 PCI: 00:10.2: enabled 1
654 15:49:41.651196 PCI: 00:10.6: enabled 0
655 15:49:41.654629 PCI: 00:10.7: enabled 0
656 15:49:41.658046 PCI: 00:12.0: enabled 0
657 15:49:41.658515 PCI: 00:12.6: enabled 0
658 15:49:41.660988 PCI: 00:13.0: enabled 0
659 15:49:41.664447 PCI: 00:14.0: enabled 1
660 15:49:41.667673 PCI: 00:14.1: enabled 0
661 15:49:41.668307 PCI: 00:14.2: enabled 1
662 15:49:41.670996 PCI: 00:14.3: enabled 1
663 15:49:41.674450 PCI: 00:15.0: enabled 1
664 15:49:41.677588 PCI: 00:15.1: enabled 1
665 15:49:41.678221 PCI: 00:15.2: enabled 1
666 15:49:41.680655 PCI: 00:15.3: enabled 1
667 15:49:41.684044 PCI: 00:16.0: enabled 1
668 15:49:41.687445 PCI: 00:16.1: enabled 0
669 15:49:41.687856 PCI: 00:16.2: enabled 0
670 15:49:41.690742 PCI: 00:16.3: enabled 0
671 15:49:41.694027 PCI: 00:16.4: enabled 0
672 15:49:41.694280 PCI: 00:16.5: enabled 0
673 15:49:41.697258 PCI: 00:17.0: enabled 1
674 15:49:41.700645 PCI: 00:19.0: enabled 0
675 15:49:41.703682 PCI: 00:19.1: enabled 1
676 15:49:41.703953 PCI: 00:19.2: enabled 0
677 15:49:41.707173 PCI: 00:1c.0: enabled 1
678 15:49:41.710323 PCI: 00:1c.1: enabled 0
679 15:49:41.713246 PCI: 00:1c.2: enabled 0
680 15:49:41.713338 PCI: 00:1c.3: enabled 0
681 15:49:41.716861 PCI: 00:1c.4: enabled 0
682 15:49:41.719896 PCI: 00:1c.5: enabled 0
683 15:49:41.723382 PCI: 00:1c.6: enabled 1
684 15:49:41.723477 PCI: 00:1c.7: enabled 0
685 15:49:41.726467 PCI: 00:1d.0: enabled 1
686 15:49:41.729933 PCI: 00:1d.1: enabled 0
687 15:49:41.733021 PCI: 00:1d.2: enabled 1
688 15:49:41.733114 PCI: 00:1d.3: enabled 0
689 15:49:41.736598 PCI: 00:1e.0: enabled 1
690 15:49:41.739941 PCI: 00:1e.1: enabled 0
691 15:49:41.742970 PCI: 00:1e.2: enabled 1
692 15:49:41.743060 PCI: 00:1e.3: enabled 1
693 15:49:41.746389 PCI: 00:1f.0: enabled 1
694 15:49:41.749609 PCI: 00:1f.1: enabled 0
695 15:49:41.752996 PCI: 00:1f.2: enabled 1
696 15:49:41.753087 PCI: 00:1f.3: enabled 1
697 15:49:41.756128 PCI: 00:1f.4: enabled 0
698 15:49:41.759608 PCI: 00:1f.5: enabled 1
699 15:49:41.762701 PCI: 00:1f.6: enabled 0
700 15:49:41.762803 PCI: 00:1f.7: enabled 0
701 15:49:41.766186 APIC: 00: enabled 1
702 15:49:41.769351 GENERIC: 0.0: enabled 1
703 15:49:41.769450 GENERIC: 0.0: enabled 1
704 15:49:41.772810 GENERIC: 1.0: enabled 1
705 15:49:41.775849 GENERIC: 0.0: enabled 1
706 15:49:41.779293 GENERIC: 1.0: enabled 1
707 15:49:41.779393 USB0 port 0: enabled 1
708 15:49:41.782367 GENERIC: 0.0: enabled 1
709 15:49:41.785716 USB0 port 0: enabled 1
710 15:49:41.785807 GENERIC: 0.0: enabled 1
711 15:49:41.789017 I2C: 00:1a: enabled 1
712 15:49:41.792495 I2C: 00:31: enabled 1
713 15:49:41.795766 I2C: 00:32: enabled 1
714 15:49:41.795857 I2C: 00:10: enabled 1
715 15:49:41.798845 I2C: 00:15: enabled 1
716 15:49:41.802299 GENERIC: 0.0: enabled 0
717 15:49:41.802390 GENERIC: 1.0: enabled 0
718 15:49:41.805495 GENERIC: 0.0: enabled 1
719 15:49:41.808677 SPI: 00: enabled 1
720 15:49:41.808768 SPI: 00: enabled 1
721 15:49:41.812204 PNP: 0c09.0: enabled 1
722 15:49:41.815378 GENERIC: 0.0: enabled 1
723 15:49:41.815469 USB3 port 0: enabled 1
724 15:49:41.818867 USB3 port 1: enabled 1
725 15:49:41.822002 USB3 port 2: enabled 0
726 15:49:41.825492 USB3 port 3: enabled 0
727 15:49:41.825582 USB2 port 0: enabled 0
728 15:49:41.828687 USB2 port 1: enabled 1
729 15:49:41.831983 USB2 port 2: enabled 1
730 15:49:41.832072 USB2 port 3: enabled 0
731 15:49:41.835202 USB2 port 4: enabled 1
732 15:49:41.838412 USB2 port 5: enabled 0
733 15:49:41.841876 USB2 port 6: enabled 0
734 15:49:41.841968 USB2 port 7: enabled 0
735 15:49:41.844996 USB2 port 8: enabled 0
736 15:49:41.848166 USB2 port 9: enabled 0
737 15:49:41.848256 USB3 port 0: enabled 0
738 15:49:41.851727 USB3 port 1: enabled 1
739 15:49:41.854859 USB3 port 2: enabled 0
740 15:49:41.858385 USB3 port 3: enabled 0
741 15:49:41.858475 GENERIC: 0.0: enabled 1
742 15:49:41.861506 GENERIC: 1.0: enabled 1
743 15:49:41.864988 APIC: 03: enabled 1
744 15:49:41.865074 APIC: 04: enabled 1
745 15:49:41.868160 APIC: 06: enabled 1
746 15:49:41.871412 APIC: 07: enabled 1
747 15:49:41.871503 APIC: 02: enabled 1
748 15:49:41.874462 APIC: 01: enabled 1
749 15:49:41.874553 APIC: 05: enabled 1
750 15:49:41.877854 Compare with tree...
751 15:49:41.881392 Root Device: enabled 1
752 15:49:41.884550 DOMAIN: 0000: enabled 1
753 15:49:41.884636 PCI: 00:00.0: enabled 1
754 15:49:41.887900 PCI: 00:02.0: enabled 1
755 15:49:41.891042 PCI: 00:04.0: enabled 1
756 15:49:41.894381 GENERIC: 0.0: enabled 1
757 15:49:41.897519 PCI: 00:05.0: enabled 1
758 15:49:41.897610 PCI: 00:06.0: enabled 0
759 15:49:41.900917 PCI: 00:07.0: enabled 0
760 15:49:41.904313 GENERIC: 0.0: enabled 1
761 15:49:41.907395 PCI: 00:07.1: enabled 0
762 15:49:41.910836 GENERIC: 1.0: enabled 1
763 15:49:41.910925 PCI: 00:07.2: enabled 0
764 15:49:41.914228 GENERIC: 0.0: enabled 1
765 15:49:41.917394 PCI: 00:07.3: enabled 0
766 15:49:41.920621 GENERIC: 1.0: enabled 1
767 15:49:41.924071 PCI: 00:08.0: enabled 1
768 15:49:41.927183 PCI: 00:09.0: enabled 0
769 15:49:41.927273 PCI: 00:0a.0: enabled 0
770 15:49:41.930660 PCI: 00:0d.0: enabled 1
771 15:49:41.933780 USB0 port 0: enabled 1
772 15:49:41.937367 USB3 port 0: enabled 1
773 15:49:41.940441 USB3 port 1: enabled 1
774 15:49:41.940533 USB3 port 2: enabled 0
775 15:49:41.943839 USB3 port 3: enabled 0
776 15:49:41.946898 PCI: 00:0d.1: enabled 0
777 15:49:41.950441 PCI: 00:0d.2: enabled 0
778 15:49:41.953515 GENERIC: 0.0: enabled 1
779 15:49:41.953603 PCI: 00:0d.3: enabled 0
780 15:49:41.957125 PCI: 00:0e.0: enabled 0
781 15:49:41.960304 PCI: 00:10.2: enabled 1
782 15:49:41.963758 PCI: 00:10.6: enabled 0
783 15:49:41.966886 PCI: 00:10.7: enabled 0
784 15:49:41.966972 PCI: 00:12.0: enabled 0
785 15:49:41.970010 PCI: 00:12.6: enabled 0
786 15:49:41.973293 PCI: 00:13.0: enabled 0
787 15:49:41.976889 PCI: 00:14.0: enabled 1
788 15:49:41.980087 USB0 port 0: enabled 1
789 15:49:41.980174 USB2 port 0: enabled 0
790 15:49:41.983557 USB2 port 1: enabled 1
791 15:49:41.986540 USB2 port 2: enabled 1
792 15:49:41.989786 USB2 port 3: enabled 0
793 15:49:41.993405 USB2 port 4: enabled 1
794 15:49:41.996499 USB2 port 5: enabled 0
795 15:49:41.996585 USB2 port 6: enabled 0
796 15:49:41.999701 USB2 port 7: enabled 0
797 15:49:42.003217 USB2 port 8: enabled 0
798 15:49:42.006199 USB2 port 9: enabled 0
799 15:49:42.009668 USB3 port 0: enabled 0
800 15:49:42.012835 USB3 port 1: enabled 1
801 15:49:42.012921 USB3 port 2: enabled 0
802 15:49:42.016136 USB3 port 3: enabled 0
803 15:49:42.019429 PCI: 00:14.1: enabled 0
804 15:49:42.022931 PCI: 00:14.2: enabled 1
805 15:49:42.026179 PCI: 00:14.3: enabled 1
806 15:49:42.029327 GENERIC: 0.0: enabled 1
807 15:49:42.029414 PCI: 00:15.0: enabled 1
808 15:49:42.032793 I2C: 00:1a: enabled 1
809 15:49:42.035925 I2C: 00:31: enabled 1
810 15:49:42.039545 I2C: 00:32: enabled 1
811 15:49:42.039633 PCI: 00:15.1: enabled 1
812 15:49:42.042713 I2C: 00:10: enabled 1
813 15:49:42.045761 PCI: 00:15.2: enabled 1
814 15:49:42.049238 PCI: 00:15.3: enabled 1
815 15:49:42.052492 PCI: 00:16.0: enabled 1
816 15:49:42.052582 PCI: 00:16.1: enabled 0
817 15:49:42.055942 PCI: 00:16.2: enabled 0
818 15:49:42.059099 PCI: 00:16.3: enabled 0
819 15:49:42.062575 PCI: 00:16.4: enabled 0
820 15:49:42.065744 PCI: 00:16.5: enabled 0
821 15:49:42.065835 PCI: 00:17.0: enabled 1
822 15:49:42.068929 PCI: 00:19.0: enabled 0
823 15:49:42.072442 PCI: 00:19.1: enabled 1
824 15:49:42.075554 I2C: 00:15: enabled 1
825 15:49:42.078692 PCI: 00:19.2: enabled 0
826 15:49:42.078777 PCI: 00:1d.0: enabled 1
827 15:49:42.082061 GENERIC: 0.0: enabled 1
828 15:49:42.085524 PCI: 00:1e.0: enabled 1
829 15:49:42.088521 PCI: 00:1e.1: enabled 0
830 15:49:42.092026 PCI: 00:1e.2: enabled 1
831 15:49:42.092113 SPI: 00: enabled 1
832 15:49:42.095457 PCI: 00:1e.3: enabled 1
833 15:49:42.098547 SPI: 00: enabled 1
834 15:49:42.101817 PCI: 00:1f.0: enabled 1
835 15:49:42.101902 PNP: 0c09.0: enabled 1
836 15:49:42.105386 PCI: 00:1f.1: enabled 0
837 15:49:42.108573 PCI: 00:1f.2: enabled 1
838 15:49:42.111823 GENERIC: 0.0: enabled 1
839 15:49:42.163328 GENERIC: 0.0: enabled 1
840 15:49:42.163460 GENERIC: 1.0: enabled 1
841 15:49:42.163535 PCI: 00:1f.3: enabled 1
842 15:49:42.163797 PCI: 00:1f.4: enabled 0
843 15:49:42.163870 PCI: 00:1f.5: enabled 1
844 15:49:42.163935 PCI: 00:1f.6: enabled 0
845 15:49:42.163999 PCI: 00:1f.7: enabled 0
846 15:49:42.164252 CPU_CLUSTER: 0: enabled 1
847 15:49:42.164324 APIC: 00: enabled 1
848 15:49:42.164387 APIC: 03: enabled 1
849 15:49:42.164448 APIC: 04: enabled 1
850 15:49:42.164512 APIC: 06: enabled 1
851 15:49:42.164573 APIC: 07: enabled 1
852 15:49:42.164633 APIC: 02: enabled 1
853 15:49:42.164694 APIC: 01: enabled 1
854 15:49:42.164754 APIC: 05: enabled 1
855 15:49:42.164813 Root Device scanning...
856 15:49:42.164872 scan_static_bus for Root Device
857 15:49:42.165117 DOMAIN: 0000 enabled
858 15:49:42.165185 CPU_CLUSTER: 0 enabled
859 15:49:42.165246 DOMAIN: 0000 scanning...
860 15:49:42.213746 PCI: pci_scan_bus for bus 00
861 15:49:42.213871 PCI: 00:00.0 [8086/0000] ops
862 15:49:42.214141 PCI: 00:00.0 [8086/9a12] enabled
863 15:49:42.214231 PCI: 00:02.0 [8086/0000] bus ops
864 15:49:42.214317 PCI: 00:02.0 [8086/9a40] enabled
865 15:49:42.214398 PCI: 00:04.0 [8086/0000] bus ops
866 15:49:42.214461 PCI: 00:04.0 [8086/9a03] enabled
867 15:49:42.214523 PCI: 00:05.0 [8086/9a19] enabled
868 15:49:42.214593 PCI: 00:07.0 [0000/0000] hidden
869 15:49:42.214657 PCI: 00:08.0 [8086/9a11] enabled
870 15:49:42.214719 PCI: 00:0a.0 [8086/9a0d] disabled
871 15:49:42.214982 PCI: 00:0d.0 [8086/0000] bus ops
872 15:49:42.215055 PCI: 00:0d.0 [8086/9a13] enabled
873 15:49:42.215118 PCI: 00:14.0 [8086/0000] bus ops
874 15:49:42.215179 PCI: 00:14.0 [8086/a0ed] enabled
875 15:49:42.263926 PCI: 00:14.2 [8086/a0ef] enabled
876 15:49:42.264055 PCI: 00:14.3 [8086/0000] bus ops
877 15:49:42.264323 PCI: 00:14.3 [8086/a0f0] enabled
878 15:49:42.264431 PCI: 00:15.0 [8086/0000] bus ops
879 15:49:42.264531 PCI: 00:15.0 [8086/a0e8] enabled
880 15:49:42.264619 PCI: 00:15.1 [8086/0000] bus ops
881 15:49:42.264731 PCI: 00:15.1 [8086/a0e9] enabled
882 15:49:42.264817 PCI: 00:15.2 [8086/0000] bus ops
883 15:49:42.264895 PCI: 00:15.2 [8086/a0ea] enabled
884 15:49:42.265173 PCI: 00:15.3 [8086/0000] bus ops
885 15:49:42.265244 PCI: 00:15.3 [8086/a0eb] enabled
886 15:49:42.265310 PCI: 00:16.0 [8086/0000] ops
887 15:49:42.265390 PCI: 00:16.0 [8086/a0e0] enabled
888 15:49:42.265457 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 15:49:42.269836 PCI: 00:19.0 [8086/0000] bus ops
890 15:49:42.269912 PCI: 00:19.0 [8086/a0c5] disabled
891 15:49:42.272957 PCI: 00:19.1 [8086/0000] bus ops
892 15:49:42.276123 PCI: 00:19.1 [8086/a0c6] enabled
893 15:49:42.279800 PCI: 00:1d.0 [8086/0000] bus ops
894 15:49:42.282829 PCI: 00:1d.0 [8086/a0b0] enabled
895 15:49:42.286234 PCI: 00:1e.0 [8086/0000] ops
896 15:49:42.289347 PCI: 00:1e.0 [8086/a0a8] enabled
897 15:49:42.292782 PCI: 00:1e.2 [8086/0000] bus ops
898 15:49:42.295913 PCI: 00:1e.2 [8086/a0aa] enabled
899 15:49:42.299340 PCI: 00:1e.3 [8086/0000] bus ops
900 15:49:42.302464 PCI: 00:1e.3 [8086/a0ab] enabled
901 15:49:42.305945 PCI: 00:1f.0 [8086/0000] bus ops
902 15:49:42.309135 PCI: 00:1f.0 [8086/a087] enabled
903 15:49:42.309231 RTC Init
904 15:49:42.315520 Set power on after power failure.
905 15:49:42.315608 Disabling Deep S3
906 15:49:42.318985 Disabling Deep S3
907 15:49:42.319069 Disabling Deep S4
908 15:49:42.322026 Disabling Deep S4
909 15:49:42.322122 Disabling Deep S5
910 15:49:42.325606 Disabling Deep S5
911 15:49:42.328711 PCI: 00:1f.2 [0000/0000] hidden
912 15:49:42.331970 PCI: 00:1f.3 [8086/0000] bus ops
913 15:49:42.335389 PCI: 00:1f.3 [8086/a0c8] enabled
914 15:49:42.338464 PCI: 00:1f.5 [8086/0000] bus ops
915 15:49:42.341929 PCI: 00:1f.5 [8086/a0a4] enabled
916 15:49:42.345077 PCI: Leftover static devices:
917 15:49:42.345167 PCI: 00:10.2
918 15:49:42.348489 PCI: 00:10.6
919 15:49:42.348580 PCI: 00:10.7
920 15:49:42.351920 PCI: 00:06.0
921 15:49:42.352010 PCI: 00:07.1
922 15:49:42.352081 PCI: 00:07.2
923 15:49:42.355053 PCI: 00:07.3
924 15:49:42.355143 PCI: 00:09.0
925 15:49:42.358183 PCI: 00:0d.1
926 15:49:42.358273 PCI: 00:0d.2
927 15:49:42.361645 PCI: 00:0d.3
928 15:49:42.361739 PCI: 00:0e.0
929 15:49:42.361810 PCI: 00:12.0
930 15:49:42.364846 PCI: 00:12.6
931 15:49:42.364937 PCI: 00:13.0
932 15:49:42.367942 PCI: 00:14.1
933 15:49:42.368032 PCI: 00:16.1
934 15:49:42.368103 PCI: 00:16.2
935 15:49:42.371341 PCI: 00:16.3
936 15:49:42.371445 PCI: 00:16.4
937 15:49:42.374600 PCI: 00:16.5
938 15:49:42.374695 PCI: 00:17.0
939 15:49:42.377970 PCI: 00:19.2
940 15:49:42.378081 PCI: 00:1e.1
941 15:49:42.378164 PCI: 00:1f.1
942 15:49:42.381479 PCI: 00:1f.4
943 15:49:42.381566 PCI: 00:1f.6
944 15:49:42.384661 PCI: 00:1f.7
945 15:49:42.387597 PCI: Check your devicetree.cb.
946 15:49:42.387684 PCI: 00:02.0 scanning...
947 15:49:42.390920 scan_generic_bus for PCI: 00:02.0
948 15:49:42.397404 scan_generic_bus for PCI: 00:02.0 done
949 15:49:42.400954 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 15:49:42.404170 PCI: 00:04.0 scanning...
951 15:49:42.407384 scan_generic_bus for PCI: 00:04.0
952 15:49:42.410590 GENERIC: 0.0 enabled
953 15:49:42.413697 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 15:49:42.420551 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 15:49:42.423727 PCI: 00:0d.0 scanning...
956 15:49:42.427201 scan_static_bus for PCI: 00:0d.0
957 15:49:42.427293 USB0 port 0 enabled
958 15:49:42.430351 USB0 port 0 scanning...
959 15:49:42.433439 scan_static_bus for USB0 port 0
960 15:49:42.436814 USB3 port 0 enabled
961 15:49:42.436911 USB3 port 1 enabled
962 15:49:42.440326 USB3 port 2 disabled
963 15:49:42.443523 USB3 port 3 disabled
964 15:49:42.446585 USB3 port 0 scanning...
965 15:49:42.449851 scan_static_bus for USB3 port 0
966 15:49:42.453157 scan_static_bus for USB3 port 0 done
967 15:49:42.456689 scan_bus: bus USB3 port 0 finished in 6 msecs
968 15:49:42.459777 USB3 port 1 scanning...
969 15:49:42.463262 scan_static_bus for USB3 port 1
970 15:49:42.466649 scan_static_bus for USB3 port 1 done
971 15:49:42.469651 scan_bus: bus USB3 port 1 finished in 6 msecs
972 15:49:42.476154 scan_static_bus for USB0 port 0 done
973 15:49:42.479554 scan_bus: bus USB0 port 0 finished in 43 msecs
974 15:49:42.482758 scan_static_bus for PCI: 00:0d.0 done
975 15:49:42.489437 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 15:49:42.489529 PCI: 00:14.0 scanning...
977 15:49:42.495905 scan_static_bus for PCI: 00:14.0
978 15:49:42.495997 USB0 port 0 enabled
979 15:49:42.499093 USB0 port 0 scanning...
980 15:49:42.502338 scan_static_bus for USB0 port 0
981 15:49:42.505541 USB2 port 0 disabled
982 15:49:42.505632 USB2 port 1 enabled
983 15:49:42.508805 USB2 port 2 enabled
984 15:49:42.512324 USB2 port 3 disabled
985 15:49:42.512415 USB2 port 4 enabled
986 15:49:42.515554 USB2 port 5 disabled
987 15:49:42.515645 USB2 port 6 disabled
988 15:49:42.518899 USB2 port 7 disabled
989 15:49:42.522116 USB2 port 8 disabled
990 15:49:42.522207 USB2 port 9 disabled
991 15:49:42.525279 USB3 port 0 disabled
992 15:49:42.528744 USB3 port 1 enabled
993 15:49:42.528835 USB3 port 2 disabled
994 15:49:42.531889 USB3 port 3 disabled
995 15:49:42.535205 USB2 port 1 scanning...
996 15:49:42.538370 scan_static_bus for USB2 port 1
997 15:49:42.541938 scan_static_bus for USB2 port 1 done
998 15:49:42.544996 scan_bus: bus USB2 port 1 finished in 6 msecs
999 15:49:42.548293 USB2 port 2 scanning...
1000 15:49:42.551534 scan_static_bus for USB2 port 2
1001 15:49:42.555196 scan_static_bus for USB2 port 2 done
1002 15:49:42.561457 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 15:49:42.561549 USB2 port 4 scanning...
1004 15:49:42.564911 scan_static_bus for USB2 port 4
1005 15:49:42.571461 scan_static_bus for USB2 port 4 done
1006 15:49:42.574991 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 15:49:42.578016 USB3 port 1 scanning...
1008 15:49:42.581504 scan_static_bus for USB3 port 1
1009 15:49:42.584656 scan_static_bus for USB3 port 1 done
1010 15:49:42.587944 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 15:49:42.591361 scan_static_bus for USB0 port 0 done
1012 15:49:42.597617 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 15:49:42.600947 scan_static_bus for PCI: 00:14.0 done
1014 15:49:42.604584 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1015 15:49:42.607646 PCI: 00:14.3 scanning...
1016 15:49:42.610838 scan_static_bus for PCI: 00:14.3
1017 15:49:42.614362 GENERIC: 0.0 enabled
1018 15:49:42.617489 scan_static_bus for PCI: 00:14.3 done
1019 15:49:42.624082 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 15:49:42.624174 PCI: 00:15.0 scanning...
1021 15:49:42.627274 scan_static_bus for PCI: 00:15.0
1022 15:49:42.630600 I2C: 00:1a enabled
1023 15:49:42.633939 I2C: 00:31 enabled
1024 15:49:42.634030 I2C: 00:32 enabled
1025 15:49:42.637194 scan_static_bus for PCI: 00:15.0 done
1026 15:49:42.643926 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 15:49:42.646976 PCI: 00:15.1 scanning...
1028 15:49:42.650429 scan_static_bus for PCI: 00:15.1
1029 15:49:42.650520 I2C: 00:10 enabled
1030 15:49:42.653633 scan_static_bus for PCI: 00:15.1 done
1031 15:49:42.660208 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 15:49:42.663272 PCI: 00:15.2 scanning...
1033 15:49:42.666836 scan_static_bus for PCI: 00:15.2
1034 15:49:42.670039 scan_static_bus for PCI: 00:15.2 done
1035 15:49:42.673468 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 15:49:42.676539 PCI: 00:15.3 scanning...
1037 15:49:42.679689 scan_static_bus for PCI: 00:15.3
1038 15:49:42.683166 scan_static_bus for PCI: 00:15.3 done
1039 15:49:42.689550 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 15:49:42.689640 PCI: 00:19.1 scanning...
1041 15:49:42.693134 scan_static_bus for PCI: 00:19.1
1042 15:49:42.696186 I2C: 00:15 enabled
1043 15:49:42.699620 scan_static_bus for PCI: 00:19.1 done
1044 15:49:42.706250 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 15:49:42.706341 PCI: 00:1d.0 scanning...
1046 15:49:42.713067 do_pci_scan_bridge for PCI: 00:1d.0
1047 15:49:42.713158 PCI: pci_scan_bus for bus 01
1048 15:49:42.716490 PCI: 01:00.0 [15b7/5009] enabled
1049 15:49:42.719590 GENERIC: 0.0 enabled
1050 15:49:42.722816 Enabling Common Clock Configuration
1051 15:49:42.729578 L1 Sub-State supported from root port 29
1052 15:49:42.729669 L1 Sub-State Support = 0x5
1053 15:49:42.732665 CommonModeRestoreTime = 0x28
1054 15:49:42.739499 Power On Value = 0x16, Power On Scale = 0x0
1055 15:49:42.739591 ASPM: Enabled L1
1056 15:49:42.742695 PCIe: Max_Payload_Size adjusted to 128
1057 15:49:42.749265 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 15:49:42.752456 PCI: 00:1e.2 scanning...
1059 15:49:42.755603 scan_generic_bus for PCI: 00:1e.2
1060 15:49:42.755695 SPI: 00 enabled
1061 15:49:42.761969 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 15:49:42.768653 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 15:49:42.768745 PCI: 00:1e.3 scanning...
1064 15:49:42.775326 scan_generic_bus for PCI: 00:1e.3
1065 15:49:42.775418 SPI: 00 enabled
1066 15:49:42.782211 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 15:49:42.785470 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 15:49:42.788563 PCI: 00:1f.0 scanning...
1069 15:49:42.792114 scan_static_bus for PCI: 00:1f.0
1070 15:49:42.795095 PNP: 0c09.0 enabled
1071 15:49:42.795186 PNP: 0c09.0 scanning...
1072 15:49:42.798645 scan_static_bus for PNP: 0c09.0
1073 15:49:42.804894 scan_static_bus for PNP: 0c09.0 done
1074 15:49:42.808301 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 15:49:42.811747 scan_static_bus for PCI: 00:1f.0 done
1076 15:49:42.818341 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 15:49:42.818433 PCI: 00:1f.2 scanning...
1078 15:49:42.821709 scan_static_bus for PCI: 00:1f.2
1079 15:49:42.825100 GENERIC: 0.0 enabled
1080 15:49:42.828041 GENERIC: 0.0 scanning...
1081 15:49:42.831101 scan_static_bus for GENERIC: 0.0
1082 15:49:42.834835 GENERIC: 0.0 enabled
1083 15:49:42.834931 GENERIC: 1.0 enabled
1084 15:49:42.837787 scan_static_bus for GENERIC: 0.0 done
1085 15:49:42.844573 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 15:49:42.847663 scan_static_bus for PCI: 00:1f.2 done
1087 15:49:42.854098 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 15:49:42.854229 PCI: 00:1f.3 scanning...
1089 15:49:42.857771 scan_static_bus for PCI: 00:1f.3
1090 15:49:42.864110 scan_static_bus for PCI: 00:1f.3 done
1091 15:49:42.867691 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 15:49:42.870899 PCI: 00:1f.5 scanning...
1093 15:49:42.874175 scan_generic_bus for PCI: 00:1f.5
1094 15:49:42.877349 scan_generic_bus for PCI: 00:1f.5 done
1095 15:49:42.880849 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 15:49:42.887287 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1097 15:49:42.890375 scan_static_bus for Root Device done
1098 15:49:42.896813 scan_bus: bus Root Device finished in 735 msecs
1099 15:49:42.896981 done
1100 15:49:42.903222 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1101 15:49:42.906637 Chrome EC: UHEPI supported
1102 15:49:42.913294 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 15:49:42.916462 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 15:49:42.919851 SPI flash protection: WPSW=0 SRP0=1
1105 15:49:42.926399 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 15:49:42.933083 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1107 15:49:42.936471 found VGA at PCI: 00:02.0
1108 15:49:42.936563 Setting up VGA for PCI: 00:02.0
1109 15:49:42.942752 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 15:49:42.949589 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 15:49:42.949682 Allocating resources...
1112 15:49:42.952646 Reading resources...
1113 15:49:42.956172 Root Device read_resources bus 0 link: 0
1114 15:49:42.962450 DOMAIN: 0000 read_resources bus 0 link: 0
1115 15:49:42.965846 PCI: 00:04.0 read_resources bus 1 link: 0
1116 15:49:42.972399 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 15:49:42.975775 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 15:49:42.979002 USB0 port 0 read_resources bus 0 link: 0
1119 15:49:42.986427 USB0 port 0 read_resources bus 0 link: 0 done
1120 15:49:42.989428 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 15:49:42.996079 PCI: 00:14.0 read_resources bus 0 link: 0
1122 15:49:42.999221 USB0 port 0 read_resources bus 0 link: 0
1123 15:49:43.005828 USB0 port 0 read_resources bus 0 link: 0 done
1124 15:49:43.009322 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 15:49:43.015834 PCI: 00:14.3 read_resources bus 0 link: 0
1126 15:49:43.019057 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 15:49:43.025564 PCI: 00:15.0 read_resources bus 0 link: 0
1128 15:49:43.028959 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 15:49:43.035845 PCI: 00:15.1 read_resources bus 0 link: 0
1130 15:49:43.038911 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 15:49:43.046171 PCI: 00:19.1 read_resources bus 0 link: 0
1132 15:49:43.049350 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 15:49:43.055948 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 15:49:43.059469 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 15:49:43.066017 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 15:49:43.069498 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 15:49:43.075843 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 15:49:43.079169 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 15:49:43.085550 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 15:49:43.088975 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 15:49:43.095565 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 15:49:43.098641 GENERIC: 0.0 read_resources bus 0 link: 0
1143 15:49:43.105288 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 15:49:43.108451 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 15:49:43.115104 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 15:49:43.118549 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 15:49:43.124888 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 15:49:43.128509 Root Device read_resources bus 0 link: 0 done
1149 15:49:43.131615 Done reading resources.
1150 15:49:43.138426 Show resources in subtree (Root Device)...After reading.
1151 15:49:43.141711 Root Device child on link 0 DOMAIN: 0000
1152 15:49:43.145021 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 15:49:43.154792 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 15:49:43.164526 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 15:49:43.167953 PCI: 00:00.0
1156 15:49:43.177718 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 15:49:43.184372 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 15:49:43.194486 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 15:49:43.204212 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 15:49:43.213797 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 15:49:43.223710 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 15:49:43.233818 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 15:49:43.240630 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 15:49:43.250347 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 15:49:43.260137 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 15:49:43.269964 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 15:49:43.279770 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 15:49:43.289792 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 15:49:43.296409 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 15:49:43.306183 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 15:49:43.316003 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 15:49:43.326031 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 15:49:43.335696 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 15:49:43.345719 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 15:49:43.355827 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 15:49:43.355940 PCI: 00:02.0
1177 15:49:43.365558 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 15:49:43.378889 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 15:49:43.385230 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 15:49:43.388791 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 15:49:43.401956 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 15:49:43.402263 GENERIC: 0.0
1183 15:49:43.405338 PCI: 00:05.0
1184 15:49:43.415188 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 15:49:43.418647 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 15:49:43.421929 GENERIC: 0.0
1187 15:49:43.422415 PCI: 00:08.0
1188 15:49:43.431787 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 15:49:43.434791 PCI: 00:0a.0
1190 15:49:43.438127 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 15:49:43.448432 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 15:49:43.451554 USB0 port 0 child on link 0 USB3 port 0
1193 15:49:43.454625 USB3 port 0
1194 15:49:43.455150 USB3 port 1
1195 15:49:43.458078 USB3 port 2
1196 15:49:43.458547 USB3 port 3
1197 15:49:43.464672 PCI: 00:14.0 child on link 0 USB0 port 0
1198 15:49:43.474378 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 15:49:43.477878 USB0 port 0 child on link 0 USB2 port 0
1200 15:49:43.481054 USB2 port 0
1201 15:49:43.481585 USB2 port 1
1202 15:49:43.484184 USB2 port 2
1203 15:49:43.484652 USB2 port 3
1204 15:49:43.487717 USB2 port 4
1205 15:49:43.488182 USB2 port 5
1206 15:49:43.490720 USB2 port 6
1207 15:49:43.491249 USB2 port 7
1208 15:49:43.494234 USB2 port 8
1209 15:49:43.497590 USB2 port 9
1210 15:49:43.498053 USB3 port 0
1211 15:49:43.500782 USB3 port 1
1212 15:49:43.501249 USB3 port 2
1213 15:49:43.503858 USB3 port 3
1214 15:49:43.504342 PCI: 00:14.2
1215 15:49:43.514020 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 15:49:43.523586 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 15:49:43.530096 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 15:49:43.540017 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 15:49:43.540521 GENERIC: 0.0
1220 15:49:43.546733 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 15:49:43.556548 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 15:49:43.557082 I2C: 00:1a
1223 15:49:43.559775 I2C: 00:31
1224 15:49:43.560282 I2C: 00:32
1225 15:49:43.563421 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 15:49:43.573329 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 15:49:43.576348 I2C: 00:10
1228 15:49:43.576968 PCI: 00:15.2
1229 15:49:43.586298 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 15:49:43.589213 PCI: 00:15.3
1231 15:49:43.599469 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 15:49:43.600001 PCI: 00:16.0
1233 15:49:43.609152 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 15:49:43.612584 PCI: 00:19.0
1235 15:49:43.615748 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 15:49:43.625746 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 15:49:43.628969 I2C: 00:15
1238 15:49:43.632214 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 15:49:43.642028 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 15:49:43.652008 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 15:49:43.658629 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 15:49:43.661699 GENERIC: 0.0
1243 15:49:43.665158 PCI: 01:00.0
1244 15:49:43.674932 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 15:49:43.684499 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1246 15:49:43.684599 PCI: 00:1e.0
1247 15:49:43.694648 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1248 15:49:43.701159 PCI: 00:1e.2 child on link 0 SPI: 00
1249 15:49:43.710879 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 15:49:43.710974 SPI: 00
1251 15:49:43.714287 PCI: 00:1e.3 child on link 0 SPI: 00
1252 15:49:43.724115 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1253 15:49:43.727265 SPI: 00
1254 15:49:43.730829 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1255 15:49:43.740606 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1256 15:49:43.740720 PNP: 0c09.0
1257 15:49:43.750560 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1258 15:49:43.753741 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1259 15:49:43.763619 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1260 15:49:43.773399 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1261 15:49:43.776903 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1262 15:49:43.780039 GENERIC: 0.0
1263 15:49:43.780295 GENERIC: 1.0
1264 15:49:43.783605 PCI: 00:1f.3
1265 15:49:43.793518 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1266 15:49:43.803291 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1267 15:49:43.806420 PCI: 00:1f.5
1268 15:49:43.813369 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1269 15:49:43.819847 CPU_CLUSTER: 0 child on link 0 APIC: 00
1270 15:49:43.820316 APIC: 00
1271 15:49:43.820685 APIC: 03
1272 15:49:43.823055 APIC: 04
1273 15:49:43.823521 APIC: 06
1274 15:49:43.823889 APIC: 07
1275 15:49:43.826489 APIC: 02
1276 15:49:43.826986 APIC: 01
1277 15:49:43.829533 APIC: 05
1278 15:49:43.836177 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1279 15:49:43.842750 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1280 15:49:43.849598 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1281 15:49:43.853085 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1282 15:49:43.859454 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1283 15:49:43.862667 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1284 15:49:43.869264 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1285 15:49:43.875765 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1286 15:49:43.885921 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1287 15:49:43.892494 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1288 15:49:43.898840 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1289 15:49:43.905217 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1290 15:49:43.911722 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1291 15:49:43.921641 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1292 15:49:43.924843 DOMAIN: 0000: Resource ranges:
1293 15:49:43.928276 * Base: 1000, Size: 800, Tag: 100
1294 15:49:43.931400 * Base: 1900, Size: e700, Tag: 100
1295 15:49:43.934957 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1296 15:49:43.941401 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1297 15:49:43.950970 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1298 15:49:43.957686 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1299 15:49:43.964270 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1300 15:49:43.974372 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1301 15:49:43.980659 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1302 15:49:43.987257 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1303 15:49:43.997214 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1304 15:49:44.003844 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1305 15:49:44.010503 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1306 15:49:44.020294 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1307 15:49:44.027062 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1308 15:49:44.033476 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1309 15:49:44.043508 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1310 15:49:44.050152 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1311 15:49:44.056560 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1312 15:49:44.066765 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1313 15:49:44.073146 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1314 15:49:44.079480 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1315 15:49:44.089476 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1316 15:49:44.095945 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1317 15:49:44.102670 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1318 15:49:44.112740 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1319 15:49:44.118841 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1320 15:49:44.122356 DOMAIN: 0000: Resource ranges:
1321 15:49:44.125862 * Base: 7fc00000, Size: 40400000, Tag: 200
1322 15:49:44.132216 * Base: d0000000, Size: 28000000, Tag: 200
1323 15:49:44.135649 * Base: fa000000, Size: 1000000, Tag: 200
1324 15:49:44.138845 * Base: fb001000, Size: 2fff000, Tag: 200
1325 15:49:44.145524 * Base: fe010000, Size: 2e000, Tag: 200
1326 15:49:44.148688 * Base: fe03f000, Size: d41000, Tag: 200
1327 15:49:44.151878 * Base: fed88000, Size: 8000, Tag: 200
1328 15:49:44.155302 * Base: fed93000, Size: d000, Tag: 200
1329 15:49:44.161839 * Base: feda2000, Size: 1e000, Tag: 200
1330 15:49:44.165415 * Base: fede0000, Size: 1220000, Tag: 200
1331 15:49:44.168979 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1332 15:49:44.175666 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1333 15:49:44.185124 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1334 15:49:44.191592 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1335 15:49:44.198227 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1336 15:49:44.205144 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1337 15:49:44.211719 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1338 15:49:44.218043 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1339 15:49:44.224838 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1340 15:49:44.231356 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1341 15:49:44.237416 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1342 15:49:44.244222 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1343 15:49:44.250843 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1344 15:49:44.257386 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1345 15:49:44.263773 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1346 15:49:44.270314 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1347 15:49:44.277022 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1348 15:49:44.283577 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1349 15:49:44.290357 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1350 15:49:44.296570 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1351 15:49:44.303312 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1352 15:49:44.309726 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1353 15:49:44.316262 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1354 15:49:44.323019 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1355 15:49:44.332974 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1356 15:49:44.333070 PCI: 00:1d.0: Resource ranges:
1357 15:49:44.339170 * Base: 7fc00000, Size: 100000, Tag: 200
1358 15:49:44.345890 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1359 15:49:44.352529 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1360 15:49:44.359213 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1361 15:49:44.368874 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1362 15:49:44.372402 Root Device assign_resources, bus 0 link: 0
1363 15:49:44.375479 DOMAIN: 0000 assign_resources, bus 0 link: 0
1364 15:49:44.385400 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1365 15:49:44.392175 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1366 15:49:44.401792 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1367 15:49:44.408372 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1368 15:49:44.415239 PCI: 00:04.0 assign_resources, bus 1 link: 0
1369 15:49:44.418248 PCI: 00:04.0 assign_resources, bus 1 link: 0
1370 15:49:44.428369 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1371 15:49:44.434772 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1372 15:49:44.444849 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1373 15:49:44.448150 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1374 15:49:44.451432 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1375 15:49:44.461314 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1376 15:49:44.464607 PCI: 00:14.0 assign_resources, bus 0 link: 0
1377 15:49:44.471217 PCI: 00:14.0 assign_resources, bus 0 link: 0
1378 15:49:44.477612 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1379 15:49:44.487643 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1380 15:49:44.494284 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1381 15:49:44.497609 PCI: 00:14.3 assign_resources, bus 0 link: 0
1382 15:49:44.504015 PCI: 00:14.3 assign_resources, bus 0 link: 0
1383 15:49:44.510635 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1384 15:49:44.516976 PCI: 00:15.0 assign_resources, bus 0 link: 0
1385 15:49:44.520645 PCI: 00:15.0 assign_resources, bus 0 link: 0
1386 15:49:44.530417 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1387 15:49:44.533749 PCI: 00:15.1 assign_resources, bus 0 link: 0
1388 15:49:44.536892 PCI: 00:15.1 assign_resources, bus 0 link: 0
1389 15:49:44.547256 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1390 15:49:44.553888 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1391 15:49:44.563643 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1392 15:49:44.570252 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1393 15:49:44.576783 PCI: 00:19.1 assign_resources, bus 0 link: 0
1394 15:49:44.580237 PCI: 00:19.1 assign_resources, bus 0 link: 0
1395 15:49:44.589618 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1396 15:49:44.599753 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1397 15:49:44.606309 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1398 15:49:44.612789 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1399 15:49:44.619483 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1400 15:49:44.629003 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1401 15:49:44.632384 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 15:49:44.642265 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1403 15:49:44.645371 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1404 15:49:44.651887 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1405 15:49:44.658620 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1406 15:49:44.665316 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1407 15:49:44.668580 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1408 15:49:44.671741 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1409 15:49:44.678700 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1410 15:49:44.681758 LPC: Trying to open IO window from 800 size 1ff
1411 15:49:44.691900 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1412 15:49:44.698384 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1413 15:49:44.708323 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1414 15:49:44.711407 DOMAIN: 0000 assign_resources, bus 0 link: 0
1415 15:49:44.718081 Root Device assign_resources, bus 0 link: 0
1416 15:49:44.718534 Done setting resources.
1417 15:49:44.724833 Show resources in subtree (Root Device)...After assigning values.
1418 15:49:44.731173 Root Device child on link 0 DOMAIN: 0000
1419 15:49:44.734328 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1420 15:49:44.744204 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1421 15:49:44.754161 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1422 15:49:44.754710 PCI: 00:00.0
1423 15:49:44.764121 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1424 15:49:44.773925 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1425 15:49:44.783574 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1426 15:49:44.793523 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1427 15:49:44.803341 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1428 15:49:44.813170 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1429 15:49:44.819861 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1430 15:49:44.829780 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1431 15:49:44.839592 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1432 15:49:44.849216 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1433 15:49:44.859321 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1434 15:49:44.869272 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1435 15:49:44.879302 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1436 15:49:44.885880 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1437 15:49:44.895397 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1438 15:49:44.905109 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1439 15:49:44.914877 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1440 15:49:44.924783 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1441 15:49:44.934463 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1442 15:49:44.944487 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1443 15:49:44.945066 PCI: 00:02.0
1444 15:49:44.957763 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1445 15:49:44.967878 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1446 15:49:44.977681 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1447 15:49:44.980730 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1448 15:49:44.990653 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1449 15:49:44.993860 GENERIC: 0.0
1450 15:49:44.994326 PCI: 00:05.0
1451 15:49:45.003858 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1452 15:49:45.010117 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1453 15:49:45.010609 GENERIC: 0.0
1454 15:49:45.013690 PCI: 00:08.0
1455 15:49:45.023438 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1456 15:49:45.023905 PCI: 00:0a.0
1457 15:49:45.030042 PCI: 00:0d.0 child on link 0 USB0 port 0
1458 15:49:45.039877 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1459 15:49:45.043042 USB0 port 0 child on link 0 USB3 port 0
1460 15:49:45.046683 USB3 port 0
1461 15:49:45.047183 USB3 port 1
1462 15:49:45.049737 USB3 port 2
1463 15:49:45.050196 USB3 port 3
1464 15:49:45.056333 PCI: 00:14.0 child on link 0 USB0 port 0
1465 15:49:45.065866 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1466 15:49:45.069271 USB0 port 0 child on link 0 USB2 port 0
1467 15:49:45.072579 USB2 port 0
1468 15:49:45.073035 USB2 port 1
1469 15:49:45.075715 USB2 port 2
1470 15:49:45.076215 USB2 port 3
1471 15:49:45.079069 USB2 port 4
1472 15:49:45.082379 USB2 port 5
1473 15:49:45.082877 USB2 port 6
1474 15:49:45.085653 USB2 port 7
1475 15:49:45.086163 USB2 port 8
1476 15:49:45.089023 USB2 port 9
1477 15:49:45.089482 USB3 port 0
1478 15:49:45.092229 USB3 port 1
1479 15:49:45.092710 USB3 port 2
1480 15:49:45.095414 USB3 port 3
1481 15:49:45.095871 PCI: 00:14.2
1482 15:49:45.105522 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1483 15:49:45.118588 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1484 15:49:45.121914 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1485 15:49:45.131680 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1486 15:49:45.134864 GENERIC: 0.0
1487 15:49:45.138246 PCI: 00:15.0 child on link 0 I2C: 00:1a
1488 15:49:45.148171 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1489 15:49:45.151613 I2C: 00:1a
1490 15:49:45.152071 I2C: 00:31
1491 15:49:45.154853 I2C: 00:32
1492 15:49:45.158405 PCI: 00:15.1 child on link 0 I2C: 00:10
1493 15:49:45.167545 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1494 15:49:45.171026 I2C: 00:10
1495 15:49:45.171481 PCI: 00:15.2
1496 15:49:45.180763 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1497 15:49:45.184216 PCI: 00:15.3
1498 15:49:45.193943 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1499 15:49:45.194408 PCI: 00:16.0
1500 15:49:45.203995 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1501 15:49:45.207096 PCI: 00:19.0
1502 15:49:45.210660 PCI: 00:19.1 child on link 0 I2C: 00:15
1503 15:49:45.220285 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1504 15:49:45.223878 I2C: 00:15
1505 15:49:45.226900 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1506 15:49:45.236788 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1507 15:49:45.249758 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1508 15:49:45.259527 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1509 15:49:45.259991 GENERIC: 0.0
1510 15:49:45.263102 PCI: 01:00.0
1511 15:49:45.272990 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1512 15:49:45.282627 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1513 15:49:45.286036 PCI: 00:1e.0
1514 15:49:45.295923 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1515 15:49:45.299011 PCI: 00:1e.2 child on link 0 SPI: 00
1516 15:49:45.309038 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1517 15:49:45.312134 SPI: 00
1518 15:49:45.315516 PCI: 00:1e.3 child on link 0 SPI: 00
1519 15:49:45.325273 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1520 15:49:45.328646 SPI: 00
1521 15:49:45.331785 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1522 15:49:45.341889 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1523 15:49:45.342394 PNP: 0c09.0
1524 15:49:45.351772 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1525 15:49:45.354877 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1526 15:49:45.364623 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1527 15:49:45.374735 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1528 15:49:45.377929 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1529 15:49:45.381026 GENERIC: 0.0
1530 15:49:45.381490 GENERIC: 1.0
1531 15:49:45.384500 PCI: 00:1f.3
1532 15:49:45.394292 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1533 15:49:45.404346 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1534 15:49:45.407361 PCI: 00:1f.5
1535 15:49:45.417635 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1536 15:49:45.420613 CPU_CLUSTER: 0 child on link 0 APIC: 00
1537 15:49:45.423758 APIC: 00
1538 15:49:45.424268 APIC: 03
1539 15:49:45.424672 APIC: 04
1540 15:49:45.427182 APIC: 06
1541 15:49:45.427712 APIC: 07
1542 15:49:45.428117 APIC: 02
1543 15:49:45.430513 APIC: 01
1544 15:49:45.431100 APIC: 05
1545 15:49:45.433731 Done allocating resources.
1546 15:49:45.440365 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1547 15:49:45.446979 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1548 15:49:45.450049 Configure GPIOs for I2S audio on UP4.
1549 15:49:45.457134 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1550 15:49:45.459912 Enabling resources...
1551 15:49:45.463047 PCI: 00:00.0 subsystem <- 8086/9a12
1552 15:49:45.466649 PCI: 00:00.0 cmd <- 06
1553 15:49:45.469701 PCI: 00:02.0 subsystem <- 8086/9a40
1554 15:49:45.473101 PCI: 00:02.0 cmd <- 03
1555 15:49:45.476578 PCI: 00:04.0 subsystem <- 8086/9a03
1556 15:49:45.477192 PCI: 00:04.0 cmd <- 02
1557 15:49:45.482862 PCI: 00:05.0 subsystem <- 8086/9a19
1558 15:49:45.483435 PCI: 00:05.0 cmd <- 02
1559 15:49:45.486497 PCI: 00:08.0 subsystem <- 8086/9a11
1560 15:49:45.489500 PCI: 00:08.0 cmd <- 06
1561 15:49:45.493248 PCI: 00:0d.0 subsystem <- 8086/9a13
1562 15:49:45.496047 PCI: 00:0d.0 cmd <- 02
1563 15:49:45.499351 PCI: 00:14.0 subsystem <- 8086/a0ed
1564 15:49:45.502536 PCI: 00:14.0 cmd <- 02
1565 15:49:45.505713 PCI: 00:14.2 subsystem <- 8086/a0ef
1566 15:49:45.509208 PCI: 00:14.2 cmd <- 02
1567 15:49:45.512791 PCI: 00:14.3 subsystem <- 8086/a0f0
1568 15:49:45.516190 PCI: 00:14.3 cmd <- 02
1569 15:49:45.519096 PCI: 00:15.0 subsystem <- 8086/a0e8
1570 15:49:45.522813 PCI: 00:15.0 cmd <- 02
1571 15:49:45.525783 PCI: 00:15.1 subsystem <- 8086/a0e9
1572 15:49:45.529306 PCI: 00:15.1 cmd <- 02
1573 15:49:45.532176 PCI: 00:15.2 subsystem <- 8086/a0ea
1574 15:49:45.532710 PCI: 00:15.2 cmd <- 02
1575 15:49:45.538815 PCI: 00:15.3 subsystem <- 8086/a0eb
1576 15:49:45.539354 PCI: 00:15.3 cmd <- 02
1577 15:49:45.542292 PCI: 00:16.0 subsystem <- 8086/a0e0
1578 15:49:45.545366 PCI: 00:16.0 cmd <- 02
1579 15:49:45.548826 PCI: 00:19.1 subsystem <- 8086/a0c6
1580 15:49:45.552089 PCI: 00:19.1 cmd <- 02
1581 15:49:45.555185 PCI: 00:1d.0 bridge ctrl <- 0013
1582 15:49:45.558468 PCI: 00:1d.0 subsystem <- 8086/a0b0
1583 15:49:45.561795 PCI: 00:1d.0 cmd <- 06
1584 15:49:45.564945 PCI: 00:1e.0 subsystem <- 8086/a0a8
1585 15:49:45.568273 PCI: 00:1e.0 cmd <- 06
1586 15:49:45.571704 PCI: 00:1e.2 subsystem <- 8086/a0aa
1587 15:49:45.574818 PCI: 00:1e.2 cmd <- 06
1588 15:49:45.578281 PCI: 00:1e.3 subsystem <- 8086/a0ab
1589 15:49:45.581386 PCI: 00:1e.3 cmd <- 02
1590 15:49:45.584825 PCI: 00:1f.0 subsystem <- 8086/a087
1591 15:49:45.587791 PCI: 00:1f.0 cmd <- 407
1592 15:49:45.591191 PCI: 00:1f.3 subsystem <- 8086/a0c8
1593 15:49:45.594360 PCI: 00:1f.3 cmd <- 02
1594 15:49:45.597965 PCI: 00:1f.5 subsystem <- 8086/a0a4
1595 15:49:45.598618 PCI: 00:1f.5 cmd <- 406
1596 15:49:45.603319 PCI: 01:00.0 cmd <- 02
1597 15:49:45.607652 done.
1598 15:49:45.611136 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1599 15:49:45.614194 Initializing devices...
1600 15:49:45.617662 Root Device init
1601 15:49:45.620739 Chrome EC: Set SMI mask to 0x0000000000000000
1602 15:49:45.627534 Chrome EC: clear events_b mask to 0x0000000000000000
1603 15:49:45.634418 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1604 15:49:45.637303 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1605 15:49:45.644182 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1606 15:49:45.650966 Chrome EC: Set WAKE mask to 0x0000000000000000
1607 15:49:45.654174 fw_config match found: DB_USB=USB3_ACTIVE
1608 15:49:45.660558 Configure Right Type-C port orientation for retimer
1609 15:49:45.663742 Root Device init finished in 42 msecs
1610 15:49:45.666973 PCI: 00:00.0 init
1611 15:49:45.670324 CPU TDP = 9 Watts
1612 15:49:45.670900 CPU PL1 = 9 Watts
1613 15:49:45.673673 CPU PL2 = 40 Watts
1614 15:49:45.674209 CPU PL4 = 83 Watts
1615 15:49:45.680394 PCI: 00:00.0 init finished in 8 msecs
1616 15:49:45.680925 PCI: 00:02.0 init
1617 15:49:45.683739 GMA: Found VBT in CBFS
1618 15:49:45.687037 GMA: Found valid VBT in CBFS
1619 15:49:45.693601 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1620 15:49:45.700282 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1621 15:49:45.703386 PCI: 00:02.0 init finished in 18 msecs
1622 15:49:45.706997 PCI: 00:05.0 init
1623 15:49:45.710009 PCI: 00:05.0 init finished in 0 msecs
1624 15:49:45.713559 PCI: 00:08.0 init
1625 15:49:45.716927 PCI: 00:08.0 init finished in 0 msecs
1626 15:49:45.719569 PCI: 00:14.0 init
1627 15:49:45.722961 PCI: 00:14.0 init finished in 0 msecs
1628 15:49:45.726178 PCI: 00:14.2 init
1629 15:49:45.729642 PCI: 00:14.2 init finished in 0 msecs
1630 15:49:45.730162 PCI: 00:15.0 init
1631 15:49:45.732972 I2C bus 0 version 0x3230302a
1632 15:49:45.736065 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1633 15:49:45.742600 PCI: 00:15.0 init finished in 6 msecs
1634 15:49:45.743173 PCI: 00:15.1 init
1635 15:49:45.745893 I2C bus 1 version 0x3230302a
1636 15:49:45.749358 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1637 15:49:45.752503 PCI: 00:15.1 init finished in 6 msecs
1638 15:49:45.756166 PCI: 00:15.2 init
1639 15:49:45.759152 I2C bus 2 version 0x3230302a
1640 15:49:45.762505 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1641 15:49:45.766136 PCI: 00:15.2 init finished in 6 msecs
1642 15:49:45.769331 PCI: 00:15.3 init
1643 15:49:45.772499 I2C bus 3 version 0x3230302a
1644 15:49:45.775955 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1645 15:49:45.779065 PCI: 00:15.3 init finished in 6 msecs
1646 15:49:45.782290 PCI: 00:16.0 init
1647 15:49:45.785599 PCI: 00:16.0 init finished in 0 msecs
1648 15:49:45.789014 PCI: 00:19.1 init
1649 15:49:45.792396 I2C bus 5 version 0x3230302a
1650 15:49:45.795376 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1651 15:49:45.798890 PCI: 00:19.1 init finished in 6 msecs
1652 15:49:45.802502 PCI: 00:1d.0 init
1653 15:49:45.803174 Initializing PCH PCIe bridge.
1654 15:49:45.808668 PCI: 00:1d.0 init finished in 3 msecs
1655 15:49:45.811799 PCI: 00:1f.0 init
1656 15:49:45.815553 IOAPIC: Initializing IOAPIC at 0xfec00000
1657 15:49:45.818775 IOAPIC: Bootstrap Processor Local APIC = 0x00
1658 15:49:45.821760 IOAPIC: ID = 0x02
1659 15:49:45.824910 IOAPIC: Dumping registers
1660 15:49:45.825540 reg 0x0000: 0x02000000
1661 15:49:45.828113 reg 0x0001: 0x00770020
1662 15:49:45.831662 reg 0x0002: 0x00000000
1663 15:49:45.834776 PCI: 00:1f.0 init finished in 21 msecs
1664 15:49:45.838180 PCI: 00:1f.2 init
1665 15:49:45.841562 Disabling ACPI via APMC.
1666 15:49:45.842187 APMC done.
1667 15:49:45.848186 PCI: 00:1f.2 init finished in 5 msecs
1668 15:49:45.858281 PCI: 01:00.0 init
1669 15:49:45.861777 PCI: 01:00.0 init finished in 0 msecs
1670 15:49:45.864964 PNP: 0c09.0 init
1671 15:49:45.868307 Google Chrome EC uptime: 8.252 seconds
1672 15:49:45.875061 Google Chrome AP resets since EC boot: 1
1673 15:49:45.878212 Google Chrome most recent AP reset causes:
1674 15:49:45.881730 0.453: 32775 shutdown: entering G3
1675 15:49:45.888159 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1676 15:49:45.892007 PNP: 0c09.0 init finished in 22 msecs
1677 15:49:45.897171 Devices initialized
1678 15:49:45.900598 Show all devs... After init.
1679 15:49:45.903826 Root Device: enabled 1
1680 15:49:45.904343 DOMAIN: 0000: enabled 1
1681 15:49:45.907330 CPU_CLUSTER: 0: enabled 1
1682 15:49:45.910600 PCI: 00:00.0: enabled 1
1683 15:49:45.914197 PCI: 00:02.0: enabled 1
1684 15:49:45.914868 PCI: 00:04.0: enabled 1
1685 15:49:45.917036 PCI: 00:05.0: enabled 1
1686 15:49:45.920456 PCI: 00:06.0: enabled 0
1687 15:49:45.923281 PCI: 00:07.0: enabled 0
1688 15:49:45.923800 PCI: 00:07.1: enabled 0
1689 15:49:45.927275 PCI: 00:07.2: enabled 0
1690 15:49:45.930242 PCI: 00:07.3: enabled 0
1691 15:49:45.933731 PCI: 00:08.0: enabled 1
1692 15:49:45.934340 PCI: 00:09.0: enabled 0
1693 15:49:45.936547 PCI: 00:0a.0: enabled 0
1694 15:49:45.939979 PCI: 00:0d.0: enabled 1
1695 15:49:45.943063 PCI: 00:0d.1: enabled 0
1696 15:49:45.943556 PCI: 00:0d.2: enabled 0
1697 15:49:45.946604 PCI: 00:0d.3: enabled 0
1698 15:49:45.949630 PCI: 00:0e.0: enabled 0
1699 15:49:45.952990 PCI: 00:10.2: enabled 1
1700 15:49:45.953657 PCI: 00:10.6: enabled 0
1701 15:49:45.956445 PCI: 00:10.7: enabled 0
1702 15:49:45.959591 PCI: 00:12.0: enabled 0
1703 15:49:45.963014 PCI: 00:12.6: enabled 0
1704 15:49:45.963527 PCI: 00:13.0: enabled 0
1705 15:49:45.966401 PCI: 00:14.0: enabled 1
1706 15:49:45.969431 PCI: 00:14.1: enabled 0
1707 15:49:45.972945 PCI: 00:14.2: enabled 1
1708 15:49:45.973457 PCI: 00:14.3: enabled 1
1709 15:49:45.976119 PCI: 00:15.0: enabled 1
1710 15:49:45.979574 PCI: 00:15.1: enabled 1
1711 15:49:45.982477 PCI: 00:15.2: enabled 1
1712 15:49:45.983030 PCI: 00:15.3: enabled 1
1713 15:49:45.985902 PCI: 00:16.0: enabled 1
1714 15:49:45.989267 PCI: 00:16.1: enabled 0
1715 15:49:45.992372 PCI: 00:16.2: enabled 0
1716 15:49:45.992833 PCI: 00:16.3: enabled 0
1717 15:49:45.995775 PCI: 00:16.4: enabled 0
1718 15:49:45.998808 PCI: 00:16.5: enabled 0
1719 15:49:45.999272 PCI: 00:17.0: enabled 0
1720 15:49:46.002383 PCI: 00:19.0: enabled 0
1721 15:49:46.005549 PCI: 00:19.1: enabled 1
1722 15:49:46.008965 PCI: 00:19.2: enabled 0
1723 15:49:46.009696 PCI: 00:1c.0: enabled 1
1724 15:49:46.013256 PCI: 00:1c.1: enabled 0
1725 15:49:46.015280 PCI: 00:1c.2: enabled 0
1726 15:49:46.018855 PCI: 00:1c.3: enabled 0
1727 15:49:46.019313 PCI: 00:1c.4: enabled 0
1728 15:49:46.022027 PCI: 00:1c.5: enabled 0
1729 15:49:46.025555 PCI: 00:1c.6: enabled 1
1730 15:49:46.029238 PCI: 00:1c.7: enabled 0
1731 15:49:46.029841 PCI: 00:1d.0: enabled 1
1732 15:49:46.031772 PCI: 00:1d.1: enabled 0
1733 15:49:46.035214 PCI: 00:1d.2: enabled 1
1734 15:49:46.038621 PCI: 00:1d.3: enabled 0
1735 15:49:46.039085 PCI: 00:1e.0: enabled 1
1736 15:49:46.041971 PCI: 00:1e.1: enabled 0
1737 15:49:46.045118 PCI: 00:1e.2: enabled 1
1738 15:49:46.048367 PCI: 00:1e.3: enabled 1
1739 15:49:46.048827 PCI: 00:1f.0: enabled 1
1740 15:49:46.051546 PCI: 00:1f.1: enabled 0
1741 15:49:46.054976 PCI: 00:1f.2: enabled 1
1742 15:49:46.058211 PCI: 00:1f.3: enabled 1
1743 15:49:46.058732 PCI: 00:1f.4: enabled 0
1744 15:49:46.061444 PCI: 00:1f.5: enabled 1
1745 15:49:46.064818 PCI: 00:1f.6: enabled 0
1746 15:49:46.067939 PCI: 00:1f.7: enabled 0
1747 15:49:46.068447 APIC: 00: enabled 1
1748 15:49:46.071142 GENERIC: 0.0: enabled 1
1749 15:49:46.074667 GENERIC: 0.0: enabled 1
1750 15:49:46.075137 GENERIC: 1.0: enabled 1
1751 15:49:46.077813 GENERIC: 0.0: enabled 1
1752 15:49:46.080977 GENERIC: 1.0: enabled 1
1753 15:49:46.084333 USB0 port 0: enabled 1
1754 15:49:46.084873 GENERIC: 0.0: enabled 1
1755 15:49:46.087894 USB0 port 0: enabled 1
1756 15:49:46.091047 GENERIC: 0.0: enabled 1
1757 15:49:46.093984 I2C: 00:1a: enabled 1
1758 15:49:46.094490 I2C: 00:31: enabled 1
1759 15:49:46.097544 I2C: 00:32: enabled 1
1760 15:49:46.100942 I2C: 00:10: enabled 1
1761 15:49:46.101438 I2C: 00:15: enabled 1
1762 15:49:46.104044 GENERIC: 0.0: enabled 0
1763 15:49:46.107184 GENERIC: 1.0: enabled 0
1764 15:49:46.107653 GENERIC: 0.0: enabled 1
1765 15:49:46.110666 SPI: 00: enabled 1
1766 15:49:46.114030 SPI: 00: enabled 1
1767 15:49:46.114515 PNP: 0c09.0: enabled 1
1768 15:49:46.117146 GENERIC: 0.0: enabled 1
1769 15:49:46.120329 USB3 port 0: enabled 1
1770 15:49:46.123776 USB3 port 1: enabled 1
1771 15:49:46.124316 USB3 port 2: enabled 0
1772 15:49:46.127217 USB3 port 3: enabled 0
1773 15:49:46.130676 USB2 port 0: enabled 0
1774 15:49:46.131177 USB2 port 1: enabled 1
1775 15:49:46.133798 USB2 port 2: enabled 1
1776 15:49:46.137186 USB2 port 3: enabled 0
1777 15:49:46.137681 USB2 port 4: enabled 1
1778 15:49:46.140349 USB2 port 5: enabled 0
1779 15:49:46.143534 USB2 port 6: enabled 0
1780 15:49:46.146903 USB2 port 7: enabled 0
1781 15:49:46.147376 USB2 port 8: enabled 0
1782 15:49:46.150131 USB2 port 9: enabled 0
1783 15:49:46.153571 USB3 port 0: enabled 0
1784 15:49:46.154075 USB3 port 1: enabled 1
1785 15:49:46.156679 USB3 port 2: enabled 0
1786 15:49:46.159976 USB3 port 3: enabled 0
1787 15:49:46.163238 GENERIC: 0.0: enabled 1
1788 15:49:46.163723 GENERIC: 1.0: enabled 1
1789 15:49:46.166364 APIC: 03: enabled 1
1790 15:49:46.169835 APIC: 04: enabled 1
1791 15:49:46.170327 APIC: 06: enabled 1
1792 15:49:46.173207 APIC: 07: enabled 1
1793 15:49:46.176258 APIC: 02: enabled 1
1794 15:49:46.176741 APIC: 01: enabled 1
1795 15:49:46.179480 APIC: 05: enabled 1
1796 15:49:46.182928 PCI: 01:00.0: enabled 1
1797 15:49:46.186167 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1798 15:49:46.192793 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1799 15:49:46.196012 ELOG: NV offset 0xf30000 size 0x1000
1800 15:49:46.202860 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1801 15:49:46.209299 ELOG: Event(17) added with size 13 at 2023-03-03 15:49:46 UTC
1802 15:49:46.215565 ELOG: Event(92) added with size 9 at 2023-03-03 15:49:46 UTC
1803 15:49:46.222130 ELOG: Event(93) added with size 9 at 2023-03-03 15:49:46 UTC
1804 15:49:46.228696 ELOG: Event(9E) added with size 10 at 2023-03-03 15:49:46 UTC
1805 15:49:46.235294 ELOG: Event(9F) added with size 14 at 2023-03-03 15:49:46 UTC
1806 15:49:46.241928 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1807 15:49:46.248744 ELOG: Event(A1) added with size 10 at 2023-03-03 15:49:46 UTC
1808 15:49:46.255227 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1809 15:49:46.261851 ELOG: Event(A0) added with size 9 at 2023-03-03 15:49:46 UTC
1810 15:49:46.264968 elog_add_boot_reason: Logged dev mode boot
1811 15:49:46.271817 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1812 15:49:46.274942 Finalize devices...
1813 15:49:46.275407 Devices finalized
1814 15:49:46.281320 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1815 15:49:46.284562 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1816 15:49:46.291146 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1817 15:49:46.297667 ME: HFSTS1 : 0x80030055
1818 15:49:46.300871 ME: HFSTS2 : 0x30280116
1819 15:49:46.304337 ME: HFSTS3 : 0x00000050
1820 15:49:46.310754 ME: HFSTS4 : 0x00004000
1821 15:49:46.314133 ME: HFSTS5 : 0x00000000
1822 15:49:46.317272 ME: HFSTS6 : 0x40400006
1823 15:49:46.320824 ME: Manufacturing Mode : YES
1824 15:49:46.327417 ME: SPI Protection Mode Enabled : NO
1825 15:49:46.330607 ME: FW Partition Table : OK
1826 15:49:46.333688 ME: Bringup Loader Failure : NO
1827 15:49:46.337265 ME: Firmware Init Complete : NO
1828 15:49:46.340434 ME: Boot Options Present : NO
1829 15:49:46.343900 ME: Update In Progress : NO
1830 15:49:46.346883 ME: D0i3 Support : YES
1831 15:49:46.353660 ME: Low Power State Enabled : NO
1832 15:49:46.356675 ME: CPU Replaced : YES
1833 15:49:46.360219 ME: CPU Replacement Valid : YES
1834 15:49:46.363569 ME: Current Working State : 5
1835 15:49:46.366523 ME: Current Operation State : 1
1836 15:49:46.370059 ME: Current Operation Mode : 3
1837 15:49:46.373194 ME: Error Code : 0
1838 15:49:46.376693 ME: Enhanced Debug Mode : NO
1839 15:49:46.383158 ME: CPU Debug Disabled : YES
1840 15:49:46.386294 ME: TXT Support : NO
1841 15:49:46.392898 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1842 15:49:46.399716 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1843 15:49:46.402813 CBFS: 'fallback/slic' not found.
1844 15:49:46.406222 ACPI: Writing ACPI tables at 76b01000.
1845 15:49:46.409539 ACPI: * FACS
1846 15:49:46.410173 ACPI: * DSDT
1847 15:49:46.412555 Ramoops buffer: 0x100000@0x76a00000.
1848 15:49:46.419195 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1849 15:49:46.422399 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1850 15:49:46.425537 Google Chrome EC: version:
1851 15:49:46.429186 ro: voema_v2.0.10114-a447f03e46
1852 15:49:46.432562 rw: voema_v2.0.10114-a447f03e46
1853 15:49:46.435626 running image: 2
1854 15:49:46.442015 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1855 15:49:46.445251 ACPI: * FADT
1856 15:49:46.445804 SCI is IRQ9
1857 15:49:46.448884 ACPI: added table 1/32, length now 40
1858 15:49:46.452077 ACPI: * SSDT
1859 15:49:46.455472 Found 1 CPU(s) with 8 core(s) each.
1860 15:49:46.458708 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1861 15:49:46.465341 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1862 15:49:46.468695 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1863 15:49:46.471685 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1864 15:49:46.478298 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1865 15:49:46.484928 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1866 15:49:46.488338 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1867 15:49:46.494839 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1868 15:49:46.501444 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1869 15:49:46.504666 \_SB.PCI0.RP09: Added StorageD3Enable property
1870 15:49:46.511388 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1871 15:49:46.514460 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1872 15:49:46.521356 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1873 15:49:46.524484 PS2K: Passing 80 keymaps to kernel
1874 15:49:46.530969 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1875 15:49:46.537532 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1876 15:49:46.544291 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1877 15:49:46.550715 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1878 15:49:46.557505 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1879 15:49:46.563969 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1880 15:49:46.570273 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1881 15:49:46.576981 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1882 15:49:46.580127 ACPI: added table 2/32, length now 44
1883 15:49:46.583587 ACPI: * MCFG
1884 15:49:46.586997 ACPI: added table 3/32, length now 48
1885 15:49:46.587575 ACPI: * TPM2
1886 15:49:46.590143 TPM2 log created at 0x769f0000
1887 15:49:46.593437 ACPI: added table 4/32, length now 52
1888 15:49:46.596934 ACPI: * MADT
1889 15:49:46.597442 SCI is IRQ9
1890 15:49:46.603454 ACPI: added table 5/32, length now 56
1891 15:49:46.604161 current = 76b09850
1892 15:49:46.606725 ACPI: * DMAR
1893 15:49:46.609880 ACPI: added table 6/32, length now 60
1894 15:49:46.613012 ACPI: added table 7/32, length now 64
1895 15:49:46.613505 ACPI: * HPET
1896 15:49:46.619990 ACPI: added table 8/32, length now 68
1897 15:49:46.620515 ACPI: done.
1898 15:49:46.623040 ACPI tables: 35216 bytes.
1899 15:49:46.626465 smbios_write_tables: 769ef000
1900 15:49:46.629596 EC returned error result code 3
1901 15:49:46.632864 Couldn't obtain OEM name from CBI
1902 15:49:46.636040 Create SMBIOS type 16
1903 15:49:46.639453 Create SMBIOS type 17
1904 15:49:46.642995 GENERIC: 0.0 (WIFI Device)
1905 15:49:46.643507 SMBIOS tables: 1734 bytes.
1906 15:49:46.649253 Writing table forward entry at 0x00000500
1907 15:49:46.655998 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1908 15:49:46.659013 Writing coreboot table at 0x76b25000
1909 15:49:46.662550 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1910 15:49:46.669171 1. 0000000000001000-000000000009ffff: RAM
1911 15:49:46.672133 2. 00000000000a0000-00000000000fffff: RESERVED
1912 15:49:46.678950 3. 0000000000100000-00000000769eefff: RAM
1913 15:49:46.682156 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1914 15:49:46.688888 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1915 15:49:46.695425 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1916 15:49:46.698930 7. 0000000077000000-000000007fbfffff: RESERVED
1917 15:49:46.702007 8. 00000000c0000000-00000000cfffffff: RESERVED
1918 15:49:46.708915 9. 00000000f8000000-00000000f9ffffff: RESERVED
1919 15:49:46.711976 10. 00000000fb000000-00000000fb000fff: RESERVED
1920 15:49:46.718395 11. 00000000fe000000-00000000fe00ffff: RESERVED
1921 15:49:46.721706 12. 00000000fed80000-00000000fed87fff: RESERVED
1922 15:49:46.728531 13. 00000000fed90000-00000000fed92fff: RESERVED
1923 15:49:46.731572 14. 00000000feda0000-00000000feda1fff: RESERVED
1924 15:49:46.737885 15. 00000000fedc0000-00000000feddffff: RESERVED
1925 15:49:46.741237 16. 0000000100000000-00000004803fffff: RAM
1926 15:49:46.744493 Passing 4 GPIOs to payload:
1927 15:49:46.747957 NAME | PORT | POLARITY | VALUE
1928 15:49:46.754420 lid | undefined | high | high
1929 15:49:46.760904 power | undefined | high | low
1930 15:49:46.764056 oprom | undefined | high | low
1931 15:49:46.770739 EC in RW | 0x000000e5 | high | high
1932 15:49:46.777159 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1933 15:49:46.780552 coreboot table: 1576 bytes.
1934 15:49:46.783772 IMD ROOT 0. 0x76fff000 0x00001000
1935 15:49:46.787093 IMD SMALL 1. 0x76ffe000 0x00001000
1936 15:49:46.790295 FSP MEMORY 2. 0x76c4e000 0x003b0000
1937 15:49:46.793728 VPD 3. 0x76c4d000 0x00000367
1938 15:49:46.796884 RO MCACHE 4. 0x76c4c000 0x00000fdc
1939 15:49:46.800077 CONSOLE 5. 0x76c2c000 0x00020000
1940 15:49:46.806708 FMAP 6. 0x76c2b000 0x00000578
1941 15:49:46.809876 TIME STAMP 7. 0x76c2a000 0x00000910
1942 15:49:46.813306 VBOOT WORK 8. 0x76c16000 0x00014000
1943 15:49:46.816749 ROMSTG STCK 9. 0x76c15000 0x00001000
1944 15:49:46.819950 AFTER CAR 10. 0x76c0a000 0x0000b000
1945 15:49:46.823091 RAMSTAGE 11. 0x76b97000 0x00073000
1946 15:49:46.826469 REFCODE 12. 0x76b42000 0x00055000
1947 15:49:46.832974 SMM BACKUP 13. 0x76b32000 0x00010000
1948 15:49:46.836189 4f444749 14. 0x76b30000 0x00002000
1949 15:49:46.839353 EXT VBT15. 0x76b2d000 0x0000219f
1950 15:49:46.842724 COREBOOT 16. 0x76b25000 0x00008000
1951 15:49:46.846198 ACPI 17. 0x76b01000 0x00024000
1952 15:49:46.849271 ACPI GNVS 18. 0x76b00000 0x00001000
1953 15:49:46.852673 RAMOOPS 19. 0x76a00000 0x00100000
1954 15:49:46.855808 TPM2 TCGLOG20. 0x769f0000 0x00010000
1955 15:49:46.862529 SMBIOS 21. 0x769ef000 0x00000800
1956 15:49:46.862654 IMD small region:
1957 15:49:46.865681 IMD ROOT 0. 0x76ffec00 0x00000400
1958 15:49:46.869141 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1959 15:49:46.875763 POWER STATE 2. 0x76ffeb80 0x00000044
1960 15:49:46.878801 ROMSTAGE 3. 0x76ffeb60 0x00000004
1961 15:49:46.882212 MEM INFO 4. 0x76ffe980 0x000001e0
1962 15:49:46.888741 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1963 15:49:46.892062 MTRR: Physical address space:
1964 15:49:46.898548 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1965 15:49:46.905172 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1966 15:49:46.908664 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1967 15:49:46.915260 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1968 15:49:46.921745 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1969 15:49:46.928378 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1970 15:49:46.935025 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1971 15:49:46.938236 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 15:49:46.944990 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 15:49:46.948158 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 15:49:46.951577 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 15:49:46.954700 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 15:49:46.958174 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 15:49:46.964743 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 15:49:46.967827 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 15:49:46.971299 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 15:49:46.974457 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 15:49:46.981209 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 15:49:46.984479 call enable_fixed_mtrr()
1983 15:49:46.987529 CPU physical address size: 39 bits
1984 15:49:46.994168 MTRR: default type WB/UC MTRR counts: 6/7.
1985 15:49:46.997562 MTRR: WB selected as default type.
1986 15:49:47.001005 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1987 15:49:47.007287 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1988 15:49:47.013895 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1989 15:49:47.020597 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1990 15:49:47.027326 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1991 15:49:47.033698 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1992 15:49:47.037394
1993 15:49:47.037476 MTRR check
1994 15:49:47.040498 Fixed MTRRs : Enabled
1995 15:49:47.040591 Variable MTRRs: Enabled
1996 15:49:47.040662
1997 15:49:47.047173 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 15:49:47.051153 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 15:49:47.053916 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 15:49:47.057160 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 15:49:47.063886 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 15:49:47.066962 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 15:49:47.070405 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 15:49:47.073806 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 15:49:47.080512 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 15:49:47.083598 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 15:49:47.086970 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 15:49:47.094340 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 15:49:47.094431 call enable_fixed_mtrr()
2010 15:49:47.100810 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 15:49:47.104219 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 15:49:47.107426 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 15:49:47.110713 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 15:49:47.117476 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 15:49:47.120618 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 15:49:47.123778 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 15:49:47.127085 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 15:49:47.134029 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 15:49:47.136861 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 15:49:47.143689 CPU physical address size: 39 bits
2021 15:49:47.146895 call enable_fixed_mtrr()
2022 15:49:47.150201 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 15:49:47.153413 CPU physical address size: 39 bits
2024 15:49:47.159970 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2025 15:49:47.163357 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 15:49:47.167792 Checking cr50 for pending updates
2027 15:49:47.171583 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 15:49:47.174618 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 15:49:47.181180 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 15:49:47.184493 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 15:49:47.188030 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 15:49:47.191194 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 15:49:47.197588 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 15:49:47.201151 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 15:49:47.204373 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 15:49:47.208682 Reading cr50 TPM mode
2037 15:49:47.212472 call enable_fixed_mtrr()
2038 15:49:47.215564 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 15:49:47.218932 MTRR: Fixed MSR 0x250 0x0606060606060606
2040 15:49:47.222449 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 15:49:47.228897 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 15:49:47.232051 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 15:49:47.235559 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 15:49:47.238957 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 15:49:47.245493 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 15:49:47.248600 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 15:49:47.252046 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 15:49:47.255235 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 15:49:47.258622 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 15:49:47.265152 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 15:49:47.268615 call enable_fixed_mtrr()
2052 15:49:47.271700 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 15:49:47.278251 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 15:49:47.281705 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 15:49:47.284916 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 15:49:47.288331 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 15:49:47.294711 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 15:49:47.298187 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 15:49:47.301323 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 15:49:47.304479 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 15:49:47.309444 CPU physical address size: 39 bits
2062 15:49:47.315958 call enable_fixed_mtrr()
2063 15:49:47.319067 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 15:49:47.322477 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 15:49:47.329021 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 15:49:47.332448 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 15:49:47.335884 MTRR: Fixed MSR 0x268 0x0606060606060606
2068 15:49:47.338978 MTRR: Fixed MSR 0x269 0x0606060606060606
2069 15:49:47.345675 MTRR: Fixed MSR 0x26a 0x0606060606060606
2070 15:49:47.348729 MTRR: Fixed MSR 0x26b 0x0606060606060606
2071 15:49:47.351976 MTRR: Fixed MSR 0x26c 0x0606060606060606
2072 15:49:47.355484 MTRR: Fixed MSR 0x26d 0x0606060606060606
2073 15:49:47.361976 MTRR: Fixed MSR 0x26e 0x0606060606060606
2074 15:49:47.365059 MTRR: Fixed MSR 0x26f 0x0606060606060606
2075 15:49:47.371704 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 15:49:47.371798 call enable_fixed_mtrr()
2077 15:49:47.378633 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 15:49:47.381586 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 15:49:47.385087 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 15:49:47.388374 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 15:49:47.394870 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 15:49:47.398197 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 15:49:47.401510 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 15:49:47.404947 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 15:49:47.411239 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 15:49:47.414576 CPU physical address size: 39 bits
2087 15:49:47.419112 call enable_fixed_mtrr()
2088 15:49:47.422350 CPU physical address size: 39 bits
2089 15:49:47.428932 BS: BS_PAYLOAD_LOAD entry times (exec / console): 45 / 8 ms
2090 15:49:47.432202 CPU physical address size: 39 bits
2091 15:49:47.443241 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2092 15:49:47.446312 CPU physical address size: 39 bits
2093 15:49:47.449850 Checking segment from ROM address 0xffc02b38
2094 15:49:47.452858 Checking segment from ROM address 0xffc02b54
2095 15:49:47.459411 Loading segment from ROM address 0xffc02b38
2096 15:49:47.462535 code (compression=0)
2097 15:49:47.469514 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2098 15:49:47.479374 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2099 15:49:47.479471 it's not compressed!
2100 15:49:47.624884 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2101 15:49:47.631311 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2102 15:49:47.638107 Loading segment from ROM address 0xffc02b54
2103 15:49:47.641609 Entry Point 0x30000000
2104 15:49:47.641702 Loaded segments
2105 15:49:47.648243 BS: BS_PAYLOAD_LOAD run times (exec / console): 148 / 65 ms
2106 15:49:47.693878 Finalizing chipset.
2107 15:49:47.696902 Finalizing SMM.
2108 15:49:47.697002 APMC done.
2109 15:49:47.703436 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2110 15:49:47.706780 mp_park_aps done after 0 msecs.
2111 15:49:47.710397 Jumping to boot code at 0x30000000(0x76b25000)
2112 15:49:47.719910 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2113 15:49:47.720011
2114 15:49:47.723269
2115 15:49:47.723354
2116 15:49:47.723709 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2117 15:49:47.723823 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2118 15:49:47.723912 Setting prompt string to ['volteer:']
2119 15:49:47.723995 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2120 15:49:47.726489 Starting depthcharge on Voema...
2121 15:49:47.726580
2122 15:49:47.733408 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2123 15:49:47.733508
2124 15:49:47.739697 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2125 15:49:47.739787
2126 15:49:47.746381 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2127 15:49:47.746469
2128 15:49:47.749647 Failed to find eMMC card reader
2129 15:49:47.749738
2130 15:49:47.752892 Wipe memory regions:
2131 15:49:47.752987
2132 15:49:47.756106 [0x00000000001000, 0x000000000a0000)
2133 15:49:47.756189
2134 15:49:47.759381 [0x00000000100000, 0x00000030000000)
2135 15:49:47.795587
2136 15:49:47.798704 [0x00000032662db0, 0x000000769ef000)
2137 15:49:47.848765
2138 15:49:47.851980 [0x00000100000000, 0x00000480400000)
2139 15:49:48.509390
2140 15:49:48.512373 ec_init: CrosEC protocol v3 supported (256, 256)
2141 15:49:48.944019
2142 15:49:48.944164 R8152: Initializing
2143 15:49:48.944239
2144 15:49:48.947101 Version 6 (ocp_data = 5c30)
2145 15:49:48.947184
2146 15:49:48.950251 R8152: Done initializing
2147 15:49:48.950352
2148 15:49:48.953752 Adding net device
2149 15:49:49.254986
2150 15:49:49.258118 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2151 15:49:49.258210
2152 15:49:49.258348
2153 15:49:49.258434
2154 15:49:49.261602 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2156 15:49:49.362369 volteer: tftpboot 192.168.201.1 9406185/tftp-deploy-ytdi6f4u/kernel/bzImage 9406185/tftp-deploy-ytdi6f4u/kernel/cmdline 9406185/tftp-deploy-ytdi6f4u/ramdisk/ramdisk.cpio.gz
2157 15:49:49.362525 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2158 15:49:49.362662 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2159 15:49:49.366739 tftpboot 192.168.201.1 9406185/tftp-deploy-ytdi6f4u/kernel/bzImoy-ytdi6f4u/kernel/cmdline 9406185/tftp-deploy-ytdi6f4u/ramdisk/ramdisk.cpio.gz
2160 15:49:49.366838
2161 15:49:49.366949 Waiting for link
2162 15:49:49.569487
2163 15:49:49.569638 done.
2164 15:49:49.569722
2165 15:49:49.569793 MAC: 00:24:32:30:78:e4
2166 15:49:49.569859
2167 15:49:49.572958 Sending DHCP discover... done.
2168 15:49:49.573043
2169 15:49:49.575955 Waiting for reply... done.
2170 15:49:49.576039
2171 15:49:49.579383 Sending DHCP request... done.
2172 15:49:49.579479
2173 15:49:49.582694 Waiting for reply... done.
2174 15:49:49.582800
2175 15:49:49.585737 My ip is 192.168.201.13
2176 15:49:49.585830
2177 15:49:49.588969 The DHCP server ip is 192.168.201.1
2178 15:49:49.589062
2179 15:49:49.595750 TFTP server IP predefined by user: 192.168.201.1
2180 15:49:49.595844
2181 15:49:49.602325 Bootfile predefined by user: 9406185/tftp-deploy-ytdi6f4u/kernel/bzImage
2182 15:49:49.602436
2183 15:49:49.605617 Sending tftp read request... done.
2184 15:49:49.605699
2185 15:49:49.608715 Waiting for the transfer...
2186 15:49:49.608804
2187 15:49:50.129356 00000000 ################################################################
2188 15:49:50.129507
2189 15:49:50.651433 00080000 ################################################################
2190 15:49:50.651587
2191 15:49:51.170488 00100000 ################################################################
2192 15:49:51.170679
2193 15:49:51.699777 00180000 ################################################################
2194 15:49:51.699923
2195 15:49:52.215498 00200000 ################################################################
2196 15:49:52.215643
2197 15:49:52.736436 00280000 ################################################################
2198 15:49:52.736592
2199 15:49:53.272825 00300000 ################################################################
2200 15:49:53.272984
2201 15:49:53.800383 00380000 ################################################################
2202 15:49:53.800548
2203 15:49:54.313986 00400000 ################################################################
2204 15:49:54.314139
2205 15:49:54.832376 00480000 ################################################################
2206 15:49:54.832599
2207 15:49:55.370978 00500000 ################################################################
2208 15:49:55.371147
2209 15:49:55.907891 00580000 ################################################################
2210 15:49:55.908041
2211 15:49:56.420916 00600000 ################################################################
2212 15:49:56.421064
2213 15:49:56.939951 00680000 ################################################################
2214 15:49:56.940096
2215 15:49:57.455740 00700000 ################################################################
2216 15:49:57.455888
2217 15:49:57.967002 00780000 ################################################################
2218 15:49:57.967157
2219 15:49:58.479868 00800000 ################################################################
2220 15:49:58.480023
2221 15:49:59.001520 00880000 ################################################################
2222 15:49:59.001669
2223 15:49:59.271386 00900000 ################################## done.
2224 15:49:59.271539
2225 15:49:59.274441 The bootfile was 9707520 bytes long.
2226 15:49:59.274527
2227 15:49:59.277811 Sending tftp read request... done.
2228 15:49:59.277900
2229 15:49:59.281068 Waiting for the transfer...
2230 15:49:59.281154
2231 15:49:59.800959 00000000 ################################################################
2232 15:49:59.801105
2233 15:50:00.342776 00080000 ################################################################
2234 15:50:00.342929
2235 15:50:00.882423 00100000 ################################################################
2236 15:50:00.882674
2237 15:50:01.468409 00180000 ################################################################
2238 15:50:01.468564
2239 15:50:02.103429 00200000 ################################################################
2240 15:50:02.104038
2241 15:50:02.728106 00280000 ################################################################
2242 15:50:02.728252
2243 15:50:03.325749 00300000 ################################################################
2244 15:50:03.325897
2245 15:50:03.913700 00380000 ################################################################
2246 15:50:03.913849
2247 15:50:04.522969 00400000 ################################################################
2248 15:50:04.523116
2249 15:50:05.104499 00480000 ################################################################
2250 15:50:05.104652
2251 15:50:05.444902 00500000 ################################## done.
2252 15:50:05.445573
2253 15:50:05.447995 Sending tftp read request... done.
2254 15:50:05.448562
2255 15:50:05.451330 Waiting for the transfer...
2256 15:50:05.451886
2257 15:50:05.454858 00000000 # done.
2258 15:50:05.455398
2259 15:50:05.460837 Command line loaded dynamically from TFTP file: 9406185/tftp-deploy-ytdi6f4u/kernel/cmdline
2260 15:50:05.461346
2261 15:50:05.484032 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9406185/extract-nfsrootfs-xrh13146,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2262 15:50:05.489479
2263 15:50:05.492919 Shutting down all USB controllers.
2264 15:50:05.493443
2265 15:50:05.493832 Removing current net device
2266 15:50:05.494197
2267 15:50:05.496154 Finalizing coreboot
2268 15:50:05.496653
2269 15:50:05.502554 Exiting depthcharge with code 4 at timestamp: 26357304
2270 15:50:05.503167
2271 15:50:05.503574
2272 15:50:05.503941 Starting kernel ...
2273 15:50:05.504296
2274 15:50:05.504650
2275 15:50:05.506056 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2276 15:50:05.506651 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2277 15:50:05.507069 Setting prompt string to ['Linux version [0-9]']
2278 15:50:05.507458 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2279 15:50:05.507847 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2281 15:54:30.506845 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2283 15:54:30.507062 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2285 15:54:30.507224 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2288 15:54:30.507491 end: 2 depthcharge-action (duration 00:05:00) [common]
2290 15:54:30.507720 Cleaning after the job
2291 15:54:30.507811 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/ramdisk
2292 15:54:30.508313 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/kernel
2293 15:54:30.508975 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/nfsrootfs
2294 15:54:30.540614 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406185/tftp-deploy-ytdi6f4u/modules
2295 15:54:30.540931 start: 5.1 power-off (timeout 00:00:30) [common]
2296 15:54:30.541095 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2297 15:54:32.718298 >> Command sent successfully.
2298 15:54:32.720483 Returned 0 in 2 seconds
2299 15:54:32.821264 end: 5.1 power-off (duration 00:00:02) [common]
2301 15:54:32.821581 start: 5.2 read-feedback (timeout 00:09:58) [common]
2302 15:54:32.821828 Listened to connection for namespace 'common' for up to 1s
2303 15:54:33.826767 Finalising connection for namespace 'common'
2304 15:54:33.826939 Disconnecting from shell: Finalise
2305 15:54:33.827024
2306 15:54:33.927735 end: 5.2 read-feedback (duration 00:00:01) [common]
2307 15:54:33.928054 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9406185
2308 15:54:34.018391 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9406185
2309 15:54:34.018593 JobError: Your job cannot terminate cleanly.