Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 15:53:21.565882 lava-dispatcher, installed at version: 2022.11
2 15:53:21.566069 start: 0 validate
3 15:53:21.566212 Start time: 2023-03-03 15:53:21.566205+00:00 (UTC)
4 15:53:21.566344 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:53:21.566479 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230224.0%2Famd64%2Frootfs.cpio.gz exists
6 15:53:21.847016 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:53:21.847217 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:53:21.849277 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:53:21.849401 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:53:22.131833 validate duration: 0.57
12 15:53:22.132117 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:53:22.132231 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:53:22.132331 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:53:22.132438 Not decompressing ramdisk as can be used compressed.
16 15:53:22.132570 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230224.0/amd64/rootfs.cpio.gz
17 15:53:22.132640 saving as /var/lib/lava/dispatcher/tmp/9406207/tftp-deploy-ollxsbe_/ramdisk/rootfs.cpio.gz
18 15:53:22.132703 total size: 35753889 (34MB)
19 15:53:22.134934 progress 0% (0MB)
20 15:53:22.171205 progress 5% (1MB)
21 15:53:22.205106 progress 10% (3MB)
22 15:53:22.237108 progress 15% (5MB)
23 15:53:22.268064 progress 20% (6MB)
24 15:53:22.293451 progress 25% (8MB)
25 15:53:22.350636 progress 30% (10MB)
26 15:53:22.407959 progress 35% (11MB)
27 15:53:22.466885 progress 40% (13MB)
28 15:53:22.545047 progress 45% (15MB)
29 15:53:22.623544 progress 50% (17MB)
30 15:53:22.714012 progress 55% (18MB)
31 15:53:22.907006 progress 60% (20MB)
32 15:53:23.077101 progress 65% (22MB)
33 15:53:23.248734 progress 70% (23MB)
34 15:53:23.425700 progress 75% (25MB)
35 15:53:23.594275 progress 80% (27MB)
36 15:53:23.773349 progress 85% (29MB)
37 15:53:23.950202 progress 90% (30MB)
38 15:53:24.121312 progress 95% (32MB)
39 15:53:24.283407 progress 100% (34MB)
40 15:53:24.283668 34MB downloaded in 2.15s (15.85MB/s)
41 15:53:24.283860 end: 1.1.1 http-download (duration 00:00:02) [common]
43 15:53:24.284138 end: 1.1 download-retry (duration 00:00:02) [common]
44 15:53:24.284227 start: 1.2 download-retry (timeout 00:09:58) [common]
45 15:53:24.284315 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 15:53:24.284419 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:53:24.284519 saving as /var/lib/lava/dispatcher/tmp/9406207/tftp-deploy-ollxsbe_/kernel/bzImage
48 15:53:24.284582 total size: 9707520 (9MB)
49 15:53:24.284643 No compression specified
50 15:53:24.305955 progress 0% (0MB)
51 15:53:24.339209 progress 5% (0MB)
52 15:53:24.377895 progress 10% (0MB)
53 15:53:24.419183 progress 15% (1MB)
54 15:53:24.462921 progress 20% (1MB)
55 15:53:24.505711 progress 25% (2MB)
56 15:53:24.546437 progress 30% (2MB)
57 15:53:24.587386 progress 35% (3MB)
58 15:53:24.627965 progress 40% (3MB)
59 15:53:24.677638 progress 45% (4MB)
60 15:53:24.714061 progress 50% (4MB)
61 15:53:24.754756 progress 55% (5MB)
62 15:53:24.794594 progress 60% (5MB)
63 15:53:24.833935 progress 65% (6MB)
64 15:53:24.881221 progress 70% (6MB)
65 15:53:24.920783 progress 75% (6MB)
66 15:53:24.961350 progress 80% (7MB)
67 15:53:24.999333 progress 85% (7MB)
68 15:53:25.034367 progress 90% (8MB)
69 15:53:25.072535 progress 95% (8MB)
70 15:53:25.109602 progress 100% (9MB)
71 15:53:25.109839 9MB downloaded in 0.83s (11.22MB/s)
72 15:53:25.110010 end: 1.2.1 http-download (duration 00:00:01) [common]
74 15:53:25.110303 end: 1.2 download-retry (duration 00:00:01) [common]
75 15:53:25.110400 start: 1.3 download-retry (timeout 00:09:57) [common]
76 15:53:25.110498 start: 1.3.1 http-download (timeout 00:09:57) [common]
77 15:53:25.110609 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:53:25.110686 saving as /var/lib/lava/dispatcher/tmp/9406207/tftp-deploy-ollxsbe_/modules/modules.tar
79 15:53:25.110754 total size: 64716 (0MB)
80 15:53:25.110820 Using unxz to decompress xz
81 15:53:25.135666 progress 50% (0MB)
82 15:53:25.146700 progress 100% (0MB)
83 15:53:25.149195 0MB downloaded in 0.04s (1.61MB/s)
84 15:53:25.149443 end: 1.3.1 http-download (duration 00:00:00) [common]
86 15:53:25.149740 end: 1.3 download-retry (duration 00:00:00) [common]
87 15:53:25.149856 start: 1.4 prepare-tftp-overlay (timeout 00:09:57) [common]
88 15:53:25.149959 start: 1.4.1 extract-nfsrootfs (timeout 00:09:57) [common]
89 15:53:25.150063 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 15:53:25.150157 start: 1.4.2 lava-overlay (timeout 00:09:57) [common]
91 15:53:25.150345 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu
92 15:53:25.150471 makedir: /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin
93 15:53:25.150564 makedir: /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/tests
94 15:53:25.150651 makedir: /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/results
95 15:53:25.150776 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-add-keys
96 15:53:25.150922 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-add-sources
97 15:53:25.151044 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-background-process-start
98 15:53:25.151175 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-background-process-stop
99 15:53:25.151297 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-common-functions
100 15:53:25.151424 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-echo-ipv4
101 15:53:25.151543 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-install-packages
102 15:53:25.151677 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-installed-packages
103 15:53:25.151833 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-os-build
104 15:53:25.151958 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-probe-channel
105 15:53:25.152093 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-probe-ip
106 15:53:25.152209 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-target-ip
107 15:53:25.152335 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-target-mac
108 15:53:25.152452 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-target-storage
109 15:53:25.152584 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-test-case
110 15:53:25.152699 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-test-event
111 15:53:25.152827 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-test-feedback
112 15:53:25.152950 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-test-raise
113 15:53:25.153072 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-test-reference
114 15:53:25.153195 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-test-runner
115 15:53:25.153310 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-test-set
116 15:53:25.153435 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-test-shell
117 15:53:25.153555 Updating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-install-packages (oe)
118 15:53:25.153687 Updating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/bin/lava-installed-packages (oe)
119 15:53:25.153791 Creating /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/environment
120 15:53:25.153896 LAVA metadata
121 15:53:25.153972 - LAVA_JOB_ID=9406207
122 15:53:25.154053 - LAVA_DISPATCHER_IP=192.168.201.1
123 15:53:25.154165 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:57) [common]
124 15:53:25.154233 skipped lava-vland-overlay
125 15:53:25.154330 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 15:53:25.154422 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:57) [common]
127 15:53:25.154499 skipped lava-multinode-overlay
128 15:53:25.154583 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 15:53:25.154672 start: 1.4.2.3 test-definition (timeout 00:09:57) [common]
130 15:53:25.154766 Loading test definitions
131 15:53:25.154872 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:57) [common]
132 15:53:25.154965 Using /lava-9406207 at stage 0
133 15:53:25.155239 uuid=9406207_1.4.2.3.1 testdef=None
134 15:53:25.155335 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 15:53:25.155443 start: 1.4.2.3.2 test-overlay (timeout 00:09:57) [common]
136 15:53:25.155960 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 15:53:25.156214 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:57) [common]
139 15:53:25.156813 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 15:53:25.157079 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:57) [common]
142 15:53:25.157649 runner path: /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/0/tests/0_cros-ec test_uuid 9406207_1.4.2.3.1
143 15:53:25.157801 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 15:53:25.158042 Creating lava-test-runner.conf files
146 15:53:25.158116 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406207/lava-overlay-r58jcxnu/lava-9406207/0 for stage 0
147 15:53:25.158203 - 0_cros-ec
148 15:53:25.158311 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 15:53:25.158406 start: 1.4.2.4 compress-overlay (timeout 00:09:57) [common]
150 15:53:25.164120 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 15:53:25.164239 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:57) [common]
152 15:53:25.164335 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 15:53:25.164430 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 15:53:25.164521 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
155 15:53:25.934969 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 15:53:25.935329 start: 1.4.4 extract-modules (timeout 00:09:56) [common]
157 15:53:25.935455 extracting modules file /var/lib/lava/dispatcher/tmp/9406207/tftp-deploy-ollxsbe_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406207/extract-overlay-ramdisk-togyy8do/ramdisk
158 15:53:25.940012 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 15:53:25.940140 start: 1.4.5 apply-overlay-tftp (timeout 00:09:56) [common]
160 15:53:25.940228 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9406207/compress-overlay-q4bw551p/overlay-1.4.2.4.tar.gz to ramdisk
161 15:53:25.940317 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9406207/compress-overlay-q4bw551p/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9406207/extract-overlay-ramdisk-togyy8do/ramdisk
162 15:53:25.943821 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 15:53:25.943947 start: 1.4.6 configure-preseed-file (timeout 00:09:56) [common]
164 15:53:25.944043 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 15:53:25.944150 start: 1.4.7 compress-ramdisk (timeout 00:09:56) [common]
166 15:53:25.944234 Building ramdisk /var/lib/lava/dispatcher/tmp/9406207/extract-overlay-ramdisk-togyy8do/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9406207/extract-overlay-ramdisk-togyy8do/ramdisk
167 15:53:26.195489 >> 182673 blocks
168 15:53:29.412708 rename /var/lib/lava/dispatcher/tmp/9406207/extract-overlay-ramdisk-togyy8do/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9406207/tftp-deploy-ollxsbe_/ramdisk/ramdisk.cpio.gz
169 15:53:29.413111 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 15:53:29.413237 start: 1.4.8 prepare-kernel (timeout 00:09:53) [common]
171 15:53:29.413340 start: 1.4.8.1 prepare-fit (timeout 00:09:53) [common]
172 15:53:29.413435 No mkimage arch provided, not using FIT.
173 15:53:29.413526 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 15:53:29.413613 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 15:53:29.413711 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 15:53:29.413800 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:53) [common]
177 15:53:29.413878 No LXC device requested
178 15:53:29.413961 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 15:53:29.414058 start: 1.6 deploy-device-env (timeout 00:09:53) [common]
180 15:53:29.414144 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 15:53:29.414222 Checking files for TFTP limit of 4294967296 bytes.
182 15:53:29.414606 end: 1 tftp-deploy (duration 00:00:07) [common]
183 15:53:29.414715 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 15:53:29.414815 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 15:53:29.414944 substitutions:
186 15:53:29.415011 - {DTB}: None
187 15:53:29.415076 - {INITRD}: 9406207/tftp-deploy-ollxsbe_/ramdisk/ramdisk.cpio.gz
188 15:53:29.415136 - {KERNEL}: 9406207/tftp-deploy-ollxsbe_/kernel/bzImage
189 15:53:29.415194 - {LAVA_MAC}: None
190 15:53:29.415251 - {PRESEED_CONFIG}: None
191 15:53:29.415307 - {PRESEED_LOCAL}: None
192 15:53:29.415363 - {RAMDISK}: 9406207/tftp-deploy-ollxsbe_/ramdisk/ramdisk.cpio.gz
193 15:53:29.415418 - {ROOT_PART}: None
194 15:53:29.415507 - {ROOT}: None
195 15:53:29.415598 - {SERVER_IP}: 192.168.201.1
196 15:53:29.415662 - {TEE}: None
197 15:53:29.415775 Parsed boot commands:
198 15:53:29.415855 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 15:53:29.416014 Parsed boot commands: tftpboot 192.168.201.1 9406207/tftp-deploy-ollxsbe_/kernel/bzImage 9406207/tftp-deploy-ollxsbe_/kernel/cmdline 9406207/tftp-deploy-ollxsbe_/ramdisk/ramdisk.cpio.gz
200 15:53:29.416108 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 15:53:29.416202 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 15:53:29.416299 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 15:53:29.416388 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 15:53:29.416459 Not connected, no need to disconnect.
205 15:53:29.416537 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 15:53:29.416621 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 15:53:29.416689 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
208 15:53:29.419654 Setting prompt string to ['lava-test: # ']
209 15:53:29.419988 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 15:53:29.420095 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 15:53:29.420194 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 15:53:29.420287 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 15:53:29.420460 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
214 15:53:38.795859 >> Command sent successfully.
215 15:53:38.798807 Returned 0 in 9 seconds
216 15:53:38.900007 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
218 15:53:38.902564 end: 2.2.2 reset-device (duration 00:00:09) [common]
219 15:53:38.903144 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
220 15:53:38.903638 Setting prompt string to 'Starting depthcharge on Voema...'
221 15:53:38.904088 Changing prompt to 'Starting depthcharge on Voema...'
222 15:53:38.904520 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 15:53:38.905994 [Enter `^Ec?' for help]
224 15:53:38.906488
225 15:53:38.906977
226 15:53:38.907391 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 15:53:38.907823 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 15:53:38.908231 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 15:53:38.908618 CPU: AES supported, TXT NOT supported, VT supported
230 15:53:38.909054 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 15:53:38.909452 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 15:53:38.909811 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
233 15:53:38.910169 VBOOT: Loading verstage.
234 15:53:38.910523 FMAP: Found "FLASH" version 1.1 at 0x1804000.
235 15:53:38.910900 FMAP: base = 0x0 size = 0x2000000 #areas = 32
236 15:53:38.911251 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
237 15:53:38.911621 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
238 15:53:38.912027 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
239 15:53:38.912468
240 15:53:38.912839
241 15:53:38.913191 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
242 15:53:38.913541 Probing TPM: . done!
243 15:53:38.913881 TPM ready after 0 ms
244 15:53:38.914227 Connected to device vid:did:rid of 1ae0:0028:00
245 15:53:38.914574 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
246 15:53:38.914945 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
247 15:53:38.915299 Initialized TPM device CR50 revision 0
248 15:53:38.915650 tlcl_send_startup: Startup return code is 0
249 15:53:38.916046 TPM: setup succeeded
250 15:53:38.916397 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
251 15:53:38.916731 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
252 15:53:38.917084 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
253 15:53:38.917434 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
254 15:53:38.917779 Chrome EC: UHEPI supported
255 15:53:38.918118 Phase 1
256 15:53:38.918456 FMAP: area GBB found @ 1805000 (458752 bytes)
257 15:53:38.918842 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
258 15:53:38.919200 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
259 15:53:38.919566 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
260 15:53:38.919955 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
261 15:53:38.920319 Recovery requested (1009000e)
262 15:53:38.920668 TPM: Extending digest for VBOOT: boot mode into PCR 0
263 15:53:38.921011 tlcl_extend: response is 0
264 15:53:38.921352 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
265 15:53:38.921694 tlcl_extend: response is 0
266 15:53:38.922035 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
267 15:53:38.922380 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
268 15:53:38.922721 BS: verstage times (exec / console): total (unknown) / 142 ms
269 15:53:38.923061
270 15:53:38.923396
271 15:53:38.923863 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
272 15:53:38.924244 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
273 15:53:38.924586 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
274 15:53:38.924943 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
275 15:53:38.925287 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
276 15:53:38.925631 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
277 15:53:38.925961 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
278 15:53:38.926226 TCO_STS: 0000 0000
279 15:53:38.926457 GEN_PMCON: d0015038 00002200
280 15:53:38.926693 GBLRST_CAUSE: 00000000 00000000
281 15:53:38.927003 HPR_CAUSE0: 00000000
282 15:53:38.927252 prev_sleep_state 5
283 15:53:38.927489 Boot Count incremented to 16543
284 15:53:38.927747 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 15:53:38.927985 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 15:53:38.928233 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 15:53:38.928475 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
288 15:53:38.928714 Chrome EC: UHEPI supported
289 15:53:38.929226 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
290 15:53:38.929493 Probing TPM: done!
291 15:53:38.930539 Connected to device vid:did:rid of 1ae0:0028:00
292 15:53:38.940910 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
293 15:53:38.944188 Initialized TPM device CR50 revision 0
294 15:53:38.958494 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
295 15:53:38.965265 MRC: Hash idx 0x100b comparison successful.
296 15:53:38.968560 MRC cache found, size faa8
297 15:53:38.968749 bootmode is set to: 2
298 15:53:38.972071 SPD index = 0
299 15:53:38.978156 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
300 15:53:38.981562 SPD: module type is LPDDR4X
301 15:53:38.985422 SPD: module part number is MT53E512M64D4NW-046
302 15:53:38.991769 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
303 15:53:38.997918 SPD: device width 16 bits, bus width 16 bits
304 15:53:39.001403 SPD: module size is 1024 MB (per channel)
305 15:53:39.435448 CBMEM:
306 15:53:39.438137 IMD: root @ 0x76fff000 254 entries.
307 15:53:39.441565 IMD: root @ 0x76ffec00 62 entries.
308 15:53:39.445181 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
309 15:53:39.451519 FMAP: area RW_VPD found @ f35000 (8192 bytes)
310 15:53:39.454942 External stage cache:
311 15:53:39.458334 IMD: root @ 0x7b3ff000 254 entries.
312 15:53:39.461427 IMD: root @ 0x7b3fec00 62 entries.
313 15:53:39.476818 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
314 15:53:39.483653 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
315 15:53:39.489767 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
316 15:53:39.504270 MRC: 'RECOVERY_MRC_CACHE' does not need update.
317 15:53:39.510710 cse_lite: Skip switching to RW in the recovery path
318 15:53:39.510801 8 DIMMs found
319 15:53:39.513868 SMM Memory Map
320 15:53:39.517900 SMRAM : 0x7b000000 0x800000
321 15:53:39.517980 Subregion 0: 0x7b000000 0x200000
322 15:53:39.521753 Subregion 1: 0x7b200000 0x200000
323 15:53:39.525367 Subregion 2: 0x7b400000 0x400000
324 15:53:39.528632 top_of_ram = 0x77000000
325 15:53:39.535083 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
326 15:53:39.538854 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
327 15:53:39.545133 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
328 15:53:39.548668 MTRR Range: Start=ff000000 End=0 (Size 1000000)
329 15:53:39.558081 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
330 15:53:39.565058 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
331 15:53:39.574816 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
332 15:53:39.578323 Processing 211 relocs. Offset value of 0x74c0b000
333 15:53:39.587319 BS: romstage times (exec / console): total (unknown) / 277 ms
334 15:53:39.593445
335 15:53:39.593983
336 15:53:39.603549 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
337 15:53:39.606933 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 15:53:39.616361 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 15:53:39.623117 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 15:53:39.629899 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
341 15:53:39.636484 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
342 15:53:39.683570 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
343 15:53:39.689637 Processing 5008 relocs. Offset value of 0x75d98000
344 15:53:39.696746 BS: postcar times (exec / console): total (unknown) / 59 ms
345 15:53:39.697207
346 15:53:39.697586
347 15:53:39.706512 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
348 15:53:39.706958 Normal boot
349 15:53:39.709368 FW_CONFIG value is 0x804c02
350 15:53:39.713027 PCI: 00:07.0 disabled by fw_config
351 15:53:39.716830 PCI: 00:07.1 disabled by fw_config
352 15:53:39.719937 PCI: 00:0d.2 disabled by fw_config
353 15:53:39.726930 PCI: 00:1c.7 disabled by fw_config
354 15:53:39.729693 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
355 15:53:39.736840 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
356 15:53:39.743233 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
357 15:53:39.746544 GENERIC: 0.0 disabled by fw_config
358 15:53:39.749479 GENERIC: 1.0 disabled by fw_config
359 15:53:39.752887 fw_config match found: DB_USB=USB3_ACTIVE
360 15:53:39.756262 fw_config match found: DB_USB=USB3_ACTIVE
361 15:53:39.759850 fw_config match found: DB_USB=USB3_ACTIVE
362 15:53:39.765855 fw_config match found: DB_USB=USB3_ACTIVE
363 15:53:39.769098 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
364 15:53:39.778904 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 15:53:39.785796 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 15:53:39.792391 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
367 15:53:39.798633 microcode: sig=0x806c1 pf=0x80 revision=0x86
368 15:53:39.801846 microcode: Update skipped, already up-to-date
369 15:53:39.808622 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
370 15:53:39.836824 Detected 4 core, 8 thread CPU.
371 15:53:39.840284 Setting up SMI for CPU
372 15:53:39.843621 IED base = 0x7b400000
373 15:53:39.847128 IED size = 0x00400000
374 15:53:39.847396 Will perform SMM setup.
375 15:53:39.853273 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
376 15:53:39.859712 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
377 15:53:39.866247 Processing 16 relocs. Offset value of 0x00030000
378 15:53:39.869602 Attempting to start 7 APs
379 15:53:39.873176 Waiting for 10ms after sending INIT.
380 15:53:39.888612 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
381 15:53:39.888715 done.
382 15:53:39.892088 AP: slot 6 apic_id 2.
383 15:53:39.895363 AP: slot 2 apic_id 3.
384 15:53:39.898672 Waiting for 2nd SIPI to complete...done.
385 15:53:39.901958 AP: slot 7 apic_id 5.
386 15:53:39.902047 AP: slot 3 apic_id 4.
387 15:53:39.905536 AP: slot 4 apic_id 7.
388 15:53:39.908861 AP: slot 5 apic_id 6.
389 15:53:39.915167 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
390 15:53:39.922101 Processing 13 relocs. Offset value of 0x00038000
391 15:53:39.925034 Unable to locate Global NVS
392 15:53:39.931374 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
393 15:53:39.934805 Installing permanent SMM handler to 0x7b000000
394 15:53:39.944975 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
395 15:53:39.947833 Processing 794 relocs. Offset value of 0x7b010000
396 15:53:39.957748 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
397 15:53:39.961159 Processing 13 relocs. Offset value of 0x7b008000
398 15:53:39.967875 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
399 15:53:39.974442 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
400 15:53:39.980960 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
401 15:53:39.984110 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
402 15:53:39.990601 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
403 15:53:39.997239 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
404 15:53:40.003844 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
405 15:53:40.007481 Unable to locate Global NVS
406 15:53:40.013946 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
407 15:53:40.017179 Clearing SMI status registers
408 15:53:40.020503 SMI_STS: PM1
409 15:53:40.020585 PM1_STS: PWRBTN
410 15:53:40.027045 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
411 15:53:40.030199 In relocation handler: CPU 0
412 15:53:40.037173 New SMBASE=0x7b000000 IEDBASE=0x7b400000
413 15:53:40.039945 Writing SMRR. base = 0x7b000006, mask=0xff800c00
414 15:53:40.043348 Relocation complete.
415 15:53:40.050022 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
416 15:53:40.053566 In relocation handler: CPU 1
417 15:53:40.056931 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
418 15:53:40.059876 Relocation complete.
419 15:53:40.066683 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
420 15:53:40.070031 In relocation handler: CPU 6
421 15:53:40.072918 New SMBASE=0x7affe800 IEDBASE=0x7b400000
422 15:53:40.079822 Writing SMRR. base = 0x7b000006, mask=0xff800c00
423 15:53:40.079912 Relocation complete.
424 15:53:40.089732 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
425 15:53:40.089823 In relocation handler: CPU 2
426 15:53:40.096471 New SMBASE=0x7afff800 IEDBASE=0x7b400000
427 15:53:40.096564 Relocation complete.
428 15:53:40.102787 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
429 15:53:40.106041 In relocation handler: CPU 7
430 15:53:40.112766 New SMBASE=0x7affe400 IEDBASE=0x7b400000
431 15:53:40.113269 Relocation complete.
432 15:53:40.119396 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
433 15:53:40.122794 In relocation handler: CPU 3
434 15:53:40.129197 New SMBASE=0x7afff400 IEDBASE=0x7b400000
435 15:53:40.132798 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 15:53:40.135957 Relocation complete.
437 15:53:40.142847 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
438 15:53:40.145581 In relocation handler: CPU 4
439 15:53:40.148819 New SMBASE=0x7afff000 IEDBASE=0x7b400000
440 15:53:40.152311 Relocation complete.
441 15:53:40.159027 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
442 15:53:40.162443 In relocation handler: CPU 5
443 15:53:40.165797 New SMBASE=0x7affec00 IEDBASE=0x7b400000
444 15:53:40.172266 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 15:53:40.172821 Relocation complete.
446 15:53:40.175926 Initializing CPU #0
447 15:53:40.178670 CPU: vendor Intel device 806c1
448 15:53:40.182104 CPU: family 06, model 8c, stepping 01
449 15:53:40.185360 Clearing out pending MCEs
450 15:53:40.189100 Setting up local APIC...
451 15:53:40.189556 apic_id: 0x00 done.
452 15:53:40.192849 Turbo is available but hidden
453 15:53:40.196100 Turbo is available and visible
454 15:53:40.199583 microcode: Update skipped, already up-to-date
455 15:53:40.203137 CPU #0 initialized
456 15:53:40.206227 Initializing CPU #2
457 15:53:40.206674 Initializing CPU #6
458 15:53:40.208853 Initializing CPU #1
459 15:53:40.212539 Initializing CPU #3
460 15:53:40.213087 Initializing CPU #7
461 15:53:40.215840 CPU: vendor Intel device 806c1
462 15:53:40.219410 CPU: family 06, model 8c, stepping 01
463 15:53:40.222469 CPU: vendor Intel device 806c1
464 15:53:40.225549 CPU: family 06, model 8c, stepping 01
465 15:53:40.229311 Clearing out pending MCEs
466 15:53:40.232253 Clearing out pending MCEs
467 15:53:40.235536 Setting up local APIC...
468 15:53:40.238536 CPU: vendor Intel device 806c1
469 15:53:40.242169 CPU: family 06, model 8c, stepping 01
470 15:53:40.245470 Clearing out pending MCEs
471 15:53:40.245920 Initializing CPU #5
472 15:53:40.248886 Initializing CPU #4
473 15:53:40.251845 CPU: vendor Intel device 806c1
474 15:53:40.255169 CPU: family 06, model 8c, stepping 01
475 15:53:40.258646 CPU: vendor Intel device 806c1
476 15:53:40.261950 CPU: family 06, model 8c, stepping 01
477 15:53:40.265432 Clearing out pending MCEs
478 15:53:40.268200 Clearing out pending MCEs
479 15:53:40.271381 Setting up local APIC...
480 15:53:40.271888 apic_id: 0x03 done.
481 15:53:40.274812 Setting up local APIC...
482 15:53:40.277953 CPU: vendor Intel device 806c1
483 15:53:40.281420 CPU: family 06, model 8c, stepping 01
484 15:53:40.284847 CPU: vendor Intel device 806c1
485 15:53:40.288147 CPU: family 06, model 8c, stepping 01
486 15:53:40.291121 Clearing out pending MCEs
487 15:53:40.294403 Clearing out pending MCEs
488 15:53:40.297774 Setting up local APIC...
489 15:53:40.298265 Setting up local APIC...
490 15:53:40.304843 microcode: Update skipped, already up-to-date
491 15:53:40.305293 apic_id: 0x06 done.
492 15:53:40.307500 apic_id: 0x07 done.
493 15:53:40.310865 microcode: Update skipped, already up-to-date
494 15:53:40.317754 microcode: Update skipped, already up-to-date
495 15:53:40.318257 CPU #5 initialized
496 15:53:40.320827 CPU #4 initialized
497 15:53:40.324354 Setting up local APIC...
498 15:53:40.324852 apic_id: 0x04 done.
499 15:53:40.327761 Setting up local APIC...
500 15:53:40.330981 apic_id: 0x01 done.
501 15:53:40.331427 apic_id: 0x05 done.
502 15:53:40.337203 microcode: Update skipped, already up-to-date
503 15:53:40.340996 microcode: Update skipped, already up-to-date
504 15:53:40.343871 CPU #3 initialized
505 15:53:40.344394 CPU #7 initialized
506 15:53:40.347304 CPU #2 initialized
507 15:53:40.350631 apic_id: 0x02 done.
508 15:53:40.353748 microcode: Update skipped, already up-to-date
509 15:53:40.357468 microcode: Update skipped, already up-to-date
510 15:53:40.360175 CPU #1 initialized
511 15:53:40.363577 CPU #6 initialized
512 15:53:40.367193 bsp_do_flight_plan done after 463 msecs.
513 15:53:40.370671 CPU: frequency set to 4000 MHz
514 15:53:40.371168 Enabling SMIs.
515 15:53:40.376687 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
516 15:53:40.393804 SATAXPCIE1 indicates PCIe NVMe is present
517 15:53:40.397140 Probing TPM: done!
518 15:53:40.400524 Connected to device vid:did:rid of 1ae0:0028:00
519 15:53:40.411338 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
520 15:53:40.414321 Initialized TPM device CR50 revision 0
521 15:53:40.418047 Enabling S0i3.4
522 15:53:40.424135 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
523 15:53:40.427565 Found a VBT of 8704 bytes after decompression
524 15:53:40.433742 cse_lite: CSE RO boot. HybridStorageMode disabled
525 15:53:40.440480 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
526 15:53:40.515959 FSPS returned 0
527 15:53:40.518854 Executing Phase 1 of FspMultiPhaseSiInit
528 15:53:40.528898 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
529 15:53:40.532319 port C0 DISC req: usage 1 usb3 1 usb2 5
530 15:53:40.535684 Raw Buffer output 0 00000511
531 15:53:40.539036 Raw Buffer output 1 00000000
532 15:53:40.542777 pmc_send_ipc_cmd succeeded
533 15:53:40.549233 port C1 DISC req: usage 1 usb3 2 usb2 3
534 15:53:40.549752 Raw Buffer output 0 00000321
535 15:53:40.552713 Raw Buffer output 1 00000000
536 15:53:40.557013 pmc_send_ipc_cmd succeeded
537 15:53:40.562023 Detected 4 core, 8 thread CPU.
538 15:53:40.565351 Detected 4 core, 8 thread CPU.
539 15:53:40.799381 Display FSP Version Info HOB
540 15:53:40.802693 Reference Code - CPU = a.0.4c.31
541 15:53:40.806376 uCode Version = 0.0.0.86
542 15:53:40.809746 TXT ACM version = ff.ff.ff.ffff
543 15:53:40.812641 Reference Code - ME = a.0.4c.31
544 15:53:40.816067 MEBx version = 0.0.0.0
545 15:53:40.819792 ME Firmware Version = Consumer SKU
546 15:53:40.822766 Reference Code - PCH = a.0.4c.31
547 15:53:40.826041 PCH-CRID Status = Disabled
548 15:53:40.829180 PCH-CRID Original Value = ff.ff.ff.ffff
549 15:53:40.832419 PCH-CRID New Value = ff.ff.ff.ffff
550 15:53:40.835882 OPROM - RST - RAID = ff.ff.ff.ffff
551 15:53:40.839480 PCH Hsio Version = 4.0.0.0
552 15:53:40.842259 Reference Code - SA - System Agent = a.0.4c.31
553 15:53:40.846183 Reference Code - MRC = 2.0.0.1
554 15:53:40.848950 SA - PCIe Version = a.0.4c.31
555 15:53:40.852501 SA-CRID Status = Disabled
556 15:53:40.855862 SA-CRID Original Value = 0.0.0.1
557 15:53:40.858921 SA-CRID New Value = 0.0.0.1
558 15:53:40.862012 OPROM - VBIOS = ff.ff.ff.ffff
559 15:53:40.865417 IO Manageability Engine FW Version = 11.1.4.0
560 15:53:40.868821 PHY Build Version = 0.0.0.e0
561 15:53:40.871757 Thunderbolt(TM) FW Version = 0.0.0.0
562 15:53:40.878843 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
563 15:53:40.881901 ITSS IRQ Polarities Before:
564 15:53:40.882319 IPC0: 0xffffffff
565 15:53:40.885236 IPC1: 0xffffffff
566 15:53:40.888591 IPC2: 0xffffffff
567 15:53:40.888665 IPC3: 0xffffffff
568 15:53:40.891404 ITSS IRQ Polarities After:
569 15:53:40.891501 IPC0: 0xffffffff
570 15:53:40.894507 IPC1: 0xffffffff
571 15:53:40.897998 IPC2: 0xffffffff
572 15:53:40.898081 IPC3: 0xffffffff
573 15:53:40.901082 Found PCIe Root Port #9 at PCI: 00:1d.0.
574 15:53:40.913996 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
575 15:53:40.927720 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
576 15:53:40.937414 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
577 15:53:40.943754 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
578 15:53:40.947059 Enumerating buses...
579 15:53:40.950594 Show all devs... Before device enumeration.
580 15:53:40.953679 Root Device: enabled 1
581 15:53:40.957044 DOMAIN: 0000: enabled 1
582 15:53:40.960328 CPU_CLUSTER: 0: enabled 1
583 15:53:40.960413 PCI: 00:00.0: enabled 1
584 15:53:40.963885 PCI: 00:02.0: enabled 1
585 15:53:40.967092 PCI: 00:04.0: enabled 1
586 15:53:40.967167 PCI: 00:05.0: enabled 1
587 15:53:40.970532 PCI: 00:06.0: enabled 0
588 15:53:40.973319 PCI: 00:07.0: enabled 0
589 15:53:40.976591 PCI: 00:07.1: enabled 0
590 15:53:40.976667 PCI: 00:07.2: enabled 0
591 15:53:40.980172 PCI: 00:07.3: enabled 0
592 15:53:40.983600 PCI: 00:08.0: enabled 1
593 15:53:40.986786 PCI: 00:09.0: enabled 0
594 15:53:40.986867 PCI: 00:0a.0: enabled 0
595 15:53:40.990190 PCI: 00:0d.0: enabled 1
596 15:53:40.993610 PCI: 00:0d.1: enabled 0
597 15:53:40.996635 PCI: 00:0d.2: enabled 0
598 15:53:40.996717 PCI: 00:0d.3: enabled 0
599 15:53:40.999609 PCI: 00:0e.0: enabled 0
600 15:53:41.003523 PCI: 00:10.2: enabled 1
601 15:53:41.006079 PCI: 00:10.6: enabled 0
602 15:53:41.006159 PCI: 00:10.7: enabled 0
603 15:53:41.009421 PCI: 00:12.0: enabled 0
604 15:53:41.013413 PCI: 00:12.6: enabled 0
605 15:53:41.016170 PCI: 00:13.0: enabled 0
606 15:53:41.016257 PCI: 00:14.0: enabled 1
607 15:53:41.019455 PCI: 00:14.1: enabled 0
608 15:53:41.023312 PCI: 00:14.2: enabled 1
609 15:53:41.025900 PCI: 00:14.3: enabled 1
610 15:53:41.025977 PCI: 00:15.0: enabled 1
611 15:53:41.029244 PCI: 00:15.1: enabled 1
612 15:53:41.032968 PCI: 00:15.2: enabled 1
613 15:53:41.036223 PCI: 00:15.3: enabled 1
614 15:53:41.036309 PCI: 00:16.0: enabled 1
615 15:53:41.039292 PCI: 00:16.1: enabled 0
616 15:53:41.042520 PCI: 00:16.2: enabled 0
617 15:53:41.045790 PCI: 00:16.3: enabled 0
618 15:53:41.045877 PCI: 00:16.4: enabled 0
619 15:53:41.049428 PCI: 00:16.5: enabled 0
620 15:53:41.052833 PCI: 00:17.0: enabled 1
621 15:53:41.052963 PCI: 00:19.0: enabled 0
622 15:53:41.056188 PCI: 00:19.1: enabled 1
623 15:53:41.058859 PCI: 00:19.2: enabled 0
624 15:53:41.062055 PCI: 00:1c.0: enabled 1
625 15:53:41.062141 PCI: 00:1c.1: enabled 0
626 15:53:41.065555 PCI: 00:1c.2: enabled 0
627 15:53:41.069149 PCI: 00:1c.3: enabled 0
628 15:53:41.072482 PCI: 00:1c.4: enabled 0
629 15:53:41.072569 PCI: 00:1c.5: enabled 0
630 15:53:41.075471 PCI: 00:1c.6: enabled 1
631 15:53:41.078766 PCI: 00:1c.7: enabled 0
632 15:53:41.082049 PCI: 00:1d.0: enabled 1
633 15:53:41.082138 PCI: 00:1d.1: enabled 0
634 15:53:41.085394 PCI: 00:1d.2: enabled 1
635 15:53:41.089080 PCI: 00:1d.3: enabled 0
636 15:53:41.092395 PCI: 00:1e.0: enabled 1
637 15:53:41.092481 PCI: 00:1e.1: enabled 0
638 15:53:41.095059 PCI: 00:1e.2: enabled 1
639 15:53:41.098438 PCI: 00:1e.3: enabled 1
640 15:53:41.101667 PCI: 00:1f.0: enabled 1
641 15:53:41.101785 PCI: 00:1f.1: enabled 0
642 15:53:41.105014 PCI: 00:1f.2: enabled 1
643 15:53:41.109010 PCI: 00:1f.3: enabled 1
644 15:53:41.111526 PCI: 00:1f.4: enabled 0
645 15:53:41.111626 PCI: 00:1f.5: enabled 1
646 15:53:41.115165 PCI: 00:1f.6: enabled 0
647 15:53:41.118056 PCI: 00:1f.7: enabled 0
648 15:53:41.118152 APIC: 00: enabled 1
649 15:53:41.121412 GENERIC: 0.0: enabled 1
650 15:53:41.124955 GENERIC: 0.0: enabled 1
651 15:53:41.128094 GENERIC: 1.0: enabled 1
652 15:53:41.128181 GENERIC: 0.0: enabled 1
653 15:53:41.131200 GENERIC: 1.0: enabled 1
654 15:53:41.134623 USB0 port 0: enabled 1
655 15:53:41.138108 GENERIC: 0.0: enabled 1
656 15:53:41.138194 USB0 port 0: enabled 1
657 15:53:41.141493 GENERIC: 0.0: enabled 1
658 15:53:41.144426 I2C: 00:1a: enabled 1
659 15:53:41.144512 I2C: 00:31: enabled 1
660 15:53:41.147912 I2C: 00:32: enabled 1
661 15:53:41.151086 I2C: 00:10: enabled 1
662 15:53:41.151189 I2C: 00:15: enabled 1
663 15:53:41.154416 GENERIC: 0.0: enabled 0
664 15:53:41.157383 GENERIC: 1.0: enabled 0
665 15:53:41.161145 GENERIC: 0.0: enabled 1
666 15:53:41.161231 SPI: 00: enabled 1
667 15:53:41.164085 SPI: 00: enabled 1
668 15:53:41.167273 PNP: 0c09.0: enabled 1
669 15:53:41.167378 GENERIC: 0.0: enabled 1
670 15:53:41.170600 USB3 port 0: enabled 1
671 15:53:41.174588 USB3 port 1: enabled 1
672 15:53:41.174675 USB3 port 2: enabled 0
673 15:53:41.177236 USB3 port 3: enabled 0
674 15:53:41.180803 USB2 port 0: enabled 0
675 15:53:41.184600 USB2 port 1: enabled 1
676 15:53:41.184686 USB2 port 2: enabled 1
677 15:53:41.187314 USB2 port 3: enabled 0
678 15:53:41.190767 USB2 port 4: enabled 1
679 15:53:41.190854 USB2 port 5: enabled 0
680 15:53:41.193863 USB2 port 6: enabled 0
681 15:53:41.197343 USB2 port 7: enabled 0
682 15:53:41.200975 USB2 port 8: enabled 0
683 15:53:41.201061 USB2 port 9: enabled 0
684 15:53:41.204094 USB3 port 0: enabled 0
685 15:53:41.207413 USB3 port 1: enabled 1
686 15:53:41.207499 USB3 port 2: enabled 0
687 15:53:41.210292 USB3 port 3: enabled 0
688 15:53:41.213626 GENERIC: 0.0: enabled 1
689 15:53:41.217120 GENERIC: 1.0: enabled 1
690 15:53:41.217207 APIC: 01: enabled 1
691 15:53:41.219948 APIC: 03: enabled 1
692 15:53:41.223330 APIC: 04: enabled 1
693 15:53:41.223417 APIC: 07: enabled 1
694 15:53:41.226666 APIC: 06: enabled 1
695 15:53:41.226752 APIC: 02: enabled 1
696 15:53:41.230146 APIC: 05: enabled 1
697 15:53:41.233403 Compare with tree...
698 15:53:41.233491 Root Device: enabled 1
699 15:53:41.236266 DOMAIN: 0000: enabled 1
700 15:53:41.239996 PCI: 00:00.0: enabled 1
701 15:53:41.243218 PCI: 00:02.0: enabled 1
702 15:53:41.246187 PCI: 00:04.0: enabled 1
703 15:53:41.246305 GENERIC: 0.0: enabled 1
704 15:53:41.249616 PCI: 00:05.0: enabled 1
705 15:53:41.252861 PCI: 00:06.0: enabled 0
706 15:53:41.256298 PCI: 00:07.0: enabled 0
707 15:53:41.259643 GENERIC: 0.0: enabled 1
708 15:53:41.259773 PCI: 00:07.1: enabled 0
709 15:53:41.263019 GENERIC: 1.0: enabled 1
710 15:53:41.266173 PCI: 00:07.2: enabled 0
711 15:53:41.269737 GENERIC: 0.0: enabled 1
712 15:53:41.272504 PCI: 00:07.3: enabled 0
713 15:53:41.276118 GENERIC: 1.0: enabled 1
714 15:53:41.276205 PCI: 00:08.0: enabled 1
715 15:53:41.279177 PCI: 00:09.0: enabled 0
716 15:53:41.282600 PCI: 00:0a.0: enabled 0
717 15:53:41.285943 PCI: 00:0d.0: enabled 1
718 15:53:41.289231 USB0 port 0: enabled 1
719 15:53:41.289318 USB3 port 0: enabled 1
720 15:53:41.292453 USB3 port 1: enabled 1
721 15:53:41.295484 USB3 port 2: enabled 0
722 15:53:41.299487 USB3 port 3: enabled 0
723 15:53:41.302119 PCI: 00:0d.1: enabled 0
724 15:53:41.305619 PCI: 00:0d.2: enabled 0
725 15:53:41.305707 GENERIC: 0.0: enabled 1
726 15:53:41.308918 PCI: 00:0d.3: enabled 0
727 15:53:41.312305 PCI: 00:0e.0: enabled 0
728 15:53:41.315204 PCI: 00:10.2: enabled 1
729 15:53:41.318651 PCI: 00:10.6: enabled 0
730 15:53:41.318738 PCI: 00:10.7: enabled 0
731 15:53:41.321978 PCI: 00:12.0: enabled 0
732 15:53:41.325541 PCI: 00:12.6: enabled 0
733 15:53:41.328376 PCI: 00:13.0: enabled 0
734 15:53:41.332108 PCI: 00:14.0: enabled 1
735 15:53:41.332196 USB0 port 0: enabled 1
736 15:53:41.335292 USB2 port 0: enabled 0
737 15:53:41.338320 USB2 port 1: enabled 1
738 15:53:41.341752 USB2 port 2: enabled 1
739 15:53:41.344986 USB2 port 3: enabled 0
740 15:53:41.348504 USB2 port 4: enabled 1
741 15:53:41.348591 USB2 port 5: enabled 0
742 15:53:41.351841 USB2 port 6: enabled 0
743 15:53:41.355165 USB2 port 7: enabled 0
744 15:53:41.358110 USB2 port 8: enabled 0
745 15:53:41.361796 USB2 port 9: enabled 0
746 15:53:41.364930 USB3 port 0: enabled 0
747 15:53:41.365017 USB3 port 1: enabled 1
748 15:53:41.368284 USB3 port 2: enabled 0
749 15:53:41.371550 USB3 port 3: enabled 0
750 15:53:41.374548 PCI: 00:14.1: enabled 0
751 15:53:41.378025 PCI: 00:14.2: enabled 1
752 15:53:41.378113 PCI: 00:14.3: enabled 1
753 15:53:41.381384 GENERIC: 0.0: enabled 1
754 15:53:41.384424 PCI: 00:15.0: enabled 1
755 15:53:41.387952 I2C: 00:1a: enabled 1
756 15:53:41.391593 I2C: 00:31: enabled 1
757 15:53:41.391742 I2C: 00:32: enabled 1
758 15:53:41.394205 PCI: 00:15.1: enabled 1
759 15:53:41.397497 I2C: 00:10: enabled 1
760 15:53:41.400919 PCI: 00:15.2: enabled 1
761 15:53:41.404410 PCI: 00:15.3: enabled 1
762 15:53:41.404498 PCI: 00:16.0: enabled 1
763 15:53:41.407840 PCI: 00:16.1: enabled 0
764 15:53:41.411063 PCI: 00:16.2: enabled 0
765 15:53:41.414393 PCI: 00:16.3: enabled 0
766 15:53:41.417613 PCI: 00:16.4: enabled 0
767 15:53:41.417700 PCI: 00:16.5: enabled 0
768 15:53:41.420554 PCI: 00:17.0: enabled 1
769 15:53:41.424471 PCI: 00:19.0: enabled 0
770 15:53:41.427090 PCI: 00:19.1: enabled 1
771 15:53:41.431000 I2C: 00:15: enabled 1
772 15:53:41.431088 PCI: 00:19.2: enabled 0
773 15:53:41.433944 PCI: 00:1d.0: enabled 1
774 15:53:41.483882 GENERIC: 0.0: enabled 1
775 15:53:41.483977 PCI: 00:1e.0: enabled 1
776 15:53:41.484618 PCI: 00:1e.1: enabled 0
777 15:53:41.484706 PCI: 00:1e.2: enabled 1
778 15:53:41.484775 SPI: 00: enabled 1
779 15:53:41.485026 PCI: 00:1e.3: enabled 1
780 15:53:41.485094 SPI: 00: enabled 1
781 15:53:41.485724 PCI: 00:1f.0: enabled 1
782 15:53:41.485811 PNP: 0c09.0: enabled 1
783 15:53:41.485881 PCI: 00:1f.1: enabled 0
784 15:53:41.486129 PCI: 00:1f.2: enabled 1
785 15:53:41.486197 GENERIC: 0.0: enabled 1
786 15:53:41.486856 GENERIC: 0.0: enabled 1
787 15:53:41.486943 GENERIC: 1.0: enabled 1
788 15:53:41.487198 PCI: 00:1f.3: enabled 1
789 15:53:41.487271 PCI: 00:1f.4: enabled 0
790 15:53:41.487336 PCI: 00:1f.5: enabled 1
791 15:53:41.487398 PCI: 00:1f.6: enabled 0
792 15:53:41.487457 PCI: 00:1f.7: enabled 0
793 15:53:41.536074 CPU_CLUSTER: 0: enabled 1
794 15:53:41.536189 APIC: 00: enabled 1
795 15:53:41.536260 APIC: 01: enabled 1
796 15:53:41.536517 APIC: 03: enabled 1
797 15:53:41.536589 APIC: 04: enabled 1
798 15:53:41.536890 APIC: 07: enabled 1
799 15:53:41.536959 APIC: 06: enabled 1
800 15:53:41.537021 APIC: 02: enabled 1
801 15:53:41.537502 APIC: 05: enabled 1
802 15:53:41.537613 Root Device scanning...
803 15:53:41.538164 scan_static_bus for Root Device
804 15:53:41.538284 DOMAIN: 0000 enabled
805 15:53:41.538353 CPU_CLUSTER: 0 enabled
806 15:53:41.538608 DOMAIN: 0000 scanning...
807 15:53:41.538680 PCI: pci_scan_bus for bus 00
808 15:53:41.538742 PCI: 00:00.0 [8086/0000] ops
809 15:53:41.538804 PCI: 00:00.0 [8086/9a12] enabled
810 15:53:41.538864 PCI: 00:02.0 [8086/0000] bus ops
811 15:53:41.538922 PCI: 00:02.0 [8086/9a40] enabled
812 15:53:41.575566 PCI: 00:04.0 [8086/0000] bus ops
813 15:53:41.575728 PCI: 00:04.0 [8086/9a03] enabled
814 15:53:41.576076 PCI: 00:05.0 [8086/9a19] enabled
815 15:53:41.576208 PCI: 00:07.0 [0000/0000] hidden
816 15:53:41.577026 PCI: 00:08.0 [8086/9a11] enabled
817 15:53:41.577189 PCI: 00:0a.0 [8086/9a0d] disabled
818 15:53:41.577730 PCI: 00:0d.0 [8086/0000] bus ops
819 15:53:41.577914 PCI: 00:0d.0 [8086/9a13] enabled
820 15:53:41.578285 PCI: 00:14.0 [8086/0000] bus ops
821 15:53:41.578419 PCI: 00:14.0 [8086/a0ed] enabled
822 15:53:41.578541 PCI: 00:14.2 [8086/a0ef] enabled
823 15:53:41.581267 PCI: 00:14.3 [8086/0000] bus ops
824 15:53:41.581451 PCI: 00:14.3 [8086/a0f0] enabled
825 15:53:41.584723 PCI: 00:15.0 [8086/0000] bus ops
826 15:53:41.584908 PCI: 00:15.0 [8086/a0e8] enabled
827 15:53:41.587583 PCI: 00:15.1 [8086/0000] bus ops
828 15:53:41.591047 PCI: 00:15.1 [8086/a0e9] enabled
829 15:53:41.594436 PCI: 00:15.2 [8086/0000] bus ops
830 15:53:41.597572 PCI: 00:15.2 [8086/a0ea] enabled
831 15:53:41.601561 PCI: 00:15.3 [8086/0000] bus ops
832 15:53:41.604285 PCI: 00:15.3 [8086/a0eb] enabled
833 15:53:41.607241 PCI: 00:16.0 [8086/0000] ops
834 15:53:41.610562 PCI: 00:16.0 [8086/a0e0] enabled
835 15:53:41.617358 PCI: Static device PCI: 00:17.0 not found, disabling it.
836 15:53:41.620400 PCI: 00:19.0 [8086/0000] bus ops
837 15:53:41.623633 PCI: 00:19.0 [8086/a0c5] disabled
838 15:53:41.627204 PCI: 00:19.1 [8086/0000] bus ops
839 15:53:41.630649 PCI: 00:19.1 [8086/a0c6] enabled
840 15:53:41.633879 PCI: 00:1d.0 [8086/0000] bus ops
841 15:53:41.637169 PCI: 00:1d.0 [8086/a0b0] enabled
842 15:53:41.640567 PCI: 00:1e.0 [8086/0000] ops
843 15:53:41.643397 PCI: 00:1e.0 [8086/a0a8] enabled
844 15:53:41.646775 PCI: 00:1e.2 [8086/0000] bus ops
845 15:53:41.650182 PCI: 00:1e.2 [8086/a0aa] enabled
846 15:53:41.653560 PCI: 00:1e.3 [8086/0000] bus ops
847 15:53:41.656427 PCI: 00:1e.3 [8086/a0ab] enabled
848 15:53:41.659851 PCI: 00:1f.0 [8086/0000] bus ops
849 15:53:41.663626 PCI: 00:1f.0 [8086/a087] enabled
850 15:53:41.666775 RTC Init
851 15:53:41.670065 Set power on after power failure.
852 15:53:41.670549 Disabling Deep S3
853 15:53:41.673041 Disabling Deep S3
854 15:53:41.673518 Disabling Deep S4
855 15:53:41.676590 Disabling Deep S4
856 15:53:41.679835 Disabling Deep S5
857 15:53:41.680302 Disabling Deep S5
858 15:53:41.682833 PCI: 00:1f.2 [0000/0000] hidden
859 15:53:41.686078 PCI: 00:1f.3 [8086/0000] bus ops
860 15:53:41.689486 PCI: 00:1f.3 [8086/a0c8] enabled
861 15:53:41.692963 PCI: 00:1f.5 [8086/0000] bus ops
862 15:53:41.696460 PCI: 00:1f.5 [8086/a0a4] enabled
863 15:53:41.699343 PCI: Leftover static devices:
864 15:53:41.702747 PCI: 00:10.2
865 15:53:41.703191 PCI: 00:10.6
866 15:53:41.703543 PCI: 00:10.7
867 15:53:41.705993 PCI: 00:06.0
868 15:53:41.706440 PCI: 00:07.1
869 15:53:41.709387 PCI: 00:07.2
870 15:53:41.709836 PCI: 00:07.3
871 15:53:41.710192 PCI: 00:09.0
872 15:53:41.712675 PCI: 00:0d.1
873 15:53:41.713124 PCI: 00:0d.2
874 15:53:41.716023 PCI: 00:0d.3
875 15:53:41.716473 PCI: 00:0e.0
876 15:53:41.719116 PCI: 00:12.0
877 15:53:41.719566 PCI: 00:12.6
878 15:53:41.719999 PCI: 00:13.0
879 15:53:41.722730 PCI: 00:14.1
880 15:53:41.723219 PCI: 00:16.1
881 15:53:41.725885 PCI: 00:16.2
882 15:53:41.726332 PCI: 00:16.3
883 15:53:41.726683 PCI: 00:16.4
884 15:53:41.729215 PCI: 00:16.5
885 15:53:41.729662 PCI: 00:17.0
886 15:53:41.732125 PCI: 00:19.2
887 15:53:41.732571 PCI: 00:1e.1
888 15:53:41.735363 PCI: 00:1f.1
889 15:53:41.735853 PCI: 00:1f.4
890 15:53:41.736248 PCI: 00:1f.6
891 15:53:41.738710 PCI: 00:1f.7
892 15:53:41.742564 PCI: Check your devicetree.cb.
893 15:53:41.745351 PCI: 00:02.0 scanning...
894 15:53:41.748543 scan_generic_bus for PCI: 00:02.0
895 15:53:41.752288 scan_generic_bus for PCI: 00:02.0 done
896 15:53:41.755025 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
897 15:53:41.758635 PCI: 00:04.0 scanning...
898 15:53:41.761831 scan_generic_bus for PCI: 00:04.0
899 15:53:41.765231 GENERIC: 0.0 enabled
900 15:53:41.771405 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
901 15:53:41.774869 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
902 15:53:41.777971 PCI: 00:0d.0 scanning...
903 15:53:41.782064 scan_static_bus for PCI: 00:0d.0
904 15:53:41.785136 USB0 port 0 enabled
905 15:53:41.785674 USB0 port 0 scanning...
906 15:53:41.787870 scan_static_bus for USB0 port 0
907 15:53:41.791112 USB3 port 0 enabled
908 15:53:41.794227 USB3 port 1 enabled
909 15:53:41.794317 USB3 port 2 disabled
910 15:53:41.797847 USB3 port 3 disabled
911 15:53:41.800907 USB3 port 0 scanning...
912 15:53:41.804565 scan_static_bus for USB3 port 0
913 15:53:41.807355 scan_static_bus for USB3 port 0 done
914 15:53:41.810859 scan_bus: bus USB3 port 0 finished in 6 msecs
915 15:53:41.814565 USB3 port 1 scanning...
916 15:53:41.817523 scan_static_bus for USB3 port 1
917 15:53:41.820886 scan_static_bus for USB3 port 1 done
918 15:53:41.827596 scan_bus: bus USB3 port 1 finished in 6 msecs
919 15:53:41.830531 scan_static_bus for USB0 port 0 done
920 15:53:41.833976 scan_bus: bus USB0 port 0 finished in 43 msecs
921 15:53:41.836976 scan_static_bus for PCI: 00:0d.0 done
922 15:53:41.843884 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
923 15:53:41.847115 PCI: 00:14.0 scanning...
924 15:53:41.850605 scan_static_bus for PCI: 00:14.0
925 15:53:41.850739 USB0 port 0 enabled
926 15:53:41.854036 USB0 port 0 scanning...
927 15:53:41.857379 scan_static_bus for USB0 port 0
928 15:53:41.860474 USB2 port 0 disabled
929 15:53:41.860641 USB2 port 1 enabled
930 15:53:41.863533 USB2 port 2 enabled
931 15:53:41.866598 USB2 port 3 disabled
932 15:53:41.866816 USB2 port 4 enabled
933 15:53:41.870066 USB2 port 5 disabled
934 15:53:41.873699 USB2 port 6 disabled
935 15:53:41.874055 USB2 port 7 disabled
936 15:53:41.876420 USB2 port 8 disabled
937 15:53:41.879811 USB2 port 9 disabled
938 15:53:41.880138 USB3 port 0 disabled
939 15:53:41.882932 USB3 port 1 enabled
940 15:53:41.886926 USB3 port 2 disabled
941 15:53:41.887381 USB3 port 3 disabled
942 15:53:41.889981 USB2 port 1 scanning...
943 15:53:41.893252 scan_static_bus for USB2 port 1
944 15:53:41.896574 scan_static_bus for USB2 port 1 done
945 15:53:41.902867 scan_bus: bus USB2 port 1 finished in 6 msecs
946 15:53:41.903322 USB2 port 2 scanning...
947 15:53:41.906382 scan_static_bus for USB2 port 2
948 15:53:41.909541 scan_static_bus for USB2 port 2 done
949 15:53:41.915835 scan_bus: bus USB2 port 2 finished in 6 msecs
950 15:53:41.919398 USB2 port 4 scanning...
951 15:53:41.922816 scan_static_bus for USB2 port 4
952 15:53:41.925678 scan_static_bus for USB2 port 4 done
953 15:53:41.929177 scan_bus: bus USB2 port 4 finished in 6 msecs
954 15:53:41.932208 USB3 port 1 scanning...
955 15:53:41.935636 scan_static_bus for USB3 port 1
956 15:53:41.938992 scan_static_bus for USB3 port 1 done
957 15:53:41.945513 scan_bus: bus USB3 port 1 finished in 6 msecs
958 15:53:41.948740 scan_static_bus for USB0 port 0 done
959 15:53:41.952067 scan_bus: bus USB0 port 0 finished in 93 msecs
960 15:53:41.955507 scan_static_bus for PCI: 00:14.0 done
961 15:53:41.961549 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
962 15:53:41.964752 PCI: 00:14.3 scanning...
963 15:53:41.968552 scan_static_bus for PCI: 00:14.3
964 15:53:41.969017 GENERIC: 0.0 enabled
965 15:53:41.971343 scan_static_bus for PCI: 00:14.3 done
966 15:53:41.977797 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
967 15:53:41.981434 PCI: 00:15.0 scanning...
968 15:53:41.984760 scan_static_bus for PCI: 00:15.0
969 15:53:41.985272 I2C: 00:1a enabled
970 15:53:41.987867 I2C: 00:31 enabled
971 15:53:41.991430 I2C: 00:32 enabled
972 15:53:41.994538 scan_static_bus for PCI: 00:15.0 done
973 15:53:41.997627 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
974 15:53:42.001312 PCI: 00:15.1 scanning...
975 15:53:42.004046 scan_static_bus for PCI: 00:15.1
976 15:53:42.007583 I2C: 00:10 enabled
977 15:53:42.010781 scan_static_bus for PCI: 00:15.1 done
978 15:53:42.014209 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
979 15:53:42.017554 PCI: 00:15.2 scanning...
980 15:53:42.021015 scan_static_bus for PCI: 00:15.2
981 15:53:42.024337 scan_static_bus for PCI: 00:15.2 done
982 15:53:42.031090 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
983 15:53:42.031599 PCI: 00:15.3 scanning...
984 15:53:42.034366 scan_static_bus for PCI: 00:15.3
985 15:53:42.040716 scan_static_bus for PCI: 00:15.3 done
986 15:53:42.044298 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
987 15:53:42.047577 PCI: 00:19.1 scanning...
988 15:53:42.051049 scan_static_bus for PCI: 00:19.1
989 15:53:42.051556 I2C: 00:15 enabled
990 15:53:42.057453 scan_static_bus for PCI: 00:19.1 done
991 15:53:42.060487 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
992 15:53:42.063932 PCI: 00:1d.0 scanning...
993 15:53:42.067179 do_pci_scan_bridge for PCI: 00:1d.0
994 15:53:42.070386 PCI: pci_scan_bus for bus 01
995 15:53:42.073888 PCI: 01:00.0 [1c5c/174a] enabled
996 15:53:42.077105 GENERIC: 0.0 enabled
997 15:53:42.080769 Enabling Common Clock Configuration
998 15:53:42.083714 L1 Sub-State supported from root port 29
999 15:53:42.086977 L1 Sub-State Support = 0xf
1000 15:53:42.090619 CommonModeRestoreTime = 0x28
1001 15:53:42.093961 Power On Value = 0x16, Power On Scale = 0x0
1002 15:53:42.096952 ASPM: Enabled L1
1003 15:53:42.100242 PCIe: Max_Payload_Size adjusted to 128
1004 15:53:42.103176 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1005 15:53:42.106629 PCI: 00:1e.2 scanning...
1006 15:53:42.109856 scan_generic_bus for PCI: 00:1e.2
1007 15:53:42.113161 SPI: 00 enabled
1008 15:53:42.116571 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1009 15:53:42.123263 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1010 15:53:42.126847 PCI: 00:1e.3 scanning...
1011 15:53:42.130310 scan_generic_bus for PCI: 00:1e.3
1012 15:53:42.130778 SPI: 00 enabled
1013 15:53:42.136355 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1014 15:53:42.143293 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1015 15:53:42.143774 PCI: 00:1f.0 scanning...
1016 15:53:42.145726 scan_static_bus for PCI: 00:1f.0
1017 15:53:42.149221 PNP: 0c09.0 enabled
1018 15:53:42.152585 PNP: 0c09.0 scanning...
1019 15:53:42.156134 scan_static_bus for PNP: 0c09.0
1020 15:53:42.159308 scan_static_bus for PNP: 0c09.0 done
1021 15:53:42.162637 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1022 15:53:42.169410 scan_static_bus for PCI: 00:1f.0 done
1023 15:53:42.172511 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1024 15:53:42.175368 PCI: 00:1f.2 scanning...
1025 15:53:42.178868 scan_static_bus for PCI: 00:1f.2
1026 15:53:42.182548 GENERIC: 0.0 enabled
1027 15:53:42.183058 GENERIC: 0.0 scanning...
1028 15:53:42.185279 scan_static_bus for GENERIC: 0.0
1029 15:53:42.188900 GENERIC: 0.0 enabled
1030 15:53:42.191535 GENERIC: 1.0 enabled
1031 15:53:42.195621 scan_static_bus for GENERIC: 0.0 done
1032 15:53:42.198066 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1033 15:53:42.201441 scan_static_bus for PCI: 00:1f.2 done
1034 15:53:42.208323 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1035 15:53:42.211397 PCI: 00:1f.3 scanning...
1036 15:53:42.214943 scan_static_bus for PCI: 00:1f.3
1037 15:53:42.217960 scan_static_bus for PCI: 00:1f.3 done
1038 15:53:42.221253 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1039 15:53:42.224672 PCI: 00:1f.5 scanning...
1040 15:53:42.228307 scan_generic_bus for PCI: 00:1f.5
1041 15:53:42.230874 scan_generic_bus for PCI: 00:1f.5 done
1042 15:53:42.237455 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1043 15:53:42.240911 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1044 15:53:42.247756 scan_static_bus for Root Device done
1045 15:53:42.250693 scan_bus: bus Root Device finished in 737 msecs
1046 15:53:42.250921 done
1047 15:53:42.257430 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1048 15:53:42.260967 Chrome EC: UHEPI supported
1049 15:53:42.267227 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1050 15:53:42.274058 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1051 15:53:42.277431 SPI flash protection: WPSW=0 SRP0=0
1052 15:53:42.280765 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1053 15:53:42.287150 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1054 15:53:42.290595 found VGA at PCI: 00:02.0
1055 15:53:42.293866 Setting up VGA for PCI: 00:02.0
1056 15:53:42.296984 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1057 15:53:42.303749 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1058 15:53:42.307116 Allocating resources...
1059 15:53:42.307665 Reading resources...
1060 15:53:42.313934 Root Device read_resources bus 0 link: 0
1061 15:53:42.316769 DOMAIN: 0000 read_resources bus 0 link: 0
1062 15:53:42.323263 PCI: 00:04.0 read_resources bus 1 link: 0
1063 15:53:42.326644 PCI: 00:04.0 read_resources bus 1 link: 0 done
1064 15:53:42.333214 PCI: 00:0d.0 read_resources bus 0 link: 0
1065 15:53:42.336722 USB0 port 0 read_resources bus 0 link: 0
1066 15:53:42.342749 USB0 port 0 read_resources bus 0 link: 0 done
1067 15:53:42.346009 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1068 15:53:42.349703 PCI: 00:14.0 read_resources bus 0 link: 0
1069 15:53:42.356231 USB0 port 0 read_resources bus 0 link: 0
1070 15:53:42.360063 USB0 port 0 read_resources bus 0 link: 0 done
1071 15:53:42.366709 PCI: 00:14.0 read_resources bus 0 link: 0 done
1072 15:53:42.369459 PCI: 00:14.3 read_resources bus 0 link: 0
1073 15:53:42.376170 PCI: 00:14.3 read_resources bus 0 link: 0 done
1074 15:53:42.379612 PCI: 00:15.0 read_resources bus 0 link: 0
1075 15:53:42.386981 PCI: 00:15.0 read_resources bus 0 link: 0 done
1076 15:53:42.390116 PCI: 00:15.1 read_resources bus 0 link: 0
1077 15:53:42.396506 PCI: 00:15.1 read_resources bus 0 link: 0 done
1078 15:53:42.403410 PCI: 00:19.1 read_resources bus 0 link: 0
1079 15:53:42.405862 PCI: 00:19.1 read_resources bus 0 link: 0 done
1080 15:53:42.412724 PCI: 00:1d.0 read_resources bus 1 link: 0
1081 15:53:42.416313 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1082 15:53:42.422407 PCI: 00:1e.2 read_resources bus 2 link: 0
1083 15:53:42.425974 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1084 15:53:42.432515 PCI: 00:1e.3 read_resources bus 3 link: 0
1085 15:53:42.435879 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1086 15:53:42.442421 PCI: 00:1f.0 read_resources bus 0 link: 0
1087 15:53:42.445846 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1088 15:53:42.452090 PCI: 00:1f.2 read_resources bus 0 link: 0
1089 15:53:42.455284 GENERIC: 0.0 read_resources bus 0 link: 0
1090 15:53:42.462304 GENERIC: 0.0 read_resources bus 0 link: 0 done
1091 15:53:42.465074 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1092 15:53:42.471813 DOMAIN: 0000 read_resources bus 0 link: 0 done
1093 15:53:42.475161 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1094 15:53:42.482061 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1095 15:53:42.485050 Root Device read_resources bus 0 link: 0 done
1096 15:53:42.488444 Done reading resources.
1097 15:53:42.494742 Show resources in subtree (Root Device)...After reading.
1098 15:53:42.498114 Root Device child on link 0 DOMAIN: 0000
1099 15:53:42.501246 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1100 15:53:42.511228 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1101 15:53:42.520823 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1102 15:53:42.524188 PCI: 00:00.0
1103 15:53:42.533926 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1104 15:53:42.540419 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1105 15:53:42.550320 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1106 15:53:42.560632 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1107 15:53:42.570142 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1108 15:53:42.580557 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1109 15:53:42.590043 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1110 15:53:42.599556 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1111 15:53:42.606985 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1112 15:53:42.616181 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1113 15:53:42.626016 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1114 15:53:42.635824 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1115 15:53:42.646029 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1116 15:53:42.652166 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1117 15:53:42.662125 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1118 15:53:42.671729 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1119 15:53:42.681582 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1120 15:53:42.691800 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1121 15:53:42.701337 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1122 15:53:42.711454 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1123 15:53:42.711578 PCI: 00:02.0
1124 15:53:42.721217 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 15:53:42.734655 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 15:53:42.741147 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 15:53:42.748060 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1128 15:53:42.757479 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1129 15:53:42.757946 GENERIC: 0.0
1130 15:53:42.760986 PCI: 00:05.0
1131 15:53:42.770894 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 15:53:42.774253 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1133 15:53:42.777512 GENERIC: 0.0
1134 15:53:42.778039 PCI: 00:08.0
1135 15:53:42.787580 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 15:53:42.790542 PCI: 00:0a.0
1137 15:53:42.793604 PCI: 00:0d.0 child on link 0 USB0 port 0
1138 15:53:42.803282 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1139 15:53:42.807085 USB0 port 0 child on link 0 USB3 port 0
1140 15:53:42.810191 USB3 port 0
1141 15:53:42.810280 USB3 port 1
1142 15:53:42.814218 USB3 port 2
1143 15:53:42.817139 USB3 port 3
1144 15:53:42.819933 PCI: 00:14.0 child on link 0 USB0 port 0
1145 15:53:42.830194 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1146 15:53:42.833498 USB0 port 0 child on link 0 USB2 port 0
1147 15:53:42.836272 USB2 port 0
1148 15:53:42.836359 USB2 port 1
1149 15:53:42.839515 USB2 port 2
1150 15:53:42.839604 USB2 port 3
1151 15:53:42.842848 USB2 port 4
1152 15:53:42.846785 USB2 port 5
1153 15:53:42.846873 USB2 port 6
1154 15:53:42.849762 USB2 port 7
1155 15:53:42.849850 USB2 port 8
1156 15:53:42.853173 USB2 port 9
1157 15:53:42.853260 USB3 port 0
1158 15:53:42.856181 USB3 port 1
1159 15:53:42.856269 USB3 port 2
1160 15:53:42.859367 USB3 port 3
1161 15:53:42.859455 PCI: 00:14.2
1162 15:53:42.869713 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 15:53:42.878934 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 15:53:42.885744 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1165 15:53:42.895852 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1166 15:53:42.895952 GENERIC: 0.0
1167 15:53:42.902367 PCI: 00:15.0 child on link 0 I2C: 00:1a
1168 15:53:42.912246 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 15:53:42.912337 I2C: 00:1a
1170 15:53:42.915004 I2C: 00:31
1171 15:53:42.915094 I2C: 00:32
1172 15:53:42.918730 PCI: 00:15.1 child on link 0 I2C: 00:10
1173 15:53:42.928210 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 15:53:42.931474 I2C: 00:10
1175 15:53:42.931561 PCI: 00:15.2
1176 15:53:42.941840 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 15:53:42.944566 PCI: 00:15.3
1178 15:53:42.954437 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 15:53:42.958212 PCI: 00:16.0
1180 15:53:42.967511 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 15:53:42.967600 PCI: 00:19.0
1182 15:53:42.971108 PCI: 00:19.1 child on link 0 I2C: 00:15
1183 15:53:42.981152 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 15:53:42.984645 I2C: 00:15
1185 15:53:42.987299 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1186 15:53:42.997722 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1187 15:53:43.007047 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1188 15:53:43.017052 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1189 15:53:43.017428 GENERIC: 0.0
1190 15:53:43.020390 PCI: 01:00.0
1191 15:53:43.030312 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 15:53:43.040468 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1193 15:53:43.047143 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1194 15:53:43.050218 PCI: 00:1e.0
1195 15:53:43.060001 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1196 15:53:43.066961 PCI: 00:1e.2 child on link 0 SPI: 00
1197 15:53:43.076643 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 15:53:43.077224 SPI: 00
1199 15:53:43.079772 PCI: 00:1e.3 child on link 0 SPI: 00
1200 15:53:43.089968 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 15:53:43.093412 SPI: 00
1202 15:53:43.096107 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1203 15:53:43.106394 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1204 15:53:43.106868 PNP: 0c09.0
1205 15:53:43.115902 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1206 15:53:43.119334 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1207 15:53:43.128978 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1208 15:53:43.139290 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1209 15:53:43.142154 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1210 15:53:43.145754 GENERIC: 0.0
1211 15:53:43.146431 GENERIC: 1.0
1212 15:53:43.149117 PCI: 00:1f.3
1213 15:53:43.158966 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 15:53:43.168975 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1215 15:53:43.169437 PCI: 00:1f.5
1216 15:53:43.178936 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1217 15:53:43.181818 CPU_CLUSTER: 0 child on link 0 APIC: 00
1218 15:53:43.185167 APIC: 00
1219 15:53:43.185653 APIC: 01
1220 15:53:43.188638 APIC: 03
1221 15:53:43.189103 APIC: 04
1222 15:53:43.189501 APIC: 07
1223 15:53:43.191409 APIC: 06
1224 15:53:43.192044 APIC: 02
1225 15:53:43.194873 APIC: 05
1226 15:53:43.201555 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1227 15:53:43.208030 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1228 15:53:43.211452 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1229 15:53:43.218210 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1230 15:53:43.224617 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 15:53:43.228145 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1232 15:53:43.231136 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1233 15:53:43.237957 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1234 15:53:43.247523 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 15:53:43.254090 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 15:53:43.260800 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1237 15:53:43.267174 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1238 15:53:43.274226 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1239 15:53:43.283282 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1240 15:53:43.290614 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1241 15:53:43.293841 DOMAIN: 0000: Resource ranges:
1242 15:53:43.296898 * Base: 1000, Size: 800, Tag: 100
1243 15:53:43.300357 * Base: 1900, Size: e700, Tag: 100
1244 15:53:43.307054 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1245 15:53:43.313316 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1246 15:53:43.319748 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1247 15:53:43.326348 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1248 15:53:43.336590 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1249 15:53:43.342961 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1250 15:53:43.349623 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1251 15:53:43.359783 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1252 15:53:43.366081 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1253 15:53:43.372255 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1254 15:53:43.382448 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1255 15:53:43.389395 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1256 15:53:43.395574 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1257 15:53:43.405504 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1258 15:53:43.411956 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1259 15:53:43.418310 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1260 15:53:43.428266 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1261 15:53:43.434742 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1262 15:53:43.441250 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1263 15:53:43.450983 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1264 15:53:43.458055 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1265 15:53:43.464075 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1266 15:53:43.474778 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1267 15:53:43.480455 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1268 15:53:43.490922 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1269 15:53:43.493641 DOMAIN: 0000: Resource ranges:
1270 15:53:43.496992 * Base: 7fc00000, Size: 40400000, Tag: 200
1271 15:53:43.500546 * Base: d0000000, Size: 28000000, Tag: 200
1272 15:53:43.507174 * Base: fa000000, Size: 1000000, Tag: 200
1273 15:53:43.510495 * Base: fb001000, Size: 2fff000, Tag: 200
1274 15:53:43.513254 * Base: fe010000, Size: 2e000, Tag: 200
1275 15:53:43.516471 * Base: fe03f000, Size: d41000, Tag: 200
1276 15:53:43.523630 * Base: fed88000, Size: 8000, Tag: 200
1277 15:53:43.526557 * Base: fed93000, Size: d000, Tag: 200
1278 15:53:43.529944 * Base: feda2000, Size: 1e000, Tag: 200
1279 15:53:43.532874 * Base: fede0000, Size: 1220000, Tag: 200
1280 15:53:43.539952 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1281 15:53:43.546189 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1282 15:53:43.552991 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1283 15:53:43.559687 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1284 15:53:43.566649 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1285 15:53:43.573186 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1286 15:53:43.579554 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1287 15:53:43.585968 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1288 15:53:43.592615 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1289 15:53:43.598755 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1290 15:53:43.605626 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1291 15:53:43.611941 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1292 15:53:43.618410 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1293 15:53:43.625643 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1294 15:53:43.631955 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1295 15:53:43.638297 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1296 15:53:43.645220 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1297 15:53:43.651466 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1298 15:53:43.657753 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1299 15:53:43.664358 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1300 15:53:43.671397 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1301 15:53:43.677713 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1302 15:53:43.684170 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1303 15:53:43.693430 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1304 15:53:43.700211 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1305 15:53:43.703527 PCI: 00:1d.0: Resource ranges:
1306 15:53:43.706843 * Base: 7fc00000, Size: 100000, Tag: 200
1307 15:53:43.713906 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1308 15:53:43.720072 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1309 15:53:43.726816 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1310 15:53:43.736629 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1311 15:53:43.743124 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1312 15:53:43.746023 Root Device assign_resources, bus 0 link: 0
1313 15:53:43.752911 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 15:53:43.759578 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1315 15:53:43.770268 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1316 15:53:43.775883 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1317 15:53:43.786161 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1318 15:53:43.789431 PCI: 00:04.0 assign_resources, bus 1 link: 0
1319 15:53:43.796099 PCI: 00:04.0 assign_resources, bus 1 link: 0
1320 15:53:43.802517 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1321 15:53:43.812244 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1322 15:53:43.819296 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1323 15:53:43.825354 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1324 15:53:43.829094 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1325 15:53:43.838718 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1326 15:53:43.841729 PCI: 00:14.0 assign_resources, bus 0 link: 0
1327 15:53:43.845333 PCI: 00:14.0 assign_resources, bus 0 link: 0
1328 15:53:43.855442 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1329 15:53:43.861999 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1330 15:53:43.871494 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1331 15:53:43.875291 PCI: 00:14.3 assign_resources, bus 0 link: 0
1332 15:53:43.881347 PCI: 00:14.3 assign_resources, bus 0 link: 0
1333 15:53:43.888019 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1334 15:53:43.891262 PCI: 00:15.0 assign_resources, bus 0 link: 0
1335 15:53:43.897985 PCI: 00:15.0 assign_resources, bus 0 link: 0
1336 15:53:43.904922 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1337 15:53:43.910966 PCI: 00:15.1 assign_resources, bus 0 link: 0
1338 15:53:43.914472 PCI: 00:15.1 assign_resources, bus 0 link: 0
1339 15:53:43.924702 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1340 15:53:43.930812 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1341 15:53:43.940736 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1342 15:53:43.947502 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1343 15:53:43.953988 PCI: 00:19.1 assign_resources, bus 0 link: 0
1344 15:53:43.957610 PCI: 00:19.1 assign_resources, bus 0 link: 0
1345 15:53:43.966957 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1346 15:53:43.977024 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1347 15:53:43.983683 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1348 15:53:43.990559 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 15:53:43.996861 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1350 15:53:44.006208 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1351 15:53:44.013201 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1352 15:53:44.017023 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1353 15:53:44.026141 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1354 15:53:44.029533 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1355 15:53:44.036277 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1356 15:53:44.042830 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1357 15:53:44.049333 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1358 15:53:44.052791 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1359 15:53:44.055548 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1360 15:53:44.062873 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1361 15:53:44.066357 LPC: Trying to open IO window from 800 size 1ff
1362 15:53:44.075751 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1363 15:53:44.082527 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1364 15:53:44.092313 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1365 15:53:44.095346 DOMAIN: 0000 assign_resources, bus 0 link: 0
1366 15:53:44.102498 Root Device assign_resources, bus 0 link: 0
1367 15:53:44.103201 Done setting resources.
1368 15:53:44.108706 Show resources in subtree (Root Device)...After assigning values.
1369 15:53:44.115037 Root Device child on link 0 DOMAIN: 0000
1370 15:53:44.118301 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1371 15:53:44.128284 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1372 15:53:44.138662 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1373 15:53:44.139251 PCI: 00:00.0
1374 15:53:44.148545 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1375 15:53:44.158019 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1376 15:53:44.167965 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1377 15:53:44.177706 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1378 15:53:44.187258 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1379 15:53:44.197134 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1380 15:53:44.203711 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1381 15:53:44.213490 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1382 15:53:44.223304 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1383 15:53:44.233060 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1384 15:53:44.243320 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1385 15:53:44.253218 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1386 15:53:44.263398 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1387 15:53:44.269480 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1388 15:53:44.280224 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1389 15:53:44.289331 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1390 15:53:44.299204 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1391 15:53:44.308754 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1392 15:53:44.319208 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1393 15:53:44.328764 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1394 15:53:44.329225 PCI: 00:02.0
1395 15:53:44.338776 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1396 15:53:44.351216 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1397 15:53:44.360974 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1398 15:53:44.364218 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1399 15:53:44.373953 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1400 15:53:44.377683 GENERIC: 0.0
1401 15:53:44.377767 PCI: 00:05.0
1402 15:53:44.387267 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1403 15:53:44.394147 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1404 15:53:44.394279 GENERIC: 0.0
1405 15:53:44.397357 PCI: 00:08.0
1406 15:53:44.407354 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1407 15:53:44.409984 PCI: 00:0a.0
1408 15:53:44.413199 PCI: 00:0d.0 child on link 0 USB0 port 0
1409 15:53:44.423701 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1410 15:53:44.427054 USB0 port 0 child on link 0 USB3 port 0
1411 15:53:44.429775 USB3 port 0
1412 15:53:44.429926 USB3 port 1
1413 15:53:44.432856 USB3 port 2
1414 15:53:44.436509 USB3 port 3
1415 15:53:44.440132 PCI: 00:14.0 child on link 0 USB0 port 0
1416 15:53:44.450172 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1417 15:53:44.453438 USB0 port 0 child on link 0 USB2 port 0
1418 15:53:44.456399 USB2 port 0
1419 15:53:44.456894 USB2 port 1
1420 15:53:44.459414 USB2 port 2
1421 15:53:44.463051 USB2 port 3
1422 15:53:44.463505 USB2 port 4
1423 15:53:44.466388 USB2 port 5
1424 15:53:44.466837 USB2 port 6
1425 15:53:44.469734 USB2 port 7
1426 15:53:44.470254 USB2 port 8
1427 15:53:44.472522 USB2 port 9
1428 15:53:44.473018 USB3 port 0
1429 15:53:44.476075 USB3 port 1
1430 15:53:44.476620 USB3 port 2
1431 15:53:44.479159 USB3 port 3
1432 15:53:44.479575 PCI: 00:14.2
1433 15:53:44.492506 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1434 15:53:44.502550 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1435 15:53:44.505721 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1436 15:53:44.515438 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1437 15:53:44.518354 GENERIC: 0.0
1438 15:53:44.521895 PCI: 00:15.0 child on link 0 I2C: 00:1a
1439 15:53:44.531741 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1440 15:53:44.535392 I2C: 00:1a
1441 15:53:44.535884 I2C: 00:31
1442 15:53:44.538296 I2C: 00:32
1443 15:53:44.541622 PCI: 00:15.1 child on link 0 I2C: 00:10
1444 15:53:44.551303 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1445 15:53:44.554924 I2C: 00:10
1446 15:53:44.555420 PCI: 00:15.2
1447 15:53:44.564769 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1448 15:53:44.567623 PCI: 00:15.3
1449 15:53:44.577978 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1450 15:53:44.578503 PCI: 00:16.0
1451 15:53:44.590814 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1452 15:53:44.591285 PCI: 00:19.0
1453 15:53:44.593944 PCI: 00:19.1 child on link 0 I2C: 00:15
1454 15:53:44.606802 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1455 15:53:44.607203 I2C: 00:15
1456 15:53:44.610438 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1457 15:53:44.620278 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1458 15:53:44.633213 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1459 15:53:44.642945 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1460 15:53:44.646312 GENERIC: 0.0
1461 15:53:44.646399 PCI: 01:00.0
1462 15:53:44.656150 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1463 15:53:44.665656 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1464 15:53:44.678765 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1465 15:53:44.678856 PCI: 00:1e.0
1466 15:53:44.692187 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1467 15:53:44.695427 PCI: 00:1e.2 child on link 0 SPI: 00
1468 15:53:44.705672 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1469 15:53:44.705764 SPI: 00
1470 15:53:44.711838 PCI: 00:1e.3 child on link 0 SPI: 00
1471 15:53:44.721970 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1472 15:53:44.722062 SPI: 00
1473 15:53:44.725621 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1474 15:53:44.734788 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1475 15:53:44.738070 PNP: 0c09.0
1476 15:53:44.744940 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 15:53:44.751232 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1478 15:53:44.757703 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1479 15:53:44.767804 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1480 15:53:44.774016 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1481 15:53:44.774106 GENERIC: 0.0
1482 15:53:44.777364 GENERIC: 1.0
1483 15:53:44.777453 PCI: 00:1f.3
1484 15:53:44.787063 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1485 15:53:44.800164 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1486 15:53:44.800258 PCI: 00:1f.5
1487 15:53:44.810459 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1488 15:53:44.816873 CPU_CLUSTER: 0 child on link 0 APIC: 00
1489 15:53:44.816970 APIC: 00
1490 15:53:44.817045 APIC: 01
1491 15:53:44.819909 APIC: 03
1492 15:53:44.819990 APIC: 04
1493 15:53:44.823064 APIC: 07
1494 15:53:44.823152 APIC: 06
1495 15:53:44.823221 APIC: 02
1496 15:53:44.826504 APIC: 05
1497 15:53:44.829766 Done allocating resources.
1498 15:53:44.833311 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1499 15:53:44.840571 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1500 15:53:44.843396 Configure GPIOs for I2S audio on UP4.
1501 15:53:44.850821 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1502 15:53:44.854585 Enabling resources...
1503 15:53:44.857967 PCI: 00:00.0 subsystem <- 8086/9a12
1504 15:53:44.861056 PCI: 00:00.0 cmd <- 06
1505 15:53:44.864421 PCI: 00:02.0 subsystem <- 8086/9a40
1506 15:53:44.867391 PCI: 00:02.0 cmd <- 03
1507 15:53:44.870744 PCI: 00:04.0 subsystem <- 8086/9a03
1508 15:53:44.874172 PCI: 00:04.0 cmd <- 02
1509 15:53:44.877032 PCI: 00:05.0 subsystem <- 8086/9a19
1510 15:53:44.877110 PCI: 00:05.0 cmd <- 02
1511 15:53:44.884233 PCI: 00:08.0 subsystem <- 8086/9a11
1512 15:53:44.884312 PCI: 00:08.0 cmd <- 06
1513 15:53:44.887480 PCI: 00:0d.0 subsystem <- 8086/9a13
1514 15:53:44.890648 PCI: 00:0d.0 cmd <- 02
1515 15:53:44.893940 PCI: 00:14.0 subsystem <- 8086/a0ed
1516 15:53:44.897168 PCI: 00:14.0 cmd <- 02
1517 15:53:44.900407 PCI: 00:14.2 subsystem <- 8086/a0ef
1518 15:53:44.903841 PCI: 00:14.2 cmd <- 02
1519 15:53:44.906765 PCI: 00:14.3 subsystem <- 8086/a0f0
1520 15:53:44.910218 PCI: 00:14.3 cmd <- 02
1521 15:53:44.913305 PCI: 00:15.0 subsystem <- 8086/a0e8
1522 15:53:44.917032 PCI: 00:15.0 cmd <- 02
1523 15:53:44.920423 PCI: 00:15.1 subsystem <- 8086/a0e9
1524 15:53:44.923376 PCI: 00:15.1 cmd <- 02
1525 15:53:44.926835 PCI: 00:15.2 subsystem <- 8086/a0ea
1526 15:53:44.930056 PCI: 00:15.2 cmd <- 02
1527 15:53:44.933499 PCI: 00:15.3 subsystem <- 8086/a0eb
1528 15:53:44.933587 PCI: 00:15.3 cmd <- 02
1529 15:53:44.940098 PCI: 00:16.0 subsystem <- 8086/a0e0
1530 15:53:44.940225 PCI: 00:16.0 cmd <- 02
1531 15:53:44.943347 PCI: 00:19.1 subsystem <- 8086/a0c6
1532 15:53:44.946376 PCI: 00:19.1 cmd <- 02
1533 15:53:44.950016 PCI: 00:1d.0 bridge ctrl <- 0013
1534 15:53:44.953207 PCI: 00:1d.0 subsystem <- 8086/a0b0
1535 15:53:44.956624 PCI: 00:1d.0 cmd <- 06
1536 15:53:44.959356 PCI: 00:1e.0 subsystem <- 8086/a0a8
1537 15:53:44.963254 PCI: 00:1e.0 cmd <- 06
1538 15:53:44.966107 PCI: 00:1e.2 subsystem <- 8086/a0aa
1539 15:53:44.969407 PCI: 00:1e.2 cmd <- 06
1540 15:53:44.972868 PCI: 00:1e.3 subsystem <- 8086/a0ab
1541 15:53:44.976195 PCI: 00:1e.3 cmd <- 02
1542 15:53:44.979602 PCI: 00:1f.0 subsystem <- 8086/a087
1543 15:53:44.982497 PCI: 00:1f.0 cmd <- 407
1544 15:53:44.985894 PCI: 00:1f.3 subsystem <- 8086/a0c8
1545 15:53:44.989088 PCI: 00:1f.3 cmd <- 02
1546 15:53:44.992515 PCI: 00:1f.5 subsystem <- 8086/a0a4
1547 15:53:44.995739 PCI: 00:1f.5 cmd <- 406
1548 15:53:44.998991 PCI: 01:00.0 cmd <- 02
1549 15:53:45.002908 done.
1550 15:53:45.006256 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1551 15:53:45.009240 Initializing devices...
1552 15:53:45.012812 Root Device init
1553 15:53:45.015965 Chrome EC: Set SMI mask to 0x0000000000000000
1554 15:53:45.022844 Chrome EC: clear events_b mask to 0x0000000000000000
1555 15:53:45.029625 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1556 15:53:45.036293 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1557 15:53:45.043057 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1558 15:53:45.045788 Chrome EC: Set WAKE mask to 0x0000000000000000
1559 15:53:45.053902 fw_config match found: DB_USB=USB3_ACTIVE
1560 15:53:45.057178 Configure Right Type-C port orientation for retimer
1561 15:53:45.063430 Root Device init finished in 46 msecs
1562 15:53:45.063525 PCI: 00:00.0 init
1563 15:53:45.067865 CPU TDP = 9 Watts
1564 15:53:45.071154 CPU PL1 = 9 Watts
1565 15:53:45.071241 CPU PL2 = 40 Watts
1566 15:53:45.074012 CPU PL4 = 83 Watts
1567 15:53:45.077638 PCI: 00:00.0 init finished in 8 msecs
1568 15:53:45.081075 PCI: 00:02.0 init
1569 15:53:45.081164 GMA: Found VBT in CBFS
1570 15:53:45.084392 GMA: Found valid VBT in CBFS
1571 15:53:45.090935 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1572 15:53:45.097322 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1573 15:53:45.100652 PCI: 00:02.0 init finished in 18 msecs
1574 15:53:45.104265 PCI: 00:05.0 init
1575 15:53:45.107721 PCI: 00:05.0 init finished in 0 msecs
1576 15:53:45.110516 PCI: 00:08.0 init
1577 15:53:45.113990 PCI: 00:08.0 init finished in 0 msecs
1578 15:53:45.117600 PCI: 00:14.0 init
1579 15:53:45.120592 PCI: 00:14.0 init finished in 0 msecs
1580 15:53:45.124075 PCI: 00:14.2 init
1581 15:53:45.127394 PCI: 00:14.2 init finished in 0 msecs
1582 15:53:45.130710 PCI: 00:15.0 init
1583 15:53:45.133604 I2C bus 0 version 0x3230302a
1584 15:53:45.137512 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1585 15:53:45.140334 PCI: 00:15.0 init finished in 6 msecs
1586 15:53:45.143698 PCI: 00:15.1 init
1587 15:53:45.143787 I2C bus 1 version 0x3230302a
1588 15:53:45.150444 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1589 15:53:45.153735 PCI: 00:15.1 init finished in 6 msecs
1590 15:53:45.153839 PCI: 00:15.2 init
1591 15:53:45.156669 I2C bus 2 version 0x3230302a
1592 15:53:45.159920 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1593 15:53:45.166477 PCI: 00:15.2 init finished in 6 msecs
1594 15:53:45.166568 PCI: 00:15.3 init
1595 15:53:45.169765 I2C bus 3 version 0x3230302a
1596 15:53:45.173172 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1597 15:53:45.176484 PCI: 00:15.3 init finished in 6 msecs
1598 15:53:45.180063 PCI: 00:16.0 init
1599 15:53:45.183430 PCI: 00:16.0 init finished in 0 msecs
1600 15:53:45.186475 PCI: 00:19.1 init
1601 15:53:45.189534 I2C bus 5 version 0x3230302a
1602 15:53:45.193271 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1603 15:53:45.196816 PCI: 00:19.1 init finished in 6 msecs
1604 15:53:45.199514 PCI: 00:1d.0 init
1605 15:53:45.202774 Initializing PCH PCIe bridge.
1606 15:53:45.206451 PCI: 00:1d.0 init finished in 3 msecs
1607 15:53:45.209532 PCI: 00:1f.0 init
1608 15:53:45.212524 IOAPIC: Initializing IOAPIC at 0xfec00000
1609 15:53:45.219282 IOAPIC: Bootstrap Processor Local APIC = 0x00
1610 15:53:45.219370 IOAPIC: ID = 0x02
1611 15:53:45.222630 IOAPIC: Dumping registers
1612 15:53:45.225892 reg 0x0000: 0x02000000
1613 15:53:45.229345 reg 0x0001: 0x00770020
1614 15:53:45.229449 reg 0x0002: 0x00000000
1615 15:53:45.235508 PCI: 00:1f.0 init finished in 21 msecs
1616 15:53:45.235603 PCI: 00:1f.2 init
1617 15:53:45.238871 Disabling ACPI via APMC.
1618 15:53:45.242006 APMC done.
1619 15:53:45.245322 PCI: 00:1f.2 init finished in 5 msecs
1620 15:53:45.257130 PCI: 01:00.0 init
1621 15:53:45.260629 PCI: 01:00.0 init finished in 0 msecs
1622 15:53:45.263970 PNP: 0c09.0 init
1623 15:53:45.267044 Google Chrome EC uptime: 8.357 seconds
1624 15:53:45.273642 Google Chrome AP resets since EC boot: 1
1625 15:53:45.277130 Google Chrome most recent AP reset causes:
1626 15:53:45.280726 0.346: 32775 shutdown: entering G3
1627 15:53:45.286851 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1628 15:53:45.290318 PNP: 0c09.0 init finished in 22 msecs
1629 15:53:45.296402 Devices initialized
1630 15:53:45.299631 Show all devs... After init.
1631 15:53:45.303182 Root Device: enabled 1
1632 15:53:45.303270 DOMAIN: 0000: enabled 1
1633 15:53:45.306014 CPU_CLUSTER: 0: enabled 1
1634 15:53:45.309236 PCI: 00:00.0: enabled 1
1635 15:53:45.312454 PCI: 00:02.0: enabled 1
1636 15:53:45.312542 PCI: 00:04.0: enabled 1
1637 15:53:45.315994 PCI: 00:05.0: enabled 1
1638 15:53:45.319442 PCI: 00:06.0: enabled 0
1639 15:53:45.322584 PCI: 00:07.0: enabled 0
1640 15:53:45.322673 PCI: 00:07.1: enabled 0
1641 15:53:45.325735 PCI: 00:07.2: enabled 0
1642 15:53:45.328936 PCI: 00:07.3: enabled 0
1643 15:53:45.332322 PCI: 00:08.0: enabled 1
1644 15:53:45.332436 PCI: 00:09.0: enabled 0
1645 15:53:45.335821 PCI: 00:0a.0: enabled 0
1646 15:53:45.338717 PCI: 00:0d.0: enabled 1
1647 15:53:45.342316 PCI: 00:0d.1: enabled 0
1648 15:53:45.342403 PCI: 00:0d.2: enabled 0
1649 15:53:45.345096 PCI: 00:0d.3: enabled 0
1650 15:53:45.348501 PCI: 00:0e.0: enabled 0
1651 15:53:45.351875 PCI: 00:10.2: enabled 1
1652 15:53:45.351963 PCI: 00:10.6: enabled 0
1653 15:53:45.355302 PCI: 00:10.7: enabled 0
1654 15:53:45.358174 PCI: 00:12.0: enabled 0
1655 15:53:45.361558 PCI: 00:12.6: enabled 0
1656 15:53:45.361646 PCI: 00:13.0: enabled 0
1657 15:53:45.364970 PCI: 00:14.0: enabled 1
1658 15:53:45.368114 PCI: 00:14.1: enabled 0
1659 15:53:45.371260 PCI: 00:14.2: enabled 1
1660 15:53:45.371347 PCI: 00:14.3: enabled 1
1661 15:53:45.374670 PCI: 00:15.0: enabled 1
1662 15:53:45.378115 PCI: 00:15.1: enabled 1
1663 15:53:45.381676 PCI: 00:15.2: enabled 1
1664 15:53:45.381764 PCI: 00:15.3: enabled 1
1665 15:53:45.384602 PCI: 00:16.0: enabled 1
1666 15:53:45.387818 PCI: 00:16.1: enabled 0
1667 15:53:45.391016 PCI: 00:16.2: enabled 0
1668 15:53:45.391104 PCI: 00:16.3: enabled 0
1669 15:53:45.394350 PCI: 00:16.4: enabled 0
1670 15:53:45.397684 PCI: 00:16.5: enabled 0
1671 15:53:45.401114 PCI: 00:17.0: enabled 0
1672 15:53:45.401201 PCI: 00:19.0: enabled 0
1673 15:53:45.404514 PCI: 00:19.1: enabled 1
1674 15:53:45.407939 PCI: 00:19.2: enabled 0
1675 15:53:45.410826 PCI: 00:1c.0: enabled 1
1676 15:53:45.410915 PCI: 00:1c.1: enabled 0
1677 15:53:45.413927 PCI: 00:1c.2: enabled 0
1678 15:53:45.417309 PCI: 00:1c.3: enabled 0
1679 15:53:45.420832 PCI: 00:1c.4: enabled 0
1680 15:53:45.420927 PCI: 00:1c.5: enabled 0
1681 15:53:45.423956 PCI: 00:1c.6: enabled 1
1682 15:53:45.427059 PCI: 00:1c.7: enabled 0
1683 15:53:45.430605 PCI: 00:1d.0: enabled 1
1684 15:53:45.430711 PCI: 00:1d.1: enabled 0
1685 15:53:45.433928 PCI: 00:1d.2: enabled 1
1686 15:53:45.437289 PCI: 00:1d.3: enabled 0
1687 15:53:45.440332 PCI: 00:1e.0: enabled 1
1688 15:53:45.440412 PCI: 00:1e.1: enabled 0
1689 15:53:45.443607 PCI: 00:1e.2: enabled 1
1690 15:53:45.447117 PCI: 00:1e.3: enabled 1
1691 15:53:45.447205 PCI: 00:1f.0: enabled 1
1692 15:53:45.449927 PCI: 00:1f.1: enabled 0
1693 15:53:45.453238 PCI: 00:1f.2: enabled 1
1694 15:53:45.456396 PCI: 00:1f.3: enabled 1
1695 15:53:45.456483 PCI: 00:1f.4: enabled 0
1696 15:53:45.459896 PCI: 00:1f.5: enabled 1
1697 15:53:45.463086 PCI: 00:1f.6: enabled 0
1698 15:53:45.466708 PCI: 00:1f.7: enabled 0
1699 15:53:45.466794 APIC: 00: enabled 1
1700 15:53:45.469600 GENERIC: 0.0: enabled 1
1701 15:53:45.472981 GENERIC: 0.0: enabled 1
1702 15:53:45.476622 GENERIC: 1.0: enabled 1
1703 15:53:45.476709 GENERIC: 0.0: enabled 1
1704 15:53:45.479282 GENERIC: 1.0: enabled 1
1705 15:53:45.482796 USB0 port 0: enabled 1
1706 15:53:45.482883 GENERIC: 0.0: enabled 1
1707 15:53:45.486351 USB0 port 0: enabled 1
1708 15:53:45.489509 GENERIC: 0.0: enabled 1
1709 15:53:45.493086 I2C: 00:1a: enabled 1
1710 15:53:45.493202 I2C: 00:31: enabled 1
1711 15:53:45.496033 I2C: 00:32: enabled 1
1712 15:53:45.499663 I2C: 00:10: enabled 1
1713 15:53:45.499791 I2C: 00:15: enabled 1
1714 15:53:45.502419 GENERIC: 0.0: enabled 0
1715 15:53:45.505752 GENERIC: 1.0: enabled 0
1716 15:53:45.509448 GENERIC: 0.0: enabled 1
1717 15:53:45.509557 SPI: 00: enabled 1
1718 15:53:45.512435 SPI: 00: enabled 1
1719 15:53:45.512523 PNP: 0c09.0: enabled 1
1720 15:53:45.515654 GENERIC: 0.0: enabled 1
1721 15:53:45.519080 USB3 port 0: enabled 1
1722 15:53:45.522409 USB3 port 1: enabled 1
1723 15:53:45.522512 USB3 port 2: enabled 0
1724 15:53:45.525529 USB3 port 3: enabled 0
1725 15:53:45.528750 USB2 port 0: enabled 0
1726 15:53:45.532159 USB2 port 1: enabled 1
1727 15:53:45.532246 USB2 port 2: enabled 1
1728 15:53:45.535343 USB2 port 3: enabled 0
1729 15:53:45.538821 USB2 port 4: enabled 1
1730 15:53:45.538909 USB2 port 5: enabled 0
1731 15:53:45.542318 USB2 port 6: enabled 0
1732 15:53:45.545126 USB2 port 7: enabled 0
1733 15:53:45.548406 USB2 port 8: enabled 0
1734 15:53:45.548494 USB2 port 9: enabled 0
1735 15:53:45.551852 USB3 port 0: enabled 0
1736 15:53:45.555327 USB3 port 1: enabled 1
1737 15:53:45.555414 USB3 port 2: enabled 0
1738 15:53:45.558059 USB3 port 3: enabled 0
1739 15:53:45.561457 GENERIC: 0.0: enabled 1
1740 15:53:45.564807 GENERIC: 1.0: enabled 1
1741 15:53:45.564894 APIC: 01: enabled 1
1742 15:53:45.568352 APIC: 03: enabled 1
1743 15:53:45.568439 APIC: 04: enabled 1
1744 15:53:45.571760 APIC: 07: enabled 1
1745 15:53:45.574538 APIC: 06: enabled 1
1746 15:53:45.574620 APIC: 02: enabled 1
1747 15:53:45.577798 APIC: 05: enabled 1
1748 15:53:45.581775 PCI: 01:00.0: enabled 1
1749 15:53:45.584617 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1750 15:53:45.591295 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1751 15:53:45.594731 ELOG: NV offset 0xf30000 size 0x1000
1752 15:53:45.601412 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1753 15:53:45.608322 ELOG: Event(17) added with size 13 at 2023-03-03 15:53:45 UTC
1754 15:53:45.614442 ELOG: Event(92) added with size 9 at 2023-03-03 15:53:45 UTC
1755 15:53:45.621284 ELOG: Event(93) added with size 9 at 2023-03-03 15:53:45 UTC
1756 15:53:45.627481 ELOG: Event(9E) added with size 10 at 2023-03-03 15:53:45 UTC
1757 15:53:45.634128 ELOG: Event(9F) added with size 14 at 2023-03-03 15:53:45 UTC
1758 15:53:45.641442 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1759 15:53:45.647496 ELOG: Event(A1) added with size 10 at 2023-03-03 15:53:45 UTC
1760 15:53:45.654301 ELOG: Event(16) added with size 11 at 2023-03-03 15:53:45 UTC
1761 15:53:45.657217 Erasing flash addr f30000 + 4 KiB
1762 15:53:45.715436 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1763 15:53:45.722127 BS: BS_POST_DEVICE entry times (exec / console): 30 / 22 ms
1764 15:53:45.725351 Finalize devices...
1765 15:53:45.725433 Devices finalized
1766 15:53:45.732080 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1767 15:53:45.738579 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1768 15:53:45.741996 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1769 15:53:45.748136 ME: HFSTS1 : 0x80030055
1770 15:53:45.751455 ME: HFSTS2 : 0x30280116
1771 15:53:45.758042 ME: HFSTS3 : 0x00000050
1772 15:53:45.761338 ME: HFSTS4 : 0x00004000
1773 15:53:45.764834 ME: HFSTS5 : 0x00000000
1774 15:53:45.771326 ME: HFSTS6 : 0x00400006
1775 15:53:45.774652 ME: Manufacturing Mode : YES
1776 15:53:45.778030 ME: SPI Protection Mode Enabled : NO
1777 15:53:45.781319 ME: FW Partition Table : OK
1778 15:53:45.784287 ME: Bringup Loader Failure : NO
1779 15:53:45.787598 ME: Firmware Init Complete : NO
1780 15:53:45.791147 ME: Boot Options Present : NO
1781 15:53:45.797355 ME: Update In Progress : NO
1782 15:53:45.800673 ME: D0i3 Support : YES
1783 15:53:45.804194 ME: Low Power State Enabled : NO
1784 15:53:45.807459 ME: CPU Replaced : YES
1785 15:53:45.810755 ME: CPU Replacement Valid : YES
1786 15:53:45.814012 ME: Current Working State : 5
1787 15:53:45.817315 ME: Current Operation State : 1
1788 15:53:45.820683 ME: Current Operation Mode : 3
1789 15:53:45.827425 ME: Error Code : 0
1790 15:53:45.830867 ME: Enhanced Debug Mode : NO
1791 15:53:45.833839 ME: CPU Debug Disabled : YES
1792 15:53:45.837132 ME: TXT Support : NO
1793 15:53:45.843639 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1794 15:53:45.850629 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1795 15:53:45.853342 CBFS: 'fallback/slic' not found.
1796 15:53:45.857235 ACPI: Writing ACPI tables at 76b01000.
1797 15:53:45.860834 ACPI: * FACS
1798 15:53:45.860913 ACPI: * DSDT
1799 15:53:45.863987 Ramoops buffer: 0x100000@0x76a00000.
1800 15:53:45.869984 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1801 15:53:45.873315 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1802 15:53:45.876978 Google Chrome EC: version:
1803 15:53:45.879931 ro: voema_v2.0.7540-147f8d37d1
1804 15:53:45.883105 rw: voema_v2.0.7540-147f8d37d1
1805 15:53:45.886394 running image: 2
1806 15:53:45.893265 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1807 15:53:45.896653 ACPI: * FADT
1808 15:53:45.896726 SCI is IRQ9
1809 15:53:45.903120 ACPI: added table 1/32, length now 40
1810 15:53:45.903198 ACPI: * SSDT
1811 15:53:45.906515 Found 1 CPU(s) with 8 core(s) each.
1812 15:53:45.913168 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1813 15:53:45.916315 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1814 15:53:45.919438 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1815 15:53:45.926110 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1816 15:53:45.929387 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1817 15:53:45.936298 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1818 15:53:45.939320 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1819 15:53:45.945535 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1820 15:53:45.952328 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1821 15:53:45.955614 \_SB.PCI0.RP09: Added StorageD3Enable property
1822 15:53:45.962097 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1823 15:53:45.965753 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1824 15:53:45.971926 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1825 15:53:45.975275 PS2K: Passing 80 keymaps to kernel
1826 15:53:45.982059 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1827 15:53:45.989094 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1828 15:53:45.995309 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1829 15:53:46.002146 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1830 15:53:46.008908 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1831 15:53:46.014960 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1832 15:53:46.021895 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1833 15:53:46.028143 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1834 15:53:46.031837 ACPI: added table 2/32, length now 44
1835 15:53:46.034841 ACPI: * MCFG
1836 15:53:46.037915 ACPI: added table 3/32, length now 48
1837 15:53:46.038368 ACPI: * TPM2
1838 15:53:46.041380 TPM2 log created at 0x769f0000
1839 15:53:46.044872 ACPI: added table 4/32, length now 52
1840 15:53:46.047804 ACPI: * MADT
1841 15:53:46.048266 SCI is IRQ9
1842 15:53:46.051591 ACPI: added table 5/32, length now 56
1843 15:53:46.054633 current = 76b09850
1844 15:53:46.058117 ACPI: * DMAR
1845 15:53:46.060883 ACPI: added table 6/32, length now 60
1846 15:53:46.064514 ACPI: added table 7/32, length now 64
1847 15:53:46.064991 ACPI: * HPET
1848 15:53:46.070951 ACPI: added table 8/32, length now 68
1849 15:53:46.071410 ACPI: done.
1850 15:53:46.074060 ACPI tables: 35216 bytes.
1851 15:53:46.077415 smbios_write_tables: 769ef000
1852 15:53:46.080821 EC returned error result code 3
1853 15:53:46.084310 Couldn't obtain OEM name from CBI
1854 15:53:46.087069 Create SMBIOS type 16
1855 15:53:46.087560 Create SMBIOS type 17
1856 15:53:46.090334 GENERIC: 0.0 (WIFI Device)
1857 15:53:46.093912 SMBIOS tables: 1750 bytes.
1858 15:53:46.097349 Writing table forward entry at 0x00000500
1859 15:53:46.103759 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1860 15:53:46.106897 Writing coreboot table at 0x76b25000
1861 15:53:46.113454 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1862 15:53:46.119885 1. 0000000000001000-000000000009ffff: RAM
1863 15:53:46.123180 2. 00000000000a0000-00000000000fffff: RESERVED
1864 15:53:46.126601 3. 0000000000100000-00000000769eefff: RAM
1865 15:53:46.133339 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1866 15:53:46.139675 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1867 15:53:46.143111 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1868 15:53:46.149329 7. 0000000077000000-000000007fbfffff: RESERVED
1869 15:53:46.152653 8. 00000000c0000000-00000000cfffffff: RESERVED
1870 15:53:46.159553 9. 00000000f8000000-00000000f9ffffff: RESERVED
1871 15:53:46.162698 10. 00000000fb000000-00000000fb000fff: RESERVED
1872 15:53:46.169326 11. 00000000fe000000-00000000fe00ffff: RESERVED
1873 15:53:46.172523 12. 00000000fed80000-00000000fed87fff: RESERVED
1874 15:53:46.179227 13. 00000000fed90000-00000000fed92fff: RESERVED
1875 15:53:46.182115 14. 00000000feda0000-00000000feda1fff: RESERVED
1876 15:53:46.188856 15. 00000000fedc0000-00000000feddffff: RESERVED
1877 15:53:46.192492 16. 0000000100000000-00000002803fffff: RAM
1878 15:53:46.195294 Passing 4 GPIOs to payload:
1879 15:53:46.198821 NAME | PORT | POLARITY | VALUE
1880 15:53:46.205269 lid | undefined | high | high
1881 15:53:46.211755 power | undefined | high | low
1882 15:53:46.214891 oprom | undefined | high | low
1883 15:53:46.221468 EC in RW | 0x000000e5 | high | high
1884 15:53:46.228459 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 20d6
1885 15:53:46.231445 coreboot table: 1576 bytes.
1886 15:53:46.234817 IMD ROOT 0. 0x76fff000 0x00001000
1887 15:53:46.238026 IMD SMALL 1. 0x76ffe000 0x00001000
1888 15:53:46.241404 FSP MEMORY 2. 0x76c4e000 0x003b0000
1889 15:53:46.244517 VPD 3. 0x76c4d000 0x00000367
1890 15:53:46.248098 RO MCACHE 4. 0x76c4c000 0x00000fdc
1891 15:53:46.251449 CONSOLE 5. 0x76c2c000 0x00020000
1892 15:53:46.257801 FMAP 6. 0x76c2b000 0x00000578
1893 15:53:46.261009 TIME STAMP 7. 0x76c2a000 0x00000910
1894 15:53:46.264103 VBOOT WORK 8. 0x76c16000 0x00014000
1895 15:53:46.267407 ROMSTG STCK 9. 0x76c15000 0x00001000
1896 15:53:46.271340 AFTER CAR 10. 0x76c0a000 0x0000b000
1897 15:53:46.274339 RAMSTAGE 11. 0x76b97000 0x00073000
1898 15:53:46.277516 REFCODE 12. 0x76b42000 0x00055000
1899 15:53:46.280827 SMM BACKUP 13. 0x76b32000 0x00010000
1900 15:53:46.287188 4f444749 14. 0x76b30000 0x00002000
1901 15:53:46.290687 EXT VBT15. 0x76b2d000 0x0000219f
1902 15:53:46.293455 COREBOOT 16. 0x76b25000 0x00008000
1903 15:53:46.296974 ACPI 17. 0x76b01000 0x00024000
1904 15:53:46.299855 ACPI GNVS 18. 0x76b00000 0x00001000
1905 15:53:46.303240 RAMOOPS 19. 0x76a00000 0x00100000
1906 15:53:46.306557 TPM2 TCGLOG20. 0x769f0000 0x00010000
1907 15:53:46.309964 SMBIOS 21. 0x769ef000 0x00000800
1908 15:53:46.313267 IMD small region:
1909 15:53:46.316504 IMD ROOT 0. 0x76ffec00 0x00000400
1910 15:53:46.319655 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1911 15:53:46.326275 POWER STATE 2. 0x76ffeb80 0x00000044
1912 15:53:46.329624 ROMSTAGE 3. 0x76ffeb60 0x00000004
1913 15:53:46.333027 MEM INFO 4. 0x76ffe980 0x000001e0
1914 15:53:46.339756 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1915 15:53:46.342652 MTRR: Physical address space:
1916 15:53:46.349154 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1917 15:53:46.352599 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1918 15:53:46.359504 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1919 15:53:46.365520 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1920 15:53:46.372367 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1921 15:53:46.378744 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1922 15:53:46.385198 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1923 15:53:46.388565 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 15:53:46.395570 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 15:53:46.398347 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 15:53:46.401707 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 15:53:46.405201 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 15:53:46.411814 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 15:53:46.415477 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 15:53:46.418211 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 15:53:46.421844 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 15:53:46.424826 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 15:53:46.431623 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 15:53:46.434670 call enable_fixed_mtrr()
1935 15:53:46.437846 CPU physical address size: 39 bits
1936 15:53:46.441258 MTRR: default type WB/UC MTRR counts: 6/6.
1937 15:53:46.444732 MTRR: UC selected as default type.
1938 15:53:46.451303 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1939 15:53:46.458391 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1940 15:53:46.464615 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1941 15:53:46.471309 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1942 15:53:46.477624 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1943 15:53:46.484590 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1944 15:53:46.484945
1945 15:53:46.487451 MTRR check
1946 15:53:46.487835 Fixed MTRRs : Enabled
1947 15:53:46.490928 Variable MTRRs: Enabled
1948 15:53:46.491345
1949 15:53:46.494151 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 15:53:46.500742 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 15:53:46.503903 MTRR: Fixed MSR 0x259 0x0000000000000000
1952 15:53:46.507735 MTRR: Fixed MSR 0x268 0x0606060606060606
1953 15:53:46.510956 MTRR: Fixed MSR 0x269 0x0606060606060606
1954 15:53:46.517214 MTRR: Fixed MSR 0x26a 0x0606060606060606
1955 15:53:46.520597 MTRR: Fixed MSR 0x26b 0x0606060606060606
1956 15:53:46.523853 MTRR: Fixed MSR 0x26c 0x0606060606060606
1957 15:53:46.527656 MTRR: Fixed MSR 0x26d 0x0606060606060606
1958 15:53:46.533588 MTRR: Fixed MSR 0x26e 0x0606060606060606
1959 15:53:46.536827 MTRR: Fixed MSR 0x26f 0x0606060606060606
1960 15:53:46.543762 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1961 15:53:46.546693 call enable_fixed_mtrr()
1962 15:53:46.550329 Checking cr50 for pending updates
1963 15:53:46.554086 CPU physical address size: 39 bits
1964 15:53:46.557189 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 15:53:46.560992 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 15:53:46.563919 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 15:53:46.569794 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 15:53:46.573166 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 15:53:46.577271 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 15:53:46.579577 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 15:53:46.586451 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 15:53:46.590160 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 15:53:46.593342 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 15:53:46.596523 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 15:53:46.602809 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 15:53:46.606261 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 15:53:46.609646 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 15:53:46.616100 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 15:53:46.619381 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 15:53:46.622433 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 15:53:46.625900 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 15:53:46.632283 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 15:53:46.635813 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 15:53:46.639097 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 15:53:46.641999 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 15:53:46.648826 call enable_fixed_mtrr()
1987 15:53:46.648982 call enable_fixed_mtrr()
1988 15:53:46.652208 CPU physical address size: 39 bits
1989 15:53:46.659471 CPU physical address size: 39 bits
1990 15:53:46.662919 MTRR: Fixed MSR 0x250 0x0606060606060606
1991 15:53:46.666269 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 15:53:46.669722 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 15:53:46.672741 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 15:53:46.679893 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 15:53:46.682799 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 15:53:46.686036 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 15:53:46.689563 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 15:53:46.696547 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 15:53:46.699498 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 15:53:46.702547 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 15:53:46.706021 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 15:53:46.714087 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 15:53:46.714549 call enable_fixed_mtrr()
2004 15:53:46.720569 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 15:53:46.723369 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 15:53:46.727446 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 15:53:46.730065 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 15:53:46.736691 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 15:53:46.740055 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 15:53:46.743301 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 15:53:46.746763 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 15:53:46.753317 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 15:53:46.756396 CPU physical address size: 39 bits
2014 15:53:46.759771 call enable_fixed_mtrr()
2015 15:53:46.763333 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 15:53:46.769691 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 15:53:46.773268 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 15:53:46.776610 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 15:53:46.780156 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 15:53:46.786177 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 15:53:46.789697 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 15:53:46.793090 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 15:53:46.796638 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 15:53:46.802871 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 15:53:46.805667 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 15:53:46.809466 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 15:53:46.815852 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 15:53:46.819121 MTRR: Fixed MSR 0x259 0x0000000000000000
2029 15:53:46.822331 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 15:53:46.825816 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 15:53:46.832231 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 15:53:46.835764 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 15:53:46.838863 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 15:53:46.841945 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 15:53:46.849040 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 15:53:46.851958 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 15:53:46.855211 call enable_fixed_mtrr()
2038 15:53:46.858483 call enable_fixed_mtrr()
2039 15:53:46.861849 CPU physical address size: 39 bits
2040 15:53:46.865224 CPU physical address size: 39 bits
2041 15:53:46.868740 CPU physical address size: 39 bits
2042 15:53:46.871598 Reading cr50 TPM mode
2043 15:53:46.881285 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2044 15:53:46.890753 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2045 15:53:46.894195 Checking segment from ROM address 0xffc02b38
2046 15:53:46.897712 Checking segment from ROM address 0xffc02b54
2047 15:53:46.904200 Loading segment from ROM address 0xffc02b38
2048 15:53:46.904293 code (compression=0)
2049 15:53:46.913920 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2050 15:53:46.923587 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2051 15:53:46.923701 it's not compressed!
2052 15:53:47.063865 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2053 15:53:47.070516 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2054 15:53:47.077462 Loading segment from ROM address 0xffc02b54
2055 15:53:47.080167 Entry Point 0x30000000
2056 15:53:47.080614 Loaded segments
2057 15:53:47.087307 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2058 15:53:47.129941 Finalizing chipset.
2059 15:53:47.133349 Finalizing SMM.
2060 15:53:47.133797 APMC done.
2061 15:53:47.140295 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2062 15:53:47.143536 mp_park_aps done after 0 msecs.
2063 15:53:47.146341 Jumping to boot code at 0x30000000(0x76b25000)
2064 15:53:47.156112 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2065 15:53:47.156572
2066 15:53:47.159460
2067 15:53:47.160186
2068 15:53:47.161730 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2069 15:53:47.162500 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2070 15:53:47.163117 Setting prompt string to ['volteer:']
2071 15:53:47.163814 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2072 15:53:47.164844 Starting depthcharge on Voema...
2073 15:53:47.165384
2074 15:53:47.169263 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2075 15:53:47.169855
2076 15:53:47.176091 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2077 15:53:47.176675
2078 15:53:47.182707 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2079 15:53:47.183102
2080 15:53:47.185272 Failed to find eMMC card reader
2081 15:53:47.185362
2082 15:53:47.188516 Wipe memory regions:
2083 15:53:47.188615
2084 15:53:47.191848 [0x00000000001000, 0x000000000a0000)
2085 15:53:47.191932
2086 15:53:47.195290 [0x00000000100000, 0x00000030000000)
2087 15:53:47.220616
2088 15:53:47.224034 [0x00000032662db0, 0x000000769ef000)
2089 15:53:47.260032
2090 15:53:47.263459 [0x00000100000000, 0x00000280400000)
2091 15:53:47.464751
2092 15:53:47.467708 ec_init: CrosEC protocol v3 supported (256, 256)
2093 15:53:47.467872
2094 15:53:47.474718 update_port_state: port C0 state: usb enable 1 mux conn 0
2095 15:53:47.474879
2096 15:53:47.481906 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2097 15:53:47.484215
2098 15:53:47.491112 pmc_check_ipc_sts: STS_BUSY done after 2366 us
2099 15:53:47.491209
2100 15:53:47.494753 send_conn_disc_msg: pmc_send_cmd succeeded
2101 15:53:47.925087
2102 15:53:47.925619 R8152: Initializing
2103 15:53:47.926011
2104 15:53:47.928255 Version 6 (ocp_data = 5c30)
2105 15:53:47.928799
2106 15:53:47.931774 R8152: Done initializing
2107 15:53:47.932329
2108 15:53:47.934635 Adding net device
2109 15:53:48.236156
2110 15:53:48.238981 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2111 15:53:48.239077
2112 15:53:48.239148
2113 15:53:48.239213
2114 15:53:48.242746 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2116 15:53:48.343595 volteer: tftpboot 192.168.201.1 9406207/tftp-deploy-ollxsbe_/kernel/bzImage 9406207/tftp-deploy-ollxsbe_/kernel/cmdline 9406207/tftp-deploy-ollxsbe_/ramdisk/ramdisk.cpio.gz
2117 15:53:48.343836 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2118 15:53:48.343963 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2119 15:53:48.347831 tftpboot 192.168.201.1 9406207/tftp-deploy-ollxsbe_/kernel/bzImoy-ollxsbe_/kernel/cmdline 9406207/tftp-deploy-ollxsbe_/ramdisk/ramdisk.cpio.gz
2120 15:53:48.347928
2121 15:53:48.347999 Waiting for link
2122 15:53:48.552308
2123 15:53:48.552491 done.
2124 15:53:48.552627
2125 15:53:48.552696 MAC: 00:24:32:30:79:42
2126 15:53:48.552760
2127 15:53:48.555567 Sending DHCP discover... done.
2128 15:53:48.555660
2129 15:53:48.558926 Waiting for reply... done.
2130 15:53:48.559017
2131 15:53:48.562138 Sending DHCP request... done.
2132 15:53:48.562230
2133 15:53:48.565117 Waiting for reply... done.
2134 15:53:48.568055
2135 15:53:48.568144 My ip is 192.168.201.13
2136 15:53:48.568214
2137 15:53:48.571267 The DHCP server ip is 192.168.201.1
2138 15:53:48.571363
2139 15:53:48.577763 TFTP server IP predefined by user: 192.168.201.1
2140 15:53:48.577860
2141 15:53:48.584510 Bootfile predefined by user: 9406207/tftp-deploy-ollxsbe_/kernel/bzImage
2142 15:53:48.584614
2143 15:53:48.587556 Sending tftp read request... done.
2144 15:53:48.587650
2145 15:53:48.590945 Waiting for the transfer...
2146 15:53:48.591094
2147 15:53:49.125499 00000000 ################################################################
2148 15:53:49.125666
2149 15:53:49.646059 00080000 ################################################################
2150 15:53:49.646222
2151 15:53:50.193278 00100000 ################################################################
2152 15:53:50.193451
2153 15:53:50.739466 00180000 ################################################################
2154 15:53:50.739610
2155 15:53:51.280146 00200000 ################################################################
2156 15:53:51.280310
2157 15:53:51.811522 00280000 ################################################################
2158 15:53:51.811685
2159 15:53:52.367984 00300000 ################################################################
2160 15:53:52.368146
2161 15:53:52.914542 00380000 ################################################################
2162 15:53:52.914694
2163 15:53:53.463354 00400000 ################################################################
2164 15:53:53.463517
2165 15:53:53.980350 00480000 ################################################################
2166 15:53:53.980543
2167 15:53:54.518381 00500000 ################################################################
2168 15:53:54.518534
2169 15:53:55.052760 00580000 ################################################################
2170 15:53:55.052924
2171 15:53:55.594178 00600000 ################################################################
2172 15:53:55.594331
2173 15:53:56.124419 00680000 ################################################################
2174 15:53:56.124574
2175 15:53:56.657025 00700000 ################################################################
2176 15:53:56.657178
2177 15:53:57.189576 00780000 ################################################################
2178 15:53:57.189734
2179 15:53:57.714280 00800000 ################################################################
2180 15:53:57.714424
2181 15:53:58.250714 00880000 ################################################################
2182 15:53:58.250860
2183 15:53:58.512124 00900000 ################################## done.
2184 15:53:58.512282
2185 15:53:58.515509 The bootfile was 9707520 bytes long.
2186 15:53:58.515597
2187 15:53:58.518937 Sending tftp read request... done.
2188 15:53:58.519025
2189 15:53:58.522081 Waiting for the transfer...
2190 15:53:58.522168
2191 15:53:59.056617 00000000 ################################################################
2192 15:53:59.056781
2193 15:53:59.619286 00080000 ################################################################
2194 15:53:59.619439
2195 15:54:00.219192 00100000 ################################################################
2196 15:54:00.219337
2197 15:54:00.845455 00180000 ################################################################
2198 15:54:00.845601
2199 15:54:01.452792 00200000 ################################################################
2200 15:54:01.452947
2201 15:54:02.052654 00280000 ################################################################
2202 15:54:02.052815
2203 15:54:02.665153 00300000 ################################################################
2204 15:54:02.665679
2205 15:54:03.349949 00380000 ################################################################
2206 15:54:03.350090
2207 15:54:03.927592 00400000 ################################################################
2208 15:54:03.927778
2209 15:54:04.506755 00480000 ################################################################
2210 15:54:04.506901
2211 15:54:05.065766 00500000 ################################################################
2212 15:54:05.065920
2213 15:54:05.627941 00580000 ################################################################
2214 15:54:05.628082
2215 15:54:06.194348 00600000 ################################################################
2216 15:54:06.194488
2217 15:54:06.745939 00680000 ################################################################
2218 15:54:06.746103
2219 15:54:07.317345 00700000 ################################################################
2220 15:54:07.317489
2221 15:54:07.879171 00780000 ################################################################
2222 15:54:07.879314
2223 15:54:08.445836 00800000 ################################################################
2224 15:54:08.445976
2225 15:54:09.016066 00880000 ################################################################
2226 15:54:09.016210
2227 15:54:09.602811 00900000 ################################################################
2228 15:54:09.602992
2229 15:54:10.166522 00980000 ################################################################
2230 15:54:10.166665
2231 15:54:10.741086 00a00000 ################################################################
2232 15:54:10.741233
2233 15:54:11.295242 00a80000 ################################################################
2234 15:54:11.295401
2235 15:54:11.858391 00b00000 ################################################################
2236 15:54:11.858538
2237 15:54:12.455677 00b80000 ################################################################
2238 15:54:12.456186
2239 15:54:13.095956 00c00000 ################################################################
2240 15:54:13.096112
2241 15:54:13.692417 00c80000 ################################################################
2242 15:54:13.692695
2243 15:54:14.277854 00d00000 ################################################################
2244 15:54:14.277993
2245 15:54:14.801793 00d80000 ################################################################
2246 15:54:14.801931
2247 15:54:15.336424 00e00000 ################################################################
2248 15:54:15.336567
2249 15:54:15.906527 00e80000 ################################################################
2250 15:54:15.906678
2251 15:54:16.490277 00f00000 ################################################################
2252 15:54:16.490427
2253 15:54:17.058220 00f80000 ################################################################
2254 15:54:17.058362
2255 15:54:17.632447 01000000 ################################################################
2256 15:54:17.632591
2257 15:54:18.199498 01080000 ################################################################
2258 15:54:18.199636
2259 15:54:18.769369 01100000 ################################################################
2260 15:54:18.769515
2261 15:54:19.351388 01180000 ################################################################
2262 15:54:19.351530
2263 15:54:19.921428 01200000 ################################################################
2264 15:54:19.921588
2265 15:54:20.472982 01280000 ################################################################
2266 15:54:20.473122
2267 15:54:21.023075 01300000 ################################################################
2268 15:54:21.023218
2269 15:54:21.586503 01380000 ################################################################
2270 15:54:21.586639
2271 15:54:22.154305 01400000 ################################################################
2272 15:54:22.154446
2273 15:54:22.718692 01480000 ################################################################
2274 15:54:22.718833
2275 15:54:23.273761 01500000 ################################################################
2276 15:54:23.273904
2277 15:54:23.846837 01580000 ################################################################
2278 15:54:23.846978
2279 15:54:24.407373 01600000 ################################################################
2280 15:54:24.407520
2281 15:54:24.962156 01680000 ################################################################
2282 15:54:24.962302
2283 15:54:25.516636 01700000 ################################################################
2284 15:54:25.516782
2285 15:54:26.051943 01780000 ################################################################
2286 15:54:26.052083
2287 15:54:26.642291 01800000 ################################################################
2288 15:54:26.642775
2289 15:54:27.306476 01880000 ################################################################
2290 15:54:27.306958
2291 15:54:27.970975 01900000 ################################################################
2292 15:54:27.971117
2293 15:54:28.642176 01980000 ################################################################
2294 15:54:28.642734
2295 15:54:29.339436 01a00000 ################################################################
2296 15:54:29.339987
2297 15:54:30.025417 01a80000 ################################################################
2298 15:54:30.025951
2299 15:54:30.714049 01b00000 ################################################################
2300 15:54:30.714571
2301 15:54:31.407816 01b80000 ################################################################
2302 15:54:31.408366
2303 15:54:32.110233 01c00000 ################################################################
2304 15:54:32.110799
2305 15:54:32.822905 01c80000 ################################################################
2306 15:54:32.823499
2307 15:54:33.526704 01d00000 ################################################################
2308 15:54:33.526918
2309 15:54:34.222778 01d80000 ################################################################
2310 15:54:34.223318
2311 15:54:34.919851 01e00000 ################################################################
2312 15:54:34.920411
2313 15:54:35.629365 01e80000 ################################################################
2314 15:54:35.629958
2315 15:54:36.331813 01f00000 ################################################################
2316 15:54:36.332336
2317 15:54:36.865432 01f80000 ################################################################
2318 15:54:36.865580
2319 15:54:37.390595 02000000 ################################################################
2320 15:54:37.390748
2321 15:54:37.926642 02080000 ################################################################
2322 15:54:37.926872
2323 15:54:38.458351 02100000 ################################################################
2324 15:54:38.458499
2325 15:54:38.983749 02180000 ################################################################
2326 15:54:38.983903
2327 15:54:39.218307 02200000 ######################### done.
2328 15:54:39.218840
2329 15:54:39.221701 Sending tftp read request... done.
2330 15:54:39.222218
2331 15:54:39.225457 Waiting for the transfer...
2332 15:54:39.225942
2333 15:54:39.226314 00000000 # done.
2334 15:54:39.226681
2335 15:54:39.234946 Command line loaded dynamically from TFTP file: 9406207/tftp-deploy-ollxsbe_/kernel/cmdline
2336 15:54:39.235397
2337 15:54:39.247818 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2338 15:54:39.256609
2339 15:54:39.259715 Shutting down all USB controllers.
2340 15:54:39.260210
2341 15:54:39.260571 Removing current net device
2342 15:54:39.260907
2343 15:54:39.262695 Finalizing coreboot
2344 15:54:39.263143
2345 15:54:39.269206 Exiting depthcharge with code 4 at timestamp: 60832829
2346 15:54:39.269657
2347 15:54:39.270015
2348 15:54:39.270350 Starting kernel ...
2349 15:54:39.270678
2350 15:54:39.272164 end: 2.2.4 bootloader-commands (duration 00:00:52) [common]
2351 15:54:39.272665 start: 2.2.5 auto-login-action (timeout 00:03:50) [common]
2352 15:54:39.273045 Setting prompt string to ['Linux version [0-9]']
2353 15:54:39.273415 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2354 15:54:39.273777 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2355 15:54:39.274666
2357 15:58:29.272904 end: 2.2.5 auto-login-action (duration 00:03:50) [common]
2359 15:58:29.273115 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 230 seconds'
2361 15:58:29.273275 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2364 15:58:29.273541 end: 2 depthcharge-action (duration 00:05:00) [common]
2366 15:58:29.273804 Cleaning after the job
2367 15:58:29.273891 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406207/tftp-deploy-ollxsbe_/ramdisk
2368 15:58:29.276217 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406207/tftp-deploy-ollxsbe_/kernel
2369 15:58:29.276918 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406207/tftp-deploy-ollxsbe_/modules
2370 15:58:29.277116 start: 4.1 power-off (timeout 00:00:30) [common]
2371 15:58:29.277267 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2372 15:58:31.453497 >> Command sent successfully.
2373 15:58:31.455903 Returned 0 in 2 seconds
2374 15:58:31.556726 end: 4.1 power-off (duration 00:00:02) [common]
2376 15:58:31.557056 start: 4.2 read-feedback (timeout 00:09:58) [common]
2377 15:58:31.557307 Listened to connection for namespace 'common' for up to 1s
2378 15:58:32.559887 Finalising connection for namespace 'common'
2379 15:58:32.560620 Disconnecting from shell: Finalise
2380 15:58:32.561187
2381 15:58:32.662036 end: 4.2 read-feedback (duration 00:00:01) [common]
2382 15:58:32.662204 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9406207
2383 15:58:32.688517 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9406207
2384 15:58:32.688709 JobError: Your job cannot terminate cleanly.