Boot log: asus-cx9400-volteer

    1 15:52:11.580374  lava-dispatcher, installed at version: 2022.11
    2 15:52:11.580567  start: 0 validate
    3 15:52:11.580699  Start time: 2023-03-03 15:52:11.580692+00:00 (UTC)
    4 15:52:11.580831  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:52:11.580962  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230224.0%2Famd64%2Finitrd.cpio.gz exists
    6 15:52:11.583747  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:52:11.583874  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:52:11.857782  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:52:11.857965  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230224.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 15:52:11.864204  Using caching service: 'http://localhost/cache/?uri=%s'
   11 15:52:11.864339  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 15:52:12.155099  validate duration: 0.57
   14 15:52:12.155483  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 15:52:12.155626  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 15:52:12.155757  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 15:52:12.155895  Not decompressing ramdisk as can be used compressed.
   18 15:52:12.156137  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230224.0/amd64/initrd.cpio.gz
   19 15:52:12.156242  saving as /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/ramdisk/initrd.cpio.gz
   20 15:52:12.156338  total size: 5432097 (5MB)
   21 15:52:12.444224  progress   0% (0MB)
   22 15:52:12.446679  progress   5% (0MB)
   23 15:52:12.448837  progress  10% (0MB)
   24 15:52:12.451138  progress  15% (0MB)
   25 15:52:12.453524  progress  20% (1MB)
   26 15:52:12.455868  progress  25% (1MB)
   27 15:52:12.458044  progress  30% (1MB)
   28 15:52:12.460642  progress  35% (1MB)
   29 15:52:12.462836  progress  40% (2MB)
   30 15:52:12.464987  progress  45% (2MB)
   31 15:52:12.467268  progress  50% (2MB)
   32 15:52:12.469775  progress  55% (2MB)
   33 15:52:12.472033  progress  60% (3MB)
   34 15:52:12.474491  progress  65% (3MB)
   35 15:52:12.476885  progress  70% (3MB)
   36 15:52:12.479054  progress  75% (3MB)
   37 15:52:12.481207  progress  80% (4MB)
   38 15:52:12.483389  progress  85% (4MB)
   39 15:52:12.486114  progress  90% (4MB)
   40 15:52:12.488097  progress  95% (4MB)
   41 15:52:12.490110  progress 100% (5MB)
   42 15:52:12.490418  5MB downloaded in 0.33s (15.51MB/s)
   43 15:52:12.490570  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 15:52:12.490826  end: 1.1 download-retry (duration 00:00:00) [common]
   46 15:52:12.490913  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 15:52:12.491014  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 15:52:12.491122  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 15:52:12.491190  saving as /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/kernel/bzImage
   50 15:52:12.491251  total size: 9707520 (9MB)
   51 15:52:12.491311  No compression specified
   52 15:52:12.493557  progress   0% (0MB)
   53 15:52:12.498139  progress   5% (0MB)
   54 15:52:12.502121  progress  10% (0MB)
   55 15:52:12.506228  progress  15% (1MB)
   56 15:52:12.510584  progress  20% (1MB)
   57 15:52:12.514815  progress  25% (2MB)
   58 15:52:12.518809  progress  30% (2MB)
   59 15:52:12.522790  progress  35% (3MB)
   60 15:52:12.526923  progress  40% (3MB)
   61 15:52:12.532238  progress  45% (4MB)
   62 15:52:12.537283  progress  50% (4MB)
   63 15:52:12.540765  progress  55% (5MB)
   64 15:52:12.545375  progress  60% (5MB)
   65 15:52:12.549791  progress  65% (6MB)
   66 15:52:12.553826  progress  70% (6MB)
   67 15:52:12.557625  progress  75% (6MB)
   68 15:52:12.561487  progress  80% (7MB)
   69 15:52:12.565861  progress  85% (7MB)
   70 15:52:12.569908  progress  90% (8MB)
   71 15:52:12.574159  progress  95% (8MB)
   72 15:52:12.578181  progress 100% (9MB)
   73 15:52:12.578389  9MB downloaded in 0.09s (106.25MB/s)
   74 15:52:12.578539  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 15:52:12.578797  end: 1.2 download-retry (duration 00:00:00) [common]
   77 15:52:12.578897  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 15:52:12.579010  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 15:52:12.579119  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230224.0/amd64/full.rootfs.tar.xz
   80 15:52:12.579187  saving as /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/nfsrootfs/full.rootfs.tar
   81 15:52:12.579248  total size: 207207400 (197MB)
   82 15:52:12.579310  Using unxz to decompress xz
   83 15:52:12.583885  progress   0% (0MB)
   84 15:52:13.157488  progress   5% (9MB)
   85 15:52:13.714213  progress  10% (19MB)
   86 15:52:14.322717  progress  15% (29MB)
   87 15:52:14.702689  progress  20% (39MB)
   88 15:52:15.062603  progress  25% (49MB)
   89 15:52:15.658233  progress  30% (59MB)
   90 15:52:16.203839  progress  35% (69MB)
   91 15:52:16.803163  progress  40% (79MB)
   92 15:52:17.357967  progress  45% (88MB)
   93 15:52:17.936595  progress  50% (98MB)
   94 15:52:18.557326  progress  55% (108MB)
   95 15:52:19.238204  progress  60% (118MB)
   96 15:52:19.385242  progress  65% (128MB)
   97 15:52:19.533016  progress  70% (138MB)
   98 15:52:19.632079  progress  75% (148MB)
   99 15:52:19.705174  progress  80% (158MB)
  100 15:52:19.775360  progress  85% (167MB)
  101 15:52:19.877826  progress  90% (177MB)
  102 15:52:20.148785  progress  95% (187MB)
  103 15:52:20.742165  progress 100% (197MB)
  104 15:52:20.747722  197MB downloaded in 8.17s (24.19MB/s)
  105 15:52:20.747973  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 15:52:20.748237  end: 1.3 download-retry (duration 00:00:08) [common]
  108 15:52:20.748328  start: 1.4 download-retry (timeout 00:09:51) [common]
  109 15:52:20.748429  start: 1.4.1 http-download (timeout 00:09:51) [common]
  110 15:52:20.748544  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 15:52:20.748626  saving as /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/modules/modules.tar
  112 15:52:20.748727  total size: 64716 (0MB)
  113 15:52:20.748824  Using unxz to decompress xz
  114 15:52:20.753569  progress  50% (0MB)
  115 15:52:20.753945  progress 100% (0MB)
  116 15:52:20.758123  0MB downloaded in 0.01s (6.57MB/s)
  117 15:52:20.758381  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 15:52:20.758643  end: 1.4 download-retry (duration 00:00:00) [common]
  120 15:52:20.758740  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  121 15:52:20.758848  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  122 15:52:22.793379  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9406191/extract-nfsrootfs-9n2kandx
  123 15:52:22.793591  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 15:52:22.793694  start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
  125 15:52:22.793825  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_
  126 15:52:22.793923  makedir: /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin
  127 15:52:22.794006  makedir: /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/tests
  128 15:52:22.794087  makedir: /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/results
  129 15:52:22.794230  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-add-keys
  130 15:52:22.794360  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-add-sources
  131 15:52:22.794479  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-background-process-start
  132 15:52:22.794593  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-background-process-stop
  133 15:52:22.794702  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-common-functions
  134 15:52:22.794808  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-echo-ipv4
  135 15:52:22.794914  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-install-packages
  136 15:52:22.795018  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-installed-packages
  137 15:52:22.795121  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-os-build
  138 15:52:22.795224  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-probe-channel
  139 15:52:22.795327  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-probe-ip
  140 15:52:22.795430  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-target-ip
  141 15:52:22.795533  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-target-mac
  142 15:52:22.795636  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-target-storage
  143 15:52:22.795742  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-test-case
  144 15:52:22.795847  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-test-event
  145 15:52:22.795949  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-test-feedback
  146 15:52:22.796051  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-test-raise
  147 15:52:22.796154  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-test-reference
  148 15:52:22.796256  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-test-runner
  149 15:52:22.796359  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-test-set
  150 15:52:22.796460  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-test-shell
  151 15:52:22.796567  Updating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-add-keys (debian)
  152 15:52:22.796675  Updating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-add-sources (debian)
  153 15:52:22.796781  Updating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-install-packages (debian)
  154 15:52:22.796886  Updating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-installed-packages (debian)
  155 15:52:22.796991  Updating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/bin/lava-os-build (debian)
  156 15:52:22.797081  Creating /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/environment
  157 15:52:22.797161  LAVA metadata
  158 15:52:22.797223  - LAVA_JOB_ID=9406191
  159 15:52:22.797282  - LAVA_DISPATCHER_IP=192.168.201.1
  160 15:52:22.797375  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
  161 15:52:22.797437  skipped lava-vland-overlay
  162 15:52:22.797510  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  163 15:52:22.797588  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
  164 15:52:22.797647  skipped lava-multinode-overlay
  165 15:52:22.797717  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  166 15:52:22.797794  start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
  167 15:52:22.797862  Loading test definitions
  168 15:52:22.797947  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
  169 15:52:22.798016  Using /lava-9406191 at stage 0
  170 15:52:22.798277  uuid=9406191_1.5.2.3.1 testdef=None
  171 15:52:22.798361  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  172 15:52:22.798443  start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
  173 15:52:22.798842  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  175 15:52:22.799066  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
  176 15:52:22.799556  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  178 15:52:22.799792  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
  179 15:52:22.800236  runner path: /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/0/tests/0_timesync-off test_uuid 9406191_1.5.2.3.1
  180 15:52:22.800376  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  182 15:52:22.800602  start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
  183 15:52:22.800673  Using /lava-9406191 at stage 0
  184 15:52:22.800765  Fetching tests from https://github.com/kernelci/test-definitions.git
  185 15:52:22.800843  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/0/tests/1_kselftest-alsa'
  186 15:52:39.203609  Running '/usr/bin/git checkout kernelci.org
  187 15:52:39.340113  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
  188 15:52:39.340806  uuid=9406191_1.5.2.3.5 testdef=None
  189 15:52:39.340972  end: 1.5.2.3.5 git-repo-action (duration 00:00:17) [common]
  191 15:52:39.341224  start: 1.5.2.3.6 test-overlay (timeout 00:09:33) [common]
  192 15:52:39.341964  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  194 15:52:39.342258  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:33) [common]
  195 15:52:39.343172  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  197 15:52:39.343432  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:33) [common]
  198 15:52:39.344392  runner path: /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/0/tests/1_kselftest-alsa test_uuid 9406191_1.5.2.3.5
  199 15:52:39.344482  BOARD='asus-cx9400-volteer'
  200 15:52:39.344548  BRANCH='cip-gitlab'
  201 15:52:39.344608  SKIPFILE='skipfile-lkft.yaml'
  202 15:52:39.344667  SKIP_INSTALL='True'
  203 15:52:39.344727  TESTPROG_URL='None'
  204 15:52:39.344784  TST_CASENAME=''
  205 15:52:39.344842  TST_CMDFILES='alsa'
  206 15:52:39.344974  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  208 15:52:39.345193  Creating lava-test-runner.conf files
  209 15:52:39.345258  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406191/lava-overlay-uca17n9_/lava-9406191/0 for stage 0
  210 15:52:39.345348  - 0_timesync-off
  211 15:52:39.345417  - 1_kselftest-alsa
  212 15:52:39.345507  end: 1.5.2.3 test-definition (duration 00:00:17) [common]
  213 15:52:39.345592  start: 1.5.2.4 compress-overlay (timeout 00:09:33) [common]
  214 15:52:46.912186  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  215 15:52:46.912348  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:25) [common]
  216 15:52:46.912444  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  217 15:52:46.912550  end: 1.5.2 lava-overlay (duration 00:00:24) [common]
  218 15:52:46.912646  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:25) [common]
  219 15:52:47.015183  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  220 15:52:47.015530  start: 1.5.4 extract-modules (timeout 00:09:25) [common]
  221 15:52:47.015645  extracting modules file /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406191/extract-nfsrootfs-9n2kandx
  222 15:52:47.019752  extracting modules file /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406191/extract-overlay-ramdisk-7fy0tqul/ramdisk
  223 15:52:47.023594  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  224 15:52:47.023703  start: 1.5.5 apply-overlay-tftp (timeout 00:09:25) [common]
  225 15:52:47.023794  [common] Applying overlay to NFS
  226 15:52:47.023872  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9406191/compress-overlay-jhkx8idw/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9406191/extract-nfsrootfs-9n2kandx
  227 15:52:47.491122  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  228 15:52:47.491286  start: 1.5.6 configure-preseed-file (timeout 00:09:25) [common]
  229 15:52:47.491389  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  230 15:52:47.491479  start: 1.5.7 compress-ramdisk (timeout 00:09:25) [common]
  231 15:52:47.491571  Building ramdisk /var/lib/lava/dispatcher/tmp/9406191/extract-overlay-ramdisk-7fy0tqul/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9406191/extract-overlay-ramdisk-7fy0tqul/ramdisk
  232 15:52:47.525625  >> 24777 blocks

  233 15:52:47.997012  rename /var/lib/lava/dispatcher/tmp/9406191/extract-overlay-ramdisk-7fy0tqul/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/ramdisk/ramdisk.cpio.gz
  234 15:52:47.997417  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  235 15:52:47.997544  start: 1.5.8 prepare-kernel (timeout 00:09:24) [common]
  236 15:52:47.997660  start: 1.5.8.1 prepare-fit (timeout 00:09:24) [common]
  237 15:52:47.997754  No mkimage arch provided, not using FIT.
  238 15:52:47.997846  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  239 15:52:47.997932  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  240 15:52:47.998032  end: 1.5 prepare-tftp-overlay (duration 00:00:27) [common]
  241 15:52:47.998142  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:24) [common]
  242 15:52:47.998256  No LXC device requested
  243 15:52:47.998342  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  244 15:52:47.998429  start: 1.7 deploy-device-env (timeout 00:09:24) [common]
  245 15:52:47.998511  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  246 15:52:47.998591  Checking files for TFTP limit of 4294967296 bytes.
  247 15:52:47.999006  end: 1 tftp-deploy (duration 00:00:36) [common]
  248 15:52:47.999109  start: 2 depthcharge-action (timeout 00:05:00) [common]
  249 15:52:47.999211  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  250 15:52:47.999346  substitutions:
  251 15:52:47.999414  - {DTB}: None
  252 15:52:47.999477  - {INITRD}: 9406191/tftp-deploy-eqpi0a5a/ramdisk/ramdisk.cpio.gz
  253 15:52:47.999538  - {KERNEL}: 9406191/tftp-deploy-eqpi0a5a/kernel/bzImage
  254 15:52:47.999598  - {LAVA_MAC}: None
  255 15:52:47.999655  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9406191/extract-nfsrootfs-9n2kandx
  256 15:52:47.999722  - {NFS_SERVER_IP}: 192.168.201.1
  257 15:52:47.999782  - {PRESEED_CONFIG}: None
  258 15:52:47.999846  - {PRESEED_LOCAL}: None
  259 15:52:47.999902  - {RAMDISK}: 9406191/tftp-deploy-eqpi0a5a/ramdisk/ramdisk.cpio.gz
  260 15:52:47.999959  - {ROOT_PART}: None
  261 15:52:48.000014  - {ROOT}: None
  262 15:52:48.000070  - {SERVER_IP}: 192.168.201.1
  263 15:52:48.000125  - {TEE}: None
  264 15:52:48.000180  Parsed boot commands:
  265 15:52:48.000244  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  266 15:52:48.000400  Parsed boot commands: tftpboot 192.168.201.1 9406191/tftp-deploy-eqpi0a5a/kernel/bzImage 9406191/tftp-deploy-eqpi0a5a/kernel/cmdline 9406191/tftp-deploy-eqpi0a5a/ramdisk/ramdisk.cpio.gz
  267 15:52:48.000491  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  268 15:52:48.000579  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  269 15:52:48.000675  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  270 15:52:48.000774  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  271 15:52:48.000845  Not connected, no need to disconnect.
  272 15:52:48.000925  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  273 15:52:48.001008  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  274 15:52:48.001077  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
  275 15:52:48.004096  Setting prompt string to ['lava-test: # ']
  276 15:52:48.004398  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  277 15:52:48.004508  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  278 15:52:48.004606  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  279 15:52:48.004695  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  280 15:52:48.004880  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
  281 15:52:57.371391  >> Command sent successfully.

  282 15:52:57.380723  Returned 0 in 9 seconds
  283 15:52:57.482415  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  285 15:52:57.483901  end: 2.2.2 reset-device (duration 00:00:09) [common]
  286 15:52:57.484427  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  287 15:52:57.484887  Setting prompt string to 'Starting depthcharge on Voema...'
  288 15:52:57.485243  Changing prompt to 'Starting depthcharge on Voema...'
  289 15:52:57.485604  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  290 15:52:57.486901  [Enter `^Ec?' for help]

  291 15:52:57.487389  

  292 15:52:57.487979  

  293 15:52:57.488341  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  294 15:52:57.488686  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  295 15:52:57.489001  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  296 15:52:57.489305  CPU: AES supported, TXT NOT supported, VT supported

  297 15:52:57.489605  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  298 15:52:57.489909  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  299 15:52:57.490289  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  300 15:52:57.490687  VBOOT: Loading verstage.

  301 15:52:57.490996  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  302 15:52:57.491290  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  303 15:52:57.491586  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  304 15:52:57.491879  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  305 15:52:57.492212  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  306 15:52:57.492506  

  307 15:52:57.492791  

  308 15:52:57.493103  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  309 15:52:57.493399  Probing TPM: . done!

  310 15:52:57.493712  TPM ready after 0 ms

  311 15:52:57.494006  Connected to device vid:did:rid of 1ae0:0028:00

  312 15:52:57.494353  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  313 15:52:57.494659  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  314 15:52:57.494950  Initialized TPM device CR50 revision 0

  315 15:52:57.495235  tlcl_send_startup: Startup return code is 0

  316 15:52:57.495520  TPM: setup succeeded

  317 15:52:57.495807  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  318 15:52:57.496090  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  319 15:52:57.496372  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  320 15:52:57.496662  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  321 15:52:57.496945  Chrome EC: UHEPI supported

  322 15:52:57.497287  Phase 1

  323 15:52:57.497610  FMAP: area GBB found @ 1805000 (458752 bytes)

  324 15:52:57.497933  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  325 15:52:57.498265  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  326 15:52:57.498556  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  327 15:52:57.498843  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  328 15:52:57.499129  Recovery requested (1009000e)

  329 15:52:57.499410  TPM: Extending digest for VBOOT: boot mode into PCR 0

  330 15:52:57.499697  tlcl_extend: response is 0

  331 15:52:57.499981  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  332 15:52:57.500292  tlcl_extend: response is 0

  333 15:52:57.500594  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  334 15:52:57.500947  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  335 15:52:57.501265  BS: verstage times (exec / console): total (unknown) / 142 ms

  336 15:52:57.501555  

  337 15:52:57.501836  

  338 15:52:57.502119  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  339 15:52:57.502449  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  340 15:52:57.502734  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  341 15:52:57.503017  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  342 15:52:57.503299  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  343 15:52:57.503581  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  344 15:52:57.503929  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  345 15:52:57.504250  TCO_STS:   0000 0000

  346 15:52:57.504546  GEN_PMCON: d0015038 00002200

  347 15:52:57.504866  GBLRST_CAUSE: 00000000 00000000

  348 15:52:57.505155  HPR_CAUSE0: 00000000

  349 15:52:57.505438  prev_sleep_state 5

  350 15:52:57.505772  Boot Count incremented to 16695

  351 15:52:57.506090  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  352 15:52:57.506418  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  353 15:52:57.506709  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  354 15:52:57.507056  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  355 15:52:57.507373  Chrome EC: UHEPI supported

  356 15:52:57.507677  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  357 15:52:57.508255  Probing TPM:  done!

  358 15:52:57.508560  Connected to device vid:did:rid of 1ae0:0028:00

  359 15:52:57.516235  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  360 15:52:57.522841  Initialized TPM device CR50 revision 0

  361 15:52:57.533339  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  362 15:52:57.539472  MRC: Hash idx 0x100b comparison successful.

  363 15:52:57.543051  MRC cache found, size faa8

  364 15:52:57.543362  bootmode is set to: 2

  365 15:52:57.545957  SPD index = 0

  366 15:52:57.552944  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  367 15:52:57.555977  SPD: module type is LPDDR4X

  368 15:52:57.562664  SPD: module part number is MT53E512M64D4NW-046

  369 15:52:57.569536  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  370 15:52:57.572553  SPD: device width 16 bits, bus width 16 bits

  371 15:52:57.576098  SPD: module size is 1024 MB (per channel)

  372 15:52:58.007600  CBMEM:

  373 15:52:58.011117  IMD: root @ 0x76fff000 254 entries.

  374 15:52:58.014103  IMD: root @ 0x76ffec00 62 entries.

  375 15:52:58.017661  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  376 15:52:58.024274  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  377 15:52:58.027475  External stage cache:

  378 15:52:58.030966  IMD: root @ 0x7b3ff000 254 entries.

  379 15:52:58.034457  IMD: root @ 0x7b3fec00 62 entries.

  380 15:52:58.049750  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  381 15:52:58.056203  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  382 15:52:58.062720  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  383 15:52:58.077130  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  384 15:52:58.084546  cse_lite: Skip switching to RW in the recovery path

  385 15:52:58.085058  8 DIMMs found

  386 15:52:58.085422  SMM Memory Map

  387 15:52:58.087790  SMRAM       : 0x7b000000 0x800000

  388 15:52:58.091556   Subregion 0: 0x7b000000 0x200000

  389 15:52:58.095171   Subregion 1: 0x7b200000 0x200000

  390 15:52:58.098078   Subregion 2: 0x7b400000 0x400000

  391 15:52:58.101130  top_of_ram = 0x77000000

  392 15:52:58.108396  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  393 15:52:58.111460  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  394 15:52:58.118190  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  395 15:52:58.121157  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  396 15:52:58.131383  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  397 15:52:58.134413  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  398 15:52:58.146943  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  399 15:52:58.153061  Processing 211 relocs. Offset value of 0x74c0b000

  400 15:52:58.160189  BS: romstage times (exec / console): total (unknown) / 277 ms

  401 15:52:58.166427  

  402 15:52:58.166911  

  403 15:52:58.175848  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  404 15:52:58.179472  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  405 15:52:58.189285  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  406 15:52:58.196052  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  407 15:52:58.202478  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  408 15:52:58.209179  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  409 15:52:58.256196  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  410 15:52:58.263086  Processing 5008 relocs. Offset value of 0x75d98000

  411 15:52:58.266029  BS: postcar times (exec / console): total (unknown) / 59 ms

  412 15:52:58.269079  

  413 15:52:58.269561  

  414 15:52:58.279386  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  415 15:52:58.279869  Normal boot

  416 15:52:58.283296  FW_CONFIG value is 0x804c02

  417 15:52:58.286197  PCI: 00:07.0 disabled by fw_config

  418 15:52:58.289537  PCI: 00:07.1 disabled by fw_config

  419 15:52:58.292469  PCI: 00:0d.2 disabled by fw_config

  420 15:52:58.296171  PCI: 00:1c.7 disabled by fw_config

  421 15:52:58.303082  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  422 15:52:58.309618  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  423 15:52:58.312762  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  424 15:52:58.316612  GENERIC: 0.0 disabled by fw_config

  425 15:52:58.319555  GENERIC: 1.0 disabled by fw_config

  426 15:52:58.325990  fw_config match found: DB_USB=USB3_ACTIVE

  427 15:52:58.329100  fw_config match found: DB_USB=USB3_ACTIVE

  428 15:52:58.332751  fw_config match found: DB_USB=USB3_ACTIVE

  429 15:52:58.339099  fw_config match found: DB_USB=USB3_ACTIVE

  430 15:52:58.342657  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  431 15:52:58.349172  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  432 15:52:58.359318  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  433 15:52:58.365633  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  434 15:52:58.369033  microcode: sig=0x806c1 pf=0x80 revision=0x86

  435 15:52:58.375181  microcode: Update skipped, already up-to-date

  436 15:52:58.381761  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  437 15:52:58.409841  Detected 4 core, 8 thread CPU.

  438 15:52:58.412808  Setting up SMI for CPU

  439 15:52:58.415977  IED base = 0x7b400000

  440 15:52:58.416418  IED size = 0x00400000

  441 15:52:58.419606  Will perform SMM setup.

  442 15:52:58.426342  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  443 15:52:58.433010  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  444 15:52:58.439256  Processing 16 relocs. Offset value of 0x00030000

  445 15:52:58.442585  Attempting to start 7 APs

  446 15:52:58.446041  Waiting for 10ms after sending INIT.

  447 15:52:58.461852  Waiting for 1st SIPI to complete...done.

  448 15:52:58.462403  AP: slot 1 apic_id 1.

  449 15:52:58.468183  Waiting for 2nd SIPI to complete...done.

  450 15:52:58.468673  AP: slot 7 apic_id 7.

  451 15:52:58.471397  AP: slot 3 apic_id 6.

  452 15:52:58.475040  AP: slot 2 apic_id 3.

  453 15:52:58.475480  AP: slot 6 apic_id 2.

  454 15:52:58.478086  AP: slot 4 apic_id 5.

  455 15:52:58.481460  AP: slot 5 apic_id 4.

  456 15:52:58.487949  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  457 15:52:58.495055  Processing 13 relocs. Offset value of 0x00038000

  458 15:52:58.498007  Unable to locate Global NVS

  459 15:52:58.504736  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  460 15:52:58.507901  Installing permanent SMM handler to 0x7b000000

  461 15:52:58.517754  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  462 15:52:58.521457  Processing 794 relocs. Offset value of 0x7b010000

  463 15:52:58.530970  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  464 15:52:58.534109  Processing 13 relocs. Offset value of 0x7b008000

  465 15:52:58.541178  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  466 15:52:58.547909  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  467 15:52:58.550690  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  468 15:52:58.557605  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  469 15:52:58.564098  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  470 15:52:58.570594  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  471 15:52:58.577473  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  472 15:52:58.580489  Unable to locate Global NVS

  473 15:52:58.587121  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  474 15:52:58.590152  Clearing SMI status registers

  475 15:52:58.593892  SMI_STS: PM1 

  476 15:52:58.594443  PM1_STS: PWRBTN 

  477 15:52:58.600346  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  478 15:52:58.603506  In relocation handler: CPU 0

  479 15:52:58.606984  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  480 15:52:58.613984  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  481 15:52:58.616803  Relocation complete.

  482 15:52:58.623707  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  483 15:52:58.626663  In relocation handler: CPU 1

  484 15:52:58.630554  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  485 15:52:58.633490  Relocation complete.

  486 15:52:58.640052  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  487 15:52:58.643279  In relocation handler: CPU 7

  488 15:52:58.646704  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  489 15:52:58.650092  Relocation complete.

  490 15:52:58.656613  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  491 15:52:58.659842  In relocation handler: CPU 3

  492 15:52:58.662904  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  493 15:52:58.666610  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  494 15:52:58.669474  Relocation complete.

  495 15:52:58.676245  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  496 15:52:58.679872  In relocation handler: CPU 4

  497 15:52:58.682720  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  498 15:52:58.686295  Relocation complete.

  499 15:52:58.692946  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  500 15:52:58.695892  In relocation handler: CPU 5

  501 15:52:58.699597  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  502 15:52:58.706523  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  503 15:52:58.707143  Relocation complete.

  504 15:52:58.716328  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  505 15:52:58.719757  In relocation handler: CPU 2

  506 15:52:58.722702  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  507 15:52:58.723166  Relocation complete.

  508 15:52:58.733279  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  509 15:52:58.733845  In relocation handler: CPU 6

  510 15:52:58.739350  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  511 15:52:58.743149  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  512 15:52:58.746008  Relocation complete.

  513 15:52:58.746489  Initializing CPU #0

  514 15:52:58.749531  CPU: vendor Intel device 806c1

  515 15:52:58.753116  CPU: family 06, model 8c, stepping 01

  516 15:52:58.756447  Clearing out pending MCEs

  517 15:52:58.760222  Setting up local APIC...

  518 15:52:58.763216   apic_id: 0x00 done.

  519 15:52:58.766673  Turbo is available but hidden

  520 15:52:58.769810  Turbo is available and visible

  521 15:52:58.773188  microcode: Update skipped, already up-to-date

  522 15:52:58.776263  CPU #0 initialized

  523 15:52:58.776713  Initializing CPU #1

  524 15:52:58.779805  Initializing CPU #6

  525 15:52:58.780247  Initializing CPU #2

  526 15:52:58.782895  CPU: vendor Intel device 806c1

  527 15:52:58.789738  CPU: family 06, model 8c, stepping 01

  528 15:52:58.790224  CPU: vendor Intel device 806c1

  529 15:52:58.796533  CPU: family 06, model 8c, stepping 01

  530 15:52:58.796969  Clearing out pending MCEs

  531 15:52:58.799545  Clearing out pending MCEs

  532 15:52:58.803445  Setting up local APIC...

  533 15:52:58.807067  Initializing CPU #7

  534 15:52:58.807620  Initializing CPU #3

  535 15:52:58.810270  CPU: vendor Intel device 806c1

  536 15:52:58.813232  CPU: family 06, model 8c, stepping 01

  537 15:52:58.816723  CPU: vendor Intel device 806c1

  538 15:52:58.819801  CPU: family 06, model 8c, stepping 01

  539 15:52:58.823171  Setting up local APIC...

  540 15:52:58.826237  Initializing CPU #5

  541 15:52:58.826679  Initializing CPU #4

  542 15:52:58.829824  CPU: vendor Intel device 806c1

  543 15:52:58.832829  CPU: family 06, model 8c, stepping 01

  544 15:52:58.836015  CPU: vendor Intel device 806c1

  545 15:52:58.843252  CPU: family 06, model 8c, stepping 01

  546 15:52:58.843757  Clearing out pending MCEs

  547 15:52:58.846237  Clearing out pending MCEs

  548 15:52:58.850255  Setting up local APIC...

  549 15:52:58.852831  CPU: vendor Intel device 806c1

  550 15:52:58.855939  CPU: family 06, model 8c, stepping 01

  551 15:52:58.859470   apic_id: 0x02 done.

  552 15:52:58.859921   apic_id: 0x03 done.

  553 15:52:58.866066  microcode: Update skipped, already up-to-date

  554 15:52:58.869252  microcode: Update skipped, already up-to-date

  555 15:52:58.872854  CPU #6 initialized

  556 15:52:58.873297  CPU #2 initialized

  557 15:52:58.875929  Clearing out pending MCEs

  558 15:52:58.879440  Clearing out pending MCEs

  559 15:52:58.882458  Setting up local APIC...

  560 15:52:58.882904  Setting up local APIC...

  561 15:52:58.886173  Setting up local APIC...

  562 15:52:58.889299   apic_id: 0x05 done.

  563 15:52:58.889856   apic_id: 0x04 done.

  564 15:52:58.895621  microcode: Update skipped, already up-to-date

  565 15:52:58.899518  microcode: Update skipped, already up-to-date

  566 15:52:58.902528  CPU #4 initialized

  567 15:52:58.902975  CPU #5 initialized

  568 15:52:58.906189   apic_id: 0x06 done.

  569 15:52:58.909143   apic_id: 0x07 done.

  570 15:52:58.913005  microcode: Update skipped, already up-to-date

  571 15:52:58.916002  microcode: Update skipped, already up-to-date

  572 15:52:58.919044  CPU #3 initialized

  573 15:52:58.922912  Clearing out pending MCEs

  574 15:52:58.923361  CPU #7 initialized

  575 15:52:58.925837  Setting up local APIC...

  576 15:52:58.928980   apic_id: 0x01 done.

  577 15:52:58.932655  microcode: Update skipped, already up-to-date

  578 15:52:58.935783  CPU #1 initialized

  579 15:52:58.939401  bsp_do_flight_plan done after 468 msecs.

  580 15:52:58.942544  CPU: frequency set to 4000 MHz

  581 15:52:58.945456  Enabling SMIs.

  582 15:52:58.952315  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  583 15:52:58.966580  SATAXPCIE1 indicates PCIe NVMe is present

  584 15:52:58.969712  Probing TPM:  done!

  585 15:52:58.973706  Connected to device vid:did:rid of 1ae0:0028:00

  586 15:52:58.983987  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  587 15:52:58.987091  Initialized TPM device CR50 revision 0

  588 15:52:58.990594  Enabling S0i3.4

  589 15:52:58.997183  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  590 15:52:59.000307  Found a VBT of 8704 bytes after decompression

  591 15:52:59.006854  cse_lite: CSE RO boot. HybridStorageMode disabled

  592 15:52:59.013830  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  593 15:52:59.089980  FSPS returned 0

  594 15:52:59.093007  Executing Phase 1 of FspMultiPhaseSiInit

  595 15:52:59.103190  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  596 15:52:59.106249  port C0 DISC req: usage 1 usb3 1 usb2 5

  597 15:52:59.109895  Raw Buffer output 0 00000511

  598 15:52:59.112901  Raw Buffer output 1 00000000

  599 15:52:59.117034  pmc_send_ipc_cmd succeeded

  600 15:52:59.123217  port C1 DISC req: usage 1 usb3 2 usb2 3

  601 15:52:59.123678  Raw Buffer output 0 00000321

  602 15:52:59.126831  Raw Buffer output 1 00000000

  603 15:52:59.130579  pmc_send_ipc_cmd succeeded

  604 15:52:59.136116  Detected 4 core, 8 thread CPU.

  605 15:52:59.139226  Detected 4 core, 8 thread CPU.

  606 15:52:59.373195  Display FSP Version Info HOB

  607 15:52:59.376377  Reference Code - CPU = a.0.4c.31

  608 15:52:59.379817  uCode Version = 0.0.0.86

  609 15:52:59.383388  TXT ACM version = ff.ff.ff.ffff

  610 15:52:59.386095  Reference Code - ME = a.0.4c.31

  611 15:52:59.389941  MEBx version = 0.0.0.0

  612 15:52:59.392909  ME Firmware Version = Consumer SKU

  613 15:52:59.396531  Reference Code - PCH = a.0.4c.31

  614 15:52:59.399520  PCH-CRID Status = Disabled

  615 15:52:59.403489  PCH-CRID Original Value = ff.ff.ff.ffff

  616 15:52:59.406249  PCH-CRID New Value = ff.ff.ff.ffff

  617 15:52:59.409273  OPROM - RST - RAID = ff.ff.ff.ffff

  618 15:52:59.412946  PCH Hsio Version = 4.0.0.0

  619 15:52:59.416510  Reference Code - SA - System Agent = a.0.4c.31

  620 15:52:59.419508  Reference Code - MRC = 2.0.0.1

  621 15:52:59.422892  SA - PCIe Version = a.0.4c.31

  622 15:52:59.426221  SA-CRID Status = Disabled

  623 15:52:59.429286  SA-CRID Original Value = 0.0.0.1

  624 15:52:59.433155  SA-CRID New Value = 0.0.0.1

  625 15:52:59.436026  OPROM - VBIOS = ff.ff.ff.ffff

  626 15:52:59.439302  IO Manageability Engine FW Version = 11.1.4.0

  627 15:52:59.442789  PHY Build Version = 0.0.0.e0

  628 15:52:59.446229  Thunderbolt(TM) FW Version = 0.0.0.0

  629 15:52:59.452567  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  630 15:52:59.456113  ITSS IRQ Polarities Before:

  631 15:52:59.456583  IPC0: 0xffffffff

  632 15:52:59.459643  IPC1: 0xffffffff

  633 15:52:59.460087  IPC2: 0xffffffff

  634 15:52:59.462717  IPC3: 0xffffffff

  635 15:52:59.466347  ITSS IRQ Polarities After:

  636 15:52:59.466791  IPC0: 0xffffffff

  637 15:52:59.469139  IPC1: 0xffffffff

  638 15:52:59.469583  IPC2: 0xffffffff

  639 15:52:59.472681  IPC3: 0xffffffff

  640 15:52:59.476192  Found PCIe Root Port #9 at PCI: 00:1d.0.

  641 15:52:59.489235  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  642 15:52:59.499549  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  643 15:52:59.512732  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  644 15:52:59.519268  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  645 15:52:59.522253  Enumerating buses...

  646 15:52:59.525902  Show all devs... Before device enumeration.

  647 15:52:59.528950  Root Device: enabled 1

  648 15:52:59.529425  DOMAIN: 0000: enabled 1

  649 15:52:59.532164  CPU_CLUSTER: 0: enabled 1

  650 15:52:59.535638  PCI: 00:00.0: enabled 1

  651 15:52:59.538890  PCI: 00:02.0: enabled 1

  652 15:52:59.539338  PCI: 00:04.0: enabled 1

  653 15:52:59.542838  PCI: 00:05.0: enabled 1

  654 15:52:59.545682  PCI: 00:06.0: enabled 0

  655 15:52:59.546154  PCI: 00:07.0: enabled 0

  656 15:52:59.549699  PCI: 00:07.1: enabled 0

  657 15:52:59.552453  PCI: 00:07.2: enabled 0

  658 15:52:59.555996  PCI: 00:07.3: enabled 0

  659 15:52:59.556446  PCI: 00:08.0: enabled 1

  660 15:52:59.558887  PCI: 00:09.0: enabled 0

  661 15:52:59.562462  PCI: 00:0a.0: enabled 0

  662 15:52:59.565787  PCI: 00:0d.0: enabled 1

  663 15:52:59.566404  PCI: 00:0d.1: enabled 0

  664 15:52:59.568576  PCI: 00:0d.2: enabled 0

  665 15:52:59.572256  PCI: 00:0d.3: enabled 0

  666 15:52:59.575918  PCI: 00:0e.0: enabled 0

  667 15:52:59.576454  PCI: 00:10.2: enabled 1

  668 15:52:59.578989  PCI: 00:10.6: enabled 0

  669 15:52:59.582117  PCI: 00:10.7: enabled 0

  670 15:52:59.585638  PCI: 00:12.0: enabled 0

  671 15:52:59.586086  PCI: 00:12.6: enabled 0

  672 15:52:59.588653  PCI: 00:13.0: enabled 0

  673 15:52:59.592265  PCI: 00:14.0: enabled 1

  674 15:52:59.592710  PCI: 00:14.1: enabled 0

  675 15:52:59.595680  PCI: 00:14.2: enabled 1

  676 15:52:59.598788  PCI: 00:14.3: enabled 1

  677 15:52:59.601897  PCI: 00:15.0: enabled 1

  678 15:52:59.602373  PCI: 00:15.1: enabled 1

  679 15:52:59.605703  PCI: 00:15.2: enabled 1

  680 15:52:59.608766  PCI: 00:15.3: enabled 1

  681 15:52:59.612369  PCI: 00:16.0: enabled 1

  682 15:52:59.612952  PCI: 00:16.1: enabled 0

  683 15:52:59.615598  PCI: 00:16.2: enabled 0

  684 15:52:59.618685  PCI: 00:16.3: enabled 0

  685 15:52:59.621890  PCI: 00:16.4: enabled 0

  686 15:52:59.622356  PCI: 00:16.5: enabled 0

  687 15:52:59.625609  PCI: 00:17.0: enabled 1

  688 15:52:59.628785  PCI: 00:19.0: enabled 0

  689 15:52:59.629257  PCI: 00:19.1: enabled 1

  690 15:52:59.632463  PCI: 00:19.2: enabled 0

  691 15:52:59.635394  PCI: 00:1c.0: enabled 1

  692 15:52:59.638673  PCI: 00:1c.1: enabled 0

  693 15:52:59.639119  PCI: 00:1c.2: enabled 0

  694 15:52:59.642301  PCI: 00:1c.3: enabled 0

  695 15:52:59.645686  PCI: 00:1c.4: enabled 0

  696 15:52:59.648466  PCI: 00:1c.5: enabled 0

  697 15:52:59.648913  PCI: 00:1c.6: enabled 1

  698 15:52:59.652149  PCI: 00:1c.7: enabled 0

  699 15:52:59.655274  PCI: 00:1d.0: enabled 1

  700 15:52:59.658735  PCI: 00:1d.1: enabled 0

  701 15:52:59.659181  PCI: 00:1d.2: enabled 1

  702 15:52:59.661980  PCI: 00:1d.3: enabled 0

  703 15:52:59.665767  PCI: 00:1e.0: enabled 1

  704 15:52:59.668798  PCI: 00:1e.1: enabled 0

  705 15:52:59.669267  PCI: 00:1e.2: enabled 1

  706 15:52:59.672240  PCI: 00:1e.3: enabled 1

  707 15:52:59.675047  PCI: 00:1f.0: enabled 1

  708 15:52:59.675529  PCI: 00:1f.1: enabled 0

  709 15:52:59.678588  PCI: 00:1f.2: enabled 1

  710 15:52:59.681712  PCI: 00:1f.3: enabled 1

  711 15:52:59.685463  PCI: 00:1f.4: enabled 0

  712 15:52:59.685909  PCI: 00:1f.5: enabled 1

  713 15:52:59.688749  PCI: 00:1f.6: enabled 0

  714 15:52:59.691993  PCI: 00:1f.7: enabled 0

  715 15:52:59.692444  APIC: 00: enabled 1

  716 15:52:59.695508  GENERIC: 0.0: enabled 1

  717 15:52:59.698567  GENERIC: 0.0: enabled 1

  718 15:52:59.701623  GENERIC: 1.0: enabled 1

  719 15:52:59.702245  GENERIC: 0.0: enabled 1

  720 15:52:59.705398  GENERIC: 1.0: enabled 1

  721 15:52:59.708590  USB0 port 0: enabled 1

  722 15:52:59.711929  GENERIC: 0.0: enabled 1

  723 15:52:59.712386  USB0 port 0: enabled 1

  724 15:52:59.715097  GENERIC: 0.0: enabled 1

  725 15:52:59.718824  I2C: 00:1a: enabled 1

  726 15:52:59.719293  I2C: 00:31: enabled 1

  727 15:52:59.721769  I2C: 00:32: enabled 1

  728 15:52:59.725833  I2C: 00:10: enabled 1

  729 15:52:59.726458  I2C: 00:15: enabled 1

  730 15:52:59.728633  GENERIC: 0.0: enabled 0

  731 15:52:59.731523  GENERIC: 1.0: enabled 0

  732 15:52:59.735282  GENERIC: 0.0: enabled 1

  733 15:52:59.735747  SPI: 00: enabled 1

  734 15:52:59.738453  SPI: 00: enabled 1

  735 15:52:59.741570  PNP: 0c09.0: enabled 1

  736 15:52:59.742062  GENERIC: 0.0: enabled 1

  737 15:52:59.745160  USB3 port 0: enabled 1

  738 15:52:59.748548  USB3 port 1: enabled 1

  739 15:52:59.749114  USB3 port 2: enabled 0

  740 15:52:59.752384  USB3 port 3: enabled 0

  741 15:52:59.754977  USB2 port 0: enabled 0

  742 15:52:59.755443  USB2 port 1: enabled 1

  743 15:52:59.757946  USB2 port 2: enabled 1

  744 15:52:59.761651  USB2 port 3: enabled 0

  745 15:52:59.764789  USB2 port 4: enabled 1

  746 15:52:59.765247  USB2 port 5: enabled 0

  747 15:52:59.768111  USB2 port 6: enabled 0

  748 15:52:59.771336  USB2 port 7: enabled 0

  749 15:52:59.771774  USB2 port 8: enabled 0

  750 15:52:59.774755  USB2 port 9: enabled 0

  751 15:52:59.778534  USB3 port 0: enabled 0

  752 15:52:59.781483  USB3 port 1: enabled 1

  753 15:52:59.781956  USB3 port 2: enabled 0

  754 15:52:59.785110  USB3 port 3: enabled 0

  755 15:52:59.788338  GENERIC: 0.0: enabled 1

  756 15:52:59.788929  GENERIC: 1.0: enabled 1

  757 15:52:59.791898  APIC: 01: enabled 1

  758 15:52:59.794587  APIC: 03: enabled 1

  759 15:52:59.795023  APIC: 06: enabled 1

  760 15:52:59.798278  APIC: 05: enabled 1

  761 15:52:59.801778  APIC: 04: enabled 1

  762 15:52:59.802337  APIC: 02: enabled 1

  763 15:52:59.805059  APIC: 07: enabled 1

  764 15:52:59.805602  Compare with tree...

  765 15:52:59.808376  Root Device: enabled 1

  766 15:52:59.811527   DOMAIN: 0000: enabled 1

  767 15:52:59.814941    PCI: 00:00.0: enabled 1

  768 15:52:59.815404    PCI: 00:02.0: enabled 1

  769 15:52:59.818018    PCI: 00:04.0: enabled 1

  770 15:52:59.821596     GENERIC: 0.0: enabled 1

  771 15:52:59.824705    PCI: 00:05.0: enabled 1

  772 15:52:59.828268    PCI: 00:06.0: enabled 0

  773 15:52:59.828708    PCI: 00:07.0: enabled 0

  774 15:52:59.831309     GENERIC: 0.0: enabled 1

  775 15:52:59.834732    PCI: 00:07.1: enabled 0

  776 15:52:59.837759     GENERIC: 1.0: enabled 1

  777 15:52:59.841246    PCI: 00:07.2: enabled 0

  778 15:52:59.844409     GENERIC: 0.0: enabled 1

  779 15:52:59.844871    PCI: 00:07.3: enabled 0

  780 15:52:59.848315     GENERIC: 1.0: enabled 1

  781 15:52:59.851183    PCI: 00:08.0: enabled 1

  782 15:52:59.854238    PCI: 00:09.0: enabled 0

  783 15:52:59.857959    PCI: 00:0a.0: enabled 0

  784 15:52:59.858438    PCI: 00:0d.0: enabled 1

  785 15:52:59.861044     USB0 port 0: enabled 1

  786 15:52:59.864649      USB3 port 0: enabled 1

  787 15:52:59.867567      USB3 port 1: enabled 1

  788 15:52:59.871222      USB3 port 2: enabled 0

  789 15:52:59.871693      USB3 port 3: enabled 0

  790 15:52:59.874560    PCI: 00:0d.1: enabled 0

  791 15:52:59.877958    PCI: 00:0d.2: enabled 0

  792 15:52:59.880992     GENERIC: 0.0: enabled 1

  793 15:52:59.884231    PCI: 00:0d.3: enabled 0

  794 15:52:59.884676    PCI: 00:0e.0: enabled 0

  795 15:52:59.887404    PCI: 00:10.2: enabled 1

  796 15:52:59.890758    PCI: 00:10.6: enabled 0

  797 15:52:59.894551    PCI: 00:10.7: enabled 0

  798 15:52:59.897420    PCI: 00:12.0: enabled 0

  799 15:52:59.897863    PCI: 00:12.6: enabled 0

  800 15:52:59.901019    PCI: 00:13.0: enabled 0

  801 15:52:59.904072    PCI: 00:14.0: enabled 1

  802 15:52:59.907366     USB0 port 0: enabled 1

  803 15:52:59.910545      USB2 port 0: enabled 0

  804 15:52:59.911018      USB2 port 1: enabled 1

  805 15:52:59.914090      USB2 port 2: enabled 1

  806 15:52:59.917360      USB2 port 3: enabled 0

  807 15:52:59.920990      USB2 port 4: enabled 1

  808 15:52:59.923951      USB2 port 5: enabled 0

  809 15:52:59.927489      USB2 port 6: enabled 0

  810 15:52:59.927892      USB2 port 7: enabled 0

  811 15:52:59.930483      USB2 port 8: enabled 0

  812 15:52:59.933897      USB2 port 9: enabled 0

  813 15:52:59.937457      USB3 port 0: enabled 0

  814 15:52:59.940538      USB3 port 1: enabled 1

  815 15:52:59.944155      USB3 port 2: enabled 0

  816 15:52:59.944671      USB3 port 3: enabled 0

  817 15:52:59.946955    PCI: 00:14.1: enabled 0

  818 15:52:59.950951    PCI: 00:14.2: enabled 1

  819 15:52:59.953838    PCI: 00:14.3: enabled 1

  820 15:52:59.957352     GENERIC: 0.0: enabled 1

  821 15:52:59.957852    PCI: 00:15.0: enabled 1

  822 15:52:59.960493     I2C: 00:1a: enabled 1

  823 15:52:59.963842     I2C: 00:31: enabled 1

  824 15:52:59.967083     I2C: 00:32: enabled 1

  825 15:52:59.967637    PCI: 00:15.1: enabled 1

  826 15:52:59.970310     I2C: 00:10: enabled 1

  827 15:52:59.974089    PCI: 00:15.2: enabled 1

  828 15:52:59.976943    PCI: 00:15.3: enabled 1

  829 15:52:59.980445    PCI: 00:16.0: enabled 1

  830 15:52:59.980905    PCI: 00:16.1: enabled 0

  831 15:52:59.983908    PCI: 00:16.2: enabled 0

  832 15:52:59.986941    PCI: 00:16.3: enabled 0

  833 15:52:59.990527    PCI: 00:16.4: enabled 0

  834 15:52:59.993613    PCI: 00:16.5: enabled 0

  835 15:52:59.994070    PCI: 00:17.0: enabled 1

  836 15:52:59.997786    PCI: 00:19.0: enabled 0

  837 15:53:00.001184    PCI: 00:19.1: enabled 1

  838 15:53:00.001668     I2C: 00:15: enabled 1

  839 15:53:00.004899    PCI: 00:19.2: enabled 0

  840 15:53:00.007715    PCI: 00:1d.0: enabled 1

  841 15:53:00.011581     GENERIC: 0.0: enabled 1

  842 15:53:00.014629    PCI: 00:1e.0: enabled 1

  843 15:53:00.015128    PCI: 00:1e.1: enabled 0

  844 15:53:00.017609    PCI: 00:1e.2: enabled 1

  845 15:53:00.067883     SPI: 00: enabled 1

  846 15:53:00.068448    PCI: 00:1e.3: enabled 1

  847 15:53:00.068917     SPI: 00: enabled 1

  848 15:53:00.069256    PCI: 00:1f.0: enabled 1

  849 15:53:00.069579     PNP: 0c09.0: enabled 1

  850 15:53:00.070416    PCI: 00:1f.1: enabled 0

  851 15:53:00.070795    PCI: 00:1f.2: enabled 1

  852 15:53:00.071120     GENERIC: 0.0: enabled 1

  853 15:53:00.071432      GENERIC: 0.0: enabled 1

  854 15:53:00.071736      GENERIC: 1.0: enabled 1

  855 15:53:00.072032    PCI: 00:1f.3: enabled 1

  856 15:53:00.072325    PCI: 00:1f.4: enabled 0

  857 15:53:00.072616    PCI: 00:1f.5: enabled 1

  858 15:53:00.072903    PCI: 00:1f.6: enabled 0

  859 15:53:00.073192    PCI: 00:1f.7: enabled 0

  860 15:53:00.073477   CPU_CLUSTER: 0: enabled 1

  861 15:53:00.073764    APIC: 00: enabled 1

  862 15:53:00.074052    APIC: 01: enabled 1

  863 15:53:00.074393    APIC: 03: enabled 1

  864 15:53:00.099065    APIC: 06: enabled 1

  865 15:53:00.099510    APIC: 05: enabled 1

  866 15:53:00.099855    APIC: 04: enabled 1

  867 15:53:00.100179    APIC: 02: enabled 1

  868 15:53:00.100487    APIC: 07: enabled 1

  869 15:53:00.100970  Root Device scanning...

  870 15:53:00.101639  scan_static_bus for Root Device

  871 15:53:00.101979  DOMAIN: 0000 enabled

  872 15:53:00.102428  CPU_CLUSTER: 0 enabled

  873 15:53:00.102746  DOMAIN: 0000 scanning...

  874 15:53:00.103048  PCI: pci_scan_bus for bus 00

  875 15:53:00.103712  PCI: 00:00.0 [8086/0000] ops

  876 15:53:00.104057  PCI: 00:00.0 [8086/9a12] enabled

  877 15:53:00.106054  PCI: 00:02.0 [8086/0000] bus ops

  878 15:53:00.109766  PCI: 00:02.0 [8086/9a40] enabled

  879 15:53:00.112821  PCI: 00:04.0 [8086/0000] bus ops

  880 15:53:00.116256  PCI: 00:04.0 [8086/9a03] enabled

  881 15:53:00.119430  PCI: 00:05.0 [8086/9a19] enabled

  882 15:53:00.123063  PCI: 00:07.0 [0000/0000] hidden

  883 15:53:00.126162  PCI: 00:08.0 [8086/9a11] enabled

  884 15:53:00.129216  PCI: 00:0a.0 [8086/9a0d] disabled

  885 15:53:00.132883  PCI: 00:0d.0 [8086/0000] bus ops

  886 15:53:00.135741  PCI: 00:0d.0 [8086/9a13] enabled

  887 15:53:00.139586  PCI: 00:14.0 [8086/0000] bus ops

  888 15:53:00.142385  PCI: 00:14.0 [8086/a0ed] enabled

  889 15:53:00.146066  PCI: 00:14.2 [8086/a0ef] enabled

  890 15:53:00.149550  PCI: 00:14.3 [8086/0000] bus ops

  891 15:53:00.153161  PCI: 00:14.3 [8086/a0f0] enabled

  892 15:53:00.155938  PCI: 00:15.0 [8086/0000] bus ops

  893 15:53:00.159486  PCI: 00:15.0 [8086/a0e8] enabled

  894 15:53:00.162822  PCI: 00:15.1 [8086/0000] bus ops

  895 15:53:00.165584  PCI: 00:15.1 [8086/a0e9] enabled

  896 15:53:00.169163  PCI: 00:15.2 [8086/0000] bus ops

  897 15:53:00.172799  PCI: 00:15.2 [8086/a0ea] enabled

  898 15:53:00.176026  PCI: 00:15.3 [8086/0000] bus ops

  899 15:53:00.179079  PCI: 00:15.3 [8086/a0eb] enabled

  900 15:53:00.182523  PCI: 00:16.0 [8086/0000] ops

  901 15:53:00.185478  PCI: 00:16.0 [8086/a0e0] enabled

  902 15:53:00.192303  PCI: Static device PCI: 00:17.0 not found, disabling it.

  903 15:53:00.195761  PCI: 00:19.0 [8086/0000] bus ops

  904 15:53:00.199193  PCI: 00:19.0 [8086/a0c5] disabled

  905 15:53:00.202305  PCI: 00:19.1 [8086/0000] bus ops

  906 15:53:00.205690  PCI: 00:19.1 [8086/a0c6] enabled

  907 15:53:00.208949  PCI: 00:1d.0 [8086/0000] bus ops

  908 15:53:00.212039  PCI: 00:1d.0 [8086/a0b0] enabled

  909 15:53:00.215627  PCI: 00:1e.0 [8086/0000] ops

  910 15:53:00.218459  PCI: 00:1e.0 [8086/a0a8] enabled

  911 15:53:00.222540  PCI: 00:1e.2 [8086/0000] bus ops

  912 15:53:00.225462  PCI: 00:1e.2 [8086/a0aa] enabled

  913 15:53:00.228977  PCI: 00:1e.3 [8086/0000] bus ops

  914 15:53:00.231797  PCI: 00:1e.3 [8086/a0ab] enabled

  915 15:53:00.235396  PCI: 00:1f.0 [8086/0000] bus ops

  916 15:53:00.238420  PCI: 00:1f.0 [8086/a087] enabled

  917 15:53:00.238892  RTC Init

  918 15:53:00.241855  Set power on after power failure.

  919 15:53:00.245098  Disabling Deep S3

  920 15:53:00.245593  Disabling Deep S3

  921 15:53:00.248851  Disabling Deep S4

  922 15:53:00.249387  Disabling Deep S4

  923 15:53:00.251871  Disabling Deep S5

  924 15:53:00.255469  Disabling Deep S5

  925 15:53:00.255934  PCI: 00:1f.2 [0000/0000] hidden

  926 15:53:00.258689  PCI: 00:1f.3 [8086/0000] bus ops

  927 15:53:00.261848  PCI: 00:1f.3 [8086/a0c8] enabled

  928 15:53:00.265316  PCI: 00:1f.5 [8086/0000] bus ops

  929 15:53:00.268777  PCI: 00:1f.5 [8086/a0a4] enabled

  930 15:53:00.271787  PCI: Leftover static devices:

  931 15:53:00.275516  PCI: 00:10.2

  932 15:53:00.276072  PCI: 00:10.6

  933 15:53:00.278538  PCI: 00:10.7

  934 15:53:00.279078  PCI: 00:06.0

  935 15:53:00.279551  PCI: 00:07.1

  936 15:53:00.281884  PCI: 00:07.2

  937 15:53:00.282506  PCI: 00:07.3

  938 15:53:00.285563  PCI: 00:09.0

  939 15:53:00.286028  PCI: 00:0d.1

  940 15:53:00.288346  PCI: 00:0d.2

  941 15:53:00.288788  PCI: 00:0d.3

  942 15:53:00.289137  PCI: 00:0e.0

  943 15:53:00.291986  PCI: 00:12.0

  944 15:53:00.292472  PCI: 00:12.6

  945 15:53:00.295270  PCI: 00:13.0

  946 15:53:00.295590  PCI: 00:14.1

  947 15:53:00.295842  PCI: 00:16.1

  948 15:53:00.298312  PCI: 00:16.2

  949 15:53:00.298632  PCI: 00:16.3

  950 15:53:00.301405  PCI: 00:16.4

  951 15:53:00.301645  PCI: 00:16.5

  952 15:53:00.304881  PCI: 00:17.0

  953 15:53:00.305074  PCI: 00:19.2

  954 15:53:00.305224  PCI: 00:1e.1

  955 15:53:00.308019  PCI: 00:1f.1

  956 15:53:00.308212  PCI: 00:1f.4

  957 15:53:00.311530  PCI: 00:1f.6

  958 15:53:00.311691  PCI: 00:1f.7

  959 15:53:00.314562  PCI: Check your devicetree.cb.

  960 15:53:00.318355  PCI: 00:02.0 scanning...

  961 15:53:00.321280  scan_generic_bus for PCI: 00:02.0

  962 15:53:00.325294  scan_generic_bus for PCI: 00:02.0 done

  963 15:53:00.328002  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  964 15:53:00.331616  PCI: 00:04.0 scanning...

  965 15:53:00.334578  scan_generic_bus for PCI: 00:04.0

  966 15:53:00.338301  GENERIC: 0.0 enabled

  967 15:53:00.345194  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  968 15:53:00.347953  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  969 15:53:00.352189  PCI: 00:0d.0 scanning...

  970 15:53:00.354789  scan_static_bus for PCI: 00:0d.0

  971 15:53:00.358635  USB0 port 0 enabled

  972 15:53:00.359053  USB0 port 0 scanning...

  973 15:53:00.361701  scan_static_bus for USB0 port 0

  974 15:53:00.364831  USB3 port 0 enabled

  975 15:53:00.368384  USB3 port 1 enabled

  976 15:53:00.368855  USB3 port 2 disabled

  977 15:53:00.371358  USB3 port 3 disabled

  978 15:53:00.374907  USB3 port 0 scanning...

  979 15:53:00.377975  scan_static_bus for USB3 port 0

  980 15:53:00.381109  scan_static_bus for USB3 port 0 done

  981 15:53:00.384545  scan_bus: bus USB3 port 0 finished in 6 msecs

  982 15:53:00.388096  USB3 port 1 scanning...

  983 15:53:00.391629  scan_static_bus for USB3 port 1

  984 15:53:00.394487  scan_static_bus for USB3 port 1 done

  985 15:53:00.401130  scan_bus: bus USB3 port 1 finished in 6 msecs

  986 15:53:00.405095  scan_static_bus for USB0 port 0 done

  987 15:53:00.407710  scan_bus: bus USB0 port 0 finished in 43 msecs

  988 15:53:00.411275  scan_static_bus for PCI: 00:0d.0 done

  989 15:53:00.417571  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  990 15:53:00.418023  PCI: 00:14.0 scanning...

  991 15:53:00.421229  scan_static_bus for PCI: 00:14.0

  992 15:53:00.425022  USB0 port 0 enabled

  993 15:53:00.428076  USB0 port 0 scanning...

  994 15:53:00.431111  scan_static_bus for USB0 port 0

  995 15:53:00.434780  USB2 port 0 disabled

  996 15:53:00.435228  USB2 port 1 enabled

  997 15:53:00.437631  USB2 port 2 enabled

  998 15:53:00.438080  USB2 port 3 disabled

  999 15:53:00.441190  USB2 port 4 enabled

 1000 15:53:00.444324  USB2 port 5 disabled

 1001 15:53:00.444768  USB2 port 6 disabled

 1002 15:53:00.448331  USB2 port 7 disabled

 1003 15:53:00.451498  USB2 port 8 disabled

 1004 15:53:00.452052  USB2 port 9 disabled

 1005 15:53:00.454537  USB3 port 0 disabled

 1006 15:53:00.457421  USB3 port 1 enabled

 1007 15:53:00.457870  USB3 port 2 disabled

 1008 15:53:00.461069  USB3 port 3 disabled

 1009 15:53:00.464153  USB2 port 1 scanning...

 1010 15:53:00.467270  scan_static_bus for USB2 port 1

 1011 15:53:00.470852  scan_static_bus for USB2 port 1 done

 1012 15:53:00.473971  scan_bus: bus USB2 port 1 finished in 6 msecs

 1013 15:53:00.477124  USB2 port 2 scanning...

 1014 15:53:00.480981  scan_static_bus for USB2 port 2

 1015 15:53:00.483828  scan_static_bus for USB2 port 2 done

 1016 15:53:00.487551  scan_bus: bus USB2 port 2 finished in 6 msecs

 1017 15:53:00.490546  USB2 port 4 scanning...

 1018 15:53:00.494109  scan_static_bus for USB2 port 4

 1019 15:53:00.497167  scan_static_bus for USB2 port 4 done

 1020 15:53:00.503878  scan_bus: bus USB2 port 4 finished in 6 msecs

 1021 15:53:00.507072  USB3 port 1 scanning...

 1022 15:53:00.510376  scan_static_bus for USB3 port 1

 1023 15:53:00.514026  scan_static_bus for USB3 port 1 done

 1024 15:53:00.517294  scan_bus: bus USB3 port 1 finished in 6 msecs

 1025 15:53:00.520512  scan_static_bus for USB0 port 0 done

 1026 15:53:00.527358  scan_bus: bus USB0 port 0 finished in 93 msecs

 1027 15:53:00.530215  scan_static_bus for PCI: 00:14.0 done

 1028 15:53:00.533888  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

 1029 15:53:00.536850  PCI: 00:14.3 scanning...

 1030 15:53:00.540915  scan_static_bus for PCI: 00:14.3

 1031 15:53:00.543414  GENERIC: 0.0 enabled

 1032 15:53:00.547040  scan_static_bus for PCI: 00:14.3 done

 1033 15:53:00.550276  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1034 15:53:00.553339  PCI: 00:15.0 scanning...

 1035 15:53:00.556971  scan_static_bus for PCI: 00:15.0

 1036 15:53:00.560051  I2C: 00:1a enabled

 1037 15:53:00.560498  I2C: 00:31 enabled

 1038 15:53:00.563871  I2C: 00:32 enabled

 1039 15:53:00.566743  scan_static_bus for PCI: 00:15.0 done

 1040 15:53:00.570588  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1041 15:53:00.574242  PCI: 00:15.1 scanning...

 1042 15:53:00.577343  scan_static_bus for PCI: 00:15.1

 1043 15:53:00.580462  I2C: 00:10 enabled

 1044 15:53:00.584353  scan_static_bus for PCI: 00:15.1 done

 1045 15:53:00.586955  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1046 15:53:00.590803  PCI: 00:15.2 scanning...

 1047 15:53:00.594102  scan_static_bus for PCI: 00:15.2

 1048 15:53:00.597238  scan_static_bus for PCI: 00:15.2 done

 1049 15:53:00.603790  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1050 15:53:00.604319  PCI: 00:15.3 scanning...

 1051 15:53:00.607270  scan_static_bus for PCI: 00:15.3

 1052 15:53:00.613980  scan_static_bus for PCI: 00:15.3 done

 1053 15:53:00.617917  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1054 15:53:00.620578  PCI: 00:19.1 scanning...

 1055 15:53:00.624245  scan_static_bus for PCI: 00:19.1

 1056 15:53:00.624690  I2C: 00:15 enabled

 1057 15:53:00.630717  scan_static_bus for PCI: 00:19.1 done

 1058 15:53:00.633639  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1059 15:53:00.637037  PCI: 00:1d.0 scanning...

 1060 15:53:00.640736  do_pci_scan_bridge for PCI: 00:1d.0

 1061 15:53:00.643628  PCI: pci_scan_bus for bus 01

 1062 15:53:00.647171  PCI: 01:00.0 [1c5c/174a] enabled

 1063 15:53:00.650465  GENERIC: 0.0 enabled

 1064 15:53:00.653691  Enabling Common Clock Configuration

 1065 15:53:00.657279  L1 Sub-State supported from root port 29

 1066 15:53:00.660236  L1 Sub-State Support = 0xf

 1067 15:53:00.663388  CommonModeRestoreTime = 0x28

 1068 15:53:00.666948  Power On Value = 0x16, Power On Scale = 0x0

 1069 15:53:00.669994  ASPM: Enabled L1

 1070 15:53:00.673651  PCIe: Max_Payload_Size adjusted to 128

 1071 15:53:00.676783  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1072 15:53:00.680430  PCI: 00:1e.2 scanning...

 1073 15:53:00.683587  scan_generic_bus for PCI: 00:1e.2

 1074 15:53:00.686431  SPI: 00 enabled

 1075 15:53:00.690241  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1076 15:53:00.696835  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1077 15:53:00.699742  PCI: 00:1e.3 scanning...

 1078 15:53:00.703466  scan_generic_bus for PCI: 00:1e.3

 1079 15:53:00.703941  SPI: 00 enabled

 1080 15:53:00.710013  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1081 15:53:00.713161  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1082 15:53:00.716613  PCI: 00:1f.0 scanning...

 1083 15:53:00.720233  scan_static_bus for PCI: 00:1f.0

 1084 15:53:00.723127  PNP: 0c09.0 enabled

 1085 15:53:00.726674  PNP: 0c09.0 scanning...

 1086 15:53:00.729670  scan_static_bus for PNP: 0c09.0

 1087 15:53:00.733166  scan_static_bus for PNP: 0c09.0 done

 1088 15:53:00.736816  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1089 15:53:00.739925  scan_static_bus for PCI: 00:1f.0 done

 1090 15:53:00.746600  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1091 15:53:00.749479  PCI: 00:1f.2 scanning...

 1092 15:53:00.753434  scan_static_bus for PCI: 00:1f.2

 1093 15:53:00.753965  GENERIC: 0.0 enabled

 1094 15:53:00.756016  GENERIC: 0.0 scanning...

 1095 15:53:00.759689  scan_static_bus for GENERIC: 0.0

 1096 15:53:00.762807  GENERIC: 0.0 enabled

 1097 15:53:00.763256  GENERIC: 1.0 enabled

 1098 15:53:00.769684  scan_static_bus for GENERIC: 0.0 done

 1099 15:53:00.772561  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1100 15:53:00.776375  scan_static_bus for PCI: 00:1f.2 done

 1101 15:53:00.782519  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1102 15:53:00.782971  PCI: 00:1f.3 scanning...

 1103 15:53:00.786098  scan_static_bus for PCI: 00:1f.3

 1104 15:53:00.792918  scan_static_bus for PCI: 00:1f.3 done

 1105 15:53:00.795895  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1106 15:53:00.799594  PCI: 00:1f.5 scanning...

 1107 15:53:00.802612  scan_generic_bus for PCI: 00:1f.5

 1108 15:53:00.806233  scan_generic_bus for PCI: 00:1f.5 done

 1109 15:53:00.812726  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1110 15:53:00.815629  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1111 15:53:00.819324  scan_static_bus for Root Device done

 1112 15:53:00.825939  scan_bus: bus Root Device finished in 737 msecs

 1113 15:53:00.826500  done

 1114 15:53:00.832395  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1115 15:53:00.835546  Chrome EC: UHEPI supported

 1116 15:53:00.839005  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1117 15:53:00.845889  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1118 15:53:00.848866  SPI flash protection: WPSW=0 SRP0=0

 1119 15:53:00.855541  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1120 15:53:00.862253  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1121 15:53:00.862784  found VGA at PCI: 00:02.0

 1122 15:53:00.865792  Setting up VGA for PCI: 00:02.0

 1123 15:53:00.872457  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1124 15:53:00.875551  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1125 15:53:00.878607  Allocating resources...

 1126 15:53:00.882234  Reading resources...

 1127 15:53:00.885275  Root Device read_resources bus 0 link: 0

 1128 15:53:00.888718  DOMAIN: 0000 read_resources bus 0 link: 0

 1129 15:53:00.896024  PCI: 00:04.0 read_resources bus 1 link: 0

 1130 15:53:00.899369  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1131 15:53:00.906568  PCI: 00:0d.0 read_resources bus 0 link: 0

 1132 15:53:00.909553  USB0 port 0 read_resources bus 0 link: 0

 1133 15:53:00.916193  USB0 port 0 read_resources bus 0 link: 0 done

 1134 15:53:00.919685  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1135 15:53:00.926301  PCI: 00:14.0 read_resources bus 0 link: 0

 1136 15:53:00.929164  USB0 port 0 read_resources bus 0 link: 0

 1137 15:53:00.935622  USB0 port 0 read_resources bus 0 link: 0 done

 1138 15:53:00.939441  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1139 15:53:00.945672  PCI: 00:14.3 read_resources bus 0 link: 0

 1140 15:53:00.949312  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1141 15:53:00.952207  PCI: 00:15.0 read_resources bus 0 link: 0

 1142 15:53:00.959810  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1143 15:53:00.962782  PCI: 00:15.1 read_resources bus 0 link: 0

 1144 15:53:00.969620  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1145 15:53:00.976352  PCI: 00:19.1 read_resources bus 0 link: 0

 1146 15:53:00.979410  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1147 15:53:00.983250  PCI: 00:1d.0 read_resources bus 1 link: 0

 1148 15:53:00.990315  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1149 15:53:00.993329  PCI: 00:1e.2 read_resources bus 2 link: 0

 1150 15:53:01.000467  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1151 15:53:01.003725  PCI: 00:1e.3 read_resources bus 3 link: 0

 1152 15:53:01.010512  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1153 15:53:01.013477  PCI: 00:1f.0 read_resources bus 0 link: 0

 1154 15:53:01.020138  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1155 15:53:01.023695  PCI: 00:1f.2 read_resources bus 0 link: 0

 1156 15:53:01.026779  GENERIC: 0.0 read_resources bus 0 link: 0

 1157 15:53:01.033578  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1158 15:53:01.037082  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1159 15:53:01.044523  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1160 15:53:01.047866  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1161 15:53:01.054219  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1162 15:53:01.058217  Root Device read_resources bus 0 link: 0 done

 1163 15:53:01.060872  Done reading resources.

 1164 15:53:01.067639  Show resources in subtree (Root Device)...After reading.

 1165 15:53:01.070657   Root Device child on link 0 DOMAIN: 0000

 1166 15:53:01.074375    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1167 15:53:01.084301    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1168 15:53:01.094321    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1169 15:53:01.097217     PCI: 00:00.0

 1170 15:53:01.107640     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1171 15:53:01.114725     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1172 15:53:01.124185     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1173 15:53:01.134422     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1174 15:53:01.143863     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1175 15:53:01.154192     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1176 15:53:01.163537     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1177 15:53:01.170797     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1178 15:53:01.180208     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1179 15:53:01.190253     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1180 15:53:01.200658     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1181 15:53:01.210554     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1182 15:53:01.217078     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1183 15:53:01.226669     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1184 15:53:01.236552     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1185 15:53:01.246861     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1186 15:53:01.256431     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1187 15:53:01.266655     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1188 15:53:01.273243     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1189 15:53:01.283034     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1190 15:53:01.286733     PCI: 00:02.0

 1191 15:53:01.296596     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1192 15:53:01.306226     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1193 15:53:01.316247     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1194 15:53:01.319387     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1195 15:53:01.329719     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1196 15:53:01.333489      GENERIC: 0.0

 1197 15:53:01.334078     PCI: 00:05.0

 1198 15:53:01.342628     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1199 15:53:01.349671     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1200 15:53:01.350285      GENERIC: 0.0

 1201 15:53:01.352943     PCI: 00:08.0

 1202 15:53:01.362595     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1203 15:53:01.363055     PCI: 00:0a.0

 1204 15:53:01.366000     PCI: 00:0d.0 child on link 0 USB0 port 0

 1205 15:53:01.379091     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1206 15:53:01.382256      USB0 port 0 child on link 0 USB3 port 0

 1207 15:53:01.382708       USB3 port 0

 1208 15:53:01.385947       USB3 port 1

 1209 15:53:01.386428       USB3 port 2

 1210 15:53:01.389114       USB3 port 3

 1211 15:53:01.392514     PCI: 00:14.0 child on link 0 USB0 port 0

 1212 15:53:01.402230     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1213 15:53:01.408913      USB0 port 0 child on link 0 USB2 port 0

 1214 15:53:01.409365       USB2 port 0

 1215 15:53:01.412023       USB2 port 1

 1216 15:53:01.412470       USB2 port 2

 1217 15:53:01.415621       USB2 port 3

 1218 15:53:01.416068       USB2 port 4

 1219 15:53:01.418523       USB2 port 5

 1220 15:53:01.418970       USB2 port 6

 1221 15:53:01.422007       USB2 port 7

 1222 15:53:01.422486       USB2 port 8

 1223 15:53:01.425249       USB2 port 9

 1224 15:53:01.428788       USB3 port 0

 1225 15:53:01.429237       USB3 port 1

 1226 15:53:01.431848       USB3 port 2

 1227 15:53:01.432294       USB3 port 3

 1228 15:53:01.435140     PCI: 00:14.2

 1229 15:53:01.445289     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1230 15:53:01.455751     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1231 15:53:01.458635     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1232 15:53:01.468226     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1233 15:53:01.472359      GENERIC: 0.0

 1234 15:53:01.474927     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1235 15:53:01.485515     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1236 15:53:01.485969      I2C: 00:1a

 1237 15:53:01.488377      I2C: 00:31

 1238 15:53:01.488830      I2C: 00:32

 1239 15:53:01.494817     PCI: 00:15.1 child on link 0 I2C: 00:10

 1240 15:53:01.505024     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1241 15:53:01.505480      I2C: 00:10

 1242 15:53:01.507906     PCI: 00:15.2

 1243 15:53:01.518457     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1244 15:53:01.518911     PCI: 00:15.3

 1245 15:53:01.527946     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1246 15:53:01.531613     PCI: 00:16.0

 1247 15:53:01.541421     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1248 15:53:01.541873     PCI: 00:19.0

 1249 15:53:01.544766     PCI: 00:19.1 child on link 0 I2C: 00:15

 1250 15:53:01.554487     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1251 15:53:01.557601      I2C: 00:15

 1252 15:53:01.561499     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1253 15:53:01.570791     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1254 15:53:01.581321     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1255 15:53:01.591078     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1256 15:53:01.591549      GENERIC: 0.0

 1257 15:53:01.594198      PCI: 01:00.0

 1258 15:53:01.604623      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1259 15:53:01.611244      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1260 15:53:01.620844      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1261 15:53:01.624404     PCI: 00:1e.0

 1262 15:53:01.634105     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1263 15:53:01.637127     PCI: 00:1e.2 child on link 0 SPI: 00

 1264 15:53:01.647151     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1265 15:53:01.650674      SPI: 00

 1266 15:53:01.653516     PCI: 00:1e.3 child on link 0 SPI: 00

 1267 15:53:01.663777     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1268 15:53:01.664227      SPI: 00

 1269 15:53:01.670370     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1270 15:53:01.676924     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1271 15:53:01.680072      PNP: 0c09.0

 1272 15:53:01.686725      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1273 15:53:01.693495     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1274 15:53:01.703449     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1275 15:53:01.710190     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1276 15:53:01.716938      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1277 15:53:01.717391       GENERIC: 0.0

 1278 15:53:01.719989       GENERIC: 1.0

 1279 15:53:01.720437     PCI: 00:1f.3

 1280 15:53:01.730218     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1281 15:53:01.739926     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1282 15:53:01.743527     PCI: 00:1f.5

 1283 15:53:01.753489     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1284 15:53:01.756600    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1285 15:53:01.757041     APIC: 00

 1286 15:53:01.759976     APIC: 01

 1287 15:53:01.760417     APIC: 03

 1288 15:53:01.763072     APIC: 06

 1289 15:53:01.763512     APIC: 05

 1290 15:53:01.763859     APIC: 04

 1291 15:53:01.766653     APIC: 02

 1292 15:53:01.767094     APIC: 07

 1293 15:53:01.773178  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1294 15:53:01.779527   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1295 15:53:01.786332   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1296 15:53:01.793354   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1297 15:53:01.796422    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1298 15:53:01.799650    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1299 15:53:01.806255    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1300 15:53:01.813025   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1301 15:53:01.819740   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1302 15:53:01.826402   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1303 15:53:01.835843  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1304 15:53:01.839465  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1305 15:53:01.849557   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1306 15:53:01.856237   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1307 15:53:01.862629   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1308 15:53:01.865755   DOMAIN: 0000: Resource ranges:

 1309 15:53:01.869566   * Base: 1000, Size: 800, Tag: 100

 1310 15:53:01.872637   * Base: 1900, Size: e700, Tag: 100

 1311 15:53:01.878762    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1312 15:53:01.886106  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1313 15:53:01.892275  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1314 15:53:01.898778   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1315 15:53:01.908695   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1316 15:53:01.915654   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1317 15:53:01.922185   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1318 15:53:01.932060   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1319 15:53:01.938652   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1320 15:53:01.945664   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1321 15:53:01.955501   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1322 15:53:01.961780   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1323 15:53:01.968367   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1324 15:53:01.978447   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1325 15:53:01.985190   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1326 15:53:01.992092   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1327 15:53:02.001936   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1328 15:53:02.008605   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1329 15:53:02.014704   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1330 15:53:02.024940   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1331 15:53:02.031799   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1332 15:53:02.038508   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1333 15:53:02.048022   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1334 15:53:02.054775   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1335 15:53:02.061007   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1336 15:53:02.065264   DOMAIN: 0000: Resource ranges:

 1337 15:53:02.071053   * Base: 7fc00000, Size: 40400000, Tag: 200

 1338 15:53:02.074581   * Base: d0000000, Size: 28000000, Tag: 200

 1339 15:53:02.077950   * Base: fa000000, Size: 1000000, Tag: 200

 1340 15:53:02.084554   * Base: fb001000, Size: 2fff000, Tag: 200

 1341 15:53:02.087473   * Base: fe010000, Size: 2e000, Tag: 200

 1342 15:53:02.091261   * Base: fe03f000, Size: d41000, Tag: 200

 1343 15:53:02.094243   * Base: fed88000, Size: 8000, Tag: 200

 1344 15:53:02.098306   * Base: fed93000, Size: d000, Tag: 200

 1345 15:53:02.104126   * Base: feda2000, Size: 1e000, Tag: 200

 1346 15:53:02.107782   * Base: fede0000, Size: 1220000, Tag: 200

 1347 15:53:02.111078   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1348 15:53:02.120837    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1349 15:53:02.127738    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1350 15:53:02.134186    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1351 15:53:02.140855    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1352 15:53:02.147708    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1353 15:53:02.153745    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1354 15:53:02.160498    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1355 15:53:02.167242    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1356 15:53:02.173752    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1357 15:53:02.180314    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1358 15:53:02.187912    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1359 15:53:02.193993    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1360 15:53:02.200344    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1361 15:53:02.206943    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1362 15:53:02.213780    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1363 15:53:02.220606    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1364 15:53:02.227218    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1365 15:53:02.233895    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1366 15:53:02.240439    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1367 15:53:02.247152    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1368 15:53:02.253427    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1369 15:53:02.260041    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1370 15:53:02.266681  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1371 15:53:02.273358  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1372 15:53:02.277048   PCI: 00:1d.0: Resource ranges:

 1373 15:53:02.280008   * Base: 7fc00000, Size: 100000, Tag: 200

 1374 15:53:02.286696    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1375 15:53:02.293509    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1376 15:53:02.299703    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1377 15:53:02.309535  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1378 15:53:02.316672  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1379 15:53:02.322745  Root Device assign_resources, bus 0 link: 0

 1380 15:53:02.326283  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1381 15:53:02.333445  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1382 15:53:02.343041  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1383 15:53:02.349202  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1384 15:53:02.359254  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1385 15:53:02.362771  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1386 15:53:02.369310  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1387 15:53:02.375942  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1388 15:53:02.386040  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1389 15:53:02.392535  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1390 15:53:02.395661  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1391 15:53:02.402920  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1392 15:53:02.409243  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1393 15:53:02.416147  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1394 15:53:02.419233  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1395 15:53:02.429462  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1396 15:53:02.435465  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1397 15:53:02.445669  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1398 15:53:02.449024  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1399 15:53:02.451978  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1400 15:53:02.462453  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1401 15:53:02.465698  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1402 15:53:02.472147  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1403 15:53:02.478668  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1404 15:53:02.485184  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1405 15:53:02.488451  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1406 15:53:02.495383  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1407 15:53:02.505327  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1408 15:53:02.512122  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1409 15:53:02.521639  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1410 15:53:02.525309  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1411 15:53:02.531568  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1412 15:53:02.537983  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1413 15:53:02.548366  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1414 15:53:02.558099  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1415 15:53:02.561506  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1416 15:53:02.571084  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1417 15:53:02.577614  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1418 15:53:02.584255  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1419 15:53:02.591005  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1420 15:53:02.598201  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1421 15:53:02.604978  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1422 15:53:02.608033  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1423 15:53:02.618110  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1424 15:53:02.620742  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1425 15:53:02.627986  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1426 15:53:02.630971  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1427 15:53:02.633974  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1428 15:53:02.640796  LPC: Trying to open IO window from 800 size 1ff

 1429 15:53:02.647640  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1430 15:53:02.657782  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1431 15:53:02.663765  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1432 15:53:02.670222  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1433 15:53:02.673995  Root Device assign_resources, bus 0 link: 0

 1434 15:53:02.677402  Done setting resources.

 1435 15:53:02.683863  Show resources in subtree (Root Device)...After assigning values.

 1436 15:53:02.687125   Root Device child on link 0 DOMAIN: 0000

 1437 15:53:02.690724    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1438 15:53:02.700490    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1439 15:53:02.710645    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1440 15:53:02.713868     PCI: 00:00.0

 1441 15:53:02.723482     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1442 15:53:02.733755     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1443 15:53:02.739868     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1444 15:53:02.750289     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1445 15:53:02.759752     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1446 15:53:02.770282     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1447 15:53:02.780008     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1448 15:53:02.786631     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1449 15:53:02.796353     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1450 15:53:02.806706     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1451 15:53:02.816420     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1452 15:53:02.826337     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1453 15:53:02.835821     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1454 15:53:02.842521     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1455 15:53:02.852820     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1456 15:53:02.862826     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1457 15:53:02.872562     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1458 15:53:02.882735     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1459 15:53:02.892303     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1460 15:53:02.902564     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1461 15:53:02.903060     PCI: 00:02.0

 1462 15:53:02.912122     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1463 15:53:02.925807     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1464 15:53:02.932653     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1465 15:53:02.939144     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1466 15:53:02.949008     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1467 15:53:02.949473      GENERIC: 0.0

 1468 15:53:02.951796     PCI: 00:05.0

 1469 15:53:02.961801     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1470 15:53:02.965627     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1471 15:53:02.968543      GENERIC: 0.0

 1472 15:53:02.968994     PCI: 00:08.0

 1473 15:53:02.981716     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1474 15:53:02.982238     PCI: 00:0a.0

 1475 15:53:02.985254     PCI: 00:0d.0 child on link 0 USB0 port 0

 1476 15:53:02.998601     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1477 15:53:03.001714      USB0 port 0 child on link 0 USB3 port 0

 1478 15:53:03.002193       USB3 port 0

 1479 15:53:03.005222       USB3 port 1

 1480 15:53:03.005665       USB3 port 2

 1481 15:53:03.008939       USB3 port 3

 1482 15:53:03.011358     PCI: 00:14.0 child on link 0 USB0 port 0

 1483 15:53:03.024903     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1484 15:53:03.028567      USB0 port 0 child on link 0 USB2 port 0

 1485 15:53:03.029133       USB2 port 0

 1486 15:53:03.031644       USB2 port 1

 1487 15:53:03.032219       USB2 port 2

 1488 15:53:03.034603       USB2 port 3

 1489 15:53:03.037878       USB2 port 4

 1490 15:53:03.038354       USB2 port 5

 1491 15:53:03.041891       USB2 port 6

 1492 15:53:03.042520       USB2 port 7

 1493 15:53:03.044594       USB2 port 8

 1494 15:53:03.045060       USB2 port 9

 1495 15:53:03.047722       USB3 port 0

 1496 15:53:03.048203       USB3 port 1

 1497 15:53:03.051627       USB3 port 2

 1498 15:53:03.052091       USB3 port 3

 1499 15:53:03.054406     PCI: 00:14.2

 1500 15:53:03.064631     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1501 15:53:03.074566     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1502 15:53:03.078018     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1503 15:53:03.091364     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1504 15:53:03.091944      GENERIC: 0.0

 1505 15:53:03.094534     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1506 15:53:03.104075     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1507 15:53:03.107656      I2C: 00:1a

 1508 15:53:03.108105      I2C: 00:31

 1509 15:53:03.111021      I2C: 00:32

 1510 15:53:03.114537     PCI: 00:15.1 child on link 0 I2C: 00:10

 1511 15:53:03.124117     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1512 15:53:03.127745      I2C: 00:10

 1513 15:53:03.128194     PCI: 00:15.2

 1514 15:53:03.137477     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1515 15:53:03.141276     PCI: 00:15.3

 1516 15:53:03.150934     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1517 15:53:03.154030     PCI: 00:16.0

 1518 15:53:03.164185     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1519 15:53:03.164639     PCI: 00:19.0

 1520 15:53:03.167102     PCI: 00:19.1 child on link 0 I2C: 00:15

 1521 15:53:03.180763     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1522 15:53:03.181218      I2C: 00:15

 1523 15:53:03.184386     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1524 15:53:03.193870     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1525 15:53:03.207143     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1526 15:53:03.216825     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1527 15:53:03.217315      GENERIC: 0.0

 1528 15:53:03.221070      PCI: 01:00.0

 1529 15:53:03.230729      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1530 15:53:03.240644      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1531 15:53:03.250491      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1532 15:53:03.253329     PCI: 00:1e.0

 1533 15:53:03.263428     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1534 15:53:03.266539     PCI: 00:1e.2 child on link 0 SPI: 00

 1535 15:53:03.279930     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1536 15:53:03.280385      SPI: 00

 1537 15:53:03.283442     PCI: 00:1e.3 child on link 0 SPI: 00

 1538 15:53:03.293128     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1539 15:53:03.296823      SPI: 00

 1540 15:53:03.299857     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1541 15:53:03.309478     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1542 15:53:03.310015      PNP: 0c09.0

 1543 15:53:03.319702      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1544 15:53:03.323045     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1545 15:53:03.332914     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1546 15:53:03.342682     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1547 15:53:03.346413      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1548 15:53:03.349571       GENERIC: 0.0

 1549 15:53:03.350106       GENERIC: 1.0

 1550 15:53:03.353145     PCI: 00:1f.3

 1551 15:53:03.362667     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1552 15:53:03.372801     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1553 15:53:03.375531     PCI: 00:1f.5

 1554 15:53:03.385680     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1555 15:53:03.388751    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1556 15:53:03.388915     APIC: 00

 1557 15:53:03.392308     APIC: 01

 1558 15:53:03.392447     APIC: 03

 1559 15:53:03.395179     APIC: 06

 1560 15:53:03.395301     APIC: 05

 1561 15:53:03.395397     APIC: 04

 1562 15:53:03.398869     APIC: 02

 1563 15:53:03.398990     APIC: 07

 1564 15:53:03.401981  Done allocating resources.

 1565 15:53:03.408798  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1566 15:53:03.415497  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1567 15:53:03.418372  Configure GPIOs for I2S audio on UP4.

 1568 15:53:03.425062  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1569 15:53:03.428862  Enabling resources...

 1570 15:53:03.431665  PCI: 00:00.0 subsystem <- 8086/9a12

 1571 15:53:03.435262  PCI: 00:00.0 cmd <- 06

 1572 15:53:03.438455  PCI: 00:02.0 subsystem <- 8086/9a40

 1573 15:53:03.438542  PCI: 00:02.0 cmd <- 03

 1574 15:53:03.445117  PCI: 00:04.0 subsystem <- 8086/9a03

 1575 15:53:03.445204  PCI: 00:04.0 cmd <- 02

 1576 15:53:03.448341  PCI: 00:05.0 subsystem <- 8086/9a19

 1577 15:53:03.451606  PCI: 00:05.0 cmd <- 02

 1578 15:53:03.454738  PCI: 00:08.0 subsystem <- 8086/9a11

 1579 15:53:03.458380  PCI: 00:08.0 cmd <- 06

 1580 15:53:03.461737  PCI: 00:0d.0 subsystem <- 8086/9a13

 1581 15:53:03.464868  PCI: 00:0d.0 cmd <- 02

 1582 15:53:03.468021  PCI: 00:14.0 subsystem <- 8086/a0ed

 1583 15:53:03.471886  PCI: 00:14.0 cmd <- 02

 1584 15:53:03.475057  PCI: 00:14.2 subsystem <- 8086/a0ef

 1585 15:53:03.477928  PCI: 00:14.2 cmd <- 02

 1586 15:53:03.481196  PCI: 00:14.3 subsystem <- 8086/a0f0

 1587 15:53:03.484386  PCI: 00:14.3 cmd <- 02

 1588 15:53:03.488114  PCI: 00:15.0 subsystem <- 8086/a0e8

 1589 15:53:03.488201  PCI: 00:15.0 cmd <- 02

 1590 15:53:03.494662  PCI: 00:15.1 subsystem <- 8086/a0e9

 1591 15:53:03.494750  PCI: 00:15.1 cmd <- 02

 1592 15:53:03.497680  PCI: 00:15.2 subsystem <- 8086/a0ea

 1593 15:53:03.501366  PCI: 00:15.2 cmd <- 02

 1594 15:53:03.504471  PCI: 00:15.3 subsystem <- 8086/a0eb

 1595 15:53:03.508041  PCI: 00:15.3 cmd <- 02

 1596 15:53:03.511205  PCI: 00:16.0 subsystem <- 8086/a0e0

 1597 15:53:03.514661  PCI: 00:16.0 cmd <- 02

 1598 15:53:03.517533  PCI: 00:19.1 subsystem <- 8086/a0c6

 1599 15:53:03.520888  PCI: 00:19.1 cmd <- 02

 1600 15:53:03.524491  PCI: 00:1d.0 bridge ctrl <- 0013

 1601 15:53:03.527578  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1602 15:53:03.531338  PCI: 00:1d.0 cmd <- 06

 1603 15:53:03.534118  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1604 15:53:03.537617  PCI: 00:1e.0 cmd <- 06

 1605 15:53:03.541157  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1606 15:53:03.541341  PCI: 00:1e.2 cmd <- 06

 1607 15:53:03.547614  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1608 15:53:03.547834  PCI: 00:1e.3 cmd <- 02

 1609 15:53:03.551338  PCI: 00:1f.0 subsystem <- 8086/a087

 1610 15:53:03.554454  PCI: 00:1f.0 cmd <- 407

 1611 15:53:03.557487  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1612 15:53:03.561419  PCI: 00:1f.3 cmd <- 02

 1613 15:53:03.564281  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1614 15:53:03.567738  PCI: 00:1f.5 cmd <- 406

 1615 15:53:03.572063  PCI: 01:00.0 cmd <- 02

 1616 15:53:03.576723  done.

 1617 15:53:03.579981  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1618 15:53:03.583402  Initializing devices...

 1619 15:53:03.586280  Root Device init

 1620 15:53:03.589496  Chrome EC: Set SMI mask to 0x0000000000000000

 1621 15:53:03.596576  Chrome EC: clear events_b mask to 0x0000000000000000

 1622 15:53:03.603200  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1623 15:53:03.609761  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1624 15:53:03.617090  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1625 15:53:03.620044  Chrome EC: Set WAKE mask to 0x0000000000000000

 1626 15:53:03.628053  fw_config match found: DB_USB=USB3_ACTIVE

 1627 15:53:03.631696  Configure Right Type-C port orientation for retimer

 1628 15:53:03.635173  Root Device init finished in 46 msecs

 1629 15:53:03.638579  PCI: 00:00.0 init

 1630 15:53:03.642175  CPU TDP = 9 Watts

 1631 15:53:03.642618  CPU PL1 = 9 Watts

 1632 15:53:03.645344  CPU PL2 = 40 Watts

 1633 15:53:03.648928  CPU PL4 = 83 Watts

 1634 15:53:03.652111  PCI: 00:00.0 init finished in 8 msecs

 1635 15:53:03.652588  PCI: 00:02.0 init

 1636 15:53:03.655109  GMA: Found VBT in CBFS

 1637 15:53:03.658645  GMA: Found valid VBT in CBFS

 1638 15:53:03.665263  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1639 15:53:03.671826                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1640 15:53:03.675041  PCI: 00:02.0 init finished in 18 msecs

 1641 15:53:03.678642  PCI: 00:05.0 init

 1642 15:53:03.681691  PCI: 00:05.0 init finished in 0 msecs

 1643 15:53:03.685165  PCI: 00:08.0 init

 1644 15:53:03.689315  PCI: 00:08.0 init finished in 0 msecs

 1645 15:53:03.691653  PCI: 00:14.0 init

 1646 15:53:03.695197  PCI: 00:14.0 init finished in 0 msecs

 1647 15:53:03.698549  PCI: 00:14.2 init

 1648 15:53:03.701860  PCI: 00:14.2 init finished in 0 msecs

 1649 15:53:03.705319  PCI: 00:15.0 init

 1650 15:53:03.705838  I2C bus 0 version 0x3230302a

 1651 15:53:03.711515  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1652 15:53:03.715188  PCI: 00:15.0 init finished in 6 msecs

 1653 15:53:03.715703  PCI: 00:15.1 init

 1654 15:53:03.718581  I2C bus 1 version 0x3230302a

 1655 15:53:03.721519  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1656 15:53:03.728301  PCI: 00:15.1 init finished in 6 msecs

 1657 15:53:03.728813  PCI: 00:15.2 init

 1658 15:53:03.731921  I2C bus 2 version 0x3230302a

 1659 15:53:03.734890  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1660 15:53:03.737875  PCI: 00:15.2 init finished in 6 msecs

 1661 15:53:03.741612  PCI: 00:15.3 init

 1662 15:53:03.744641  I2C bus 3 version 0x3230302a

 1663 15:53:03.748236  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1664 15:53:03.751333  PCI: 00:15.3 init finished in 6 msecs

 1665 15:53:03.754385  PCI: 00:16.0 init

 1666 15:53:03.757821  PCI: 00:16.0 init finished in 0 msecs

 1667 15:53:03.761660  PCI: 00:19.1 init

 1668 15:53:03.764895  I2C bus 5 version 0x3230302a

 1669 15:53:03.768125  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1670 15:53:03.771066  PCI: 00:19.1 init finished in 6 msecs

 1671 15:53:03.774596  PCI: 00:1d.0 init

 1672 15:53:03.775048  Initializing PCH PCIe bridge.

 1673 15:53:03.781191  PCI: 00:1d.0 init finished in 3 msecs

 1674 15:53:03.784285  PCI: 00:1f.0 init

 1675 15:53:03.787828  IOAPIC: Initializing IOAPIC at 0xfec00000

 1676 15:53:03.791394  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1677 15:53:03.794464  IOAPIC: ID = 0x02

 1678 15:53:03.798079  IOAPIC: Dumping registers

 1679 15:53:03.798553    reg 0x0000: 0x02000000

 1680 15:53:03.800909    reg 0x0001: 0x00770020

 1681 15:53:03.804619    reg 0x0002: 0x00000000

 1682 15:53:03.807499  PCI: 00:1f.0 init finished in 21 msecs

 1683 15:53:03.811132  PCI: 00:1f.2 init

 1684 15:53:03.814673  Disabling ACPI via APMC.

 1685 15:53:03.815121  APMC done.

 1686 15:53:03.817693  PCI: 00:1f.2 init finished in 5 msecs

 1687 15:53:03.831400  PCI: 01:00.0 init

 1688 15:53:03.834676  PCI: 01:00.0 init finished in 0 msecs

 1689 15:53:03.837758  PNP: 0c09.0 init

 1690 15:53:03.841294  Google Chrome EC uptime: 8.405 seconds

 1691 15:53:03.847520  Google Chrome AP resets since EC boot: 1

 1692 15:53:03.851163  Google Chrome most recent AP reset causes:

 1693 15:53:03.854245  	0.347: 32775 shutdown: entering G3

 1694 15:53:03.861041  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1695 15:53:03.864619  PNP: 0c09.0 init finished in 22 msecs

 1696 15:53:03.870413  Devices initialized

 1697 15:53:03.873218  Show all devs... After init.

 1698 15:53:03.876900  Root Device: enabled 1

 1699 15:53:03.877350  DOMAIN: 0000: enabled 1

 1700 15:53:03.879953  CPU_CLUSTER: 0: enabled 1

 1701 15:53:03.883502  PCI: 00:00.0: enabled 1

 1702 15:53:03.886707  PCI: 00:02.0: enabled 1

 1703 15:53:03.887188  PCI: 00:04.0: enabled 1

 1704 15:53:03.890199  PCI: 00:05.0: enabled 1

 1705 15:53:03.893661  PCI: 00:06.0: enabled 0

 1706 15:53:03.896898  PCI: 00:07.0: enabled 0

 1707 15:53:03.897334  PCI: 00:07.1: enabled 0

 1708 15:53:03.900182  PCI: 00:07.2: enabled 0

 1709 15:53:03.903425  PCI: 00:07.3: enabled 0

 1710 15:53:03.906753  PCI: 00:08.0: enabled 1

 1711 15:53:03.907188  PCI: 00:09.0: enabled 0

 1712 15:53:03.909972  PCI: 00:0a.0: enabled 0

 1713 15:53:03.913486  PCI: 00:0d.0: enabled 1

 1714 15:53:03.916443  PCI: 00:0d.1: enabled 0

 1715 15:53:03.916879  PCI: 00:0d.2: enabled 0

 1716 15:53:03.920108  PCI: 00:0d.3: enabled 0

 1717 15:53:03.923032  PCI: 00:0e.0: enabled 0

 1718 15:53:03.923466  PCI: 00:10.2: enabled 1

 1719 15:53:03.926460  PCI: 00:10.6: enabled 0

 1720 15:53:03.930045  PCI: 00:10.7: enabled 0

 1721 15:53:03.933113  PCI: 00:12.0: enabled 0

 1722 15:53:03.933548  PCI: 00:12.6: enabled 0

 1723 15:53:03.936265  PCI: 00:13.0: enabled 0

 1724 15:53:03.939863  PCI: 00:14.0: enabled 1

 1725 15:53:03.942841  PCI: 00:14.1: enabled 0

 1726 15:53:03.943274  PCI: 00:14.2: enabled 1

 1727 15:53:03.946569  PCI: 00:14.3: enabled 1

 1728 15:53:03.949563  PCI: 00:15.0: enabled 1

 1729 15:53:03.953197  PCI: 00:15.1: enabled 1

 1730 15:53:03.953634  PCI: 00:15.2: enabled 1

 1731 15:53:03.956161  PCI: 00:15.3: enabled 1

 1732 15:53:03.959682  PCI: 00:16.0: enabled 1

 1733 15:53:03.960265  PCI: 00:16.1: enabled 0

 1734 15:53:03.963241  PCI: 00:16.2: enabled 0

 1735 15:53:03.966449  PCI: 00:16.3: enabled 0

 1736 15:53:03.969828  PCI: 00:16.4: enabled 0

 1737 15:53:03.970289  PCI: 00:16.5: enabled 0

 1738 15:53:03.972880  PCI: 00:17.0: enabled 0

 1739 15:53:03.976375  PCI: 00:19.0: enabled 0

 1740 15:53:03.979434  PCI: 00:19.1: enabled 1

 1741 15:53:03.980009  PCI: 00:19.2: enabled 0

 1742 15:53:03.982911  PCI: 00:1c.0: enabled 1

 1743 15:53:03.986010  PCI: 00:1c.1: enabled 0

 1744 15:53:03.989446  PCI: 00:1c.2: enabled 0

 1745 15:53:03.989913  PCI: 00:1c.3: enabled 0

 1746 15:53:03.993049  PCI: 00:1c.4: enabled 0

 1747 15:53:03.996271  PCI: 00:1c.5: enabled 0

 1748 15:53:03.999602  PCI: 00:1c.6: enabled 1

 1749 15:53:04.000079  PCI: 00:1c.7: enabled 0

 1750 15:53:04.002905  PCI: 00:1d.0: enabled 1

 1751 15:53:04.006057  PCI: 00:1d.1: enabled 0

 1752 15:53:04.006596  PCI: 00:1d.2: enabled 1

 1753 15:53:04.009145  PCI: 00:1d.3: enabled 0

 1754 15:53:04.012949  PCI: 00:1e.0: enabled 1

 1755 15:53:04.015866  PCI: 00:1e.1: enabled 0

 1756 15:53:04.016348  PCI: 00:1e.2: enabled 1

 1757 15:53:04.019519  PCI: 00:1e.3: enabled 1

 1758 15:53:04.022588  PCI: 00:1f.0: enabled 1

 1759 15:53:04.025953  PCI: 00:1f.1: enabled 0

 1760 15:53:04.026442  PCI: 00:1f.2: enabled 1

 1761 15:53:04.029520  PCI: 00:1f.3: enabled 1

 1762 15:53:04.032649  PCI: 00:1f.4: enabled 0

 1763 15:53:04.035826  PCI: 00:1f.5: enabled 1

 1764 15:53:04.036301  PCI: 00:1f.6: enabled 0

 1765 15:53:04.039520  PCI: 00:1f.7: enabled 0

 1766 15:53:04.042727  APIC: 00: enabled 1

 1767 15:53:04.043164  GENERIC: 0.0: enabled 1

 1768 15:53:04.046162  GENERIC: 0.0: enabled 1

 1769 15:53:04.049421  GENERIC: 1.0: enabled 1

 1770 15:53:04.052414  GENERIC: 0.0: enabled 1

 1771 15:53:04.052894  GENERIC: 1.0: enabled 1

 1772 15:53:04.055935  USB0 port 0: enabled 1

 1773 15:53:04.059519  GENERIC: 0.0: enabled 1

 1774 15:53:04.059981  USB0 port 0: enabled 1

 1775 15:53:04.062420  GENERIC: 0.0: enabled 1

 1776 15:53:04.066013  I2C: 00:1a: enabled 1

 1777 15:53:04.069275  I2C: 00:31: enabled 1

 1778 15:53:04.069759  I2C: 00:32: enabled 1

 1779 15:53:04.072714  I2C: 00:10: enabled 1

 1780 15:53:04.075653  I2C: 00:15: enabled 1

 1781 15:53:04.076092  GENERIC: 0.0: enabled 0

 1782 15:53:04.079261  GENERIC: 1.0: enabled 0

 1783 15:53:04.082424  GENERIC: 0.0: enabled 1

 1784 15:53:04.082894  SPI: 00: enabled 1

 1785 15:53:04.085960  SPI: 00: enabled 1

 1786 15:53:04.088856  PNP: 0c09.0: enabled 1

 1787 15:53:04.089399  GENERIC: 0.0: enabled 1

 1788 15:53:04.092552  USB3 port 0: enabled 1

 1789 15:53:04.095587  USB3 port 1: enabled 1

 1790 15:53:04.098921  USB3 port 2: enabled 0

 1791 15:53:04.099389  USB3 port 3: enabled 0

 1792 15:53:04.102499  USB2 port 0: enabled 0

 1793 15:53:04.105647  USB2 port 1: enabled 1

 1794 15:53:04.106092  USB2 port 2: enabled 1

 1795 15:53:04.108668  USB2 port 3: enabled 0

 1796 15:53:04.112225  USB2 port 4: enabled 1

 1797 15:53:04.115847  USB2 port 5: enabled 0

 1798 15:53:04.116320  USB2 port 6: enabled 0

 1799 15:53:04.118893  USB2 port 7: enabled 0

 1800 15:53:04.122349  USB2 port 8: enabled 0

 1801 15:53:04.122824  USB2 port 9: enabled 0

 1802 15:53:04.125477  USB3 port 0: enabled 0

 1803 15:53:04.128809  USB3 port 1: enabled 1

 1804 15:53:04.129297  USB3 port 2: enabled 0

 1805 15:53:04.132177  USB3 port 3: enabled 0

 1806 15:53:04.135313  GENERIC: 0.0: enabled 1

 1807 15:53:04.138998  GENERIC: 1.0: enabled 1

 1808 15:53:04.139522  APIC: 01: enabled 1

 1809 15:53:04.141864  APIC: 03: enabled 1

 1810 15:53:04.142389  APIC: 06: enabled 1

 1811 15:53:04.145567  APIC: 05: enabled 1

 1812 15:53:04.148613  APIC: 04: enabled 1

 1813 15:53:04.149088  APIC: 02: enabled 1

 1814 15:53:04.152350  APIC: 07: enabled 1

 1815 15:53:04.155265  PCI: 01:00.0: enabled 1

 1816 15:53:04.158687  BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms

 1817 15:53:04.165097  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1818 15:53:04.168249  ELOG: NV offset 0xf30000 size 0x1000

 1819 15:53:04.175760  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1820 15:53:04.182018  ELOG: Event(17) added with size 13 at 2023-03-03 15:53:04 UTC

 1821 15:53:04.188560  ELOG: Event(92) added with size 9 at 2023-03-03 15:53:04 UTC

 1822 15:53:04.195206  ELOG: Event(93) added with size 9 at 2023-03-03 15:53:04 UTC

 1823 15:53:04.201523  ELOG: Event(9E) added with size 10 at 2023-03-03 15:53:04 UTC

 1824 15:53:04.207989  ELOG: Event(9F) added with size 14 at 2023-03-03 15:53:04 UTC

 1825 15:53:04.214760  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1826 15:53:04.221422  ELOG: Event(A1) added with size 10 at 2023-03-03 15:53:04 UTC

 1827 15:53:04.224524  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

 1828 15:53:04.231476  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1829 15:53:04.234752  Finalize devices...

 1830 15:53:04.235247  Devices finalized

 1831 15:53:04.241527  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1832 15:53:04.247586  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1833 15:53:04.251341  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1834 15:53:04.257891  ME: HFSTS1                      : 0x80030055

 1835 15:53:04.260987  ME: HFSTS2                      : 0x30280116

 1836 15:53:04.264498  ME: HFSTS3                      : 0x00000050

 1837 15:53:04.270316  ME: HFSTS4                      : 0x00004000

 1838 15:53:04.273974  ME: HFSTS5                      : 0x00000000

 1839 15:53:04.280537  ME: HFSTS6                      : 0x00400006

 1840 15:53:04.283591  ME: Manufacturing Mode          : YES

 1841 15:53:04.287116  ME: SPI Protection Mode Enabled : NO

 1842 15:53:04.290908  ME: FW Partition Table          : OK

 1843 15:53:04.293835  ME: Bringup Loader Failure      : NO

 1844 15:53:04.297496  ME: Firmware Init Complete      : NO

 1845 15:53:04.300494  ME: Boot Options Present        : NO

 1846 15:53:04.303994  ME: Update In Progress          : NO

 1847 15:53:04.310465  ME: D0i3 Support                : YES

 1848 15:53:04.313580  ME: Low Power State Enabled     : NO

 1849 15:53:04.317054  ME: CPU Replaced                : YES

 1850 15:53:04.320190  ME: CPU Replacement Valid       : YES

 1851 15:53:04.323752  ME: Current Working State       : 5

 1852 15:53:04.326719  ME: Current Operation State     : 1

 1853 15:53:04.330448  ME: Current Operation Mode      : 3

 1854 15:53:04.333446  ME: Error Code                  : 0

 1855 15:53:04.337060  ME: Enhanced Debug Mode         : NO

 1856 15:53:04.343613  ME: CPU Debug Disabled          : YES

 1857 15:53:04.346658  ME: TXT Support                 : NO

 1858 15:53:04.353308  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1859 15:53:04.359955  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1860 15:53:04.363628  CBFS: 'fallback/slic' not found.

 1861 15:53:04.366677  ACPI: Writing ACPI tables at 76b01000.

 1862 15:53:04.369668  ACPI:    * FACS

 1863 15:53:04.369754  ACPI:    * DSDT

 1864 15:53:04.373216  Ramoops buffer: 0x100000@0x76a00000.

 1865 15:53:04.380198  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1866 15:53:04.383007  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1867 15:53:04.386360  Google Chrome EC: version:

 1868 15:53:04.389970  	ro: voema_v2.0.7540-147f8d37d1

 1869 15:53:04.393055  	rw: voema_v2.0.7540-147f8d37d1

 1870 15:53:04.396649    running image: 2

 1871 15:53:04.403381  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1872 15:53:04.406170  ACPI:    * FADT

 1873 15:53:04.406256  SCI is IRQ9

 1874 15:53:04.409727  ACPI: added table 1/32, length now 40

 1875 15:53:04.412906  ACPI:     * SSDT

 1876 15:53:04.416397  Found 1 CPU(s) with 8 core(s) each.

 1877 15:53:04.419841  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1878 15:53:04.426620  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1879 15:53:04.429811  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1880 15:53:04.433459  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1881 15:53:04.440102  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1882 15:53:04.446017  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1883 15:53:04.449581  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1884 15:53:04.456292  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1885 15:53:04.462966  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1886 15:53:04.465930  \_SB.PCI0.RP09: Added StorageD3Enable property

 1887 15:53:04.469269  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1888 15:53:04.476412  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1889 15:53:04.479478  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1890 15:53:04.485915  PS2K: Passing 80 keymaps to kernel

 1891 15:53:04.492527  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1892 15:53:04.499085  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1893 15:53:04.502835  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1894 15:53:04.509455  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1895 15:53:04.516215  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1896 15:53:04.522258  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1897 15:53:04.529054  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1898 15:53:04.535515  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1899 15:53:04.542857  ACPI: added table 2/32, length now 44

 1900 15:53:04.543070  ACPI:    * MCFG

 1901 15:53:04.545934  ACPI: added table 3/32, length now 48

 1902 15:53:04.549016  ACPI:    * TPM2

 1903 15:53:04.552648  TPM2 log created at 0x769f0000

 1904 15:53:04.556007  ACPI: added table 4/32, length now 52

 1905 15:53:04.556414  ACPI:    * MADT

 1906 15:53:04.559657  SCI is IRQ9

 1907 15:53:04.562776  ACPI: added table 5/32, length now 56

 1908 15:53:04.563219  current = 76b09850

 1909 15:53:04.565437  ACPI:    * DMAR

 1910 15:53:04.568525  ACPI: added table 6/32, length now 60

 1911 15:53:04.572271  ACPI: added table 7/32, length now 64

 1912 15:53:04.575212  ACPI:    * HPET

 1913 15:53:04.578875  ACPI: added table 8/32, length now 68

 1914 15:53:04.578961  ACPI: done.

 1915 15:53:04.581877  ACPI tables: 35216 bytes.

 1916 15:53:04.585445  smbios_write_tables: 769ef000

 1917 15:53:04.588476  EC returned error result code 3

 1918 15:53:04.592257  Couldn't obtain OEM name from CBI

 1919 15:53:04.595345  Create SMBIOS type 16

 1920 15:53:04.598803  Create SMBIOS type 17

 1921 15:53:04.598888  GENERIC: 0.0 (WIFI Device)

 1922 15:53:04.601702  SMBIOS tables: 1750 bytes.

 1923 15:53:04.605389  Writing table forward entry at 0x00000500

 1924 15:53:04.611968  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1925 15:53:04.615587  Writing coreboot table at 0x76b25000

 1926 15:53:04.622113   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1927 15:53:04.628453   1. 0000000000001000-000000000009ffff: RAM

 1928 15:53:04.632349   2. 00000000000a0000-00000000000fffff: RESERVED

 1929 15:53:04.635216   3. 0000000000100000-00000000769eefff: RAM

 1930 15:53:04.641973   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1931 15:53:04.648741   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1932 15:53:04.651681   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1933 15:53:04.658533   7. 0000000077000000-000000007fbfffff: RESERVED

 1934 15:53:04.661896   8. 00000000c0000000-00000000cfffffff: RESERVED

 1935 15:53:04.668678   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1936 15:53:04.671705  10. 00000000fb000000-00000000fb000fff: RESERVED

 1937 15:53:04.678174  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1938 15:53:04.682160  12. 00000000fed80000-00000000fed87fff: RESERVED

 1939 15:53:04.685031  13. 00000000fed90000-00000000fed92fff: RESERVED

 1940 15:53:04.691572  14. 00000000feda0000-00000000feda1fff: RESERVED

 1941 15:53:04.694902  15. 00000000fedc0000-00000000feddffff: RESERVED

 1942 15:53:04.701341  16. 0000000100000000-00000002803fffff: RAM

 1943 15:53:04.704759  Passing 4 GPIOs to payload:

 1944 15:53:04.708239              NAME |       PORT | POLARITY |     VALUE

 1945 15:53:04.714797               lid |  undefined |     high |      high

 1946 15:53:04.718676             power |  undefined |     high |       low

 1947 15:53:04.724469             oprom |  undefined |     high |       low

 1948 15:53:04.727989          EC in RW | 0x000000e5 |     high |      high

 1949 15:53:04.734724  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum ac74

 1950 15:53:04.738185  coreboot table: 1576 bytes.

 1951 15:53:04.741664  IMD ROOT    0. 0x76fff000 0x00001000

 1952 15:53:04.744758  IMD SMALL   1. 0x76ffe000 0x00001000

 1953 15:53:04.751307  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1954 15:53:04.754986  VPD         3. 0x76c4d000 0x00000367

 1955 15:53:04.758005  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1956 15:53:04.761597  CONSOLE     5. 0x76c2c000 0x00020000

 1957 15:53:04.764598  FMAP        6. 0x76c2b000 0x00000578

 1958 15:53:04.767963  TIME STAMP  7. 0x76c2a000 0x00000910

 1959 15:53:04.770957  VBOOT WORK  8. 0x76c16000 0x00014000

 1960 15:53:04.774656  ROMSTG STCK 9. 0x76c15000 0x00001000

 1961 15:53:04.781377  AFTER CAR  10. 0x76c0a000 0x0000b000

 1962 15:53:04.784211  RAMSTAGE   11. 0x76b97000 0x00073000

 1963 15:53:04.787848  REFCODE    12. 0x76b42000 0x00055000

 1964 15:53:04.790838  SMM BACKUP 13. 0x76b32000 0x00010000

 1965 15:53:04.794560  4f444749   14. 0x76b30000 0x00002000

 1966 15:53:04.797496  EXT VBT15. 0x76b2d000 0x0000219f

 1967 15:53:04.801120  COREBOOT   16. 0x76b25000 0x00008000

 1968 15:53:04.804099  ACPI       17. 0x76b01000 0x00024000

 1969 15:53:04.810677  ACPI GNVS  18. 0x76b00000 0x00001000

 1970 15:53:04.814034  RAMOOPS    19. 0x76a00000 0x00100000

 1971 15:53:04.817189  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1972 15:53:04.820780  SMBIOS     21. 0x769ef000 0x00000800

 1973 15:53:04.821406  IMD small region:

 1974 15:53:04.827364    IMD ROOT    0. 0x76ffec00 0x00000400

 1975 15:53:04.830765    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1976 15:53:04.833746    POWER STATE 2. 0x76ffeb80 0x00000044

 1977 15:53:04.837544    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1978 15:53:04.840566    MEM INFO    4. 0x76ffe980 0x000001e0

 1979 15:53:04.847198  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms

 1980 15:53:04.850571  MTRR: Physical address space:

 1981 15:53:04.857480  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1982 15:53:04.863903  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1983 15:53:04.870556  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1984 15:53:04.876881  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1985 15:53:04.880358  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1986 15:53:04.886409  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1987 15:53:04.893017  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1988 15:53:04.900324  MTRR: Fixed MSR 0x250 0x0606060606060606

 1989 15:53:04.903264  MTRR: Fixed MSR 0x258 0x0606060606060606

 1990 15:53:04.906821  MTRR: Fixed MSR 0x259 0x0000000000000000

 1991 15:53:04.910371  MTRR: Fixed MSR 0x268 0x0606060606060606

 1992 15:53:04.913343  MTRR: Fixed MSR 0x269 0x0606060606060606

 1993 15:53:04.919903  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1994 15:53:04.923585  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1995 15:53:04.926740  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1996 15:53:04.930387  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1997 15:53:04.937057  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1998 15:53:04.939889  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1999 15:53:04.943667  call enable_fixed_mtrr()

 2000 15:53:04.946698  CPU physical address size: 39 bits

 2001 15:53:04.950051  MTRR: default type WB/UC MTRR counts: 6/6.

 2002 15:53:04.953092  MTRR: UC selected as default type.

 2003 15:53:04.959882  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2004 15:53:04.966540  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2005 15:53:04.973420  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2006 15:53:04.979792  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 2007 15:53:04.986546  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2008 15:53:04.993152  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 2009 15:53:04.993628  

 2010 15:53:04.996532  MTRR check

 2011 15:53:04.997002  Fixed MTRRs   : Enabled

 2012 15:53:04.999878  Variable MTRRs: Enabled

 2013 15:53:05.000434  

 2014 15:53:05.003193  MTRR: Fixed MSR 0x250 0x0606060606060606

 2015 15:53:05.009533  MTRR: Fixed MSR 0x258 0x0606060606060606

 2016 15:53:05.013071  MTRR: Fixed MSR 0x259 0x0000000000000000

 2017 15:53:05.016135  MTRR: Fixed MSR 0x268 0x0606060606060606

 2018 15:53:05.019607  MTRR: Fixed MSR 0x269 0x0606060606060606

 2019 15:53:05.026175  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2020 15:53:05.029752  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2021 15:53:05.032799  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2022 15:53:05.035957  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2023 15:53:05.039600  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2024 15:53:05.046177  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2025 15:53:05.052821  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2026 15:53:05.056343  call enable_fixed_mtrr()

 2027 15:53:05.059872  Checking cr50 for pending updates

 2028 15:53:05.060330  CPU physical address size: 39 bits

 2029 15:53:05.066632  MTRR: Fixed MSR 0x250 0x0606060606060606

 2030 15:53:05.070181  MTRR: Fixed MSR 0x250 0x0606060606060606

 2031 15:53:05.073252  MTRR: Fixed MSR 0x258 0x0606060606060606

 2032 15:53:05.076908  MTRR: Fixed MSR 0x259 0x0000000000000000

 2033 15:53:05.083399  MTRR: Fixed MSR 0x268 0x0606060606060606

 2034 15:53:05.086492  MTRR: Fixed MSR 0x269 0x0606060606060606

 2035 15:53:05.089970  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2036 15:53:05.093148  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2037 15:53:05.099787  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2038 15:53:05.103331  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2039 15:53:05.106495  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2040 15:53:05.110079  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2041 15:53:05.117415  MTRR: Fixed MSR 0x258 0x0606060606060606

 2042 15:53:05.117872  call enable_fixed_mtrr()

 2043 15:53:05.124039  MTRR: Fixed MSR 0x259 0x0000000000000000

 2044 15:53:05.126935  MTRR: Fixed MSR 0x268 0x0606060606060606

 2045 15:53:05.130604  MTRR: Fixed MSR 0x269 0x0606060606060606

 2046 15:53:05.133566  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2047 15:53:05.140015  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2048 15:53:05.143724  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2049 15:53:05.146778  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2050 15:53:05.150420  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2051 15:53:05.156717  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2052 15:53:05.160001  CPU physical address size: 39 bits

 2053 15:53:05.163220  call enable_fixed_mtrr()

 2054 15:53:05.167034  Reading cr50 TPM mode

 2055 15:53:05.171072  MTRR: Fixed MSR 0x250 0x0606060606060606

 2056 15:53:05.174029  MTRR: Fixed MSR 0x250 0x0606060606060606

 2057 15:53:05.177474  MTRR: Fixed MSR 0x258 0x0606060606060606

 2058 15:53:05.180962  MTRR: Fixed MSR 0x259 0x0000000000000000

 2059 15:53:05.187850  MTRR: Fixed MSR 0x268 0x0606060606060606

 2060 15:53:05.190593  MTRR: Fixed MSR 0x269 0x0606060606060606

 2061 15:53:05.194074  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2062 15:53:05.197365  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2063 15:53:05.203823  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2064 15:53:05.207519  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2065 15:53:05.210328  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2066 15:53:05.213891  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2067 15:53:05.220905  MTRR: Fixed MSR 0x258 0x0606060606060606

 2068 15:53:05.221470  call enable_fixed_mtrr()

 2069 15:53:05.228152  MTRR: Fixed MSR 0x259 0x0000000000000000

 2070 15:53:05.231179  MTRR: Fixed MSR 0x268 0x0606060606060606

 2071 15:53:05.234212  MTRR: Fixed MSR 0x269 0x0606060606060606

 2072 15:53:05.237858  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2073 15:53:05.244452  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2074 15:53:05.247564  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2075 15:53:05.251046  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2076 15:53:05.254045  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2077 15:53:05.261272  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2078 15:53:05.264284  CPU physical address size: 39 bits

 2079 15:53:05.267215  call enable_fixed_mtrr()

 2080 15:53:05.270928  CPU physical address size: 39 bits

 2081 15:53:05.274030  MTRR: Fixed MSR 0x250 0x0606060606060606

 2082 15:53:05.280820  MTRR: Fixed MSR 0x250 0x0606060606060606

 2083 15:53:05.284436  MTRR: Fixed MSR 0x258 0x0606060606060606

 2084 15:53:05.287515  MTRR: Fixed MSR 0x259 0x0000000000000000

 2085 15:53:05.291226  MTRR: Fixed MSR 0x268 0x0606060606060606

 2086 15:53:05.294060  MTRR: Fixed MSR 0x269 0x0606060606060606

 2087 15:53:05.300603  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2088 15:53:05.304379  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2089 15:53:05.307343  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2090 15:53:05.310839  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2091 15:53:05.317580  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2092 15:53:05.320521  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2093 15:53:05.324058  MTRR: Fixed MSR 0x258 0x0606060606060606

 2094 15:53:05.327010  call enable_fixed_mtrr()

 2095 15:53:05.330542  MTRR: Fixed MSR 0x259 0x0000000000000000

 2096 15:53:05.337006  MTRR: Fixed MSR 0x268 0x0606060606060606

 2097 15:53:05.340650  MTRR: Fixed MSR 0x269 0x0606060606060606

 2098 15:53:05.343887  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2099 15:53:05.347336  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2100 15:53:05.353820  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2101 15:53:05.356790  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2102 15:53:05.360453  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2103 15:53:05.363788  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2104 15:53:05.367775  CPU physical address size: 39 bits

 2105 15:53:05.374594  call enable_fixed_mtrr()

 2106 15:53:05.377657  CPU physical address size: 39 bits

 2107 15:53:05.380885  CPU physical address size: 39 bits

 2108 15:53:05.387672  BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms

 2109 15:53:05.394018  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2110 15:53:05.397491  Checking segment from ROM address 0xffc02b38

 2111 15:53:05.404483  Checking segment from ROM address 0xffc02b54

 2112 15:53:05.407167  Loading segment from ROM address 0xffc02b38

 2113 15:53:05.410945    code (compression=0)

 2114 15:53:05.417560    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2115 15:53:05.427047  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2116 15:53:05.427505  it's not compressed!

 2117 15:53:05.567953  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2118 15:53:05.574495  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2119 15:53:05.581344  Loading segment from ROM address 0xffc02b54

 2120 15:53:05.581790    Entry Point 0x30000000

 2121 15:53:05.584356  Loaded segments

 2122 15:53:05.590961  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2123 15:53:05.633836  Finalizing chipset.

 2124 15:53:05.637336  Finalizing SMM.

 2125 15:53:05.637789  APMC done.

 2126 15:53:05.644294  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2127 15:53:05.647491  mp_park_aps done after 0 msecs.

 2128 15:53:05.650470  Jumping to boot code at 0x30000000(0x76b25000)

 2129 15:53:05.660483  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2130 15:53:05.661001  

 2131 15:53:05.661367  

 2132 15:53:05.661695  

 2133 15:53:05.663841  Starting depthcharge on Voema...

 2134 15:53:05.664278  

 2135 15:53:05.665318  end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
 2136 15:53:05.665810  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2137 15:53:05.666239  Setting prompt string to ['volteer:']
 2138 15:53:05.666704  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
 2139 15:53:05.673811  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2140 15:53:05.674302  

 2141 15:53:05.680483  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2142 15:53:05.680926  

 2143 15:53:05.683431  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2144 15:53:05.687211  

 2145 15:53:05.690162  Failed to find eMMC card reader

 2146 15:53:05.690621  

 2147 15:53:05.690980  Wipe memory regions:

 2148 15:53:05.691307  

 2149 15:53:05.696949  	[0x00000000001000, 0x000000000a0000)

 2150 15:53:05.697395  

 2151 15:53:05.699996  	[0x00000000100000, 0x00000030000000)

 2152 15:53:05.725646  

 2153 15:53:05.728592  	[0x00000032662db0, 0x000000769ef000)

 2154 15:53:05.764790  

 2155 15:53:05.767632  	[0x00000100000000, 0x00000280400000)

 2156 15:53:05.970093  

 2157 15:53:05.973475  ec_init: CrosEC protocol v3 supported (256, 256)

 2158 15:53:05.973950  

 2159 15:53:05.980310  update_port_state: port C0 state: usb enable 1 mux conn 0

 2160 15:53:05.980752  

 2161 15:53:05.989833  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2162 15:53:05.993542  

 2163 15:53:05.996623  pmc_check_ipc_sts: STS_BUSY done after 1511 us

 2164 15:53:05.997073  

 2165 15:53:06.000364  send_conn_disc_msg: pmc_send_cmd succeeded

 2166 15:53:06.430909  

 2167 15:53:06.431052  R8152: Initializing

 2168 15:53:06.431122  

 2169 15:53:06.434126  Version 6 (ocp_data = 5c30)

 2170 15:53:06.434220  

 2171 15:53:06.437760  R8152: Done initializing

 2172 15:53:06.437847  

 2173 15:53:06.440887  Adding net device

 2174 15:53:06.742979  

 2175 15:53:06.746638  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2176 15:53:06.746728  

 2177 15:53:06.746799  

 2178 15:53:06.746862  

 2179 15:53:06.749809  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2181 15:53:06.850538  volteer: tftpboot 192.168.201.1 9406191/tftp-deploy-eqpi0a5a/kernel/bzImage 9406191/tftp-deploy-eqpi0a5a/kernel/cmdline 9406191/tftp-deploy-eqpi0a5a/ramdisk/ramdisk.cpio.gz

 2182 15:53:06.850693  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2183 15:53:06.850783  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
 2184 15:53:06.854616  tftpboot 192.168.201.1 9406191/tftp-deploy-eqpi0a5a/kernel/bzImoy-eqpi0a5a/kernel/cmdline 9406191/tftp-deploy-eqpi0a5a/ramdisk/ramdisk.cpio.gz

 2185 15:53:06.854703  

 2186 15:53:06.854779  Waiting for link

 2187 15:53:07.058062  

 2188 15:53:07.058241  done.

 2189 15:53:07.058311  

 2190 15:53:07.058375  MAC: 00:24:32:30:7e:47

 2191 15:53:07.058438  

 2192 15:53:07.060886  Sending DHCP discover... done.

 2193 15:53:07.060984  

 2194 15:53:07.064346  Waiting for reply... done.

 2195 15:53:07.064440  

 2196 15:53:07.067276  Sending DHCP request... done.

 2197 15:53:07.067425  

 2198 15:53:07.070809  Waiting for reply... done.

 2199 15:53:07.070897  

 2200 15:53:07.074262  My ip is 192.168.201.19

 2201 15:53:07.074349  

 2202 15:53:07.077368  The DHCP server ip is 192.168.201.1

 2203 15:53:07.077443  

 2204 15:53:07.083999  TFTP server IP predefined by user: 192.168.201.1

 2205 15:53:07.084080  

 2206 15:53:07.090746  Bootfile predefined by user: 9406191/tftp-deploy-eqpi0a5a/kernel/bzImage

 2207 15:53:07.090833  

 2208 15:53:07.094547  Sending tftp read request... done.

 2209 15:53:07.094655  

 2210 15:53:07.097152  Waiting for the transfer... 

 2211 15:53:07.097249  

 2212 15:53:07.652119  00000000 ################################################################

 2213 15:53:07.652302  

 2214 15:53:08.207263  00080000 ################################################################

 2215 15:53:08.207406  

 2216 15:53:08.798545  00100000 ################################################################

 2217 15:53:08.799129  

 2218 15:53:09.393574  00180000 ################################################################

 2219 15:53:09.393724  

 2220 15:53:10.014051  00200000 ################################################################

 2221 15:53:10.014226  

 2222 15:53:10.622992  00280000 ################################################################

 2223 15:53:10.623139  

 2224 15:53:11.290452  00300000 ################################################################

 2225 15:53:11.290596  

 2226 15:53:11.947250  00380000 ################################################################

 2227 15:53:11.947819  

 2228 15:53:12.646412  00400000 ################################################################

 2229 15:53:12.646980  

 2230 15:53:13.347156  00480000 ################################################################

 2231 15:53:13.347302  

 2232 15:53:13.977947  00500000 ################################################################

 2233 15:53:13.978503  

 2234 15:53:14.609536  00580000 ################################################################

 2235 15:53:14.610073  

 2236 15:53:15.241105  00600000 ################################################################

 2237 15:53:15.241251  

 2238 15:53:15.785085  00680000 ################################################################

 2239 15:53:15.785224  

 2240 15:53:16.401303  00700000 ################################################################

 2241 15:53:16.401821  

 2242 15:53:17.047842  00780000 ################################################################

 2243 15:53:17.047986  

 2244 15:53:17.668928  00800000 ################################################################

 2245 15:53:17.669146  

 2246 15:53:18.306087  00880000 ################################################################

 2247 15:53:18.306356  

 2248 15:53:18.657605  00900000 ################################## done.

 2249 15:53:18.658179  

 2250 15:53:18.660799  The bootfile was 9707520 bytes long.

 2251 15:53:18.661471  

 2252 15:53:18.664721  Sending tftp read request... done.

 2253 15:53:18.665151  

 2254 15:53:18.667800  Waiting for the transfer... 

 2255 15:53:18.668298  

 2256 15:53:19.348627  00000000 ################################################################

 2257 15:53:19.349160  

 2258 15:53:20.033805  00080000 ################################################################

 2259 15:53:20.034401  

 2260 15:53:20.710192  00100000 ################################################################

 2261 15:53:20.710745  

 2262 15:53:21.294881  00180000 ################################################################

 2263 15:53:21.295028  

 2264 15:53:21.895544  00200000 ################################################################

 2265 15:53:21.895686  

 2266 15:53:22.505316  00280000 ################################################################

 2267 15:53:22.505473  

 2268 15:53:23.115704  00300000 ################################################################

 2269 15:53:23.115869  

 2270 15:53:23.739213  00380000 ################################################################

 2271 15:53:23.739764  

 2272 15:53:24.399588  00400000 ################################################################

 2273 15:53:24.400125  

 2274 15:53:25.073841  00480000 ################################################################

 2275 15:53:25.074403  

 2276 15:53:25.434910  00500000 ################################## done.

 2277 15:53:25.435445  

 2278 15:53:25.438659  Sending tftp read request... done.

 2279 15:53:25.439097  

 2280 15:53:25.441515  Waiting for the transfer... 

 2281 15:53:25.441954  

 2282 15:53:25.442495  00000000 # done.

 2283 15:53:25.443014  

 2284 15:53:25.452026  Command line loaded dynamically from TFTP file: 9406191/tftp-deploy-eqpi0a5a/kernel/cmdline

 2285 15:53:25.452559  

 2286 15:53:25.474658  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9406191/extract-nfsrootfs-9n2kandx,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2287 15:53:25.478380  

 2288 15:53:25.481632  Shutting down all USB controllers.

 2289 15:53:25.482254  

 2290 15:53:25.482648  Removing current net device

 2291 15:53:25.483013  

 2292 15:53:25.484679  Finalizing coreboot

 2293 15:53:25.485189  

 2294 15:53:25.491451  Exiting depthcharge with code 4 at timestamp: 28466743

 2295 15:53:25.491936  

 2296 15:53:25.492315  

 2297 15:53:25.492676  Starting kernel ...

 2298 15:53:25.493222  

 2299 15:53:25.493591  

 2300 15:53:25.494914  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2301 15:53:25.495441  start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
 2302 15:53:25.495847  Setting prompt string to ['Linux version [0-9]']
 2303 15:53:25.496230  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2304 15:53:25.496617  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2306 15:57:48.496047  end: 2.2.5 auto-login-action (duration 00:04:23) [common]
 2308 15:57:48.496517  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
 2310 15:57:48.496882  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2313 15:57:48.497442  end: 2 depthcharge-action (duration 00:05:00) [common]
 2315 15:57:48.497916  Cleaning after the job
 2316 15:57:48.498097  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/ramdisk
 2317 15:57:48.499053  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/kernel
 2318 15:57:48.500411  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/nfsrootfs
 2319 15:57:48.538498  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406191/tftp-deploy-eqpi0a5a/modules
 2320 15:57:48.538813  start: 4.1 power-off (timeout 00:00:30) [common]
 2321 15:57:48.538968  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
 2322 15:57:50.713927  >> Command sent successfully.

 2323 15:57:50.716019  Returned 0 in 2 seconds
 2324 15:57:50.816611  end: 4.1 power-off (duration 00:00:02) [common]
 2326 15:57:50.816932  start: 4.2 read-feedback (timeout 00:09:58) [common]
 2327 15:57:50.817169  Listened to connection for namespace 'common' for up to 1s
 2328 15:57:51.818723  Finalising connection for namespace 'common'
 2329 15:57:51.819363  Disconnecting from shell: Finalise
 2330 15:57:51.819762  

 2331 15:57:51.921113  end: 4.2 read-feedback (duration 00:00:01) [common]
 2332 15:57:51.921714  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9406191
 2333 15:57:52.095036  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9406191
 2334 15:57:52.095235  JobError: Your job cannot terminate cleanly.