Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 15:53:21.428057 lava-dispatcher, installed at version: 2022.11
2 15:53:21.428255 start: 0 validate
3 15:53:21.428434 Start time: 2023-03-03 15:53:21.428427+00:00 (UTC)
4 15:53:21.428562 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:53:21.428692 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230224.0%2Famd64%2Finitrd.cpio.gz exists
6 15:53:21.722383 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:53:21.722553 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:53:21.724250 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:53:21.724368 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230224.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:53:21.998477 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:53:21.998651 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-24-g2070ce514972%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:53:22.276253 validate duration: 0.85
14 15:53:22.276647 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:53:22.276767 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:53:22.276859 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:53:22.276962 Not decompressing ramdisk as can be used compressed.
18 15:53:22.277089 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230224.0/amd64/initrd.cpio.gz
19 15:53:22.277192 saving as /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/ramdisk/initrd.cpio.gz
20 15:53:22.277257 total size: 5432108 (5MB)
21 15:53:22.279488 progress 0% (0MB)
22 15:53:22.284469 progress 5% (0MB)
23 15:53:22.289234 progress 10% (0MB)
24 15:53:22.295572 progress 15% (0MB)
25 15:53:22.303254 progress 20% (1MB)
26 15:53:22.311161 progress 25% (1MB)
27 15:53:22.316692 progress 30% (1MB)
28 15:53:22.325366 progress 35% (1MB)
29 15:53:22.333235 progress 40% (2MB)
30 15:53:22.338788 progress 45% (2MB)
31 15:53:22.347083 progress 50% (2MB)
32 15:53:22.355478 progress 55% (2MB)
33 15:53:22.361209 progress 60% (3MB)
34 15:53:22.368538 progress 65% (3MB)
35 15:53:22.377208 progress 70% (3MB)
36 15:53:22.382951 progress 75% (3MB)
37 15:53:22.390203 progress 80% (4MB)
38 15:53:22.397335 progress 85% (4MB)
39 15:53:22.405981 progress 90% (4MB)
40 15:53:22.413492 progress 95% (4MB)
41 15:53:22.418845 progress 100% (5MB)
42 15:53:22.419119 5MB downloaded in 0.14s (36.52MB/s)
43 15:53:22.419279 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:53:22.419537 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:53:22.419631 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:53:22.419722 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:53:22.419830 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:53:22.419901 saving as /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/kernel/bzImage
50 15:53:22.419966 total size: 9707520 (9MB)
51 15:53:22.420029 No compression specified
52 15:53:22.430047 progress 0% (0MB)
53 15:53:22.453187 progress 5% (0MB)
54 15:53:22.475096 progress 10% (0MB)
55 15:53:22.495756 progress 15% (1MB)
56 15:53:22.512775 progress 20% (1MB)
57 15:53:22.533870 progress 25% (2MB)
58 15:53:22.552992 progress 30% (2MB)
59 15:53:22.568921 progress 35% (3MB)
60 15:53:22.590916 progress 40% (3MB)
61 15:53:22.611437 progress 45% (4MB)
62 15:53:22.630783 progress 50% (4MB)
63 15:53:22.648896 progress 55% (5MB)
64 15:53:22.665514 progress 60% (5MB)
65 15:53:22.685287 progress 65% (6MB)
66 15:53:22.706252 progress 70% (6MB)
67 15:53:22.730068 progress 75% (6MB)
68 15:53:22.792454 progress 80% (7MB)
69 15:53:22.846583 progress 85% (7MB)
70 15:53:22.902888 progress 90% (8MB)
71 15:53:22.939317 progress 95% (8MB)
72 15:53:22.978123 progress 100% (9MB)
73 15:53:22.978348 9MB downloaded in 0.56s (16.58MB/s)
74 15:53:22.978506 end: 1.2.1 http-download (duration 00:00:01) [common]
76 15:53:22.978747 end: 1.2 download-retry (duration 00:00:01) [common]
77 15:53:22.978837 start: 1.3 download-retry (timeout 00:09:59) [common]
78 15:53:22.978925 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 15:53:22.979028 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230224.0/amd64/full.rootfs.tar.xz
80 15:53:22.979096 saving as /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/nfsrootfs/full.rootfs.tar
81 15:53:22.979157 total size: 124193244 (118MB)
82 15:53:22.979237 Using unxz to decompress xz
83 15:53:22.984112 progress 0% (0MB)
84 15:53:23.437989 progress 5% (5MB)
85 15:53:23.893084 progress 10% (11MB)
86 15:53:24.356604 progress 15% (17MB)
87 15:53:24.826825 progress 20% (23MB)
88 15:53:25.168599 progress 25% (29MB)
89 15:53:25.508102 progress 30% (35MB)
90 15:53:25.782225 progress 35% (41MB)
91 15:53:25.936556 progress 40% (47MB)
92 15:53:26.306631 progress 45% (53MB)
93 15:53:26.667610 progress 50% (59MB)
94 15:53:27.007581 progress 55% (65MB)
95 15:53:27.361087 progress 60% (71MB)
96 15:53:27.696604 progress 65% (77MB)
97 15:53:28.075760 progress 70% (82MB)
98 15:53:28.494668 progress 75% (88MB)
99 15:53:28.916190 progress 80% (94MB)
100 15:53:29.045307 progress 85% (100MB)
101 15:53:29.206320 progress 90% (106MB)
102 15:53:29.539564 progress 95% (112MB)
103 15:53:29.907854 progress 100% (118MB)
104 15:53:29.912702 118MB downloaded in 6.93s (17.08MB/s)
105 15:53:29.912963 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:53:29.913271 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:53:29.913366 start: 1.4 download-retry (timeout 00:09:52) [common]
109 15:53:29.913455 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 15:53:29.913575 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-24-g2070ce514972/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:53:29.913653 saving as /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/modules/modules.tar
112 15:53:29.913717 total size: 64716 (0MB)
113 15:53:29.913781 Using unxz to decompress xz
114 15:53:29.918261 progress 50% (0MB)
115 15:53:29.918686 progress 100% (0MB)
116 15:53:29.922924 0MB downloaded in 0.01s (6.71MB/s)
117 15:53:29.923144 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:53:29.923414 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:53:29.923513 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 15:53:29.923648 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 15:53:31.614799 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9406211/extract-nfsrootfs-i8lq2bqn
123 15:53:31.615011 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 15:53:31.615130 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 15:53:31.615284 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs
126 15:53:31.615404 makedir: /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin
127 15:53:31.615505 makedir: /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/tests
128 15:53:31.615608 makedir: /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/results
129 15:53:31.615730 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-add-keys
130 15:53:31.615877 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-add-sources
131 15:53:31.616012 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-background-process-start
132 15:53:31.616145 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-background-process-stop
133 15:53:31.616277 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-common-functions
134 15:53:31.616422 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-echo-ipv4
135 15:53:31.616554 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-install-packages
136 15:53:31.616686 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-installed-packages
137 15:53:31.616817 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-os-build
138 15:53:31.616947 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-probe-channel
139 15:53:31.617077 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-probe-ip
140 15:53:31.617206 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-target-ip
141 15:53:31.617336 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-target-mac
142 15:53:31.617466 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-target-storage
143 15:53:31.617601 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-test-case
144 15:53:31.617733 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-test-event
145 15:53:31.617863 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-test-feedback
146 15:53:31.617992 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-test-raise
147 15:53:31.618120 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-test-reference
148 15:53:31.618250 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-test-runner
149 15:53:31.618379 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-test-set
150 15:53:31.618507 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-test-shell
151 15:53:31.618638 Updating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-install-packages (oe)
152 15:53:31.618771 Updating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/bin/lava-installed-packages (oe)
153 15:53:31.618886 Creating /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/environment
154 15:53:31.618988 LAVA metadata
155 15:53:31.619066 - LAVA_JOB_ID=9406211
156 15:53:31.619150 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:53:31.619274 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 15:53:31.619347 skipped lava-vland-overlay
159 15:53:31.619450 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:53:31.619552 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:53:31.619625 skipped lava-multinode-overlay
162 15:53:31.619728 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:53:31.619830 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:53:31.619915 Loading test definitions
165 15:53:31.620030 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 15:53:31.620117 Using /lava-9406211 at stage 0
167 15:53:31.620239 Fetching tests from https://github.com/kernelci/test-definitions
168 15:53:31.620495 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/0/tests/0_ltp-ipc'
169 15:53:38.627509 Running '/usr/bin/git checkout kernelci.org
170 15:53:38.762540 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 15:53:38.763304 uuid=9406211_1.5.2.3.1 testdef=None
172 15:53:38.763482 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
174 15:53:38.763764 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
175 15:53:38.764643 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 15:53:38.764922 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
178 15:53:38.765948 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 15:53:38.766233 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
181 15:53:38.767219 runner path: /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/0/tests/0_ltp-ipc test_uuid 9406211_1.5.2.3.1
182 15:53:38.767320 SKIPFILE='skipfile-lkft.yaml'
183 15:53:38.767400 SKIP_INSTALL='true'
184 15:53:38.767483 TST_CMDFILES='ipc'
185 15:53:38.767650 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 15:53:38.767942 Creating lava-test-runner.conf files
188 15:53:38.768028 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9406211/lava-overlay-x8jqccjs/lava-9406211/0 for stage 0
189 15:53:38.768144 - 0_ltp-ipc
190 15:53:38.768281 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
191 15:53:38.768412 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
192 15:53:46.151188 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 15:53:46.151349 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
194 15:53:46.151446 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 15:53:46.151548 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
196 15:53:46.151644 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
197 15:53:46.253023 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 15:53:46.253374 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
199 15:53:46.253568 extracting modules file /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406211/extract-nfsrootfs-i8lq2bqn
200 15:53:46.257617 extracting modules file /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9406211/extract-overlay-ramdisk-cfhzyclb/ramdisk
201 15:53:46.261405 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 15:53:46.261518 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
203 15:53:46.261604 [common] Applying overlay to NFS
204 15:53:46.261680 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9406211/compress-overlay-m0s1bug_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9406211/extract-nfsrootfs-i8lq2bqn
205 15:53:46.715556 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 15:53:46.715742 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
207 15:53:46.715853 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 15:53:46.715944 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
209 15:53:46.716026 Building ramdisk /var/lib/lava/dispatcher/tmp/9406211/extract-overlay-ramdisk-cfhzyclb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9406211/extract-overlay-ramdisk-cfhzyclb/ramdisk
210 15:53:46.749420 >> 24777 blocks
211 15:53:47.208170 rename /var/lib/lava/dispatcher/tmp/9406211/extract-overlay-ramdisk-cfhzyclb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/ramdisk/ramdisk.cpio.gz
212 15:53:47.208638 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 15:53:47.208757 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
214 15:53:47.208869 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
215 15:53:47.208963 No mkimage arch provided, not using FIT.
216 15:53:47.209057 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 15:53:47.209143 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 15:53:47.209241 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
219 15:53:47.209337 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
220 15:53:47.209420 No LXC device requested
221 15:53:47.209503 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 15:53:47.209595 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
223 15:53:47.209678 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 15:53:47.209750 Checking files for TFTP limit of 4294967296 bytes.
225 15:53:47.210135 end: 1 tftp-deploy (duration 00:00:25) [common]
226 15:53:47.210246 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 15:53:47.210343 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 15:53:47.210507 substitutions:
229 15:53:47.210579 - {DTB}: None
230 15:53:47.210646 - {INITRD}: 9406211/tftp-deploy-tiacepxo/ramdisk/ramdisk.cpio.gz
231 15:53:47.210709 - {KERNEL}: 9406211/tftp-deploy-tiacepxo/kernel/bzImage
232 15:53:47.210769 - {LAVA_MAC}: None
233 15:53:47.210828 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9406211/extract-nfsrootfs-i8lq2bqn
234 15:53:47.210887 - {NFS_SERVER_IP}: 192.168.201.1
235 15:53:47.210944 - {PRESEED_CONFIG}: None
236 15:53:47.211001 - {PRESEED_LOCAL}: None
237 15:53:47.211058 - {RAMDISK}: 9406211/tftp-deploy-tiacepxo/ramdisk/ramdisk.cpio.gz
238 15:53:47.211117 - {ROOT_PART}: None
239 15:53:47.211174 - {ROOT}: None
240 15:53:47.211235 - {SERVER_IP}: 192.168.201.1
241 15:53:47.211294 - {TEE}: None
242 15:53:47.211351 Parsed boot commands:
243 15:53:47.211407 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 15:53:47.211564 Parsed boot commands: tftpboot 192.168.201.1 9406211/tftp-deploy-tiacepxo/kernel/bzImage 9406211/tftp-deploy-tiacepxo/kernel/cmdline 9406211/tftp-deploy-tiacepxo/ramdisk/ramdisk.cpio.gz
245 15:53:47.211675 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 15:53:47.211780 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 15:53:47.211886 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 15:53:47.211977 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 15:53:47.212049 Not connected, no need to disconnect.
250 15:53:47.212130 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 15:53:47.212214 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 15:53:47.212286 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
253 15:53:47.215199 Setting prompt string to ['lava-test: # ']
254 15:53:47.215480 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 15:53:47.215606 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 15:53:47.215717 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 15:53:47.215812 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 15:53:47.215986 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
259 15:53:56.558127 >> Command sent successfully.
260 15:53:56.568291 Returned 0 in 9 seconds
261 15:53:56.670043 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
263 15:53:56.671683 end: 2.2.2 reset-device (duration 00:00:09) [common]
264 15:53:56.672258 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
265 15:53:56.672955 Setting prompt string to 'Starting depthcharge on Voema...'
266 15:53:56.673373 Changing prompt to 'Starting depthcharge on Voema...'
267 15:53:56.673769 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 15:53:56.675204 [Enter `^Ec?' for help]
269 15:53:56.675765
270 15:53:56.676224
271 15:53:56.676654 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 15:53:56.677039 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
273 15:53:56.677404 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
274 15:53:56.677750 CPU: AES supported, TXT NOT supported, VT supported
275 15:53:56.678090 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
276 15:53:56.678428 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
277 15:53:56.678765 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
278 15:53:56.679098 VBOOT: Loading verstage.
279 15:53:56.679429 FMAP: Found "FLASH" version 1.1 at 0x1804000.
280 15:53:56.679763 FMAP: base = 0x0 size = 0x2000000 #areas = 32
281 15:53:56.680093 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
282 15:53:56.680446 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
283 15:53:56.680780 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
284 15:53:56.681109
285 15:53:56.681436
286 15:53:56.681759 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
287 15:53:56.682212 Probing TPM: . done!
288 15:53:56.682560 TPM ready after 0 ms
289 15:53:56.682888 Connected to device vid:did:rid of 1ae0:0028:00
290 15:53:56.683218 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
291 15:53:56.683568 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
292 15:53:56.683903 Initialized TPM device CR50 revision 0
293 15:53:56.684298 tlcl_send_startup: Startup return code is 0
294 15:53:56.684653 TPM: setup succeeded
295 15:53:56.684982 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
296 15:53:56.685322 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
297 15:53:56.685778 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
298 15:53:56.686116 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
299 15:53:56.686446 Chrome EC: UHEPI supported
300 15:53:56.686771 Phase 1
301 15:53:56.687109 FMAP: area GBB found @ 1805000 (458752 bytes)
302 15:53:56.687444 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 15:53:56.687783 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 15:53:56.688081 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
305 15:53:56.688396 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
306 15:53:56.688785 Recovery requested (1009000e)
307 15:53:56.689108 TPM: Extending digest for VBOOT: boot mode into PCR 0
308 15:53:56.689410 tlcl_extend: response is 0
309 15:53:56.689708 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
310 15:53:56.690004 tlcl_extend: response is 0
311 15:53:56.690300 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
312 15:53:56.690600 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
313 15:53:56.690895 BS: verstage times (exec / console): total (unknown) / 142 ms
314 15:53:56.691189
315 15:53:56.691479
316 15:53:56.691823 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
317 15:53:56.692173 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
318 15:53:56.692525 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
319 15:53:56.692830 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
320 15:53:56.693131 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
321 15:53:56.693427 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
322 15:53:56.693725 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
323 15:53:56.694021 TCO_STS: 0000 0000
324 15:53:56.694314 GEN_PMCON: d0015038 00002200
325 15:53:56.694610 GBLRST_CAUSE: 00000000 00000000
326 15:53:56.694905 HPR_CAUSE0: 00000000
327 15:53:56.695196 prev_sleep_state 5
328 15:53:56.695593 Boot Count incremented to 17478
329 15:53:56.695904 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
330 15:53:56.696206 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 15:53:56.696545 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 15:53:56.696848 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
333 15:53:56.697151 Chrome EC: UHEPI supported
334 15:53:56.697450 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
335 15:53:56.697748 Probing TPM: done!
336 15:53:56.698044 Connected to device vid:did:rid of 1ae0:0028:00
337 15:53:56.698342 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
338 15:53:56.698959 Initialized TPM device CR50 revision 0
339 15:53:56.699208 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
340 15:53:56.699431 MRC: Hash idx 0x100b comparison successful.
341 15:53:56.699647 MRC cache found, size faa8
342 15:53:56.699864 bootmode is set to: 2
343 15:53:56.700078 SPD index = 0
344 15:53:56.705782 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
345 15:53:56.708806 SPD: module type is LPDDR4X
346 15:53:56.712301 SPD: module part number is MT53E512M64D4NW-046
347 15:53:56.718321 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
348 15:53:56.725723 SPD: device width 16 bits, bus width 16 bits
349 15:53:56.728511 SPD: module size is 1024 MB (per channel)
350 15:53:57.163105 CBMEM:
351 15:53:57.165748 IMD: root @ 0x76fff000 254 entries.
352 15:53:57.169375 IMD: root @ 0x76ffec00 62 entries.
353 15:53:57.172602 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
354 15:53:57.179163 FMAP: area RW_VPD found @ f35000 (8192 bytes)
355 15:53:57.182677 External stage cache:
356 15:53:57.186081 IMD: root @ 0x7b3ff000 254 entries.
357 15:53:57.189176 IMD: root @ 0x7b3fec00 62 entries.
358 15:53:57.204744 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
359 15:53:57.211392 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
360 15:53:57.217647 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
361 15:53:57.231984 MRC: 'RECOVERY_MRC_CACHE' does not need update.
362 15:53:57.236451 cse_lite: Skip switching to RW in the recovery path
363 15:53:57.239519 8 DIMMs found
364 15:53:57.240041 SMM Memory Map
365 15:53:57.243133 SMRAM : 0x7b000000 0x800000
366 15:53:57.246102 Subregion 0: 0x7b000000 0x200000
367 15:53:57.249442 Subregion 1: 0x7b200000 0x200000
368 15:53:57.253302 Subregion 2: 0x7b400000 0x400000
369 15:53:57.256590 top_of_ram = 0x77000000
370 15:53:57.262721 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
371 15:53:57.266176 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
372 15:53:57.273023 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
373 15:53:57.276490 MTRR Range: Start=ff000000 End=0 (Size 1000000)
374 15:53:57.286045 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
375 15:53:57.292473 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
376 15:53:57.302376 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
377 15:53:57.306030 Processing 211 relocs. Offset value of 0x74c0b000
378 15:53:57.314887 BS: romstage times (exec / console): total (unknown) / 277 ms
379 15:53:57.321195
380 15:53:57.321778
381 15:53:57.330898 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
382 15:53:57.334087 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 15:53:57.344197 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 15:53:57.351130 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 15:53:57.357212 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
386 15:53:57.364180 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
387 15:53:57.410948 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
388 15:53:57.417482 Processing 5008 relocs. Offset value of 0x75d98000
389 15:53:57.420613 BS: postcar times (exec / console): total (unknown) / 59 ms
390 15:53:57.424033
391 15:53:57.424575
392 15:53:57.434543 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
393 15:53:57.435126 Normal boot
394 15:53:57.437971 FW_CONFIG value is 0x804c02
395 15:53:57.441070 PCI: 00:07.0 disabled by fw_config
396 15:53:57.444542 PCI: 00:07.1 disabled by fw_config
397 15:53:57.447750 PCI: 00:0d.2 disabled by fw_config
398 15:53:57.454537 PCI: 00:1c.7 disabled by fw_config
399 15:53:57.457589 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
400 15:53:57.464565 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
401 15:53:57.467925 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
402 15:53:57.474315 GENERIC: 0.0 disabled by fw_config
403 15:53:57.477852 GENERIC: 1.0 disabled by fw_config
404 15:53:57.480727 fw_config match found: DB_USB=USB3_ACTIVE
405 15:53:57.484221 fw_config match found: DB_USB=USB3_ACTIVE
406 15:53:57.487665 fw_config match found: DB_USB=USB3_ACTIVE
407 15:53:57.493723 fw_config match found: DB_USB=USB3_ACTIVE
408 15:53:57.497346 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
409 15:53:57.507271 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
410 15:53:57.513941 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
411 15:53:57.520430 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
412 15:53:57.526690 microcode: sig=0x806c1 pf=0x80 revision=0x86
413 15:53:57.529916 microcode: Update skipped, already up-to-date
414 15:53:57.536823 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
415 15:53:57.565091 Detected 4 core, 8 thread CPU.
416 15:53:57.567999 Setting up SMI for CPU
417 15:53:57.571597 IED base = 0x7b400000
418 15:53:57.575051 IED size = 0x00400000
419 15:53:57.575641 Will perform SMM setup.
420 15:53:57.581959 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
421 15:53:57.588016 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
422 15:53:57.594612 Processing 16 relocs. Offset value of 0x00030000
423 15:53:57.597791 Attempting to start 7 APs
424 15:53:57.601616 Waiting for 10ms after sending INIT.
425 15:53:57.617232 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
426 15:53:57.620863 AP: slot 5 apic_id 4.
427 15:53:57.624039 AP: slot 4 apic_id 5.
428 15:53:57.624666 AP: slot 2 apic_id 3.
429 15:53:57.626903 AP: slot 6 apic_id 2.
430 15:53:57.630319 AP: slot 3 apic_id 6.
431 15:53:57.630820 AP: slot 7 apic_id 7.
432 15:53:57.631214 done.
433 15:53:57.637172 Waiting for 2nd SIPI to complete...done.
434 15:53:57.643342 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
435 15:53:57.649979 Processing 13 relocs. Offset value of 0x00038000
436 15:53:57.653885 Unable to locate Global NVS
437 15:53:57.660102 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
438 15:53:57.664251 Installing permanent SMM handler to 0x7b000000
439 15:53:57.673499 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
440 15:53:57.676726 Processing 794 relocs. Offset value of 0x7b010000
441 15:53:57.686943 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
442 15:53:57.689942 Processing 13 relocs. Offset value of 0x7b008000
443 15:53:57.696527 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
444 15:53:57.703622 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
445 15:53:57.706332 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
446 15:53:57.713195 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
447 15:53:57.719778 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
448 15:53:57.726401 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
449 15:53:57.733401 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
450 15:53:57.734011 Unable to locate Global NVS
451 15:53:57.742730 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
452 15:53:57.746208 Clearing SMI status registers
453 15:53:57.746800 SMI_STS: PM1
454 15:53:57.749344 PM1_STS: PWRBTN
455 15:53:57.755831 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 15:53:57.759507 In relocation handler: CPU 0
457 15:53:57.762660 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 15:53:57.769902 Writing SMRR. base = 0x7b000006, mask=0xff800c00
459 15:53:57.770625 Relocation complete.
460 15:53:57.779882 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
461 15:53:57.782868 In relocation handler: CPU 1
462 15:53:57.786515 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
463 15:53:57.787121 Relocation complete.
464 15:53:57.796088 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
465 15:53:57.796756 In relocation handler: CPU 2
466 15:53:57.802859 New SMBASE=0x7afff800 IEDBASE=0x7b400000
467 15:53:57.803456 Relocation complete.
468 15:53:57.812545 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
469 15:53:57.813152 In relocation handler: CPU 6
470 15:53:57.819056 New SMBASE=0x7affe800 IEDBASE=0x7b400000
471 15:53:57.822408 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 15:53:57.825913 Relocation complete.
473 15:53:57.832345 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
474 15:53:57.835488 In relocation handler: CPU 5
475 15:53:57.838826 New SMBASE=0x7affec00 IEDBASE=0x7b400000
476 15:53:57.845773 Writing SMRR. base = 0x7b000006, mask=0xff800c00
477 15:53:57.846376 Relocation complete.
478 15:53:57.856064 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
479 15:53:57.856722 In relocation handler: CPU 4
480 15:53:57.862220 New SMBASE=0x7afff000 IEDBASE=0x7b400000
481 15:53:57.862828 Relocation complete.
482 15:53:57.872231 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
483 15:53:57.872883 In relocation handler: CPU 7
484 15:53:57.878525 New SMBASE=0x7affe400 IEDBASE=0x7b400000
485 15:53:57.879125 Relocation complete.
486 15:53:57.885393 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
487 15:53:57.888844 In relocation handler: CPU 3
488 15:53:57.895745 New SMBASE=0x7afff400 IEDBASE=0x7b400000
489 15:53:57.898926 Writing SMRR. base = 0x7b000006, mask=0xff800c00
490 15:53:57.902671 Relocation complete.
491 15:53:57.903234 Initializing CPU #0
492 15:53:57.905941 CPU: vendor Intel device 806c1
493 15:53:57.908842 CPU: family 06, model 8c, stepping 01
494 15:53:57.912675 Clearing out pending MCEs
495 15:53:57.915910 Setting up local APIC...
496 15:53:57.918978 apic_id: 0x00 done.
497 15:53:57.922292 Turbo is available but hidden
498 15:53:57.926064 Turbo is available and visible
499 15:53:57.928856 microcode: Update skipped, already up-to-date
500 15:53:57.932521 CPU #0 initialized
501 15:53:57.933112 Initializing CPU #1
502 15:53:57.935332 Initializing CPU #3
503 15:53:57.935831 Initializing CPU #7
504 15:53:57.938960 CPU: vendor Intel device 806c1
505 15:53:57.945755 CPU: family 06, model 8c, stepping 01
506 15:53:57.946349 Initializing CPU #6
507 15:53:57.949138 Initializing CPU #5
508 15:53:57.949745 Initializing CPU #4
509 15:53:57.951724 CPU: vendor Intel device 806c1
510 15:53:57.955745 CPU: family 06, model 8c, stepping 01
511 15:53:57.958798 CPU: vendor Intel device 806c1
512 15:53:57.965215 CPU: family 06, model 8c, stepping 01
513 15:53:57.965821 Clearing out pending MCEs
514 15:53:57.968579 Clearing out pending MCEs
515 15:53:57.972288 Setting up local APIC...
516 15:53:57.975163 Clearing out pending MCEs
517 15:53:57.978545 CPU: vendor Intel device 806c1
518 15:53:57.981850 CPU: family 06, model 8c, stepping 01
519 15:53:57.985411 Setting up local APIC...
520 15:53:57.988783 CPU: vendor Intel device 806c1
521 15:53:57.991910 CPU: family 06, model 8c, stepping 01
522 15:53:57.992446 Initializing CPU #2
523 15:53:57.995161 apic_id: 0x04 done.
524 15:53:57.998149 Setting up local APIC...
525 15:53:57.998652 apic_id: 0x06 done.
526 15:53:58.001154 Clearing out pending MCEs
527 15:53:58.008379 microcode: Update skipped, already up-to-date
528 15:53:58.008994 Setting up local APIC...
529 15:53:58.011437 apic_id: 0x05 done.
530 15:53:58.014919 CPU #3 initialized
531 15:53:58.015524 apic_id: 0x07 done.
532 15:53:58.021641 microcode: Update skipped, already up-to-date
533 15:53:58.024907 microcode: Update skipped, already up-to-date
534 15:53:58.027920 CPU #5 initialized
535 15:53:58.028450 CPU #4 initialized
536 15:53:58.031358 CPU: vendor Intel device 806c1
537 15:53:58.034554 CPU: family 06, model 8c, stepping 01
538 15:53:58.037482 CPU: vendor Intel device 806c1
539 15:53:58.041005 CPU: family 06, model 8c, stepping 01
540 15:53:58.044243 Clearing out pending MCEs
541 15:53:58.047770 Clearing out pending MCEs
542 15:53:58.050950 Setting up local APIC...
543 15:53:58.054432 Clearing out pending MCEs
544 15:53:58.055025 apic_id: 0x02 done.
545 15:53:58.057564 Setting up local APIC...
546 15:53:58.060782 microcode: Update skipped, already up-to-date
547 15:53:58.067250 microcode: Update skipped, already up-to-date
548 15:53:58.067870 apic_id: 0x03 done.
549 15:53:58.070731 CPU #6 initialized
550 15:53:58.074374 microcode: Update skipped, already up-to-date
551 15:53:58.077519 Setting up local APIC...
552 15:53:58.080556 CPU #7 initialized
553 15:53:58.081179 CPU #2 initialized
554 15:53:58.083848 apic_id: 0x01 done.
555 15:53:58.087263 microcode: Update skipped, already up-to-date
556 15:53:58.090908 CPU #1 initialized
557 15:53:58.094061 bsp_do_flight_plan done after 455 msecs.
558 15:53:58.097519 CPU: frequency set to 4000 MHz
559 15:53:58.100371 Enabling SMIs.
560 15:53:58.106920 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
561 15:53:58.122200 SATAXPCIE1 indicates PCIe NVMe is present
562 15:53:58.125357 Probing TPM: done!
563 15:53:58.128980 Connected to device vid:did:rid of 1ae0:0028:00
564 15:53:58.139284 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
565 15:53:58.142761 Initialized TPM device CR50 revision 0
566 15:53:58.145942 Enabling S0i3.4
567 15:53:58.152533 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
568 15:53:58.156417 Found a VBT of 8704 bytes after decompression
569 15:53:58.162655 cse_lite: CSE RO boot. HybridStorageMode disabled
570 15:53:58.168892 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
571 15:53:58.245292 FSPS returned 0
572 15:53:58.248634 Executing Phase 1 of FspMultiPhaseSiInit
573 15:53:58.258686 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
574 15:53:58.261644 port C0 DISC req: usage 1 usb3 1 usb2 5
575 15:53:58.264902 Raw Buffer output 0 00000511
576 15:53:58.268629 Raw Buffer output 1 00000000
577 15:53:58.272103 pmc_send_ipc_cmd succeeded
578 15:53:58.279084 port C1 DISC req: usage 1 usb3 2 usb2 3
579 15:53:58.279687 Raw Buffer output 0 00000321
580 15:53:58.281712 Raw Buffer output 1 00000000
581 15:53:58.286279 pmc_send_ipc_cmd succeeded
582 15:53:58.291701 Detected 4 core, 8 thread CPU.
583 15:53:58.294882 Detected 4 core, 8 thread CPU.
584 15:53:58.528780 Display FSP Version Info HOB
585 15:53:58.532107 Reference Code - CPU = a.0.4c.31
586 15:53:58.535085 uCode Version = 0.0.0.86
587 15:53:58.538328 TXT ACM version = ff.ff.ff.ffff
588 15:53:58.541673 Reference Code - ME = a.0.4c.31
589 15:53:58.545065 MEBx version = 0.0.0.0
590 15:53:58.548658 ME Firmware Version = Consumer SKU
591 15:53:58.551834 Reference Code - PCH = a.0.4c.31
592 15:53:58.554747 PCH-CRID Status = Disabled
593 15:53:58.558324 PCH-CRID Original Value = ff.ff.ff.ffff
594 15:53:58.561727 PCH-CRID New Value = ff.ff.ff.ffff
595 15:53:58.564827 OPROM - RST - RAID = ff.ff.ff.ffff
596 15:53:58.568149 PCH Hsio Version = 4.0.0.0
597 15:53:58.571538 Reference Code - SA - System Agent = a.0.4c.31
598 15:53:58.574773 Reference Code - MRC = 2.0.0.1
599 15:53:58.578496 SA - PCIe Version = a.0.4c.31
600 15:53:58.581651 SA-CRID Status = Disabled
601 15:53:58.584990 SA-CRID Original Value = 0.0.0.1
602 15:53:58.587740 SA-CRID New Value = 0.0.0.1
603 15:53:58.591132 OPROM - VBIOS = ff.ff.ff.ffff
604 15:53:58.595414 IO Manageability Engine FW Version = 11.1.4.0
605 15:53:58.598049 PHY Build Version = 0.0.0.e0
606 15:53:58.601392 Thunderbolt(TM) FW Version = 0.0.0.0
607 15:53:58.608186 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
608 15:53:58.611244 ITSS IRQ Polarities Before:
609 15:53:58.611839 IPC0: 0xffffffff
610 15:53:58.614437 IPC1: 0xffffffff
611 15:53:58.614979 IPC2: 0xffffffff
612 15:53:58.618294 IPC3: 0xffffffff
613 15:53:58.621004 ITSS IRQ Polarities After:
614 15:53:58.621503 IPC0: 0xffffffff
615 15:53:58.624662 IPC1: 0xffffffff
616 15:53:58.625274 IPC2: 0xffffffff
617 15:53:58.628134 IPC3: 0xffffffff
618 15:53:58.631760 Found PCIe Root Port #9 at PCI: 00:1d.0.
619 15:53:58.643998 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
620 15:53:58.654461 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
621 15:53:58.667681 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
622 15:53:58.674182 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
623 15:53:58.677813 Enumerating buses...
624 15:53:58.681311 Show all devs... Before device enumeration.
625 15:53:58.683988 Root Device: enabled 1
626 15:53:58.684636 DOMAIN: 0000: enabled 1
627 15:53:58.687460 CPU_CLUSTER: 0: enabled 1
628 15:53:58.690949 PCI: 00:00.0: enabled 1
629 15:53:58.694038 PCI: 00:02.0: enabled 1
630 15:53:58.694540 PCI: 00:04.0: enabled 1
631 15:53:58.697718 PCI: 00:05.0: enabled 1
632 15:53:58.700616 PCI: 00:06.0: enabled 0
633 15:53:58.703749 PCI: 00:07.0: enabled 0
634 15:53:58.704253 PCI: 00:07.1: enabled 0
635 15:53:58.707224 PCI: 00:07.2: enabled 0
636 15:53:58.710665 PCI: 00:07.3: enabled 0
637 15:53:58.713926 PCI: 00:08.0: enabled 1
638 15:53:58.714431 PCI: 00:09.0: enabled 0
639 15:53:58.717343 PCI: 00:0a.0: enabled 0
640 15:53:58.720875 PCI: 00:0d.0: enabled 1
641 15:53:58.721467 PCI: 00:0d.1: enabled 0
642 15:53:58.724353 PCI: 00:0d.2: enabled 0
643 15:53:58.727287 PCI: 00:0d.3: enabled 0
644 15:53:58.730781 PCI: 00:0e.0: enabled 0
645 15:53:58.731379 PCI: 00:10.2: enabled 1
646 15:53:58.733781 PCI: 00:10.6: enabled 0
647 15:53:58.737112 PCI: 00:10.7: enabled 0
648 15:53:58.740381 PCI: 00:12.0: enabled 0
649 15:53:58.740888 PCI: 00:12.6: enabled 0
650 15:53:58.743565 PCI: 00:13.0: enabled 0
651 15:53:58.747139 PCI: 00:14.0: enabled 1
652 15:53:58.750731 PCI: 00:14.1: enabled 0
653 15:53:58.751329 PCI: 00:14.2: enabled 1
654 15:53:58.753385 PCI: 00:14.3: enabled 1
655 15:53:58.756986 PCI: 00:15.0: enabled 1
656 15:53:58.760209 PCI: 00:15.1: enabled 1
657 15:53:58.760864 PCI: 00:15.2: enabled 1
658 15:53:58.763722 PCI: 00:15.3: enabled 1
659 15:53:58.767346 PCI: 00:16.0: enabled 1
660 15:53:58.767971 PCI: 00:16.1: enabled 0
661 15:53:58.770212 PCI: 00:16.2: enabled 0
662 15:53:58.773818 PCI: 00:16.3: enabled 0
663 15:53:58.776840 PCI: 00:16.4: enabled 0
664 15:53:58.777348 PCI: 00:16.5: enabled 0
665 15:53:58.780132 PCI: 00:17.0: enabled 1
666 15:53:58.783727 PCI: 00:19.0: enabled 0
667 15:53:58.786946 PCI: 00:19.1: enabled 1
668 15:53:58.787547 PCI: 00:19.2: enabled 0
669 15:53:58.790048 PCI: 00:1c.0: enabled 1
670 15:53:58.793302 PCI: 00:1c.1: enabled 0
671 15:53:58.796606 PCI: 00:1c.2: enabled 0
672 15:53:58.797203 PCI: 00:1c.3: enabled 0
673 15:53:58.800224 PCI: 00:1c.4: enabled 0
674 15:53:58.803730 PCI: 00:1c.5: enabled 0
675 15:53:58.806656 PCI: 00:1c.6: enabled 1
676 15:53:58.807161 PCI: 00:1c.7: enabled 0
677 15:53:58.810240 PCI: 00:1d.0: enabled 1
678 15:53:58.813534 PCI: 00:1d.1: enabled 0
679 15:53:58.816741 PCI: 00:1d.2: enabled 1
680 15:53:58.817340 PCI: 00:1d.3: enabled 0
681 15:53:58.819991 PCI: 00:1e.0: enabled 1
682 15:53:58.823522 PCI: 00:1e.1: enabled 0
683 15:53:58.824124 PCI: 00:1e.2: enabled 1
684 15:53:58.826666 PCI: 00:1e.3: enabled 1
685 15:53:58.829755 PCI: 00:1f.0: enabled 1
686 15:53:58.833018 PCI: 00:1f.1: enabled 0
687 15:53:58.833612 PCI: 00:1f.2: enabled 1
688 15:53:58.836579 PCI: 00:1f.3: enabled 1
689 15:53:58.839649 PCI: 00:1f.4: enabled 0
690 15:53:58.842846 PCI: 00:1f.5: enabled 1
691 15:53:58.843349 PCI: 00:1f.6: enabled 0
692 15:53:58.846207 PCI: 00:1f.7: enabled 0
693 15:53:58.849558 APIC: 00: enabled 1
694 15:53:58.850056 GENERIC: 0.0: enabled 1
695 15:53:58.853162 GENERIC: 0.0: enabled 1
696 15:53:58.856522 GENERIC: 1.0: enabled 1
697 15:53:58.860281 GENERIC: 0.0: enabled 1
698 15:53:58.860933 GENERIC: 1.0: enabled 1
699 15:53:58.862792 USB0 port 0: enabled 1
700 15:53:58.866700 GENERIC: 0.0: enabled 1
701 15:53:58.869939 USB0 port 0: enabled 1
702 15:53:58.870545 GENERIC: 0.0: enabled 1
703 15:53:58.872862 I2C: 00:1a: enabled 1
704 15:53:58.876275 I2C: 00:31: enabled 1
705 15:53:58.876804 I2C: 00:32: enabled 1
706 15:53:58.879623 I2C: 00:10: enabled 1
707 15:53:58.882890 I2C: 00:15: enabled 1
708 15:53:58.883389 GENERIC: 0.0: enabled 0
709 15:53:58.886427 GENERIC: 1.0: enabled 0
710 15:53:58.889293 GENERIC: 0.0: enabled 1
711 15:53:58.892972 SPI: 00: enabled 1
712 15:53:58.893568 SPI: 00: enabled 1
713 15:53:58.895926 PNP: 0c09.0: enabled 1
714 15:53:58.899500 GENERIC: 0.0: enabled 1
715 15:53:58.900097 USB3 port 0: enabled 1
716 15:53:58.902498 USB3 port 1: enabled 1
717 15:53:58.905772 USB3 port 2: enabled 0
718 15:53:58.906273 USB3 port 3: enabled 0
719 15:53:58.909353 USB2 port 0: enabled 0
720 15:53:58.912690 USB2 port 1: enabled 1
721 15:53:58.915647 USB2 port 2: enabled 1
722 15:53:58.916147 USB2 port 3: enabled 0
723 15:53:58.919108 USB2 port 4: enabled 1
724 15:53:58.922354 USB2 port 5: enabled 0
725 15:53:58.922856 USB2 port 6: enabled 0
726 15:53:58.925398 USB2 port 7: enabled 0
727 15:53:58.929378 USB2 port 8: enabled 0
728 15:53:58.932501 USB2 port 9: enabled 0
729 15:53:58.933092 USB3 port 0: enabled 0
730 15:53:58.935684 USB3 port 1: enabled 1
731 15:53:58.938982 USB3 port 2: enabled 0
732 15:53:58.939486 USB3 port 3: enabled 0
733 15:53:58.942331 GENERIC: 0.0: enabled 1
734 15:53:58.945291 GENERIC: 1.0: enabled 1
735 15:53:58.945792 APIC: 01: enabled 1
736 15:53:58.948797 APIC: 03: enabled 1
737 15:53:58.952174 APIC: 06: enabled 1
738 15:53:58.952883 APIC: 05: enabled 1
739 15:53:58.955498 APIC: 04: enabled 1
740 15:53:58.958516 APIC: 02: enabled 1
741 15:53:58.959024 APIC: 07: enabled 1
742 15:53:58.961856 Compare with tree...
743 15:53:58.965367 Root Device: enabled 1
744 15:53:58.965962 DOMAIN: 0000: enabled 1
745 15:53:58.968884 PCI: 00:00.0: enabled 1
746 15:53:58.971961 PCI: 00:02.0: enabled 1
747 15:53:58.975373 PCI: 00:04.0: enabled 1
748 15:53:58.978799 GENERIC: 0.0: enabled 1
749 15:53:58.979402 PCI: 00:05.0: enabled 1
750 15:53:58.982110 PCI: 00:06.0: enabled 0
751 15:53:58.985604 PCI: 00:07.0: enabled 0
752 15:53:58.988386 GENERIC: 0.0: enabled 1
753 15:53:58.991730 PCI: 00:07.1: enabled 0
754 15:53:58.992347 GENERIC: 1.0: enabled 1
755 15:53:58.995309 PCI: 00:07.2: enabled 0
756 15:53:58.998377 GENERIC: 0.0: enabled 1
757 15:53:59.001980 PCI: 00:07.3: enabled 0
758 15:53:59.005222 GENERIC: 1.0: enabled 1
759 15:53:59.005726 PCI: 00:08.0: enabled 1
760 15:53:59.008504 PCI: 00:09.0: enabled 0
761 15:53:59.011645 PCI: 00:0a.0: enabled 0
762 15:53:59.014706 PCI: 00:0d.0: enabled 1
763 15:53:59.018399 USB0 port 0: enabled 1
764 15:53:59.019007 USB3 port 0: enabled 1
765 15:53:59.021429 USB3 port 1: enabled 1
766 15:53:59.024683 USB3 port 2: enabled 0
767 15:53:59.028255 USB3 port 3: enabled 0
768 15:53:59.031774 PCI: 00:0d.1: enabled 0
769 15:53:59.034721 PCI: 00:0d.2: enabled 0
770 15:53:59.035249 GENERIC: 0.0: enabled 1
771 15:53:59.038197 PCI: 00:0d.3: enabled 0
772 15:53:59.041434 PCI: 00:0e.0: enabled 0
773 15:53:59.044918 PCI: 00:10.2: enabled 1
774 15:53:59.047648 PCI: 00:10.6: enabled 0
775 15:53:59.048153 PCI: 00:10.7: enabled 0
776 15:53:59.051397 PCI: 00:12.0: enabled 0
777 15:53:59.054733 PCI: 00:12.6: enabled 0
778 15:53:59.057703 PCI: 00:13.0: enabled 0
779 15:53:59.061012 PCI: 00:14.0: enabled 1
780 15:53:59.061509 USB0 port 0: enabled 1
781 15:53:59.064408 USB2 port 0: enabled 0
782 15:53:59.067658 USB2 port 1: enabled 1
783 15:53:59.070882 USB2 port 2: enabled 1
784 15:53:59.074692 USB2 port 3: enabled 0
785 15:53:59.075288 USB2 port 4: enabled 1
786 15:53:59.077655 USB2 port 5: enabled 0
787 15:53:59.081167 USB2 port 6: enabled 0
788 15:53:59.084768 USB2 port 7: enabled 0
789 15:53:59.087475 USB2 port 8: enabled 0
790 15:53:59.090697 USB2 port 9: enabled 0
791 15:53:59.091215 USB3 port 0: enabled 0
792 15:53:59.093932 USB3 port 1: enabled 1
793 15:53:59.097857 USB3 port 2: enabled 0
794 15:53:59.101055 USB3 port 3: enabled 0
795 15:53:59.103813 PCI: 00:14.1: enabled 0
796 15:53:59.107628 PCI: 00:14.2: enabled 1
797 15:53:59.108219 PCI: 00:14.3: enabled 1
798 15:53:59.110806 GENERIC: 0.0: enabled 1
799 15:53:59.114651 PCI: 00:15.0: enabled 1
800 15:53:59.117513 I2C: 00:1a: enabled 1
801 15:53:59.118106 I2C: 00:31: enabled 1
802 15:53:59.120852 I2C: 00:32: enabled 1
803 15:53:59.124231 PCI: 00:15.1: enabled 1
804 15:53:59.127277 I2C: 00:10: enabled 1
805 15:53:59.130845 PCI: 00:15.2: enabled 1
806 15:53:59.131475 PCI: 00:15.3: enabled 1
807 15:53:59.133909 PCI: 00:16.0: enabled 1
808 15:53:59.136902 PCI: 00:16.1: enabled 0
809 15:53:59.141019 PCI: 00:16.2: enabled 0
810 15:53:59.141521 PCI: 00:16.3: enabled 0
811 15:53:59.144769 PCI: 00:16.4: enabled 0
812 15:53:59.148266 PCI: 00:16.5: enabled 0
813 15:53:59.151750 PCI: 00:17.0: enabled 1
814 15:53:59.152246 PCI: 00:19.0: enabled 0
815 15:53:59.155206 PCI: 00:19.1: enabled 1
816 15:53:59.158873 I2C: 00:15: enabled 1
817 15:53:59.205691 PCI: 00:19.2: enabled 0
818 15:53:59.206483 PCI: 00:1d.0: enabled 1
819 15:53:59.206932 GENERIC: 0.0: enabled 1
820 15:53:59.207312 PCI: 00:1e.0: enabled 1
821 15:53:59.207666 PCI: 00:1e.1: enabled 0
822 15:53:59.208013 PCI: 00:1e.2: enabled 1
823 15:53:59.208421 SPI: 00: enabled 1
824 15:53:59.209156 PCI: 00:1e.3: enabled 1
825 15:53:59.209525 SPI: 00: enabled 1
826 15:53:59.209887 PCI: 00:1f.0: enabled 1
827 15:53:59.210222 PNP: 0c09.0: enabled 1
828 15:53:59.210547 PCI: 00:1f.1: enabled 0
829 15:53:59.210898 PCI: 00:1f.2: enabled 1
830 15:53:59.211223 GENERIC: 0.0: enabled 1
831 15:53:59.211544 GENERIC: 0.0: enabled 1
832 15:53:59.211865 GENERIC: 1.0: enabled 1
833 15:53:59.212180 PCI: 00:1f.3: enabled 1
834 15:53:59.212912 PCI: 00:1f.4: enabled 0
835 15:53:59.213278 PCI: 00:1f.5: enabled 1
836 15:53:59.213946 PCI: 00:1f.6: enabled 0
837 15:53:59.214317 PCI: 00:1f.7: enabled 0
838 15:53:59.216732 CPU_CLUSTER: 0: enabled 1
839 15:53:59.217241 APIC: 00: enabled 1
840 15:53:59.220079 APIC: 01: enabled 1
841 15:53:59.223761 APIC: 03: enabled 1
842 15:53:59.226476 APIC: 06: enabled 1
843 15:53:59.227060 APIC: 05: enabled 1
844 15:53:59.230049 APIC: 04: enabled 1
845 15:53:59.233459 APIC: 02: enabled 1
846 15:53:59.234092 APIC: 07: enabled 1
847 15:53:59.237592 Root Device scanning...
848 15:53:59.239962 scan_static_bus for Root Device
849 15:53:59.243350 DOMAIN: 0000 enabled
850 15:53:59.246693 CPU_CLUSTER: 0 enabled
851 15:53:59.247304 DOMAIN: 0000 scanning...
852 15:53:59.249830 PCI: pci_scan_bus for bus 00
853 15:53:59.253342 PCI: 00:00.0 [8086/0000] ops
854 15:53:59.256851 PCI: 00:00.0 [8086/9a12] enabled
855 15:53:59.260373 PCI: 00:02.0 [8086/0000] bus ops
856 15:53:59.263352 PCI: 00:02.0 [8086/9a40] enabled
857 15:53:59.266987 PCI: 00:04.0 [8086/0000] bus ops
858 15:53:59.269988 PCI: 00:04.0 [8086/9a03] enabled
859 15:53:59.273544 PCI: 00:05.0 [8086/9a19] enabled
860 15:53:59.276683 PCI: 00:07.0 [0000/0000] hidden
861 15:53:59.279994 PCI: 00:08.0 [8086/9a11] enabled
862 15:53:59.283320 PCI: 00:0a.0 [8086/9a0d] disabled
863 15:53:59.286252 PCI: 00:0d.0 [8086/0000] bus ops
864 15:53:59.289775 PCI: 00:0d.0 [8086/9a13] enabled
865 15:53:59.293365 PCI: 00:14.0 [8086/0000] bus ops
866 15:53:59.296239 PCI: 00:14.0 [8086/a0ed] enabled
867 15:53:59.299860 PCI: 00:14.2 [8086/a0ef] enabled
868 15:53:59.303235 PCI: 00:14.3 [8086/0000] bus ops
869 15:53:59.306075 PCI: 00:14.3 [8086/a0f0] enabled
870 15:53:59.309710 PCI: 00:15.0 [8086/0000] bus ops
871 15:53:59.313020 PCI: 00:15.0 [8086/a0e8] enabled
872 15:53:59.316337 PCI: 00:15.1 [8086/0000] bus ops
873 15:53:59.319778 PCI: 00:15.1 [8086/a0e9] enabled
874 15:53:59.322766 PCI: 00:15.2 [8086/0000] bus ops
875 15:53:59.326198 PCI: 00:15.2 [8086/a0ea] enabled
876 15:53:59.329778 PCI: 00:15.3 [8086/0000] bus ops
877 15:53:59.332842 PCI: 00:15.3 [8086/a0eb] enabled
878 15:53:59.336424 PCI: 00:16.0 [8086/0000] ops
879 15:53:59.339596 PCI: 00:16.0 [8086/a0e0] enabled
880 15:53:59.346025 PCI: Static device PCI: 00:17.0 not found, disabling it.
881 15:53:59.349512 PCI: 00:19.0 [8086/0000] bus ops
882 15:53:59.352833 PCI: 00:19.0 [8086/a0c5] disabled
883 15:53:59.355791 PCI: 00:19.1 [8086/0000] bus ops
884 15:53:59.359567 PCI: 00:19.1 [8086/a0c6] enabled
885 15:53:59.362838 PCI: 00:1d.0 [8086/0000] bus ops
886 15:53:59.365928 PCI: 00:1d.0 [8086/a0b0] enabled
887 15:53:59.369503 PCI: 00:1e.0 [8086/0000] ops
888 15:53:59.372415 PCI: 00:1e.0 [8086/a0a8] enabled
889 15:53:59.375456 PCI: 00:1e.2 [8086/0000] bus ops
890 15:53:59.379227 PCI: 00:1e.2 [8086/a0aa] enabled
891 15:53:59.382501 PCI: 00:1e.3 [8086/0000] bus ops
892 15:53:59.385800 PCI: 00:1e.3 [8086/a0ab] enabled
893 15:53:59.389283 PCI: 00:1f.0 [8086/0000] bus ops
894 15:53:59.392437 PCI: 00:1f.0 [8086/a087] enabled
895 15:53:59.395703 RTC Init
896 15:53:59.399065 Set power on after power failure.
897 15:53:59.399670 Disabling Deep S3
898 15:53:59.402398 Disabling Deep S3
899 15:53:59.403032 Disabling Deep S4
900 15:53:59.405219 Disabling Deep S4
901 15:53:59.408640 Disabling Deep S5
902 15:53:59.409137 Disabling Deep S5
903 15:53:59.412606 PCI: 00:1f.2 [0000/0000] hidden
904 15:53:59.415295 PCI: 00:1f.3 [8086/0000] bus ops
905 15:53:59.418613 PCI: 00:1f.3 [8086/a0c8] enabled
906 15:53:59.421586 PCI: 00:1f.5 [8086/0000] bus ops
907 15:53:59.425211 PCI: 00:1f.5 [8086/a0a4] enabled
908 15:53:59.428580 PCI: Leftover static devices:
909 15:53:59.429074 PCI: 00:10.2
910 15:53:59.432111 PCI: 00:10.6
911 15:53:59.432758 PCI: 00:10.7
912 15:53:59.434921 PCI: 00:06.0
913 15:53:59.435420 PCI: 00:07.1
914 15:53:59.435819 PCI: 00:07.2
915 15:53:59.438606 PCI: 00:07.3
916 15:53:59.439207 PCI: 00:09.0
917 15:53:59.441737 PCI: 00:0d.1
918 15:53:59.442251 PCI: 00:0d.2
919 15:53:59.445381 PCI: 00:0d.3
920 15:53:59.445871 PCI: 00:0e.0
921 15:53:59.446262 PCI: 00:12.0
922 15:53:59.448663 PCI: 00:12.6
923 15:53:59.449198 PCI: 00:13.0
924 15:53:59.451720 PCI: 00:14.1
925 15:53:59.452372 PCI: 00:16.1
926 15:53:59.452774 PCI: 00:16.2
927 15:53:59.454776 PCI: 00:16.3
928 15:53:59.455271 PCI: 00:16.4
929 15:53:59.458943 PCI: 00:16.5
930 15:53:59.459438 PCI: 00:17.0
931 15:53:59.461778 PCI: 00:19.2
932 15:53:59.462271 PCI: 00:1e.1
933 15:53:59.462660 PCI: 00:1f.1
934 15:53:59.464799 PCI: 00:1f.4
935 15:53:59.465294 PCI: 00:1f.6
936 15:53:59.468573 PCI: 00:1f.7
937 15:53:59.471716 PCI: Check your devicetree.cb.
938 15:53:59.472305 PCI: 00:02.0 scanning...
939 15:53:59.475009 scan_generic_bus for PCI: 00:02.0
940 15:53:59.481536 scan_generic_bus for PCI: 00:02.0 done
941 15:53:59.484967 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
942 15:53:59.488114 PCI: 00:04.0 scanning...
943 15:53:59.491835 scan_generic_bus for PCI: 00:04.0
944 15:53:59.495373 GENERIC: 0.0 enabled
945 15:53:59.498274 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
946 15:53:59.505018 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
947 15:53:59.507730 PCI: 00:0d.0 scanning...
948 15:53:59.511293 scan_static_bus for PCI: 00:0d.0
949 15:53:59.511895 USB0 port 0 enabled
950 15:53:59.514455 USB0 port 0 scanning...
951 15:53:59.518130 scan_static_bus for USB0 port 0
952 15:53:59.520878 USB3 port 0 enabled
953 15:53:59.521378 USB3 port 1 enabled
954 15:53:59.524446 USB3 port 2 disabled
955 15:53:59.527507 USB3 port 3 disabled
956 15:53:59.528049 USB3 port 0 scanning...
957 15:53:59.531484 scan_static_bus for USB3 port 0
958 15:53:59.538096 scan_static_bus for USB3 port 0 done
959 15:53:59.540754 scan_bus: bus USB3 port 0 finished in 6 msecs
960 15:53:59.544602 USB3 port 1 scanning...
961 15:53:59.547984 scan_static_bus for USB3 port 1
962 15:53:59.550872 scan_static_bus for USB3 port 1 done
963 15:53:59.554096 scan_bus: bus USB3 port 1 finished in 6 msecs
964 15:53:59.557755 scan_static_bus for USB0 port 0 done
965 15:53:59.564134 scan_bus: bus USB0 port 0 finished in 43 msecs
966 15:53:59.568024 scan_static_bus for PCI: 00:0d.0 done
967 15:53:59.571489 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
968 15:53:59.573991 PCI: 00:14.0 scanning...
969 15:53:59.577605 scan_static_bus for PCI: 00:14.0
970 15:53:59.580988 USB0 port 0 enabled
971 15:53:59.584477 USB0 port 0 scanning...
972 15:53:59.587447 scan_static_bus for USB0 port 0
973 15:53:59.587996 USB2 port 0 disabled
974 15:53:59.590483 USB2 port 1 enabled
975 15:53:59.590981 USB2 port 2 enabled
976 15:53:59.594120 USB2 port 3 disabled
977 15:53:59.596934 USB2 port 4 enabled
978 15:53:59.597436 USB2 port 5 disabled
979 15:53:59.600470 USB2 port 6 disabled
980 15:53:59.604037 USB2 port 7 disabled
981 15:53:59.604673 USB2 port 8 disabled
982 15:53:59.607280 USB2 port 9 disabled
983 15:53:59.610555 USB3 port 0 disabled
984 15:53:59.611272 USB3 port 1 enabled
985 15:53:59.614414 USB3 port 2 disabled
986 15:53:59.616859 USB3 port 3 disabled
987 15:53:59.617359 USB2 port 1 scanning...
988 15:53:59.620430 scan_static_bus for USB2 port 1
989 15:53:59.623592 scan_static_bus for USB2 port 1 done
990 15:53:59.630318 scan_bus: bus USB2 port 1 finished in 6 msecs
991 15:53:59.633727 USB2 port 2 scanning...
992 15:53:59.637418 scan_static_bus for USB2 port 2
993 15:53:59.640642 scan_static_bus for USB2 port 2 done
994 15:53:59.643847 scan_bus: bus USB2 port 2 finished in 6 msecs
995 15:53:59.647128 USB2 port 4 scanning...
996 15:53:59.650028 scan_static_bus for USB2 port 4
997 15:53:59.653914 scan_static_bus for USB2 port 4 done
998 15:53:59.656594 scan_bus: bus USB2 port 4 finished in 6 msecs
999 15:53:59.660539 USB3 port 1 scanning...
1000 15:53:59.663695 scan_static_bus for USB3 port 1
1001 15:53:59.666667 scan_static_bus for USB3 port 1 done
1002 15:53:59.673868 scan_bus: bus USB3 port 1 finished in 6 msecs
1003 15:53:59.676700 scan_static_bus for USB0 port 0 done
1004 15:53:59.680454 scan_bus: bus USB0 port 0 finished in 93 msecs
1005 15:53:59.683202 scan_static_bus for PCI: 00:14.0 done
1006 15:53:59.690209 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1007 15:53:59.692906 PCI: 00:14.3 scanning...
1008 15:53:59.696855 scan_static_bus for PCI: 00:14.3
1009 15:53:59.697448 GENERIC: 0.0 enabled
1010 15:53:59.703352 scan_static_bus for PCI: 00:14.3 done
1011 15:53:59.706680 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1012 15:53:59.709722 PCI: 00:15.0 scanning...
1013 15:53:59.713218 scan_static_bus for PCI: 00:15.0
1014 15:53:59.713820 I2C: 00:1a enabled
1015 15:53:59.716889 I2C: 00:31 enabled
1016 15:53:59.717416 I2C: 00:32 enabled
1017 15:53:59.720982 scan_static_bus for PCI: 00:15.0 done
1018 15:53:59.727411 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1019 15:53:59.730938 PCI: 00:15.1 scanning...
1020 15:53:59.733820 scan_static_bus for PCI: 00:15.1
1021 15:53:59.734427 I2C: 00:10 enabled
1022 15:53:59.737227 scan_static_bus for PCI: 00:15.1 done
1023 15:53:59.743584 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1024 15:53:59.746831 PCI: 00:15.2 scanning...
1025 15:53:59.750291 scan_static_bus for PCI: 00:15.2
1026 15:53:59.753780 scan_static_bus for PCI: 00:15.2 done
1027 15:53:59.757190 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1028 15:53:59.760137 PCI: 00:15.3 scanning...
1029 15:53:59.763613 scan_static_bus for PCI: 00:15.3
1030 15:53:59.767127 scan_static_bus for PCI: 00:15.3 done
1031 15:53:59.773823 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1032 15:53:59.774439 PCI: 00:19.1 scanning...
1033 15:53:59.776939 scan_static_bus for PCI: 00:19.1
1034 15:53:59.780656 I2C: 00:15 enabled
1035 15:53:59.783787 scan_static_bus for PCI: 00:19.1 done
1036 15:53:59.790531 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1037 15:53:59.791113 PCI: 00:1d.0 scanning...
1038 15:53:59.797240 do_pci_scan_bridge for PCI: 00:1d.0
1039 15:53:59.797862 PCI: pci_scan_bus for bus 01
1040 15:53:59.803671 PCI: 01:00.0 [1c5c/174a] enabled
1041 15:53:59.804294 GENERIC: 0.0 enabled
1042 15:53:59.807070 Enabling Common Clock Configuration
1043 15:53:59.813298 L1 Sub-State supported from root port 29
1044 15:53:59.813915 L1 Sub-State Support = 0xf
1045 15:53:59.816906 CommonModeRestoreTime = 0x28
1046 15:53:59.823169 Power On Value = 0x16, Power On Scale = 0x0
1047 15:53:59.823698 ASPM: Enabled L1
1048 15:53:59.826714 PCIe: Max_Payload_Size adjusted to 128
1049 15:53:59.833409 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1050 15:53:59.836508 PCI: 00:1e.2 scanning...
1051 15:53:59.840294 scan_generic_bus for PCI: 00:1e.2
1052 15:53:59.840921 SPI: 00 enabled
1053 15:53:59.846546 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1054 15:53:59.850109 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1055 15:53:59.852942 PCI: 00:1e.3 scanning...
1056 15:53:59.856490 scan_generic_bus for PCI: 00:1e.3
1057 15:53:59.859847 SPI: 00 enabled
1058 15:53:59.866600 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1059 15:53:59.869594 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1060 15:53:59.872786 PCI: 00:1f.0 scanning...
1061 15:53:59.876224 scan_static_bus for PCI: 00:1f.0
1062 15:53:59.879885 PNP: 0c09.0 enabled
1063 15:53:59.880521 PNP: 0c09.0 scanning...
1064 15:53:59.882812 scan_static_bus for PNP: 0c09.0
1065 15:53:59.889673 scan_static_bus for PNP: 0c09.0 done
1066 15:53:59.892795 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1067 15:53:59.896092 scan_static_bus for PCI: 00:1f.0 done
1068 15:53:59.902415 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1069 15:53:59.902916 PCI: 00:1f.2 scanning...
1070 15:53:59.906162 scan_static_bus for PCI: 00:1f.2
1071 15:53:59.909136 GENERIC: 0.0 enabled
1072 15:53:59.912628 GENERIC: 0.0 scanning...
1073 15:53:59.916091 scan_static_bus for GENERIC: 0.0
1074 15:53:59.918811 GENERIC: 0.0 enabled
1075 15:53:59.919310 GENERIC: 1.0 enabled
1076 15:53:59.922005 scan_static_bus for GENERIC: 0.0 done
1077 15:53:59.928921 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1078 15:53:59.932674 scan_static_bus for PCI: 00:1f.2 done
1079 15:53:59.935831 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1080 15:53:59.938906 PCI: 00:1f.3 scanning...
1081 15:53:59.942000 scan_static_bus for PCI: 00:1f.3
1082 15:53:59.945719 scan_static_bus for PCI: 00:1f.3 done
1083 15:53:59.951979 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1084 15:53:59.955362 PCI: 00:1f.5 scanning...
1085 15:53:59.958921 scan_generic_bus for PCI: 00:1f.5
1086 15:53:59.962010 scan_generic_bus for PCI: 00:1f.5 done
1087 15:53:59.965564 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1088 15:53:59.972175 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1089 15:53:59.975358 scan_static_bus for Root Device done
1090 15:53:59.978824 scan_bus: bus Root Device finished in 736 msecs
1091 15:53:59.981794 done
1092 15:53:59.985374 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1093 15:53:59.989030 Chrome EC: UHEPI supported
1094 15:53:59.995442 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1095 15:54:00.002134 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1096 15:54:00.005138 SPI flash protection: WPSW=0 SRP0=0
1097 15:54:00.011912 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1098 15:54:00.014967 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1099 15:54:00.018379 found VGA at PCI: 00:02.0
1100 15:54:00.022062 Setting up VGA for PCI: 00:02.0
1101 15:54:00.028809 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1102 15:54:00.032046 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1103 15:54:00.035253 Allocating resources...
1104 15:54:00.038246 Reading resources...
1105 15:54:00.041468 Root Device read_resources bus 0 link: 0
1106 15:54:00.045084 DOMAIN: 0000 read_resources bus 0 link: 0
1107 15:54:00.051401 PCI: 00:04.0 read_resources bus 1 link: 0
1108 15:54:00.054682 PCI: 00:04.0 read_resources bus 1 link: 0 done
1109 15:54:00.061343 PCI: 00:0d.0 read_resources bus 0 link: 0
1110 15:54:00.064405 USB0 port 0 read_resources bus 0 link: 0
1111 15:54:00.071504 USB0 port 0 read_resources bus 0 link: 0 done
1112 15:54:00.074629 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1113 15:54:00.081097 PCI: 00:14.0 read_resources bus 0 link: 0
1114 15:54:00.084475 USB0 port 0 read_resources bus 0 link: 0
1115 15:54:00.091040 USB0 port 0 read_resources bus 0 link: 0 done
1116 15:54:00.094937 PCI: 00:14.0 read_resources bus 0 link: 0 done
1117 15:54:00.100896 PCI: 00:14.3 read_resources bus 0 link: 0
1118 15:54:00.104554 PCI: 00:14.3 read_resources bus 0 link: 0 done
1119 15:54:00.111103 PCI: 00:15.0 read_resources bus 0 link: 0
1120 15:54:00.113873 PCI: 00:15.0 read_resources bus 0 link: 0 done
1121 15:54:00.120918 PCI: 00:15.1 read_resources bus 0 link: 0
1122 15:54:00.123986 PCI: 00:15.1 read_resources bus 0 link: 0 done
1123 15:54:00.131376 PCI: 00:19.1 read_resources bus 0 link: 0
1124 15:54:00.134129 PCI: 00:19.1 read_resources bus 0 link: 0 done
1125 15:54:00.140433 PCI: 00:1d.0 read_resources bus 1 link: 0
1126 15:54:00.144185 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1127 15:54:00.151233 PCI: 00:1e.2 read_resources bus 2 link: 0
1128 15:54:00.154166 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1129 15:54:00.160914 PCI: 00:1e.3 read_resources bus 3 link: 0
1130 15:54:00.164137 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1131 15:54:00.170701 PCI: 00:1f.0 read_resources bus 0 link: 0
1132 15:54:00.174346 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1133 15:54:00.180575 PCI: 00:1f.2 read_resources bus 0 link: 0
1134 15:54:00.183992 GENERIC: 0.0 read_resources bus 0 link: 0
1135 15:54:00.190727 GENERIC: 0.0 read_resources bus 0 link: 0 done
1136 15:54:00.193440 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1137 15:54:00.200201 DOMAIN: 0000 read_resources bus 0 link: 0 done
1138 15:54:00.203529 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1139 15:54:00.209945 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1140 15:54:00.213754 Root Device read_resources bus 0 link: 0 done
1141 15:54:00.216689 Done reading resources.
1142 15:54:00.223564 Show resources in subtree (Root Device)...After reading.
1143 15:54:00.226566 Root Device child on link 0 DOMAIN: 0000
1144 15:54:00.229811 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1145 15:54:00.240153 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1146 15:54:00.249419 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1147 15:54:00.253263 PCI: 00:00.0
1148 15:54:00.259799 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1149 15:54:00.269795 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1150 15:54:00.279380 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1151 15:54:00.289523 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1152 15:54:00.299453 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1153 15:54:00.309647 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1154 15:54:00.316392 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1155 15:54:00.326074 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1156 15:54:00.335989 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1157 15:54:00.345668 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1158 15:54:00.355681 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1159 15:54:00.365882 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1160 15:54:00.372468 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1161 15:54:00.382237 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1162 15:54:00.392505 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1163 15:54:00.402812 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1164 15:54:00.412485 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1165 15:54:00.422035 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1166 15:54:00.428692 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1167 15:54:00.438898 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1168 15:54:00.441803 PCI: 00:02.0
1169 15:54:00.451609 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1170 15:54:00.461509 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1171 15:54:00.471652 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1172 15:54:00.475311 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1173 15:54:00.485285 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1174 15:54:00.488366 GENERIC: 0.0
1175 15:54:00.488991 PCI: 00:05.0
1176 15:54:00.498227 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1177 15:54:00.504441 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1178 15:54:00.505050 GENERIC: 0.0
1179 15:54:00.508129 PCI: 00:08.0
1180 15:54:00.518063 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 15:54:00.518675 PCI: 00:0a.0
1182 15:54:00.521200 PCI: 00:0d.0 child on link 0 USB0 port 0
1183 15:54:00.531060 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1184 15:54:00.537868 USB0 port 0 child on link 0 USB3 port 0
1185 15:54:00.538507 USB3 port 0
1186 15:54:00.541546 USB3 port 1
1187 15:54:00.542164 USB3 port 2
1188 15:54:00.544473 USB3 port 3
1189 15:54:00.547388 PCI: 00:14.0 child on link 0 USB0 port 0
1190 15:54:00.557451 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1191 15:54:00.564033 USB0 port 0 child on link 0 USB2 port 0
1192 15:54:00.564698 USB2 port 0
1193 15:54:00.567431 USB2 port 1
1194 15:54:00.568045 USB2 port 2
1195 15:54:00.570857 USB2 port 3
1196 15:54:00.571374 USB2 port 4
1197 15:54:00.574385 USB2 port 5
1198 15:54:00.575041 USB2 port 6
1199 15:54:00.577190 USB2 port 7
1200 15:54:00.577707 USB2 port 8
1201 15:54:00.580745 USB2 port 9
1202 15:54:00.584289 USB3 port 0
1203 15:54:00.584944 USB3 port 1
1204 15:54:00.587634 USB3 port 2
1205 15:54:00.588148 USB3 port 3
1206 15:54:00.590501 PCI: 00:14.2
1207 15:54:00.600683 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 15:54:00.610642 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1209 15:54:00.613719 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1210 15:54:00.623626 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1211 15:54:00.627198 GENERIC: 0.0
1212 15:54:00.629816 PCI: 00:15.0 child on link 0 I2C: 00:1a
1213 15:54:00.639914 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 15:54:00.640576 I2C: 00:1a
1215 15:54:00.643425 I2C: 00:31
1216 15:54:00.644050 I2C: 00:32
1217 15:54:00.649863 PCI: 00:15.1 child on link 0 I2C: 00:10
1218 15:54:00.659581 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 15:54:00.660193 I2C: 00:10
1220 15:54:00.663317 PCI: 00:15.2
1221 15:54:00.673244 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 15:54:00.673868 PCI: 00:15.3
1223 15:54:00.682948 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 15:54:00.686251 PCI: 00:16.0
1225 15:54:00.696424 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 15:54:00.697047 PCI: 00:19.0
1227 15:54:00.702733 PCI: 00:19.1 child on link 0 I2C: 00:15
1228 15:54:00.712723 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 15:54:00.713335 I2C: 00:15
1230 15:54:00.715758 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1231 15:54:00.725935 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1232 15:54:00.735813 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1233 15:54:00.746045 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1234 15:54:00.746680 GENERIC: 0.0
1235 15:54:00.748802 PCI: 01:00.0
1236 15:54:00.759139 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1237 15:54:00.768727 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1238 15:54:00.775530 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1239 15:54:00.778844 PCI: 00:1e.0
1240 15:54:00.788677 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1241 15:54:00.795377 PCI: 00:1e.2 child on link 0 SPI: 00
1242 15:54:00.805216 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 15:54:00.805862 SPI: 00
1244 15:54:00.808942 PCI: 00:1e.3 child on link 0 SPI: 00
1245 15:54:00.818436 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 15:54:00.821824 SPI: 00
1247 15:54:00.824926 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1248 15:54:00.831571 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1249 15:54:00.834846 PNP: 0c09.0
1250 15:54:00.844761 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1251 15:54:00.848421 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1252 15:54:00.858306 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1253 15:54:00.868177 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1254 15:54:00.872023 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1255 15:54:00.874781 GENERIC: 0.0
1256 15:54:00.875399 GENERIC: 1.0
1257 15:54:00.877651 PCI: 00:1f.3
1258 15:54:00.888170 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 15:54:00.898076 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1260 15:54:00.898702 PCI: 00:1f.5
1261 15:54:00.907392 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1262 15:54:00.911195 CPU_CLUSTER: 0 child on link 0 APIC: 00
1263 15:54:00.914325 APIC: 00
1264 15:54:00.914842 APIC: 01
1265 15:54:00.915347 APIC: 03
1266 15:54:00.917900 APIC: 06
1267 15:54:00.918523 APIC: 05
1268 15:54:00.921156 APIC: 04
1269 15:54:00.921671 APIC: 02
1270 15:54:00.922177 APIC: 07
1271 15:54:00.930823 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1272 15:54:00.934021 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1273 15:54:00.940760 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1274 15:54:00.947217 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1275 15:54:00.950814 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1276 15:54:00.957034 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1277 15:54:00.960874 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1278 15:54:00.967481 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1279 15:54:00.974438 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1280 15:54:00.983516 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1281 15:54:00.990838 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1282 15:54:00.997449 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1283 15:54:01.003689 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1284 15:54:01.010597 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1285 15:54:01.020192 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1286 15:54:01.023648 DOMAIN: 0000: Resource ranges:
1287 15:54:01.026569 * Base: 1000, Size: 800, Tag: 100
1288 15:54:01.029992 * Base: 1900, Size: e700, Tag: 100
1289 15:54:01.033847 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1290 15:54:01.039986 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1291 15:54:01.046791 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1292 15:54:01.056679 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1293 15:54:01.063278 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1294 15:54:01.070109 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1295 15:54:01.080177 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1296 15:54:01.086615 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1297 15:54:01.093447 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1298 15:54:01.103292 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1299 15:54:01.109808 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1300 15:54:01.116847 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1301 15:54:01.126055 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1302 15:54:01.133105 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1303 15:54:01.139880 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1304 15:54:01.149346 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1305 15:54:01.156625 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1306 15:54:01.162699 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1307 15:54:01.173028 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1308 15:54:01.179639 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1309 15:54:01.185783 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1310 15:54:01.196302 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1311 15:54:01.202444 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1312 15:54:01.209130 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1313 15:54:01.219310 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1314 15:54:01.219919 DOMAIN: 0000: Resource ranges:
1315 15:54:01.226207 * Base: 7fc00000, Size: 40400000, Tag: 200
1316 15:54:01.229020 * Base: d0000000, Size: 28000000, Tag: 200
1317 15:54:01.232490 * Base: fa000000, Size: 1000000, Tag: 200
1318 15:54:01.239455 * Base: fb001000, Size: 2fff000, Tag: 200
1319 15:54:01.242172 * Base: fe010000, Size: 2e000, Tag: 200
1320 15:54:01.246069 * Base: fe03f000, Size: d41000, Tag: 200
1321 15:54:01.249143 * Base: fed88000, Size: 8000, Tag: 200
1322 15:54:01.255691 * Base: fed93000, Size: d000, Tag: 200
1323 15:54:01.258763 * Base: feda2000, Size: 1e000, Tag: 200
1324 15:54:01.262457 * Base: fede0000, Size: 1220000, Tag: 200
1325 15:54:01.269116 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1326 15:54:01.275667 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1327 15:54:01.282476 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1328 15:54:01.288615 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1329 15:54:01.296029 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1330 15:54:01.302201 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1331 15:54:01.308571 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1332 15:54:01.315618 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1333 15:54:01.321669 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1334 15:54:01.328755 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1335 15:54:01.335016 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1336 15:54:01.341818 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1337 15:54:01.348483 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1338 15:54:01.355309 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1339 15:54:01.361808 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1340 15:54:01.368155 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1341 15:54:01.374912 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1342 15:54:01.381296 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1343 15:54:01.388067 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1344 15:54:01.394559 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1345 15:54:01.401193 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1346 15:54:01.407956 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1347 15:54:01.414723 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1348 15:54:01.420823 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1349 15:54:01.430899 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1350 15:54:01.434616 PCI: 00:1d.0: Resource ranges:
1351 15:54:01.437676 * Base: 7fc00000, Size: 100000, Tag: 200
1352 15:54:01.444721 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1353 15:54:01.450563 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1354 15:54:01.457279 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1355 15:54:01.463922 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1356 15:54:01.474418 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1357 15:54:01.477177 Root Device assign_resources, bus 0 link: 0
1358 15:54:01.480454 DOMAIN: 0000 assign_resources, bus 0 link: 0
1359 15:54:01.490324 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1360 15:54:01.496951 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1361 15:54:01.507290 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1362 15:54:01.513546 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1363 15:54:01.520116 PCI: 00:04.0 assign_resources, bus 1 link: 0
1364 15:54:01.523720 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 15:54:01.533446 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1366 15:54:01.540012 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1367 15:54:01.550062 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1368 15:54:01.553048 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1369 15:54:01.555997 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 15:54:01.566412 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1371 15:54:01.569573 PCI: 00:14.0 assign_resources, bus 0 link: 0
1372 15:54:01.576286 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 15:54:01.583276 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1374 15:54:01.592967 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1375 15:54:01.598926 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1376 15:54:01.602201 PCI: 00:14.3 assign_resources, bus 0 link: 0
1377 15:54:01.609320 PCI: 00:14.3 assign_resources, bus 0 link: 0
1378 15:54:01.615912 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1379 15:54:01.622357 PCI: 00:15.0 assign_resources, bus 0 link: 0
1380 15:54:01.626184 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 15:54:01.635462 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1382 15:54:01.638847 PCI: 00:15.1 assign_resources, bus 0 link: 0
1383 15:54:01.642110 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 15:54:01.652349 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1385 15:54:01.658817 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1386 15:54:01.668828 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1387 15:54:01.675319 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1388 15:54:01.682152 PCI: 00:19.1 assign_resources, bus 0 link: 0
1389 15:54:01.685116 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 15:54:01.695272 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1391 15:54:01.705496 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1392 15:54:01.711692 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1393 15:54:01.718224 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 15:54:01.724866 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1395 15:54:01.734860 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1396 15:54:01.741876 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1397 15:54:01.744435 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1398 15:54:01.754856 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1399 15:54:01.758072 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 15:54:01.764904 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 15:54:01.771273 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1402 15:54:01.777762 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1403 15:54:01.781050 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 15:54:01.784903 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1405 15:54:01.791808 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 15:54:01.794644 LPC: Trying to open IO window from 800 size 1ff
1407 15:54:01.805219 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1408 15:54:01.811417 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1409 15:54:01.821398 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1410 15:54:01.824447 DOMAIN: 0000 assign_resources, bus 0 link: 0
1411 15:54:01.831177 Root Device assign_resources, bus 0 link: 0
1412 15:54:01.831782 Done setting resources.
1413 15:54:01.838038 Show resources in subtree (Root Device)...After assigning values.
1414 15:54:01.844222 Root Device child on link 0 DOMAIN: 0000
1415 15:54:01.847949 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1416 15:54:01.857640 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1417 15:54:01.867709 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1418 15:54:01.868219 PCI: 00:00.0
1419 15:54:01.877666 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 15:54:01.887532 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 15:54:01.897422 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 15:54:01.907564 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 15:54:01.914089 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 15:54:01.924198 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 15:54:01.933946 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 15:54:01.943976 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 15:54:01.953645 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 15:54:01.963902 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1429 15:54:01.970321 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1430 15:54:01.981009 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1431 15:54:01.990317 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1432 15:54:02.000520 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1433 15:54:02.007429 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1434 15:54:02.016972 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1435 15:54:02.026936 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1436 15:54:02.037221 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1437 15:54:02.046535 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1438 15:54:02.056397 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1439 15:54:02.057004 PCI: 00:02.0
1440 15:54:02.069645 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1441 15:54:02.079807 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1442 15:54:02.089722 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1443 15:54:02.093245 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1444 15:54:02.103159 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1445 15:54:02.106191 GENERIC: 0.0
1446 15:54:02.106786 PCI: 00:05.0
1447 15:54:02.116175 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1448 15:54:02.123354 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1449 15:54:02.123955 GENERIC: 0.0
1450 15:54:02.125927 PCI: 00:08.0
1451 15:54:02.135847 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1452 15:54:02.136466 PCI: 00:0a.0
1453 15:54:02.142442 PCI: 00:0d.0 child on link 0 USB0 port 0
1454 15:54:02.152839 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1455 15:54:02.155875 USB0 port 0 child on link 0 USB3 port 0
1456 15:54:02.158835 USB3 port 0
1457 15:54:02.159337 USB3 port 1
1458 15:54:02.162478 USB3 port 2
1459 15:54:02.163116 USB3 port 3
1460 15:54:02.168904 PCI: 00:14.0 child on link 0 USB0 port 0
1461 15:54:02.179068 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1462 15:54:02.182307 USB0 port 0 child on link 0 USB2 port 0
1463 15:54:02.185529 USB2 port 0
1464 15:54:02.186234 USB2 port 1
1465 15:54:02.188786 USB2 port 2
1466 15:54:02.189311 USB2 port 3
1467 15:54:02.192431 USB2 port 4
1468 15:54:02.193038 USB2 port 5
1469 15:54:02.195771 USB2 port 6
1470 15:54:02.198709 USB2 port 7
1471 15:54:02.199314 USB2 port 8
1472 15:54:02.202381 USB2 port 9
1473 15:54:02.202992 USB3 port 0
1474 15:54:02.205428 USB3 port 1
1475 15:54:02.205937 USB3 port 2
1476 15:54:02.208972 USB3 port 3
1477 15:54:02.209579 PCI: 00:14.2
1478 15:54:02.218521 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1479 15:54:02.228443 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1480 15:54:02.235194 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1481 15:54:02.245235 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1482 15:54:02.245846 GENERIC: 0.0
1483 15:54:02.251816 PCI: 00:15.0 child on link 0 I2C: 00:1a
1484 15:54:02.261608 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1485 15:54:02.262122 I2C: 00:1a
1486 15:54:02.265516 I2C: 00:31
1487 15:54:02.266122 I2C: 00:32
1488 15:54:02.271682 PCI: 00:15.1 child on link 0 I2C: 00:10
1489 15:54:02.281719 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1490 15:54:02.282347 I2C: 00:10
1491 15:54:02.284820 PCI: 00:15.2
1492 15:54:02.294708 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1493 15:54:02.295323 PCI: 00:15.3
1494 15:54:02.304818 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1495 15:54:02.308482 PCI: 00:16.0
1496 15:54:02.317998 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1497 15:54:02.321330 PCI: 00:19.0
1498 15:54:02.324452 PCI: 00:19.1 child on link 0 I2C: 00:15
1499 15:54:02.334397 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1500 15:54:02.334982 I2C: 00:15
1501 15:54:02.340763 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1502 15:54:02.351066 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1503 15:54:02.360602 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1504 15:54:02.370792 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1505 15:54:02.373781 GENERIC: 0.0
1506 15:54:02.374281 PCI: 01:00.0
1507 15:54:02.387294 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1508 15:54:02.397418 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1509 15:54:02.407088 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1510 15:54:02.407687 PCI: 00:1e.0
1511 15:54:02.420100 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1512 15:54:02.423923 PCI: 00:1e.2 child on link 0 SPI: 00
1513 15:54:02.433184 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1514 15:54:02.436595 SPI: 00
1515 15:54:02.440002 PCI: 00:1e.3 child on link 0 SPI: 00
1516 15:54:02.450125 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1517 15:54:02.450732 SPI: 00
1518 15:54:02.456998 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1519 15:54:02.463328 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1520 15:54:02.466294 PNP: 0c09.0
1521 15:54:02.472830 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1522 15:54:02.480076 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1523 15:54:02.489935 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1524 15:54:02.496677 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1525 15:54:02.503011 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1526 15:54:02.503608 GENERIC: 0.0
1527 15:54:02.505954 GENERIC: 1.0
1528 15:54:02.506452 PCI: 00:1f.3
1529 15:54:02.519595 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1530 15:54:02.529215 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1531 15:54:02.529840 PCI: 00:1f.5
1532 15:54:02.539348 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1533 15:54:02.546139 CPU_CLUSTER: 0 child on link 0 APIC: 00
1534 15:54:02.546748 APIC: 00
1535 15:54:02.547181 APIC: 01
1536 15:54:02.549189 APIC: 03
1537 15:54:02.549692 APIC: 06
1538 15:54:02.552796 APIC: 05
1539 15:54:02.553438 APIC: 04
1540 15:54:02.553849 APIC: 02
1541 15:54:02.555914 APIC: 07
1542 15:54:02.559022 Done allocating resources.
1543 15:54:02.562475 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1544 15:54:02.568803 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1545 15:54:02.572764 Configure GPIOs for I2S audio on UP4.
1546 15:54:02.580178 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1547 15:54:02.583346 Enabling resources...
1548 15:54:02.586529 PCI: 00:00.0 subsystem <- 8086/9a12
1549 15:54:02.590063 PCI: 00:00.0 cmd <- 06
1550 15:54:02.593065 PCI: 00:02.0 subsystem <- 8086/9a40
1551 15:54:02.596405 PCI: 00:02.0 cmd <- 03
1552 15:54:02.599637 PCI: 00:04.0 subsystem <- 8086/9a03
1553 15:54:02.603292 PCI: 00:04.0 cmd <- 02
1554 15:54:02.606617 PCI: 00:05.0 subsystem <- 8086/9a19
1555 15:54:02.607232 PCI: 00:05.0 cmd <- 02
1556 15:54:02.613045 PCI: 00:08.0 subsystem <- 8086/9a11
1557 15:54:02.613659 PCI: 00:08.0 cmd <- 06
1558 15:54:02.616124 PCI: 00:0d.0 subsystem <- 8086/9a13
1559 15:54:02.619716 PCI: 00:0d.0 cmd <- 02
1560 15:54:02.623065 PCI: 00:14.0 subsystem <- 8086/a0ed
1561 15:54:02.626154 PCI: 00:14.0 cmd <- 02
1562 15:54:02.629277 PCI: 00:14.2 subsystem <- 8086/a0ef
1563 15:54:02.632664 PCI: 00:14.2 cmd <- 02
1564 15:54:02.636043 PCI: 00:14.3 subsystem <- 8086/a0f0
1565 15:54:02.639568 PCI: 00:14.3 cmd <- 02
1566 15:54:02.642432 PCI: 00:15.0 subsystem <- 8086/a0e8
1567 15:54:02.646145 PCI: 00:15.0 cmd <- 02
1568 15:54:02.649761 PCI: 00:15.1 subsystem <- 8086/a0e9
1569 15:54:02.653006 PCI: 00:15.1 cmd <- 02
1570 15:54:02.655686 PCI: 00:15.2 subsystem <- 8086/a0ea
1571 15:54:02.656290 PCI: 00:15.2 cmd <- 02
1572 15:54:02.662580 PCI: 00:15.3 subsystem <- 8086/a0eb
1573 15:54:02.663080 PCI: 00:15.3 cmd <- 02
1574 15:54:02.665947 PCI: 00:16.0 subsystem <- 8086/a0e0
1575 15:54:02.669270 PCI: 00:16.0 cmd <- 02
1576 15:54:02.672417 PCI: 00:19.1 subsystem <- 8086/a0c6
1577 15:54:02.675918 PCI: 00:19.1 cmd <- 02
1578 15:54:02.679468 PCI: 00:1d.0 bridge ctrl <- 0013
1579 15:54:02.682889 PCI: 00:1d.0 subsystem <- 8086/a0b0
1580 15:54:02.686002 PCI: 00:1d.0 cmd <- 06
1581 15:54:02.689144 PCI: 00:1e.0 subsystem <- 8086/a0a8
1582 15:54:02.692725 PCI: 00:1e.0 cmd <- 06
1583 15:54:02.695911 PCI: 00:1e.2 subsystem <- 8086/a0aa
1584 15:54:02.699231 PCI: 00:1e.2 cmd <- 06
1585 15:54:02.702579 PCI: 00:1e.3 subsystem <- 8086/a0ab
1586 15:54:02.705737 PCI: 00:1e.3 cmd <- 02
1587 15:54:02.709233 PCI: 00:1f.0 subsystem <- 8086/a087
1588 15:54:02.709853 PCI: 00:1f.0 cmd <- 407
1589 15:54:02.715897 PCI: 00:1f.3 subsystem <- 8086/a0c8
1590 15:54:02.716553 PCI: 00:1f.3 cmd <- 02
1591 15:54:02.719002 PCI: 00:1f.5 subsystem <- 8086/a0a4
1592 15:54:02.722032 PCI: 00:1f.5 cmd <- 406
1593 15:54:02.727410 PCI: 01:00.0 cmd <- 02
1594 15:54:02.732066 done.
1595 15:54:02.734954 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1596 15:54:02.738691 Initializing devices...
1597 15:54:02.741869 Root Device init
1598 15:54:02.744991 Chrome EC: Set SMI mask to 0x0000000000000000
1599 15:54:02.751926 Chrome EC: clear events_b mask to 0x0000000000000000
1600 15:54:02.758188 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1601 15:54:02.761436 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1602 15:54:02.768423 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1603 15:54:02.774872 Chrome EC: Set WAKE mask to 0x0000000000000000
1604 15:54:02.778444 fw_config match found: DB_USB=USB3_ACTIVE
1605 15:54:02.784622 Configure Right Type-C port orientation for retimer
1606 15:54:02.788115 Root Device init finished in 42 msecs
1607 15:54:02.791552 PCI: 00:00.0 init
1608 15:54:02.794697 CPU TDP = 9 Watts
1609 15:54:02.795218 CPU PL1 = 9 Watts
1610 15:54:02.798057 CPU PL2 = 40 Watts
1611 15:54:02.798559 CPU PL4 = 83 Watts
1612 15:54:02.800960 PCI: 00:00.0 init finished in 8 msecs
1613 15:54:02.804872 PCI: 00:02.0 init
1614 15:54:02.807957 GMA: Found VBT in CBFS
1615 15:54:02.811701 GMA: Found valid VBT in CBFS
1616 15:54:02.815117 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1617 15:54:02.824916 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1618 15:54:02.827961 PCI: 00:02.0 init finished in 18 msecs
1619 15:54:02.831563 PCI: 00:05.0 init
1620 15:54:02.834551 PCI: 00:05.0 init finished in 0 msecs
1621 15:54:02.835054 PCI: 00:08.0 init
1622 15:54:02.840873 PCI: 00:08.0 init finished in 0 msecs
1623 15:54:02.841456 PCI: 00:14.0 init
1624 15:54:02.847942 PCI: 00:14.0 init finished in 0 msecs
1625 15:54:02.848596 PCI: 00:14.2 init
1626 15:54:02.851867 PCI: 00:14.2 init finished in 0 msecs
1627 15:54:02.855028 PCI: 00:15.0 init
1628 15:54:02.858200 I2C bus 0 version 0x3230302a
1629 15:54:02.861868 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1630 15:54:02.864822 PCI: 00:15.0 init finished in 6 msecs
1631 15:54:02.868395 PCI: 00:15.1 init
1632 15:54:02.871596 I2C bus 1 version 0x3230302a
1633 15:54:02.875084 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1634 15:54:02.878114 PCI: 00:15.1 init finished in 6 msecs
1635 15:54:02.881417 PCI: 00:15.2 init
1636 15:54:02.884478 I2C bus 2 version 0x3230302a
1637 15:54:02.887887 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1638 15:54:02.891457 PCI: 00:15.2 init finished in 6 msecs
1639 15:54:02.892120 PCI: 00:15.3 init
1640 15:54:02.894628 I2C bus 3 version 0x3230302a
1641 15:54:02.901413 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1642 15:54:02.904285 PCI: 00:15.3 init finished in 6 msecs
1643 15:54:02.904818 PCI: 00:16.0 init
1644 15:54:02.907733 PCI: 00:16.0 init finished in 0 msecs
1645 15:54:02.912128 PCI: 00:19.1 init
1646 15:54:02.914963 I2C bus 5 version 0x3230302a
1647 15:54:02.918454 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1648 15:54:02.921478 PCI: 00:19.1 init finished in 6 msecs
1649 15:54:02.924642 PCI: 00:1d.0 init
1650 15:54:02.928023 Initializing PCH PCIe bridge.
1651 15:54:02.931008 PCI: 00:1d.0 init finished in 3 msecs
1652 15:54:02.934675 PCI: 00:1f.0 init
1653 15:54:02.937994 IOAPIC: Initializing IOAPIC at 0xfec00000
1654 15:54:02.944826 IOAPIC: Bootstrap Processor Local APIC = 0x00
1655 15:54:02.945425 IOAPIC: ID = 0x02
1656 15:54:02.947884 IOAPIC: Dumping registers
1657 15:54:02.951165 reg 0x0000: 0x02000000
1658 15:54:02.954773 reg 0x0001: 0x00770020
1659 15:54:02.955367 reg 0x0002: 0x00000000
1660 15:54:02.961069 PCI: 00:1f.0 init finished in 21 msecs
1661 15:54:02.961679 PCI: 00:1f.2 init
1662 15:54:02.964019 Disabling ACPI via APMC.
1663 15:54:02.968653 APMC done.
1664 15:54:02.972584 PCI: 00:1f.2 init finished in 6 msecs
1665 15:54:02.984684 PCI: 01:00.0 init
1666 15:54:02.987297 PCI: 01:00.0 init finished in 0 msecs
1667 15:54:02.990456 PNP: 0c09.0 init
1668 15:54:02.997008 Google Chrome EC uptime: 8.418 seconds
1669 15:54:03.000434 Google Chrome AP resets since EC boot: 0
1670 15:54:03.004099 Google Chrome most recent AP reset causes:
1671 15:54:03.010680 Google Chrome EC reset flags at last EC boot: reset-pin
1672 15:54:03.013688 PNP: 0c09.0 init finished in 19 msecs
1673 15:54:03.019280 Devices initialized
1674 15:54:03.022215 Show all devs... After init.
1675 15:54:03.025363 Root Device: enabled 1
1676 15:54:03.025862 DOMAIN: 0000: enabled 1
1677 15:54:03.029112 CPU_CLUSTER: 0: enabled 1
1678 15:54:03.032564 PCI: 00:00.0: enabled 1
1679 15:54:03.035575 PCI: 00:02.0: enabled 1
1680 15:54:03.036171 PCI: 00:04.0: enabled 1
1681 15:54:03.039140 PCI: 00:05.0: enabled 1
1682 15:54:03.042409 PCI: 00:06.0: enabled 0
1683 15:54:03.045419 PCI: 00:07.0: enabled 0
1684 15:54:03.046013 PCI: 00:07.1: enabled 0
1685 15:54:03.048506 PCI: 00:07.2: enabled 0
1686 15:54:03.052355 PCI: 00:07.3: enabled 0
1687 15:54:03.055684 PCI: 00:08.0: enabled 1
1688 15:54:03.056277 PCI: 00:09.0: enabled 0
1689 15:54:03.058772 PCI: 00:0a.0: enabled 0
1690 15:54:03.062032 PCI: 00:0d.0: enabled 1
1691 15:54:03.065466 PCI: 00:0d.1: enabled 0
1692 15:54:03.065965 PCI: 00:0d.2: enabled 0
1693 15:54:03.068772 PCI: 00:0d.3: enabled 0
1694 15:54:03.072419 PCI: 00:0e.0: enabled 0
1695 15:54:03.073007 PCI: 00:10.2: enabled 1
1696 15:54:03.075602 PCI: 00:10.6: enabled 0
1697 15:54:03.078598 PCI: 00:10.7: enabled 0
1698 15:54:03.082378 PCI: 00:12.0: enabled 0
1699 15:54:03.082975 PCI: 00:12.6: enabled 0
1700 15:54:03.085142 PCI: 00:13.0: enabled 0
1701 15:54:03.088632 PCI: 00:14.0: enabled 1
1702 15:54:03.092100 PCI: 00:14.1: enabled 0
1703 15:54:03.092652 PCI: 00:14.2: enabled 1
1704 15:54:03.095008 PCI: 00:14.3: enabled 1
1705 15:54:03.098586 PCI: 00:15.0: enabled 1
1706 15:54:03.101879 PCI: 00:15.1: enabled 1
1707 15:54:03.102381 PCI: 00:15.2: enabled 1
1708 15:54:03.104906 PCI: 00:15.3: enabled 1
1709 15:54:03.108618 PCI: 00:16.0: enabled 1
1710 15:54:03.111777 PCI: 00:16.1: enabled 0
1711 15:54:03.112393 PCI: 00:16.2: enabled 0
1712 15:54:03.114956 PCI: 00:16.3: enabled 0
1713 15:54:03.118327 PCI: 00:16.4: enabled 0
1714 15:54:03.118926 PCI: 00:16.5: enabled 0
1715 15:54:03.121829 PCI: 00:17.0: enabled 0
1716 15:54:03.124962 PCI: 00:19.0: enabled 0
1717 15:54:03.128129 PCI: 00:19.1: enabled 1
1718 15:54:03.128772 PCI: 00:19.2: enabled 0
1719 15:54:03.131337 PCI: 00:1c.0: enabled 1
1720 15:54:03.135072 PCI: 00:1c.1: enabled 0
1721 15:54:03.138502 PCI: 00:1c.2: enabled 0
1722 15:54:03.139006 PCI: 00:1c.3: enabled 0
1723 15:54:03.141158 PCI: 00:1c.4: enabled 0
1724 15:54:03.144752 PCI: 00:1c.5: enabled 0
1725 15:54:03.147969 PCI: 00:1c.6: enabled 1
1726 15:54:03.148565 PCI: 00:1c.7: enabled 0
1727 15:54:03.151311 PCI: 00:1d.0: enabled 1
1728 15:54:03.154273 PCI: 00:1d.1: enabled 0
1729 15:54:03.157916 PCI: 00:1d.2: enabled 1
1730 15:54:03.158516 PCI: 00:1d.3: enabled 0
1731 15:54:03.160710 PCI: 00:1e.0: enabled 1
1732 15:54:03.164566 PCI: 00:1e.1: enabled 0
1733 15:54:03.167827 PCI: 00:1e.2: enabled 1
1734 15:54:03.168395 PCI: 00:1e.3: enabled 1
1735 15:54:03.171170 PCI: 00:1f.0: enabled 1
1736 15:54:03.174383 PCI: 00:1f.1: enabled 0
1737 15:54:03.177531 PCI: 00:1f.2: enabled 1
1738 15:54:03.178027 PCI: 00:1f.3: enabled 1
1739 15:54:03.180871 PCI: 00:1f.4: enabled 0
1740 15:54:03.184276 PCI: 00:1f.5: enabled 1
1741 15:54:03.184909 PCI: 00:1f.6: enabled 0
1742 15:54:03.187997 PCI: 00:1f.7: enabled 0
1743 15:54:03.190697 APIC: 00: enabled 1
1744 15:54:03.194187 GENERIC: 0.0: enabled 1
1745 15:54:03.194685 GENERIC: 0.0: enabled 1
1746 15:54:03.197613 GENERIC: 1.0: enabled 1
1747 15:54:03.201208 GENERIC: 0.0: enabled 1
1748 15:54:03.204221 GENERIC: 1.0: enabled 1
1749 15:54:03.204847 USB0 port 0: enabled 1
1750 15:54:03.207637 GENERIC: 0.0: enabled 1
1751 15:54:03.211154 USB0 port 0: enabled 1
1752 15:54:03.211872 GENERIC: 0.0: enabled 1
1753 15:54:03.213911 I2C: 00:1a: enabled 1
1754 15:54:03.217697 I2C: 00:31: enabled 1
1755 15:54:03.218297 I2C: 00:32: enabled 1
1756 15:54:03.220560 I2C: 00:10: enabled 1
1757 15:54:03.223970 I2C: 00:15: enabled 1
1758 15:54:03.227575 GENERIC: 0.0: enabled 0
1759 15:54:03.228076 GENERIC: 1.0: enabled 0
1760 15:54:03.230878 GENERIC: 0.0: enabled 1
1761 15:54:03.234289 SPI: 00: enabled 1
1762 15:54:03.234892 SPI: 00: enabled 1
1763 15:54:03.237837 PNP: 0c09.0: enabled 1
1764 15:54:03.240440 GENERIC: 0.0: enabled 1
1765 15:54:03.241011 USB3 port 0: enabled 1
1766 15:54:03.244536 USB3 port 1: enabled 1
1767 15:54:03.247742 USB3 port 2: enabled 0
1768 15:54:03.248368 USB3 port 3: enabled 0
1769 15:54:03.250901 USB2 port 0: enabled 0
1770 15:54:03.254024 USB2 port 1: enabled 1
1771 15:54:03.257349 USB2 port 2: enabled 1
1772 15:54:03.257954 USB2 port 3: enabled 0
1773 15:54:03.260772 USB2 port 4: enabled 1
1774 15:54:03.263801 USB2 port 5: enabled 0
1775 15:54:03.264299 USB2 port 6: enabled 0
1776 15:54:03.267461 USB2 port 7: enabled 0
1777 15:54:03.270780 USB2 port 8: enabled 0
1778 15:54:03.271369 USB2 port 9: enabled 0
1779 15:54:03.274054 USB3 port 0: enabled 0
1780 15:54:03.277041 USB3 port 1: enabled 1
1781 15:54:03.280587 USB3 port 2: enabled 0
1782 15:54:03.281087 USB3 port 3: enabled 0
1783 15:54:03.284036 GENERIC: 0.0: enabled 1
1784 15:54:03.287031 GENERIC: 1.0: enabled 1
1785 15:54:03.287624 APIC: 01: enabled 1
1786 15:54:03.290802 APIC: 03: enabled 1
1787 15:54:03.293414 APIC: 06: enabled 1
1788 15:54:03.293916 APIC: 05: enabled 1
1789 15:54:03.296824 APIC: 04: enabled 1
1790 15:54:03.300682 APIC: 02: enabled 1
1791 15:54:03.301278 APIC: 07: enabled 1
1792 15:54:03.303934 PCI: 01:00.0: enabled 1
1793 15:54:03.310403 BS: BS_DEV_INIT run times (exec / console): 31 / 536 ms
1794 15:54:03.313715 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1795 15:54:03.316594 ELOG: NV offset 0xf30000 size 0x1000
1796 15:54:03.324003 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1797 15:54:03.330789 ELOG: Event(17) added with size 13 at 2023-03-03 15:54:03 UTC
1798 15:54:03.337326 ELOG: Event(92) added with size 9 at 2023-03-03 15:54:03 UTC
1799 15:54:03.343967 ELOG: Event(93) added with size 9 at 2023-03-03 15:54:03 UTC
1800 15:54:03.350885 ELOG: Event(9E) added with size 10 at 2023-03-03 15:54:03 UTC
1801 15:54:03.357007 ELOG: Event(9F) added with size 14 at 2023-03-03 15:54:03 UTC
1802 15:54:03.363595 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1803 15:54:03.370528 ELOG: Event(A1) added with size 10 at 2023-03-03 15:54:03 UTC
1804 15:54:03.377058 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1805 15:54:03.384026 ELOG: Event(A0) added with size 9 at 2023-03-03 15:54:03 UTC
1806 15:54:03.386634 elog_add_boot_reason: Logged dev mode boot
1807 15:54:03.393471 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1808 15:54:03.394061 Finalize devices...
1809 15:54:03.396916 Devices finalized
1810 15:54:03.403709 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1811 15:54:03.406971 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1812 15:54:03.413681 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1813 15:54:03.416793 ME: HFSTS1 : 0x80030055
1814 15:54:03.423640 ME: HFSTS2 : 0x30280116
1815 15:54:03.426559 ME: HFSTS3 : 0x00000050
1816 15:54:03.429873 ME: HFSTS4 : 0x00004000
1817 15:54:03.436915 ME: HFSTS5 : 0x00000000
1818 15:54:03.440279 ME: HFSTS6 : 0x00400006
1819 15:54:03.443358 ME: Manufacturing Mode : YES
1820 15:54:03.446823 ME: SPI Protection Mode Enabled : NO
1821 15:54:03.453512 ME: FW Partition Table : OK
1822 15:54:03.456671 ME: Bringup Loader Failure : NO
1823 15:54:03.460194 ME: Firmware Init Complete : NO
1824 15:54:03.463421 ME: Boot Options Present : NO
1825 15:54:03.466393 ME: Update In Progress : NO
1826 15:54:03.470049 ME: D0i3 Support : YES
1827 15:54:03.473284 ME: Low Power State Enabled : NO
1828 15:54:03.476264 ME: CPU Replaced : YES
1829 15:54:03.482991 ME: CPU Replacement Valid : YES
1830 15:54:03.486408 ME: Current Working State : 5
1831 15:54:03.490002 ME: Current Operation State : 1
1832 15:54:03.493027 ME: Current Operation Mode : 3
1833 15:54:03.496740 ME: Error Code : 0
1834 15:54:03.499767 ME: Enhanced Debug Mode : NO
1835 15:54:03.502984 ME: CPU Debug Disabled : YES
1836 15:54:03.506228 ME: TXT Support : NO
1837 15:54:03.512949 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1838 15:54:03.519613 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1839 15:54:03.523115 CBFS: 'fallback/slic' not found.
1840 15:54:03.529675 ACPI: Writing ACPI tables at 76b01000.
1841 15:54:03.530183 ACPI: * FACS
1842 15:54:03.532966 ACPI: * DSDT
1843 15:54:03.536511 Ramoops buffer: 0x100000@0x76a00000.
1844 15:54:03.539478 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1845 15:54:03.546119 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1846 15:54:03.549371 Google Chrome EC: version:
1847 15:54:03.552727 ro: voema_v2.0.10114-a447f03e46
1848 15:54:03.555969 rw: voema_v2.0.10114-a447f03e46
1849 15:54:03.556619 running image: 1
1850 15:54:03.562544 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1851 15:54:03.566729 ACPI: * FADT
1852 15:54:03.567236 SCI is IRQ9
1853 15:54:03.573595 ACPI: added table 1/32, length now 40
1854 15:54:03.574197 ACPI: * SSDT
1855 15:54:03.576880 Found 1 CPU(s) with 8 core(s) each.
1856 15:54:03.583699 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1857 15:54:03.587010 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1858 15:54:03.590598 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1859 15:54:03.593676 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1860 15:54:03.600376 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1861 15:54:03.606659 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1862 15:54:03.610201 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1863 15:54:03.616965 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1864 15:54:03.623830 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1865 15:54:03.626388 \_SB.PCI0.RP09: Added StorageD3Enable property
1866 15:54:03.633534 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1867 15:54:03.636743 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1868 15:54:03.643437 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1869 15:54:03.646325 PS2K: Passing 80 keymaps to kernel
1870 15:54:03.653213 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1871 15:54:03.659800 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1872 15:54:03.666164 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1873 15:54:03.672865 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1874 15:54:03.679820 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1875 15:54:03.686648 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1876 15:54:03.693001 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1877 15:54:03.700153 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1878 15:54:03.702919 ACPI: added table 2/32, length now 44
1879 15:54:03.703518 ACPI: * MCFG
1880 15:54:03.709347 ACPI: added table 3/32, length now 48
1881 15:54:03.709939 ACPI: * TPM2
1882 15:54:03.713171 TPM2 log created at 0x769f0000
1883 15:54:03.716164 ACPI: added table 4/32, length now 52
1884 15:54:03.719525 ACPI: * MADT
1885 15:54:03.720138 SCI is IRQ9
1886 15:54:03.722739 ACPI: added table 5/32, length now 56
1887 15:54:03.726799 current = 76b09850
1888 15:54:03.727470 ACPI: * DMAR
1889 15:54:03.729146 ACPI: added table 6/32, length now 60
1890 15:54:03.735969 ACPI: added table 7/32, length now 64
1891 15:54:03.736593 ACPI: * HPET
1892 15:54:03.739177 ACPI: added table 8/32, length now 68
1893 15:54:03.743135 ACPI: done.
1894 15:54:03.743744 ACPI tables: 35216 bytes.
1895 15:54:03.746149 smbios_write_tables: 769ef000
1896 15:54:03.749485 EC returned error result code 3
1897 15:54:03.752602 Couldn't obtain OEM name from CBI
1898 15:54:03.757279 Create SMBIOS type 16
1899 15:54:03.760470 Create SMBIOS type 17
1900 15:54:03.763862 GENERIC: 0.0 (WIFI Device)
1901 15:54:03.764492 SMBIOS tables: 1750 bytes.
1902 15:54:03.770709 Writing table forward entry at 0x00000500
1903 15:54:03.776783 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1904 15:54:03.780560 Writing coreboot table at 0x76b25000
1905 15:54:03.786969 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1906 15:54:03.790252 1. 0000000000001000-000000000009ffff: RAM
1907 15:54:03.793634 2. 00000000000a0000-00000000000fffff: RESERVED
1908 15:54:03.800378 3. 0000000000100000-00000000769eefff: RAM
1909 15:54:03.803571 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1910 15:54:03.810006 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1911 15:54:03.816552 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1912 15:54:03.820162 7. 0000000077000000-000000007fbfffff: RESERVED
1913 15:54:03.826775 8. 00000000c0000000-00000000cfffffff: RESERVED
1914 15:54:03.830283 9. 00000000f8000000-00000000f9ffffff: RESERVED
1915 15:54:03.833265 10. 00000000fb000000-00000000fb000fff: RESERVED
1916 15:54:03.839750 11. 00000000fe000000-00000000fe00ffff: RESERVED
1917 15:54:03.843111 12. 00000000fed80000-00000000fed87fff: RESERVED
1918 15:54:03.849881 13. 00000000fed90000-00000000fed92fff: RESERVED
1919 15:54:03.852880 14. 00000000feda0000-00000000feda1fff: RESERVED
1920 15:54:03.859930 15. 00000000fedc0000-00000000feddffff: RESERVED
1921 15:54:03.863179 16. 0000000100000000-00000002803fffff: RAM
1922 15:54:03.866582 Passing 4 GPIOs to payload:
1923 15:54:03.869517 NAME | PORT | POLARITY | VALUE
1924 15:54:03.876196 lid | undefined | high | high
1925 15:54:03.882889 power | undefined | high | low
1926 15:54:03.886449 oprom | undefined | high | low
1927 15:54:03.892957 EC in RW | 0x000000e5 | high | low
1928 15:54:03.899473 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 4ac3
1929 15:54:03.903137 coreboot table: 1576 bytes.
1930 15:54:03.905929 IMD ROOT 0. 0x76fff000 0x00001000
1931 15:54:03.909270 IMD SMALL 1. 0x76ffe000 0x00001000
1932 15:54:03.912786 FSP MEMORY 2. 0x76c4e000 0x003b0000
1933 15:54:03.916365 VPD 3. 0x76c4d000 0x00000367
1934 15:54:03.919727 RO MCACHE 4. 0x76c4c000 0x00000fdc
1935 15:54:03.923140 CONSOLE 5. 0x76c2c000 0x00020000
1936 15:54:03.925748 FMAP 6. 0x76c2b000 0x00000578
1937 15:54:03.932126 TIME STAMP 7. 0x76c2a000 0x00000910
1938 15:54:03.935659 VBOOT WORK 8. 0x76c16000 0x00014000
1939 15:54:03.939234 ROMSTG STCK 9. 0x76c15000 0x00001000
1940 15:54:03.942676 AFTER CAR 10. 0x76c0a000 0x0000b000
1941 15:54:03.945852 RAMSTAGE 11. 0x76b97000 0x00073000
1942 15:54:03.949301 REFCODE 12. 0x76b42000 0x00055000
1943 15:54:03.952487 SMM BACKUP 13. 0x76b32000 0x00010000
1944 15:54:03.958922 4f444749 14. 0x76b30000 0x00002000
1945 15:54:03.962327 EXT VBT15. 0x76b2d000 0x0000219f
1946 15:54:03.965486 COREBOOT 16. 0x76b25000 0x00008000
1947 15:54:03.969037 ACPI 17. 0x76b01000 0x00024000
1948 15:54:03.972020 ACPI GNVS 18. 0x76b00000 0x00001000
1949 15:54:03.975324 RAMOOPS 19. 0x76a00000 0x00100000
1950 15:54:03.979042 TPM2 TCGLOG20. 0x769f0000 0x00010000
1951 15:54:03.982252 SMBIOS 21. 0x769ef000 0x00000800
1952 15:54:03.985684 IMD small region:
1953 15:54:03.988738 IMD ROOT 0. 0x76ffec00 0x00000400
1954 15:54:03.992234 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1955 15:54:03.995643 POWER STATE 2. 0x76ffeb80 0x00000044
1956 15:54:04.001535 ROMSTAGE 3. 0x76ffeb60 0x00000004
1957 15:54:04.005191 MEM INFO 4. 0x76ffe980 0x000001e0
1958 15:54:04.011826 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1959 15:54:04.012464 MTRR: Physical address space:
1960 15:54:04.018530 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1961 15:54:04.025065 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1962 15:54:04.032069 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1963 15:54:04.038306 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1964 15:54:04.045248 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1965 15:54:04.051709 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1966 15:54:04.058911 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1967 15:54:04.061532 MTRR: Fixed MSR 0x250 0x0606060606060606
1968 15:54:04.065069 MTRR: Fixed MSR 0x258 0x0606060606060606
1969 15:54:04.068400 MTRR: Fixed MSR 0x259 0x0000000000000000
1970 15:54:04.074443 MTRR: Fixed MSR 0x268 0x0606060606060606
1971 15:54:04.077913 MTRR: Fixed MSR 0x269 0x0606060606060606
1972 15:54:04.081277 MTRR: Fixed MSR 0x26a 0x0606060606060606
1973 15:54:04.085061 MTRR: Fixed MSR 0x26b 0x0606060606060606
1974 15:54:04.091520 MTRR: Fixed MSR 0x26c 0x0606060606060606
1975 15:54:04.095083 MTRR: Fixed MSR 0x26d 0x0606060606060606
1976 15:54:04.097996 MTRR: Fixed MSR 0x26e 0x0606060606060606
1977 15:54:04.101440 MTRR: Fixed MSR 0x26f 0x0606060606060606
1978 15:54:04.105097 call enable_fixed_mtrr()
1979 15:54:04.109047 CPU physical address size: 39 bits
1980 15:54:04.114968 MTRR: default type WB/UC MTRR counts: 6/6.
1981 15:54:04.118304 MTRR: UC selected as default type.
1982 15:54:04.125045 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1983 15:54:04.128471 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1984 15:54:04.135154 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1985 15:54:04.141488 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1986 15:54:04.148560 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1987 15:54:04.154709 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1988 15:54:04.161582 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 15:54:04.164885 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 15:54:04.168054 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 15:54:04.171575 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 15:54:04.178039 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 15:54:04.181502 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 15:54:04.184697 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 15:54:04.188256 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 15:54:04.194536 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 15:54:04.198090 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 15:54:04.201118 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 15:54:04.208071 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 15:54:04.208710 call enable_fixed_mtrr()
2001 15:54:04.214518 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 15:54:04.217375 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 15:54:04.220881 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 15:54:04.224375 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 15:54:04.231032 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 15:54:04.234508 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 15:54:04.237234 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 15:54:04.240522 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 15:54:04.244709 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 15:54:04.250687 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 15:54:04.254527 CPU physical address size: 39 bits
2012 15:54:04.257509 call enable_fixed_mtrr()
2013 15:54:04.261088 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 15:54:04.267149 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 15:54:04.270720 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 15:54:04.273688 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 15:54:04.277020 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 15:54:04.284005 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 15:54:04.287128 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 15:54:04.290558 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 15:54:04.293846 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 15:54:04.300494 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 15:54:04.303950 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 15:54:04.307473 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 15:54:04.313599 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 15:54:04.314197 call enable_fixed_mtrr()
2027 15:54:04.320155 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 15:54:04.323927 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 15:54:04.326773 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 15:54:04.329710 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 15:54:04.336613 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 15:54:04.339780 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 15:54:04.342921 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 15:54:04.346606 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 15:54:04.353104 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 15:54:04.356860 CPU physical address size: 39 bits
2037 15:54:04.359630 call enable_fixed_mtrr()
2038 15:54:04.360129
2039 15:54:04.360543 MTRR check
2040 15:54:04.365932 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 15:54:04.366434 Fixed MTRRs : Enabled
2042 15:54:04.369329 Variable MTRRs: Enabled
2043 15:54:04.369862
2044 15:54:04.373050 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 15:54:04.379438 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 15:54:04.382559 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 15:54:04.386107 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 15:54:04.389545 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 15:54:04.396415 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 15:54:04.399279 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 15:54:04.403330 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 15:54:04.405911 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 15:54:04.412623 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 15:54:04.419449 BS: BS_WRITE_TABLES exit times (exec / console): 210 / 150 ms
2055 15:54:04.422612 call enable_fixed_mtrr()
2056 15:54:04.425654 Checking cr50 for pending updates
2057 15:54:04.429418 CPU physical address size: 39 bits
2058 15:54:04.433617 CPU physical address size: 39 bits
2059 15:54:04.434117 Reading cr50 TPM mode
2060 15:54:04.437076 CPU physical address size: 39 bits
2061 15:54:04.440884 MTRR: Fixed MSR 0x250 0x0606060606060606
2062 15:54:04.444103 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 15:54:04.450967 MTRR: Fixed MSR 0x258 0x0606060606060606
2064 15:54:04.454189 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 15:54:04.457867 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 15:54:04.460614 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 15:54:04.466996 MTRR: Fixed MSR 0x26a 0x0606060606060606
2068 15:54:04.470394 MTRR: Fixed MSR 0x26b 0x0606060606060606
2069 15:54:04.473999 MTRR: Fixed MSR 0x26c 0x0606060606060606
2070 15:54:04.477450 MTRR: Fixed MSR 0x26d 0x0606060606060606
2071 15:54:04.483730 MTRR: Fixed MSR 0x26e 0x0606060606060606
2072 15:54:04.487225 MTRR: Fixed MSR 0x26f 0x0606060606060606
2073 15:54:04.490672 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 15:54:04.494326 call enable_fixed_mtrr()
2075 15:54:04.497231 MTRR: Fixed MSR 0x259 0x0000000000000000
2076 15:54:04.503749 MTRR: Fixed MSR 0x268 0x0606060606060606
2077 15:54:04.507238 MTRR: Fixed MSR 0x269 0x0606060606060606
2078 15:54:04.510276 MTRR: Fixed MSR 0x26a 0x0606060606060606
2079 15:54:04.513830 MTRR: Fixed MSR 0x26b 0x0606060606060606
2080 15:54:04.520936 MTRR: Fixed MSR 0x26c 0x0606060606060606
2081 15:54:04.523860 MTRR: Fixed MSR 0x26d 0x0606060606060606
2082 15:54:04.526791 MTRR: Fixed MSR 0x26e 0x0606060606060606
2083 15:54:04.530304 MTRR: Fixed MSR 0x26f 0x0606060606060606
2084 15:54:04.534102 CPU physical address size: 39 bits
2085 15:54:04.540432 call enable_fixed_mtrr()
2086 15:54:04.544024 BS: BS_PAYLOAD_LOAD entry times (exec / console): 14 / 6 ms
2087 15:54:04.547131 CPU physical address size: 39 bits
2088 15:54:04.557183 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2089 15:54:04.560669 Checking segment from ROM address 0xffc02b38
2090 15:54:04.563960 Checking segment from ROM address 0xffc02b54
2091 15:54:04.570127 Loading segment from ROM address 0xffc02b38
2092 15:54:04.573355 code (compression=0)
2093 15:54:04.580521 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2094 15:54:04.590247 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2095 15:54:04.590856 it's not compressed!
2096 15:54:04.730051 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2097 15:54:04.737016 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2098 15:54:04.743523 Loading segment from ROM address 0xffc02b54
2099 15:54:04.744118 Entry Point 0x30000000
2100 15:54:04.746938 Loaded segments
2101 15:54:04.753934 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2102 15:54:04.796485 Finalizing chipset.
2103 15:54:04.799575 Finalizing SMM.
2104 15:54:04.800170 APMC done.
2105 15:54:04.806026 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2106 15:54:04.809744 mp_park_aps done after 0 msecs.
2107 15:54:04.812830 Jumping to boot code at 0x30000000(0x76b25000)
2108 15:54:04.822860 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2109 15:54:04.823457
2110 15:54:04.823868
2111 15:54:04.825634
2112 15:54:04.826170 Starting depthcharge on Voema...
2113 15:54:04.827353 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2114 15:54:04.827924 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2115 15:54:04.828401 Setting prompt string to ['volteer:']
2116 15:54:04.828863 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2117 15:54:04.829652
2118 15:54:04.836448 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2119 15:54:04.837030
2120 15:54:04.842727 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2121 15:54:04.843328
2122 15:54:04.849824 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2123 15:54:04.850422
2124 15:54:04.852412 Failed to find eMMC card reader
2125 15:54:04.852910
2126 15:54:04.853304 Wipe memory regions:
2127 15:54:04.855931
2128 15:54:04.859683 [0x00000000001000, 0x000000000a0000)
2129 15:54:04.860271
2130 15:54:04.862061 [0x00000000100000, 0x00000030000000)
2131 15:54:04.888382
2132 15:54:04.891202 [0x00000032662db0, 0x000000769ef000)
2133 15:54:04.927087
2134 15:54:04.930525 [0x00000100000000, 0x00000280400000)
2135 15:54:05.132769
2136 15:54:05.135554 ec_init: CrosEC protocol v3 supported (256, 256)
2137 15:54:05.567667
2138 15:54:05.568274 R8152: Initializing
2139 15:54:05.568715
2140 15:54:05.570912 Version 6 (ocp_data = 5c30)
2141 15:54:05.571415
2142 15:54:05.574327 R8152: Done initializing
2143 15:54:05.574946
2144 15:54:05.576957 Adding net device
2145 15:54:05.878771
2146 15:54:05.882391 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2147 15:54:05.882903
2148 15:54:05.883303
2149 15:54:05.883676
2150 15:54:05.885377 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2152 15:54:05.987099 volteer: tftpboot 192.168.201.1 9406211/tftp-deploy-tiacepxo/kernel/bzImage 9406211/tftp-deploy-tiacepxo/kernel/cmdline 9406211/tftp-deploy-tiacepxo/ramdisk/ramdisk.cpio.gz
2153 15:54:05.987823 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2154 15:54:05.988360 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2155 15:54:05.993393 tftpboot 192.168.201.1 9406211/tftp-deploy-tiacepxo/kernel/bzImaoy-tiacepxo/kernel/cmdline 9406211/tftp-deploy-tiacepxo/ramdisk/ramdisk.cpio.gz
2156 15:54:05.993909
2157 15:54:05.994305 Waiting for link
2158 15:54:06.196772
2159 15:54:06.197372 done.
2160 15:54:06.197889
2161 15:54:06.198303 MAC: 00:24:32:30:77:76
2162 15:54:06.198666
2163 15:54:06.199414 Sending DHCP discover... done.
2164 15:54:06.199804
2165 15:54:06.203046 Waiting for reply... done.
2166 15:54:06.203732
2167 15:54:06.206245 Sending DHCP request... done.
2168 15:54:06.206747
2169 15:54:06.212771 Waiting for reply... done.
2170 15:54:06.213371
2171 15:54:06.213774 My ip is 192.168.201.16
2172 15:54:06.214148
2173 15:54:06.215984 The DHCP server ip is 192.168.201.1
2174 15:54:06.220023
2175 15:54:06.222704 TFTP server IP predefined by user: 192.168.201.1
2176 15:54:06.223213
2177 15:54:06.229691 Bootfile predefined by user: 9406211/tftp-deploy-tiacepxo/kernel/bzImage
2178 15:54:06.230385
2179 15:54:06.233005 Sending tftp read request... done.
2180 15:54:06.233619
2181 15:54:06.239635 Waiting for the transfer...
2182 15:54:06.240140
2183 15:54:06.953371 00000000 ################################################################
2184 15:54:06.953936
2185 15:54:07.669870 00080000 ################################################################
2186 15:54:07.670483
2187 15:54:08.382033 00100000 ################################################################
2188 15:54:08.382585
2189 15:54:09.031544 00180000 ################################################################
2190 15:54:09.032176
2191 15:54:09.727367 00200000 ################################################################
2192 15:54:09.727996
2193 15:54:10.440724 00280000 ################################################################
2194 15:54:10.441349
2195 15:54:11.140286 00300000 ################################################################
2196 15:54:11.140477
2197 15:54:11.791122 00380000 ################################################################
2198 15:54:11.791729
2199 15:54:12.493161 00400000 ################################################################
2200 15:54:12.493833
2201 15:54:13.224987 00480000 ################################################################
2202 15:54:13.225612
2203 15:54:13.910075 00500000 ################################################################
2204 15:54:13.910270
2205 15:54:14.625808 00580000 ################################################################
2206 15:54:14.626364
2207 15:54:15.350909 00600000 ################################################################
2208 15:54:15.351547
2209 15:54:16.061655 00680000 ################################################################
2210 15:54:16.062294
2211 15:54:16.778449 00700000 ################################################################
2212 15:54:16.779040
2213 15:54:17.507064 00780000 ################################################################
2214 15:54:17.507690
2215 15:54:18.242299 00800000 ################################################################
2216 15:54:18.242918
2217 15:54:18.965127 00880000 ################################################################
2218 15:54:18.965689
2219 15:54:19.344471 00900000 ################################## done.
2220 15:54:19.345057
2221 15:54:19.347976 The bootfile was 9707520 bytes long.
2222 15:54:19.348493
2223 15:54:19.351425 Sending tftp read request... done.
2224 15:54:19.351913
2225 15:54:19.354523 Waiting for the transfer...
2226 15:54:19.355131
2227 15:54:20.057171 00000000 ################################################################
2228 15:54:20.057713
2229 15:54:20.754589 00080000 ################################################################
2230 15:54:20.755193
2231 15:54:21.418952 00100000 ################################################################
2232 15:54:21.419630
2233 15:54:22.135104 00180000 ################################################################
2234 15:54:22.135762
2235 15:54:22.850545 00200000 ################################################################
2236 15:54:22.851104
2237 15:54:23.508034 00280000 ################################################################
2238 15:54:23.508300
2239 15:54:24.071236 00300000 ################################################################
2240 15:54:24.071396
2241 15:54:24.629765 00380000 ################################################################
2242 15:54:24.629968
2243 15:54:25.186100 00400000 ################################################################
2244 15:54:25.186248
2245 15:54:25.752575 00480000 ################################################################
2246 15:54:25.752735
2247 15:54:26.057192 00500000 ################################## done.
2248 15:54:26.057342
2249 15:54:26.060563 Sending tftp read request... done.
2250 15:54:26.060653
2251 15:54:26.064124 Waiting for the transfer...
2252 15:54:26.064213
2253 15:54:26.064282 00000000 # done.
2254 15:54:26.064389
2255 15:54:26.073984 Command line loaded dynamically from TFTP file: 9406211/tftp-deploy-tiacepxo/kernel/cmdline
2256 15:54:26.074072
2257 15:54:26.096712 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9406211/extract-nfsrootfs-i8lq2bqn,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2258 15:54:26.101164
2259 15:54:26.104442 Shutting down all USB controllers.
2260 15:54:26.104529
2261 15:54:26.104599 Removing current net device
2262 15:54:26.104662
2263 15:54:26.107511 Finalizing coreboot
2264 15:54:26.107598
2265 15:54:26.114067 Exiting depthcharge with code 4 at timestamp: 29940695
2266 15:54:26.114154
2267 15:54:26.114223
2268 15:54:26.114287 Starting kernel ...
2269 15:54:26.114349
2270 15:54:26.114407
2271 15:54:26.114773 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2272 15:54:26.114871 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2273 15:54:26.114948 Setting prompt string to ['Linux version [0-9]']
2274 15:54:26.115019 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2275 15:54:26.115088 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2277 15:58:47.115154 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2279 15:58:47.115374 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2281 15:58:47.115536 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2284 15:58:47.115800 end: 2 depthcharge-action (duration 00:05:00) [common]
2286 15:58:47.116032 Cleaning after the job
2287 15:58:47.116118 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/ramdisk
2288 15:58:47.116638 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/kernel
2289 15:58:47.117314 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/nfsrootfs
2290 15:58:47.165253 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9406211/tftp-deploy-tiacepxo/modules
2291 15:58:47.165564 start: 4.1 power-off (timeout 00:00:30) [common]
2292 15:58:47.165728 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2293 15:58:49.345824 >> Command sent successfully.
2294 15:58:49.356193 Returned 0 in 2 seconds
2295 15:58:49.457938 end: 4.1 power-off (duration 00:00:02) [common]
2297 15:58:49.459561 start: 4.2 read-feedback (timeout 00:09:58) [common]
2298 15:58:49.460765 Listened to connection for namespace 'common' for up to 1s
2299 15:58:50.464570 Finalising connection for namespace 'common'
2300 15:58:50.464799 Disconnecting from shell: Finalise
2301 15:58:50.464901
2302 15:58:50.565657 end: 4.2 read-feedback (duration 00:00:01) [common]
2303 15:58:50.565799 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9406211
2304 15:58:50.724086 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9406211
2305 15:58:50.724293 JobError: Your job cannot terminate cleanly.