Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 07:14:31.954741 lava-dispatcher, installed at version: 2023.01
2 07:14:31.954923 start: 0 validate
3 07:14:31.955079 Start time: 2023-03-12 07:14:31.955073+00:00 (UTC)
4 07:14:31.955199 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:14:31.955330 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230303.0%2Fx86%2Frootfs.cpio.gz exists
6 07:14:32.243440 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:14:32.243624 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-277-g507c8d80b9e20%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:14:32.533970 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:14:32.534141 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-277-g507c8d80b9e20%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:14:32.829173 validate duration: 0.87
12 07:14:32.829466 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:14:32.829624 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:14:32.829726 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:14:32.829839 Not decompressing ramdisk as can be used compressed.
16 07:14:32.829922 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230303.0/x86/rootfs.cpio.gz
17 07:14:32.829989 saving as /var/lib/lava/dispatcher/tmp/9567953/tftp-deploy-vjmxtqv1/ramdisk/rootfs.cpio.gz
18 07:14:32.830048 total size: 8423697 (8MB)
19 07:14:32.830926 progress 0% (0MB)
20 07:14:32.833122 progress 5% (0MB)
21 07:14:32.835192 progress 10% (0MB)
22 07:14:32.837281 progress 15% (1MB)
23 07:14:32.839310 progress 20% (1MB)
24 07:14:32.841372 progress 25% (2MB)
25 07:14:32.843398 progress 30% (2MB)
26 07:14:32.845321 progress 35% (2MB)
27 07:14:32.847342 progress 40% (3MB)
28 07:14:32.849423 progress 45% (3MB)
29 07:14:32.851517 progress 50% (4MB)
30 07:14:32.853599 progress 55% (4MB)
31 07:14:32.855585 progress 60% (4MB)
32 07:14:32.857627 progress 65% (5MB)
33 07:14:32.859476 progress 70% (5MB)
34 07:14:32.861532 progress 75% (6MB)
35 07:14:32.863600 progress 80% (6MB)
36 07:14:32.865646 progress 85% (6MB)
37 07:14:32.867629 progress 90% (7MB)
38 07:14:32.869672 progress 95% (7MB)
39 07:14:32.871674 progress 100% (8MB)
40 07:14:32.871778 8MB downloaded in 0.04s (192.54MB/s)
41 07:14:32.871925 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:14:32.872198 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:14:32.872287 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:14:32.872425 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:14:32.872530 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-277-g507c8d80b9e20/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:14:32.872601 saving as /var/lib/lava/dispatcher/tmp/9567953/tftp-deploy-vjmxtqv1/kernel/bzImage
48 07:14:32.872662 total size: 9826304 (9MB)
49 07:14:32.872722 No compression specified
50 07:14:32.873612 progress 0% (0MB)
51 07:14:32.875906 progress 5% (0MB)
52 07:14:32.878285 progress 10% (0MB)
53 07:14:32.880652 progress 15% (1MB)
54 07:14:32.882980 progress 20% (1MB)
55 07:14:32.885360 progress 25% (2MB)
56 07:14:32.887674 progress 30% (2MB)
57 07:14:32.890064 progress 35% (3MB)
58 07:14:32.892530 progress 40% (3MB)
59 07:14:32.894859 progress 45% (4MB)
60 07:14:32.897217 progress 50% (4MB)
61 07:14:32.899534 progress 55% (5MB)
62 07:14:32.902018 progress 60% (5MB)
63 07:14:32.904464 progress 65% (6MB)
64 07:14:32.906768 progress 70% (6MB)
65 07:14:32.909109 progress 75% (7MB)
66 07:14:32.911449 progress 80% (7MB)
67 07:14:32.913783 progress 85% (7MB)
68 07:14:32.916075 progress 90% (8MB)
69 07:14:32.918539 progress 95% (8MB)
70 07:14:32.921057 progress 100% (9MB)
71 07:14:32.921267 9MB downloaded in 0.05s (192.82MB/s)
72 07:14:32.921413 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:14:32.921645 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:14:32.921733 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:14:32.921819 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:14:32.921927 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-277-g507c8d80b9e20/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:14:32.921996 saving as /var/lib/lava/dispatcher/tmp/9567953/tftp-deploy-vjmxtqv1/modules/modules.tar
79 07:14:32.922056 total size: 462184 (0MB)
80 07:14:32.922115 Using unxz to decompress xz
81 07:14:32.925250 progress 7% (0MB)
82 07:14:32.925621 progress 14% (0MB)
83 07:14:32.925863 progress 21% (0MB)
84 07:14:32.927332 progress 28% (0MB)
85 07:14:32.929479 progress 35% (0MB)
86 07:14:32.931595 progress 42% (0MB)
87 07:14:32.934015 progress 49% (0MB)
88 07:14:32.935948 progress 56% (0MB)
89 07:14:32.937809 progress 63% (0MB)
90 07:14:32.939975 progress 70% (0MB)
91 07:14:32.942072 progress 77% (0MB)
92 07:14:32.944017 progress 85% (0MB)
93 07:14:32.945806 progress 92% (0MB)
94 07:14:32.947816 progress 99% (0MB)
95 07:14:32.954382 0MB downloaded in 0.03s (13.64MB/s)
96 07:14:32.954653 end: 1.3.1 http-download (duration 00:00:00) [common]
98 07:14:32.954918 end: 1.3 download-retry (duration 00:00:00) [common]
99 07:14:32.955016 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
100 07:14:32.955112 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
101 07:14:32.955199 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 07:14:32.955283 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
103 07:14:32.955460 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h
104 07:14:32.955570 makedir: /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin
105 07:14:32.955660 makedir: /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/tests
106 07:14:32.955741 makedir: /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/results
107 07:14:32.955849 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-add-keys
108 07:14:32.955982 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-add-sources
109 07:14:32.956098 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-background-process-start
110 07:14:32.956209 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-background-process-stop
111 07:14:32.956347 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-common-functions
112 07:14:32.956471 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-echo-ipv4
113 07:14:32.956583 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-install-packages
114 07:14:32.956694 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-installed-packages
115 07:14:32.956804 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-os-build
116 07:14:32.956913 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-probe-channel
117 07:14:32.957023 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-probe-ip
118 07:14:32.957130 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-target-ip
119 07:14:32.957238 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-target-mac
120 07:14:32.957345 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-target-storage
121 07:14:32.957455 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-test-case
122 07:14:32.957564 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-test-event
123 07:14:32.957671 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-test-feedback
124 07:14:32.957780 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-test-raise
125 07:14:32.957889 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-test-reference
126 07:14:32.957996 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-test-runner
127 07:14:32.958102 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-test-set
128 07:14:32.958209 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-test-shell
129 07:14:32.958319 Updating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-install-packages (oe)
130 07:14:32.958431 Updating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/bin/lava-installed-packages (oe)
131 07:14:32.958528 Creating /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/environment
132 07:14:32.958617 LAVA metadata
133 07:14:32.958688 - LAVA_JOB_ID=9567953
134 07:14:32.958755 - LAVA_DISPATCHER_IP=192.168.201.1
135 07:14:32.958854 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
136 07:14:32.958921 skipped lava-vland-overlay
137 07:14:32.958997 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 07:14:32.959079 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
139 07:14:32.959144 skipped lava-multinode-overlay
140 07:14:32.959218 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 07:14:32.959303 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
142 07:14:32.959379 Loading test definitions
143 07:14:32.959479 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
144 07:14:32.959553 Using /lava-9567953 at stage 0
145 07:14:32.959818 uuid=9567953_1.4.2.3.1 testdef=None
146 07:14:32.959908 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 07:14:32.960004 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
148 07:14:32.960537 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 07:14:32.960773 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
151 07:14:32.961342 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 07:14:32.961583 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
154 07:14:32.962128 runner path: /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/0/tests/0_dmesg test_uuid 9567953_1.4.2.3.1
155 07:14:32.962277 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 07:14:32.962514 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
158 07:14:32.962588 Using /lava-9567953 at stage 1
159 07:14:32.962829 uuid=9567953_1.4.2.3.5 testdef=None
160 07:14:32.962920 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 07:14:32.963008 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
162 07:14:32.963504 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 07:14:32.963727 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
165 07:14:32.964285 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 07:14:32.964559 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
168 07:14:32.965096 runner path: /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/1/tests/1_bootrr test_uuid 9567953_1.4.2.3.5
169 07:14:32.965236 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 07:14:32.965448 Creating lava-test-runner.conf files
172 07:14:32.965512 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/0 for stage 0
173 07:14:32.965595 - 0_dmesg
174 07:14:32.965672 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9567953/lava-overlay-l9x3i62h/lava-9567953/1 for stage 1
175 07:14:32.965754 - 1_bootrr
176 07:14:32.965844 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 07:14:32.965929 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
178 07:14:32.972232 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 07:14:32.972348 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
180 07:14:32.972473 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 07:14:32.972560 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 07:14:32.972647 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
183 07:14:33.155243 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 07:14:33.155605 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
185 07:14:33.155715 extracting modules file /var/lib/lava/dispatcher/tmp/9567953/tftp-deploy-vjmxtqv1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9567953/extract-overlay-ramdisk-2x6nbbwy/ramdisk
186 07:14:33.166509 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 07:14:33.166631 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
188 07:14:33.166722 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9567953/compress-overlay-i056j71k/overlay-1.4.2.4.tar.gz to ramdisk
189 07:14:33.166794 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9567953/compress-overlay-i056j71k/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9567953/extract-overlay-ramdisk-2x6nbbwy/ramdisk
190 07:14:33.170824 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 07:14:33.170937 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
192 07:14:33.171030 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 07:14:33.171121 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
194 07:14:33.171197 Building ramdisk /var/lib/lava/dispatcher/tmp/9567953/extract-overlay-ramdisk-2x6nbbwy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9567953/extract-overlay-ramdisk-2x6nbbwy/ramdisk
195 07:14:33.241410 >> 53575 blocks
196 07:14:34.076480 rename /var/lib/lava/dispatcher/tmp/9567953/extract-overlay-ramdisk-2x6nbbwy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9567953/tftp-deploy-vjmxtqv1/ramdisk/ramdisk.cpio.gz
197 07:14:34.076892 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 07:14:34.077016 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
199 07:14:34.077294 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
200 07:14:34.077392 No mkimage arch provided, not using FIT.
201 07:14:34.077481 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 07:14:34.077566 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 07:14:34.077661 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 07:14:34.077752 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
205 07:14:34.077828 No LXC device requested
206 07:14:34.077907 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 07:14:34.077994 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
208 07:14:34.078080 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 07:14:34.078148 Checking files for TFTP limit of 4294967296 bytes.
210 07:14:34.078513 end: 1 tftp-deploy (duration 00:00:01) [common]
211 07:14:34.078617 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 07:14:34.078716 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 07:14:34.078843 substitutions:
214 07:14:34.078912 - {DTB}: None
215 07:14:34.078979 - {INITRD}: 9567953/tftp-deploy-vjmxtqv1/ramdisk/ramdisk.cpio.gz
216 07:14:34.079039 - {KERNEL}: 9567953/tftp-deploy-vjmxtqv1/kernel/bzImage
217 07:14:34.079098 - {LAVA_MAC}: None
218 07:14:34.079157 - {PRESEED_CONFIG}: None
219 07:14:34.079214 - {PRESEED_LOCAL}: None
220 07:14:34.079271 - {RAMDISK}: 9567953/tftp-deploy-vjmxtqv1/ramdisk/ramdisk.cpio.gz
221 07:14:34.079328 - {ROOT_PART}: None
222 07:14:34.079384 - {ROOT}: None
223 07:14:34.079439 - {SERVER_IP}: 192.168.201.1
224 07:14:34.079495 - {TEE}: None
225 07:14:34.079551 Parsed boot commands:
226 07:14:34.079606 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 07:14:34.079757 Parsed boot commands: tftpboot 192.168.201.1 9567953/tftp-deploy-vjmxtqv1/kernel/bzImage 9567953/tftp-deploy-vjmxtqv1/kernel/cmdline 9567953/tftp-deploy-vjmxtqv1/ramdisk/ramdisk.cpio.gz
228 07:14:34.079847 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 07:14:34.079933 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 07:14:34.080025 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 07:14:34.080111 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 07:14:34.080179 Not connected, no need to disconnect.
233 07:14:34.080254 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 07:14:34.080340 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 07:14:34.080409 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-1'
236 07:14:34.083222 Setting prompt string to ['lava-test: # ']
237 07:14:34.083508 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 07:14:34.083612 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 07:14:34.083709 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 07:14:34.083803 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 07:14:34.083982 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=reboot'
242 07:14:39.217961 >> Command sent successfully.
243 07:14:39.220054 Returned 0 in 5 seconds
244 07:14:39.320476 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 07:14:39.320813 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 07:14:39.320912 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 07:14:39.320999 Setting prompt string to 'Starting depthcharge on Magolor...'
249 07:14:39.321064 Changing prompt to 'Starting depthcharge on Magolor...'
250 07:14:39.321137 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
251 07:14:39.321411 [Enter `^Ec?' for help]
252 07:14:40.490849
253 07:14:40.491376
254 07:14:40.501250 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
255 07:14:40.504703 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
256 07:14:40.507949 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
257 07:14:40.514633 CPU: AES supported, TXT NOT supported, VT supported
258 07:14:40.518307 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
259 07:14:40.524862 PCH: device id 4d87 (rev 01) is Jasperlake Super
260 07:14:40.528000 IGD: device id 4e55 (rev 01) is Jasperlake GT4
261 07:14:40.531181 VBOOT: Loading verstage.
262 07:14:40.538495 FMAP: Found "FLASH" version 1.1 at 0xc04000.
263 07:14:40.541349 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
264 07:14:40.548854 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
265 07:14:40.551987 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
266 07:14:40.552550
267 07:14:40.555477
268 07:14:40.565112 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
269 07:14:40.579793 Probing TPM: . done!
270 07:14:40.582871 TPM ready after 0 ms
271 07:14:40.586340 Connected to device vid:did:rid of 1ae0:0028:00
272 07:14:40.598750 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
273 07:14:40.604972 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
274 07:14:40.656569 Initialized TPM device CR50 revision 0
275 07:14:40.665684 tlcl_send_startup: Startup return code is 0
276 07:14:40.666215 TPM: setup succeeded
277 07:14:40.680254 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
278 07:14:40.694912 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
279 07:14:40.709820 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
280 07:14:40.720897 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 07:14:40.724513 Chrome EC: UHEPI supported
282 07:14:40.727872 Phase 1
283 07:14:40.731156 FMAP: area GBB found @ c05000 (12288 bytes)
284 07:14:40.737534 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
285 07:14:40.744833 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
286 07:14:40.748185 Recovery requested (1009000e)
287 07:14:40.756750 TPM: Extending digest for VBOOT: boot mode into PCR 0
288 07:14:40.763373 tlcl_extend: response is 0
289 07:14:40.769852 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
290 07:14:40.779485 tlcl_extend: response is 0
291 07:14:40.786127 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
292 07:14:40.790439 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
293 07:14:40.797710 BS: verstage times (exec / console): total (unknown) / 124 ms
294 07:14:40.798282
295 07:14:40.798632
296 07:14:40.809435 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
297 07:14:40.813156 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
298 07:14:40.820917 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
299 07:14:40.824461 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
300 07:14:40.827836 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
301 07:14:40.831044 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
302 07:14:40.837715 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
303 07:14:40.838279 TCO_STS: 0000 0001
304 07:14:40.840809 GEN_PMCON: d0015038 00002200
305 07:14:40.844117 GBLRST_CAUSE: 00000000 00000000
306 07:14:40.847920 prev_sleep_state 5
307 07:14:40.851324 Boot Count incremented to 7641
308 07:14:40.857816 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
309 07:14:40.860873 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
310 07:14:40.864653 Chrome EC: UHEPI supported
311 07:14:40.870908 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
312 07:14:40.876504 Probing TPM: done!
313 07:14:40.883178 Connected to device vid:did:rid of 1ae0:0028:00
314 07:14:40.893186 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
315 07:14:40.896355 Initialized TPM device CR50 revision 0
316 07:14:40.910493 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 07:14:40.917704 MRC: Hash idx 0x100b comparison successful.
318 07:14:40.920841 MRC cache found, size 5458
319 07:14:40.921400 bootmode is set to: 2
320 07:14:40.924180 SPD INDEX = 0
321 07:14:40.927338 CBFS: Found 'spd.bin' @0x40c40 size 0x600
322 07:14:40.930792 SPD: module type is LPDDR4X
323 07:14:40.937530 SPD: module part number is MT53E512M32D2NP-046 WT:E
324 07:14:40.940901 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
325 07:14:40.947709 SPD: device width 16 bits, bus width 32 bits
326 07:14:40.950671 SPD: module size is 4096 MB (per channel)
327 07:14:40.954332 meminit_channels: DRAM half-populated
328 07:14:41.036889 CBMEM:
329 07:14:41.040074 IMD: root @ 0x76fff000 254 entries.
330 07:14:41.043229 IMD: root @ 0x76ffec00 62 entries.
331 07:14:41.046435 FMAP: area RO_VPD found @ c00000 (16384 bytes)
332 07:14:41.053033 WARNING: RO_VPD is uninitialized or empty.
333 07:14:41.056157 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
334 07:14:41.060394 External stage cache:
335 07:14:41.063844 IMD: root @ 0x7b3ff000 254 entries.
336 07:14:41.067439 IMD: root @ 0x7b3fec00 62 entries.
337 07:14:41.076610 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
338 07:14:41.083127 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
339 07:14:41.089768 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
340 07:14:41.098264 MRC: 'RECOVERY_MRC_CACHE' does not need update.
341 07:14:41.101496 cse_lite: Skip switching to RW in the recovery path
342 07:14:41.104498 1 DIMMs found
343 07:14:41.104909 SMM Memory Map
344 07:14:41.107936 SMRAM : 0x7b000000 0x800000
345 07:14:41.111432 Subregion 0: 0x7b000000 0x200000
346 07:14:41.114633 Subregion 1: 0x7b200000 0x200000
347 07:14:41.121584 Subregion 2: 0x7b400000 0x400000
348 07:14:41.122138 top_of_ram = 0x77000000
349 07:14:41.128703 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
350 07:14:41.131760 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
351 07:14:41.138599 MTRR Range: Start=ff000000 End=0 (Size 1000000)
352 07:14:41.142022 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
353 07:14:41.148178 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
354 07:14:41.160425 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
355 07:14:41.166720 Processing 188 relocs. Offset value of 0x74c0e000
356 07:14:41.173554 BS: romstage times (exec / console): total (unknown) / 255 ms
357 07:14:41.178209
358 07:14:41.178760
359 07:14:41.187803 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
360 07:14:41.191064 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 07:14:41.198021 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
362 07:14:41.204620 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
363 07:14:41.260621 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
364 07:14:41.267455 Processing 4805 relocs. Offset value of 0x75da8000
365 07:14:41.270932 BS: postcar times (exec / console): total (unknown) / 42 ms
366 07:14:41.273934
367 07:14:41.274383
368 07:14:41.284147 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
369 07:14:41.284782 Normal boot
370 07:14:41.287630 EC returned error result code 3
371 07:14:41.290840 FW_CONFIG value is 0x204
372 07:14:41.294559 GENERIC: 0.0 disabled by fw_config
373 07:14:41.300715 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 07:14:41.304393 I2C: 00:10 disabled by fw_config
375 07:14:41.307579 I2C: 00:10 disabled by fw_config
376 07:14:41.310787 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
377 07:14:41.317217 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 07:14:41.320791 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 07:14:41.328131 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 07:14:41.330908 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
381 07:14:41.334157 I2C: 00:10 disabled by fw_config
382 07:14:41.341235 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
383 07:14:41.347870 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
384 07:14:41.351178 I2C: 00:1a disabled by fw_config
385 07:14:41.354527 I2C: 00:1a disabled by fw_config
386 07:14:41.360698 fw_config match found: AUDIO_AMP=UNPROVISIONED
387 07:14:41.364208 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 07:14:41.367504 GENERIC: 0.0 disabled by fw_config
389 07:14:41.374105 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
390 07:14:41.377093 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
391 07:14:41.384463 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
392 07:14:41.387440 microcode: Update skipped, already up-to-date
393 07:14:41.390484 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
394 07:14:41.419820 Detected 2 core, 2 thread CPU.
395 07:14:41.422904 Setting up SMI for CPU
396 07:14:41.426265 IED base = 0x7b400000
397 07:14:41.426831 IED size = 0x00400000
398 07:14:41.429494 Will perform SMM setup.
399 07:14:41.432935 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
400 07:14:41.442821 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
401 07:14:41.446156 Processing 16 relocs. Offset value of 0x00030000
402 07:14:41.449677 Attempting to start 1 APs
403 07:14:41.453210 Waiting for 10ms after sending INIT.
404 07:14:41.469649 Waiting for 1st SIPI to complete...done.
405 07:14:41.470325 AP: slot 1 apic_id 2.
406 07:14:41.476042 Waiting for 2nd SIPI to complete...done.
407 07:14:41.482642 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
408 07:14:41.489045 Processing 13 relocs. Offset value of 0x00038000
409 07:14:41.489584 Unable to locate Global NVS
410 07:14:41.499343 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
411 07:14:41.502755 Installing permanent SMM handler to 0x7b000000
412 07:14:41.512404 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
413 07:14:41.515862 Processing 704 relocs. Offset value of 0x7b010000
414 07:14:41.522395 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
415 07:14:41.529134 Processing 13 relocs. Offset value of 0x7b008000
416 07:14:41.535644 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
417 07:14:41.538871 Unable to locate Global NVS
418 07:14:41.545612 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
419 07:14:41.549254 Clearing SMI status registers
420 07:14:41.549758 SMI_STS: PM1
421 07:14:41.552544 PM1_STS: PWRBTN
422 07:14:41.553095 TCO_STS: INTRD_DET
423 07:14:41.555691 GPE0 STD STS:
424 07:14:41.562580 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
425 07:14:41.565665 In relocation handler: CPU 0
426 07:14:41.569462 New SMBASE=0x7b000000 IEDBASE=0x7b400000
427 07:14:41.575709 Writing SMRR. base = 0x7b000006, mask=0xff800800
428 07:14:41.576264 Relocation complete.
429 07:14:41.582553 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
430 07:14:41.585576 In relocation handler: CPU 1
431 07:14:41.592236 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
432 07:14:41.595634 Writing SMRR. base = 0x7b000006, mask=0xff800800
433 07:14:41.598911 Relocation complete.
434 07:14:41.599462 Initializing CPU #0
435 07:14:41.602702 CPU: vendor Intel device 906c0
436 07:14:41.605562 CPU: family 06, model 9c, stepping 00
437 07:14:41.608893 Clearing out pending MCEs
438 07:14:41.611992 Setting up local APIC...
439 07:14:41.615212 apic_id: 0x00 done.
440 07:14:41.618414 Turbo is available but hidden
441 07:14:41.622188 Turbo is available and visible
442 07:14:41.625255 microcode: Update skipped, already up-to-date
443 07:14:41.628466 CPU #0 initialized
444 07:14:41.628914 Initializing CPU #1
445 07:14:41.632439 CPU: vendor Intel device 906c0
446 07:14:41.635118 CPU: family 06, model 9c, stepping 00
447 07:14:41.638689 Clearing out pending MCEs
448 07:14:41.641697 Setting up local APIC...
449 07:14:41.645618 apic_id: 0x02 done.
450 07:14:41.648645 microcode: Update skipped, already up-to-date
451 07:14:41.652128 CPU #1 initialized
452 07:14:41.655967 bsp_do_flight_plan done after 175 msecs.
453 07:14:41.658924 CPU: frequency set to 2800 MHz
454 07:14:41.659477 Enabling SMIs.
455 07:14:41.665527 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
456 07:14:41.676014 Probing TPM: done!
457 07:14:41.682206 Connected to device vid:did:rid of 1ae0:0028:00
458 07:14:41.692299 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
459 07:14:41.695632 Initialized TPM device CR50 revision 0
460 07:14:41.698809 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
461 07:14:41.706332 Found a VBT of 7680 bytes after decompression
462 07:14:41.712805 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
463 07:14:41.747281 Detected 2 core, 2 thread CPU.
464 07:14:41.750473 Detected 2 core, 2 thread CPU.
465 07:14:42.111849 Display FSP Version Info HOB
466 07:14:42.115494 Reference Code - CPU = 8.7.22.30
467 07:14:42.118966 uCode Version = 24.0.0.1f
468 07:14:42.121749 TXT ACM version = ff.ff.ff.ffff
469 07:14:42.125477 Reference Code - ME = 8.7.22.30
470 07:14:42.129141 MEBx version = 0.0.0.0
471 07:14:42.131802 ME Firmware Version = Consumer SKU
472 07:14:42.135393 Reference Code - PCH = 8.7.22.30
473 07:14:42.138611 PCH-CRID Status = Disabled
474 07:14:42.142636 PCH-CRID Original Value = ff.ff.ff.ffff
475 07:14:42.145064 PCH-CRID New Value = ff.ff.ff.ffff
476 07:14:42.148790 OPROM - RST - RAID = ff.ff.ff.ffff
477 07:14:42.152345 PCH Hsio Version = 4.0.0.0
478 07:14:42.154927 Reference Code - SA - System Agent = 8.7.22.30
479 07:14:42.158906 Reference Code - MRC = 0.0.4.68
480 07:14:42.161979 SA - PCIe Version = 8.7.22.30
481 07:14:42.165639 SA-CRID Status = Disabled
482 07:14:42.168425 SA-CRID Original Value = 0.0.0.0
483 07:14:42.171360 SA-CRID New Value = 0.0.0.0
484 07:14:42.175076 OPROM - VBIOS = ff.ff.ff.ffff
485 07:14:42.178679 IO Manageability Engine FW Version = ff.ff.ff.ffff
486 07:14:42.181701 PHY Build Version = ff.ff.ff.ffff
487 07:14:42.184770 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
488 07:14:42.191607 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
489 07:14:42.194971 ITSS IRQ Polarities Before:
490 07:14:42.197915 IPC0: 0xffffffff
491 07:14:42.198369 IPC1: 0xffffffff
492 07:14:42.201282 IPC2: 0xffffffff
493 07:14:42.201730 IPC3: 0xffffffff
494 07:14:42.204994 ITSS IRQ Polarities After:
495 07:14:42.208249 IPC0: 0xffffffff
496 07:14:42.208821 IPC1: 0xffffffff
497 07:14:42.211479 IPC2: 0xffffffff
498 07:14:42.212028 IPC3: 0xffffffff
499 07:14:42.225269 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
500 07:14:42.231682 BS: BS_DEV_INIT_CHIPS run times (exec / console): 403 / 156 ms
501 07:14:42.232243 Enumerating buses...
502 07:14:42.238281 Show all devs... Before device enumeration.
503 07:14:42.238844 Root Device: enabled 1
504 07:14:42.241400 CPU_CLUSTER: 0: enabled 1
505 07:14:42.245177 DOMAIN: 0000: enabled 1
506 07:14:42.248273 PCI: 00:00.0: enabled 1
507 07:14:42.248848 PCI: 00:02.0: enabled 1
508 07:14:42.251591 PCI: 00:04.0: enabled 1
509 07:14:42.254842 PCI: 00:05.0: enabled 1
510 07:14:42.258017 PCI: 00:09.0: enabled 0
511 07:14:42.258473 PCI: 00:12.6: enabled 0
512 07:14:42.261839 PCI: 00:14.0: enabled 1
513 07:14:42.264817 PCI: 00:14.1: enabled 0
514 07:14:42.268136 PCI: 00:14.2: enabled 0
515 07:14:42.268729 PCI: 00:14.3: enabled 1
516 07:14:42.271630 PCI: 00:14.5: enabled 1
517 07:14:42.274594 PCI: 00:15.0: enabled 1
518 07:14:42.275042 PCI: 00:15.1: enabled 1
519 07:14:42.278342 PCI: 00:15.2: enabled 1
520 07:14:42.281608 PCI: 00:15.3: enabled 1
521 07:14:42.284624 PCI: 00:16.0: enabled 1
522 07:14:42.285076 PCI: 00:16.1: enabled 0
523 07:14:42.287704 PCI: 00:16.4: enabled 0
524 07:14:42.291360 PCI: 00:16.5: enabled 0
525 07:14:42.294730 PCI: 00:17.0: enabled 0
526 07:14:42.295283 PCI: 00:19.0: enabled 1
527 07:14:42.297849 PCI: 00:19.1: enabled 0
528 07:14:42.301163 PCI: 00:19.2: enabled 1
529 07:14:42.301611 PCI: 00:1a.0: enabled 1
530 07:14:42.304960 PCI: 00:1c.0: enabled 0
531 07:14:42.307702 PCI: 00:1c.1: enabled 0
532 07:14:42.311041 PCI: 00:1c.2: enabled 0
533 07:14:42.311596 PCI: 00:1c.3: enabled 0
534 07:14:42.314336 PCI: 00:1c.4: enabled 0
535 07:14:42.317934 PCI: 00:1c.5: enabled 0
536 07:14:42.321281 PCI: 00:1c.6: enabled 0
537 07:14:42.321731 PCI: 00:1c.7: enabled 1
538 07:14:42.324831 PCI: 00:1e.0: enabled 0
539 07:14:42.328146 PCI: 00:1e.1: enabled 0
540 07:14:42.331208 PCI: 00:1e.2: enabled 1
541 07:14:42.331764 PCI: 00:1e.3: enabled 0
542 07:14:42.334598 PCI: 00:1f.0: enabled 1
543 07:14:42.338023 PCI: 00:1f.1: enabled 1
544 07:14:42.341458 PCI: 00:1f.2: enabled 1
545 07:14:42.342012 PCI: 00:1f.3: enabled 1
546 07:14:42.344764 PCI: 00:1f.4: enabled 0
547 07:14:42.347756 PCI: 00:1f.5: enabled 1
548 07:14:42.348307 PCI: 00:1f.7: enabled 0
549 07:14:42.350973 GENERIC: 0.0: enabled 1
550 07:14:42.354588 GENERIC: 0.0: enabled 1
551 07:14:42.357543 USB0 port 0: enabled 1
552 07:14:42.358099 GENERIC: 0.0: enabled 1
553 07:14:42.360995 I2C: 00:2c: enabled 1
554 07:14:42.364759 I2C: 00:15: enabled 1
555 07:14:42.365313 GENERIC: 0.0: enabled 0
556 07:14:42.367727 I2C: 00:15: enabled 1
557 07:14:42.371294 I2C: 00:10: enabled 0
558 07:14:42.371847 I2C: 00:10: enabled 0
559 07:14:42.373964 I2C: 00:2c: enabled 1
560 07:14:42.377704 I2C: 00:40: enabled 1
561 07:14:42.378258 I2C: 00:10: enabled 1
562 07:14:42.381086 I2C: 00:39: enabled 1
563 07:14:42.384468 I2C: 00:36: enabled 1
564 07:14:42.385018 I2C: 00:10: enabled 0
565 07:14:42.387947 I2C: 00:0c: enabled 1
566 07:14:42.391069 I2C: 00:50: enabled 1
567 07:14:42.394351 I2C: 00:1a: enabled 1
568 07:14:42.394911 I2C: 00:1a: enabled 0
569 07:14:42.397393 I2C: 00:1a: enabled 0
570 07:14:42.400888 I2C: 00:28: enabled 1
571 07:14:42.401438 I2C: 00:29: enabled 1
572 07:14:42.404458 PCI: 00:00.0: enabled 1
573 07:14:42.404996 SPI: 00: enabled 1
574 07:14:42.407440 PNP: 0c09.0: enabled 1
575 07:14:42.410522 GENERIC: 0.0: enabled 0
576 07:14:42.414344 USB2 port 0: enabled 1
577 07:14:42.414913 USB2 port 1: enabled 1
578 07:14:42.417186 USB2 port 2: enabled 1
579 07:14:42.420966 USB2 port 3: enabled 1
580 07:14:42.421414 USB2 port 4: enabled 0
581 07:14:42.423910 USB2 port 5: enabled 1
582 07:14:42.427485 USB2 port 6: enabled 0
583 07:14:42.431155 USB2 port 7: enabled 1
584 07:14:42.431701 USB3 port 0: enabled 1
585 07:14:42.434256 USB3 port 1: enabled 1
586 07:14:42.437486 USB3 port 2: enabled 1
587 07:14:42.438032 USB3 port 3: enabled 1
588 07:14:42.441014 APIC: 00: enabled 1
589 07:14:42.444200 APIC: 02: enabled 1
590 07:14:42.444791 Compare with tree...
591 07:14:42.447778 Root Device: enabled 1
592 07:14:42.450757 CPU_CLUSTER: 0: enabled 1
593 07:14:42.451319 APIC: 00: enabled 1
594 07:14:42.454484 APIC: 02: enabled 1
595 07:14:42.457142 DOMAIN: 0000: enabled 1
596 07:14:42.461222 PCI: 00:00.0: enabled 1
597 07:14:42.461766 PCI: 00:02.0: enabled 1
598 07:14:42.464144 PCI: 00:04.0: enabled 1
599 07:14:42.467797 GENERIC: 0.0: enabled 1
600 07:14:42.471422 PCI: 00:05.0: enabled 1
601 07:14:42.474121 GENERIC: 0.0: enabled 1
602 07:14:42.474611 PCI: 00:09.0: enabled 0
603 07:14:42.478208 PCI: 00:12.6: enabled 0
604 07:14:42.480889 PCI: 00:14.0: enabled 1
605 07:14:42.484201 USB0 port 0: enabled 1
606 07:14:42.487838 USB2 port 0: enabled 1
607 07:14:42.488426 USB2 port 1: enabled 1
608 07:14:42.490765 USB2 port 2: enabled 1
609 07:14:42.494147 USB2 port 3: enabled 1
610 07:14:42.497086 USB2 port 4: enabled 0
611 07:14:42.501177 USB2 port 5: enabled 1
612 07:14:42.503863 USB2 port 6: enabled 0
613 07:14:42.504462 USB2 port 7: enabled 1
614 07:14:42.507181 USB3 port 0: enabled 1
615 07:14:42.510510 USB3 port 1: enabled 1
616 07:14:42.513887 USB3 port 2: enabled 1
617 07:14:42.517007 USB3 port 3: enabled 1
618 07:14:42.517466 PCI: 00:14.1: enabled 0
619 07:14:42.520275 PCI: 00:14.2: enabled 0
620 07:14:42.523809 PCI: 00:14.3: enabled 1
621 07:14:42.527293 GENERIC: 0.0: enabled 1
622 07:14:42.530358 PCI: 00:14.5: enabled 1
623 07:14:42.530802 PCI: 00:15.0: enabled 1
624 07:14:42.533453 I2C: 00:2c: enabled 1
625 07:14:42.537212 I2C: 00:15: enabled 1
626 07:14:42.540119 PCI: 00:15.1: enabled 1
627 07:14:42.543617 PCI: 00:15.2: enabled 1
628 07:14:42.544157 GENERIC: 0.0: enabled 0
629 07:14:42.547552 I2C: 00:15: enabled 1
630 07:14:42.550729 I2C: 00:10: enabled 0
631 07:14:42.553361 I2C: 00:10: enabled 0
632 07:14:42.553813 I2C: 00:2c: enabled 1
633 07:14:42.557397 I2C: 00:40: enabled 1
634 07:14:42.560376 I2C: 00:10: enabled 1
635 07:14:42.563645 I2C: 00:39: enabled 1
636 07:14:42.567308 PCI: 00:15.3: enabled 1
637 07:14:42.567847 I2C: 00:36: enabled 1
638 07:14:42.570286 I2C: 00:10: enabled 0
639 07:14:42.573276 I2C: 00:0c: enabled 1
640 07:14:42.576801 I2C: 00:50: enabled 1
641 07:14:42.577242 PCI: 00:16.0: enabled 1
642 07:14:42.580157 PCI: 00:16.1: enabled 0
643 07:14:42.584154 PCI: 00:16.4: enabled 0
644 07:14:42.587250 PCI: 00:16.5: enabled 0
645 07:14:42.590710 PCI: 00:17.0: enabled 0
646 07:14:42.591245 PCI: 00:19.0: enabled 1
647 07:14:42.593195 I2C: 00:1a: enabled 1
648 07:14:42.597042 I2C: 00:1a: enabled 0
649 07:14:42.600526 I2C: 00:1a: enabled 0
650 07:14:42.601066 I2C: 00:28: enabled 1
651 07:14:42.603722 I2C: 00:29: enabled 1
652 07:14:42.606665 PCI: 00:19.1: enabled 0
653 07:14:42.610280 PCI: 00:19.2: enabled 1
654 07:14:42.613354 PCI: 00:1a.0: enabled 1
655 07:14:42.613854 PCI: 00:1e.0: enabled 0
656 07:14:42.616806 PCI: 00:1e.1: enabled 0
657 07:14:42.619789 PCI: 00:1e.2: enabled 1
658 07:14:42.623439 SPI: 00: enabled 1
659 07:14:42.623889 PCI: 00:1e.3: enabled 0
660 07:14:42.626263 PCI: 00:1f.0: enabled 1
661 07:14:42.630028 PNP: 0c09.0: enabled 1
662 07:14:42.633283 PCI: 00:1f.1: enabled 1
663 07:14:42.636505 PCI: 00:1f.2: enabled 1
664 07:14:42.637099 PCI: 00:1f.3: enabled 1
665 07:14:42.639898 GENERIC: 0.0: enabled 0
666 07:14:42.643438 PCI: 00:1f.4: enabled 0
667 07:14:42.646598 PCI: 00:1f.5: enabled 1
668 07:14:42.650048 PCI: 00:1f.7: enabled 0
669 07:14:42.650645 Root Device scanning...
670 07:14:42.653011 scan_static_bus for Root Device
671 07:14:42.656660 CPU_CLUSTER: 0 enabled
672 07:14:42.659899 DOMAIN: 0000 enabled
673 07:14:42.660548 DOMAIN: 0000 scanning...
674 07:14:42.663420 PCI: pci_scan_bus for bus 00
675 07:14:42.666812 PCI: 00:00.0 [8086/0000] ops
676 07:14:42.670250 PCI: 00:00.0 [8086/4e22] enabled
677 07:14:42.673267 PCI: 00:02.0 [8086/0000] bus ops
678 07:14:42.676692 PCI: 00:02.0 [8086/4e55] enabled
679 07:14:42.680232 PCI: 00:04.0 [8086/0000] bus ops
680 07:14:42.683249 PCI: 00:04.0 [8086/4e03] enabled
681 07:14:42.686716 PCI: 00:05.0 [8086/0000] bus ops
682 07:14:42.690074 PCI: 00:05.0 [8086/4e19] enabled
683 07:14:42.693472 PCI: 00:08.0 [8086/4e11] enabled
684 07:14:42.696838 PCI: 00:14.0 [8086/0000] bus ops
685 07:14:42.700214 PCI: 00:14.0 [8086/4ded] enabled
686 07:14:42.703611 PCI: 00:14.2 [8086/4def] disabled
687 07:14:42.706890 PCI: 00:14.3 [8086/0000] bus ops
688 07:14:42.709794 PCI: 00:14.3 [8086/4df0] enabled
689 07:14:42.713388 PCI: 00:14.5 [8086/0000] ops
690 07:14:42.716506 PCI: 00:14.5 [8086/4df8] enabled
691 07:14:42.719734 PCI: 00:15.0 [8086/0000] bus ops
692 07:14:42.722944 PCI: 00:15.0 [8086/4de8] enabled
693 07:14:42.726426 PCI: 00:15.1 [8086/0000] bus ops
694 07:14:42.730009 PCI: 00:15.1 [8086/4de9] enabled
695 07:14:42.733244 PCI: 00:15.2 [8086/0000] bus ops
696 07:14:42.736064 PCI: 00:15.2 [8086/4dea] enabled
697 07:14:42.739562 PCI: 00:15.3 [8086/0000] bus ops
698 07:14:42.743144 PCI: 00:15.3 [8086/4deb] enabled
699 07:14:42.746068 PCI: 00:16.0 [8086/0000] ops
700 07:14:42.749910 PCI: 00:16.0 [8086/4de0] enabled
701 07:14:42.752781 PCI: 00:19.0 [8086/0000] bus ops
702 07:14:42.756339 PCI: 00:19.0 [8086/4dc5] enabled
703 07:14:42.759782 PCI: 00:19.2 [8086/0000] ops
704 07:14:42.762947 PCI: 00:19.2 [8086/4dc7] enabled
705 07:14:42.766107 PCI: 00:1a.0 [8086/0000] ops
706 07:14:42.769626 PCI: 00:1a.0 [8086/4dc4] enabled
707 07:14:42.773261 PCI: 00:1e.0 [8086/0000] ops
708 07:14:42.776254 PCI: 00:1e.0 [8086/4da8] disabled
709 07:14:42.779725 PCI: 00:1e.2 [8086/0000] bus ops
710 07:14:42.783100 PCI: 00:1e.2 [8086/4daa] enabled
711 07:14:42.786153 PCI: 00:1f.0 [8086/0000] bus ops
712 07:14:42.789690 PCI: 00:1f.0 [8086/4d87] enabled
713 07:14:42.792536 PCI: Static device PCI: 00:1f.1 not found, disabling it.
714 07:14:42.796127 RTC Init
715 07:14:42.799730 Set power on after power failure.
716 07:14:42.800283 Disabling Deep S3
717 07:14:42.802833 Disabling Deep S3
718 07:14:42.803433 Disabling Deep S4
719 07:14:42.806329 Disabling Deep S4
720 07:14:42.806925 Disabling Deep S5
721 07:14:42.809789 Disabling Deep S5
722 07:14:42.812841 PCI: 00:1f.2 [0000/0000] hidden
723 07:14:42.815851 PCI: 00:1f.3 [8086/0000] bus ops
724 07:14:42.819432 PCI: 00:1f.3 [8086/4dc8] enabled
725 07:14:42.822616 PCI: 00:1f.5 [8086/0000] bus ops
726 07:14:42.826334 PCI: 00:1f.5 [8086/4da4] enabled
727 07:14:42.829327 PCI: Leftover static devices:
728 07:14:42.829789 PCI: 00:12.6
729 07:14:42.832533 PCI: 00:09.0
730 07:14:42.832992 PCI: 00:14.1
731 07:14:42.835991 PCI: 00:16.1
732 07:14:42.836588 PCI: 00:16.4
733 07:14:42.837054 PCI: 00:16.5
734 07:14:42.839807 PCI: 00:17.0
735 07:14:42.840392 PCI: 00:19.1
736 07:14:42.842756 PCI: 00:1e.1
737 07:14:42.843316 PCI: 00:1e.3
738 07:14:42.843781 PCI: 00:1f.1
739 07:14:42.845808 PCI: 00:1f.4
740 07:14:42.846268 PCI: 00:1f.7
741 07:14:42.849377 PCI: Check your devicetree.cb.
742 07:14:42.852957 PCI: 00:02.0 scanning...
743 07:14:42.856094 scan_generic_bus for PCI: 00:02.0
744 07:14:42.859824 scan_generic_bus for PCI: 00:02.0 done
745 07:14:42.865827 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
746 07:14:42.866391 PCI: 00:04.0 scanning...
747 07:14:42.869114 scan_generic_bus for PCI: 00:04.0
748 07:14:42.873150 GENERIC: 0.0 enabled
749 07:14:42.879592 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
750 07:14:42.882851 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
751 07:14:42.886318 PCI: 00:05.0 scanning...
752 07:14:42.889449 scan_generic_bus for PCI: 00:05.0
753 07:14:42.892931 GENERIC: 0.0 enabled
754 07:14:42.899408 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
755 07:14:42.902937 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
756 07:14:42.905731 PCI: 00:14.0 scanning...
757 07:14:42.909704 scan_static_bus for PCI: 00:14.0
758 07:14:42.910237 USB0 port 0 enabled
759 07:14:42.912674 USB0 port 0 scanning...
760 07:14:42.916083 scan_static_bus for USB0 port 0
761 07:14:42.919293 USB2 port 0 enabled
762 07:14:42.919833 USB2 port 1 enabled
763 07:14:42.923133 USB2 port 2 enabled
764 07:14:42.926402 USB2 port 3 enabled
765 07:14:42.926988 USB2 port 4 disabled
766 07:14:42.929699 USB2 port 5 enabled
767 07:14:42.932674 USB2 port 6 disabled
768 07:14:42.933164 USB2 port 7 enabled
769 07:14:42.935644 USB3 port 0 enabled
770 07:14:42.936084 USB3 port 1 enabled
771 07:14:42.939307 USB3 port 2 enabled
772 07:14:42.942484 USB3 port 3 enabled
773 07:14:42.943032 USB2 port 0 scanning...
774 07:14:42.945829 scan_static_bus for USB2 port 0
775 07:14:42.952386 scan_static_bus for USB2 port 0 done
776 07:14:42.955555 scan_bus: bus USB2 port 0 finished in 6 msecs
777 07:14:42.959085 USB2 port 1 scanning...
778 07:14:42.962149 scan_static_bus for USB2 port 1
779 07:14:42.965654 scan_static_bus for USB2 port 1 done
780 07:14:42.968748 scan_bus: bus USB2 port 1 finished in 6 msecs
781 07:14:42.972369 USB2 port 2 scanning...
782 07:14:42.975552 scan_static_bus for USB2 port 2
783 07:14:42.978841 scan_static_bus for USB2 port 2 done
784 07:14:42.982523 scan_bus: bus USB2 port 2 finished in 6 msecs
785 07:14:42.985927 USB2 port 3 scanning...
786 07:14:42.989278 scan_static_bus for USB2 port 3
787 07:14:42.992415 scan_static_bus for USB2 port 3 done
788 07:14:42.999101 scan_bus: bus USB2 port 3 finished in 6 msecs
789 07:14:42.999689 USB2 port 5 scanning...
790 07:14:43.002622 scan_static_bus for USB2 port 5
791 07:14:43.008901 scan_static_bus for USB2 port 5 done
792 07:14:43.012357 scan_bus: bus USB2 port 5 finished in 6 msecs
793 07:14:43.015528 USB2 port 7 scanning...
794 07:14:43.019260 scan_static_bus for USB2 port 7
795 07:14:43.021934 scan_static_bus for USB2 port 7 done
796 07:14:43.025399 scan_bus: bus USB2 port 7 finished in 6 msecs
797 07:14:43.028507 USB3 port 0 scanning...
798 07:14:43.032275 scan_static_bus for USB3 port 0
799 07:14:43.035819 scan_static_bus for USB3 port 0 done
800 07:14:43.038777 scan_bus: bus USB3 port 0 finished in 6 msecs
801 07:14:43.041631 USB3 port 1 scanning...
802 07:14:43.045203 scan_static_bus for USB3 port 1
803 07:14:43.048540 scan_static_bus for USB3 port 1 done
804 07:14:43.055242 scan_bus: bus USB3 port 1 finished in 6 msecs
805 07:14:43.055817 USB3 port 2 scanning...
806 07:14:43.058645 scan_static_bus for USB3 port 2
807 07:14:43.064926 scan_static_bus for USB3 port 2 done
808 07:14:43.068448 scan_bus: bus USB3 port 2 finished in 6 msecs
809 07:14:43.071948 USB3 port 3 scanning...
810 07:14:43.075134 scan_static_bus for USB3 port 3
811 07:14:43.078403 scan_static_bus for USB3 port 3 done
812 07:14:43.081864 scan_bus: bus USB3 port 3 finished in 6 msecs
813 07:14:43.085223 scan_static_bus for USB0 port 0 done
814 07:14:43.091980 scan_bus: bus USB0 port 0 finished in 172 msecs
815 07:14:43.095620 scan_static_bus for PCI: 00:14.0 done
816 07:14:43.098511 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
817 07:14:43.102288 PCI: 00:14.3 scanning...
818 07:14:43.105118 scan_static_bus for PCI: 00:14.3
819 07:14:43.108109 GENERIC: 0.0 enabled
820 07:14:43.111609 scan_static_bus for PCI: 00:14.3 done
821 07:14:43.114855 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
822 07:14:43.118377 PCI: 00:15.0 scanning...
823 07:14:43.121524 scan_static_bus for PCI: 00:15.0
824 07:14:43.124961 I2C: 00:2c enabled
825 07:14:43.125403 I2C: 00:15 enabled
826 07:14:43.128544 scan_static_bus for PCI: 00:15.0 done
827 07:14:43.135181 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
828 07:14:43.138467 PCI: 00:15.1 scanning...
829 07:14:43.141646 scan_static_bus for PCI: 00:15.1
830 07:14:43.145152 scan_static_bus for PCI: 00:15.1 done
831 07:14:43.148639 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
832 07:14:43.152148 PCI: 00:15.2 scanning...
833 07:14:43.155030 scan_static_bus for PCI: 00:15.2
834 07:14:43.158115 GENERIC: 0.0 disabled
835 07:14:43.158707 I2C: 00:15 enabled
836 07:14:43.161552 I2C: 00:10 disabled
837 07:14:43.164961 I2C: 00:10 disabled
838 07:14:43.165406 I2C: 00:2c enabled
839 07:14:43.169152 I2C: 00:40 enabled
840 07:14:43.169752 I2C: 00:10 enabled
841 07:14:43.171827 I2C: 00:39 enabled
842 07:14:43.174985 scan_static_bus for PCI: 00:15.2 done
843 07:14:43.178118 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
844 07:14:43.181795 PCI: 00:15.3 scanning...
845 07:14:43.184889 scan_static_bus for PCI: 00:15.3
846 07:14:43.188166 I2C: 00:36 enabled
847 07:14:43.188633 I2C: 00:10 disabled
848 07:14:43.191968 I2C: 00:0c enabled
849 07:14:43.194652 I2C: 00:50 enabled
850 07:14:43.198626 scan_static_bus for PCI: 00:15.3 done
851 07:14:43.201921 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
852 07:14:43.204928 PCI: 00:19.0 scanning...
853 07:14:43.208203 scan_static_bus for PCI: 00:19.0
854 07:14:43.211873 I2C: 00:1a enabled
855 07:14:43.212450 I2C: 00:1a disabled
856 07:14:43.214723 I2C: 00:1a disabled
857 07:14:43.215273 I2C: 00:28 enabled
858 07:14:43.217866 I2C: 00:29 enabled
859 07:14:43.221212 scan_static_bus for PCI: 00:19.0 done
860 07:14:43.228229 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
861 07:14:43.228812 PCI: 00:1e.2 scanning...
862 07:14:43.231817 scan_generic_bus for PCI: 00:1e.2
863 07:14:43.234927 SPI: 00 enabled
864 07:14:43.241185 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
865 07:14:43.244617 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
866 07:14:43.248095 PCI: 00:1f.0 scanning...
867 07:14:43.251486 scan_static_bus for PCI: 00:1f.0
868 07:14:43.254676 PNP: 0c09.0 enabled
869 07:14:43.255335 PNP: 0c09.0 scanning...
870 07:14:43.258076 scan_static_bus for PNP: 0c09.0
871 07:14:43.264580 scan_static_bus for PNP: 0c09.0 done
872 07:14:43.268129 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
873 07:14:43.271240 scan_static_bus for PCI: 00:1f.0 done
874 07:14:43.277691 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
875 07:14:43.278298 PCI: 00:1f.3 scanning...
876 07:14:43.281194 scan_static_bus for PCI: 00:1f.3
877 07:14:43.284932 GENERIC: 0.0 disabled
878 07:14:43.287586 scan_static_bus for PCI: 00:1f.3 done
879 07:14:43.294454 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
880 07:14:43.294969 PCI: 00:1f.5 scanning...
881 07:14:43.298241 scan_generic_bus for PCI: 00:1f.5
882 07:14:43.304418 scan_generic_bus for PCI: 00:1f.5 done
883 07:14:43.307879 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
884 07:14:43.311145 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
885 07:14:43.317513 scan_static_bus for Root Device done
886 07:14:43.321259 scan_bus: bus Root Device finished in 665 msecs
887 07:14:43.321803 done
888 07:14:43.327737 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1085 ms
889 07:14:43.331215 Chrome EC: UHEPI supported
890 07:14:43.337812 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
891 07:14:43.344506 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
892 07:14:43.347826 SPI flash protection: WPSW=0 SRP0=1
893 07:14:43.351153 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
894 07:14:43.357235 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
895 07:14:43.361307 found VGA at PCI: 00:02.0
896 07:14:43.364237 Setting up VGA for PCI: 00:02.0
897 07:14:43.367421 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
898 07:14:43.374200 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
899 07:14:43.374815 Allocating resources...
900 07:14:43.377138 Reading resources...
901 07:14:43.380434 Root Device read_resources bus 0 link: 0
902 07:14:43.387259 CPU_CLUSTER: 0 read_resources bus 0 link: 0
903 07:14:43.391007 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
904 07:14:43.397223 DOMAIN: 0000 read_resources bus 0 link: 0
905 07:14:43.400677 PCI: 00:04.0 read_resources bus 1 link: 0
906 07:14:43.407638 PCI: 00:04.0 read_resources bus 1 link: 0 done
907 07:14:43.410629 PCI: 00:05.0 read_resources bus 2 link: 0
908 07:14:43.414361 PCI: 00:05.0 read_resources bus 2 link: 0 done
909 07:14:43.421340 PCI: 00:14.0 read_resources bus 0 link: 0
910 07:14:43.424227 USB0 port 0 read_resources bus 0 link: 0
911 07:14:43.431334 USB0 port 0 read_resources bus 0 link: 0 done
912 07:14:43.435292 PCI: 00:14.0 read_resources bus 0 link: 0 done
913 07:14:43.441562 PCI: 00:14.3 read_resources bus 0 link: 0
914 07:14:43.444878 PCI: 00:14.3 read_resources bus 0 link: 0 done
915 07:14:43.451549 PCI: 00:15.0 read_resources bus 0 link: 0
916 07:14:43.503543 PCI: 00:15.0 read_resources bus 0 link: 0 done
917 07:14:43.504214 PCI: 00:15.2 read_resources bus 0 link: 0
918 07:14:43.504723 PCI: 00:15.2 read_resources bus 0 link: 0 done
919 07:14:43.505155 PCI: 00:15.3 read_resources bus 0 link: 0
920 07:14:43.505919 PCI: 00:15.3 read_resources bus 0 link: 0 done
921 07:14:43.506304 PCI: 00:19.0 read_resources bus 0 link: 0
922 07:14:43.506649 PCI: 00:19.0 read_resources bus 0 link: 0 done
923 07:14:43.507000 PCI: 00:1e.2 read_resources bus 3 link: 0
924 07:14:43.507445 PCI: 00:1e.2 read_resources bus 3 link: 0 done
925 07:14:43.507786 PCI: 00:1f.0 read_resources bus 0 link: 0
926 07:14:43.508491 PCI: 00:1f.0 read_resources bus 0 link: 0 done
927 07:14:43.511033 PCI: 00:1f.3 read_resources bus 0 link: 0
928 07:14:43.514186 PCI: 00:1f.3 read_resources bus 0 link: 0 done
929 07:14:43.517457 DOMAIN: 0000 read_resources bus 0 link: 0 done
930 07:14:43.524159 Root Device read_resources bus 0 link: 0 done
931 07:14:43.527855 Done reading resources.
932 07:14:43.531222 Show resources in subtree (Root Device)...After reading.
933 07:14:43.538671 Root Device child on link 0 CPU_CLUSTER: 0
934 07:14:43.541377 CPU_CLUSTER: 0 child on link 0 APIC: 00
935 07:14:43.541960 APIC: 00
936 07:14:43.544633 APIC: 02
937 07:14:43.548002 DOMAIN: 0000 child on link 0 PCI: 00:00.0
938 07:14:43.557831 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
939 07:14:43.568006 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
940 07:14:43.568678 PCI: 00:00.0
941 07:14:43.577642 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
942 07:14:43.587760 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
943 07:14:43.597532 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
944 07:14:43.607373 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
945 07:14:43.613967 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
946 07:14:43.624430 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
947 07:14:43.634133 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
948 07:14:43.644585 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
949 07:14:43.654825 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
950 07:14:43.660658 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
951 07:14:43.670572 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
952 07:14:43.680168 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
953 07:14:43.690769 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
954 07:14:43.697438 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
955 07:14:43.707293 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
956 07:14:43.717777 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
957 07:14:43.728011 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
958 07:14:43.737270 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
959 07:14:43.747304 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
960 07:14:43.747895 PCI: 00:02.0
961 07:14:43.757133 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 07:14:43.766877 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
963 07:14:43.777095 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
964 07:14:43.780009 PCI: 00:04.0 child on link 0 GENERIC: 0.0
965 07:14:43.790014 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
966 07:14:43.793725 GENERIC: 0.0
967 07:14:43.797161 PCI: 00:05.0 child on link 0 GENERIC: 0.0
968 07:14:43.806925 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
969 07:14:43.810643 GENERIC: 0.0
970 07:14:43.811241 PCI: 00:08.0
971 07:14:43.819898 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 07:14:43.826527 PCI: 00:14.0 child on link 0 USB0 port 0
973 07:14:43.836143 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
974 07:14:43.839818 USB0 port 0 child on link 0 USB2 port 0
975 07:14:43.843177 USB2 port 0
976 07:14:43.843769 USB2 port 1
977 07:14:43.846648 USB2 port 2
978 07:14:43.847245 USB2 port 3
979 07:14:43.849838 USB2 port 4
980 07:14:43.850434 USB2 port 5
981 07:14:43.853047 USB2 port 6
982 07:14:43.853632 USB2 port 7
983 07:14:43.856399 USB3 port 0
984 07:14:43.856981 USB3 port 1
985 07:14:43.859774 USB3 port 2
986 07:14:43.860390 USB3 port 3
987 07:14:43.862940 PCI: 00:14.2
988 07:14:43.865960 PCI: 00:14.3 child on link 0 GENERIC: 0.0
989 07:14:43.876272 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
990 07:14:43.879831 GENERIC: 0.0
991 07:14:43.880531 PCI: 00:14.5
992 07:14:43.889528 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 07:14:43.896451 PCI: 00:15.0 child on link 0 I2C: 00:2c
994 07:14:43.905763 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 07:14:43.906353 I2C: 00:2c
996 07:14:43.906748 I2C: 00:15
997 07:14:43.909291 PCI: 00:15.1
998 07:14:43.919388 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 07:14:43.922799 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1000 07:14:43.932627 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1001 07:14:43.936226 GENERIC: 0.0
1002 07:14:43.936873 I2C: 00:15
1003 07:14:43.938994 I2C: 00:10
1004 07:14:43.939582 I2C: 00:10
1005 07:14:43.942506 I2C: 00:2c
1006 07:14:43.943124 I2C: 00:40
1007 07:14:43.946339 I2C: 00:10
1008 07:14:43.946924 I2C: 00:39
1009 07:14:43.948887 PCI: 00:15.3 child on link 0 I2C: 00:36
1010 07:14:43.959175 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 07:14:43.962787 I2C: 00:36
1012 07:14:43.963369 I2C: 00:10
1013 07:14:43.965988 I2C: 00:0c
1014 07:14:43.966573 I2C: 00:50
1015 07:14:43.969277 PCI: 00:16.0
1016 07:14:43.979580 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 07:14:43.982623 PCI: 00:19.0 child on link 0 I2C: 00:1a
1018 07:14:43.992664 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1019 07:14:43.993257 I2C: 00:1a
1020 07:14:43.996478 I2C: 00:1a
1021 07:14:43.997056 I2C: 00:1a
1022 07:14:43.999054 I2C: 00:28
1023 07:14:43.999640 I2C: 00:29
1024 07:14:44.002845 PCI: 00:19.2
1025 07:14:44.012383 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1026 07:14:44.022641 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1027 07:14:44.025544 PCI: 00:1a.0
1028 07:14:44.035533 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 07:14:44.036120 PCI: 00:1e.0
1030 07:14:44.039037 PCI: 00:1e.2 child on link 0 SPI: 00
1031 07:14:44.048640 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 07:14:44.051947 SPI: 00
1033 07:14:44.055672 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1034 07:14:44.065366 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1035 07:14:44.066054 PNP: 0c09.0
1036 07:14:44.075587 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1037 07:14:44.076189 PCI: 00:1f.2
1038 07:14:44.085920 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1039 07:14:44.095312 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1040 07:14:44.098684 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1041 07:14:44.108495 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1042 07:14:44.118406 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1043 07:14:44.121413 GENERIC: 0.0
1044 07:14:44.121890 PCI: 00:1f.5
1045 07:14:44.131592 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 07:14:44.138318 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1047 07:14:44.148267 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1048 07:14:44.151593 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 07:14:44.161436 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1050 07:14:44.168007 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1051 07:14:44.174773 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1052 07:14:44.178120 DOMAIN: 0000: Resource ranges:
1053 07:14:44.181450 * Base: 1000, Size: 800, Tag: 100
1054 07:14:44.184627 * Base: 1900, Size: e700, Tag: 100
1055 07:14:44.191530 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1056 07:14:44.198731 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1057 07:14:44.205017 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1058 07:14:44.211665 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1059 07:14:44.221155 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1060 07:14:44.228198 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1061 07:14:44.234592 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1062 07:14:44.244544 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1063 07:14:44.251212 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1064 07:14:44.257605 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1065 07:14:44.267450 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1066 07:14:44.274355 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1067 07:14:44.280992 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1068 07:14:44.287509 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1069 07:14:44.298219 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1070 07:14:44.304547 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1071 07:14:44.311116 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1072 07:14:44.321003 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1073 07:14:44.327568 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1074 07:14:44.334430 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1075 07:14:44.344389 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1076 07:14:44.351017 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1077 07:14:44.357633 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1078 07:14:44.367345 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1079 07:14:44.371372 DOMAIN: 0000: Resource ranges:
1080 07:14:44.374315 * Base: 7fc00000, Size: 40400000, Tag: 200
1081 07:14:44.377749 * Base: d0000000, Size: 2b000000, Tag: 200
1082 07:14:44.381273 * Base: fb001000, Size: 2fff000, Tag: 200
1083 07:14:44.387906 * Base: fe010000, Size: 22000, Tag: 200
1084 07:14:44.391688 * Base: fe033000, Size: a4d000, Tag: 200
1085 07:14:44.394415 * Base: fea88000, Size: 2f8000, Tag: 200
1086 07:14:44.397649 * Base: fed88000, Size: 8000, Tag: 200
1087 07:14:44.404859 * Base: fed93000, Size: d000, Tag: 200
1088 07:14:44.407719 * Base: feda2000, Size: 125e000, Tag: 200
1089 07:14:44.411449 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1090 07:14:44.417733 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1091 07:14:44.424505 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1092 07:14:44.430838 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1093 07:14:44.438296 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1094 07:14:44.444479 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1095 07:14:44.451310 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1096 07:14:44.457886 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1097 07:14:44.464465 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1098 07:14:44.471064 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1099 07:14:44.477378 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1100 07:14:44.484164 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1101 07:14:44.491051 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1102 07:14:44.497655 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1103 07:14:44.504179 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1104 07:14:44.511145 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1105 07:14:44.517675 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1106 07:14:44.524080 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1107 07:14:44.530921 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1108 07:14:44.537794 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1109 07:14:44.544420 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1110 07:14:44.551062 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1111 07:14:44.561218 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1112 07:14:44.563906 Root Device assign_resources, bus 0 link: 0
1113 07:14:44.567757 DOMAIN: 0000 assign_resources, bus 0 link: 0
1114 07:14:44.577678 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1115 07:14:44.583968 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1116 07:14:44.593876 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1117 07:14:44.600817 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1118 07:14:44.604117 PCI: 00:04.0 assign_resources, bus 1 link: 0
1119 07:14:44.610213 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 07:14:44.617211 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1121 07:14:44.624348 PCI: 00:05.0 assign_resources, bus 2 link: 0
1122 07:14:44.627179 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 07:14:44.634400 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1124 07:14:44.643894 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1125 07:14:44.647153 PCI: 00:14.0 assign_resources, bus 0 link: 0
1126 07:14:44.653707 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 07:14:44.660363 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1128 07:14:44.666989 PCI: 00:14.3 assign_resources, bus 0 link: 0
1129 07:14:44.669758 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 07:14:44.676968 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1131 07:14:44.686610 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1132 07:14:44.690115 PCI: 00:15.0 assign_resources, bus 0 link: 0
1133 07:14:44.696565 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 07:14:44.703015 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1135 07:14:44.712929 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1136 07:14:44.716250 PCI: 00:15.2 assign_resources, bus 0 link: 0
1137 07:14:44.719741 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 07:14:44.729628 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1139 07:14:44.732992 PCI: 00:15.3 assign_resources, bus 0 link: 0
1140 07:14:44.736241 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 07:14:44.746617 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1142 07:14:44.753233 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1143 07:14:44.760165 PCI: 00:19.0 assign_resources, bus 0 link: 0
1144 07:14:44.763041 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 07:14:44.772907 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1146 07:14:44.779865 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1147 07:14:44.789886 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1148 07:14:44.792919 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1149 07:14:44.796486 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 07:14:44.802567 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1151 07:14:44.806012 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 07:14:44.812255 LPC: Trying to open IO window from 800 size 1ff
1153 07:14:44.819029 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1154 07:14:44.828821 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1155 07:14:44.832265 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1156 07:14:44.835746 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 07:14:44.845734 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1158 07:14:44.848824 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 07:14:44.852662 Root Device assign_resources, bus 0 link: 0
1160 07:14:44.855856 Done setting resources.
1161 07:14:44.862413 Show resources in subtree (Root Device)...After assigning values.
1162 07:14:44.869100 Root Device child on link 0 CPU_CLUSTER: 0
1163 07:14:44.872013 CPU_CLUSTER: 0 child on link 0 APIC: 00
1164 07:14:44.872663 APIC: 00
1165 07:14:44.875652 APIC: 02
1166 07:14:44.878707 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1167 07:14:44.888670 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1168 07:14:44.898839 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1169 07:14:44.899440 PCI: 00:00.0
1170 07:14:44.908594 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1171 07:14:44.918358 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1172 07:14:44.927969 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1173 07:14:44.938236 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1174 07:14:44.944662 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1175 07:14:44.954756 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1176 07:14:44.964997 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1177 07:14:44.975047 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1178 07:14:44.984772 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1179 07:14:44.991550 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1180 07:14:45.001238 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1181 07:14:45.011177 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1182 07:14:45.021253 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1183 07:14:45.030604 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1184 07:14:45.037475 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1185 07:14:45.047496 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1186 07:14:45.057144 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1187 07:14:45.067249 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1188 07:14:45.077643 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1189 07:14:45.078236 PCI: 00:02.0
1190 07:14:45.090737 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1191 07:14:45.100938 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1192 07:14:45.110272 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1193 07:14:45.113674 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 07:14:45.123423 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1195 07:14:45.126785 GENERIC: 0.0
1196 07:14:45.130183 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1197 07:14:45.139995 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1198 07:14:45.143501 GENERIC: 0.0
1199 07:14:45.144103 PCI: 00:08.0
1200 07:14:45.153288 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1201 07:14:45.159935 PCI: 00:14.0 child on link 0 USB0 port 0
1202 07:14:45.170297 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1203 07:14:45.173046 USB0 port 0 child on link 0 USB2 port 0
1204 07:14:45.176524 USB2 port 0
1205 07:14:45.177019 USB2 port 1
1206 07:14:45.180461 USB2 port 2
1207 07:14:45.181055 USB2 port 3
1208 07:14:45.183211 USB2 port 4
1209 07:14:45.183805 USB2 port 5
1210 07:14:45.187047 USB2 port 6
1211 07:14:45.187827 USB2 port 7
1212 07:14:45.190105 USB3 port 0
1213 07:14:45.190705 USB3 port 1
1214 07:14:45.192800 USB3 port 2
1215 07:14:45.193295 USB3 port 3
1216 07:14:45.196559 PCI: 00:14.2
1217 07:14:45.199711 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 07:14:45.209506 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1219 07:14:45.213684 GENERIC: 0.0
1220 07:14:45.214281 PCI: 00:14.5
1221 07:14:45.225947 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1222 07:14:45.229525 PCI: 00:15.0 child on link 0 I2C: 00:2c
1223 07:14:45.239556 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1224 07:14:45.240149 I2C: 00:2c
1225 07:14:45.242618 I2C: 00:15
1226 07:14:45.243209 PCI: 00:15.1
1227 07:14:45.252536 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1228 07:14:45.259189 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1229 07:14:45.269047 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1230 07:14:45.269548 GENERIC: 0.0
1231 07:14:45.272518 I2C: 00:15
1232 07:14:45.272989 I2C: 00:10
1233 07:14:45.275970 I2C: 00:10
1234 07:14:45.276560 I2C: 00:2c
1235 07:14:45.279281 I2C: 00:40
1236 07:14:45.279839 I2C: 00:10
1237 07:14:45.282465 I2C: 00:39
1238 07:14:45.285575 PCI: 00:15.3 child on link 0 I2C: 00:36
1239 07:14:45.295350 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1240 07:14:45.299058 I2C: 00:36
1241 07:14:45.299521 I2C: 00:10
1242 07:14:45.302094 I2C: 00:0c
1243 07:14:45.302554 I2C: 00:50
1244 07:14:45.305448 PCI: 00:16.0
1245 07:14:45.315664 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1246 07:14:45.319125 PCI: 00:19.0 child on link 0 I2C: 00:1a
1247 07:14:45.328899 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1248 07:14:45.332524 I2C: 00:1a
1249 07:14:45.333119 I2C: 00:1a
1250 07:14:45.335692 I2C: 00:1a
1251 07:14:45.336290 I2C: 00:28
1252 07:14:45.336852 I2C: 00:29
1253 07:14:45.338748 PCI: 00:19.2
1254 07:14:45.348879 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 07:14:45.358529 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1256 07:14:45.361622 PCI: 00:1a.0
1257 07:14:45.371838 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1258 07:14:45.372373 PCI: 00:1e.0
1259 07:14:45.378402 PCI: 00:1e.2 child on link 0 SPI: 00
1260 07:14:45.388559 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1261 07:14:45.389098 SPI: 00
1262 07:14:45.391553 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1263 07:14:45.401907 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1264 07:14:45.405426 PNP: 0c09.0
1265 07:14:45.411636 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1266 07:14:45.415122 PCI: 00:1f.2
1267 07:14:45.424946 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1268 07:14:45.431604 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1269 07:14:45.438062 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1270 07:14:45.448058 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1271 07:14:45.457875 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1272 07:14:45.461201 GENERIC: 0.0
1273 07:14:45.461785 PCI: 00:1f.5
1274 07:14:45.471207 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1275 07:14:45.474796 Done allocating resources.
1276 07:14:45.480993 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2097 ms
1277 07:14:45.484416 Enabling resources...
1278 07:14:45.487698 PCI: 00:00.0 subsystem <- 8086/4e22
1279 07:14:45.491061 PCI: 00:00.0 cmd <- 06
1280 07:14:45.494410 PCI: 00:02.0 subsystem <- 8086/4e55
1281 07:14:45.494993 PCI: 00:02.0 cmd <- 03
1282 07:14:45.501088 PCI: 00:04.0 subsystem <- 8086/4e03
1283 07:14:45.501649 PCI: 00:04.0 cmd <- 02
1284 07:14:45.504186 PCI: 00:05.0 bridge ctrl <- 0003
1285 07:14:45.507312 PCI: 00:05.0 subsystem <- 8086/4e19
1286 07:14:45.510660 PCI: 00:05.0 cmd <- 02
1287 07:14:45.514424 PCI: 00:08.0 cmd <- 06
1288 07:14:45.517578 PCI: 00:14.0 subsystem <- 8086/4ded
1289 07:14:45.520929 PCI: 00:14.0 cmd <- 02
1290 07:14:45.524362 PCI: 00:14.3 subsystem <- 8086/4df0
1291 07:14:45.527291 PCI: 00:14.3 cmd <- 02
1292 07:14:45.530758 PCI: 00:14.5 subsystem <- 8086/4df8
1293 07:14:45.531247 PCI: 00:14.5 cmd <- 06
1294 07:14:45.537690 PCI: 00:15.0 subsystem <- 8086/4de8
1295 07:14:45.538271 PCI: 00:15.0 cmd <- 02
1296 07:14:45.541314 PCI: 00:15.1 subsystem <- 8086/4de9
1297 07:14:45.544426 PCI: 00:15.1 cmd <- 02
1298 07:14:45.547886 PCI: 00:15.2 subsystem <- 8086/4dea
1299 07:14:45.550933 PCI: 00:15.2 cmd <- 02
1300 07:14:45.554406 PCI: 00:15.3 subsystem <- 8086/4deb
1301 07:14:45.557960 PCI: 00:15.3 cmd <- 02
1302 07:14:45.560942 PCI: 00:16.0 subsystem <- 8086/4de0
1303 07:14:45.563939 PCI: 00:16.0 cmd <- 02
1304 07:14:45.567584 PCI: 00:19.0 subsystem <- 8086/4dc5
1305 07:14:45.568070 PCI: 00:19.0 cmd <- 02
1306 07:14:45.574127 PCI: 00:19.2 subsystem <- 8086/4dc7
1307 07:14:45.574701 PCI: 00:19.2 cmd <- 06
1308 07:14:45.577390 PCI: 00:1a.0 subsystem <- 8086/4dc4
1309 07:14:45.580547 PCI: 00:1a.0 cmd <- 06
1310 07:14:45.584117 PCI: 00:1e.2 subsystem <- 8086/4daa
1311 07:14:45.588070 PCI: 00:1e.2 cmd <- 06
1312 07:14:45.590698 PCI: 00:1f.0 subsystem <- 8086/4d87
1313 07:14:45.593831 PCI: 00:1f.0 cmd <- 407
1314 07:14:45.597092 PCI: 00:1f.3 subsystem <- 8086/4dc8
1315 07:14:45.600533 PCI: 00:1f.3 cmd <- 02
1316 07:14:45.603883 PCI: 00:1f.5 subsystem <- 8086/4da4
1317 07:14:45.607266 PCI: 00:1f.5 cmd <- 406
1318 07:14:45.610238 done.
1319 07:14:45.613846 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1320 07:14:45.617112 Initializing devices...
1321 07:14:45.620636 Root Device init
1322 07:14:45.621075 mainboard: EC init
1323 07:14:45.627312 Chrome EC: Set SMI mask to 0x0000000000000000
1324 07:14:45.630366 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1325 07:14:45.634065 ELOG: NV offset 0xbfa000 size 0x1000
1326 07:14:45.641730 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1327 07:14:45.648653 ELOG: Event(17) added with size 13 at 2023-03-12 07:14:45 UTC
1328 07:14:45.655083 ELOG: Event(91) added with size 10 at 2023-03-12 07:14:45 UTC
1329 07:14:45.662122 Chrome EC: clear events_b mask to 0x0000000000800000
1330 07:14:45.664997 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1331 07:14:45.672043 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1332 07:14:45.678232 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1333 07:14:45.681919 Chrome EC: Set WAKE mask to 0x0000000000000000
1334 07:14:45.688953 Root Device init finished in 64 msecs
1335 07:14:45.692102 PCI: 00:00.0 init
1336 07:14:45.692618 CPU TDP = 6 Watts
1337 07:14:45.695199 CPU PL1 = 7 Watts
1338 07:14:45.698717 CPU PL2 = 12 Watts
1339 07:14:45.702286 PCI: 00:00.0 init finished in 6 msecs
1340 07:14:45.702880 PCI: 00:02.0 init
1341 07:14:45.705882 GMA: Found VBT in CBFS
1342 07:14:45.708742 GMA: Found valid VBT in CBFS
1343 07:14:45.715530 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1344 07:14:45.722493 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1345 07:14:45.725503 PCI: 00:02.0 init finished in 18 msecs
1346 07:14:45.729093 PCI: 00:08.0 init
1347 07:14:45.732255 PCI: 00:08.0 init finished in 0 msecs
1348 07:14:45.735363 PCI: 00:14.0 init
1349 07:14:45.738727 XHCI: Updated LFPS sampling OFF time to 9 ms
1350 07:14:45.742337 PCI: 00:14.0 init finished in 4 msecs
1351 07:14:45.745347 PCI: 00:15.0 init
1352 07:14:45.748491 I2C bus 0 version 0x3230302a
1353 07:14:45.752210 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1354 07:14:45.755372 PCI: 00:15.0 init finished in 6 msecs
1355 07:14:45.758849 PCI: 00:15.1 init
1356 07:14:45.762176 I2C bus 1 version 0x3230302a
1357 07:14:45.765741 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1358 07:14:45.768961 PCI: 00:15.1 init finished in 6 msecs
1359 07:14:45.769568 PCI: 00:15.2 init
1360 07:14:45.771785 I2C bus 2 version 0x3230302a
1361 07:14:45.775260 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1362 07:14:45.782472 PCI: 00:15.2 init finished in 6 msecs
1363 07:14:45.783311 PCI: 00:15.3 init
1364 07:14:45.786780 I2C bus 3 version 0x3230302a
1365 07:14:45.790111 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1366 07:14:45.793959 PCI: 00:15.3 init finished in 6 msecs
1367 07:14:45.794454 PCI: 00:16.0 init
1368 07:14:45.800394 PCI: 00:16.0 init finished in 0 msecs
1369 07:14:45.800892 PCI: 00:19.0 init
1370 07:14:45.803948 I2C bus 4 version 0x3230302a
1371 07:14:45.806920 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1372 07:14:45.810550 PCI: 00:19.0 init finished in 6 msecs
1373 07:14:45.813920 PCI: 00:1a.0 init
1374 07:14:45.817062 PCI: 00:1a.0 init finished in 0 msecs
1375 07:14:45.820499 PCI: 00:1f.0 init
1376 07:14:45.824108 IOAPIC: Initializing IOAPIC at 0xfec00000
1377 07:14:45.830497 IOAPIC: Bootstrap Processor Local APIC = 0x00
1378 07:14:45.830947 IOAPIC: ID = 0x02
1379 07:14:45.834283 IOAPIC: Dumping registers
1380 07:14:45.836792 reg 0x0000: 0x02000000
1381 07:14:45.837327 reg 0x0001: 0x00770020
1382 07:14:45.840835 reg 0x0002: 0x00000000
1383 07:14:45.843759 PCI: 00:1f.0 init finished in 21 msecs
1384 07:14:45.847188 PCI: 00:1f.2 init
1385 07:14:45.850287 Disabling ACPI via APMC.
1386 07:14:46.541245 APMC done.
1387 07:14:46.544611 PCI: 00:1f.2 init finished in 693 msecs
1388 07:14:46.556674 PNP: 0c09.0 init
1389 07:14:46.566274 Google Chrome EC uptime: 7.306 seconds
1390 07:14:46.569586 Google Chrome AP resets since EC boot: 0
1391 07:14:46.572594 Google Chrome most recent AP reset causes:
1392 07:14:46.579610 Google Chrome EC reset flags at last EC boot: reset-pin
1393 07:14:46.582942 PNP: 0c09.0 init finished in 22 msecs
1394 07:14:46.585816 Devices initialized
1395 07:14:46.589406 Show all devs... After init.
1396 07:14:46.589903 Root Device: enabled 1
1397 07:14:46.592745 CPU_CLUSTER: 0: enabled 1
1398 07:14:46.596022 DOMAIN: 0000: enabled 1
1399 07:14:46.599287 PCI: 00:00.0: enabled 1
1400 07:14:46.599878 PCI: 00:02.0: enabled 1
1401 07:14:46.602614 PCI: 00:04.0: enabled 1
1402 07:14:46.605750 PCI: 00:05.0: enabled 1
1403 07:14:46.606249 PCI: 00:09.0: enabled 0
1404 07:14:46.609195 PCI: 00:12.6: enabled 0
1405 07:14:46.612751 PCI: 00:14.0: enabled 1
1406 07:14:46.616178 PCI: 00:14.1: enabled 0
1407 07:14:46.616770 PCI: 00:14.2: enabled 0
1408 07:14:46.619391 PCI: 00:14.3: enabled 1
1409 07:14:46.622624 PCI: 00:14.5: enabled 1
1410 07:14:46.626313 PCI: 00:15.0: enabled 1
1411 07:14:46.626891 PCI: 00:15.1: enabled 1
1412 07:14:46.629436 PCI: 00:15.2: enabled 1
1413 07:14:46.632818 PCI: 00:15.3: enabled 1
1414 07:14:46.636096 PCI: 00:16.0: enabled 1
1415 07:14:46.636718 PCI: 00:16.1: enabled 0
1416 07:14:46.639643 PCI: 00:16.4: enabled 0
1417 07:14:46.643031 PCI: 00:16.5: enabled 0
1418 07:14:46.643615 PCI: 00:17.0: enabled 0
1419 07:14:46.646038 PCI: 00:19.0: enabled 1
1420 07:14:46.649478 PCI: 00:19.1: enabled 0
1421 07:14:46.652782 PCI: 00:19.2: enabled 1
1422 07:14:46.653366 PCI: 00:1a.0: enabled 1
1423 07:14:46.656068 PCI: 00:1c.0: enabled 0
1424 07:14:46.659288 PCI: 00:1c.1: enabled 0
1425 07:14:46.662514 PCI: 00:1c.2: enabled 0
1426 07:14:46.663030 PCI: 00:1c.3: enabled 0
1427 07:14:46.665747 PCI: 00:1c.4: enabled 0
1428 07:14:46.669105 PCI: 00:1c.5: enabled 0
1429 07:14:46.672430 PCI: 00:1c.6: enabled 0
1430 07:14:46.673011 PCI: 00:1c.7: enabled 1
1431 07:14:46.675935 PCI: 00:1e.0: enabled 0
1432 07:14:46.679157 PCI: 00:1e.1: enabled 0
1433 07:14:46.679738 PCI: 00:1e.2: enabled 1
1434 07:14:46.682587 PCI: 00:1e.3: enabled 0
1435 07:14:46.685939 PCI: 00:1f.0: enabled 1
1436 07:14:46.688879 PCI: 00:1f.1: enabled 0
1437 07:14:46.689375 PCI: 00:1f.2: enabled 1
1438 07:14:46.692541 PCI: 00:1f.3: enabled 1
1439 07:14:46.695449 PCI: 00:1f.4: enabled 0
1440 07:14:46.699040 PCI: 00:1f.5: enabled 1
1441 07:14:46.699534 PCI: 00:1f.7: enabled 0
1442 07:14:46.702939 GENERIC: 0.0: enabled 1
1443 07:14:46.705867 GENERIC: 0.0: enabled 1
1444 07:14:46.706447 USB0 port 0: enabled 1
1445 07:14:46.708782 GENERIC: 0.0: enabled 1
1446 07:14:46.712246 I2C: 00:2c: enabled 1
1447 07:14:46.715607 I2C: 00:15: enabled 1
1448 07:14:46.716186 GENERIC: 0.0: enabled 0
1449 07:14:46.719139 I2C: 00:15: enabled 1
1450 07:14:46.722267 I2C: 00:10: enabled 0
1451 07:14:46.722835 I2C: 00:10: enabled 0
1452 07:14:46.725563 I2C: 00:2c: enabled 1
1453 07:14:46.729052 I2C: 00:40: enabled 1
1454 07:14:46.729637 I2C: 00:10: enabled 1
1455 07:14:46.732008 I2C: 00:39: enabled 1
1456 07:14:46.735928 I2C: 00:36: enabled 1
1457 07:14:46.736558 I2C: 00:10: enabled 0
1458 07:14:46.738714 I2C: 00:0c: enabled 1
1459 07:14:46.742274 I2C: 00:50: enabled 1
1460 07:14:46.742863 I2C: 00:1a: enabled 1
1461 07:14:46.745457 I2C: 00:1a: enabled 0
1462 07:14:46.748645 I2C: 00:1a: enabled 0
1463 07:14:46.749224 I2C: 00:28: enabled 1
1464 07:14:46.752160 I2C: 00:29: enabled 1
1465 07:14:46.755571 PCI: 00:00.0: enabled 1
1466 07:14:46.756155 SPI: 00: enabled 1
1467 07:14:46.759039 PNP: 0c09.0: enabled 1
1468 07:14:46.762291 GENERIC: 0.0: enabled 0
1469 07:14:46.765685 USB2 port 0: enabled 1
1470 07:14:46.766272 USB2 port 1: enabled 1
1471 07:14:46.768645 USB2 port 2: enabled 1
1472 07:14:46.772265 USB2 port 3: enabled 1
1473 07:14:46.772878 USB2 port 4: enabled 0
1474 07:14:46.775170 USB2 port 5: enabled 1
1475 07:14:46.778557 USB2 port 6: enabled 0
1476 07:14:46.779047 USB2 port 7: enabled 1
1477 07:14:46.782353 USB3 port 0: enabled 1
1478 07:14:46.785820 USB3 port 1: enabled 1
1479 07:14:46.788551 USB3 port 2: enabled 1
1480 07:14:46.789153 USB3 port 3: enabled 1
1481 07:14:46.792089 APIC: 00: enabled 1
1482 07:14:46.795278 APIC: 02: enabled 1
1483 07:14:46.795879 PCI: 00:08.0: enabled 1
1484 07:14:46.802062 BS: BS_DEV_INIT run times (exec / console): 718 / 464 ms
1485 07:14:46.808786 ELOG: Event(92) added with size 9 at 2023-03-12 07:14:46 UTC
1486 07:14:46.815556 ELOG: Event(93) added with size 9 at 2023-03-12 07:14:46 UTC
1487 07:14:46.821776 ELOG: Event(9E) added with size 10 at 2023-03-12 07:14:46 UTC
1488 07:14:46.825010 ELOG: Event(9F) added with size 14 at 2023-03-12 07:14:46 UTC
1489 07:14:46.832281 BS: BS_DEV_INIT exit times (exec / console): 1 / 24 ms
1490 07:14:46.839193 ELOG: Event(A1) added with size 10 at 2023-03-12 07:14:46 UTC
1491 07:14:46.845156 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1492 07:14:46.851976 ELOG: Event(A0) added with size 9 at 2023-03-12 07:14:46 UTC
1493 07:14:46.855639 elog_add_boot_reason: Logged dev mode boot
1494 07:14:46.862051 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1495 07:14:46.865950 Finalize devices...
1496 07:14:46.866540 Devices finalized
1497 07:14:46.871709 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1498 07:14:46.878698 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1499 07:14:46.881822 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1500 07:14:46.888447 ME: HFSTS1 : 0x80030045
1501 07:14:46.892134 ME: HFSTS2 : 0x30280136
1502 07:14:46.895298 ME: HFSTS3 : 0x00000050
1503 07:14:46.898636 ME: HFSTS4 : 0x00004000
1504 07:14:46.901906 ME: HFSTS5 : 0x00000000
1505 07:14:46.908537 ME: HFSTS6 : 0x40400006
1506 07:14:46.911599 ME: Manufacturing Mode : NO
1507 07:14:46.915141 ME: FW Partition Table : OK
1508 07:14:46.918460 ME: Bringup Loader Failure : NO
1509 07:14:46.921833 ME: Firmware Init Complete : NO
1510 07:14:46.924945 ME: Boot Options Present : NO
1511 07:14:46.928403 ME: Update In Progress : NO
1512 07:14:46.932348 ME: D0i3 Support : YES
1513 07:14:46.935153 ME: Low Power State Enabled : NO
1514 07:14:46.938208 ME: CPU Replaced : YES
1515 07:14:46.941786 ME: CPU Replacement Valid : YES
1516 07:14:46.945203 ME: Current Working State : 5
1517 07:14:46.948425 ME: Current Operation State : 1
1518 07:14:46.951949 ME: Current Operation Mode : 3
1519 07:14:46.955653 ME: Error Code : 0
1520 07:14:46.958302 ME: CPU Debug Disabled : YES
1521 07:14:46.961663 ME: TXT Support : NO
1522 07:14:46.965234 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1523 07:14:46.971762 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1524 07:14:46.974851 ACPI: Writing ACPI tables at 76b27000.
1525 07:14:46.978471 ACPI: * FACS
1526 07:14:46.979057 ACPI: * DSDT
1527 07:14:46.981463 Ramoops buffer: 0x100000@0x76a26000.
1528 07:14:46.988251 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1529 07:14:46.991417 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1530 07:14:46.994740 Google Chrome EC: version:
1531 07:14:46.998121 ro: magolor_1.1.9999-103b6f9
1532 07:14:47.001151 rw: magolor_1.1.9999-103b6f9
1533 07:14:47.005271 running image: 1
1534 07:14:47.011214 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1535 07:14:47.014733 ACPI: * FADT
1536 07:14:47.015325 SCI is IRQ9
1537 07:14:47.017936 ACPI: added table 1/32, length now 40
1538 07:14:47.021135 ACPI: * SSDT
1539 07:14:47.024526 Found 1 CPU(s) with 2 core(s) each.
1540 07:14:47.027972 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1541 07:14:47.034715 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1542 07:14:47.037875 Could not locate 'wifi_sar' in VPD.
1543 07:14:47.041305 Checking CBFS for default SAR values
1544 07:14:47.044792 wifi_sar_defaults.hex has bad len in CBFS
1545 07:14:47.047506 failed from getting SAR limits!
1546 07:14:47.054601 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1547 07:14:47.057888 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1548 07:14:47.064419 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1549 07:14:47.067721 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1550 07:14:47.074164 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1551 07:14:47.077712 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1552 07:14:47.084561 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1553 07:14:47.087358 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1554 07:14:47.093991 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1555 07:14:47.100430 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1556 07:14:47.107373 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1557 07:14:47.114018 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1558 07:14:47.117430 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1559 07:14:47.123757 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1560 07:14:47.127025 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1561 07:14:47.133917 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1562 07:14:47.137206 PS2K: Passing 101 keymaps to kernel
1563 07:14:47.144361 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1564 07:14:47.150631 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1565 07:14:47.154334 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1566 07:14:47.160830 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1567 07:14:47.164037 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1568 07:14:47.170703 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1569 07:14:47.177291 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1570 07:14:47.180668 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1571 07:14:47.187662 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1572 07:14:47.193961 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1573 07:14:47.197425 ACPI: added table 2/32, length now 44
1574 07:14:47.200127 ACPI: * MCFG
1575 07:14:47.203976 ACPI: added table 3/32, length now 48
1576 07:14:47.204631 ACPI: * TPM2
1577 07:14:47.207185 TPM2 log created at 0x76a16000
1578 07:14:47.210466 ACPI: added table 4/32, length now 52
1579 07:14:47.213492 ACPI: * MADT
1580 07:14:47.213990 SCI is IRQ9
1581 07:14:47.216985 ACPI: added table 5/32, length now 56
1582 07:14:47.220381 current = 76b2d580
1583 07:14:47.220978 ACPI: * DMAR
1584 07:14:47.227170 ACPI: added table 6/32, length now 60
1585 07:14:47.229927 ACPI: added table 7/32, length now 64
1586 07:14:47.230429 ACPI: * HPET
1587 07:14:47.233531 ACPI: added table 8/32, length now 68
1588 07:14:47.237173 ACPI: done.
1589 07:14:47.240235 ACPI tables: 26304 bytes.
1590 07:14:47.240772 smbios_write_tables: 76a15000
1591 07:14:47.244519 EC returned error result code 3
1592 07:14:47.247638 Couldn't obtain OEM name from CBI
1593 07:14:47.251159 Create SMBIOS type 16
1594 07:14:47.254478 Create SMBIOS type 17
1595 07:14:47.258139 GENERIC: 0.0 (WIFI Device)
1596 07:14:47.258722 SMBIOS tables: 913 bytes.
1597 07:14:47.264909 Writing table forward entry at 0x00000500
1598 07:14:47.271084 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1599 07:14:47.274534 Writing coreboot table at 0x76b4b000
1600 07:14:47.281261 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1601 07:14:47.284445 1. 0000000000001000-000000000009ffff: RAM
1602 07:14:47.288289 2. 00000000000a0000-00000000000fffff: RESERVED
1603 07:14:47.294320 3. 0000000000100000-0000000076a14fff: RAM
1604 07:14:47.297987 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1605 07:14:47.304352 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1606 07:14:47.311163 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1607 07:14:47.314598 7. 0000000077000000-000000007fbfffff: RESERVED
1608 07:14:47.317687 8. 00000000c0000000-00000000cfffffff: RESERVED
1609 07:14:47.324882 9. 00000000fb000000-00000000fb000fff: RESERVED
1610 07:14:47.327538 10. 00000000fe000000-00000000fe00ffff: RESERVED
1611 07:14:47.334376 11. 00000000fea80000-00000000fea87fff: RESERVED
1612 07:14:47.337863 12. 00000000fed80000-00000000fed87fff: RESERVED
1613 07:14:47.344112 13. 00000000fed90000-00000000fed92fff: RESERVED
1614 07:14:47.347892 14. 00000000feda0000-00000000feda1fff: RESERVED
1615 07:14:47.350675 15. 0000000100000000-00000001803fffff: RAM
1616 07:14:47.353995 Passing 4 GPIOs to payload:
1617 07:14:47.360894 NAME | PORT | POLARITY | VALUE
1618 07:14:47.364090 lid | undefined | high | high
1619 07:14:47.370808 power | undefined | high | low
1620 07:14:47.374228 oprom | undefined | high | low
1621 07:14:47.380808 EC in RW | 0x000000b9 | high | low
1622 07:14:47.387614 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum e167
1623 07:14:47.390809 coreboot table: 1504 bytes.
1624 07:14:47.394272 IMD ROOT 0. 0x76fff000 0x00001000
1625 07:14:47.397709 IMD SMALL 1. 0x76ffe000 0x00001000
1626 07:14:47.400481 FSP MEMORY 2. 0x76c4e000 0x003b0000
1627 07:14:47.404506 CONSOLE 3. 0x76c2e000 0x00020000
1628 07:14:47.407414 FMAP 4. 0x76c2d000 0x00000578
1629 07:14:47.414453 TIME STAMP 5. 0x76c2c000 0x00000910
1630 07:14:47.417089 VBOOT WORK 6. 0x76c18000 0x00014000
1631 07:14:47.420411 ROMSTG STCK 7. 0x76c17000 0x00001000
1632 07:14:47.424098 AFTER CAR 8. 0x76c0d000 0x0000a000
1633 07:14:47.427532 RAMSTAGE 9. 0x76ba7000 0x00066000
1634 07:14:47.430678 REFCODE 10. 0x76b67000 0x00040000
1635 07:14:47.433877 SMM BACKUP 11. 0x76b57000 0x00010000
1636 07:14:47.437632 4f444749 12. 0x76b55000 0x00002000
1637 07:14:47.440680 EXT VBT13. 0x76b53000 0x00001c43
1638 07:14:47.444096 COREBOOT 14. 0x76b4b000 0x00008000
1639 07:14:47.451194 ACPI 15. 0x76b27000 0x00024000
1640 07:14:47.454151 ACPI GNVS 16. 0x76b26000 0x00001000
1641 07:14:47.457563 RAMOOPS 17. 0x76a26000 0x00100000
1642 07:14:47.461284 TPM2 TCGLOG18. 0x76a16000 0x00010000
1643 07:14:47.463858 SMBIOS 19. 0x76a15000 0x00000800
1644 07:14:47.467135 IMD small region:
1645 07:14:47.470618 IMD ROOT 0. 0x76ffec00 0x00000400
1646 07:14:47.473748 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1647 07:14:47.477187 VPD 2. 0x76ffeb80 0x0000004c
1648 07:14:47.480305 POWER STATE 3. 0x76ffeb40 0x00000040
1649 07:14:47.483687 ROMSTAGE 4. 0x76ffeb20 0x00000004
1650 07:14:47.490616 MEM INFO 5. 0x76ffe940 0x000001e0
1651 07:14:47.493720 BS: BS_WRITE_TABLES run times (exec / console): 6 / 517 ms
1652 07:14:47.497289 MTRR: Physical address space:
1653 07:14:47.503756 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1654 07:14:47.510365 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1655 07:14:47.516967 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1656 07:14:47.524007 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1657 07:14:47.530353 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1658 07:14:47.537158 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1659 07:14:47.540154 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1660 07:14:47.546795 MTRR: Fixed MSR 0x250 0x0606060606060606
1661 07:14:47.550104 MTRR: Fixed MSR 0x258 0x0606060606060606
1662 07:14:47.553795 MTRR: Fixed MSR 0x259 0x0000000000000000
1663 07:14:47.557172 MTRR: Fixed MSR 0x268 0x0606060606060606
1664 07:14:47.563690 MTRR: Fixed MSR 0x269 0x0606060606060606
1665 07:14:47.566786 MTRR: Fixed MSR 0x26a 0x0606060606060606
1666 07:14:47.570363 MTRR: Fixed MSR 0x26b 0x0606060606060606
1667 07:14:47.573605 MTRR: Fixed MSR 0x26c 0x0606060606060606
1668 07:14:47.576750 MTRR: Fixed MSR 0x26d 0x0606060606060606
1669 07:14:47.583748 MTRR: Fixed MSR 0x26e 0x0606060606060606
1670 07:14:47.586951 MTRR: Fixed MSR 0x26f 0x0606060606060606
1671 07:14:47.590295 call enable_fixed_mtrr()
1672 07:14:47.593680 CPU physical address size: 39 bits
1673 07:14:47.596884 MTRR: default type WB/UC MTRR counts: 6/5.
1674 07:14:47.600080 MTRR: UC selected as default type.
1675 07:14:47.607253 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1676 07:14:47.613383 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1677 07:14:47.619979 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1678 07:14:47.626525 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1679 07:14:47.633358 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1680 07:14:47.633977
1681 07:14:47.634534 MTRR check
1682 07:14:47.636788 Fixed MTRRs : Enabled
1683 07:14:47.639936 Variable MTRRs: Enabled
1684 07:14:47.640569
1685 07:14:47.643332 MTRR: Fixed MSR 0x250 0x0606060606060606
1686 07:14:47.646533 MTRR: Fixed MSR 0x258 0x0606060606060606
1687 07:14:47.650082 MTRR: Fixed MSR 0x259 0x0000000000000000
1688 07:14:47.656476 MTRR: Fixed MSR 0x268 0x0606060606060606
1689 07:14:47.659827 MTRR: Fixed MSR 0x269 0x0606060606060606
1690 07:14:47.663146 MTRR: Fixed MSR 0x26a 0x0606060606060606
1691 07:14:47.666883 MTRR: Fixed MSR 0x26b 0x0606060606060606
1692 07:14:47.672899 MTRR: Fixed MSR 0x26c 0x0606060606060606
1693 07:14:47.676381 MTRR: Fixed MSR 0x26d 0x0606060606060606
1694 07:14:47.679395 MTRR: Fixed MSR 0x26e 0x0606060606060606
1695 07:14:47.682932 MTRR: Fixed MSR 0x26f 0x0606060606060606
1696 07:14:47.689662 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1697 07:14:47.692576 call enable_fixed_mtrr()
1698 07:14:47.696613 Checking cr50 for pending updates
1699 07:14:47.699678 CPU physical address size: 39 bits
1700 07:14:47.702565 Reading cr50 TPM mode
1701 07:14:47.713246 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1702 07:14:47.720250 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1703 07:14:47.723662 Checking segment from ROM address 0xfff9d5b8
1704 07:14:47.730267 Checking segment from ROM address 0xfff9d5d4
1705 07:14:47.733438 Loading segment from ROM address 0xfff9d5b8
1706 07:14:47.737107 code (compression=0)
1707 07:14:47.743749 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1708 07:14:47.754003 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1709 07:14:47.756886 it's not compressed!
1710 07:14:47.881445 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1711 07:14:47.888505 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1712 07:14:47.895516 Loading segment from ROM address 0xfff9d5d4
1713 07:14:47.898859 Entry Point 0x30000000
1714 07:14:47.899456 Loaded segments
1715 07:14:47.906242 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1716 07:14:47.921753 Finalizing chipset.
1717 07:14:47.925523 Finalizing SMM.
1718 07:14:47.926022 APMC done.
1719 07:14:47.931950 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1720 07:14:47.934949 mp_park_aps done after 0 msecs.
1721 07:14:47.938688 Jumping to boot code at 0x30000000(0x76b4b000)
1722 07:14:47.948645 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1723 07:14:47.949246
1724 07:14:47.949679
1725 07:14:47.950042
1726 07:14:47.951822 Starting depthcharge on Magolor...
1727 07:14:47.952457
1728 07:14:47.953563 end: 2.2.3 depthcharge-start (duration 00:00:09) [common]
1729 07:14:47.954129 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
1730 07:14:47.954588 Setting prompt string to ['dedede:']
1731 07:14:47.955023 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:46)
1732 07:14:47.961851 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1733 07:14:47.962454
1734 07:14:47.968368 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1735 07:14:47.968975
1736 07:14:47.972193 fw_config match found: AUDIO_AMP=UNPROVISIONED
1737 07:14:47.972834
1738 07:14:47.975468 Wipe memory regions:
1739 07:14:47.976065
1740 07:14:47.978799 [0x00000000001000, 0x000000000a0000)
1741 07:14:47.979400
1742 07:14:47.981488 [0x00000000100000, 0x00000030000000)
1743 07:14:48.109954
1744 07:14:48.113220 [0x00000031062170, 0x00000076a15000)
1745 07:14:48.282365
1746 07:14:48.285875 [0x00000100000000, 0x00000180400000)
1747 07:14:49.347960
1748 07:14:49.348589 R8152: Initializing
1749 07:14:49.348985
1750 07:14:49.350949 Version 6 (ocp_data = 5c30)
1751 07:14:49.353996
1752 07:14:49.354080 R8152: Done initializing
1753 07:14:49.354147
1754 07:14:49.357345 Adding net device
1755 07:14:49.357512
1756 07:14:49.360853 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1757 07:14:49.364337
1758 07:14:49.364556
1759 07:14:49.364663
1760 07:14:49.364975 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1762 07:14:49.466028 dedede: tftpboot 192.168.201.1 9567953/tftp-deploy-vjmxtqv1/kernel/bzImage 9567953/tftp-deploy-vjmxtqv1/kernel/cmdline 9567953/tftp-deploy-vjmxtqv1/ramdisk/ramdisk.cpio.gz
1763 07:14:49.466731 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1764 07:14:49.467181 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1765 07:14:49.472225 tftpboot 192.168.201.1 9567953/tftp-deploy-vjmxtqv1/kernel/bzImagoy-vjmxtqv1/kernel/cmdline 9567953/tftp-deploy-vjmxtqv1/ramdisk/ramdisk.cpio.gz
1766 07:14:49.472863
1767 07:14:49.473248 Waiting for link
1768 07:14:49.673759
1769 07:14:49.674347 done.
1770 07:14:49.674783
1771 07:14:49.675160 MAC: 00:24:32:30:7a:67
1772 07:14:49.675519
1773 07:14:49.676746 Sending DHCP discover... done.
1774 07:14:49.677240
1775 07:14:49.680450 Waiting for reply... done.
1776 07:14:49.681077
1777 07:14:49.683797 Sending DHCP request... done.
1778 07:14:49.684455
1779 07:14:49.686910 Waiting for reply... done.
1780 07:14:49.687502
1781 07:14:49.690172 My ip is 192.168.201.15
1782 07:14:49.690770
1783 07:14:49.693712 The DHCP server ip is 192.168.201.1
1784 07:14:49.694359
1785 07:14:49.696989 TFTP server IP predefined by user: 192.168.201.1
1786 07:14:49.697483
1787 07:14:49.703253 Bootfile predefined by user: 9567953/tftp-deploy-vjmxtqv1/kernel/bzImage
1788 07:14:49.703848
1789 07:14:49.706510 Sending tftp read request... done.
1790 07:14:49.707111
1791 07:14:49.714406 Waiting for the transfer...
1792 07:14:49.715087
1793 07:14:50.400631 00000000 ################################################################
1794 07:14:50.401175
1795 07:14:51.097358 00080000 ################################################################
1796 07:14:51.097981
1797 07:14:51.790484 00100000 ################################################################
1798 07:14:51.791048
1799 07:14:52.475766 00180000 ################################################################
1800 07:14:52.476373
1801 07:14:53.173239 00200000 ################################################################
1802 07:14:53.173765
1803 07:14:53.872169 00280000 ################################################################
1804 07:14:53.872778
1805 07:14:54.563210 00300000 ################################################################
1806 07:14:54.563779
1807 07:14:55.236919 00380000 ################################################################
1808 07:14:55.237597
1809 07:14:55.925767 00400000 ################################################################
1810 07:14:55.926343
1811 07:14:56.576175 00480000 ################################################################
1812 07:14:56.576322
1813 07:14:57.187107 00500000 ################################################################
1814 07:14:57.187248
1815 07:14:57.813521 00580000 ################################################################
1816 07:14:57.813655
1817 07:14:58.466794 00600000 ################################################################
1818 07:14:58.466933
1819 07:14:59.133511 00680000 ################################################################
1820 07:14:59.133661
1821 07:14:59.798190 00700000 ################################################################
1822 07:14:59.798330
1823 07:15:00.417540 00780000 ################################################################
1824 07:15:00.417676
1825 07:15:01.011176 00800000 ################################################################
1826 07:15:01.011324
1827 07:15:01.616042 00880000 ################################################################
1828 07:15:01.616192
1829 07:15:02.046199 00900000 ################################################ done.
1830 07:15:02.046737
1831 07:15:02.049207 The bootfile was 9826304 bytes long.
1832 07:15:02.049642
1833 07:15:02.052269 Sending tftp read request... done.
1834 07:15:02.052751
1835 07:15:02.055699 Waiting for the transfer...
1836 07:15:02.056202
1837 07:15:02.697949 00000000 ################################################################
1838 07:15:02.698471
1839 07:15:03.306905 00080000 ################################################################
1840 07:15:03.307044
1841 07:15:03.899925 00100000 ################################################################
1842 07:15:03.900068
1843 07:15:04.487166 00180000 ################################################################
1844 07:15:04.487308
1845 07:15:05.106265 00200000 ################################################################
1846 07:15:05.106409
1847 07:15:05.723192 00280000 ################################################################
1848 07:15:05.723340
1849 07:15:06.310975 00300000 ################################################################
1850 07:15:06.311119
1851 07:15:06.883852 00380000 ################################################################
1852 07:15:06.884002
1853 07:15:07.483888 00400000 ################################################################
1854 07:15:07.484040
1855 07:15:08.081416 00480000 ################################################################
1856 07:15:08.081566
1857 07:15:08.696776 00500000 ################################################################
1858 07:15:08.696923
1859 07:15:09.293303 00580000 ################################################################
1860 07:15:09.293452
1861 07:15:09.897998 00600000 ################################################################
1862 07:15:09.898149
1863 07:15:10.485885 00680000 ################################################################
1864 07:15:10.486033
1865 07:15:11.052826 00700000 ################################################################
1866 07:15:11.052986
1867 07:15:11.664012 00780000 ################################################################
1868 07:15:11.664158
1869 07:15:12.252484 00800000 ################################################################
1870 07:15:12.252635
1871 07:15:12.547559 00880000 ################################# done.
1872 07:15:12.547693
1873 07:15:12.550622 Sending tftp read request... done.
1874 07:15:12.550709
1875 07:15:12.554206 Waiting for the transfer...
1876 07:15:12.554299
1877 07:15:12.554412 00000000 # done.
1878 07:15:12.554491
1879 07:15:12.563894 Command line loaded dynamically from TFTP file: 9567953/tftp-deploy-vjmxtqv1/kernel/cmdline
1880 07:15:12.564003
1881 07:15:12.577187 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1882 07:15:12.577362
1883 07:15:12.580354 ec_init: CrosEC protocol v3 supported (256, 256)
1884 07:15:12.588343
1885 07:15:12.592017 Shutting down all USB controllers.
1886 07:15:12.592199
1887 07:15:12.592359 Removing current net device
1888 07:15:12.592575
1889 07:15:12.594853 Finalizing coreboot
1890 07:15:12.595071
1891 07:15:12.602092 Exiting depthcharge with code 4 at timestamp: 32156174
1892 07:15:12.602345
1893 07:15:12.602546
1894 07:15:12.602736 Starting kernel ...
1895 07:15:12.602915
1896 07:15:12.603091
1897 07:15:12.603954 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
1898 07:15:12.604330 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
1899 07:15:12.604607 Setting prompt string to ['Linux version [0-9]']
1900 07:15:12.604860 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1901 07:15:12.605112 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1903 07:19:33.605544 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
1905 07:19:33.606755 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
1907 07:19:33.607648 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1910 07:19:33.609171 end: 2 depthcharge-action (duration 00:05:00) [common]
1912 07:19:33.609862 Cleaning after the job
1913 07:19:33.609950 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567953/tftp-deploy-vjmxtqv1/ramdisk
1914 07:19:33.610606 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567953/tftp-deploy-vjmxtqv1/kernel
1915 07:19:33.611255 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567953/tftp-deploy-vjmxtqv1/modules
1916 07:19:33.611610 start: 5.1 power-off (timeout 00:00:30) [common]
1917 07:19:33.611760 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=off'
1918 07:19:33.690338 >> Command sent successfully.
1919 07:19:33.700605 Returned 0 in 0 seconds
1920 07:19:33.802324 end: 5.1 power-off (duration 00:00:00) [common]
1922 07:19:33.803886 start: 5.2 read-feedback (timeout 00:10:00) [common]
1923 07:19:33.805293 Listened to connection for namespace 'common' for up to 1s
1925 07:19:33.806895 Listened to connection for namespace 'common' for up to 1s
1926 07:19:34.808634 Finalising connection for namespace 'common'
1927 07:19:34.809338 Disconnecting from shell: Finalise
1928 07:19:34.809851
1929 07:19:34.911357 end: 5.2 read-feedback (duration 00:00:01) [common]
1930 07:19:34.911970 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9567953
1931 07:19:34.941362 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9567953
1932 07:19:34.941836 JobError: Your job cannot terminate cleanly.