Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 07:14:32.340730 lava-dispatcher, installed at version: 2023.01
2 07:14:32.340914 start: 0 validate
3 07:14:32.341032 Start time: 2023-03-12 07:14:32.341026+00:00 (UTC)
4 07:14:32.341145 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:14:32.341266 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230303.0%2Famd64%2Finitrd.cpio.gz exists
6 07:14:32.633420 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:14:32.633645 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-277-g507c8d80b9e20%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:14:32.927267 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:14:32.927960 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230303.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:14:33.222620 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:14:33.223271 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-277-g507c8d80b9e20%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:14:33.520261 validate duration: 1.18
14 07:14:33.521720 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:14:33.522576 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:14:33.523121 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:14:33.523635 Not decompressing ramdisk as can be used compressed.
18 07:14:33.524106 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230303.0/amd64/initrd.cpio.gz
19 07:14:33.524475 saving as /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/ramdisk/initrd.cpio.gz
20 07:14:33.524881 total size: 5432085 (5MB)
21 07:14:33.529196 progress 0% (0MB)
22 07:14:33.538351 progress 5% (0MB)
23 07:14:33.544887 progress 10% (0MB)
24 07:14:33.549187 progress 15% (0MB)
25 07:14:33.553074 progress 20% (1MB)
26 07:14:33.556100 progress 25% (1MB)
27 07:14:33.558724 progress 30% (1MB)
28 07:14:33.561500 progress 35% (1MB)
29 07:14:33.563668 progress 40% (2MB)
30 07:14:33.565784 progress 45% (2MB)
31 07:14:33.567758 progress 50% (2MB)
32 07:14:33.569815 progress 55% (2MB)
33 07:14:33.571649 progress 60% (3MB)
34 07:14:33.573307 progress 65% (3MB)
35 07:14:33.575135 progress 70% (3MB)
36 07:14:33.576777 progress 75% (3MB)
37 07:14:33.578247 progress 80% (4MB)
38 07:14:33.579712 progress 85% (4MB)
39 07:14:33.581348 progress 90% (4MB)
40 07:14:33.582735 progress 95% (4MB)
41 07:14:33.584087 progress 100% (5MB)
42 07:14:33.584295 5MB downloaded in 0.06s (87.19MB/s)
43 07:14:33.584455 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:14:33.584715 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:14:33.584814 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:14:33.584909 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:14:33.585025 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-277-g507c8d80b9e20/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:14:33.585102 saving as /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/kernel/bzImage
50 07:14:33.585169 total size: 9826304 (9MB)
51 07:14:33.585233 No compression specified
52 07:14:33.586190 progress 0% (0MB)
53 07:14:33.588513 progress 5% (0MB)
54 07:14:33.590904 progress 10% (0MB)
55 07:14:33.593276 progress 15% (1MB)
56 07:14:33.595702 progress 20% (1MB)
57 07:14:33.598119 progress 25% (2MB)
58 07:14:33.600486 progress 30% (2MB)
59 07:14:33.602906 progress 35% (3MB)
60 07:14:33.605279 progress 40% (3MB)
61 07:14:33.607703 progress 45% (4MB)
62 07:14:33.610119 progress 50% (4MB)
63 07:14:33.612499 progress 55% (5MB)
64 07:14:33.614885 progress 60% (5MB)
65 07:14:33.617264 progress 65% (6MB)
66 07:14:33.619602 progress 70% (6MB)
67 07:14:33.621988 progress 75% (7MB)
68 07:14:33.624318 progress 80% (7MB)
69 07:14:33.626679 progress 85% (7MB)
70 07:14:33.629010 progress 90% (8MB)
71 07:14:33.631384 progress 95% (8MB)
72 07:14:33.633779 progress 100% (9MB)
73 07:14:33.633999 9MB downloaded in 0.05s (191.93MB/s)
74 07:14:33.634167 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:14:33.634436 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:14:33.634544 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:14:33.634652 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:14:33.634776 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230303.0/amd64/full.rootfs.tar.xz
80 07:14:33.634849 saving as /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/nfsrootfs/full.rootfs.tar
81 07:14:33.634933 total size: 133351796 (127MB)
82 07:14:33.635011 Using unxz to decompress xz
83 07:14:33.638015 progress 0% (0MB)
84 07:14:33.975844 progress 5% (6MB)
85 07:14:34.340881 progress 10% (12MB)
86 07:14:34.633149 progress 15% (19MB)
87 07:14:34.831869 progress 20% (25MB)
88 07:14:35.081401 progress 25% (31MB)
89 07:14:35.428119 progress 30% (38MB)
90 07:14:35.784235 progress 35% (44MB)
91 07:14:36.192261 progress 40% (50MB)
92 07:14:36.578015 progress 45% (57MB)
93 07:14:36.936873 progress 50% (63MB)
94 07:14:37.310528 progress 55% (69MB)
95 07:14:37.673360 progress 60% (76MB)
96 07:14:38.041043 progress 65% (82MB)
97 07:14:38.407571 progress 70% (89MB)
98 07:14:38.786066 progress 75% (95MB)
99 07:14:39.232221 progress 80% (101MB)
100 07:14:39.668832 progress 85% (108MB)
101 07:14:39.941953 progress 90% (114MB)
102 07:14:40.303022 progress 95% (120MB)
103 07:14:40.704066 progress 100% (127MB)
104 07:14:40.709795 127MB downloaded in 7.07s (17.98MB/s)
105 07:14:40.710111 end: 1.3.1 http-download (duration 00:00:07) [common]
107 07:14:40.710386 end: 1.3 download-retry (duration 00:00:07) [common]
108 07:14:40.710482 start: 1.4 download-retry (timeout 00:09:53) [common]
109 07:14:40.710570 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 07:14:40.710688 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-277-g507c8d80b9e20/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:14:40.710760 saving as /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/modules/modules.tar
112 07:14:40.710824 total size: 462184 (0MB)
113 07:14:40.710891 Using unxz to decompress xz
114 07:14:40.713745 progress 7% (0MB)
115 07:14:40.714145 progress 14% (0MB)
116 07:14:40.714378 progress 21% (0MB)
117 07:14:40.715749 progress 28% (0MB)
118 07:14:40.717953 progress 35% (0MB)
119 07:14:40.720057 progress 42% (0MB)
120 07:14:40.722464 progress 49% (0MB)
121 07:14:40.724428 progress 56% (0MB)
122 07:14:40.726395 progress 63% (0MB)
123 07:14:40.728495 progress 70% (0MB)
124 07:14:40.730435 progress 77% (0MB)
125 07:14:40.732372 progress 85% (0MB)
126 07:14:40.734228 progress 92% (0MB)
127 07:14:40.736279 progress 99% (0MB)
128 07:14:40.742827 0MB downloaded in 0.03s (13.78MB/s)
129 07:14:40.743103 end: 1.4.1 http-download (duration 00:00:00) [common]
131 07:14:40.743373 end: 1.4 download-retry (duration 00:00:00) [common]
132 07:14:40.743468 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
133 07:14:40.743564 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
134 07:14:41.978289 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9567933/extract-nfsrootfs-sw6eyybl
135 07:14:41.978490 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
136 07:14:41.978595 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
137 07:14:41.978731 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz
138 07:14:41.978836 makedir: /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin
139 07:14:41.978922 makedir: /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/tests
140 07:14:41.979008 makedir: /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/results
141 07:14:41.979107 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-add-keys
142 07:14:41.979235 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-add-sources
143 07:14:41.979350 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-background-process-start
144 07:14:41.979462 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-background-process-stop
145 07:14:41.979572 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-common-functions
146 07:14:41.979683 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-echo-ipv4
147 07:14:41.979793 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-install-packages
148 07:14:41.979901 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-installed-packages
149 07:14:41.980008 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-os-build
150 07:14:41.980115 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-probe-channel
151 07:14:41.980223 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-probe-ip
152 07:14:41.980331 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-target-ip
153 07:14:41.980437 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-target-mac
154 07:14:41.980545 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-target-storage
155 07:14:41.980656 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-test-case
156 07:14:41.980763 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-test-event
157 07:14:41.980870 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-test-feedback
158 07:14:41.980980 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-test-raise
159 07:14:41.981087 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-test-reference
160 07:14:41.981194 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-test-runner
161 07:14:41.981302 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-test-set
162 07:14:41.981409 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-test-shell
163 07:14:41.981647 Updating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-install-packages (oe)
164 07:14:41.981761 Updating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/bin/lava-installed-packages (oe)
165 07:14:41.981857 Creating /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/environment
166 07:14:41.981945 LAVA metadata
167 07:14:41.982015 - LAVA_JOB_ID=9567933
168 07:14:41.982079 - LAVA_DISPATCHER_IP=192.168.201.1
169 07:14:41.982177 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
170 07:14:41.982243 skipped lava-vland-overlay
171 07:14:41.982319 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
172 07:14:41.982402 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
173 07:14:41.982465 skipped lava-multinode-overlay
174 07:14:41.982538 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
175 07:14:41.982620 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
176 07:14:41.982693 Loading test definitions
177 07:14:41.982784 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
178 07:14:41.982855 Using /lava-9567933 at stage 0
179 07:14:41.983108 uuid=9567933_1.5.2.3.1 testdef=None
180 07:14:41.983199 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
181 07:14:41.983289 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
182 07:14:41.983754 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
184 07:14:41.983984 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
185 07:14:41.984543 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
187 07:14:41.984783 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
188 07:14:41.985315 runner path: /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/0/tests/0_dmesg test_uuid 9567933_1.5.2.3.1
189 07:14:41.985464 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
191 07:14:41.985697 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
192 07:14:41.985771 Using /lava-9567933 at stage 1
193 07:14:41.986010 uuid=9567933_1.5.2.3.5 testdef=None
194 07:14:41.986099 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
195 07:14:41.986190 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
196 07:14:41.986629 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
198 07:14:41.986853 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
199 07:14:41.987418 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
201 07:14:41.987656 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
202 07:14:41.988200 runner path: /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/1/tests/1_bootrr test_uuid 9567933_1.5.2.3.5
203 07:14:41.988343 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
205 07:14:41.988555 Creating lava-test-runner.conf files
206 07:14:41.988635 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/0 for stage 0
207 07:14:41.988729 - 0_dmesg
208 07:14:41.988804 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9567933/lava-overlay-fkrk3gcz/lava-9567933/1 for stage 1
209 07:14:41.988885 - 1_bootrr
210 07:14:41.988975 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
211 07:14:41.989060 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
212 07:14:41.994480 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
213 07:14:41.994594 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
214 07:14:41.994687 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
215 07:14:41.994774 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
216 07:14:41.994865 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
217 07:14:42.098568 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
218 07:14:42.098911 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
219 07:14:42.099162 extracting modules file /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9567933/extract-nfsrootfs-sw6eyybl
220 07:14:42.109590 extracting modules file /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9567933/extract-overlay-ramdisk-grnedpth/ramdisk
221 07:14:42.119792 end: 1.5.4 extract-modules (duration 00:00:00) [common]
222 07:14:42.119932 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
223 07:14:42.120023 [common] Applying overlay to NFS
224 07:14:42.120092 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9567933/compress-overlay-4e44natr/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9567933/extract-nfsrootfs-sw6eyybl
225 07:14:42.124039 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
226 07:14:42.124153 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
227 07:14:42.124247 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
228 07:14:42.124342 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
229 07:14:42.124424 Building ramdisk /var/lib/lava/dispatcher/tmp/9567933/extract-overlay-ramdisk-grnedpth/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9567933/extract-overlay-ramdisk-grnedpth/ramdisk
230 07:14:42.164927 >> 30003 blocks
231 07:14:42.714560 rename /var/lib/lava/dispatcher/tmp/9567933/extract-overlay-ramdisk-grnedpth/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/ramdisk/ramdisk.cpio.gz
232 07:14:42.714945 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
233 07:14:42.715067 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
234 07:14:42.715165 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
235 07:14:42.715253 No mkimage arch provided, not using FIT.
236 07:14:42.715341 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
237 07:14:42.715424 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
238 07:14:42.715523 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
239 07:14:42.715613 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
240 07:14:42.715687 No LXC device requested
241 07:14:42.715766 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
242 07:14:42.715854 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
243 07:14:42.715935 end: 1.7 deploy-device-env (duration 00:00:00) [common]
244 07:14:42.716012 Checking files for TFTP limit of 4294967296 bytes.
245 07:14:42.716393 end: 1 tftp-deploy (duration 00:00:09) [common]
246 07:14:42.716495 start: 2 depthcharge-action (timeout 00:05:00) [common]
247 07:14:42.716586 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
248 07:14:42.716712 substitutions:
249 07:14:42.716779 - {DTB}: None
250 07:14:42.716840 - {INITRD}: 9567933/tftp-deploy-8vbau0et/ramdisk/ramdisk.cpio.gz
251 07:14:42.716899 - {KERNEL}: 9567933/tftp-deploy-8vbau0et/kernel/bzImage
252 07:14:42.716955 - {LAVA_MAC}: None
253 07:14:42.717011 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9567933/extract-nfsrootfs-sw6eyybl
254 07:14:42.717070 - {NFS_SERVER_IP}: 192.168.201.1
255 07:14:42.717125 - {PRESEED_CONFIG}: None
256 07:14:42.717181 - {PRESEED_LOCAL}: None
257 07:14:42.717235 - {RAMDISK}: 9567933/tftp-deploy-8vbau0et/ramdisk/ramdisk.cpio.gz
258 07:14:42.717289 - {ROOT_PART}: None
259 07:14:42.717344 - {ROOT}: None
260 07:14:42.717398 - {SERVER_IP}: 192.168.201.1
261 07:14:42.717480 - {TEE}: None
262 07:14:42.717551 Parsed boot commands:
263 07:14:42.717605 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
264 07:14:42.717756 Parsed boot commands: tftpboot 192.168.201.1 9567933/tftp-deploy-8vbau0et/kernel/bzImage 9567933/tftp-deploy-8vbau0et/kernel/cmdline 9567933/tftp-deploy-8vbau0et/ramdisk/ramdisk.cpio.gz
265 07:14:42.717845 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
266 07:14:42.717932 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
267 07:14:42.718026 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
268 07:14:42.718119 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
269 07:14:42.718220 Not connected, no need to disconnect.
270 07:14:42.718306 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
271 07:14:42.718389 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
272 07:14:42.718456 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
273 07:14:42.721232 Setting prompt string to ['lava-test: # ']
274 07:14:42.721561 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
275 07:14:42.721667 end: 2.2.1 reset-connection (duration 00:00:00) [common]
276 07:14:42.721767 start: 2.2.2 reset-device (timeout 00:05:00) [common]
277 07:14:42.721858 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
278 07:14:42.722031 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
279 07:14:47.866846 >> Command sent successfully.
280 07:14:47.876307 Returned 0 in 5 seconds
281 07:14:47.977919 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
283 07:14:47.979498 end: 2.2.2 reset-device (duration 00:00:05) [common]
284 07:14:47.980043 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
285 07:14:47.980532 Setting prompt string to 'Starting depthcharge on Voema...'
286 07:14:47.980950 Changing prompt to 'Starting depthcharge on Voema...'
287 07:14:47.981349 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
288 07:14:47.982696 [Enter `^Ec?' for help]
289 07:14:49.603789
290 07:14:49.603952
291 07:14:49.613771 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
292 07:14:49.617294 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
293 07:14:49.623981 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
294 07:14:49.627365 CPU: AES supported, TXT NOT supported, VT supported
295 07:14:49.633911 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
296 07:14:49.640171 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
297 07:14:49.643583 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
298 07:14:49.646912 VBOOT: Loading verstage.
299 07:14:49.650101 FMAP: Found "FLASH" version 1.1 at 0x1804000.
300 07:14:49.656701 FMAP: base = 0x0 size = 0x2000000 #areas = 32
301 07:14:49.660207 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 07:14:49.670894 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
303 07:14:49.677287 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
304 07:14:49.677383
305 07:14:49.677491
306 07:14:49.690432 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
307 07:14:49.704075 Probing TPM: . done!
308 07:14:49.707769 TPM ready after 0 ms
309 07:14:49.710720 Connected to device vid:did:rid of 1ae0:0028:00
310 07:14:49.722506 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
311 07:14:49.729032 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
312 07:14:49.732387 Initialized TPM device CR50 revision 0
313 07:14:49.860557 tlcl_send_startup: Startup return code is 0
314 07:14:49.860679 TPM: setup succeeded
315 07:14:49.875763 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
316 07:14:49.889902 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
317 07:14:49.902946 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
318 07:14:49.912727 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
319 07:14:49.916669 Chrome EC: UHEPI supported
320 07:14:49.919577 Phase 1
321 07:14:49.922849 FMAP: area GBB found @ 1805000 (458752 bytes)
322 07:14:49.929730 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
323 07:14:49.939648 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
324 07:14:49.946330 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 07:14:49.953360 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
326 07:14:49.956450 Recovery requested (1009000e)
327 07:14:49.960106 TPM: Extending digest for VBOOT: boot mode into PCR 0
328 07:14:49.971470 tlcl_extend: response is 0
329 07:14:49.978027 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
330 07:14:49.987470 tlcl_extend: response is 0
331 07:14:49.994531 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
332 07:14:50.000835 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
333 07:14:50.007693 BS: verstage times (exec / console): total (unknown) / 142 ms
334 07:14:50.007786
335 07:14:50.007854
336 07:14:50.020709 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
337 07:14:50.027292 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 07:14:50.030629 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 07:14:50.033961 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
340 07:14:50.041161 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 07:14:50.043978 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
342 07:14:50.047922 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 07:14:50.051289 TCO_STS: 0000 0000
344 07:14:50.054280 GEN_PMCON: d0015038 00002200
345 07:14:50.057559 GBLRST_CAUSE: 00000000 00000000
346 07:14:50.057670 HPR_CAUSE0: 00000000
347 07:14:50.061389 prev_sleep_state 5
348 07:14:50.064243 Boot Count incremented to 17134
349 07:14:50.070836 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
350 07:14:50.077679 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
351 07:14:50.084382 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
352 07:14:50.090823 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
353 07:14:50.095830 Chrome EC: UHEPI supported
354 07:14:50.102293 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
355 07:14:50.114911 Probing TPM: done!
356 07:14:50.121709 Connected to device vid:did:rid of 1ae0:0028:00
357 07:14:50.131948 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
358 07:14:50.135390 Initialized TPM device CR50 revision 0
359 07:14:50.149745 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
360 07:14:50.156608 MRC: Hash idx 0x100b comparison successful.
361 07:14:50.159749 MRC cache found, size faa8
362 07:14:50.159830 bootmode is set to: 2
363 07:14:50.163210 SPD index = 0
364 07:14:50.169684 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
365 07:14:50.173209 SPD: module type is LPDDR4X
366 07:14:50.176725 SPD: module part number is MT53E512M64D4NW-046
367 07:14:50.183239 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
368 07:14:50.186530 SPD: device width 16 bits, bus width 16 bits
369 07:14:50.193011 SPD: module size is 1024 MB (per channel)
370 07:14:50.625390 CBMEM:
371 07:14:50.629162 IMD: root @ 0x76fff000 254 entries.
372 07:14:50.632443 IMD: root @ 0x76ffec00 62 entries.
373 07:14:50.636207 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
374 07:14:50.642705 FMAP: area RW_VPD found @ f35000 (8192 bytes)
375 07:14:50.646061 External stage cache:
376 07:14:50.648826 IMD: root @ 0x7b3ff000 254 entries.
377 07:14:50.652409 IMD: root @ 0x7b3fec00 62 entries.
378 07:14:50.667106 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
379 07:14:50.673707 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
380 07:14:50.680516 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
381 07:14:50.694411 MRC: 'RECOVERY_MRC_CACHE' does not need update.
382 07:14:50.701194 cse_lite: Skip switching to RW in the recovery path
383 07:14:50.701281 8 DIMMs found
384 07:14:50.701352 SMM Memory Map
385 07:14:50.704497 SMRAM : 0x7b000000 0x800000
386 07:14:50.711290 Subregion 0: 0x7b000000 0x200000
387 07:14:50.714325 Subregion 1: 0x7b200000 0x200000
388 07:14:50.717856 Subregion 2: 0x7b400000 0x400000
389 07:14:50.717943 top_of_ram = 0x77000000
390 07:14:50.724519 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
391 07:14:50.731044 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
392 07:14:50.734339 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
393 07:14:50.740941 MTRR Range: Start=ff000000 End=0 (Size 1000000)
394 07:14:50.747434 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
395 07:14:50.754092 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
396 07:14:50.764478 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
397 07:14:50.767690 Processing 211 relocs. Offset value of 0x74c0b000
398 07:14:50.777476 BS: romstage times (exec / console): total (unknown) / 277 ms
399 07:14:50.783607
400 07:14:50.783697
401 07:14:50.793500 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
402 07:14:50.796656 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
403 07:14:50.806299 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
404 07:14:50.813632 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
405 07:14:50.820499 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
406 07:14:50.827275 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
407 07:14:50.873454 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
408 07:14:50.880225 Processing 5008 relocs. Offset value of 0x75d98000
409 07:14:50.883899 BS: postcar times (exec / console): total (unknown) / 59 ms
410 07:14:50.886985
411 07:14:50.887071
412 07:14:50.896986 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
413 07:14:50.897075 Normal boot
414 07:14:50.899983 FW_CONFIG value is 0x804c02
415 07:14:50.903369 PCI: 00:07.0 disabled by fw_config
416 07:14:50.906638 PCI: 00:07.1 disabled by fw_config
417 07:14:50.910093 PCI: 00:0d.2 disabled by fw_config
418 07:14:50.913516 PCI: 00:1c.7 disabled by fw_config
419 07:14:50.920124 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
420 07:14:50.926922 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 07:14:50.930352 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 07:14:50.933705 GENERIC: 0.0 disabled by fw_config
423 07:14:50.939986 GENERIC: 1.0 disabled by fw_config
424 07:14:50.943105 fw_config match found: DB_USB=USB3_ACTIVE
425 07:14:50.946742 fw_config match found: DB_USB=USB3_ACTIVE
426 07:14:50.949934 fw_config match found: DB_USB=USB3_ACTIVE
427 07:14:50.956325 fw_config match found: DB_USB=USB3_ACTIVE
428 07:14:50.959807 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
429 07:14:50.966452 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
430 07:14:50.976244 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
431 07:14:50.983282 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
432 07:14:50.986472 microcode: sig=0x806c1 pf=0x80 revision=0x86
433 07:14:50.992872 microcode: Update skipped, already up-to-date
434 07:14:50.999853 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
435 07:14:51.027260 Detected 4 core, 8 thread CPU.
436 07:14:51.030303 Setting up SMI for CPU
437 07:14:51.033959 IED base = 0x7b400000
438 07:14:51.034045 IED size = 0x00400000
439 07:14:51.037287 Will perform SMM setup.
440 07:14:51.043893 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
441 07:14:51.050932 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
442 07:14:51.057024 Processing 16 relocs. Offset value of 0x00030000
443 07:14:51.060530 Attempting to start 7 APs
444 07:14:51.064112 Waiting for 10ms after sending INIT.
445 07:14:51.078852 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
446 07:14:51.078946 done.
447 07:14:51.082747 AP: slot 6 apic_id 2.
448 07:14:51.085922 AP: slot 2 apic_id 3.
449 07:14:51.086008 AP: slot 3 apic_id 7.
450 07:14:51.089207 AP: slot 7 apic_id 6.
451 07:14:51.092408 AP: slot 5 apic_id 4.
452 07:14:51.092494 AP: slot 4 apic_id 5.
453 07:14:51.098866 Waiting for 2nd SIPI to complete...done.
454 07:14:51.105677 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
455 07:14:51.112287 Processing 13 relocs. Offset value of 0x00038000
456 07:14:51.112374 Unable to locate Global NVS
457 07:14:51.123136 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
458 07:14:51.125709 Installing permanent SMM handler to 0x7b000000
459 07:14:51.135641 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
460 07:14:51.138974 Processing 794 relocs. Offset value of 0x7b010000
461 07:14:51.148830 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
462 07:14:51.152152 Processing 13 relocs. Offset value of 0x7b008000
463 07:14:51.159205 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
464 07:14:51.165810 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
465 07:14:51.169083 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
466 07:14:51.175613 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
467 07:14:51.182147 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
468 07:14:51.189031 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
469 07:14:51.195720 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
470 07:14:51.195809 Unable to locate Global NVS
471 07:14:51.205489 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
472 07:14:51.208460 Clearing SMI status registers
473 07:14:51.208546 SMI_STS: PM1
474 07:14:51.212351 PM1_STS: PWRBTN
475 07:14:51.218452 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
476 07:14:51.222075 In relocation handler: CPU 0
477 07:14:51.225387 New SMBASE=0x7b000000 IEDBASE=0x7b400000
478 07:14:51.232027 Writing SMRR. base = 0x7b000006, mask=0xff800c00
479 07:14:51.232113 Relocation complete.
480 07:14:51.241913 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
481 07:14:51.242000 In relocation handler: CPU 1
482 07:14:51.248765 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
483 07:14:51.248852 Relocation complete.
484 07:14:51.255272 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
485 07:14:51.258479 In relocation handler: CPU 2
486 07:14:51.265443 New SMBASE=0x7afff800 IEDBASE=0x7b400000
487 07:14:51.265563 Relocation complete.
488 07:14:51.272507 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
489 07:14:51.275229 In relocation handler: CPU 6
490 07:14:51.281706 New SMBASE=0x7affe800 IEDBASE=0x7b400000
491 07:14:51.285644 Writing SMRR. base = 0x7b000006, mask=0xff800c00
492 07:14:51.288985 Relocation complete.
493 07:14:51.293196 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
494 07:14:51.296380 In relocation handler: CPU 3
495 07:14:51.303002 New SMBASE=0x7afff400 IEDBASE=0x7b400000
496 07:14:51.303090 Relocation complete.
497 07:14:51.309950 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
498 07:14:51.313313 In relocation handler: CPU 7
499 07:14:51.319790 New SMBASE=0x7affe400 IEDBASE=0x7b400000
500 07:14:51.322896 Writing SMRR. base = 0x7b000006, mask=0xff800c00
501 07:14:51.326381 Relocation complete.
502 07:14:51.332974 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
503 07:14:51.336234 In relocation handler: CPU 5
504 07:14:51.339569 New SMBASE=0x7affec00 IEDBASE=0x7b400000
505 07:14:51.342737 Writing SMRR. base = 0x7b000006, mask=0xff800c00
506 07:14:51.346027 Relocation complete.
507 07:14:51.353069 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
508 07:14:51.356426 In relocation handler: CPU 4
509 07:14:51.359457 New SMBASE=0x7afff000 IEDBASE=0x7b400000
510 07:14:51.362595 Relocation complete.
511 07:14:51.366198 Initializing CPU #0
512 07:14:51.369843 CPU: vendor Intel device 806c1
513 07:14:51.372636 CPU: family 06, model 8c, stepping 01
514 07:14:51.376654 Clearing out pending MCEs
515 07:14:51.376740 Setting up local APIC...
516 07:14:51.379634 apic_id: 0x00 done.
517 07:14:51.382875 Turbo is available but hidden
518 07:14:51.386332 Turbo is available and visible
519 07:14:51.389711 microcode: Update skipped, already up-to-date
520 07:14:51.392870 CPU #0 initialized
521 07:14:51.396279 Initializing CPU #6
522 07:14:51.396366 Initializing CPU #2
523 07:14:51.399355 CPU: vendor Intel device 806c1
524 07:14:51.403026 CPU: family 06, model 8c, stepping 01
525 07:14:51.406809 CPU: vendor Intel device 806c1
526 07:14:51.409802 CPU: family 06, model 8c, stepping 01
527 07:14:51.412828 Clearing out pending MCEs
528 07:14:51.416373 Clearing out pending MCEs
529 07:14:51.419566 Initializing CPU #4
530 07:14:51.419653 Initializing CPU #5
531 07:14:51.422408 CPU: vendor Intel device 806c1
532 07:14:51.426052 CPU: family 06, model 8c, stepping 01
533 07:14:51.429127 CPU: vendor Intel device 806c1
534 07:14:51.432668 CPU: family 06, model 8c, stepping 01
535 07:14:51.436643 Clearing out pending MCEs
536 07:14:51.439598 Clearing out pending MCEs
537 07:14:51.442588 Setting up local APIC...
538 07:14:51.442675 Setting up local APIC...
539 07:14:51.446100 apic_id: 0x05 done.
540 07:14:51.449365 Setting up local APIC...
541 07:14:51.452683 Initializing CPU #7
542 07:14:51.452769 Initializing CPU #3
543 07:14:51.456187 CPU: vendor Intel device 806c1
544 07:14:51.459527 CPU: family 06, model 8c, stepping 01
545 07:14:51.462839 CPU: vendor Intel device 806c1
546 07:14:51.465921 CPU: family 06, model 8c, stepping 01
547 07:14:51.469046 Clearing out pending MCEs
548 07:14:51.472769 Clearing out pending MCEs
549 07:14:51.476138 Setting up local APIC...
550 07:14:51.476225 apic_id: 0x02 done.
551 07:14:51.479521 Setting up local APIC...
552 07:14:51.482671 apic_id: 0x04 done.
553 07:14:51.485976 microcode: Update skipped, already up-to-date
554 07:14:51.489157 microcode: Update skipped, already up-to-date
555 07:14:51.492672 CPU #4 initialized
556 07:14:51.495888 CPU #5 initialized
557 07:14:51.499123 microcode: Update skipped, already up-to-date
558 07:14:51.502437 apic_id: 0x03 done.
559 07:14:51.502523 CPU #6 initialized
560 07:14:51.509738 microcode: Update skipped, already up-to-date
561 07:14:51.509823 apic_id: 0x06 done.
562 07:14:51.513624 Setting up local APIC...
563 07:14:51.516220 CPU #2 initialized
564 07:14:51.516313 Initializing CPU #1
565 07:14:51.522447 microcode: Update skipped, already up-to-date
566 07:14:51.522528 apic_id: 0x07 done.
567 07:14:51.526025 CPU #7 initialized
568 07:14:51.529710 microcode: Update skipped, already up-to-date
569 07:14:51.532351 CPU: vendor Intel device 806c1
570 07:14:51.535677 CPU: family 06, model 8c, stepping 01
571 07:14:51.539682 Clearing out pending MCEs
572 07:14:51.542356 CPU #3 initialized
573 07:14:51.542433 Setting up local APIC...
574 07:14:51.545851 apic_id: 0x01 done.
575 07:14:51.552811 microcode: Update skipped, already up-to-date
576 07:14:51.552893 CPU #1 initialized
577 07:14:51.556033 bsp_do_flight_plan done after 455 msecs.
578 07:14:51.558954 CPU: frequency set to 4000 MHz
579 07:14:51.562402 Enabling SMIs.
580 07:14:51.568886 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
581 07:14:51.584048 SATAXPCIE1 indicates PCIe NVMe is present
582 07:14:51.588009 Probing TPM: done!
583 07:14:51.590678 Connected to device vid:did:rid of 1ae0:0028:00
584 07:14:51.601709 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
585 07:14:51.604819 Initialized TPM device CR50 revision 0
586 07:14:51.608162 Enabling S0i3.4
587 07:14:51.614684 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
588 07:14:51.618585 Found a VBT of 8704 bytes after decompression
589 07:14:51.624869 cse_lite: CSE RO boot. HybridStorageMode disabled
590 07:14:51.631733 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
591 07:14:51.706865 FSPS returned 0
592 07:14:51.710506 Executing Phase 1 of FspMultiPhaseSiInit
593 07:14:51.720401 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
594 07:14:51.723756 port C0 DISC req: usage 1 usb3 1 usb2 5
595 07:14:51.726686 Raw Buffer output 0 00000511
596 07:14:51.730277 Raw Buffer output 1 00000000
597 07:14:51.733610 pmc_send_ipc_cmd succeeded
598 07:14:51.740606 port C1 DISC req: usage 1 usb3 2 usb2 3
599 07:14:51.740688 Raw Buffer output 0 00000321
600 07:14:51.743703 Raw Buffer output 1 00000000
601 07:14:51.748051 pmc_send_ipc_cmd succeeded
602 07:14:51.753387 Detected 4 core, 8 thread CPU.
603 07:14:51.756699 Detected 4 core, 8 thread CPU.
604 07:14:51.990148 Display FSP Version Info HOB
605 07:14:51.993637 Reference Code - CPU = a.0.4c.31
606 07:14:51.996938 uCode Version = 0.0.0.86
607 07:14:52.000485 TXT ACM version = ff.ff.ff.ffff
608 07:14:52.003970 Reference Code - ME = a.0.4c.31
609 07:14:52.006799 MEBx version = 0.0.0.0
610 07:14:52.010509 ME Firmware Version = Consumer SKU
611 07:14:52.013682 Reference Code - PCH = a.0.4c.31
612 07:14:52.017216 PCH-CRID Status = Disabled
613 07:14:52.020339 PCH-CRID Original Value = ff.ff.ff.ffff
614 07:14:52.023775 PCH-CRID New Value = ff.ff.ff.ffff
615 07:14:52.027245 OPROM - RST - RAID = ff.ff.ff.ffff
616 07:14:52.030617 PCH Hsio Version = 4.0.0.0
617 07:14:52.034114 Reference Code - SA - System Agent = a.0.4c.31
618 07:14:52.037108 Reference Code - MRC = 2.0.0.1
619 07:14:52.040431 SA - PCIe Version = a.0.4c.31
620 07:14:52.043841 SA-CRID Status = Disabled
621 07:14:52.047075 SA-CRID Original Value = 0.0.0.1
622 07:14:52.050561 SA-CRID New Value = 0.0.0.1
623 07:14:52.053824 OPROM - VBIOS = ff.ff.ff.ffff
624 07:14:52.057152 IO Manageability Engine FW Version = 11.1.4.0
625 07:14:52.060474 PHY Build Version = 0.0.0.e0
626 07:14:52.063829 Thunderbolt(TM) FW Version = 0.0.0.0
627 07:14:52.070258 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
628 07:14:52.074088 ITSS IRQ Polarities Before:
629 07:14:52.074168 IPC0: 0xffffffff
630 07:14:52.076688 IPC1: 0xffffffff
631 07:14:52.076761 IPC2: 0xffffffff
632 07:14:52.080333 IPC3: 0xffffffff
633 07:14:52.083566 ITSS IRQ Polarities After:
634 07:14:52.083650 IPC0: 0xffffffff
635 07:14:52.087020 IPC1: 0xffffffff
636 07:14:52.087104 IPC2: 0xffffffff
637 07:14:52.090370 IPC3: 0xffffffff
638 07:14:52.094005 Found PCIe Root Port #9 at PCI: 00:1d.0.
639 07:14:52.107279 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
640 07:14:52.117349 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
641 07:14:52.129977 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
642 07:14:52.136865 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
643 07:14:52.136952 Enumerating buses...
644 07:14:52.143960 Show all devs... Before device enumeration.
645 07:14:52.144047 Root Device: enabled 1
646 07:14:52.147207 DOMAIN: 0000: enabled 1
647 07:14:52.150703 CPU_CLUSTER: 0: enabled 1
648 07:14:52.153310 PCI: 00:00.0: enabled 1
649 07:14:52.153420 PCI: 00:02.0: enabled 1
650 07:14:52.156850 PCI: 00:04.0: enabled 1
651 07:14:52.160446 PCI: 00:05.0: enabled 1
652 07:14:52.163502 PCI: 00:06.0: enabled 0
653 07:14:52.163589 PCI: 00:07.0: enabled 0
654 07:14:52.166921 PCI: 00:07.1: enabled 0
655 07:14:52.169890 PCI: 00:07.2: enabled 0
656 07:14:52.173812 PCI: 00:07.3: enabled 0
657 07:14:52.173907 PCI: 00:08.0: enabled 1
658 07:14:52.176990 PCI: 00:09.0: enabled 0
659 07:14:52.180120 PCI: 00:0a.0: enabled 0
660 07:14:52.180222 PCI: 00:0d.0: enabled 1
661 07:14:52.183510 PCI: 00:0d.1: enabled 0
662 07:14:52.186674 PCI: 00:0d.2: enabled 0
663 07:14:52.189855 PCI: 00:0d.3: enabled 0
664 07:14:52.189941 PCI: 00:0e.0: enabled 0
665 07:14:52.194044 PCI: 00:10.2: enabled 1
666 07:14:52.196624 PCI: 00:10.6: enabled 0
667 07:14:52.199881 PCI: 00:10.7: enabled 0
668 07:14:52.199967 PCI: 00:12.0: enabled 0
669 07:14:52.203259 PCI: 00:12.6: enabled 0
670 07:14:52.206746 PCI: 00:13.0: enabled 0
671 07:14:52.210144 PCI: 00:14.0: enabled 1
672 07:14:52.210229 PCI: 00:14.1: enabled 0
673 07:14:52.213550 PCI: 00:14.2: enabled 1
674 07:14:52.216625 PCI: 00:14.3: enabled 1
675 07:14:52.216711 PCI: 00:15.0: enabled 1
676 07:14:52.220033 PCI: 00:15.1: enabled 1
677 07:14:52.223384 PCI: 00:15.2: enabled 1
678 07:14:52.227075 PCI: 00:15.3: enabled 1
679 07:14:52.227160 PCI: 00:16.0: enabled 1
680 07:14:52.231335 PCI: 00:16.1: enabled 0
681 07:14:52.233418 PCI: 00:16.2: enabled 0
682 07:14:52.236646 PCI: 00:16.3: enabled 0
683 07:14:52.236734 PCI: 00:16.4: enabled 0
684 07:14:52.240468 PCI: 00:16.5: enabled 0
685 07:14:52.243449 PCI: 00:17.0: enabled 1
686 07:14:52.246752 PCI: 00:19.0: enabled 0
687 07:14:52.246838 PCI: 00:19.1: enabled 1
688 07:14:52.250172 PCI: 00:19.2: enabled 0
689 07:14:52.253362 PCI: 00:1c.0: enabled 1
690 07:14:52.253485 PCI: 00:1c.1: enabled 0
691 07:14:52.256735 PCI: 00:1c.2: enabled 0
692 07:14:52.260162 PCI: 00:1c.3: enabled 0
693 07:14:52.263410 PCI: 00:1c.4: enabled 0
694 07:14:52.263497 PCI: 00:1c.5: enabled 0
695 07:14:52.266620 PCI: 00:1c.6: enabled 1
696 07:14:52.269598 PCI: 00:1c.7: enabled 0
697 07:14:52.273113 PCI: 00:1d.0: enabled 1
698 07:14:52.273199 PCI: 00:1d.1: enabled 0
699 07:14:52.276467 PCI: 00:1d.2: enabled 1
700 07:14:52.279740 PCI: 00:1d.3: enabled 0
701 07:14:52.283479 PCI: 00:1e.0: enabled 1
702 07:14:52.283569 PCI: 00:1e.1: enabled 0
703 07:14:52.286860 PCI: 00:1e.2: enabled 1
704 07:14:52.289900 PCI: 00:1e.3: enabled 1
705 07:14:52.289986 PCI: 00:1f.0: enabled 1
706 07:14:52.293402 PCI: 00:1f.1: enabled 0
707 07:14:52.296523 PCI: 00:1f.2: enabled 1
708 07:14:52.300040 PCI: 00:1f.3: enabled 1
709 07:14:52.300126 PCI: 00:1f.4: enabled 0
710 07:14:52.303170 PCI: 00:1f.5: enabled 1
711 07:14:52.306458 PCI: 00:1f.6: enabled 0
712 07:14:52.309661 PCI: 00:1f.7: enabled 0
713 07:14:52.309746 APIC: 00: enabled 1
714 07:14:52.313652 GENERIC: 0.0: enabled 1
715 07:14:52.316653 GENERIC: 0.0: enabled 1
716 07:14:52.316740 GENERIC: 1.0: enabled 1
717 07:14:52.319963 GENERIC: 0.0: enabled 1
718 07:14:52.323123 GENERIC: 1.0: enabled 1
719 07:14:52.326618 USB0 port 0: enabled 1
720 07:14:52.326700 GENERIC: 0.0: enabled 1
721 07:14:52.329812 USB0 port 0: enabled 1
722 07:14:52.332903 GENERIC: 0.0: enabled 1
723 07:14:52.332989 I2C: 00:1a: enabled 1
724 07:14:52.336643 I2C: 00:31: enabled 1
725 07:14:52.339934 I2C: 00:32: enabled 1
726 07:14:52.343043 I2C: 00:10: enabled 1
727 07:14:52.343119 I2C: 00:15: enabled 1
728 07:14:52.346488 GENERIC: 0.0: enabled 0
729 07:14:52.350046 GENERIC: 1.0: enabled 0
730 07:14:52.350135 GENERIC: 0.0: enabled 1
731 07:14:52.352828 SPI: 00: enabled 1
732 07:14:52.356515 SPI: 00: enabled 1
733 07:14:52.356593 PNP: 0c09.0: enabled 1
734 07:14:52.359774 GENERIC: 0.0: enabled 1
735 07:14:52.363435 USB3 port 0: enabled 1
736 07:14:52.363515 USB3 port 1: enabled 1
737 07:14:52.366425 USB3 port 2: enabled 0
738 07:14:52.369874 USB3 port 3: enabled 0
739 07:14:52.372920 USB2 port 0: enabled 0
740 07:14:52.372997 USB2 port 1: enabled 1
741 07:14:52.376626 USB2 port 2: enabled 1
742 07:14:52.380020 USB2 port 3: enabled 0
743 07:14:52.380102 USB2 port 4: enabled 1
744 07:14:52.382954 USB2 port 5: enabled 0
745 07:14:52.386018 USB2 port 6: enabled 0
746 07:14:52.386099 USB2 port 7: enabled 0
747 07:14:52.389970 USB2 port 8: enabled 0
748 07:14:52.392790 USB2 port 9: enabled 0
749 07:14:52.396284 USB3 port 0: enabled 0
750 07:14:52.396370 USB3 port 1: enabled 1
751 07:14:52.399786 USB3 port 2: enabled 0
752 07:14:52.403227 USB3 port 3: enabled 0
753 07:14:52.403308 GENERIC: 0.0: enabled 1
754 07:14:52.406118 GENERIC: 1.0: enabled 1
755 07:14:52.409628 APIC: 01: enabled 1
756 07:14:52.409706 APIC: 03: enabled 1
757 07:14:52.413051 APIC: 07: enabled 1
758 07:14:52.416359 APIC: 05: enabled 1
759 07:14:52.416437 APIC: 04: enabled 1
760 07:14:52.419574 APIC: 02: enabled 1
761 07:14:52.422604 APIC: 06: enabled 1
762 07:14:52.422690 Compare with tree...
763 07:14:52.425971 Root Device: enabled 1
764 07:14:52.430058 DOMAIN: 0000: enabled 1
765 07:14:52.430138 PCI: 00:00.0: enabled 1
766 07:14:52.432850 PCI: 00:02.0: enabled 1
767 07:14:52.436392 PCI: 00:04.0: enabled 1
768 07:14:52.439509 GENERIC: 0.0: enabled 1
769 07:14:52.443049 PCI: 00:05.0: enabled 1
770 07:14:52.443129 PCI: 00:06.0: enabled 0
771 07:14:52.446087 PCI: 00:07.0: enabled 0
772 07:14:52.449390 GENERIC: 0.0: enabled 1
773 07:14:52.452978 PCI: 00:07.1: enabled 0
774 07:14:52.455802 GENERIC: 1.0: enabled 1
775 07:14:52.455880 PCI: 00:07.2: enabled 0
776 07:14:52.459297 GENERIC: 0.0: enabled 1
777 07:14:52.462441 PCI: 00:07.3: enabled 0
778 07:14:52.465919 GENERIC: 1.0: enabled 1
779 07:14:52.469112 PCI: 00:08.0: enabled 1
780 07:14:52.469189 PCI: 00:09.0: enabled 0
781 07:14:52.472658 PCI: 00:0a.0: enabled 0
782 07:14:52.476036 PCI: 00:0d.0: enabled 1
783 07:14:52.479128 USB0 port 0: enabled 1
784 07:14:52.482860 USB3 port 0: enabled 1
785 07:14:52.485613 USB3 port 1: enabled 1
786 07:14:52.485700 USB3 port 2: enabled 0
787 07:14:52.489377 USB3 port 3: enabled 0
788 07:14:52.492823 PCI: 00:0d.1: enabled 0
789 07:14:52.495831 PCI: 00:0d.2: enabled 0
790 07:14:52.499240 GENERIC: 0.0: enabled 1
791 07:14:52.499330 PCI: 00:0d.3: enabled 0
792 07:14:52.502695 PCI: 00:0e.0: enabled 0
793 07:14:52.506267 PCI: 00:10.2: enabled 1
794 07:14:52.509366 PCI: 00:10.6: enabled 0
795 07:14:52.512529 PCI: 00:10.7: enabled 0
796 07:14:52.512632 PCI: 00:12.0: enabled 0
797 07:14:52.515900 PCI: 00:12.6: enabled 0
798 07:14:52.519182 PCI: 00:13.0: enabled 0
799 07:14:52.522253 PCI: 00:14.0: enabled 1
800 07:14:52.525592 USB0 port 0: enabled 1
801 07:14:52.525672 USB2 port 0: enabled 0
802 07:14:52.530023 USB2 port 1: enabled 1
803 07:14:52.533689 USB2 port 2: enabled 1
804 07:14:52.537326 USB2 port 3: enabled 0
805 07:14:52.537412 USB2 port 4: enabled 1
806 07:14:52.540485 USB2 port 5: enabled 0
807 07:14:52.543807 USB2 port 6: enabled 0
808 07:14:52.547072 USB2 port 7: enabled 0
809 07:14:52.547158 USB2 port 8: enabled 0
810 07:14:52.550727 USB2 port 9: enabled 0
811 07:14:52.553916 USB3 port 0: enabled 0
812 07:14:52.557200 USB3 port 1: enabled 1
813 07:14:52.560622 USB3 port 2: enabled 0
814 07:14:52.563849 USB3 port 3: enabled 0
815 07:14:52.563935 PCI: 00:14.1: enabled 0
816 07:14:52.567606 PCI: 00:14.2: enabled 1
817 07:14:52.570313 PCI: 00:14.3: enabled 1
818 07:14:52.573724 GENERIC: 0.0: enabled 1
819 07:14:52.577303 PCI: 00:15.0: enabled 1
820 07:14:52.577388 I2C: 00:1a: enabled 1
821 07:14:52.580626 I2C: 00:31: enabled 1
822 07:14:52.630556 I2C: 00:32: enabled 1
823 07:14:52.630661 PCI: 00:15.1: enabled 1
824 07:14:52.630919 I2C: 00:10: enabled 1
825 07:14:52.630996 PCI: 00:15.2: enabled 1
826 07:14:52.631065 PCI: 00:15.3: enabled 1
827 07:14:52.631371 PCI: 00:16.0: enabled 1
828 07:14:52.631442 PCI: 00:16.1: enabled 0
829 07:14:52.631723 PCI: 00:16.2: enabled 0
830 07:14:52.631793 PCI: 00:16.3: enabled 0
831 07:14:52.631854 PCI: 00:16.4: enabled 0
832 07:14:52.632099 PCI: 00:16.5: enabled 0
833 07:14:52.632165 PCI: 00:17.0: enabled 1
834 07:14:52.632625 PCI: 00:19.0: enabled 0
835 07:14:52.632711 PCI: 00:19.1: enabled 1
836 07:14:52.633524 I2C: 00:15: enabled 1
837 07:14:52.633609 PCI: 00:19.2: enabled 0
838 07:14:52.633677 PCI: 00:1d.0: enabled 1
839 07:14:52.633934 GENERIC: 0.0: enabled 1
840 07:14:52.634005 PCI: 00:1e.0: enabled 1
841 07:14:52.680475 PCI: 00:1e.1: enabled 0
842 07:14:52.680568 PCI: 00:1e.2: enabled 1
843 07:14:52.680637 SPI: 00: enabled 1
844 07:14:52.680889 PCI: 00:1e.3: enabled 1
845 07:14:52.680965 SPI: 00: enabled 1
846 07:14:52.681030 PCI: 00:1f.0: enabled 1
847 07:14:52.681091 PNP: 0c09.0: enabled 1
848 07:14:52.681343 PCI: 00:1f.1: enabled 0
849 07:14:52.681410 PCI: 00:1f.2: enabled 1
850 07:14:52.681515 GENERIC: 0.0: enabled 1
851 07:14:52.681611 GENERIC: 0.0: enabled 1
852 07:14:52.681738 GENERIC: 1.0: enabled 1
853 07:14:52.682005 PCI: 00:1f.3: enabled 1
854 07:14:52.682075 PCI: 00:1f.4: enabled 0
855 07:14:52.682323 PCI: 00:1f.5: enabled 1
856 07:14:52.682393 PCI: 00:1f.6: enabled 0
857 07:14:52.682452 PCI: 00:1f.7: enabled 0
858 07:14:52.682692 CPU_CLUSTER: 0: enabled 1
859 07:14:52.682756 APIC: 00: enabled 1
860 07:14:52.732388 APIC: 01: enabled 1
861 07:14:52.732503 APIC: 03: enabled 1
862 07:14:52.732577 APIC: 07: enabled 1
863 07:14:52.732834 APIC: 05: enabled 1
864 07:14:52.732904 APIC: 04: enabled 1
865 07:14:52.732967 APIC: 02: enabled 1
866 07:14:52.733327 APIC: 06: enabled 1
867 07:14:52.733413 Root Device scanning...
868 07:14:52.733714 scan_static_bus for Root Device
869 07:14:52.733820 DOMAIN: 0000 enabled
870 07:14:52.733884 CPU_CLUSTER: 0 enabled
871 07:14:52.734128 DOMAIN: 0000 scanning...
872 07:14:52.734195 PCI: pci_scan_bus for bus 00
873 07:14:52.734257 PCI: 00:00.0 [8086/0000] ops
874 07:14:52.734317 PCI: 00:00.0 [8086/9a12] enabled
875 07:14:52.734672 PCI: 00:02.0 [8086/0000] bus ops
876 07:14:52.734759 PCI: 00:02.0 [8086/9a40] enabled
877 07:14:52.735018 PCI: 00:04.0 [8086/0000] bus ops
878 07:14:52.735091 PCI: 00:04.0 [8086/9a03] enabled
879 07:14:52.753214 PCI: 00:05.0 [8086/9a19] enabled
880 07:14:52.753302 PCI: 00:07.0 [0000/0000] hidden
881 07:14:52.753827 PCI: 00:08.0 [8086/9a11] enabled
882 07:14:52.753913 PCI: 00:0a.0 [8086/9a0d] disabled
883 07:14:52.754441 PCI: 00:0d.0 [8086/0000] bus ops
884 07:14:52.756777 PCI: 00:0d.0 [8086/9a13] enabled
885 07:14:52.756863 PCI: 00:14.0 [8086/0000] bus ops
886 07:14:52.760052 PCI: 00:14.0 [8086/a0ed] enabled
887 07:14:52.763977 PCI: 00:14.2 [8086/a0ef] enabled
888 07:14:52.766709 PCI: 00:14.3 [8086/0000] bus ops
889 07:14:52.770015 PCI: 00:14.3 [8086/a0f0] enabled
890 07:14:52.773320 PCI: 00:15.0 [8086/0000] bus ops
891 07:14:52.776939 PCI: 00:15.0 [8086/a0e8] enabled
892 07:14:52.779966 PCI: 00:15.1 [8086/0000] bus ops
893 07:14:52.783565 PCI: 00:15.1 [8086/a0e9] enabled
894 07:14:52.786670 PCI: 00:15.2 [8086/0000] bus ops
895 07:14:52.789792 PCI: 00:15.2 [8086/a0ea] enabled
896 07:14:52.793808 PCI: 00:15.3 [8086/0000] bus ops
897 07:14:52.796553 PCI: 00:15.3 [8086/a0eb] enabled
898 07:14:52.800277 PCI: 00:16.0 [8086/0000] ops
899 07:14:52.803497 PCI: 00:16.0 [8086/a0e0] enabled
900 07:14:52.810015 PCI: Static device PCI: 00:17.0 not found, disabling it.
901 07:14:52.813226 PCI: 00:19.0 [8086/0000] bus ops
902 07:14:52.816745 PCI: 00:19.0 [8086/a0c5] disabled
903 07:14:52.819678 PCI: 00:19.1 [8086/0000] bus ops
904 07:14:52.823158 PCI: 00:19.1 [8086/a0c6] enabled
905 07:14:52.826576 PCI: 00:1d.0 [8086/0000] bus ops
906 07:14:52.830093 PCI: 00:1d.0 [8086/a0b0] enabled
907 07:14:52.830175 PCI: 00:1e.0 [8086/0000] ops
908 07:14:52.833104 PCI: 00:1e.0 [8086/a0a8] enabled
909 07:14:52.836647 PCI: 00:1e.2 [8086/0000] bus ops
910 07:14:52.843326 PCI: 00:1e.2 [8086/a0aa] enabled
911 07:14:52.846508 PCI: 00:1e.3 [8086/0000] bus ops
912 07:14:52.849698 PCI: 00:1e.3 [8086/a0ab] enabled
913 07:14:52.853219 PCI: 00:1f.0 [8086/0000] bus ops
914 07:14:52.856465 PCI: 00:1f.0 [8086/a087] enabled
915 07:14:52.856546 RTC Init
916 07:14:52.859949 Set power on after power failure.
917 07:14:52.863012 Disabling Deep S3
918 07:14:52.863097 Disabling Deep S3
919 07:14:52.866753 Disabling Deep S4
920 07:14:52.866834 Disabling Deep S4
921 07:14:52.869982 Disabling Deep S5
922 07:14:52.870061 Disabling Deep S5
923 07:14:52.872787 PCI: 00:1f.2 [0000/0000] hidden
924 07:14:52.876710 PCI: 00:1f.3 [8086/0000] bus ops
925 07:14:52.879883 PCI: 00:1f.3 [8086/a0c8] enabled
926 07:14:52.883283 PCI: 00:1f.5 [8086/0000] bus ops
927 07:14:52.886641 PCI: 00:1f.5 [8086/a0a4] enabled
928 07:14:52.889891 PCI: Leftover static devices:
929 07:14:52.893255 PCI: 00:10.2
930 07:14:52.893343 PCI: 00:10.6
931 07:14:52.896694 PCI: 00:10.7
932 07:14:52.896768 PCI: 00:06.0
933 07:14:52.896832 PCI: 00:07.1
934 07:14:52.899837 PCI: 00:07.2
935 07:14:52.899916 PCI: 00:07.3
936 07:14:52.903068 PCI: 00:09.0
937 07:14:52.903152 PCI: 00:0d.1
938 07:14:52.903217 PCI: 00:0d.2
939 07:14:52.906495 PCI: 00:0d.3
940 07:14:52.906583 PCI: 00:0e.0
941 07:14:52.909601 PCI: 00:12.0
942 07:14:52.909685 PCI: 00:12.6
943 07:14:52.909751 PCI: 00:13.0
944 07:14:52.913040 PCI: 00:14.1
945 07:14:52.913124 PCI: 00:16.1
946 07:14:52.916518 PCI: 00:16.2
947 07:14:52.916602 PCI: 00:16.3
948 07:14:52.919584 PCI: 00:16.4
949 07:14:52.919669 PCI: 00:16.5
950 07:14:52.919736 PCI: 00:17.0
951 07:14:52.922950 PCI: 00:19.2
952 07:14:52.923035 PCI: 00:1e.1
953 07:14:52.926350 PCI: 00:1f.1
954 07:14:52.926434 PCI: 00:1f.4
955 07:14:52.926501 PCI: 00:1f.6
956 07:14:52.929457 PCI: 00:1f.7
957 07:14:52.933213 PCI: Check your devicetree.cb.
958 07:14:52.936438 PCI: 00:02.0 scanning...
959 07:14:52.939603 scan_generic_bus for PCI: 00:02.0
960 07:14:52.943126 scan_generic_bus for PCI: 00:02.0 done
961 07:14:52.946143 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
962 07:14:52.949817 PCI: 00:04.0 scanning...
963 07:14:52.952820 scan_generic_bus for PCI: 00:04.0
964 07:14:52.956055 GENERIC: 0.0 enabled
965 07:14:52.962644 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
966 07:14:52.966349 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
967 07:14:52.968954 PCI: 00:0d.0 scanning...
968 07:14:52.972504 scan_static_bus for PCI: 00:0d.0
969 07:14:52.975875 USB0 port 0 enabled
970 07:14:52.975953 USB0 port 0 scanning...
971 07:14:52.979262 scan_static_bus for USB0 port 0
972 07:14:52.982335 USB3 port 0 enabled
973 07:14:52.985839 USB3 port 1 enabled
974 07:14:52.985926 USB3 port 2 disabled
975 07:14:52.988973 USB3 port 3 disabled
976 07:14:52.992662 USB3 port 0 scanning...
977 07:14:52.995541 scan_static_bus for USB3 port 0
978 07:14:52.998769 scan_static_bus for USB3 port 0 done
979 07:14:53.002642 scan_bus: bus USB3 port 0 finished in 6 msecs
980 07:14:53.005614 USB3 port 1 scanning...
981 07:14:53.008775 scan_static_bus for USB3 port 1
982 07:14:53.012264 scan_static_bus for USB3 port 1 done
983 07:14:53.015688 scan_bus: bus USB3 port 1 finished in 6 msecs
984 07:14:53.022360 scan_static_bus for USB0 port 0 done
985 07:14:53.025820 scan_bus: bus USB0 port 0 finished in 43 msecs
986 07:14:53.028964 scan_static_bus for PCI: 00:0d.0 done
987 07:14:53.035552 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
988 07:14:53.035631 PCI: 00:14.0 scanning...
989 07:14:53.039027 scan_static_bus for PCI: 00:14.0
990 07:14:53.042071 USB0 port 0 enabled
991 07:14:53.045332 USB0 port 0 scanning...
992 07:14:53.049014 scan_static_bus for USB0 port 0
993 07:14:53.049107 USB2 port 0 disabled
994 07:14:53.052146 USB2 port 1 enabled
995 07:14:53.055277 USB2 port 2 enabled
996 07:14:53.055387 USB2 port 3 disabled
997 07:14:53.058622 USB2 port 4 enabled
998 07:14:53.062051 USB2 port 5 disabled
999 07:14:53.062131 USB2 port 6 disabled
1000 07:14:53.065640 USB2 port 7 disabled
1001 07:14:53.065725 USB2 port 8 disabled
1002 07:14:53.068933 USB2 port 9 disabled
1003 07:14:53.072199 USB3 port 0 disabled
1004 07:14:53.072283 USB3 port 1 enabled
1005 07:14:53.075754 USB3 port 2 disabled
1006 07:14:53.079000 USB3 port 3 disabled
1007 07:14:53.079083 USB2 port 1 scanning...
1008 07:14:53.082534 scan_static_bus for USB2 port 1
1009 07:14:53.088626 scan_static_bus for USB2 port 1 done
1010 07:14:53.091987 scan_bus: bus USB2 port 1 finished in 6 msecs
1011 07:14:53.095259 USB2 port 2 scanning...
1012 07:14:53.098667 scan_static_bus for USB2 port 2
1013 07:14:53.101953 scan_static_bus for USB2 port 2 done
1014 07:14:53.105267 scan_bus: bus USB2 port 2 finished in 6 msecs
1015 07:14:53.109087 USB2 port 4 scanning...
1016 07:14:53.112879 scan_static_bus for USB2 port 4
1017 07:14:53.115954 scan_static_bus for USB2 port 4 done
1018 07:14:53.119291 scan_bus: bus USB2 port 4 finished in 6 msecs
1019 07:14:53.122693 USB3 port 1 scanning...
1020 07:14:53.125758 scan_static_bus for USB3 port 1
1021 07:14:53.129268 scan_static_bus for USB3 port 1 done
1022 07:14:53.136045 scan_bus: bus USB3 port 1 finished in 6 msecs
1023 07:14:53.139194 scan_static_bus for USB0 port 0 done
1024 07:14:53.142273 scan_bus: bus USB0 port 0 finished in 93 msecs
1025 07:14:53.146086 scan_static_bus for PCI: 00:14.0 done
1026 07:14:53.152756 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1027 07:14:53.155887 PCI: 00:14.3 scanning...
1028 07:14:53.158944 scan_static_bus for PCI: 00:14.3
1029 07:14:53.159024 GENERIC: 0.0 enabled
1030 07:14:53.162329 scan_static_bus for PCI: 00:14.3 done
1031 07:14:53.169319 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1032 07:14:53.172578 PCI: 00:15.0 scanning...
1033 07:14:53.176191 scan_static_bus for PCI: 00:15.0
1034 07:14:53.176278 I2C: 00:1a enabled
1035 07:14:53.178862 I2C: 00:31 enabled
1036 07:14:53.178958 I2C: 00:32 enabled
1037 07:14:53.185522 scan_static_bus for PCI: 00:15.0 done
1038 07:14:53.188900 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1039 07:14:53.192175 PCI: 00:15.1 scanning...
1040 07:14:53.195338 scan_static_bus for PCI: 00:15.1
1041 07:14:53.195425 I2C: 00:10 enabled
1042 07:14:53.201988 scan_static_bus for PCI: 00:15.1 done
1043 07:14:53.205344 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1044 07:14:53.208491 PCI: 00:15.2 scanning...
1045 07:14:53.211790 scan_static_bus for PCI: 00:15.2
1046 07:14:53.215518 scan_static_bus for PCI: 00:15.2 done
1047 07:14:53.218825 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1048 07:14:53.222416 PCI: 00:15.3 scanning...
1049 07:14:53.225301 scan_static_bus for PCI: 00:15.3
1050 07:14:53.228612 scan_static_bus for PCI: 00:15.3 done
1051 07:14:53.235418 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1052 07:14:53.238377 PCI: 00:19.1 scanning...
1053 07:14:53.241897 scan_static_bus for PCI: 00:19.1
1054 07:14:53.241978 I2C: 00:15 enabled
1055 07:14:53.245103 scan_static_bus for PCI: 00:19.1 done
1056 07:14:53.252020 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1057 07:14:53.255120 PCI: 00:1d.0 scanning...
1058 07:14:53.258438 do_pci_scan_bridge for PCI: 00:1d.0
1059 07:14:53.261810 PCI: pci_scan_bus for bus 01
1060 07:14:53.265731 PCI: 01:00.0 [1c5c/174a] enabled
1061 07:14:53.265818 GENERIC: 0.0 enabled
1062 07:14:53.268543 Enabling Common Clock Configuration
1063 07:14:53.275292 L1 Sub-State supported from root port 29
1064 07:14:53.278319 L1 Sub-State Support = 0xf
1065 07:14:53.278399 CommonModeRestoreTime = 0x28
1066 07:14:53.285044 Power On Value = 0x16, Power On Scale = 0x0
1067 07:14:53.285129 ASPM: Enabled L1
1068 07:14:53.288324 PCIe: Max_Payload_Size adjusted to 128
1069 07:14:53.294890 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1070 07:14:53.298396 PCI: 00:1e.2 scanning...
1071 07:14:53.301470 scan_generic_bus for PCI: 00:1e.2
1072 07:14:53.301571 SPI: 00 enabled
1073 07:14:53.308286 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1074 07:14:53.315202 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1075 07:14:53.315288 PCI: 00:1e.3 scanning...
1076 07:14:53.318195 scan_generic_bus for PCI: 00:1e.3
1077 07:14:53.321313 SPI: 00 enabled
1078 07:14:53.328492 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1079 07:14:53.331308 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1080 07:14:53.335311 PCI: 00:1f.0 scanning...
1081 07:14:53.337843 scan_static_bus for PCI: 00:1f.0
1082 07:14:53.341061 PNP: 0c09.0 enabled
1083 07:14:53.341147 PNP: 0c09.0 scanning...
1084 07:14:53.345035 scan_static_bus for PNP: 0c09.0
1085 07:14:53.351189 scan_static_bus for PNP: 0c09.0 done
1086 07:14:53.354573 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1087 07:14:53.358374 scan_static_bus for PCI: 00:1f.0 done
1088 07:14:53.364613 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1089 07:14:53.364699 PCI: 00:1f.2 scanning...
1090 07:14:53.367776 scan_static_bus for PCI: 00:1f.2
1091 07:14:53.371254 GENERIC: 0.0 enabled
1092 07:14:53.374829 GENERIC: 0.0 scanning...
1093 07:14:53.377924 scan_static_bus for GENERIC: 0.0
1094 07:14:53.381347 GENERIC: 0.0 enabled
1095 07:14:53.381433 GENERIC: 1.0 enabled
1096 07:14:53.384546 scan_static_bus for GENERIC: 0.0 done
1097 07:14:53.391164 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1098 07:14:53.394636 scan_static_bus for PCI: 00:1f.2 done
1099 07:14:53.397790 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1100 07:14:53.400849 PCI: 00:1f.3 scanning...
1101 07:14:53.404428 scan_static_bus for PCI: 00:1f.3
1102 07:14:53.408167 scan_static_bus for PCI: 00:1f.3 done
1103 07:14:53.414487 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1104 07:14:53.417669 PCI: 00:1f.5 scanning...
1105 07:14:53.420920 scan_generic_bus for PCI: 00:1f.5
1106 07:14:53.424273 scan_generic_bus for PCI: 00:1f.5 done
1107 07:14:53.427716 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1108 07:14:53.434336 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1109 07:14:53.437717 scan_static_bus for Root Device done
1110 07:14:53.441095 scan_bus: bus Root Device finished in 736 msecs
1111 07:14:53.444056 done
1112 07:14:53.447837 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1113 07:14:53.450738 Chrome EC: UHEPI supported
1114 07:14:53.457699 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1115 07:14:53.464181 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1116 07:14:53.467702 SPI flash protection: WPSW=0 SRP0=0
1117 07:14:53.474174 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1118 07:14:53.477331 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1119 07:14:53.481076 found VGA at PCI: 00:02.0
1120 07:14:53.484078 Setting up VGA for PCI: 00:02.0
1121 07:14:53.491156 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1122 07:14:53.493869 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1123 07:14:53.497299 Allocating resources...
1124 07:14:53.500632 Reading resources...
1125 07:14:53.504011 Root Device read_resources bus 0 link: 0
1126 07:14:53.507297 DOMAIN: 0000 read_resources bus 0 link: 0
1127 07:14:53.514107 PCI: 00:04.0 read_resources bus 1 link: 0
1128 07:14:53.517015 PCI: 00:04.0 read_resources bus 1 link: 0 done
1129 07:14:53.523977 PCI: 00:0d.0 read_resources bus 0 link: 0
1130 07:14:53.527316 USB0 port 0 read_resources bus 0 link: 0
1131 07:14:53.533920 USB0 port 0 read_resources bus 0 link: 0 done
1132 07:14:53.537707 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1133 07:14:53.540682 PCI: 00:14.0 read_resources bus 0 link: 0
1134 07:14:53.547420 USB0 port 0 read_resources bus 0 link: 0
1135 07:14:53.550860 USB0 port 0 read_resources bus 0 link: 0 done
1136 07:14:53.557392 PCI: 00:14.0 read_resources bus 0 link: 0 done
1137 07:14:53.560703 PCI: 00:14.3 read_resources bus 0 link: 0
1138 07:14:53.567695 PCI: 00:14.3 read_resources bus 0 link: 0 done
1139 07:14:53.571056 PCI: 00:15.0 read_resources bus 0 link: 0
1140 07:14:53.578565 PCI: 00:15.0 read_resources bus 0 link: 0 done
1141 07:14:53.580909 PCI: 00:15.1 read_resources bus 0 link: 0
1142 07:14:53.587657 PCI: 00:15.1 read_resources bus 0 link: 0 done
1143 07:14:53.590797 PCI: 00:19.1 read_resources bus 0 link: 0
1144 07:14:53.597991 PCI: 00:19.1 read_resources bus 0 link: 0 done
1145 07:14:53.601187 PCI: 00:1d.0 read_resources bus 1 link: 0
1146 07:14:53.607815 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1147 07:14:53.611092 PCI: 00:1e.2 read_resources bus 2 link: 0
1148 07:14:53.617793 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1149 07:14:53.621290 PCI: 00:1e.3 read_resources bus 3 link: 0
1150 07:14:53.627958 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1151 07:14:53.631764 PCI: 00:1f.0 read_resources bus 0 link: 0
1152 07:14:53.638141 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1153 07:14:53.641166 PCI: 00:1f.2 read_resources bus 0 link: 0
1154 07:14:53.644349 GENERIC: 0.0 read_resources bus 0 link: 0
1155 07:14:53.651386 GENERIC: 0.0 read_resources bus 0 link: 0 done
1156 07:14:53.654833 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1157 07:14:53.662132 DOMAIN: 0000 read_resources bus 0 link: 0 done
1158 07:14:53.665421 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1159 07:14:53.672010 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1160 07:14:53.675964 Root Device read_resources bus 0 link: 0 done
1161 07:14:53.679156 Done reading resources.
1162 07:14:53.685740 Show resources in subtree (Root Device)...After reading.
1163 07:14:53.688909 Root Device child on link 0 DOMAIN: 0000
1164 07:14:53.691948 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1165 07:14:53.702233 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1166 07:14:53.712146 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1167 07:14:53.714960 PCI: 00:00.0
1168 07:14:53.725369 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1169 07:14:53.731665 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1170 07:14:53.741965 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1171 07:14:53.751946 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1172 07:14:53.761981 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1173 07:14:53.771551 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1174 07:14:53.781714 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1175 07:14:53.788166 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1176 07:14:53.798345 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1177 07:14:53.808146 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1178 07:14:53.817779 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1179 07:14:53.828019 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1180 07:14:53.834736 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1181 07:14:53.844521 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1182 07:14:53.854393 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1183 07:14:53.864406 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1184 07:14:53.874952 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1185 07:14:53.884310 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1186 07:14:53.891064 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1187 07:14:53.900655 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1188 07:14:53.904218 PCI: 00:02.0
1189 07:14:53.914360 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 07:14:53.924032 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1191 07:14:53.934027 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1192 07:14:53.937102 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1193 07:14:53.947491 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1194 07:14:53.950698 GENERIC: 0.0
1195 07:14:53.950785 PCI: 00:05.0
1196 07:14:53.960751 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1197 07:14:53.967305 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1198 07:14:53.967392 GENERIC: 0.0
1199 07:14:53.970214 PCI: 00:08.0
1200 07:14:53.980553 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 07:14:53.980642 PCI: 00:0a.0
1202 07:14:53.983765 PCI: 00:0d.0 child on link 0 USB0 port 0
1203 07:14:53.993934 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 07:14:54.000617 USB0 port 0 child on link 0 USB3 port 0
1205 07:14:54.000701 USB3 port 0
1206 07:14:54.003679 USB3 port 1
1207 07:14:54.003759 USB3 port 2
1208 07:14:54.006802 USB3 port 3
1209 07:14:54.010247 PCI: 00:14.0 child on link 0 USB0 port 0
1210 07:14:54.020752 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1211 07:14:54.026754 USB0 port 0 child on link 0 USB2 port 0
1212 07:14:54.026842 USB2 port 0
1213 07:14:54.030243 USB2 port 1
1214 07:14:54.030330 USB2 port 2
1215 07:14:54.033724 USB2 port 3
1216 07:14:54.033811 USB2 port 4
1217 07:14:54.037199 USB2 port 5
1218 07:14:54.037286 USB2 port 6
1219 07:14:54.040370 USB2 port 7
1220 07:14:54.040456 USB2 port 8
1221 07:14:54.043590 USB2 port 9
1222 07:14:54.043676 USB3 port 0
1223 07:14:54.046788 USB3 port 1
1224 07:14:54.046875 USB3 port 2
1225 07:14:54.050362 USB3 port 3
1226 07:14:54.050448 PCI: 00:14.2
1227 07:14:54.060004 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1228 07:14:54.070238 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1229 07:14:54.076854 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1230 07:14:54.086705 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1231 07:14:54.086806 GENERIC: 0.0
1232 07:14:54.093226 PCI: 00:15.0 child on link 0 I2C: 00:1a
1233 07:14:54.103624 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 07:14:54.103715 I2C: 00:1a
1235 07:14:54.106760 I2C: 00:31
1236 07:14:54.106848 I2C: 00:32
1237 07:14:54.109967 PCI: 00:15.1 child on link 0 I2C: 00:10
1238 07:14:54.119833 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 07:14:54.122909 I2C: 00:10
1240 07:14:54.122996 PCI: 00:15.2
1241 07:14:54.133372 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 07:14:54.136417 PCI: 00:15.3
1243 07:14:54.146204 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1244 07:14:54.146292 PCI: 00:16.0
1245 07:14:54.156300 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 07:14:54.159591 PCI: 00:19.0
1247 07:14:54.162925 PCI: 00:19.1 child on link 0 I2C: 00:15
1248 07:14:54.173088 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 07:14:54.176399 I2C: 00:15
1250 07:14:54.179579 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1251 07:14:54.189622 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1252 07:14:54.199964 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1253 07:14:54.205902 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1254 07:14:54.209158 GENERIC: 0.0
1255 07:14:54.209244 PCI: 01:00.0
1256 07:14:54.219466 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1257 07:14:54.229097 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1258 07:14:54.239057 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1259 07:14:54.242220 PCI: 00:1e.0
1260 07:14:54.252394 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1261 07:14:54.255932 PCI: 00:1e.2 child on link 0 SPI: 00
1262 07:14:54.265431 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 07:14:54.265557 SPI: 00
1264 07:14:54.272240 PCI: 00:1e.3 child on link 0 SPI: 00
1265 07:14:54.282504 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1266 07:14:54.282592 SPI: 00
1267 07:14:54.285472 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1268 07:14:54.295727 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1269 07:14:54.299437 PNP: 0c09.0
1270 07:14:54.306018 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1271 07:14:54.312515 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1272 07:14:54.318941 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1273 07:14:54.328954 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1274 07:14:54.335508 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1275 07:14:54.335593 GENERIC: 0.0
1276 07:14:54.338766 GENERIC: 1.0
1277 07:14:54.338848 PCI: 00:1f.3
1278 07:14:54.348613 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1279 07:14:54.358721 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1280 07:14:54.362041 PCI: 00:1f.5
1281 07:14:54.368836 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1282 07:14:54.375369 CPU_CLUSTER: 0 child on link 0 APIC: 00
1283 07:14:54.375464 APIC: 00
1284 07:14:54.378554 APIC: 01
1285 07:14:54.378643 APIC: 03
1286 07:14:54.378713 APIC: 07
1287 07:14:54.382446 APIC: 05
1288 07:14:54.382534 APIC: 04
1289 07:14:54.382603 APIC: 02
1290 07:14:54.385349 APIC: 06
1291 07:14:54.391566 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1292 07:14:54.398195 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1293 07:14:54.404887 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1294 07:14:54.411810 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1295 07:14:54.415028 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1296 07:14:54.418298 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1297 07:14:54.421382 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1298 07:14:54.431338 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1299 07:14:54.438173 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1300 07:14:54.445074 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1301 07:14:54.451870 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1302 07:14:54.457846 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1303 07:14:54.464843 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1304 07:14:54.475354 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1305 07:14:54.481426 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1306 07:14:54.484443 DOMAIN: 0000: Resource ranges:
1307 07:14:54.487673 * Base: 1000, Size: 800, Tag: 100
1308 07:14:54.491871 * Base: 1900, Size: e700, Tag: 100
1309 07:14:54.497899 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1310 07:14:54.504903 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1311 07:14:54.511115 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1312 07:14:54.517777 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1313 07:14:54.524191 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1314 07:14:54.534511 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1315 07:14:54.541131 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1316 07:14:54.547867 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1317 07:14:54.557327 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1318 07:14:54.564074 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1319 07:14:54.570965 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1320 07:14:54.580903 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1321 07:14:54.587155 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1322 07:14:54.594467 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1323 07:14:54.603931 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1324 07:14:54.610783 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1325 07:14:54.617225 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1326 07:14:54.627380 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1327 07:14:54.633720 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1328 07:14:54.640709 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1329 07:14:54.650188 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1330 07:14:54.657099 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1331 07:14:54.663452 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1332 07:14:54.673388 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1333 07:14:54.680175 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1334 07:14:54.683624 DOMAIN: 0000: Resource ranges:
1335 07:14:54.687156 * Base: 7fc00000, Size: 40400000, Tag: 200
1336 07:14:54.693972 * Base: d0000000, Size: 28000000, Tag: 200
1337 07:14:54.697195 * Base: fa000000, Size: 1000000, Tag: 200
1338 07:14:54.700311 * Base: fb001000, Size: 2fff000, Tag: 200
1339 07:14:54.703465 * Base: fe010000, Size: 2e000, Tag: 200
1340 07:14:54.710094 * Base: fe03f000, Size: d41000, Tag: 200
1341 07:14:54.713910 * Base: fed88000, Size: 8000, Tag: 200
1342 07:14:54.716364 * Base: fed93000, Size: d000, Tag: 200
1343 07:14:54.720303 * Base: feda2000, Size: 1e000, Tag: 200
1344 07:14:54.726660 * Base: fede0000, Size: 1220000, Tag: 200
1345 07:14:54.730076 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1346 07:14:54.736871 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1347 07:14:54.743230 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1348 07:14:54.749835 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1349 07:14:54.756085 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1350 07:14:54.762912 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1351 07:14:54.769491 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1352 07:14:54.775967 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1353 07:14:54.782951 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1354 07:14:54.789558 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1355 07:14:54.795986 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1356 07:14:54.803140 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1357 07:14:54.809204 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1358 07:14:54.815610 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1359 07:14:54.822284 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1360 07:14:54.829044 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1361 07:14:54.835962 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1362 07:14:54.842639 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1363 07:14:54.849044 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1364 07:14:54.855324 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1365 07:14:54.862105 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1366 07:14:54.868838 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1367 07:14:54.875218 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1368 07:14:54.885560 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1369 07:14:54.891953 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1370 07:14:54.895132 PCI: 00:1d.0: Resource ranges:
1371 07:14:54.898789 * Base: 7fc00000, Size: 100000, Tag: 200
1372 07:14:54.905318 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1373 07:14:54.911930 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1374 07:14:54.918456 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1375 07:14:54.928309 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1376 07:14:54.935172 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1377 07:14:54.938621 Root Device assign_resources, bus 0 link: 0
1378 07:14:54.945080 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 07:14:54.951795 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1380 07:14:54.961828 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1381 07:14:54.968209 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1382 07:14:54.978598 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1383 07:14:54.981611 PCI: 00:04.0 assign_resources, bus 1 link: 0
1384 07:14:54.984902 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 07:14:54.995177 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1386 07:14:55.001426 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1387 07:14:55.011349 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1388 07:14:55.014671 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1389 07:14:55.021228 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 07:14:55.028042 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1391 07:14:55.031196 PCI: 00:14.0 assign_resources, bus 0 link: 0
1392 07:14:55.037705 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 07:14:55.044441 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1394 07:14:55.054404 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1395 07:14:55.061236 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1396 07:14:55.067888 PCI: 00:14.3 assign_resources, bus 0 link: 0
1397 07:14:55.070825 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 07:14:55.080876 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1399 07:14:55.084267 PCI: 00:15.0 assign_resources, bus 0 link: 0
1400 07:14:55.087495 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 07:14:55.097312 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1402 07:14:55.100449 PCI: 00:15.1 assign_resources, bus 0 link: 0
1403 07:14:55.107408 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 07:14:55.113702 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1405 07:14:55.123902 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1406 07:14:55.130675 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1407 07:14:55.140634 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1408 07:14:55.143749 PCI: 00:19.1 assign_resources, bus 0 link: 0
1409 07:14:55.147019 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 07:14:55.157018 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1411 07:14:55.167137 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1412 07:14:55.176488 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1413 07:14:55.180235 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1414 07:14:55.186573 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1415 07:14:55.196673 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1416 07:14:55.203103 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1417 07:14:55.209762 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1418 07:14:55.216453 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1419 07:14:55.223154 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1420 07:14:55.226097 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 07:14:55.233368 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1422 07:14:55.239482 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1423 07:14:55.243252 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 07:14:55.249406 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1425 07:14:55.252752 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 07:14:55.259657 LPC: Trying to open IO window from 800 size 1ff
1427 07:14:55.265928 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1428 07:14:55.275653 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1429 07:14:55.282589 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1430 07:14:55.285784 DOMAIN: 0000 assign_resources, bus 0 link: 0
1431 07:14:55.292449 Root Device assign_resources, bus 0 link: 0
1432 07:14:55.296097 Done setting resources.
1433 07:14:55.302556 Show resources in subtree (Root Device)...After assigning values.
1434 07:14:55.305920 Root Device child on link 0 DOMAIN: 0000
1435 07:14:55.309511 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1436 07:14:55.319425 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1437 07:14:55.329027 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1438 07:14:55.329116 PCI: 00:00.0
1439 07:14:55.339757 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1440 07:14:55.349945 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1441 07:14:55.359409 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1442 07:14:55.369342 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1443 07:14:55.379044 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1444 07:14:55.385747 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1445 07:14:55.396160 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1446 07:14:55.405706 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1447 07:14:55.415676 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1448 07:14:55.425967 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1449 07:14:55.435786 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1450 07:14:55.442168 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1451 07:14:55.452495 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1452 07:14:55.462238 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1453 07:14:55.472023 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1454 07:14:55.482175 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1455 07:14:55.492092 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1456 07:14:55.498779 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1457 07:14:55.508602 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1458 07:14:55.519327 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1459 07:14:55.521934 PCI: 00:02.0
1460 07:14:55.532026 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1461 07:14:55.541523 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1462 07:14:55.551658 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1463 07:14:55.554768 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1464 07:14:55.564753 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1465 07:14:55.568357 GENERIC: 0.0
1466 07:14:55.568803 PCI: 00:05.0
1467 07:14:55.581752 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1468 07:14:55.584965 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1469 07:14:55.588641 GENERIC: 0.0
1470 07:14:55.589091 PCI: 00:08.0
1471 07:14:55.598248 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1472 07:14:55.601362 PCI: 00:0a.0
1473 07:14:55.604686 PCI: 00:0d.0 child on link 0 USB0 port 0
1474 07:14:55.615475 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1475 07:14:55.618427 USB0 port 0 child on link 0 USB3 port 0
1476 07:14:55.621589 USB3 port 0
1477 07:14:55.622099 USB3 port 1
1478 07:14:55.624754 USB3 port 2
1479 07:14:55.627947 USB3 port 3
1480 07:14:55.631235 PCI: 00:14.0 child on link 0 USB0 port 0
1481 07:14:55.641522 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1482 07:14:55.644981 USB0 port 0 child on link 0 USB2 port 0
1483 07:14:55.648218 USB2 port 0
1484 07:14:55.648669 USB2 port 1
1485 07:14:55.651513 USB2 port 2
1486 07:14:55.651962 USB2 port 3
1487 07:14:55.654559 USB2 port 4
1488 07:14:55.657923 USB2 port 5
1489 07:14:55.658373 USB2 port 6
1490 07:14:55.661132 USB2 port 7
1491 07:14:55.661634 USB2 port 8
1492 07:14:55.664861 USB2 port 9
1493 07:14:55.665314 USB3 port 0
1494 07:14:55.667905 USB3 port 1
1495 07:14:55.668393 USB3 port 2
1496 07:14:55.671207 USB3 port 3
1497 07:14:55.671657 PCI: 00:14.2
1498 07:14:55.681003 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1499 07:14:55.694031 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1500 07:14:55.697916 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1501 07:14:55.707729 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1502 07:14:55.710887 GENERIC: 0.0
1503 07:14:55.714084 PCI: 00:15.0 child on link 0 I2C: 00:1a
1504 07:14:55.724360 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1505 07:14:55.726953 I2C: 00:1a
1506 07:14:55.727447 I2C: 00:31
1507 07:14:55.727804 I2C: 00:32
1508 07:14:55.733995 PCI: 00:15.1 child on link 0 I2C: 00:10
1509 07:14:55.744404 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1510 07:14:55.744916 I2C: 00:10
1511 07:14:55.747314 PCI: 00:15.2
1512 07:14:55.757209 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1513 07:14:55.757748 PCI: 00:15.3
1514 07:14:55.770380 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1515 07:14:55.770834 PCI: 00:16.0
1516 07:14:55.780557 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1517 07:14:55.784151 PCI: 00:19.0
1518 07:14:55.787074 PCI: 00:19.1 child on link 0 I2C: 00:15
1519 07:14:55.796869 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1520 07:14:55.800459 I2C: 00:15
1521 07:14:55.803722 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1522 07:14:55.813497 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1523 07:14:55.823277 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1524 07:14:55.833113 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1525 07:14:55.836542 GENERIC: 0.0
1526 07:14:55.840071 PCI: 01:00.0
1527 07:14:55.849906 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1528 07:14:55.860050 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1529 07:14:55.870045 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1530 07:14:55.870506 PCI: 00:1e.0
1531 07:14:55.883365 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1532 07:14:55.886765 PCI: 00:1e.2 child on link 0 SPI: 00
1533 07:14:55.896325 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1534 07:14:55.896798 SPI: 00
1535 07:14:55.903461 PCI: 00:1e.3 child on link 0 SPI: 00
1536 07:14:55.913350 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1537 07:14:55.913875 SPI: 00
1538 07:14:55.919680 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1539 07:14:55.926578 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1540 07:14:55.929859 PNP: 0c09.0
1541 07:14:55.936626 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1542 07:14:55.942612 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1543 07:14:55.949315 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1544 07:14:55.959415 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1545 07:14:55.966387 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1546 07:14:55.966840 GENERIC: 0.0
1547 07:14:55.969329 GENERIC: 1.0
1548 07:14:55.969815 PCI: 00:1f.3
1549 07:14:55.979864 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1550 07:14:55.992739 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1551 07:14:55.993227 PCI: 00:1f.5
1552 07:14:56.002729 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1553 07:14:56.005920 CPU_CLUSTER: 0 child on link 0 APIC: 00
1554 07:14:56.009084 APIC: 00
1555 07:14:56.009583 APIC: 01
1556 07:14:56.012955 APIC: 03
1557 07:14:56.013412 APIC: 07
1558 07:14:56.013894 APIC: 05
1559 07:14:56.015789 APIC: 04
1560 07:14:56.016243 APIC: 02
1561 07:14:56.016689 APIC: 06
1562 07:14:56.019821 Done allocating resources.
1563 07:14:56.026174 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1564 07:14:56.032331 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1565 07:14:56.035739 Configure GPIOs for I2S audio on UP4.
1566 07:14:56.042847 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1567 07:14:56.045966 Enabling resources...
1568 07:14:56.049393 PCI: 00:00.0 subsystem <- 8086/9a12
1569 07:14:56.052672 PCI: 00:00.0 cmd <- 06
1570 07:14:56.056146 PCI: 00:02.0 subsystem <- 8086/9a40
1571 07:14:56.059015 PCI: 00:02.0 cmd <- 03
1572 07:14:56.062868 PCI: 00:04.0 subsystem <- 8086/9a03
1573 07:14:56.065472 PCI: 00:04.0 cmd <- 02
1574 07:14:56.068791 PCI: 00:05.0 subsystem <- 8086/9a19
1575 07:14:56.068880 PCI: 00:05.0 cmd <- 02
1576 07:14:56.075368 PCI: 00:08.0 subsystem <- 8086/9a11
1577 07:14:56.075488 PCI: 00:08.0 cmd <- 06
1578 07:14:56.078613 PCI: 00:0d.0 subsystem <- 8086/9a13
1579 07:14:56.082274 PCI: 00:0d.0 cmd <- 02
1580 07:14:56.085119 PCI: 00:14.0 subsystem <- 8086/a0ed
1581 07:14:56.088918 PCI: 00:14.0 cmd <- 02
1582 07:14:56.092328 PCI: 00:14.2 subsystem <- 8086/a0ef
1583 07:14:56.095050 PCI: 00:14.2 cmd <- 02
1584 07:14:56.099005 PCI: 00:14.3 subsystem <- 8086/a0f0
1585 07:14:56.101795 PCI: 00:14.3 cmd <- 02
1586 07:14:56.105127 PCI: 00:15.0 subsystem <- 8086/a0e8
1587 07:14:56.108333 PCI: 00:15.0 cmd <- 02
1588 07:14:56.111884 PCI: 00:15.1 subsystem <- 8086/a0e9
1589 07:14:56.115650 PCI: 00:15.1 cmd <- 02
1590 07:14:56.118273 PCI: 00:15.2 subsystem <- 8086/a0ea
1591 07:14:56.118362 PCI: 00:15.2 cmd <- 02
1592 07:14:56.125153 PCI: 00:15.3 subsystem <- 8086/a0eb
1593 07:14:56.125242 PCI: 00:15.3 cmd <- 02
1594 07:14:56.128570 PCI: 00:16.0 subsystem <- 8086/a0e0
1595 07:14:56.131937 PCI: 00:16.0 cmd <- 02
1596 07:14:56.134750 PCI: 00:19.1 subsystem <- 8086/a0c6
1597 07:14:56.138072 PCI: 00:19.1 cmd <- 02
1598 07:14:56.141874 PCI: 00:1d.0 bridge ctrl <- 0013
1599 07:14:56.144701 PCI: 00:1d.0 subsystem <- 8086/a0b0
1600 07:14:56.148325 PCI: 00:1d.0 cmd <- 06
1601 07:14:56.151618 PCI: 00:1e.0 subsystem <- 8086/a0a8
1602 07:14:56.154726 PCI: 00:1e.0 cmd <- 06
1603 07:14:56.158454 PCI: 00:1e.2 subsystem <- 8086/a0aa
1604 07:14:56.161688 PCI: 00:1e.2 cmd <- 06
1605 07:14:56.165050 PCI: 00:1e.3 subsystem <- 8086/a0ab
1606 07:14:56.168347 PCI: 00:1e.3 cmd <- 02
1607 07:14:56.171259 PCI: 00:1f.0 subsystem <- 8086/a087
1608 07:14:56.171340 PCI: 00:1f.0 cmd <- 407
1609 07:14:56.178169 PCI: 00:1f.3 subsystem <- 8086/a0c8
1610 07:14:56.178255 PCI: 00:1f.3 cmd <- 02
1611 07:14:56.181792 PCI: 00:1f.5 subsystem <- 8086/a0a4
1612 07:14:56.184555 PCI: 00:1f.5 cmd <- 406
1613 07:14:56.189416 PCI: 01:00.0 cmd <- 02
1614 07:14:56.194474 done.
1615 07:14:56.197704 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1616 07:14:56.201174 Initializing devices...
1617 07:14:56.204474 Root Device init
1618 07:14:56.207740 Chrome EC: Set SMI mask to 0x0000000000000000
1619 07:14:56.214491 Chrome EC: clear events_b mask to 0x0000000000000000
1620 07:14:56.220661 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1621 07:14:56.224127 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1622 07:14:56.230414 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1623 07:14:56.237500 Chrome EC: Set WAKE mask to 0x0000000000000000
1624 07:14:56.240905 fw_config match found: DB_USB=USB3_ACTIVE
1625 07:14:56.247358 Configure Right Type-C port orientation for retimer
1626 07:14:56.250771 Root Device init finished in 43 msecs
1627 07:14:56.254008 PCI: 00:00.0 init
1628 07:14:56.257181 CPU TDP = 9 Watts
1629 07:14:56.257268 CPU PL1 = 9 Watts
1630 07:14:56.260502 CPU PL2 = 40 Watts
1631 07:14:56.260588 CPU PL4 = 83 Watts
1632 07:14:56.263775 PCI: 00:00.0 init finished in 8 msecs
1633 07:14:56.267387 PCI: 00:02.0 init
1634 07:14:56.270668 GMA: Found VBT in CBFS
1635 07:14:56.273948 GMA: Found valid VBT in CBFS
1636 07:14:56.277476 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1637 07:14:56.287384 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1638 07:14:56.290644 PCI: 00:02.0 init finished in 18 msecs
1639 07:14:56.293891 PCI: 00:05.0 init
1640 07:14:56.297645 PCI: 00:05.0 init finished in 0 msecs
1641 07:14:56.297721 PCI: 00:08.0 init
1642 07:14:56.303877 PCI: 00:08.0 init finished in 0 msecs
1643 07:14:56.303958 PCI: 00:14.0 init
1644 07:14:56.310548 PCI: 00:14.0 init finished in 0 msecs
1645 07:14:56.310631 PCI: 00:14.2 init
1646 07:14:56.313713 PCI: 00:14.2 init finished in 0 msecs
1647 07:14:56.317508 PCI: 00:15.0 init
1648 07:14:56.320877 I2C bus 0 version 0x3230302a
1649 07:14:56.324414 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1650 07:14:56.327693 PCI: 00:15.0 init finished in 6 msecs
1651 07:14:56.330862 PCI: 00:15.1 init
1652 07:14:56.334520 I2C bus 1 version 0x3230302a
1653 07:14:56.337326 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1654 07:14:56.340598 PCI: 00:15.1 init finished in 6 msecs
1655 07:14:56.344345 PCI: 00:15.2 init
1656 07:14:56.347702 I2C bus 2 version 0x3230302a
1657 07:14:56.350773 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1658 07:14:56.354187 PCI: 00:15.2 init finished in 6 msecs
1659 07:14:56.354266 PCI: 00:15.3 init
1660 07:14:56.357375 I2C bus 3 version 0x3230302a
1661 07:14:56.360748 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1662 07:14:56.367689 PCI: 00:15.3 init finished in 6 msecs
1663 07:14:56.367813 PCI: 00:16.0 init
1664 07:14:56.370537 PCI: 00:16.0 init finished in 0 msecs
1665 07:14:56.374325 PCI: 00:19.1 init
1666 07:14:56.377833 I2C bus 5 version 0x3230302a
1667 07:14:56.380793 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1668 07:14:56.384394 PCI: 00:19.1 init finished in 6 msecs
1669 07:14:56.387568 PCI: 00:1d.0 init
1670 07:14:56.391358 Initializing PCH PCIe bridge.
1671 07:14:56.394454 PCI: 00:1d.0 init finished in 3 msecs
1672 07:14:56.397409 PCI: 00:1f.0 init
1673 07:14:56.400572 IOAPIC: Initializing IOAPIC at 0xfec00000
1674 07:14:56.407494 IOAPIC: Bootstrap Processor Local APIC = 0x00
1675 07:14:56.407584 IOAPIC: ID = 0x02
1676 07:14:56.410604 IOAPIC: Dumping registers
1677 07:14:56.414341 reg 0x0000: 0x02000000
1678 07:14:56.414430 reg 0x0001: 0x00770020
1679 07:14:56.417409 reg 0x0002: 0x00000000
1680 07:14:56.420764 PCI: 00:1f.0 init finished in 21 msecs
1681 07:14:56.424785 PCI: 00:1f.2 init
1682 07:14:56.428097 Disabling ACPI via APMC.
1683 07:14:56.431308 APMC done.
1684 07:14:56.434342 PCI: 00:1f.2 init finished in 6 msecs
1685 07:14:56.446403 PCI: 01:00.0 init
1686 07:14:56.449324 PCI: 01:00.0 init finished in 0 msecs
1687 07:14:56.452708 PNP: 0c09.0 init
1688 07:14:56.456102 Google Chrome EC uptime: 8.527 seconds
1689 07:14:56.462601 Google Chrome AP resets since EC boot: 1
1690 07:14:56.466051 Google Chrome most recent AP reset causes:
1691 07:14:56.469158 0.381: 32775 shutdown: entering G3
1692 07:14:56.475687 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1693 07:14:56.479115 PNP: 0c09.0 init finished in 22 msecs
1694 07:14:56.484712 Devices initialized
1695 07:14:56.488210 Show all devs... After init.
1696 07:14:56.491304 Root Device: enabled 1
1697 07:14:56.491400 DOMAIN: 0000: enabled 1
1698 07:14:56.494883 CPU_CLUSTER: 0: enabled 1
1699 07:14:56.498078 PCI: 00:00.0: enabled 1
1700 07:14:56.501256 PCI: 00:02.0: enabled 1
1701 07:14:56.501335 PCI: 00:04.0: enabled 1
1702 07:14:56.504643 PCI: 00:05.0: enabled 1
1703 07:14:56.508085 PCI: 00:06.0: enabled 0
1704 07:14:56.511168 PCI: 00:07.0: enabled 0
1705 07:14:56.511249 PCI: 00:07.1: enabled 0
1706 07:14:56.514600 PCI: 00:07.2: enabled 0
1707 07:14:56.517833 PCI: 00:07.3: enabled 0
1708 07:14:56.521620 PCI: 00:08.0: enabled 1
1709 07:14:56.521698 PCI: 00:09.0: enabled 0
1710 07:14:56.524927 PCI: 00:0a.0: enabled 0
1711 07:14:56.527766 PCI: 00:0d.0: enabled 1
1712 07:14:56.531974 PCI: 00:0d.1: enabled 0
1713 07:14:56.532056 PCI: 00:0d.2: enabled 0
1714 07:14:56.535337 PCI: 00:0d.3: enabled 0
1715 07:14:56.538111 PCI: 00:0e.0: enabled 0
1716 07:14:56.538192 PCI: 00:10.2: enabled 1
1717 07:14:56.541609 PCI: 00:10.6: enabled 0
1718 07:14:56.544849 PCI: 00:10.7: enabled 0
1719 07:14:56.548133 PCI: 00:12.0: enabled 0
1720 07:14:56.548214 PCI: 00:12.6: enabled 0
1721 07:14:56.551488 PCI: 00:13.0: enabled 0
1722 07:14:56.554661 PCI: 00:14.0: enabled 1
1723 07:14:56.558095 PCI: 00:14.1: enabled 0
1724 07:14:56.558172 PCI: 00:14.2: enabled 1
1725 07:14:56.561418 PCI: 00:14.3: enabled 1
1726 07:14:56.564322 PCI: 00:15.0: enabled 1
1727 07:14:56.568241 PCI: 00:15.1: enabled 1
1728 07:14:56.568323 PCI: 00:15.2: enabled 1
1729 07:14:56.571118 PCI: 00:15.3: enabled 1
1730 07:14:56.574874 PCI: 00:16.0: enabled 1
1731 07:14:56.577990 PCI: 00:16.1: enabled 0
1732 07:14:56.578076 PCI: 00:16.2: enabled 0
1733 07:14:56.581233 PCI: 00:16.3: enabled 0
1734 07:14:56.584547 PCI: 00:16.4: enabled 0
1735 07:14:56.584640 PCI: 00:16.5: enabled 0
1736 07:14:56.587838 PCI: 00:17.0: enabled 0
1737 07:14:56.591479 PCI: 00:19.0: enabled 0
1738 07:14:56.594590 PCI: 00:19.1: enabled 1
1739 07:14:56.594668 PCI: 00:19.2: enabled 0
1740 07:14:56.597521 PCI: 00:1c.0: enabled 1
1741 07:14:56.600858 PCI: 00:1c.1: enabled 0
1742 07:14:56.604711 PCI: 00:1c.2: enabled 0
1743 07:14:56.604797 PCI: 00:1c.3: enabled 0
1744 07:14:56.607380 PCI: 00:1c.4: enabled 0
1745 07:14:56.610850 PCI: 00:1c.5: enabled 0
1746 07:14:56.614530 PCI: 00:1c.6: enabled 1
1747 07:14:56.614608 PCI: 00:1c.7: enabled 0
1748 07:14:56.617655 PCI: 00:1d.0: enabled 1
1749 07:14:56.621170 PCI: 00:1d.1: enabled 0
1750 07:14:56.624515 PCI: 00:1d.2: enabled 1
1751 07:14:56.624598 PCI: 00:1d.3: enabled 0
1752 07:14:56.627690 PCI: 00:1e.0: enabled 1
1753 07:14:56.630793 PCI: 00:1e.1: enabled 0
1754 07:14:56.630867 PCI: 00:1e.2: enabled 1
1755 07:14:56.633920 PCI: 00:1e.3: enabled 1
1756 07:14:56.637589 PCI: 00:1f.0: enabled 1
1757 07:14:56.640574 PCI: 00:1f.1: enabled 0
1758 07:14:56.640648 PCI: 00:1f.2: enabled 1
1759 07:14:56.644532 PCI: 00:1f.3: enabled 1
1760 07:14:56.647709 PCI: 00:1f.4: enabled 0
1761 07:14:56.650941 PCI: 00:1f.5: enabled 1
1762 07:14:56.651021 PCI: 00:1f.6: enabled 0
1763 07:14:56.654216 PCI: 00:1f.7: enabled 0
1764 07:14:56.657561 APIC: 00: enabled 1
1765 07:14:56.657644 GENERIC: 0.0: enabled 1
1766 07:14:56.660502 GENERIC: 0.0: enabled 1
1767 07:14:56.664465 GENERIC: 1.0: enabled 1
1768 07:14:56.667656 GENERIC: 0.0: enabled 1
1769 07:14:56.667733 GENERIC: 1.0: enabled 1
1770 07:14:56.670589 USB0 port 0: enabled 1
1771 07:14:56.674186 GENERIC: 0.0: enabled 1
1772 07:14:56.677674 USB0 port 0: enabled 1
1773 07:14:56.677752 GENERIC: 0.0: enabled 1
1774 07:14:56.680429 I2C: 00:1a: enabled 1
1775 07:14:56.683839 I2C: 00:31: enabled 1
1776 07:14:56.683915 I2C: 00:32: enabled 1
1777 07:14:56.687109 I2C: 00:10: enabled 1
1778 07:14:56.690569 I2C: 00:15: enabled 1
1779 07:14:56.690681 GENERIC: 0.0: enabled 0
1780 07:14:56.693913 GENERIC: 1.0: enabled 0
1781 07:14:56.697273 GENERIC: 0.0: enabled 1
1782 07:14:56.697350 SPI: 00: enabled 1
1783 07:14:56.700427 SPI: 00: enabled 1
1784 07:14:56.703616 PNP: 0c09.0: enabled 1
1785 07:14:56.703695 GENERIC: 0.0: enabled 1
1786 07:14:56.706959 USB3 port 0: enabled 1
1787 07:14:56.710603 USB3 port 1: enabled 1
1788 07:14:56.713775 USB3 port 2: enabled 0
1789 07:14:56.713865 USB3 port 3: enabled 0
1790 07:14:56.717038 USB2 port 0: enabled 0
1791 07:14:56.720385 USB2 port 1: enabled 1
1792 07:14:56.720493 USB2 port 2: enabled 1
1793 07:14:56.723730 USB2 port 3: enabled 0
1794 07:14:56.726965 USB2 port 4: enabled 1
1795 07:14:56.730736 USB2 port 5: enabled 0
1796 07:14:56.730823 USB2 port 6: enabled 0
1797 07:14:56.733776 USB2 port 7: enabled 0
1798 07:14:56.737002 USB2 port 8: enabled 0
1799 07:14:56.737100 USB2 port 9: enabled 0
1800 07:14:56.740410 USB3 port 0: enabled 0
1801 07:14:56.743835 USB3 port 1: enabled 1
1802 07:14:56.743923 USB3 port 2: enabled 0
1803 07:14:56.747118 USB3 port 3: enabled 0
1804 07:14:56.750279 GENERIC: 0.0: enabled 1
1805 07:14:56.753938 GENERIC: 1.0: enabled 1
1806 07:14:56.754026 APIC: 01: enabled 1
1807 07:14:56.757010 APIC: 03: enabled 1
1808 07:14:56.760567 APIC: 07: enabled 1
1809 07:14:56.760654 APIC: 05: enabled 1
1810 07:14:56.763705 APIC: 04: enabled 1
1811 07:14:56.763793 APIC: 02: enabled 1
1812 07:14:56.767001 APIC: 06: enabled 1
1813 07:14:56.770399 PCI: 01:00.0: enabled 1
1814 07:14:56.773519 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1815 07:14:56.780052 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1816 07:14:56.783712 ELOG: NV offset 0xf30000 size 0x1000
1817 07:14:56.790461 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1818 07:14:56.796782 ELOG: Event(17) added with size 13 at 2023-03-12 07:14:56 UTC
1819 07:14:56.803407 ELOG: Event(92) added with size 9 at 2023-03-12 07:14:56 UTC
1820 07:14:56.809914 ELOG: Event(93) added with size 9 at 2023-03-12 07:14:56 UTC
1821 07:14:56.816972 ELOG: Event(9E) added with size 10 at 2023-03-12 07:14:56 UTC
1822 07:14:56.823555 ELOG: Event(9F) added with size 14 at 2023-03-12 07:14:56 UTC
1823 07:14:56.830115 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1824 07:14:56.833104 ELOG: Event(A1) added with size 10 at 2023-03-12 07:14:57 UTC
1825 07:14:56.840141 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1826 07:14:56.846769 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1827 07:14:56.849868 Finalize devices...
1828 07:14:56.849957 Devices finalized
1829 07:14:56.856299 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1830 07:14:56.859991 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1831 07:14:56.866636 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1832 07:14:56.873253 ME: HFSTS1 : 0x80030055
1833 07:14:56.876963 ME: HFSTS2 : 0x30280116
1834 07:14:56.879938 ME: HFSTS3 : 0x00000050
1835 07:14:56.886649 ME: HFSTS4 : 0x00004000
1836 07:14:56.889895 ME: HFSTS5 : 0x00000000
1837 07:14:56.892999 ME: HFSTS6 : 0x00400006
1838 07:14:56.896717 ME: Manufacturing Mode : YES
1839 07:14:56.903038 ME: SPI Protection Mode Enabled : NO
1840 07:14:56.906570 ME: FW Partition Table : OK
1841 07:14:56.909915 ME: Bringup Loader Failure : NO
1842 07:14:56.912844 ME: Firmware Init Complete : NO
1843 07:14:56.916410 ME: Boot Options Present : NO
1844 07:14:56.919718 ME: Update In Progress : NO
1845 07:14:56.923120 ME: D0i3 Support : YES
1846 07:14:56.926698 ME: Low Power State Enabled : NO
1847 07:14:56.932845 ME: CPU Replaced : YES
1848 07:14:56.936232 ME: CPU Replacement Valid : YES
1849 07:14:56.939858 ME: Current Working State : 5
1850 07:14:56.943490 ME: Current Operation State : 1
1851 07:14:56.946103 ME: Current Operation Mode : 3
1852 07:14:56.949672 ME: Error Code : 0
1853 07:14:56.952957 ME: Enhanced Debug Mode : NO
1854 07:14:56.956040 ME: CPU Debug Disabled : YES
1855 07:14:56.959443 ME: TXT Support : NO
1856 07:14:56.966125 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1857 07:14:56.975986 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1858 07:14:56.979372 CBFS: 'fallback/slic' not found.
1859 07:14:56.982833 ACPI: Writing ACPI tables at 76b01000.
1860 07:14:56.982910 ACPI: * FACS
1861 07:14:56.986087 ACPI: * DSDT
1862 07:14:56.989543 Ramoops buffer: 0x100000@0x76a00000.
1863 07:14:56.992951 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1864 07:14:56.999718 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1865 07:14:57.002878 Google Chrome EC: version:
1866 07:14:57.006129 ro: voema_v2.0.7540-147f8d37d1
1867 07:14:57.009364 rw: voema_v2.0.7540-147f8d37d1
1868 07:14:57.012364 running image: 2
1869 07:14:57.015967 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1870 07:14:57.021298 ACPI: * FADT
1871 07:14:57.021384 SCI is IRQ9
1872 07:14:57.027842 ACPI: added table 1/32, length now 40
1873 07:14:57.027928 ACPI: * SSDT
1874 07:14:57.031271 Found 1 CPU(s) with 8 core(s) each.
1875 07:14:57.037952 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1876 07:14:57.041258 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1877 07:14:57.044256 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1878 07:14:57.047608 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1879 07:14:57.054561 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1880 07:14:57.061041 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1881 07:14:57.064257 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1882 07:14:57.070762 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1883 07:14:57.078139 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1884 07:14:57.080856 \_SB.PCI0.RP09: Added StorageD3Enable property
1885 07:14:57.084528 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1886 07:14:57.091459 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1887 07:14:57.097995 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1888 07:14:57.101285 PS2K: Passing 80 keymaps to kernel
1889 07:14:57.107634 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1890 07:14:57.114450 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1891 07:14:57.121008 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1892 07:14:57.124140 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1893 07:14:57.131059 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1894 07:14:57.137342 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1895 07:14:57.144120 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1896 07:14:57.151054 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1897 07:14:57.157955 ACPI: added table 2/32, length now 44
1898 07:14:57.158056 ACPI: * MCFG
1899 07:14:57.160743 ACPI: added table 3/32, length now 48
1900 07:14:57.164226 ACPI: * TPM2
1901 07:14:57.167554 TPM2 log created at 0x769f0000
1902 07:14:57.170984 ACPI: added table 4/32, length now 52
1903 07:14:57.171066 ACPI: * MADT
1904 07:14:57.174282 SCI is IRQ9
1905 07:14:57.177283 ACPI: added table 5/32, length now 56
1906 07:14:57.177391 current = 76b09850
1907 07:14:57.180715 ACPI: * DMAR
1908 07:14:57.183927 ACPI: added table 6/32, length now 60
1909 07:14:57.187355 ACPI: added table 7/32, length now 64
1910 07:14:57.190852 ACPI: * HPET
1911 07:14:57.194391 ACPI: added table 8/32, length now 68
1912 07:14:57.194488 ACPI: done.
1913 07:14:57.197174 ACPI tables: 35216 bytes.
1914 07:14:57.200645 smbios_write_tables: 769ef000
1915 07:14:57.203789 EC returned error result code 3
1916 07:14:57.207224 Couldn't obtain OEM name from CBI
1917 07:14:57.210750 Create SMBIOS type 16
1918 07:14:57.214179 Create SMBIOS type 17
1919 07:14:57.217240 GENERIC: 0.0 (WIFI Device)
1920 07:14:57.217328 SMBIOS tables: 1750 bytes.
1921 07:14:57.223652 Writing table forward entry at 0x00000500
1922 07:14:57.230659 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1923 07:14:57.234134 Writing coreboot table at 0x76b25000
1924 07:14:57.240525 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1925 07:14:57.243828 1. 0000000000001000-000000000009ffff: RAM
1926 07:14:57.246960 2. 00000000000a0000-00000000000fffff: RESERVED
1927 07:14:57.253511 3. 0000000000100000-00000000769eefff: RAM
1928 07:14:57.257076 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1929 07:14:57.263935 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1930 07:14:57.270433 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1931 07:14:57.273965 7. 0000000077000000-000000007fbfffff: RESERVED
1932 07:14:57.276806 8. 00000000c0000000-00000000cfffffff: RESERVED
1933 07:14:57.283418 9. 00000000f8000000-00000000f9ffffff: RESERVED
1934 07:14:57.287202 10. 00000000fb000000-00000000fb000fff: RESERVED
1935 07:14:57.293516 11. 00000000fe000000-00000000fe00ffff: RESERVED
1936 07:14:57.296799 12. 00000000fed80000-00000000fed87fff: RESERVED
1937 07:14:57.303264 13. 00000000fed90000-00000000fed92fff: RESERVED
1938 07:14:57.306870 14. 00000000feda0000-00000000feda1fff: RESERVED
1939 07:14:57.313406 15. 00000000fedc0000-00000000feddffff: RESERVED
1940 07:14:57.316990 16. 0000000100000000-00000002803fffff: RAM
1941 07:14:57.320446 Passing 4 GPIOs to payload:
1942 07:14:57.323647 NAME | PORT | POLARITY | VALUE
1943 07:14:57.329868 lid | undefined | high | high
1944 07:14:57.333341 power | undefined | high | low
1945 07:14:57.339888 oprom | undefined | high | low
1946 07:14:57.347066 EC in RW | 0x000000e5 | high | high
1947 07:14:57.353320 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum afcf
1948 07:14:57.353408 coreboot table: 1576 bytes.
1949 07:14:57.359981 IMD ROOT 0. 0x76fff000 0x00001000
1950 07:14:57.363974 IMD SMALL 1. 0x76ffe000 0x00001000
1951 07:14:57.366415 FSP MEMORY 2. 0x76c4e000 0x003b0000
1952 07:14:57.370674 VPD 3. 0x76c4d000 0x00000367
1953 07:14:57.373557 RO MCACHE 4. 0x76c4c000 0x00000fdc
1954 07:14:57.377118 CONSOLE 5. 0x76c2c000 0x00020000
1955 07:14:57.380245 FMAP 6. 0x76c2b000 0x00000578
1956 07:14:57.383678 TIME STAMP 7. 0x76c2a000 0x00000910
1957 07:14:57.386667 VBOOT WORK 8. 0x76c16000 0x00014000
1958 07:14:57.393386 ROMSTG STCK 9. 0x76c15000 0x00001000
1959 07:14:57.396759 AFTER CAR 10. 0x76c0a000 0x0000b000
1960 07:14:57.400270 RAMSTAGE 11. 0x76b97000 0x00073000
1961 07:14:57.403339 REFCODE 12. 0x76b42000 0x00055000
1962 07:14:57.406979 SMM BACKUP 13. 0x76b32000 0x00010000
1963 07:14:57.410203 4f444749 14. 0x76b30000 0x00002000
1964 07:14:57.413542 EXT VBT15. 0x76b2d000 0x0000219f
1965 07:14:57.416911 COREBOOT 16. 0x76b25000 0x00008000
1966 07:14:57.420073 ACPI 17. 0x76b01000 0x00024000
1967 07:14:57.426585 ACPI GNVS 18. 0x76b00000 0x00001000
1968 07:14:57.430308 RAMOOPS 19. 0x76a00000 0x00100000
1969 07:14:57.433114 TPM2 TCGLOG20. 0x769f0000 0x00010000
1970 07:14:57.436623 SMBIOS 21. 0x769ef000 0x00000800
1971 07:14:57.436699 IMD small region:
1972 07:14:57.443445 IMD ROOT 0. 0x76ffec00 0x00000400
1973 07:14:57.446872 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1974 07:14:57.449805 POWER STATE 2. 0x76ffeb80 0x00000044
1975 07:14:57.453348 ROMSTAGE 3. 0x76ffeb60 0x00000004
1976 07:14:57.456961 MEM INFO 4. 0x76ffe980 0x000001e0
1977 07:14:57.463307 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1978 07:14:57.467434 MTRR: Physical address space:
1979 07:14:57.473597 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1980 07:14:57.480025 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1981 07:14:57.486474 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1982 07:14:57.493372 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1983 07:14:57.496821 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1984 07:14:57.503218 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1985 07:14:57.509784 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1986 07:14:57.513019 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 07:14:57.519780 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 07:14:57.522998 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 07:14:57.526229 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 07:14:57.529645 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 07:14:57.536673 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 07:14:57.539611 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 07:14:57.542860 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 07:14:57.546213 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 07:14:57.552841 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 07:14:57.556168 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 07:14:57.559423 call enable_fixed_mtrr()
1998 07:14:57.563249 CPU physical address size: 39 bits
1999 07:14:57.566103 MTRR: default type WB/UC MTRR counts: 6/6.
2000 07:14:57.569475 MTRR: UC selected as default type.
2001 07:14:57.576070 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2002 07:14:57.582908 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2003 07:14:57.589490 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2004 07:14:57.596386 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2005 07:14:57.602633 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2006 07:14:57.609351 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2007 07:14:57.609433
2008 07:14:57.609518 MTRR check
2009 07:14:57.612554 Fixed MTRRs : Enabled
2010 07:14:57.615952 Variable MTRRs: Enabled
2011 07:14:57.616029
2012 07:14:57.619207 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 07:14:57.622817 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 07:14:57.629132 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 07:14:57.632603 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 07:14:57.636166 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 07:14:57.639110 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 07:14:57.645687 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 07:14:57.649691 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 07:14:57.652461 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 07:14:57.655677 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 07:14:57.662363 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 07:14:57.669368 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2024 07:14:57.669494 call enable_fixed_mtrr()
2025 07:14:57.672316 Checking cr50 for pending updates
2026 07:14:57.676313 CPU physical address size: 39 bits
2027 07:14:57.682641 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 07:14:57.685875 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 07:14:57.689500 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 07:14:57.692917 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 07:14:57.699314 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 07:14:57.703029 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 07:14:57.705873 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 07:14:57.709209 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 07:14:57.715711 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 07:14:57.719646 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 07:14:57.722557 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 07:14:57.725903 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 07:14:57.732960 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 07:14:57.736667 MTRR: Fixed MSR 0x259 0x0000000000000000
2041 07:14:57.739802 MTRR: Fixed MSR 0x268 0x0606060606060606
2042 07:14:57.743122 MTRR: Fixed MSR 0x269 0x0606060606060606
2043 07:14:57.749727 MTRR: Fixed MSR 0x26a 0x0606060606060606
2044 07:14:57.752891 MTRR: Fixed MSR 0x26b 0x0606060606060606
2045 07:14:57.756415 MTRR: Fixed MSR 0x26c 0x0606060606060606
2046 07:14:57.759590 MTRR: Fixed MSR 0x26d 0x0606060606060606
2047 07:14:57.766365 MTRR: Fixed MSR 0x26e 0x0606060606060606
2048 07:14:57.769659 MTRR: Fixed MSR 0x26f 0x0606060606060606
2049 07:14:57.772624 call enable_fixed_mtrr()
2050 07:14:57.776700 call enable_fixed_mtrr()
2051 07:14:57.779652 MTRR: Fixed MSR 0x250 0x0606060606060606
2052 07:14:57.782970 MTRR: Fixed MSR 0x250 0x0606060606060606
2053 07:14:57.785976 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 07:14:57.792817 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 07:14:57.795982 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 07:14:57.799342 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 07:14:57.802633 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 07:14:57.805983 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 07:14:57.812855 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 07:14:57.816404 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 07:14:57.819409 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 07:14:57.822787 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 07:14:57.830377 MTRR: Fixed MSR 0x258 0x0606060606060606
2064 07:14:57.830463 call enable_fixed_mtrr()
2065 07:14:57.837211 MTRR: Fixed MSR 0x259 0x0000000000000000
2066 07:14:57.840370 MTRR: Fixed MSR 0x268 0x0606060606060606
2067 07:14:57.843477 MTRR: Fixed MSR 0x269 0x0606060606060606
2068 07:14:57.847190 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 07:14:57.853563 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 07:14:57.856727 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 07:14:57.859977 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 07:14:57.863238 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 07:14:57.870389 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 07:14:57.873153 CPU physical address size: 39 bits
2075 07:14:57.876739 call enable_fixed_mtrr()
2076 07:14:57.880037 CPU physical address size: 39 bits
2077 07:14:57.883543 CPU physical address size: 39 bits
2078 07:14:57.890056 CPU physical address size: 39 bits
2079 07:14:57.893084 MTRR: Fixed MSR 0x250 0x0606060606060606
2080 07:14:57.897058 MTRR: Fixed MSR 0x250 0x0606060606060606
2081 07:14:57.900210 MTRR: Fixed MSR 0x258 0x0606060606060606
2082 07:14:57.903190 MTRR: Fixed MSR 0x259 0x0000000000000000
2083 07:14:57.910045 MTRR: Fixed MSR 0x268 0x0606060606060606
2084 07:14:57.913063 MTRR: Fixed MSR 0x269 0x0606060606060606
2085 07:14:57.916851 MTRR: Fixed MSR 0x26a 0x0606060606060606
2086 07:14:57.920164 MTRR: Fixed MSR 0x26b 0x0606060606060606
2087 07:14:57.926586 MTRR: Fixed MSR 0x26c 0x0606060606060606
2088 07:14:57.929777 MTRR: Fixed MSR 0x26d 0x0606060606060606
2089 07:14:57.933582 MTRR: Fixed MSR 0x26e 0x0606060606060606
2090 07:14:57.936507 MTRR: Fixed MSR 0x26f 0x0606060606060606
2091 07:14:57.943752 MTRR: Fixed MSR 0x258 0x0606060606060606
2092 07:14:57.943837 call enable_fixed_mtrr()
2093 07:14:57.950420 MTRR: Fixed MSR 0x259 0x0000000000000000
2094 07:14:57.953705 MTRR: Fixed MSR 0x268 0x0606060606060606
2095 07:14:57.956800 MTRR: Fixed MSR 0x269 0x0606060606060606
2096 07:14:57.960303 MTRR: Fixed MSR 0x26a 0x0606060606060606
2097 07:14:57.967025 MTRR: Fixed MSR 0x26b 0x0606060606060606
2098 07:14:57.970268 MTRR: Fixed MSR 0x26c 0x0606060606060606
2099 07:14:57.973819 MTRR: Fixed MSR 0x26d 0x0606060606060606
2100 07:14:57.977136 MTRR: Fixed MSR 0x26e 0x0606060606060606
2101 07:14:57.983661 MTRR: Fixed MSR 0x26f 0x0606060606060606
2102 07:14:57.986785 CPU physical address size: 39 bits
2103 07:14:57.990606 call enable_fixed_mtrr()
2104 07:14:57.993757 Reading cr50 TPM mode
2105 07:14:57.997561 CPU physical address size: 39 bits
2106 07:14:58.004183 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2107 07:14:58.010347 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2108 07:14:58.017293 Checking segment from ROM address 0xffc02b38
2109 07:14:58.020683 Checking segment from ROM address 0xffc02b54
2110 07:14:58.023760 Loading segment from ROM address 0xffc02b38
2111 07:14:58.027153 code (compression=0)
2112 07:14:58.033690 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2113 07:14:58.044126 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2114 07:14:58.047245 it's not compressed!
2115 07:14:58.185159 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2116 07:14:58.191961 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2117 07:14:58.199006 Loading segment from ROM address 0xffc02b54
2118 07:14:58.199104 Entry Point 0x30000000
2119 07:14:58.201635 Loaded segments
2120 07:14:58.208549 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2121 07:14:58.250993 Finalizing chipset.
2122 07:14:58.254479 Finalizing SMM.
2123 07:14:58.254568 APMC done.
2124 07:14:58.261020 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2125 07:14:58.264682 mp_park_aps done after 0 msecs.
2126 07:14:58.267975 Jumping to boot code at 0x30000000(0x76b25000)
2127 07:14:58.277907 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2128 07:14:58.277997
2129 07:14:58.278069
2130 07:14:58.278162
2131 07:14:58.281177 Starting depthcharge on Voema...
2132 07:14:58.281265
2133 07:14:58.281566 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2134 07:14:58.281673 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2135 07:14:58.281762 Setting prompt string to ['volteer:']
2136 07:14:58.281842 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2137 07:14:58.290814 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2138 07:14:58.290901
2139 07:14:58.297346 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2140 07:14:58.297434
2141 07:14:58.304589 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2142 07:14:58.304675
2143 07:14:58.307338 Failed to find eMMC card reader
2144 07:14:58.307425
2145 07:14:58.307492 Wipe memory regions:
2146 07:14:58.307554
2147 07:14:58.314137 [0x00000000001000, 0x000000000a0000)
2148 07:14:58.314222
2149 07:14:58.317584 [0x00000000100000, 0x00000030000000)
2150 07:14:58.342481
2151 07:14:58.345982 [0x00000032662db0, 0x000000769ef000)
2152 07:14:58.381209
2153 07:14:58.384538 [0x00000100000000, 0x00000280400000)
2154 07:14:58.587726
2155 07:14:58.591268 ec_init: CrosEC protocol v3 supported (256, 256)
2156 07:14:58.591356
2157 07:14:58.597900 update_port_state: port C0 state: usb enable 1 mux conn 0
2158 07:14:58.597992
2159 07:14:58.607742 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2160 07:14:58.607829
2161 07:14:58.614394 pmc_check_ipc_sts: STS_BUSY done after 1915 us
2162 07:14:58.614480
2163 07:14:58.617707 send_conn_disc_msg: pmc_send_cmd succeeded
2164 07:14:59.050631
2165 07:14:59.050786 R8152: Initializing
2166 07:14:59.050854
2167 07:14:59.053874 Version 6 (ocp_data = 5c30)
2168 07:14:59.053961
2169 07:14:59.057224 R8152: Done initializing
2170 07:14:59.057310
2171 07:14:59.060541 Adding net device
2172 07:14:59.363363
2173 07:14:59.366590 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2174 07:14:59.366680
2175 07:14:59.366753
2176 07:14:59.366846
2177 07:14:59.369838 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2179 07:14:59.470631 volteer: tftpboot 192.168.201.1 9567933/tftp-deploy-8vbau0et/kernel/bzImage 9567933/tftp-deploy-8vbau0et/kernel/cmdline 9567933/tftp-deploy-8vbau0et/ramdisk/ramdisk.cpio.gz
2180 07:14:59.470808 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2181 07:14:59.470908 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2182 07:14:59.475384 tftpboot 192.168.201.1 9567933/tftp-deploy-8vbau0et/kernel/bzImoy-8vbau0et/kernel/cmdline 9567933/tftp-deploy-8vbau0et/ramdisk/ramdisk.cpio.gz
2183 07:14:59.475476
2184 07:14:59.475545 Waiting for link
2185 07:14:59.679707
2186 07:14:59.679849 done.
2187 07:14:59.679918
2188 07:14:59.679982 MAC: 00:24:32:30:7d:bc
2189 07:14:59.680044
2190 07:14:59.682674 Sending DHCP discover... done.
2191 07:14:59.682770
2192 07:14:59.685947 Waiting for reply... done.
2193 07:14:59.686046
2194 07:14:59.689197 Sending DHCP request... done.
2195 07:14:59.689291
2196 07:14:59.696003 Waiting for reply... done.
2197 07:14:59.696091
2198 07:14:59.696160 My ip is 192.168.201.22
2199 07:14:59.696224
2200 07:14:59.699235 The DHCP server ip is 192.168.201.1
2201 07:14:59.699309
2202 07:14:59.706184 TFTP server IP predefined by user: 192.168.201.1
2203 07:14:59.706265
2204 07:14:59.712733 Bootfile predefined by user: 9567933/tftp-deploy-8vbau0et/kernel/bzImage
2205 07:14:59.712814
2206 07:14:59.715803 Sending tftp read request... done.
2207 07:14:59.715886
2208 07:14:59.719218 Waiting for the transfer...
2209 07:14:59.719305
2210 07:15:00.249951 00000000 ################################################################
2211 07:15:00.250096
2212 07:15:00.766762 00080000 ################################################################
2213 07:15:00.766903
2214 07:15:01.299223 00100000 ################################################################
2215 07:15:01.299365
2216 07:15:01.826405 00180000 ################################################################
2217 07:15:01.826548
2218 07:15:02.338283 00200000 ################################################################
2219 07:15:02.338430
2220 07:15:02.868579 00280000 ################################################################
2221 07:15:02.868717
2222 07:15:03.398582 00300000 ################################################################
2223 07:15:03.398720
2224 07:15:03.952962 00380000 ################################################################
2225 07:15:03.953105
2226 07:15:04.575942 00400000 ################################################################
2227 07:15:04.576082
2228 07:15:05.167564 00480000 ################################################################
2229 07:15:05.167707
2230 07:15:05.783735 00500000 ################################################################
2231 07:15:05.783870
2232 07:15:06.396431 00580000 ################################################################
2233 07:15:06.396570
2234 07:15:07.007064 00600000 ################################################################
2235 07:15:07.007205
2236 07:15:07.615027 00680000 ################################################################
2237 07:15:07.615171
2238 07:15:08.223187 00700000 ################################################################
2239 07:15:08.223336
2240 07:15:08.765165 00780000 ################################################################
2241 07:15:08.765316
2242 07:15:09.307375 00800000 ################################################################
2243 07:15:09.307520
2244 07:15:09.843762 00880000 ################################################################
2245 07:15:09.843915
2246 07:15:10.234372 00900000 ################################################ done.
2247 07:15:10.234523
2248 07:15:10.237986 The bootfile was 9826304 bytes long.
2249 07:15:10.238072
2250 07:15:10.241193 Sending tftp read request... done.
2251 07:15:10.241275
2252 07:15:10.244468 Waiting for the transfer...
2253 07:15:10.244550
2254 07:15:10.787125 00000000 ################################################################
2255 07:15:10.787282
2256 07:15:11.299363 00080000 ################################################################
2257 07:15:11.299507
2258 07:15:11.825901 00100000 ################################################################
2259 07:15:11.826043
2260 07:15:12.350983 00180000 ################################################################
2261 07:15:12.351142
2262 07:15:12.863930 00200000 ################################################################
2263 07:15:12.864074
2264 07:15:13.384963 00280000 ################################################################
2265 07:15:13.385121
2266 07:15:13.916154 00300000 ################################################################
2267 07:15:13.916312
2268 07:15:14.466146 00380000 ################################################################
2269 07:15:14.466297
2270 07:15:15.004688 00400000 ################################################################
2271 07:15:15.004826
2272 07:15:15.605041 00480000 ################################################################
2273 07:15:15.605666
2274 07:15:16.173175 00500000 ################################################################
2275 07:15:16.173313
2276 07:15:16.546159 00580000 ########################################### done.
2277 07:15:16.546312
2278 07:15:16.549634 Sending tftp read request... done.
2279 07:15:16.549714
2280 07:15:16.553035 Waiting for the transfer...
2281 07:15:16.553109
2282 07:15:16.553175 00000000 # done.
2283 07:15:16.553239
2284 07:15:16.563171 Command line loaded dynamically from TFTP file: 9567933/tftp-deploy-8vbau0et/kernel/cmdline
2285 07:15:16.563263
2286 07:15:16.586395 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9567933/extract-nfsrootfs-sw6eyybl,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2287 07:15:16.589453
2288 07:15:16.593062 Shutting down all USB controllers.
2289 07:15:16.593141
2290 07:15:16.593206 Removing current net device
2291 07:15:16.593269
2292 07:15:16.596266 Finalizing coreboot
2293 07:15:16.596341
2294 07:15:16.603148 Exiting depthcharge with code 4 at timestamp: 27037897
2295 07:15:16.603229
2296 07:15:16.603295
2297 07:15:16.603357 Starting kernel ...
2298 07:15:16.603417
2299 07:15:16.603476
2300 07:15:16.603857 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2301 07:15:16.603957 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2302 07:15:16.604040 Setting prompt string to ['Linux version [0-9]']
2303 07:15:16.604109 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2304 07:15:16.604178 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2306 07:19:42.604977 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2308 07:19:42.606186 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2310 07:19:42.607079 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2313 07:19:42.608597 end: 2 depthcharge-action (duration 00:05:00) [common]
2315 07:19:42.609950 Cleaning after the job
2316 07:19:42.610441 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/ramdisk
2317 07:19:42.612918 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/kernel
2318 07:19:42.616387 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/nfsrootfs
2319 07:19:42.677211 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567933/tftp-deploy-8vbau0et/modules
2320 07:19:42.677703 start: 5.1 power-off (timeout 00:00:30) [common]
2321 07:19:42.677866 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2322 07:19:42.753575 >> Command sent successfully.
2323 07:19:42.757779 Returned 0 in 0 seconds
2324 07:19:42.859175 end: 5.1 power-off (duration 00:00:00) [common]
2326 07:19:42.860844 start: 5.2 read-feedback (timeout 00:10:00) [common]
2327 07:19:42.862054 Listened to connection for namespace 'common' for up to 1s
2328 07:19:43.866842 Finalising connection for namespace 'common'
2329 07:19:43.867548 Disconnecting from shell: Finalise
2330 07:19:43.867997
2331 07:19:43.969465 end: 5.2 read-feedback (duration 00:00:01) [common]
2332 07:19:43.970118 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9567933
2333 07:19:44.102064 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9567933
2334 07:19:44.102262 JobError: Your job cannot terminate cleanly.