Boot log: asus-C436FA-Flip-hatch

    1 07:15:12.232187  lava-dispatcher, installed at version: 2023.01
    2 07:15:12.232392  start: 0 validate
    3 07:15:12.232524  Start time: 2023-03-12 07:15:12.232518+00:00 (UTC)
    4 07:15:12.232664  Using caching service: 'http://localhost/cache/?uri=%s'
    5 07:15:12.232805  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230303.0%2Famd64%2Finitrd.cpio.gz exists
    6 07:15:12.525291  Using caching service: 'http://localhost/cache/?uri=%s'
    7 07:15:12.525488  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-277-g507c8d80b9e20%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 07:15:12.818341  Using caching service: 'http://localhost/cache/?uri=%s'
    9 07:15:12.818515  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230303.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 07:15:13.104760  Using caching service: 'http://localhost/cache/?uri=%s'
   11 07:15:13.104934  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-277-g507c8d80b9e20%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 07:15:13.385954  validate duration: 1.15
   14 07:15:13.386469  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 07:15:13.386662  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 07:15:13.386841  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 07:15:13.387007  Not decompressing ramdisk as can be used compressed.
   18 07:15:13.387786  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230303.0/amd64/initrd.cpio.gz
   19 07:15:13.387920  saving as /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/ramdisk/initrd.cpio.gz
   20 07:15:13.388033  total size: 5432112 (5MB)
   21 07:15:13.389492  progress   0% (0MB)
   22 07:15:13.392066  progress   5% (0MB)
   23 07:15:13.394325  progress  10% (0MB)
   24 07:15:13.396598  progress  15% (0MB)
   25 07:15:13.399117  progress  20% (1MB)
   26 07:15:13.401366  progress  25% (1MB)
   27 07:15:13.403606  progress  30% (1MB)
   28 07:15:13.406085  progress  35% (1MB)
   29 07:15:13.408292  progress  40% (2MB)
   30 07:15:13.410487  progress  45% (2MB)
   31 07:15:13.412563  progress  50% (2MB)
   32 07:15:13.414691  progress  55% (2MB)
   33 07:15:13.416598  progress  60% (3MB)
   34 07:15:13.418284  progress  65% (3MB)
   35 07:15:13.420181  progress  70% (3MB)
   36 07:15:13.421843  progress  75% (3MB)
   37 07:15:13.423359  progress  80% (4MB)
   38 07:15:13.424862  progress  85% (4MB)
   39 07:15:13.426548  progress  90% (4MB)
   40 07:15:13.427979  progress  95% (4MB)
   41 07:15:13.429398  progress 100% (5MB)
   42 07:15:13.429621  5MB downloaded in 0.04s (124.58MB/s)
   43 07:15:13.429778  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 07:15:13.430042  end: 1.1 download-retry (duration 00:00:00) [common]
   46 07:15:13.430142  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 07:15:13.430237  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 07:15:13.430355  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-277-g507c8d80b9e20/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 07:15:13.430432  saving as /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/kernel/bzImage
   50 07:15:13.430501  total size: 9826304 (9MB)
   51 07:15:13.430567  No compression specified
   52 07:15:13.431538  progress   0% (0MB)
   53 07:15:13.434184  progress   5% (0MB)
   54 07:15:13.436837  progress  10% (0MB)
   55 07:15:13.439573  progress  15% (1MB)
   56 07:15:13.442185  progress  20% (1MB)
   57 07:15:13.444873  progress  25% (2MB)
   58 07:15:13.447617  progress  30% (2MB)
   59 07:15:13.450295  progress  35% (3MB)
   60 07:15:13.452984  progress  40% (3MB)
   61 07:15:13.455680  progress  45% (4MB)
   62 07:15:13.458352  progress  50% (4MB)
   63 07:15:13.461048  progress  55% (5MB)
   64 07:15:13.463736  progress  60% (5MB)
   65 07:15:13.466381  progress  65% (6MB)
   66 07:15:13.469039  progress  70% (6MB)
   67 07:15:13.471677  progress  75% (7MB)
   68 07:15:13.474294  progress  80% (7MB)
   69 07:15:13.476922  progress  85% (7MB)
   70 07:15:13.479554  progress  90% (8MB)
   71 07:15:13.482173  progress  95% (8MB)
   72 07:15:13.484817  progress 100% (9MB)
   73 07:15:13.485056  9MB downloaded in 0.05s (171.79MB/s)
   74 07:15:13.485218  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 07:15:13.485487  end: 1.2 download-retry (duration 00:00:00) [common]
   77 07:15:13.485589  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 07:15:13.485688  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 07:15:13.485811  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230303.0/amd64/full.rootfs.tar.xz
   80 07:15:13.485892  saving as /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/nfsrootfs/full.rootfs.tar
   81 07:15:13.485962  total size: 207163184 (197MB)
   82 07:15:13.486032  Using unxz to decompress xz
   83 07:15:13.489388  progress   0% (0MB)
   84 07:15:14.116471  progress   5% (9MB)
   85 07:15:14.719008  progress  10% (19MB)
   86 07:15:15.380442  progress  15% (29MB)
   87 07:15:15.782169  progress  20% (39MB)
   88 07:15:16.200940  progress  25% (49MB)
   89 07:15:16.871036  progress  30% (59MB)
   90 07:15:17.484083  progress  35% (69MB)
   91 07:15:18.165885  progress  40% (79MB)
   92 07:15:18.807523  progress  45% (88MB)
   93 07:15:19.460333  progress  50% (98MB)
   94 07:15:20.162291  progress  55% (108MB)
   95 07:15:20.936823  progress  60% (118MB)
   96 07:15:21.106351  progress  65% (128MB)
   97 07:15:21.286097  progress  70% (138MB)
   98 07:15:21.393624  progress  75% (148MB)
   99 07:15:21.484243  progress  80% (158MB)
  100 07:15:21.568631  progress  85% (167MB)
  101 07:15:21.689532  progress  90% (177MB)
  102 07:15:22.008913  progress  95% (187MB)
  103 07:15:22.673395  progress 100% (197MB)
  104 07:15:22.678878  197MB downloaded in 9.19s (21.49MB/s)
  105 07:15:22.679216  end: 1.3.1 http-download (duration 00:00:09) [common]
  107 07:15:22.679544  end: 1.3 download-retry (duration 00:00:09) [common]
  108 07:15:22.679657  start: 1.4 download-retry (timeout 00:09:51) [common]
  109 07:15:22.679755  start: 1.4.1 http-download (timeout 00:09:51) [common]
  110 07:15:22.679882  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-277-g507c8d80b9e20/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 07:15:22.679966  saving as /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/modules/modules.tar
  112 07:15:22.680038  total size: 462184 (0MB)
  113 07:15:22.680108  Using unxz to decompress xz
  114 07:15:22.683384  progress   7% (0MB)
  115 07:15:22.683820  progress  14% (0MB)
  116 07:15:22.684113  progress  21% (0MB)
  117 07:15:22.685753  progress  28% (0MB)
  118 07:15:22.687983  progress  35% (0MB)
  119 07:15:22.690279  progress  42% (0MB)
  120 07:15:22.692808  progress  49% (0MB)
  121 07:15:22.694935  progress  56% (0MB)
  122 07:15:22.696933  progress  63% (0MB)
  123 07:15:22.699337  progress  70% (0MB)
  124 07:15:22.701463  progress  77% (0MB)
  125 07:15:22.703633  progress  85% (0MB)
  126 07:15:22.705820  progress  92% (0MB)
  127 07:15:22.708186  progress  99% (0MB)
  128 07:15:22.715527  0MB downloaded in 0.04s (12.42MB/s)
  129 07:15:22.715836  end: 1.4.1 http-download (duration 00:00:00) [common]
  131 07:15:22.716144  end: 1.4 download-retry (duration 00:00:00) [common]
  132 07:15:22.716261  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  133 07:15:22.716405  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  134 07:15:25.026545  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9567927/extract-nfsrootfs-8h3dwpek
  135 07:15:25.026785  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  136 07:15:25.026905  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  137 07:15:25.027062  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo
  138 07:15:25.027319  makedir: /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin
  139 07:15:25.027424  makedir: /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/tests
  140 07:15:25.027519  makedir: /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/results
  141 07:15:25.027635  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-add-keys
  142 07:15:25.027783  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-add-sources
  143 07:15:25.027928  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-background-process-start
  144 07:15:25.028061  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-background-process-stop
  145 07:15:25.028191  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-common-functions
  146 07:15:25.028323  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-echo-ipv4
  147 07:15:25.028464  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-install-packages
  148 07:15:25.028591  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-installed-packages
  149 07:15:25.028716  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-os-build
  150 07:15:25.028846  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-probe-channel
  151 07:15:25.028977  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-probe-ip
  152 07:15:25.029101  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-target-ip
  153 07:15:25.029226  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-target-mac
  154 07:15:25.029354  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-target-storage
  155 07:15:25.029484  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-test-case
  156 07:15:25.029611  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-test-event
  157 07:15:25.029736  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-test-feedback
  158 07:15:25.029867  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-test-raise
  159 07:15:25.029993  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-test-reference
  160 07:15:25.030117  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-test-runner
  161 07:15:25.030245  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-test-set
  162 07:15:25.030372  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-test-shell
  163 07:15:25.030501  Updating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-add-keys (debian)
  164 07:15:25.030635  Updating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-add-sources (debian)
  165 07:15:25.030764  Updating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-install-packages (debian)
  166 07:15:25.030897  Updating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-installed-packages (debian)
  167 07:15:25.031026  Updating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/bin/lava-os-build (debian)
  168 07:15:25.031144  Creating /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/environment
  169 07:15:25.031246  LAVA metadata
  170 07:15:25.031325  - LAVA_JOB_ID=9567927
  171 07:15:25.031411  - LAVA_DISPATCHER_IP=192.168.201.1
  172 07:15:25.031552  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  173 07:15:25.031628  skipped lava-vland-overlay
  174 07:15:25.031717  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  175 07:15:25.031811  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  176 07:15:25.031889  skipped lava-multinode-overlay
  177 07:15:25.031975  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  178 07:15:25.032068  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  179 07:15:25.032155  Loading test definitions
  180 07:15:25.032259  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  181 07:15:25.032341  Using /lava-9567927 at stage 0
  182 07:15:25.032597  uuid=9567927_1.5.2.3.1 testdef=None
  183 07:15:25.032698  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  184 07:15:25.032798  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  185 07:15:25.033266  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  187 07:15:25.033547  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  188 07:15:25.034104  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  190 07:15:25.034380  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  191 07:15:25.034907  runner path: /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/0/tests/0_timesync-off test_uuid 9567927_1.5.2.3.1
  192 07:15:25.035073  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  194 07:15:25.035355  start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
  195 07:15:25.035456  Using /lava-9567927 at stage 0
  196 07:15:25.035575  Fetching tests from https://github.com/kernelci/test-definitions.git
  197 07:15:25.035667  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/0/tests/1_kselftest-filesystems'
  198 07:15:34.668319  Running '/usr/bin/git checkout kernelci.org
  199 07:15:34.820789  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
  200 07:15:34.821565  uuid=9567927_1.5.2.3.5 testdef=None
  201 07:15:34.821750  end: 1.5.2.3.5 git-repo-action (duration 00:00:10) [common]
  203 07:15:34.822076  start: 1.5.2.3.6 test-overlay (timeout 00:09:39) [common]
  204 07:15:34.822948  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  206 07:15:34.823234  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:39) [common]
  207 07:15:34.824310  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  209 07:15:34.824615  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:39) [common]
  210 07:15:34.825642  runner path: /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/0/tests/1_kselftest-filesystems test_uuid 9567927_1.5.2.3.5
  211 07:15:34.825750  BOARD='asus-C436FA-Flip-hatch'
  212 07:15:34.825827  BRANCH='cip-gitlab'
  213 07:15:34.825898  SKIPFILE='skipfile-lkft.yaml'
  214 07:15:34.825967  SKIP_INSTALL='True'
  215 07:15:34.826053  TESTPROG_URL='None'
  216 07:15:34.826126  TST_CASENAME=''
  217 07:15:34.826192  TST_CMDFILES='filesystems'
  218 07:15:34.826344  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  220 07:15:34.826606  Creating lava-test-runner.conf files
  221 07:15:34.826685  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9567927/lava-overlay-fvf140zo/lava-9567927/0 for stage 0
  222 07:15:34.826783  - 0_timesync-off
  223 07:15:34.826864  - 1_kselftest-filesystems
  224 07:15:34.826970  end: 1.5.2.3 test-definition (duration 00:00:10) [common]
  225 07:15:34.827116  start: 1.5.2.4 compress-overlay (timeout 00:09:39) [common]
  226 07:15:43.175909  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  227 07:15:43.176077  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:30) [common]
  228 07:15:43.176186  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  229 07:15:43.176297  end: 1.5.2 lava-overlay (duration 00:00:18) [common]
  230 07:15:43.176400  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
  231 07:15:43.290515  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  232 07:15:43.290896  start: 1.5.4 extract-modules (timeout 00:09:30) [common]
  233 07:15:43.291148  extracting modules file /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9567927/extract-nfsrootfs-8h3dwpek
  234 07:15:43.303465  extracting modules file /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9567927/extract-overlay-ramdisk-zzhqv1jl/ramdisk
  235 07:15:43.315474  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  236 07:15:43.315644  start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
  237 07:15:43.315753  [common] Applying overlay to NFS
  238 07:15:43.315836  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9567927/compress-overlay-cbp3d_ks/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9567927/extract-nfsrootfs-8h3dwpek
  239 07:15:44.203044  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  240 07:15:44.203245  start: 1.5.6 configure-preseed-file (timeout 00:09:29) [common]
  241 07:15:44.203356  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  242 07:15:44.203464  start: 1.5.7 compress-ramdisk (timeout 00:09:29) [common]
  243 07:15:44.203559  Building ramdisk /var/lib/lava/dispatcher/tmp/9567927/extract-overlay-ramdisk-zzhqv1jl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9567927/extract-overlay-ramdisk-zzhqv1jl/ramdisk
  244 07:15:44.247862  >> 30003 blocks

  245 07:15:44.842928  rename /var/lib/lava/dispatcher/tmp/9567927/extract-overlay-ramdisk-zzhqv1jl/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/ramdisk/ramdisk.cpio.gz
  246 07:15:44.843374  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  247 07:15:44.843533  start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
  248 07:15:44.843653  start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
  249 07:15:44.843760  No mkimage arch provided, not using FIT.
  250 07:15:44.843860  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  251 07:15:44.843957  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  252 07:15:44.844075  end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
  253 07:15:44.844182  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
  254 07:15:44.844271  No LXC device requested
  255 07:15:44.844373  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  256 07:15:44.844473  start: 1.7 deploy-device-env (timeout 00:09:29) [common]
  257 07:15:44.844568  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  258 07:15:44.844656  Checking files for TFTP limit of 4294967296 bytes.
  259 07:15:44.845071  end: 1 tftp-deploy (duration 00:00:31) [common]
  260 07:15:44.845190  start: 2 depthcharge-action (timeout 00:05:00) [common]
  261 07:15:44.845296  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  262 07:15:44.845441  substitutions:
  263 07:15:44.845520  - {DTB}: None
  264 07:15:44.845593  - {INITRD}: 9567927/tftp-deploy-_1uuxces/ramdisk/ramdisk.cpio.gz
  265 07:15:44.845662  - {KERNEL}: 9567927/tftp-deploy-_1uuxces/kernel/bzImage
  266 07:15:44.845731  - {LAVA_MAC}: None
  267 07:15:44.845796  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9567927/extract-nfsrootfs-8h3dwpek
  268 07:15:44.845862  - {NFS_SERVER_IP}: 192.168.201.1
  269 07:15:44.845926  - {PRESEED_CONFIG}: None
  270 07:15:44.845991  - {PRESEED_LOCAL}: None
  271 07:15:44.846054  - {RAMDISK}: 9567927/tftp-deploy-_1uuxces/ramdisk/ramdisk.cpio.gz
  272 07:15:44.846118  - {ROOT_PART}: None
  273 07:15:44.846181  - {ROOT}: None
  274 07:15:44.846254  - {SERVER_IP}: 192.168.201.1
  275 07:15:44.846318  - {TEE}: None
  276 07:15:44.846381  Parsed boot commands:
  277 07:15:44.846442  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  278 07:15:44.846620  Parsed boot commands: tftpboot 192.168.201.1 9567927/tftp-deploy-_1uuxces/kernel/bzImage 9567927/tftp-deploy-_1uuxces/kernel/cmdline 9567927/tftp-deploy-_1uuxces/ramdisk/ramdisk.cpio.gz
  279 07:15:44.846733  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  280 07:15:44.846833  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  281 07:15:44.846938  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  282 07:15:44.847033  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  283 07:15:44.847124  Not connected, no need to disconnect.
  284 07:15:44.847213  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  285 07:15:44.847308  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  286 07:15:44.847387  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
  287 07:15:44.850475  Setting prompt string to ['lava-test: # ']
  288 07:15:44.850807  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  289 07:15:44.850927  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  290 07:15:44.851041  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  291 07:15:44.851160  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  292 07:15:44.851354  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  293 07:15:54.230572  >> Command sent successfully.

  294 07:15:54.232901  Returned 0 in 9 seconds
  295 07:15:54.334016  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  297 07:15:54.335410  end: 2.2.2 reset-device (duration 00:00:09) [common]
  298 07:15:54.335953  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  299 07:15:54.336401  Setting prompt string to 'Starting depthcharge on Helios...'
  300 07:15:54.336734  Changing prompt to 'Starting depthcharge on Helios...'
  301 07:15:54.337085  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  302 07:15:54.338263  [Enter `^Ec?' for help]

  303 07:15:54.338676  

  304 07:15:54.339015  

  305 07:15:54.339386  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  306 07:15:54.339774  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  307 07:15:54.340225  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  308 07:15:54.340694  CPU: AES supported, TXT NOT supported, VT supported

  309 07:15:54.341154  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  310 07:15:54.341501  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  311 07:15:54.341813  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  312 07:15:54.342115  VBOOT: Loading verstage.

  313 07:15:54.342443  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  314 07:15:54.342784  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  315 07:15:54.343299  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  316 07:15:54.343794  CBFS @ c08000 size 3f8000

  317 07:15:54.344278  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  318 07:15:54.344684  CBFS: Locating 'fallback/verstage'

  319 07:15:54.345025  CBFS: Found @ offset 10fb80 size 1072c

  320 07:15:54.345360  

  321 07:15:54.345656  

  322 07:15:54.345948  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  323 07:15:54.346247  Probing TPM: . done!

  324 07:15:54.346554  TPM ready after 0 ms

  325 07:15:54.346948  Connected to device vid:did:rid of 1ae0:0028:00

  326 07:15:54.347417  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  327 07:15:54.347762  Initialized TPM device CR50 revision 0

  328 07:15:54.348079  tlcl_send_startup: Startup return code is 0

  329 07:15:54.348402  TPM: setup succeeded

  330 07:15:54.348716  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  331 07:15:54.349062  Chrome EC: UHEPI supported

  332 07:15:54.349429  Phase 1

  333 07:15:54.349805  FMAP: area GBB found @ c05000 (12288 bytes)

  334 07:15:54.350285  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  335 07:15:54.350753  Phase 2

  336 07:15:54.351240  Phase 3

  337 07:15:54.351611  FMAP: area GBB found @ c05000 (12288 bytes)

  338 07:15:54.351941  VB2:vb2_report_dev_firmware() This is developer signed firmware

  339 07:15:54.352267  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  340 07:15:54.352583  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  341 07:15:54.352902  VB2:vb2_verify_keyblock() Checking keyblock signature...

  342 07:15:54.353197  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  343 07:15:54.353488  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  344 07:15:54.353790  VB2:vb2_verify_fw_preamble() Verifying preamble.

  345 07:15:54.354099  Phase 4

  346 07:15:54.354403  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  347 07:15:54.354748  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  348 07:15:54.355183  VB2:vb2_rsa_verify_digest() Digest check failed!

  349 07:15:54.355590  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  350 07:15:54.355911  Saving nvdata

  351 07:15:54.356208  Reboot requested (10020007)

  352 07:15:54.356507  board_reset() called!

  353 07:15:54.356832  full_reset() called!

  354 07:15:57.905925  

  355 07:15:57.906461  

  356 07:15:57.915334  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  357 07:15:57.918961  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  358 07:15:57.925713  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  359 07:15:57.928480  CPU: AES supported, TXT NOT supported, VT supported

  360 07:15:57.935721  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  361 07:15:57.938815  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  362 07:15:57.945581  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  363 07:15:57.948556  VBOOT: Loading verstage.

  364 07:15:57.952134  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  365 07:15:57.958791  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  366 07:15:57.965175  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  367 07:15:57.965628  CBFS @ c08000 size 3f8000

  368 07:15:57.971694  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  369 07:15:57.975501  CBFS: Locating 'fallback/verstage'

  370 07:15:57.978455  CBFS: Found @ offset 10fb80 size 1072c

  371 07:15:57.982715  

  372 07:15:57.983332  

  373 07:15:57.992952  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  374 07:15:58.006855  Probing TPM: . done!

  375 07:15:58.010443  TPM ready after 0 ms

  376 07:15:58.013402  Connected to device vid:did:rid of 1ae0:0028:00

  377 07:15:58.024006  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  378 07:15:58.027073  Initialized TPM device CR50 revision 0

  379 07:15:58.069880  tlcl_send_startup: Startup return code is 0

  380 07:15:58.070396  TPM: setup succeeded

  381 07:15:58.082645  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  382 07:15:58.086126  Chrome EC: UHEPI supported

  383 07:15:58.089199  Phase 1

  384 07:15:58.092859  FMAP: area GBB found @ c05000 (12288 bytes)

  385 07:15:58.099503  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  386 07:15:58.105892  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  387 07:15:58.109602  Recovery requested (1009000e)

  388 07:15:58.114924  Saving nvdata

  389 07:15:58.121427  tlcl_extend: response is 0

  390 07:15:58.129975  tlcl_extend: response is 0

  391 07:15:58.137093  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  392 07:15:58.140200  CBFS @ c08000 size 3f8000

  393 07:15:58.147400  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  394 07:15:58.150410  CBFS: Locating 'fallback/romstage'

  395 07:15:58.153526  CBFS: Found @ offset 80 size 145fc

  396 07:15:58.157077  Accumulated console time in verstage 98 ms

  397 07:15:58.157523  

  398 07:15:58.157872  

  399 07:15:58.170252  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  400 07:15:58.176519  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  401 07:15:58.180129  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  402 07:15:58.183123  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  403 07:15:58.189733  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  404 07:15:58.193671  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  405 07:15:58.196681  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  406 07:15:58.199785  TCO_STS:   0000 0000

  407 07:15:58.203478  GEN_PMCON: e0015238 00000200

  408 07:15:58.206452  GBLRST_CAUSE: 00000000 00000000

  409 07:15:58.206903  prev_sleep_state 5

  410 07:15:58.210284  Boot Count incremented to 47760

  411 07:15:58.216881  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  412 07:15:58.219930  CBFS @ c08000 size 3f8000

  413 07:15:58.226817  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  414 07:15:58.227298  CBFS: Locating 'fspm.bin'

  415 07:15:58.233670  CBFS: Found @ offset 5ffc0 size 71000

  416 07:15:58.236723  Chrome EC: UHEPI supported

  417 07:15:58.243316  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  418 07:15:58.246977  Probing TPM:  done!

  419 07:15:58.253709  Connected to device vid:did:rid of 1ae0:0028:00

  420 07:15:58.263223  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  421 07:15:58.269811  Initialized TPM device CR50 revision 0

  422 07:15:58.278413  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  423 07:15:58.284972  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  424 07:15:58.288447  MRC cache found, size 1948

  425 07:15:58.291490  bootmode is set to: 2

  426 07:15:58.294514  PRMRR disabled by config.

  427 07:15:58.297999  SPD INDEX = 1

  428 07:15:58.301687  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  429 07:15:58.304554  CBFS @ c08000 size 3f8000

  430 07:15:58.311461  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  431 07:15:58.311912  CBFS: Locating 'spd.bin'

  432 07:15:58.314384  CBFS: Found @ offset 5fb80 size 400

  433 07:15:58.318029  SPD: module type is LPDDR3

  434 07:15:58.320974  SPD: module part is 

  435 07:15:58.327800  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  436 07:15:58.331313  SPD: device width 4 bits, bus width 8 bits

  437 07:15:58.334317  SPD: module size is 4096 MB (per channel)

  438 07:15:58.337446  memory slot: 0 configuration done.

  439 07:15:58.341091  memory slot: 2 configuration done.

  440 07:15:58.392549  CBMEM:

  441 07:15:58.395710  IMD: root @ 99fff000 254 entries.

  442 07:15:58.399221  IMD: root @ 99ffec00 62 entries.

  443 07:15:58.402731  External stage cache:

  444 07:15:58.405825  IMD: root @ 9abff000 254 entries.

  445 07:15:58.408966  IMD: root @ 9abfec00 62 entries.

  446 07:15:58.415689  Chrome EC: clear events_b mask to 0x0000000020004000

  447 07:15:58.433138  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  448 07:15:58.441651  tlcl_write: response is 0

  449 07:15:58.450773  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  450 07:15:58.457543  MRC: TPM MRC hash updated successfully.

  451 07:15:58.457994  2 DIMMs found

  452 07:15:58.460566  SMM Memory Map

  453 07:15:58.464044  SMRAM       : 0x9a000000 0x1000000

  454 07:15:58.467118   Subregion 0: 0x9a000000 0xa00000

  455 07:15:58.470755   Subregion 1: 0x9aa00000 0x200000

  456 07:15:58.473857   Subregion 2: 0x9ac00000 0x400000

  457 07:15:58.477448  top_of_ram = 0x9a000000

  458 07:15:58.480514  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  459 07:15:58.487127  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  460 07:15:58.490621  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  461 07:15:58.497166  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  462 07:15:58.500180  CBFS @ c08000 size 3f8000

  463 07:15:58.503793  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  464 07:15:58.506891  CBFS: Locating 'fallback/postcar'

  465 07:15:58.513787  CBFS: Found @ offset 107000 size 4b44

  466 07:15:58.516659  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  467 07:15:58.529273  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  468 07:15:58.532281  Processing 180 relocs. Offset value of 0x97c0c000

  469 07:15:58.540848  Accumulated console time in romstage 286 ms

  470 07:15:58.541291  

  471 07:15:58.541637  

  472 07:15:58.550896  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  473 07:15:58.557340  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  474 07:15:58.560560  CBFS @ c08000 size 3f8000

  475 07:15:58.567487  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  476 07:15:58.570449  CBFS: Locating 'fallback/ramstage'

  477 07:15:58.573740  CBFS: Found @ offset 43380 size 1b9e8

  478 07:15:58.580295  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  479 07:15:58.612801  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  480 07:15:58.615854  Processing 3976 relocs. Offset value of 0x98db0000

  481 07:15:58.622731  Accumulated console time in postcar 52 ms

  482 07:15:58.623197  

  483 07:15:58.623551  

  484 07:15:58.632786  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  485 07:15:58.639420  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  486 07:15:58.642478  WARNING: RO_VPD is uninitialized or empty.

  487 07:15:58.646119  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  488 07:15:58.652233  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  489 07:15:58.652685  Normal boot.

  490 07:15:58.659009  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  491 07:15:58.662596  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  492 07:15:58.665484  CBFS @ c08000 size 3f8000

  493 07:15:58.672250  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  494 07:15:58.676064  CBFS: Locating 'cpu_microcode_blob.bin'

  495 07:15:58.679154  CBFS: Found @ offset 14700 size 2ec00

  496 07:15:58.682114  microcode: sig=0x806ec pf=0x4 revision=0xc9

  497 07:15:58.685788  Skip microcode update

  498 07:15:58.692012  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  499 07:15:58.692456  CBFS @ c08000 size 3f8000

  500 07:15:58.698605  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  501 07:15:58.702235  CBFS: Locating 'fsps.bin'

  502 07:15:58.705159  CBFS: Found @ offset d1fc0 size 35000

  503 07:15:58.731184  Detected 4 core, 8 thread CPU.

  504 07:15:58.734122  Setting up SMI for CPU

  505 07:15:58.737637  IED base = 0x9ac00000

  506 07:15:58.738086  IED size = 0x00400000

  507 07:15:58.740674  Will perform SMM setup.

  508 07:15:58.747507  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  509 07:15:58.754034  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  510 07:15:58.757061  Processing 16 relocs. Offset value of 0x00030000

  511 07:15:58.760751  Attempting to start 7 APs

  512 07:15:58.764370  Waiting for 10ms after sending INIT.

  513 07:15:58.780810  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.

  514 07:15:58.781311  done.

  515 07:15:58.783751  AP: slot 3 apic_id 3.

  516 07:15:58.786849  AP: slot 1 apic_id 2.

  517 07:15:58.787355  AP: slot 5 apic_id 6.

  518 07:15:58.790393  AP: slot 4 apic_id 4.

  519 07:15:58.794114  AP: slot 6 apic_id 5.

  520 07:15:58.794567  AP: slot 7 apic_id 7.

  521 07:15:58.800609  Waiting for 2nd SIPI to complete...done.

  522 07:15:58.807060  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  523 07:15:58.810040  Processing 13 relocs. Offset value of 0x00038000

  524 07:15:58.816905  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  525 07:15:58.823521  Installing SMM handler to 0x9a000000

  526 07:15:58.829924  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  527 07:15:58.833637  Processing 658 relocs. Offset value of 0x9a010000

  528 07:15:58.843191  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  529 07:15:58.847020  Processing 13 relocs. Offset value of 0x9a008000

  530 07:15:58.853554  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  531 07:15:58.859631  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  532 07:15:58.863273  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  533 07:15:58.870042  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  534 07:15:58.876807  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  535 07:15:58.882941  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  536 07:15:58.886684  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  537 07:15:58.893232  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  538 07:15:58.896248  Clearing SMI status registers

  539 07:15:58.899956  SMI_STS: PM1 

  540 07:15:58.900483  PM1_STS: PWRBTN 

  541 07:15:58.902976  TCO_STS: SECOND_TO 

  542 07:15:58.906515  New SMBASE 0x9a000000

  543 07:15:58.909545  In relocation handler: CPU 0

  544 07:15:58.913172  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  545 07:15:58.916350  Writing SMRR. base = 0x9a000006, mask=0xff000800

  546 07:15:58.920134  Relocation complete.

  547 07:15:58.923054  New SMBASE 0x99fff800

  548 07:15:58.923543  In relocation handler: CPU 2

  549 07:15:58.929806  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  550 07:15:58.933663  Writing SMRR. base = 0x9a000006, mask=0xff000800

  551 07:15:58.936397  Relocation complete.

  552 07:15:58.940087  New SMBASE 0x99ffe400

  553 07:15:58.940543  In relocation handler: CPU 7

  554 07:15:58.946173  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  555 07:15:58.949819  Writing SMRR. base = 0x9a000006, mask=0xff000800

  556 07:15:58.953408  Relocation complete.

  557 07:15:58.953859  New SMBASE 0x99ffe800

  558 07:15:58.956333  In relocation handler: CPU 6

  559 07:15:58.963050  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  560 07:15:58.966576  Writing SMRR. base = 0x9a000006, mask=0xff000800

  561 07:15:58.969593  Relocation complete.

  562 07:15:58.970039  New SMBASE 0x99fff000

  563 07:15:58.972694  In relocation handler: CPU 4

  564 07:15:58.976207  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  565 07:15:58.982878  Writing SMRR. base = 0x9a000006, mask=0xff000800

  566 07:15:58.985730  Relocation complete.

  567 07:15:58.985972  New SMBASE 0x99ffec00

  568 07:15:58.989361  In relocation handler: CPU 5

  569 07:15:58.992309  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  570 07:15:58.999121  Writing SMRR. base = 0x9a000006, mask=0xff000800

  571 07:15:59.002850  Relocation complete.

  572 07:15:59.003061  New SMBASE 0x99fffc00

  573 07:15:59.005897  In relocation handler: CPU 1

  574 07:15:59.008971  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  575 07:15:59.015551  Writing SMRR. base = 0x9a000006, mask=0xff000800

  576 07:15:59.015731  Relocation complete.

  577 07:15:59.019091  New SMBASE 0x99fff400

  578 07:15:59.022252  In relocation handler: CPU 3

  579 07:15:59.025998  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  580 07:15:59.032678  Writing SMRR. base = 0x9a000006, mask=0xff000800

  581 07:15:59.033077  Relocation complete.

  582 07:15:59.035911  Initializing CPU #0

  583 07:15:59.039440  CPU: vendor Intel device 806ec

  584 07:15:59.042404  CPU: family 06, model 8e, stepping 0c

  585 07:15:59.046072  Clearing out pending MCEs

  586 07:15:59.049562  Setting up local APIC...

  587 07:15:59.050075   apic_id: 0x00 done.

  588 07:15:59.052714  Turbo is available but hidden

  589 07:15:59.055702  Turbo is available and visible

  590 07:15:59.059242  VMX status: enabled

  591 07:15:59.062217  IA32_FEATURE_CONTROL status: locked

  592 07:15:59.065908  Skip microcode update

  593 07:15:59.066388  CPU #0 initialized

  594 07:15:59.069596  Initializing CPU #2

  595 07:15:59.070049  Initializing CPU #1

  596 07:15:59.072606  Initializing CPU #3

  597 07:15:59.075526  Initializing CPU #5

  598 07:15:59.075988  Initializing CPU #7

  599 07:15:59.078997  CPU: vendor Intel device 806ec

  600 07:15:59.082513  CPU: family 06, model 8e, stepping 0c

  601 07:15:59.085621  Clearing out pending MCEs

  602 07:15:59.089050  CPU: vendor Intel device 806ec

  603 07:15:59.092088  CPU: family 06, model 8e, stepping 0c

  604 07:15:59.095631  Initializing CPU #4

  605 07:15:59.098719  Initializing CPU #6

  606 07:15:59.099195  CPU: vendor Intel device 806ec

  607 07:15:59.105453  CPU: family 06, model 8e, stepping 0c

  608 07:15:59.109076  CPU: vendor Intel device 806ec

  609 07:15:59.112085  CPU: family 06, model 8e, stepping 0c

  610 07:15:59.115556  Clearing out pending MCEs

  611 07:15:59.116020  Clearing out pending MCEs

  612 07:15:59.118656  CPU: vendor Intel device 806ec

  613 07:15:59.122287  CPU: family 06, model 8e, stepping 0c

  614 07:15:59.125484  CPU: vendor Intel device 806ec

  615 07:15:59.128551  CPU: family 06, model 8e, stepping 0c

  616 07:15:59.132187  Clearing out pending MCEs

  617 07:15:59.135287  Clearing out pending MCEs

  618 07:15:59.139005  Setting up local APIC...

  619 07:15:59.141935  Setting up local APIC...

  620 07:15:59.142411   apic_id: 0x02 done.

  621 07:15:59.145009  Setting up local APIC...

  622 07:15:59.148494   apic_id: 0x01 done.

  623 07:15:59.148938  VMX status: enabled

  624 07:15:59.152173   apic_id: 0x03 done.

  625 07:15:59.155361  IA32_FEATURE_CONTROL status: locked

  626 07:15:59.158417  VMX status: enabled

  627 07:15:59.158898  Skip microcode update

  628 07:15:59.161867  IA32_FEATURE_CONTROL status: locked

  629 07:15:59.164961  CPU #1 initialized

  630 07:15:59.168660  Skip microcode update

  631 07:15:59.169127  Clearing out pending MCEs

  632 07:15:59.171693  VMX status: enabled

  633 07:15:59.174662  CPU #3 initialized

  634 07:15:59.178401  IA32_FEATURE_CONTROL status: locked

  635 07:15:59.181907  Setting up local APIC...

  636 07:15:59.182364  Skip microcode update

  637 07:15:59.184942   apic_id: 0x06 done.

  638 07:15:59.187880  Setting up local APIC...

  639 07:15:59.191543  CPU: vendor Intel device 806ec

  640 07:15:59.195173  CPU: family 06, model 8e, stepping 0c

  641 07:15:59.195652  Clearing out pending MCEs

  642 07:15:59.198170  Setting up local APIC...

  643 07:15:59.201835   apic_id: 0x07 done.

  644 07:15:59.204673  VMX status: enabled

  645 07:15:59.205124  VMX status: enabled

  646 07:15:59.208286  IA32_FEATURE_CONTROL status: locked

  647 07:15:59.211364  IA32_FEATURE_CONTROL status: locked

  648 07:15:59.214815  Skip microcode update

  649 07:15:59.217710  Skip microcode update

  650 07:15:59.218160  CPU #5 initialized

  651 07:15:59.221144  CPU #7 initialized

  652 07:15:59.221588   apic_id: 0x04 done.

  653 07:15:59.224886  Setting up local APIC...

  654 07:15:59.227983  CPU #2 initialized

  655 07:15:59.228435  VMX status: enabled

  656 07:15:59.230958   apic_id: 0x05 done.

  657 07:15:59.234694  IA32_FEATURE_CONTROL status: locked

  658 07:15:59.237717  VMX status: enabled

  659 07:15:59.238170  Skip microcode update

  660 07:15:59.244519  IA32_FEATURE_CONTROL status: locked

  661 07:15:59.244972  CPU #4 initialized

  662 07:15:59.248099  Skip microcode update

  663 07:15:59.248597  CPU #6 initialized

  664 07:15:59.254462  bsp_do_flight_plan done after 452 msecs.

  665 07:15:59.257720  CPU: frequency set to 4200 MHz

  666 07:15:59.258168  Enabling SMIs.

  667 07:15:59.261209  Locking SMM.

  668 07:15:59.274829  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  669 07:15:59.277714  CBFS @ c08000 size 3f8000

  670 07:15:59.284426  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  671 07:15:59.284947  CBFS: Locating 'vbt.bin'

  672 07:15:59.287508  CBFS: Found @ offset 5f5c0 size 499

  673 07:15:59.294798  Found a VBT of 4608 bytes after decompression

  674 07:15:59.476929  Display FSP Version Info HOB

  675 07:15:59.480052  Reference Code - CPU = 9.0.1e.30

  676 07:15:59.482976  uCode Version = 0.0.0.ca

  677 07:15:59.486664  TXT ACM version = ff.ff.ff.ffff

  678 07:15:59.490120  Display FSP Version Info HOB

  679 07:15:59.493344  Reference Code - ME = 9.0.1e.30

  680 07:15:59.496391  MEBx version = 0.0.0.0

  681 07:15:59.499978  ME Firmware Version = Consumer SKU

  682 07:15:59.503110  Display FSP Version Info HOB

  683 07:15:59.506646  Reference Code - CML PCH = 9.0.1e.30

  684 07:15:59.509668  PCH-CRID Status = Disabled

  685 07:15:59.513279  PCH-CRID Original Value = ff.ff.ff.ffff

  686 07:15:59.516263  PCH-CRID New Value = ff.ff.ff.ffff

  687 07:15:59.519920  OPROM - RST - RAID = ff.ff.ff.ffff

  688 07:15:59.523044  ChipsetInit Base Version = ff.ff.ff.ffff

  689 07:15:59.526664  ChipsetInit Oem Version = ff.ff.ff.ffff

  690 07:15:59.529782  Display FSP Version Info HOB

  691 07:15:59.536871  Reference Code - SA - System Agent = 9.0.1e.30

  692 07:15:59.539585  Reference Code - MRC = 0.7.1.6c

  693 07:15:59.540043  SA - PCIe Version = 9.0.1e.30

  694 07:15:59.542830  SA-CRID Status = Disabled

  695 07:15:59.546468  SA-CRID Original Value = 0.0.0.c

  696 07:15:59.549713  SA-CRID New Value = 0.0.0.c

  697 07:15:59.552976  OPROM - VBIOS = ff.ff.ff.ffff

  698 07:15:59.556364  RTC Init

  699 07:15:59.559956  Set power on after power failure.

  700 07:15:59.560408  Disabling Deep S3

  701 07:15:59.562959  Disabling Deep S3

  702 07:15:59.563441  Disabling Deep S4

  703 07:15:59.566324  Disabling Deep S4

  704 07:15:59.566879  Disabling Deep S5

  705 07:15:59.570021  Disabling Deep S5

  706 07:15:59.576127  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1

  707 07:15:59.576583  Enumerating buses...

  708 07:15:59.582736  Show all devs... Before device enumeration.

  709 07:15:59.583318  Root Device: enabled 1

  710 07:15:59.586678  CPU_CLUSTER: 0: enabled 1

  711 07:15:59.589363  DOMAIN: 0000: enabled 1

  712 07:15:59.592686  APIC: 00: enabled 1

  713 07:15:59.593145  PCI: 00:00.0: enabled 1

  714 07:15:59.595907  PCI: 00:02.0: enabled 1

  715 07:15:59.599024  PCI: 00:04.0: enabled 0

  716 07:15:59.602621  PCI: 00:05.0: enabled 0

  717 07:15:59.603076  PCI: 00:12.0: enabled 1

  718 07:15:59.606173  PCI: 00:12.5: enabled 0

  719 07:15:59.609065  PCI: 00:12.6: enabled 0

  720 07:15:59.609515  PCI: 00:14.0: enabled 1

  721 07:15:59.612773  PCI: 00:14.1: enabled 0

  722 07:15:59.615827  PCI: 00:14.3: enabled 1

  723 07:15:59.619490  PCI: 00:14.5: enabled 0

  724 07:15:59.619989  PCI: 00:15.0: enabled 1

  725 07:15:59.622480  PCI: 00:15.1: enabled 1

  726 07:15:59.626061  PCI: 00:15.2: enabled 0

  727 07:15:59.629156  PCI: 00:15.3: enabled 0

  728 07:15:59.629607  PCI: 00:16.0: enabled 1

  729 07:15:59.632647  PCI: 00:16.1: enabled 0

  730 07:15:59.635676  PCI: 00:16.2: enabled 0

  731 07:15:59.639326  PCI: 00:16.3: enabled 0

  732 07:15:59.639795  PCI: 00:16.4: enabled 0

  733 07:15:59.642423  PCI: 00:16.5: enabled 0

  734 07:15:59.645551  PCI: 00:17.0: enabled 1

  735 07:15:59.646027  PCI: 00:19.0: enabled 1

  736 07:15:59.649077  PCI: 00:19.1: enabled 0

  737 07:15:59.652054  PCI: 00:19.2: enabled 0

  738 07:15:59.655739  PCI: 00:1a.0: enabled 0

  739 07:15:59.656254  PCI: 00:1c.0: enabled 0

  740 07:15:59.659180  PCI: 00:1c.1: enabled 0

  741 07:15:59.662761  PCI: 00:1c.2: enabled 0

  742 07:15:59.665700  PCI: 00:1c.3: enabled 0

  743 07:15:59.666175  PCI: 00:1c.4: enabled 0

  744 07:15:59.668820  PCI: 00:1c.5: enabled 0

  745 07:15:59.672345  PCI: 00:1c.6: enabled 0

  746 07:15:59.675197  PCI: 00:1c.7: enabled 0

  747 07:15:59.675668  PCI: 00:1d.0: enabled 1

  748 07:15:59.678979  PCI: 00:1d.1: enabled 0

  749 07:15:59.682003  PCI: 00:1d.2: enabled 0

  750 07:15:59.682471  PCI: 00:1d.3: enabled 0

  751 07:15:59.685805  PCI: 00:1d.4: enabled 0

  752 07:15:59.688733  PCI: 00:1d.5: enabled 1

  753 07:15:59.691773  PCI: 00:1e.0: enabled 1

  754 07:15:59.692253  PCI: 00:1e.1: enabled 0

  755 07:15:59.695259  PCI: 00:1e.2: enabled 1

  756 07:15:59.698485  PCI: 00:1e.3: enabled 1

  757 07:15:59.702081  PCI: 00:1f.0: enabled 1

  758 07:15:59.702531  PCI: 00:1f.1: enabled 1

  759 07:15:59.705542  PCI: 00:1f.2: enabled 1

  760 07:15:59.708544  PCI: 00:1f.3: enabled 1

  761 07:15:59.712231  PCI: 00:1f.4: enabled 1

  762 07:15:59.712681  PCI: 00:1f.5: enabled 1

  763 07:15:59.715284  PCI: 00:1f.6: enabled 0

  764 07:15:59.718830  USB0 port 0: enabled 1

  765 07:15:59.719354  I2C: 00:15: enabled 1

  766 07:15:59.722024  I2C: 00:5d: enabled 1

  767 07:15:59.724970  GENERIC: 0.0: enabled 1

  768 07:15:59.728654  I2C: 00:1a: enabled 1

  769 07:15:59.729105  I2C: 00:38: enabled 1

  770 07:15:59.731686  I2C: 00:39: enabled 1

  771 07:15:59.735332  I2C: 00:3a: enabled 1

  772 07:15:59.735781  I2C: 00:3b: enabled 1

  773 07:15:59.738337  PCI: 00:00.0: enabled 1

  774 07:15:59.742152  SPI: 00: enabled 1

  775 07:15:59.742653  SPI: 01: enabled 1

  776 07:15:59.745235  PNP: 0c09.0: enabled 1

  777 07:15:59.748071  USB2 port 0: enabled 1

  778 07:15:59.748627  USB2 port 1: enabled 1

  779 07:15:59.751643  USB2 port 2: enabled 0

  780 07:15:59.754746  USB2 port 3: enabled 0

  781 07:15:59.755297  USB2 port 5: enabled 0

  782 07:15:59.758396  USB2 port 6: enabled 1

  783 07:15:59.761916  USB2 port 9: enabled 1

  784 07:15:59.762359  USB3 port 0: enabled 1

  785 07:15:59.765103  USB3 port 1: enabled 1

  786 07:15:59.768793  USB3 port 2: enabled 1

  787 07:15:59.771621  USB3 port 3: enabled 1

  788 07:15:59.772064  USB3 port 4: enabled 0

  789 07:15:59.774776  APIC: 02: enabled 1

  790 07:15:59.778354  APIC: 01: enabled 1

  791 07:15:59.778834  APIC: 03: enabled 1

  792 07:15:59.781392  APIC: 04: enabled 1

  793 07:15:59.781843  APIC: 06: enabled 1

  794 07:15:59.784879  APIC: 05: enabled 1

  795 07:15:59.788023  APIC: 07: enabled 1

  796 07:15:59.788461  Compare with tree...

  797 07:15:59.791551  Root Device: enabled 1

  798 07:15:59.794629   CPU_CLUSTER: 0: enabled 1

  799 07:15:59.795067    APIC: 00: enabled 1

  800 07:15:59.798095    APIC: 02: enabled 1

  801 07:15:59.801288    APIC: 01: enabled 1

  802 07:15:59.804959    APIC: 03: enabled 1

  803 07:15:59.805413    APIC: 04: enabled 1

  804 07:15:59.807934    APIC: 06: enabled 1

  805 07:15:59.811611    APIC: 05: enabled 1

  806 07:15:59.812052    APIC: 07: enabled 1

  807 07:15:59.814614   DOMAIN: 0000: enabled 1

  808 07:15:59.818483    PCI: 00:00.0: enabled 1

  809 07:15:59.821377    PCI: 00:02.0: enabled 1

  810 07:15:59.821855    PCI: 00:04.0: enabled 0

  811 07:15:59.824316    PCI: 00:05.0: enabled 0

  812 07:15:59.827827    PCI: 00:12.0: enabled 1

  813 07:15:59.831546    PCI: 00:12.5: enabled 0

  814 07:15:59.834525    PCI: 00:12.6: enabled 0

  815 07:15:59.834969    PCI: 00:14.0: enabled 1

  816 07:15:59.838253     USB0 port 0: enabled 1

  817 07:15:59.841273      USB2 port 0: enabled 1

  818 07:15:59.844732      USB2 port 1: enabled 1

  819 07:15:59.847831      USB2 port 2: enabled 0

  820 07:15:59.848360      USB2 port 3: enabled 0

  821 07:15:59.850896      USB2 port 5: enabled 0

  822 07:15:59.854573      USB2 port 6: enabled 1

  823 07:15:59.857646      USB2 port 9: enabled 1

  824 07:15:59.861126      USB3 port 0: enabled 1

  825 07:15:59.864106      USB3 port 1: enabled 1

  826 07:15:59.864617      USB3 port 2: enabled 1

  827 07:15:59.867658      USB3 port 3: enabled 1

  828 07:15:59.871281      USB3 port 4: enabled 0

  829 07:15:59.874462    PCI: 00:14.1: enabled 0

  830 07:15:59.877264    PCI: 00:14.3: enabled 1

  831 07:15:59.877786    PCI: 00:14.5: enabled 0

  832 07:15:59.880826    PCI: 00:15.0: enabled 1

  833 07:15:59.884546     I2C: 00:15: enabled 1

  834 07:15:59.887579    PCI: 00:15.1: enabled 1

  835 07:15:59.890546     I2C: 00:5d: enabled 1

  836 07:15:59.891071     GENERIC: 0.0: enabled 1

  837 07:15:59.894309    PCI: 00:15.2: enabled 0

  838 07:15:59.897370    PCI: 00:15.3: enabled 0

  839 07:15:59.900505    PCI: 00:16.0: enabled 1

  840 07:15:59.904345    PCI: 00:16.1: enabled 0

  841 07:15:59.904834    PCI: 00:16.2: enabled 0

  842 07:15:59.907042    PCI: 00:16.3: enabled 0

  843 07:15:59.910802    PCI: 00:16.4: enabled 0

  844 07:15:59.913914    PCI: 00:16.5: enabled 0

  845 07:15:59.914383    PCI: 00:17.0: enabled 1

  846 07:15:59.916978    PCI: 00:19.0: enabled 1

  847 07:15:59.920520     I2C: 00:1a: enabled 1

  848 07:15:59.924125     I2C: 00:38: enabled 1

  849 07:15:59.927366     I2C: 00:39: enabled 1

  850 07:15:59.927807     I2C: 00:3a: enabled 1

  851 07:15:59.930157     I2C: 00:3b: enabled 1

  852 07:15:59.933690    PCI: 00:19.1: enabled 0

  853 07:15:59.937405    PCI: 00:19.2: enabled 0

  854 07:15:59.937847    PCI: 00:1a.0: enabled 0

  855 07:15:59.940280    PCI: 00:1c.0: enabled 0

  856 07:15:59.943845    PCI: 00:1c.1: enabled 0

  857 07:15:59.946912    PCI: 00:1c.2: enabled 0

  858 07:15:59.950655    PCI: 00:1c.3: enabled 0

  859 07:15:59.951120    PCI: 00:1c.4: enabled 0

  860 07:15:59.953703    PCI: 00:1c.5: enabled 0

  861 07:15:59.957227    PCI: 00:1c.6: enabled 0

  862 07:15:59.960308    PCI: 00:1c.7: enabled 0

  863 07:15:59.963834    PCI: 00:1d.0: enabled 1

  864 07:15:59.964278    PCI: 00:1d.1: enabled 0

  865 07:15:59.966614    PCI: 00:1d.2: enabled 0

  866 07:15:59.970332    PCI: 00:1d.3: enabled 0

  867 07:15:59.973717    PCI: 00:1d.4: enabled 0

  868 07:15:59.976857    PCI: 00:1d.5: enabled 1

  869 07:15:59.977298     PCI: 00:00.0: enabled 1

  870 07:15:59.980461    PCI: 00:1e.0: enabled 1

  871 07:15:59.983486    PCI: 00:1e.1: enabled 0

  872 07:15:59.987026    PCI: 00:1e.2: enabled 1

  873 07:15:59.987515     SPI: 00: enabled 1

  874 07:15:59.990017    PCI: 00:1e.3: enabled 1

  875 07:15:59.993740     SPI: 01: enabled 1

  876 07:15:59.996727    PCI: 00:1f.0: enabled 1

  877 07:16:00.000204     PNP: 0c09.0: enabled 1

  878 07:16:00.000840    PCI: 00:1f.1: enabled 1

  879 07:16:00.003250    PCI: 00:1f.2: enabled 1

  880 07:16:00.006318    PCI: 00:1f.3: enabled 1

  881 07:16:00.010058    PCI: 00:1f.4: enabled 1

  882 07:16:00.010509    PCI: 00:1f.5: enabled 1

  883 07:16:00.013136    PCI: 00:1f.6: enabled 0

  884 07:16:00.016704  Root Device scanning...

  885 07:16:00.019625  scan_static_bus for Root Device

  886 07:16:00.023283  CPU_CLUSTER: 0 enabled

  887 07:16:00.023730  DOMAIN: 0000 enabled

  888 07:16:00.026824  DOMAIN: 0000 scanning...

  889 07:16:00.029828  PCI: pci_scan_bus for bus 00

  890 07:16:00.033425  PCI: 00:00.0 [8086/0000] ops

  891 07:16:00.036510  PCI: 00:00.0 [8086/9b61] enabled

  892 07:16:00.039960  PCI: 00:02.0 [8086/0000] bus ops

  893 07:16:00.043666  PCI: 00:02.0 [8086/9b41] enabled

  894 07:16:00.046670  PCI: 00:04.0 [8086/1903] disabled

  895 07:16:00.050022  PCI: 00:08.0 [8086/1911] enabled

  896 07:16:00.052947  PCI: 00:12.0 [8086/02f9] enabled

  897 07:16:00.056542  PCI: 00:14.0 [8086/0000] bus ops

  898 07:16:00.059670  PCI: 00:14.0 [8086/02ed] enabled

  899 07:16:00.063175  PCI: 00:14.2 [8086/02ef] enabled

  900 07:16:00.066301  PCI: 00:14.3 [8086/02f0] enabled

  901 07:16:00.069777  PCI: 00:15.0 [8086/0000] bus ops

  902 07:16:00.072790  PCI: 00:15.0 [8086/02e8] enabled

  903 07:16:00.076112  PCI: 00:15.1 [8086/0000] bus ops

  904 07:16:00.079608  PCI: 00:15.1 [8086/02e9] enabled

  905 07:16:00.082847  PCI: 00:16.0 [8086/0000] ops

  906 07:16:00.085760  PCI: 00:16.0 [8086/02e0] enabled

  907 07:16:00.089343  PCI: 00:17.0 [8086/0000] ops

  908 07:16:00.092294  PCI: 00:17.0 [8086/02d3] enabled

  909 07:16:00.096029  PCI: 00:19.0 [8086/0000] bus ops

  910 07:16:00.099436  PCI: 00:19.0 [8086/02c5] enabled

  911 07:16:00.102997  PCI: 00:1d.0 [8086/0000] bus ops

  912 07:16:00.106043  PCI: 00:1d.0 [8086/02b0] enabled

  913 07:16:00.112621  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  914 07:16:00.116271  PCI: 00:1e.0 [8086/0000] ops

  915 07:16:00.119256  PCI: 00:1e.0 [8086/02a8] enabled

  916 07:16:00.122887  PCI: 00:1e.2 [8086/0000] bus ops

  917 07:16:00.126526  PCI: 00:1e.2 [8086/02aa] enabled

  918 07:16:00.129335  PCI: 00:1e.3 [8086/0000] bus ops

  919 07:16:00.133082  PCI: 00:1e.3 [8086/02ab] enabled

  920 07:16:00.135914  PCI: 00:1f.0 [8086/0000] bus ops

  921 07:16:00.139632  PCI: 00:1f.0 [8086/0284] enabled

  922 07:16:00.142670  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  923 07:16:00.149312  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  924 07:16:00.152402  PCI: 00:1f.3 [8086/0000] bus ops

  925 07:16:00.156014  PCI: 00:1f.3 [8086/02c8] enabled

  926 07:16:00.159215  PCI: 00:1f.4 [8086/0000] bus ops

  927 07:16:00.162656  PCI: 00:1f.4 [8086/02a3] enabled

  928 07:16:00.166178  PCI: 00:1f.5 [8086/0000] bus ops

  929 07:16:00.169468  PCI: 00:1f.5 [8086/02a4] enabled

  930 07:16:00.172720  PCI: Leftover static devices:

  931 07:16:00.173161  PCI: 00:05.0

  932 07:16:00.175620  PCI: 00:12.5

  933 07:16:00.176064  PCI: 00:12.6

  934 07:16:00.179296  PCI: 00:14.1

  935 07:16:00.179736  PCI: 00:14.5

  936 07:16:00.180081  PCI: 00:15.2

  937 07:16:00.182457  PCI: 00:15.3

  938 07:16:00.182897  PCI: 00:16.1

  939 07:16:00.186180  PCI: 00:16.2

  940 07:16:00.186620  PCI: 00:16.3

  941 07:16:00.186973  PCI: 00:16.4

  942 07:16:00.188931  PCI: 00:16.5

  943 07:16:00.189372  PCI: 00:19.1

  944 07:16:00.192518  PCI: 00:19.2

  945 07:16:00.192943  PCI: 00:1a.0

  946 07:16:00.193291  PCI: 00:1c.0

  947 07:16:00.195619  PCI: 00:1c.1

  948 07:16:00.196093  PCI: 00:1c.2

  949 07:16:00.199180  PCI: 00:1c.3

  950 07:16:00.199631  PCI: 00:1c.4

  951 07:16:00.202207  PCI: 00:1c.5

  952 07:16:00.202659  PCI: 00:1c.6

  953 07:16:00.203018  PCI: 00:1c.7

  954 07:16:00.205975  PCI: 00:1d.1

  955 07:16:00.206423  PCI: 00:1d.2

  956 07:16:00.208967  PCI: 00:1d.3

  957 07:16:00.209453  PCI: 00:1d.4

  958 07:16:00.209841  PCI: 00:1d.5

  959 07:16:00.212014  PCI: 00:1e.1

  960 07:16:00.212461  PCI: 00:1f.1

  961 07:16:00.215663  PCI: 00:1f.2

  962 07:16:00.216113  PCI: 00:1f.6

  963 07:16:00.219194  PCI: Check your devicetree.cb.

  964 07:16:00.222266  PCI: 00:02.0 scanning...

  965 07:16:00.225894  scan_generic_bus for PCI: 00:02.0

  966 07:16:00.228853  scan_generic_bus for PCI: 00:02.0 done

  967 07:16:00.235606  scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs

  968 07:16:00.236058  PCI: 00:14.0 scanning...

  969 07:16:00.239131  scan_static_bus for PCI: 00:14.0

  970 07:16:00.242638  USB0 port 0 enabled

  971 07:16:00.245602  USB0 port 0 scanning...

  972 07:16:00.249141  scan_static_bus for USB0 port 0

  973 07:16:00.252145  USB2 port 0 enabled

  974 07:16:00.252591  USB2 port 1 enabled

  975 07:16:00.255731  USB2 port 2 disabled

  976 07:16:00.256174  USB2 port 3 disabled

  977 07:16:00.258893  USB2 port 5 disabled

  978 07:16:00.262623  USB2 port 6 enabled

  979 07:16:00.263132  USB2 port 9 enabled

  980 07:16:00.265454  USB3 port 0 enabled

  981 07:16:00.269153  USB3 port 1 enabled

  982 07:16:00.269648  USB3 port 2 enabled

  983 07:16:00.272258  USB3 port 3 enabled

  984 07:16:00.272718  USB3 port 4 disabled

  985 07:16:00.275686  USB2 port 0 scanning...

  986 07:16:00.278675  scan_static_bus for USB2 port 0

  987 07:16:00.282338  scan_static_bus for USB2 port 0 done

  988 07:16:00.289059  scan_bus: scanning of bus USB2 port 0 took 9713 usecs

  989 07:16:00.292091  USB2 port 1 scanning...

  990 07:16:00.295573  scan_static_bus for USB2 port 1

  991 07:16:00.298730  scan_static_bus for USB2 port 1 done

  992 07:16:00.302228  scan_bus: scanning of bus USB2 port 1 took 9692 usecs

  993 07:16:00.305672  USB2 port 6 scanning...

  994 07:16:00.308992  scan_static_bus for USB2 port 6

  995 07:16:00.311934  scan_static_bus for USB2 port 6 done

  996 07:16:00.318662  scan_bus: scanning of bus USB2 port 6 took 9717 usecs

  997 07:16:00.322351  USB2 port 9 scanning...

  998 07:16:00.325341  scan_static_bus for USB2 port 9

  999 07:16:00.328392  scan_static_bus for USB2 port 9 done

 1000 07:16:00.335342  scan_bus: scanning of bus USB2 port 9 took 9702 usecs

 1001 07:16:00.335882  USB3 port 0 scanning...

 1002 07:16:00.338669  scan_static_bus for USB3 port 0

 1003 07:16:00.342235  scan_static_bus for USB3 port 0 done

 1004 07:16:00.348799  scan_bus: scanning of bus USB3 port 0 took 9702 usecs

 1005 07:16:00.351818  USB3 port 1 scanning...

 1006 07:16:00.355446  scan_static_bus for USB3 port 1

 1007 07:16:00.358471  scan_static_bus for USB3 port 1 done

 1008 07:16:00.365222  scan_bus: scanning of bus USB3 port 1 took 9702 usecs

 1009 07:16:00.365673  USB3 port 2 scanning...

 1010 07:16:00.368290  scan_static_bus for USB3 port 2

 1011 07:16:00.371800  scan_static_bus for USB3 port 2 done

 1012 07:16:00.378468  scan_bus: scanning of bus USB3 port 2 took 9710 usecs

 1013 07:16:00.381400  USB3 port 3 scanning...

 1014 07:16:00.385332  scan_static_bus for USB3 port 3

 1015 07:16:00.387995  scan_static_bus for USB3 port 3 done

 1016 07:16:00.394458  scan_bus: scanning of bus USB3 port 3 took 9692 usecs

 1017 07:16:00.398375  scan_static_bus for USB0 port 0 done

 1018 07:16:00.401374  scan_bus: scanning of bus USB0 port 0 took 155409 usecs

 1019 07:16:00.408197  scan_static_bus for PCI: 00:14.0 done

 1020 07:16:00.411017  scan_bus: scanning of bus PCI: 00:14.0 took 173035 usecs

 1021 07:16:00.414801  PCI: 00:15.0 scanning...

 1022 07:16:00.417988  scan_generic_bus for PCI: 00:15.0

 1023 07:16:00.421024  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1024 07:16:00.427784  scan_generic_bus for PCI: 00:15.0 done

 1025 07:16:00.431183  scan_bus: scanning of bus PCI: 00:15.0 took 14281 usecs

 1026 07:16:00.434391  PCI: 00:15.1 scanning...

 1027 07:16:00.437465  scan_generic_bus for PCI: 00:15.1

 1028 07:16:00.440988  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1029 07:16:00.447868  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1030 07:16:00.450746  scan_generic_bus for PCI: 00:15.1 done

 1031 07:16:00.457631  scan_bus: scanning of bus PCI: 00:15.1 took 18615 usecs

 1032 07:16:00.458077  PCI: 00:19.0 scanning...

 1033 07:16:00.464287  scan_generic_bus for PCI: 00:19.0

 1034 07:16:00.467541  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1035 07:16:00.470726  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1036 07:16:00.474262  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1037 07:16:00.477270  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1038 07:16:00.483836  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1039 07:16:00.487516  scan_generic_bus for PCI: 00:19.0 done

 1040 07:16:00.494410  scan_bus: scanning of bus PCI: 00:19.0 took 30762 usecs

 1041 07:16:00.494951  PCI: 00:1d.0 scanning...

 1042 07:16:00.497238  do_pci_scan_bridge for PCI: 00:1d.0

 1043 07:16:00.500928  PCI: pci_scan_bus for bus 01

 1044 07:16:00.504087  PCI: 01:00.0 [1c5c/1327] enabled

 1045 07:16:00.510742  Enabling Common Clock Configuration

 1046 07:16:00.513657  L1 Sub-State supported from root port 29

 1047 07:16:00.517281  L1 Sub-State Support = 0xf

 1048 07:16:00.517723  CommonModeRestoreTime = 0x28

 1049 07:16:00.524021  Power On Value = 0x16, Power On Scale = 0x0

 1050 07:16:00.524462  ASPM: Enabled L1

 1051 07:16:00.530708  scan_bus: scanning of bus PCI: 00:1d.0 took 32804 usecs

 1052 07:16:00.533899  PCI: 00:1e.2 scanning...

 1053 07:16:00.536755  scan_generic_bus for PCI: 00:1e.2

 1054 07:16:00.540429  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1055 07:16:00.543886  scan_generic_bus for PCI: 00:1e.2 done

 1056 07:16:00.550629  scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs

 1057 07:16:00.553637  PCI: 00:1e.3 scanning...

 1058 07:16:00.557433  scan_generic_bus for PCI: 00:1e.3

 1059 07:16:00.560604  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1060 07:16:00.563580  scan_generic_bus for PCI: 00:1e.3 done

 1061 07:16:00.570209  scan_bus: scanning of bus PCI: 00:1e.3 took 14020 usecs

 1062 07:16:00.573798  PCI: 00:1f.0 scanning...

 1063 07:16:00.576776  scan_static_bus for PCI: 00:1f.0

 1064 07:16:00.577214  PNP: 0c09.0 enabled

 1065 07:16:00.580566  scan_static_bus for PCI: 00:1f.0 done

 1066 07:16:00.586908  scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs

 1067 07:16:00.590046  PCI: 00:1f.3 scanning...

 1068 07:16:00.596879  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1069 07:16:00.597390  PCI: 00:1f.4 scanning...

 1070 07:16:00.600398  scan_generic_bus for PCI: 00:1f.4

 1071 07:16:00.606974  scan_generic_bus for PCI: 00:1f.4 done

 1072 07:16:00.610019  scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs

 1073 07:16:00.613175  PCI: 00:1f.5 scanning...

 1074 07:16:00.616554  scan_generic_bus for PCI: 00:1f.5

 1075 07:16:00.619963  scan_generic_bus for PCI: 00:1f.5 done

 1076 07:16:00.627055  scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs

 1077 07:16:00.633026  scan_bus: scanning of bus DOMAIN: 0000 took 605276 usecs

 1078 07:16:00.636664  scan_static_bus for Root Device done

 1079 07:16:00.643140  scan_bus: scanning of bus Root Device took 625193 usecs

 1080 07:16:00.643718  done

 1081 07:16:00.646587  Chrome EC: UHEPI supported

 1082 07:16:00.653106  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1083 07:16:00.656819  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1084 07:16:00.663123  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1085 07:16:00.670329  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1086 07:16:00.674063  SPI flash protection: WPSW=0 SRP0=0

 1087 07:16:00.679967  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1088 07:16:00.683607  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1089 07:16:00.686763  found VGA at PCI: 00:02.0

 1090 07:16:00.690221  Setting up VGA for PCI: 00:02.0

 1091 07:16:00.696989  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1092 07:16:00.700049  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1093 07:16:00.703925  Allocating resources...

 1094 07:16:00.706917  Reading resources...

 1095 07:16:00.710069  Root Device read_resources bus 0 link: 0

 1096 07:16:00.713153  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1097 07:16:00.719851  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1098 07:16:00.723397  DOMAIN: 0000 read_resources bus 0 link: 0

 1099 07:16:00.730747  PCI: 00:14.0 read_resources bus 0 link: 0

 1100 07:16:00.734022  USB0 port 0 read_resources bus 0 link: 0

 1101 07:16:00.742223  USB0 port 0 read_resources bus 0 link: 0 done

 1102 07:16:00.745854  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1103 07:16:00.752878  PCI: 00:15.0 read_resources bus 1 link: 0

 1104 07:16:00.756485  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1105 07:16:00.763456  PCI: 00:15.1 read_resources bus 2 link: 0

 1106 07:16:00.766175  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1107 07:16:00.773875  PCI: 00:19.0 read_resources bus 3 link: 0

 1108 07:16:00.779979  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1109 07:16:00.783729  PCI: 00:1d.0 read_resources bus 1 link: 0

 1110 07:16:00.790089  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1111 07:16:00.793198  PCI: 00:1e.2 read_resources bus 4 link: 0

 1112 07:16:00.799787  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1113 07:16:00.803572  PCI: 00:1e.3 read_resources bus 5 link: 0

 1114 07:16:00.810294  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1115 07:16:00.813381  PCI: 00:1f.0 read_resources bus 0 link: 0

 1116 07:16:00.820007  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1117 07:16:00.826546  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1118 07:16:00.830161  Root Device read_resources bus 0 link: 0 done

 1119 07:16:00.833036  Done reading resources.

 1120 07:16:00.836699  Show resources in subtree (Root Device)...After reading.

 1121 07:16:00.843060   Root Device child on link 0 CPU_CLUSTER: 0

 1122 07:16:00.846449    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1123 07:16:00.846902     APIC: 00

 1124 07:16:00.849998     APIC: 02

 1125 07:16:00.850448     APIC: 01

 1126 07:16:00.852971     APIC: 03

 1127 07:16:00.853422     APIC: 04

 1128 07:16:00.853781     APIC: 06

 1129 07:16:00.856648     APIC: 05

 1130 07:16:00.857099     APIC: 07

 1131 07:16:00.860194    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1132 07:16:00.870006    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1133 07:16:00.926074    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1134 07:16:00.926618     PCI: 00:00.0

 1135 07:16:00.927573     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1136 07:16:00.927978     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1137 07:16:00.928438     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1138 07:16:00.929248     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1139 07:16:00.975974     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1140 07:16:00.976567     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1141 07:16:00.977475     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1142 07:16:00.978293     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1143 07:16:00.978687     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1144 07:16:00.979137     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1145 07:16:01.006581     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1146 07:16:01.007148     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1147 07:16:01.010175     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1148 07:16:01.013767     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1149 07:16:01.023743     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1150 07:16:01.033246     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1151 07:16:01.033697     PCI: 00:02.0

 1152 07:16:01.042956     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1153 07:16:01.053191     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1154 07:16:01.063418     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1155 07:16:01.063917     PCI: 00:04.0

 1156 07:16:01.066342     PCI: 00:08.0

 1157 07:16:01.076221     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1158 07:16:01.076771     PCI: 00:12.0

 1159 07:16:01.086301     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1160 07:16:01.092912     PCI: 00:14.0 child on link 0 USB0 port 0

 1161 07:16:01.102435     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1162 07:16:01.106274      USB0 port 0 child on link 0 USB2 port 0

 1163 07:16:01.109146       USB2 port 0

 1164 07:16:01.109587       USB2 port 1

 1165 07:16:01.112537       USB2 port 2

 1166 07:16:01.112988       USB2 port 3

 1167 07:16:01.116250       USB2 port 5

 1168 07:16:01.116706       USB2 port 6

 1169 07:16:01.119134       USB2 port 9

 1170 07:16:01.119524       USB3 port 0

 1171 07:16:01.122831       USB3 port 1

 1172 07:16:01.123306       USB3 port 2

 1173 07:16:01.125986       USB3 port 3

 1174 07:16:01.126425       USB3 port 4

 1175 07:16:01.129580     PCI: 00:14.2

 1176 07:16:01.139051     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1177 07:16:01.149815     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1178 07:16:01.150406     PCI: 00:14.3

 1179 07:16:01.159116     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1180 07:16:01.165959     PCI: 00:15.0 child on link 0 I2C: 01:15

 1181 07:16:01.175613     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1182 07:16:01.176156      I2C: 01:15

 1183 07:16:01.179109     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1184 07:16:01.188663     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1185 07:16:01.192038      I2C: 02:5d

 1186 07:16:01.192484      GENERIC: 0.0

 1187 07:16:01.195712     PCI: 00:16.0

 1188 07:16:01.205379     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1189 07:16:01.205839     PCI: 00:17.0

 1190 07:16:01.215381     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1191 07:16:01.225066     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1192 07:16:01.231755     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1193 07:16:01.242144     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1194 07:16:01.248296     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1195 07:16:01.258175     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1196 07:16:01.261668     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1197 07:16:01.271883     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1198 07:16:01.275252      I2C: 03:1a

 1199 07:16:01.275790      I2C: 03:38

 1200 07:16:01.278125      I2C: 03:39

 1201 07:16:01.278573      I2C: 03:3a

 1202 07:16:01.281950      I2C: 03:3b

 1203 07:16:01.284969     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1204 07:16:01.295055     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1205 07:16:01.304510     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1206 07:16:01.311208     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1207 07:16:01.314738      PCI: 01:00.0

 1208 07:16:01.324515      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1209 07:16:01.324973     PCI: 00:1e.0

 1210 07:16:01.337620     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1211 07:16:01.347832     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1212 07:16:01.351013     PCI: 00:1e.2 child on link 0 SPI: 00

 1213 07:16:01.360924     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1214 07:16:01.361381      SPI: 00

 1215 07:16:01.367436     PCI: 00:1e.3 child on link 0 SPI: 01

 1216 07:16:01.377986     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1217 07:16:01.378526      SPI: 01

 1218 07:16:01.381105     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1219 07:16:01.390818     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1220 07:16:01.400978     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1221 07:16:01.401570      PNP: 0c09.0

 1222 07:16:01.410530      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1223 07:16:01.411051     PCI: 00:1f.3

 1224 07:16:01.420675     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1225 07:16:01.430407     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1226 07:16:01.433608     PCI: 00:1f.4

 1227 07:16:01.443848     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1228 07:16:01.453644     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1229 07:16:01.454096     PCI: 00:1f.5

 1230 07:16:01.463907     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1231 07:16:01.470508  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1232 07:16:01.476671  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1233 07:16:01.483488  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1234 07:16:01.487022  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1235 07:16:01.490096  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1236 07:16:01.493174  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1237 07:16:01.496754  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1238 07:16:01.503576  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1239 07:16:01.509944  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1240 07:16:01.519626  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1241 07:16:01.526797  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1242 07:16:01.533793  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1243 07:16:01.536573  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1244 07:16:01.546262  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1245 07:16:01.549731  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1246 07:16:01.556711  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1247 07:16:01.559554  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1248 07:16:01.563037  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1249 07:16:01.569815  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1250 07:16:01.572677  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1251 07:16:01.579387  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1252 07:16:01.582975  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1253 07:16:01.589488  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1254 07:16:01.592643  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1255 07:16:01.599216  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1256 07:16:01.602401  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1257 07:16:01.609115  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1258 07:16:01.612438  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1259 07:16:01.619025  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1260 07:16:01.622538  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1261 07:16:01.629188  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1262 07:16:01.632192  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1263 07:16:01.639022  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1264 07:16:01.642081  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1265 07:16:01.645667  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1266 07:16:01.651829  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1267 07:16:01.655601  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1268 07:16:01.665728  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1269 07:16:01.668619  avoid_fixed_resources: DOMAIN: 0000

 1270 07:16:01.675190  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1271 07:16:01.682021  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1272 07:16:01.689048  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1273 07:16:01.694786  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1274 07:16:01.705162  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1275 07:16:01.711889  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1276 07:16:01.718546  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1277 07:16:01.728088  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1278 07:16:01.734850  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1279 07:16:01.741641  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1280 07:16:01.748160  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1281 07:16:01.757787  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1282 07:16:01.758351  Setting resources...

 1283 07:16:01.764771  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1284 07:16:01.767560  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1285 07:16:01.774242  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1286 07:16:01.777936  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1287 07:16:01.780861  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1288 07:16:01.787801  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1289 07:16:01.794719  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1290 07:16:01.801073  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1291 07:16:01.807239  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1292 07:16:01.814490  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1293 07:16:01.817595  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1294 07:16:01.824311  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1295 07:16:01.827055  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1296 07:16:01.830799  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1297 07:16:01.837489  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1298 07:16:01.840660  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1299 07:16:01.847523  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1300 07:16:01.850856  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1301 07:16:01.857024  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1302 07:16:01.860634  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1303 07:16:01.867012  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1304 07:16:01.870694  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1305 07:16:01.876844  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1306 07:16:01.880512  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1307 07:16:01.887058  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1308 07:16:01.890135  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1309 07:16:01.896766  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1310 07:16:01.900256  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1311 07:16:01.903328  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1312 07:16:01.909945  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1313 07:16:01.913495  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1314 07:16:01.920153  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1315 07:16:01.926750  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1316 07:16:01.933261  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1317 07:16:01.942986  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1318 07:16:01.949692  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1319 07:16:01.953257  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1320 07:16:01.963048  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1321 07:16:01.966023  Root Device assign_resources, bus 0 link: 0

 1322 07:16:01.969619  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1323 07:16:01.979953  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1324 07:16:01.986101  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1325 07:16:01.996687  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1326 07:16:02.002811  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1327 07:16:02.013141  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1328 07:16:02.019636  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1329 07:16:02.026374  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1330 07:16:02.029227  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1331 07:16:02.039007  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1332 07:16:02.045649  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1333 07:16:02.055979  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1334 07:16:02.062454  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1335 07:16:02.065710  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1336 07:16:02.072197  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1337 07:16:02.078927  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1338 07:16:02.085733  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1339 07:16:02.088718  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1340 07:16:02.098515  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1341 07:16:02.105262  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1342 07:16:02.111773  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1343 07:16:02.122051  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1344 07:16:02.128361  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1345 07:16:02.135335  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1346 07:16:02.144999  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1347 07:16:02.151578  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1348 07:16:02.158081  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1349 07:16:02.161645  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1350 07:16:02.171078  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1351 07:16:02.177828  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1352 07:16:02.187839  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1353 07:16:02.191296  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1354 07:16:02.200949  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1355 07:16:02.204391  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1356 07:16:02.214610  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1357 07:16:02.221096  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1358 07:16:02.227484  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1359 07:16:02.230454  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1360 07:16:02.240479  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1361 07:16:02.244056  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1362 07:16:02.247118  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1363 07:16:02.253990  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1364 07:16:02.256979  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1365 07:16:02.264094  LPC: Trying to open IO window from 800 size 1ff

 1366 07:16:02.270530  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1367 07:16:02.280274  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1368 07:16:02.286941  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1369 07:16:02.296785  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1370 07:16:02.300202  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1371 07:16:02.306798  Root Device assign_resources, bus 0 link: 0

 1372 07:16:02.307267  Done setting resources.

 1373 07:16:02.313333  Show resources in subtree (Root Device)...After assigning values.

 1374 07:16:02.320056   Root Device child on link 0 CPU_CLUSTER: 0

 1375 07:16:02.323645    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1376 07:16:02.324123     APIC: 00

 1377 07:16:02.326786     APIC: 02

 1378 07:16:02.327245     APIC: 01

 1379 07:16:02.327646     APIC: 03

 1380 07:16:02.329775     APIC: 04

 1381 07:16:02.330209     APIC: 06

 1382 07:16:02.333326     APIC: 05

 1383 07:16:02.333762     APIC: 07

 1384 07:16:02.336365    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1385 07:16:02.346250    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1386 07:16:02.359654    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1387 07:16:02.359925     PCI: 00:00.0

 1388 07:16:02.369695     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1389 07:16:02.379349     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1390 07:16:02.389242     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1391 07:16:02.399237     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1392 07:16:02.405591     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1393 07:16:02.415834     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1394 07:16:02.425827     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1395 07:16:02.435321     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1396 07:16:02.445423     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1397 07:16:02.452132     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1398 07:16:02.462331     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1399 07:16:02.472047     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1400 07:16:02.482491     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1401 07:16:02.492081     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1402 07:16:02.502112     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1403 07:16:02.511662     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1404 07:16:02.512126     PCI: 00:02.0

 1405 07:16:02.521558     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1406 07:16:02.531865     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1407 07:16:02.541524     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1408 07:16:02.544582     PCI: 00:04.0

 1409 07:16:02.545031     PCI: 00:08.0

 1410 07:16:02.554544     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1411 07:16:02.558350     PCI: 00:12.0

 1412 07:16:02.567937     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1413 07:16:02.571542     PCI: 00:14.0 child on link 0 USB0 port 0

 1414 07:16:02.581213     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1415 07:16:02.588151      USB0 port 0 child on link 0 USB2 port 0

 1416 07:16:02.588653       USB2 port 0

 1417 07:16:02.591072       USB2 port 1

 1418 07:16:02.591558       USB2 port 2

 1419 07:16:02.594445       USB2 port 3

 1420 07:16:02.594894       USB2 port 5

 1421 07:16:02.598074       USB2 port 6

 1422 07:16:02.598525       USB2 port 9

 1423 07:16:02.601063       USB3 port 0

 1424 07:16:02.604553       USB3 port 1

 1425 07:16:02.605051       USB3 port 2

 1426 07:16:02.607550       USB3 port 3

 1427 07:16:02.608000       USB3 port 4

 1428 07:16:02.611195     PCI: 00:14.2

 1429 07:16:02.620871     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1430 07:16:02.631045     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1431 07:16:02.631544     PCI: 00:14.3

 1432 07:16:02.640516     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1433 07:16:02.647183     PCI: 00:15.0 child on link 0 I2C: 01:15

 1434 07:16:02.657523     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1435 07:16:02.658085      I2C: 01:15

 1436 07:16:02.663719     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1437 07:16:02.673658     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1438 07:16:02.674157      I2C: 02:5d

 1439 07:16:02.677006      GENERIC: 0.0

 1440 07:16:02.677463     PCI: 00:16.0

 1441 07:16:02.686683     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1442 07:16:02.690173     PCI: 00:17.0

 1443 07:16:02.699780     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1444 07:16:02.710076     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1445 07:16:02.719831     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1446 07:16:02.729734     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1447 07:16:02.736245     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1448 07:16:02.746157     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1449 07:16:02.753152     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1450 07:16:02.762515     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1451 07:16:02.762970      I2C: 03:1a

 1452 07:16:02.766374      I2C: 03:38

 1453 07:16:02.766907      I2C: 03:39

 1454 07:16:02.769637      I2C: 03:3a

 1455 07:16:02.770087      I2C: 03:3b

 1456 07:16:02.776267     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1457 07:16:02.782618     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1458 07:16:02.792375     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1459 07:16:02.805718     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1460 07:16:02.806172      PCI: 01:00.0

 1461 07:16:02.815570      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1462 07:16:02.818642     PCI: 00:1e.0

 1463 07:16:02.828614     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1464 07:16:02.838616     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1465 07:16:02.842164     PCI: 00:1e.2 child on link 0 SPI: 00

 1466 07:16:02.855167     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1467 07:16:02.855621      SPI: 00

 1468 07:16:02.858789     PCI: 00:1e.3 child on link 0 SPI: 01

 1469 07:16:02.868444     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1470 07:16:02.871980      SPI: 01

 1471 07:16:02.874892     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1472 07:16:02.885048     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1473 07:16:02.891812     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1474 07:16:02.895197      PNP: 0c09.0

 1475 07:16:02.905073      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1476 07:16:02.905521     PCI: 00:1f.3

 1477 07:16:02.914981     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1478 07:16:02.924800     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1479 07:16:02.928079     PCI: 00:1f.4

 1480 07:16:02.938104     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1481 07:16:02.947799     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1482 07:16:02.948250     PCI: 00:1f.5

 1483 07:16:02.957838     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1484 07:16:02.961278  Done allocating resources.

 1485 07:16:02.968093  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1486 07:16:02.970776  Enabling resources...

 1487 07:16:02.974272  PCI: 00:00.0 subsystem <- 8086/9b61

 1488 07:16:02.977869  PCI: 00:00.0 cmd <- 06

 1489 07:16:02.980868  PCI: 00:02.0 subsystem <- 8086/9b41

 1490 07:16:02.983747  PCI: 00:02.0 cmd <- 03

 1491 07:16:02.984194  PCI: 00:08.0 cmd <- 06

 1492 07:16:02.990339  PCI: 00:12.0 subsystem <- 8086/02f9

 1493 07:16:02.990788  PCI: 00:12.0 cmd <- 02

 1494 07:16:02.993833  PCI: 00:14.0 subsystem <- 8086/02ed

 1495 07:16:02.997398  PCI: 00:14.0 cmd <- 02

 1496 07:16:03.000825  PCI: 00:14.2 cmd <- 02

 1497 07:16:03.003925  PCI: 00:14.3 subsystem <- 8086/02f0

 1498 07:16:03.007263  PCI: 00:14.3 cmd <- 02

 1499 07:16:03.010370  PCI: 00:15.0 subsystem <- 8086/02e8

 1500 07:16:03.013689  PCI: 00:15.0 cmd <- 02

 1501 07:16:03.016967  PCI: 00:15.1 subsystem <- 8086/02e9

 1502 07:16:03.020891  PCI: 00:15.1 cmd <- 02

 1503 07:16:03.023635  PCI: 00:16.0 subsystem <- 8086/02e0

 1504 07:16:03.026638  PCI: 00:16.0 cmd <- 02

 1505 07:16:03.030622  PCI: 00:17.0 subsystem <- 8086/02d3

 1506 07:16:03.031065  PCI: 00:17.0 cmd <- 03

 1507 07:16:03.037435  PCI: 00:19.0 subsystem <- 8086/02c5

 1508 07:16:03.037879  PCI: 00:19.0 cmd <- 02

 1509 07:16:03.040346  PCI: 00:1d.0 bridge ctrl <- 0013

 1510 07:16:03.043258  PCI: 00:1d.0 subsystem <- 8086/02b0

 1511 07:16:03.047198  PCI: 00:1d.0 cmd <- 06

 1512 07:16:03.050573  PCI: 00:1e.0 subsystem <- 8086/02a8

 1513 07:16:03.053399  PCI: 00:1e.0 cmd <- 06

 1514 07:16:03.057111  PCI: 00:1e.2 subsystem <- 8086/02aa

 1515 07:16:03.060414  PCI: 00:1e.2 cmd <- 06

 1516 07:16:03.063366  PCI: 00:1e.3 subsystem <- 8086/02ab

 1517 07:16:03.067050  PCI: 00:1e.3 cmd <- 02

 1518 07:16:03.069913  PCI: 00:1f.0 subsystem <- 8086/0284

 1519 07:16:03.073083  PCI: 00:1f.0 cmd <- 407

 1520 07:16:03.076700  PCI: 00:1f.3 subsystem <- 8086/02c8

 1521 07:16:03.080233  PCI: 00:1f.3 cmd <- 02

 1522 07:16:03.083075  PCI: 00:1f.4 subsystem <- 8086/02a3

 1523 07:16:03.086658  PCI: 00:1f.4 cmd <- 03

 1524 07:16:03.089950  PCI: 00:1f.5 subsystem <- 8086/02a4

 1525 07:16:03.092683  PCI: 00:1f.5 cmd <- 406

 1526 07:16:03.100488  PCI: 01:00.0 cmd <- 02

 1527 07:16:03.105681  done.

 1528 07:16:03.116363  ME: Version: 14.0.39.1367

 1529 07:16:03.123709  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10

 1530 07:16:03.126728  Initializing devices...

 1531 07:16:03.127224  Root Device init ...

 1532 07:16:03.133021  Chrome EC: Set SMI mask to 0x0000000000000000

 1533 07:16:03.136643  Chrome EC: clear events_b mask to 0x0000000000000000

 1534 07:16:03.143293  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1535 07:16:03.149545  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1536 07:16:03.156119  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1537 07:16:03.160006  Chrome EC: Set WAKE mask to 0x0000000000000000

 1538 07:16:03.162605  Root Device init finished in 35200 usecs

 1539 07:16:03.166494  CPU_CLUSTER: 0 init ...

 1540 07:16:03.173100  CPU_CLUSTER: 0 init finished in 2448 usecs

 1541 07:16:03.177332  PCI: 00:00.0 init ...

 1542 07:16:03.180779  CPU TDP: 15 Watts

 1543 07:16:03.183873  CPU PL2 = 64 Watts

 1544 07:16:03.187391  PCI: 00:00.0 init finished in 7072 usecs

 1545 07:16:03.191019  PCI: 00:02.0 init ...

 1546 07:16:03.193463  PCI: 00:02.0 init finished in 2245 usecs

 1547 07:16:03.197126  PCI: 00:08.0 init ...

 1548 07:16:03.200381  PCI: 00:08.0 init finished in 2253 usecs

 1549 07:16:03.203455  PCI: 00:12.0 init ...

 1550 07:16:03.207225  PCI: 00:12.0 init finished in 2251 usecs

 1551 07:16:03.210136  PCI: 00:14.0 init ...

 1552 07:16:03.213763  PCI: 00:14.0 init finished in 2252 usecs

 1553 07:16:03.216756  PCI: 00:14.2 init ...

 1554 07:16:03.220468  PCI: 00:14.2 init finished in 2253 usecs

 1555 07:16:03.223394  PCI: 00:14.3 init ...

 1556 07:16:03.226978  PCI: 00:14.3 init finished in 2272 usecs

 1557 07:16:03.230073  PCI: 00:15.0 init ...

 1558 07:16:03.233064  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1559 07:16:03.236506  PCI: 00:15.0 init finished in 5988 usecs

 1560 07:16:03.240194  PCI: 00:15.1 init ...

 1561 07:16:03.243633  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1562 07:16:03.250115  PCI: 00:15.1 init finished in 5979 usecs

 1563 07:16:03.250574  PCI: 00:16.0 init ...

 1564 07:16:03.256788  PCI: 00:16.0 init finished in 2252 usecs

 1565 07:16:03.260099  PCI: 00:19.0 init ...

 1566 07:16:03.263242  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1567 07:16:03.266537  PCI: 00:19.0 init finished in 5978 usecs

 1568 07:16:03.269587  PCI: 00:1d.0 init ...

 1569 07:16:03.273395  Initializing PCH PCIe bridge.

 1570 07:16:03.276688  PCI: 00:1d.0 init finished in 5286 usecs

 1571 07:16:03.279538  PCI: 00:1f.0 init ...

 1572 07:16:03.283122  IOAPIC: Initializing IOAPIC at 0xfec00000

 1573 07:16:03.289715  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1574 07:16:03.290193  IOAPIC: ID = 0x02

 1575 07:16:03.293604  IOAPIC: Dumping registers

 1576 07:16:03.296553    reg 0x0000: 0x02000000

 1577 07:16:03.299670    reg 0x0001: 0x00770020

 1578 07:16:03.300117    reg 0x0002: 0x00000000

 1579 07:16:03.306508  PCI: 00:1f.0 init finished in 23543 usecs

 1580 07:16:03.309342  PCI: 00:1f.4 init ...

 1581 07:16:03.312438  PCI: 00:1f.4 init finished in 2263 usecs

 1582 07:16:03.323360  PCI: 01:00.0 init ...

 1583 07:16:03.326334  PCI: 01:00.0 init finished in 2252 usecs

 1584 07:16:03.331253  PNP: 0c09.0 init ...

 1585 07:16:03.334367  Google Chrome EC uptime: 11.067 seconds

 1586 07:16:03.340759  Google Chrome AP resets since EC boot: 0

 1587 07:16:03.344390  Google Chrome most recent AP reset causes:

 1588 07:16:03.350726  Google Chrome EC reset flags at last EC boot: reset-pin

 1589 07:16:03.354438  PNP: 0c09.0 init finished in 20563 usecs

 1590 07:16:03.357578  Devices initialized

 1591 07:16:03.360573  Show all devs... After init.

 1592 07:16:03.361036  Root Device: enabled 1

 1593 07:16:03.363966  CPU_CLUSTER: 0: enabled 1

 1594 07:16:03.367796  DOMAIN: 0000: enabled 1

 1595 07:16:03.368367  APIC: 00: enabled 1

 1596 07:16:03.370421  PCI: 00:00.0: enabled 1

 1597 07:16:03.374113  PCI: 00:02.0: enabled 1

 1598 07:16:03.377543  PCI: 00:04.0: enabled 0

 1599 07:16:03.378008  PCI: 00:05.0: enabled 0

 1600 07:16:03.380606  PCI: 00:12.0: enabled 1

 1601 07:16:03.384152  PCI: 00:12.5: enabled 0

 1602 07:16:03.386955  PCI: 00:12.6: enabled 0

 1603 07:16:03.387452  PCI: 00:14.0: enabled 1

 1604 07:16:03.390887  PCI: 00:14.1: enabled 0

 1605 07:16:03.393641  PCI: 00:14.3: enabled 1

 1606 07:16:03.394205  PCI: 00:14.5: enabled 0

 1607 07:16:03.397506  PCI: 00:15.0: enabled 1

 1608 07:16:03.400158  PCI: 00:15.1: enabled 1

 1609 07:16:03.403966  PCI: 00:15.2: enabled 0

 1610 07:16:03.404541  PCI: 00:15.3: enabled 0

 1611 07:16:03.406778  PCI: 00:16.0: enabled 1

 1612 07:16:03.410004  PCI: 00:16.1: enabled 0

 1613 07:16:03.413707  PCI: 00:16.2: enabled 0

 1614 07:16:03.414178  PCI: 00:16.3: enabled 0

 1615 07:16:03.417070  PCI: 00:16.4: enabled 0

 1616 07:16:03.420510  PCI: 00:16.5: enabled 0

 1617 07:16:03.423391  PCI: 00:17.0: enabled 1

 1618 07:16:03.423851  PCI: 00:19.0: enabled 1

 1619 07:16:03.427141  PCI: 00:19.1: enabled 0

 1620 07:16:03.430150  PCI: 00:19.2: enabled 0

 1621 07:16:03.433093  PCI: 00:1a.0: enabled 0

 1622 07:16:03.433560  PCI: 00:1c.0: enabled 0

 1623 07:16:03.436749  PCI: 00:1c.1: enabled 0

 1624 07:16:03.440328  PCI: 00:1c.2: enabled 0

 1625 07:16:03.440820  PCI: 00:1c.3: enabled 0

 1626 07:16:03.443350  PCI: 00:1c.4: enabled 0

 1627 07:16:03.446727  PCI: 00:1c.5: enabled 0

 1628 07:16:03.450286  PCI: 00:1c.6: enabled 0

 1629 07:16:03.450880  PCI: 00:1c.7: enabled 0

 1630 07:16:03.453075  PCI: 00:1d.0: enabled 1

 1631 07:16:03.456599  PCI: 00:1d.1: enabled 0

 1632 07:16:03.459652  PCI: 00:1d.2: enabled 0

 1633 07:16:03.460156  PCI: 00:1d.3: enabled 0

 1634 07:16:03.463465  PCI: 00:1d.4: enabled 0

 1635 07:16:03.466854  PCI: 00:1d.5: enabled 0

 1636 07:16:03.469674  PCI: 00:1e.0: enabled 1

 1637 07:16:03.470166  PCI: 00:1e.1: enabled 0

 1638 07:16:03.473102  PCI: 00:1e.2: enabled 1

 1639 07:16:03.476395  PCI: 00:1e.3: enabled 1

 1640 07:16:03.479725  PCI: 00:1f.0: enabled 1

 1641 07:16:03.480225  PCI: 00:1f.1: enabled 0

 1642 07:16:03.482793  PCI: 00:1f.2: enabled 0

 1643 07:16:03.486215  PCI: 00:1f.3: enabled 1

 1644 07:16:03.486710  PCI: 00:1f.4: enabled 1

 1645 07:16:03.490046  PCI: 00:1f.5: enabled 1

 1646 07:16:03.492930  PCI: 00:1f.6: enabled 0

 1647 07:16:03.496320  USB0 port 0: enabled 1

 1648 07:16:03.496812  I2C: 01:15: enabled 1

 1649 07:16:03.499510  I2C: 02:5d: enabled 1

 1650 07:16:03.503134  GENERIC: 0.0: enabled 1

 1651 07:16:03.503578  I2C: 03:1a: enabled 1

 1652 07:16:03.506048  I2C: 03:38: enabled 1

 1653 07:16:03.509551  I2C: 03:39: enabled 1

 1654 07:16:03.510024  I2C: 03:3a: enabled 1

 1655 07:16:03.512615  I2C: 03:3b: enabled 1

 1656 07:16:03.516123  PCI: 00:00.0: enabled 1

 1657 07:16:03.516568  SPI: 00: enabled 1

 1658 07:16:03.519205  SPI: 01: enabled 1

 1659 07:16:03.522647  PNP: 0c09.0: enabled 1

 1660 07:16:03.523127  USB2 port 0: enabled 1

 1661 07:16:03.525755  USB2 port 1: enabled 1

 1662 07:16:03.529345  USB2 port 2: enabled 0

 1663 07:16:03.532275  USB2 port 3: enabled 0

 1664 07:16:03.532727  USB2 port 5: enabled 0

 1665 07:16:03.535942  USB2 port 6: enabled 1

 1666 07:16:03.539539  USB2 port 9: enabled 1

 1667 07:16:03.539989  USB3 port 0: enabled 1

 1668 07:16:03.542219  USB3 port 1: enabled 1

 1669 07:16:03.545841  USB3 port 2: enabled 1

 1670 07:16:03.546370  USB3 port 3: enabled 1

 1671 07:16:03.548857  USB3 port 4: enabled 0

 1672 07:16:03.552542  APIC: 02: enabled 1

 1673 07:16:03.553066  APIC: 01: enabled 1

 1674 07:16:03.555783  APIC: 03: enabled 1

 1675 07:16:03.558833  APIC: 04: enabled 1

 1676 07:16:03.559417  APIC: 06: enabled 1

 1677 07:16:03.562551  APIC: 05: enabled 1

 1678 07:16:03.565872  APIC: 07: enabled 1

 1679 07:16:03.566322  PCI: 00:08.0: enabled 1

 1680 07:16:03.568847  PCI: 00:14.2: enabled 1

 1681 07:16:03.572546  PCI: 01:00.0: enabled 1

 1682 07:16:03.575879  Disabling ACPI via APMC:

 1683 07:16:03.579590  done.

 1684 07:16:03.582821  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1685 07:16:03.585637  ELOG: NV offset 0xaf0000 size 0x4000

 1686 07:16:03.593087  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1687 07:16:03.599518  ELOG: Event(17) added with size 13 at 2023-03-12 07:16:03 UTC

 1688 07:16:03.606360  ELOG: Event(92) added with size 9 at 2023-03-12 07:16:03 UTC

 1689 07:16:03.612480  ELOG: Event(93) added with size 9 at 2023-03-12 07:16:03 UTC

 1690 07:16:03.619042  ELOG: Event(9A) added with size 9 at 2023-03-12 07:16:03 UTC

 1691 07:16:03.626297  ELOG: Event(9E) added with size 10 at 2023-03-12 07:16:03 UTC

 1692 07:16:03.632485  ELOG: Event(9F) added with size 14 at 2023-03-12 07:16:03 UTC

 1693 07:16:03.635555  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1694 07:16:03.642686  ELOG: Event(A1) added with size 10 at 2023-03-12 07:16:03 UTC

 1695 07:16:03.652661  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1696 07:16:03.659196  ELOG: Event(A0) added with size 9 at 2023-03-12 07:16:03 UTC

 1697 07:16:03.662859  elog_add_boot_reason: Logged dev mode boot

 1698 07:16:03.665750  Finalize devices...

 1699 07:16:03.666201  PCI: 00:17.0 final

 1700 07:16:03.669250  Devices finalized

 1701 07:16:03.672678  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1702 07:16:03.679287  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1703 07:16:03.683111  ME: HFSTS1                  : 0x90000245

 1704 07:16:03.685520  ME: HFSTS2                  : 0x3B850126

 1705 07:16:03.692183  ME: HFSTS3                  : 0x00000020

 1706 07:16:03.695565  ME: HFSTS4                  : 0x00004800

 1707 07:16:03.699001  ME: HFSTS5                  : 0x00000000

 1708 07:16:03.702095  ME: HFSTS6                  : 0x40400006

 1709 07:16:03.705936  ME: Manufacturing Mode      : NO

 1710 07:16:03.708843  ME: FW Partition Table      : OK

 1711 07:16:03.712488  ME: Bringup Loader Failure  : NO

 1712 07:16:03.715816  ME: Firmware Init Complete  : YES

 1713 07:16:03.718832  ME: Boot Options Present    : NO

 1714 07:16:03.722382  ME: Update In Progress      : NO

 1715 07:16:03.725417  ME: D0i3 Support            : YES

 1716 07:16:03.728905  ME: Low Power State Enabled : NO

 1717 07:16:03.732056  ME: CPU Replaced            : NO

 1718 07:16:03.735614  ME: CPU Replacement Valid   : YES

 1719 07:16:03.738647  ME: Current Working State   : 5

 1720 07:16:03.742540  ME: Current Operation State : 1

 1721 07:16:03.745739  ME: Current Operation Mode  : 0

 1722 07:16:03.749111  ME: Error Code              : 0

 1723 07:16:03.751997  ME: CPU Debug Disabled      : YES

 1724 07:16:03.755430  ME: TXT Support             : NO

 1725 07:16:03.762537  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1726 07:16:03.769005  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1727 07:16:03.769603  CBFS @ c08000 size 3f8000

 1728 07:16:03.774712  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1729 07:16:03.778698  CBFS: Locating 'fallback/dsdt.aml'

 1730 07:16:03.781795  CBFS: Found @ offset 10bb80 size 3fa5

 1731 07:16:03.788895  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1732 07:16:03.792024  CBFS @ c08000 size 3f8000

 1733 07:16:03.798713  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1734 07:16:03.799336  CBFS: Locating 'fallback/slic'

 1735 07:16:03.803636  CBFS: 'fallback/slic' not found.

 1736 07:16:03.810176  ACPI: Writing ACPI tables at 99b3e000.

 1737 07:16:03.810728  ACPI:    * FACS

 1738 07:16:03.814050  ACPI:    * DSDT

 1739 07:16:03.816880  Ramoops buffer: 0x100000@0x99a3d000.

 1740 07:16:03.819846  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1741 07:16:03.826530  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1742 07:16:03.829984  Google Chrome EC: version:

 1743 07:16:03.833070  	ro: helios_v2.0.2659-56403530b

 1744 07:16:03.836604  	rw: helios_v2.0.2849-c41de27e7d

 1745 07:16:03.837053    running image: 1

 1746 07:16:03.840901  ACPI:    * FADT

 1747 07:16:03.841350  SCI is IRQ9

 1748 07:16:03.847508  ACPI: added table 1/32, length now 40

 1749 07:16:03.847988  ACPI:     * SSDT

 1750 07:16:03.851358  Found 1 CPU(s) with 8 core(s) each.

 1751 07:16:03.854199  Error: Could not locate 'wifi_sar' in VPD.

 1752 07:16:03.860860  Checking CBFS for default SAR values

 1753 07:16:03.863976  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1754 07:16:03.867423  CBFS @ c08000 size 3f8000

 1755 07:16:03.873925  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1756 07:16:03.877497  CBFS: Locating 'wifi_sar_defaults.hex'

 1757 07:16:03.880274  CBFS: Found @ offset 5fac0 size 77

 1758 07:16:03.884069  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1759 07:16:03.890797  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1760 07:16:03.893814  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1761 07:16:03.900311  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1762 07:16:03.903708  failed to find key in VPD: dsm_calib_r0_0

 1763 07:16:03.913959  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1764 07:16:03.916794  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1765 07:16:03.920312  failed to find key in VPD: dsm_calib_r0_1

 1766 07:16:03.929779  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1767 07:16:03.936891  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1768 07:16:03.939994  failed to find key in VPD: dsm_calib_r0_2

 1769 07:16:03.949516  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1770 07:16:03.953043  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1771 07:16:03.959510  failed to find key in VPD: dsm_calib_r0_3

 1772 07:16:03.965925  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1773 07:16:03.972347  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1774 07:16:03.976060  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1775 07:16:03.979639  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1776 07:16:03.983597  EC returned error result code 1

 1777 07:16:03.987062  EC returned error result code 1

 1778 07:16:03.991094  EC returned error result code 1

 1779 07:16:03.997751  PS2K: Bad resp from EC. Vivaldi disabled!

 1780 07:16:04.000576  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1781 07:16:04.007028  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1782 07:16:04.013666  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1783 07:16:04.017097  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1784 07:16:04.023574  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1785 07:16:04.030097  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1786 07:16:04.036674  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1787 07:16:04.040057  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1788 07:16:04.046746  ACPI: added table 2/32, length now 44

 1789 07:16:04.046868  ACPI:    * MCFG

 1790 07:16:04.050344  ACPI: added table 3/32, length now 48

 1791 07:16:04.053387  ACPI:    * TPM2

 1792 07:16:04.056986  TPM2 log created at 99a2d000

 1793 07:16:04.059997  ACPI: added table 4/32, length now 52

 1794 07:16:04.060105  ACPI:    * MADT

 1795 07:16:04.063588  SCI is IRQ9

 1796 07:16:04.066519  ACPI: added table 5/32, length now 56

 1797 07:16:04.066623  current = 99b43ac0

 1798 07:16:04.070141  ACPI:    * DMAR

 1799 07:16:04.073153  ACPI: added table 6/32, length now 60

 1800 07:16:04.076701  ACPI:    * IGD OpRegion

 1801 07:16:04.076800  GMA: Found VBT in CBFS

 1802 07:16:04.079860  GMA: Found valid VBT in CBFS

 1803 07:16:04.083303  ACPI: added table 7/32, length now 64

 1804 07:16:04.086768  ACPI:    * HPET

 1805 07:16:04.089724  ACPI: added table 8/32, length now 68

 1806 07:16:04.093507  ACPI: done.

 1807 07:16:04.093684  ACPI tables: 31744 bytes.

 1808 07:16:04.096882  smbios_write_tables: 99a2c000

 1809 07:16:04.099824  EC returned error result code 3

 1810 07:16:04.103242  Couldn't obtain OEM name from CBI

 1811 07:16:04.106965  Create SMBIOS type 17

 1812 07:16:04.110008  PCI: 00:00.0 (Intel Cannonlake)

 1813 07:16:04.113469  PCI: 00:14.3 (Intel WiFi)

 1814 07:16:04.116701  SMBIOS tables: 939 bytes.

 1815 07:16:04.120200  Writing table forward entry at 0x00000500

 1816 07:16:04.126707  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1817 07:16:04.129634  Writing coreboot table at 0x99b62000

 1818 07:16:04.136939   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1819 07:16:04.140095   1. 0000000000001000-000000000009ffff: RAM

 1820 07:16:04.143495   2. 00000000000a0000-00000000000fffff: RESERVED

 1821 07:16:04.150164   3. 0000000000100000-0000000099a2bfff: RAM

 1822 07:16:04.156720   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1823 07:16:04.159779   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1824 07:16:04.166907   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1825 07:16:04.169780   7. 000000009a000000-000000009f7fffff: RESERVED

 1826 07:16:04.176339   8. 00000000e0000000-00000000efffffff: RESERVED

 1827 07:16:04.179924   9. 00000000fc000000-00000000fc000fff: RESERVED

 1828 07:16:04.186481  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1829 07:16:04.189797  11. 00000000fed10000-00000000fed17fff: RESERVED

 1830 07:16:04.193423  12. 00000000fed80000-00000000fed83fff: RESERVED

 1831 07:16:04.199985  13. 00000000fed90000-00000000fed91fff: RESERVED

 1832 07:16:04.202923  14. 00000000feda0000-00000000feda1fff: RESERVED

 1833 07:16:04.209401  15. 0000000100000000-000000045e7fffff: RAM

 1834 07:16:04.212787  Graphics framebuffer located at 0xc0000000

 1835 07:16:04.216465  Passing 5 GPIOs to payload:

 1836 07:16:04.219388              NAME |       PORT | POLARITY |     VALUE

 1837 07:16:04.226329     write protect |  undefined |     high |       low

 1838 07:16:04.232811               lid |  undefined |     high |      high

 1839 07:16:04.236228             power |  undefined |     high |       low

 1840 07:16:04.242980             oprom |  undefined |     high |       low

 1841 07:16:04.246020          EC in RW | 0x000000cb |     high |       low

 1842 07:16:04.249148  Board ID: 4

 1843 07:16:04.252445  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1844 07:16:04.255991  CBFS @ c08000 size 3f8000

 1845 07:16:04.262392  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1846 07:16:04.269133  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264

 1847 07:16:04.269580  coreboot table: 1492 bytes.

 1848 07:16:04.272570  IMD ROOT    0. 99fff000 00001000

 1849 07:16:04.275767  IMD SMALL   1. 99ffe000 00001000

 1850 07:16:04.279235  FSP MEMORY  2. 99c4e000 003b0000

 1851 07:16:04.282205  CONSOLE     3. 99c2e000 00020000

 1852 07:16:04.285807  FMAP        4. 99c2d000 0000054e

 1853 07:16:04.289325  TIME STAMP  5. 99c2c000 00000910

 1854 07:16:04.292358  VBOOT WORK  6. 99c18000 00014000

 1855 07:16:04.295865  MRC DATA    7. 99c16000 00001958

 1856 07:16:04.299061  ROMSTG STCK 8. 99c15000 00001000

 1857 07:16:04.302651  AFTER CAR   9. 99c0b000 0000a000

 1858 07:16:04.305793  RAMSTAGE   10. 99baf000 0005c000

 1859 07:16:04.308910  REFCODE    11. 99b7a000 00035000

 1860 07:16:04.312606  SMM BACKUP 12. 99b6a000 00010000

 1861 07:16:04.315932  COREBOOT   13. 99b62000 00008000

 1862 07:16:04.318989  ACPI       14. 99b3e000 00024000

 1863 07:16:04.325605  ACPI GNVS  15. 99b3d000 00001000

 1864 07:16:04.329034  RAMOOPS    16. 99a3d000 00100000

 1865 07:16:04.332203  TPM2 TCGLOG17. 99a2d000 00010000

 1866 07:16:04.335307  SMBIOS     18. 99a2c000 00000800

 1867 07:16:04.335752  IMD small region:

 1868 07:16:04.339038    IMD ROOT    0. 99ffec00 00000400

 1869 07:16:04.342402    FSP RUNTIME 1. 99ffebe0 00000004

 1870 07:16:04.345558    EC HOSTEVENT 2. 99ffebc0 00000008

 1871 07:16:04.348479    POWER STATE 3. 99ffeb80 00000040

 1872 07:16:04.352030    ROMSTAGE    4. 99ffeb60 00000004

 1873 07:16:04.355403    MEM INFO    5. 99ffe9a0 000001b9

 1874 07:16:04.362245    VPD         6. 99ffe920 0000006c

 1875 07:16:04.362861  MTRR: Physical address space:

 1876 07:16:04.368333  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1877 07:16:04.375182  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1878 07:16:04.381882  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1879 07:16:04.388264  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1880 07:16:04.395022  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1881 07:16:04.401350  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1882 07:16:04.408376  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1883 07:16:04.411720  MTRR: Fixed MSR 0x250 0x0606060606060606

 1884 07:16:04.414641  MTRR: Fixed MSR 0x258 0x0606060606060606

 1885 07:16:04.418070  MTRR: Fixed MSR 0x259 0x0000000000000000

 1886 07:16:04.424805  MTRR: Fixed MSR 0x268 0x0606060606060606

 1887 07:16:04.427653  MTRR: Fixed MSR 0x269 0x0606060606060606

 1888 07:16:04.431251  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1889 07:16:04.434637  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1890 07:16:04.441270  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1891 07:16:04.444759  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1892 07:16:04.447799  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1893 07:16:04.451244  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1894 07:16:04.455242  call enable_fixed_mtrr()

 1895 07:16:04.458491  CPU physical address size: 39 bits

 1896 07:16:04.464839  MTRR: default type WB/UC MTRR counts: 6/8.

 1897 07:16:04.468153  MTRR: WB selected as default type.

 1898 07:16:04.474726  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1899 07:16:04.478125  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1900 07:16:04.484574  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1901 07:16:04.491026  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1902 07:16:04.497535  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1903 07:16:04.504091  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1904 07:16:04.510586  MTRR: Fixed MSR 0x250 0x0606060606060606

 1905 07:16:04.513968  MTRR: Fixed MSR 0x258 0x0606060606060606

 1906 07:16:04.517520  MTRR: Fixed MSR 0x259 0x0000000000000000

 1907 07:16:04.520611  MTRR: Fixed MSR 0x268 0x0606060606060606

 1908 07:16:04.524290  MTRR: Fixed MSR 0x269 0x0606060606060606

 1909 07:16:04.530748  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1910 07:16:04.533801  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1911 07:16:04.537498  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1912 07:16:04.540537  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1913 07:16:04.547037  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1914 07:16:04.550474  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1915 07:16:04.550916  

 1916 07:16:04.551329  MTRR check

 1917 07:16:04.553531  Fixed MTRRs   : Enabled

 1918 07:16:04.557032  Variable MTRRs: Enabled

 1919 07:16:04.557472  

 1920 07:16:04.560460  call enable_fixed_mtrr()

 1921 07:16:04.563681  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1922 07:16:04.567152  CPU physical address size: 39 bits

 1923 07:16:04.574093  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1924 07:16:04.577616  MTRR: Fixed MSR 0x250 0x0606060606060606

 1925 07:16:04.580584  MTRR: Fixed MSR 0x250 0x0606060606060606

 1926 07:16:04.587405  MTRR: Fixed MSR 0x258 0x0606060606060606

 1927 07:16:04.591118  MTRR: Fixed MSR 0x259 0x0000000000000000

 1928 07:16:04.593687  MTRR: Fixed MSR 0x268 0x0606060606060606

 1929 07:16:04.597360  MTRR: Fixed MSR 0x269 0x0606060606060606

 1930 07:16:04.603944  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1931 07:16:04.607267  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1932 07:16:04.610359  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1933 07:16:04.613736  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1934 07:16:04.617357  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1935 07:16:04.623732  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1936 07:16:04.626784  MTRR: Fixed MSR 0x258 0x0606060606060606

 1937 07:16:04.630481  call enable_fixed_mtrr()

 1938 07:16:04.633665  MTRR: Fixed MSR 0x259 0x0000000000000000

 1939 07:16:04.636817  MTRR: Fixed MSR 0x268 0x0606060606060606

 1940 07:16:04.643263  MTRR: Fixed MSR 0x269 0x0606060606060606

 1941 07:16:04.646818  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1942 07:16:04.649729  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1943 07:16:04.653285  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1944 07:16:04.659913  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1945 07:16:04.663536  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1946 07:16:04.666524  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1947 07:16:04.669956  CPU physical address size: 39 bits

 1948 07:16:04.672876  call enable_fixed_mtrr()

 1949 07:16:04.676597  CBFS @ c08000 size 3f8000

 1950 07:16:04.682672  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1951 07:16:04.686489  CPU physical address size: 39 bits

 1952 07:16:04.689824  MTRR: Fixed MSR 0x250 0x0606060606060606

 1953 07:16:04.692601  MTRR: Fixed MSR 0x258 0x0606060606060606

 1954 07:16:04.696186  MTRR: Fixed MSR 0x259 0x0000000000000000

 1955 07:16:04.702478  MTRR: Fixed MSR 0x268 0x0606060606060606

 1956 07:16:04.705917  MTRR: Fixed MSR 0x269 0x0606060606060606

 1957 07:16:04.709682  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1958 07:16:04.712414  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1959 07:16:04.716171  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1960 07:16:04.722545  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1961 07:16:04.726035  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1962 07:16:04.729498  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1963 07:16:04.736071  MTRR: Fixed MSR 0x250 0x0606060606060606

 1964 07:16:04.736521  call enable_fixed_mtrr()

 1965 07:16:04.742411  MTRR: Fixed MSR 0x258 0x0606060606060606

 1966 07:16:04.745975  MTRR: Fixed MSR 0x259 0x0000000000000000

 1967 07:16:04.749111  MTRR: Fixed MSR 0x268 0x0606060606060606

 1968 07:16:04.752180  MTRR: Fixed MSR 0x269 0x0606060606060606

 1969 07:16:04.755576  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1970 07:16:04.762075  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1971 07:16:04.766150  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1972 07:16:04.768845  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1973 07:16:04.772466  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1974 07:16:04.779041  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1975 07:16:04.782532  CPU physical address size: 39 bits

 1976 07:16:04.785397  call enable_fixed_mtrr()

 1977 07:16:04.788407  MTRR: Fixed MSR 0x250 0x0606060606060606

 1978 07:16:04.791857  MTRR: Fixed MSR 0x250 0x0606060606060606

 1979 07:16:04.795521  MTRR: Fixed MSR 0x258 0x0606060606060606

 1980 07:16:04.801919  MTRR: Fixed MSR 0x259 0x0000000000000000

 1981 07:16:04.804902  MTRR: Fixed MSR 0x268 0x0606060606060606

 1982 07:16:04.808975  MTRR: Fixed MSR 0x269 0x0606060606060606

 1983 07:16:04.811631  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1984 07:16:04.818267  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1985 07:16:04.821779  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1986 07:16:04.825229  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1987 07:16:04.828163  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1988 07:16:04.834955  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1989 07:16:04.838567  MTRR: Fixed MSR 0x258 0x0606060606060606

 1990 07:16:04.841295  MTRR: Fixed MSR 0x259 0x0000000000000000

 1991 07:16:04.844686  MTRR: Fixed MSR 0x268 0x0606060606060606

 1992 07:16:04.851737  MTRR: Fixed MSR 0x269 0x0606060606060606

 1993 07:16:04.854608  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1994 07:16:04.858470  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1995 07:16:04.861667  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1996 07:16:04.868040  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1997 07:16:04.871132  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1998 07:16:04.874988  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1999 07:16:04.877715  call enable_fixed_mtrr()

 2000 07:16:04.881007  call enable_fixed_mtrr()

 2001 07:16:04.884259  CBFS: Locating 'fallback/payload'

 2002 07:16:04.887702  CPU physical address size: 39 bits

 2003 07:16:04.890847  CPU physical address size: 39 bits

 2004 07:16:04.894281  CPU physical address size: 39 bits

 2005 07:16:04.897862  CBFS: Found @ offset 1c96c0 size 3f798

 2006 07:16:04.904391  Checking segment from ROM address 0xffdd16f8

 2007 07:16:04.907285  Checking segment from ROM address 0xffdd1714

 2008 07:16:04.910990  Loading segment from ROM address 0xffdd16f8

 2009 07:16:04.914007    code (compression=0)

 2010 07:16:04.921085    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2011 07:16:04.930576  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2012 07:16:04.934102  it's not compressed!

 2013 07:16:05.025401  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2014 07:16:05.031663  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2015 07:16:05.034844  Loading segment from ROM address 0xffdd1714

 2016 07:16:05.038442    Entry Point 0x30000000

 2017 07:16:05.041860  Loaded segments

 2018 07:16:05.047137  Finalizing chipset.

 2019 07:16:05.050520  Finalizing SMM.

 2020 07:16:05.053574  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2021 07:16:05.056945  mp_park_aps done after 0 msecs.

 2022 07:16:05.064079  Jumping to boot code at 30000000(99b62000)

 2023 07:16:05.071045  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2024 07:16:05.071628  

 2025 07:16:05.072003  

 2026 07:16:05.072333  

 2027 07:16:05.073731  Starting depthcharge on Helios...

 2028 07:16:05.074182  

 2029 07:16:05.075247  end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
 2030 07:16:05.075772  start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
 2031 07:16:05.076197  Setting prompt string to ['hatch:']
 2032 07:16:05.076603  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
 2033 07:16:05.083246  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2034 07:16:05.083705  

 2035 07:16:05.090355  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2036 07:16:05.090891  

 2037 07:16:05.096574  board_setup: Info: eMMC controller not present; skipping

 2038 07:16:05.097086  

 2039 07:16:05.100037  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2040 07:16:05.100586  

 2041 07:16:05.106560  board_setup: Info: SDHCI controller not present; skipping

 2042 07:16:05.107012  

 2043 07:16:05.113335  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2044 07:16:05.113831  

 2045 07:16:05.114345  Wipe memory regions:

 2046 07:16:05.114698  

 2047 07:16:05.116922  	[0x00000000001000, 0x000000000a0000)

 2048 07:16:05.117383  

 2049 07:16:05.119984  	[0x00000000100000, 0x00000030000000)

 2050 07:16:05.186202  

 2051 07:16:05.189845  	[0x00000030657430, 0x00000099a2c000)

 2052 07:16:05.335915  

 2053 07:16:05.339542  	[0x00000100000000, 0x0000045e800000)

 2054 07:16:06.795602  

 2055 07:16:06.796187  R8152: Initializing

 2056 07:16:06.796576  

 2057 07:16:06.799219  Version 9 (ocp_data = 6010)

 2058 07:16:06.803355  

 2059 07:16:06.803945  R8152: Done initializing

 2060 07:16:06.804336  

 2061 07:16:06.806709  Adding net device

 2062 07:16:07.289149  

 2063 07:16:07.289304  R8152: Initializing

 2064 07:16:07.289394  

 2065 07:16:07.291853  Version 6 (ocp_data = 5c30)

 2066 07:16:07.291949  

 2067 07:16:07.295715  R8152: Done initializing

 2068 07:16:07.295811  

 2069 07:16:07.302064  net_add_device: Attemp to include the same device

 2070 07:16:07.302161  

 2071 07:16:07.309359  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2072 07:16:07.309455  

 2073 07:16:07.309528  

 2074 07:16:07.309597  

 2075 07:16:07.309880  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2077 07:16:07.410675  hatch: tftpboot 192.168.201.1 9567927/tftp-deploy-_1uuxces/kernel/bzImage 9567927/tftp-deploy-_1uuxces/kernel/cmdline 9567927/tftp-deploy-_1uuxces/ramdisk/ramdisk.cpio.gz

 2078 07:16:07.410857  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2079 07:16:07.410955  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
 2080 07:16:07.415882  tftpboot 192.168.201.1 9567927/tftp-deploy-_1uuxces/kernel/bzImoy-_1uuxces/kernel/cmdline 9567927/tftp-deploy-_1uuxces/ramdisk/ramdisk.cpio.gz

 2081 07:16:07.415984  

 2082 07:16:07.416062  Waiting for link

 2083 07:16:07.616208  

 2084 07:16:07.616366  done.

 2085 07:16:07.616445  

 2086 07:16:07.616517  MAC: 00:24:32:50:1a:59

 2087 07:16:07.616586  

 2088 07:16:07.619441  Sending DHCP discover... done.

 2089 07:16:07.619539  

 2090 07:16:07.623350  Waiting for reply... done.

 2091 07:16:07.623447  

 2092 07:16:07.626415  Sending DHCP request... done.

 2093 07:16:07.626514  

 2094 07:16:07.629639  Waiting for reply... done.

 2095 07:16:07.629737  

 2096 07:16:07.633139  My ip is 192.168.201.14

 2097 07:16:07.633236  

 2098 07:16:07.636076  The DHCP server ip is 192.168.201.1

 2099 07:16:07.636174  

 2100 07:16:07.639597  TFTP server IP predefined by user: 192.168.201.1

 2101 07:16:07.639695  

 2102 07:16:07.646033  Bootfile predefined by user: 9567927/tftp-deploy-_1uuxces/kernel/bzImage

 2103 07:16:07.646131  

 2104 07:16:07.649267  Sending tftp read request... done.

 2105 07:16:07.652347  

 2106 07:16:07.655695  Waiting for the transfer... 

 2107 07:16:07.655792  

 2108 07:16:08.177279  00000000 ################################################################

 2109 07:16:08.177435  

 2110 07:16:08.725716  00080000 ################################################################

 2111 07:16:08.725871  

 2112 07:16:09.274437  00100000 ################################################################

 2113 07:16:09.274590  

 2114 07:16:09.830498  00180000 ################################################################

 2115 07:16:09.830664  

 2116 07:16:10.383105  00200000 ################################################################

 2117 07:16:10.383265  

 2118 07:16:10.932108  00280000 ################################################################

 2119 07:16:10.932264  

 2120 07:16:11.479637  00300000 ################################################################

 2121 07:16:11.479806  

 2122 07:16:12.028553  00380000 ################################################################

 2123 07:16:12.028709  

 2124 07:16:12.609311  00400000 ################################################################

 2125 07:16:12.609470  

 2126 07:16:13.179103  00480000 ################################################################

 2127 07:16:13.179265  

 2128 07:16:13.755052  00500000 ################################################################

 2129 07:16:13.755228  

 2130 07:16:14.308117  00580000 ################################################################

 2131 07:16:14.308282  

 2132 07:16:14.866864  00600000 ################################################################

 2133 07:16:14.867019  

 2134 07:16:15.522633  00680000 ################################################################

 2135 07:16:15.523259  

 2136 07:16:16.237871  00700000 ################################################################

 2137 07:16:16.238463  

 2138 07:16:16.951042  00780000 ################################################################

 2139 07:16:16.951627  

 2140 07:16:17.660986  00800000 ################################################################

 2141 07:16:17.661507  

 2142 07:16:18.361907  00880000 ################################################################

 2143 07:16:18.362458  

 2144 07:16:18.884227  00900000 ################################################ done.

 2145 07:16:18.884750  

 2146 07:16:18.887573  The bootfile was 9826304 bytes long.

 2147 07:16:18.888026  

 2148 07:16:18.890545  Sending tftp read request... done.

 2149 07:16:18.890998  

 2150 07:16:18.894043  Waiting for the transfer... 

 2151 07:16:18.894491  

 2152 07:16:19.575346  00000000 ################################################################

 2153 07:16:19.575867  

 2154 07:16:20.274820  00080000 ################################################################

 2155 07:16:20.275419  

 2156 07:16:20.981005  00100000 ################################################################

 2157 07:16:20.981560  

 2158 07:16:21.686259  00180000 ################################################################

 2159 07:16:21.686813  

 2160 07:16:22.378619  00200000 ################################################################

 2161 07:16:22.379193  

 2162 07:16:23.078572  00280000 ################################################################

 2163 07:16:23.079148  

 2164 07:16:23.789868  00300000 ################################################################

 2165 07:16:23.790453  

 2166 07:16:24.494802  00380000 ################################################################

 2167 07:16:24.495416  

 2168 07:16:25.195016  00400000 ################################################################

 2169 07:16:25.195584  

 2170 07:16:25.885399  00480000 ################################################################

 2171 07:16:25.885552  

 2172 07:16:26.439100  00500000 ################################################################

 2173 07:16:26.439268  

 2174 07:16:26.827494  00580000 ########################################### done.

 2175 07:16:26.827665  

 2176 07:16:26.831024  Sending tftp read request... done.

 2177 07:16:26.831128  

 2178 07:16:26.834892  Waiting for the transfer... 

 2179 07:16:26.834984  

 2180 07:16:26.835069  00000000 # done.

 2181 07:16:26.835156  

 2182 07:16:26.844053  Command line loaded dynamically from TFTP file: 9567927/tftp-deploy-_1uuxces/kernel/cmdline

 2183 07:16:26.844152  

 2184 07:16:26.870750  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9567927/extract-nfsrootfs-8h3dwpek,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2185 07:16:26.870850  

 2186 07:16:26.877202  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2187 07:16:26.880590  

 2188 07:16:26.884131  Shutting down all USB controllers.

 2189 07:16:26.884229  

 2190 07:16:26.884304  Removing current net device

 2191 07:16:26.887536  

 2192 07:16:26.887636  Finalizing coreboot

 2193 07:16:26.887711  

 2194 07:16:26.894682  Exiting depthcharge with code 4 at timestamp: 29168141

 2195 07:16:26.894785  

 2196 07:16:26.894863  

 2197 07:16:26.894932  Starting kernel ...

 2198 07:16:26.895006  

 2199 07:16:26.895419  end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
 2200 07:16:26.895548  start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
 2201 07:16:26.895637  Setting prompt string to ['Linux version [0-9]']
 2202 07:16:26.895717  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2203 07:16:26.895796  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2204 07:16:26.897555  

 2206 07:20:44.895791  end: 2.2.5 auto-login-action (duration 00:04:18) [common]
 2208 07:20:44.896034  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
 2210 07:20:44.896217  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2213 07:20:44.896516  end: 2 depthcharge-action (duration 00:05:00) [common]
 2215 07:20:44.896780  Cleaning after the job
 2216 07:20:44.896878  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/ramdisk
 2217 07:20:44.897438  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/kernel
 2218 07:20:44.898174  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/nfsrootfs
 2219 07:20:44.938073  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567927/tftp-deploy-_1uuxces/modules
 2220 07:20:44.938576  start: 4.1 power-off (timeout 00:00:30) [common]
 2221 07:20:44.938756  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2222 07:20:47.129923  >> Command sent successfully.

 2223 07:20:47.132173  Returned 0 in 2 seconds
 2224 07:20:47.232981  end: 4.1 power-off (duration 00:00:02) [common]
 2226 07:20:47.233339  start: 4.2 read-feedback (timeout 00:09:58) [common]
 2227 07:20:47.233607  Listened to connection for namespace 'common' for up to 1s
 2229 07:20:47.234009  Listened to connection for namespace 'common' for up to 1s
 2230 07:20:48.235143  Finalising connection for namespace 'common'
 2231 07:20:48.235317  Disconnecting from shell: Finalise
 2232 07:20:48.235408  
 2233 07:20:48.336119  end: 4.2 read-feedback (duration 00:00:01) [common]
 2234 07:20:48.336263  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9567927
 2235 07:20:48.516503  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9567927
 2236 07:20:48.516707  JobError: Your job cannot terminate cleanly.