Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 07:14:26.111834 lava-dispatcher, installed at version: 2023.01
2 07:14:26.112051 start: 0 validate
3 07:14:26.112175 Start time: 2023-03-12 07:14:26.112170+00:00 (UTC)
4 07:14:26.112300 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:14:26.112431 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230303.0%2Famd64%2Finitrd.cpio.gz exists
6 07:14:26.114806 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:14:26.114941 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-277-g507c8d80b9e20%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:14:26.404515 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:14:26.404678 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230303.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:14:26.697467 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:14:26.698247 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-277-g507c8d80b9e20%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:14:26.707277 validate duration: 0.60
14 07:14:26.708421 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:14:26.708834 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:14:26.709203 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:14:26.709475 Not decompressing ramdisk as can be used compressed.
18 07:14:26.709723 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230303.0/amd64/initrd.cpio.gz
19 07:14:26.709921 saving as /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/ramdisk/initrd.cpio.gz
20 07:14:26.710108 total size: 5432112 (5MB)
21 07:14:26.712412 progress 0% (0MB)
22 07:14:26.716316 progress 5% (0MB)
23 07:14:26.719388 progress 10% (0MB)
24 07:14:26.721885 progress 15% (0MB)
25 07:14:26.724581 progress 20% (1MB)
26 07:14:26.726704 progress 25% (1MB)
27 07:14:26.728810 progress 30% (1MB)
28 07:14:26.730930 progress 35% (1MB)
29 07:14:26.732759 progress 40% (2MB)
30 07:14:26.734563 progress 45% (2MB)
31 07:14:26.736191 progress 50% (2MB)
32 07:14:26.738003 progress 55% (2MB)
33 07:14:26.739606 progress 60% (3MB)
34 07:14:26.741069 progress 65% (3MB)
35 07:14:26.742709 progress 70% (3MB)
36 07:14:26.744177 progress 75% (3MB)
37 07:14:26.745504 progress 80% (4MB)
38 07:14:26.746857 progress 85% (4MB)
39 07:14:26.748347 progress 90% (4MB)
40 07:14:26.749673 progress 95% (4MB)
41 07:14:26.750989 progress 100% (5MB)
42 07:14:26.751191 5MB downloaded in 0.04s (126.10MB/s)
43 07:14:26.751342 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:14:26.751596 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:14:26.751686 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:14:26.751772 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:14:26.751882 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-277-g507c8d80b9e20/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:14:26.751952 saving as /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/kernel/bzImage
50 07:14:26.752014 total size: 9826304 (9MB)
51 07:14:26.752098 No compression specified
52 07:14:26.753083 progress 0% (0MB)
53 07:14:26.755390 progress 5% (0MB)
54 07:14:26.757775 progress 10% (0MB)
55 07:14:26.760242 progress 15% (1MB)
56 07:14:26.762690 progress 20% (1MB)
57 07:14:26.765128 progress 25% (2MB)
58 07:14:26.767626 progress 30% (2MB)
59 07:14:26.770061 progress 35% (3MB)
60 07:14:26.772553 progress 40% (3MB)
61 07:14:26.774995 progress 45% (4MB)
62 07:14:26.777524 progress 50% (4MB)
63 07:14:26.780077 progress 55% (5MB)
64 07:14:26.782597 progress 60% (5MB)
65 07:14:26.784985 progress 65% (6MB)
66 07:14:26.787399 progress 70% (6MB)
67 07:14:26.790064 progress 75% (7MB)
68 07:14:26.792661 progress 80% (7MB)
69 07:14:26.795332 progress 85% (7MB)
70 07:14:26.797845 progress 90% (8MB)
71 07:14:26.800332 progress 95% (8MB)
72 07:14:26.802835 progress 100% (9MB)
73 07:14:26.803091 9MB downloaded in 0.05s (183.49MB/s)
74 07:14:26.803328 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:14:26.803566 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:14:26.803657 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:14:26.803745 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:14:26.803857 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230303.0/amd64/full.rootfs.tar.xz
80 07:14:26.803925 saving as /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/nfsrootfs/full.rootfs.tar
81 07:14:26.804004 total size: 124197008 (118MB)
82 07:14:26.804067 Using unxz to decompress xz
83 07:14:26.807622 progress 0% (0MB)
84 07:14:27.302595 progress 5% (5MB)
85 07:14:27.788753 progress 10% (11MB)
86 07:14:28.328233 progress 15% (17MB)
87 07:14:28.872748 progress 20% (23MB)
88 07:14:29.235959 progress 25% (29MB)
89 07:14:29.595094 progress 30% (35MB)
90 07:14:29.893676 progress 35% (41MB)
91 07:14:30.062117 progress 40% (47MB)
92 07:14:30.467558 progress 45% (53MB)
93 07:14:30.854850 progress 50% (59MB)
94 07:14:31.214575 progress 55% (65MB)
95 07:14:31.586434 progress 60% (71MB)
96 07:14:31.948532 progress 65% (77MB)
97 07:14:32.351952 progress 70% (82MB)
98 07:14:32.785675 progress 75% (88MB)
99 07:14:33.220797 progress 80% (94MB)
100 07:14:33.372774 progress 85% (100MB)
101 07:14:33.549054 progress 90% (106MB)
102 07:14:33.921295 progress 95% (112MB)
103 07:14:34.364444 progress 100% (118MB)
104 07:14:34.369685 118MB downloaded in 7.57s (15.66MB/s)
105 07:14:34.370090 end: 1.3.1 http-download (duration 00:00:08) [common]
107 07:14:34.370562 end: 1.3 download-retry (duration 00:00:08) [common]
108 07:14:34.370702 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:14:34.370836 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:14:34.371010 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-277-g507c8d80b9e20/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:14:34.371121 saving as /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/modules/modules.tar
112 07:14:34.371222 total size: 462184 (0MB)
113 07:14:34.371322 Using unxz to decompress xz
114 07:14:34.375239 progress 7% (0MB)
115 07:14:34.375838 progress 14% (0MB)
116 07:14:34.376211 progress 21% (0MB)
117 07:14:34.377532 progress 28% (0MB)
118 07:14:34.379848 progress 35% (0MB)
119 07:14:34.381962 progress 42% (0MB)
120 07:14:34.384368 progress 49% (0MB)
121 07:14:34.386416 progress 56% (0MB)
122 07:14:34.388329 progress 63% (0MB)
123 07:14:34.390620 progress 70% (0MB)
124 07:14:34.392702 progress 77% (0MB)
125 07:14:34.394868 progress 85% (0MB)
126 07:14:34.396858 progress 92% (0MB)
127 07:14:34.399210 progress 99% (0MB)
128 07:14:34.406269 0MB downloaded in 0.04s (12.58MB/s)
129 07:14:34.406707 end: 1.4.1 http-download (duration 00:00:00) [common]
131 07:14:34.407159 end: 1.4 download-retry (duration 00:00:00) [common]
132 07:14:34.407299 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
133 07:14:34.407442 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
134 07:14:36.220347 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9567925/extract-nfsrootfs-56e1uer4
135 07:14:36.220551 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
136 07:14:36.220657 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
137 07:14:36.220798 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc
138 07:14:36.220910 makedir: /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin
139 07:14:36.220997 makedir: /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/tests
140 07:14:36.221079 makedir: /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/results
141 07:14:36.221178 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-add-keys
142 07:14:36.221318 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-add-sources
143 07:14:36.221439 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-background-process-start
144 07:14:36.221558 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-background-process-stop
145 07:14:36.221672 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-common-functions
146 07:14:36.221784 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-echo-ipv4
147 07:14:36.221894 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-install-packages
148 07:14:36.222014 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-installed-packages
149 07:14:36.222124 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-os-build
150 07:14:36.222234 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-probe-channel
151 07:14:36.222343 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-probe-ip
152 07:14:36.222452 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-target-ip
153 07:14:36.222569 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-target-mac
154 07:14:36.222679 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-target-storage
155 07:14:36.222794 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-test-case
156 07:14:36.222906 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-test-event
157 07:14:36.223013 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-test-feedback
158 07:14:36.223122 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-test-raise
159 07:14:36.223229 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-test-reference
160 07:14:36.223342 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-test-runner
161 07:14:36.223461 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-test-set
162 07:14:36.223570 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-test-shell
163 07:14:36.223681 Updating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-install-packages (oe)
164 07:14:36.223801 Updating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/bin/lava-installed-packages (oe)
165 07:14:36.223898 Creating /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/environment
166 07:14:36.223986 LAVA metadata
167 07:14:36.224056 - LAVA_JOB_ID=9567925
168 07:14:36.224120 - LAVA_DISPATCHER_IP=192.168.201.1
169 07:14:36.224231 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
170 07:14:36.224297 skipped lava-vland-overlay
171 07:14:36.224375 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
172 07:14:36.224460 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
173 07:14:36.224522 skipped lava-multinode-overlay
174 07:14:36.224601 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
175 07:14:36.224685 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
176 07:14:36.224766 Loading test definitions
177 07:14:36.224861 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
178 07:14:36.224935 Using /lava-9567925 at stage 0
179 07:14:36.225037 Fetching tests from https://github.com/kernelci/test-definitions
180 07:14:36.225121 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/0/tests/0_ltp-ipc'
181 07:14:43.679410 Running '/usr/bin/git checkout kernelci.org
182 07:14:43.821473 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
183 07:14:43.822497 uuid=9567925_1.5.2.3.1 testdef=None
184 07:14:43.822720 end: 1.5.2.3.1 git-repo-action (duration 00:00:08) [common]
186 07:14:43.823106 start: 1.5.2.3.2 test-overlay (timeout 00:09:43) [common]
187 07:14:43.824364 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
189 07:14:43.824739 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:43) [common]
190 07:14:43.826382 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
192 07:14:43.826778 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:43) [common]
193 07:14:43.828401 runner path: /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/0/tests/0_ltp-ipc test_uuid 9567925_1.5.2.3.1
194 07:14:43.828536 SKIPFILE='skipfile-lkft.yaml'
195 07:14:43.828640 SKIP_INSTALL='true'
196 07:14:43.828739 TST_CMDFILES='ipc'
197 07:14:43.828937 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
199 07:14:43.829294 Creating lava-test-runner.conf files
200 07:14:43.829399 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9567925/lava-overlay-bvplh9lc/lava-9567925/0 for stage 0
201 07:14:43.829530 - 0_ltp-ipc
202 07:14:43.829676 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
203 07:14:43.829811 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
204 07:14:51.553688 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
205 07:14:51.553839 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
206 07:14:51.553936 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
207 07:14:51.554037 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
208 07:14:51.554128 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
209 07:14:51.657953 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
210 07:14:51.658293 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
211 07:14:51.658409 extracting modules file /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9567925/extract-nfsrootfs-56e1uer4
212 07:14:51.669525 extracting modules file /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9567925/extract-overlay-ramdisk-5z4zlegz/ramdisk
213 07:14:51.680162 end: 1.5.4 extract-modules (duration 00:00:00) [common]
214 07:14:51.680310 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
215 07:14:51.680403 [common] Applying overlay to NFS
216 07:14:51.680510 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9567925/compress-overlay-xycqij5c/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9567925/extract-nfsrootfs-56e1uer4
217 07:14:52.478017 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
218 07:14:52.478178 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
219 07:14:52.478277 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
220 07:14:52.478370 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
221 07:14:52.478458 Building ramdisk /var/lib/lava/dispatcher/tmp/9567925/extract-overlay-ramdisk-5z4zlegz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9567925/extract-overlay-ramdisk-5z4zlegz/ramdisk
222 07:14:52.519285 >> 30003 blocks
223 07:14:53.080348 rename /var/lib/lava/dispatcher/tmp/9567925/extract-overlay-ramdisk-5z4zlegz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/ramdisk/ramdisk.cpio.gz
224 07:14:53.080769 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
225 07:14:53.080893 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
226 07:14:53.081005 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
227 07:14:53.081117 No mkimage arch provided, not using FIT.
228 07:14:53.081218 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
229 07:14:53.081311 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
230 07:14:53.081420 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
231 07:14:53.081537 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
232 07:14:53.081622 No LXC device requested
233 07:14:53.081708 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
234 07:14:53.081800 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
235 07:14:53.081888 end: 1.7 deploy-device-env (duration 00:00:00) [common]
236 07:14:53.081963 Checking files for TFTP limit of 4294967296 bytes.
237 07:14:53.082390 end: 1 tftp-deploy (duration 00:00:26) [common]
238 07:14:53.082503 start: 2 depthcharge-action (timeout 00:05:00) [common]
239 07:14:53.082607 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
240 07:14:53.082745 substitutions:
241 07:14:53.082835 - {DTB}: None
242 07:14:53.082920 - {INITRD}: 9567925/tftp-deploy-h7nnymxn/ramdisk/ramdisk.cpio.gz
243 07:14:53.082988 - {KERNEL}: 9567925/tftp-deploy-h7nnymxn/kernel/bzImage
244 07:14:53.083051 - {LAVA_MAC}: None
245 07:14:53.083111 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9567925/extract-nfsrootfs-56e1uer4
246 07:14:53.083173 - {NFS_SERVER_IP}: 192.168.201.1
247 07:14:53.083232 - {PRESEED_CONFIG}: None
248 07:14:53.083289 - {PRESEED_LOCAL}: None
249 07:14:53.083347 - {RAMDISK}: 9567925/tftp-deploy-h7nnymxn/ramdisk/ramdisk.cpio.gz
250 07:14:53.083405 - {ROOT_PART}: None
251 07:14:53.083480 - {ROOT}: None
252 07:14:53.083542 - {SERVER_IP}: 192.168.201.1
253 07:14:53.083600 - {TEE}: None
254 07:14:53.083657 Parsed boot commands:
255 07:14:53.083713 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
256 07:14:53.083868 Parsed boot commands: tftpboot 192.168.201.1 9567925/tftp-deploy-h7nnymxn/kernel/bzImage 9567925/tftp-deploy-h7nnymxn/kernel/cmdline 9567925/tftp-deploy-h7nnymxn/ramdisk/ramdisk.cpio.gz
257 07:14:53.083966 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
258 07:14:53.084059 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
259 07:14:53.084171 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
260 07:14:53.084267 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
261 07:14:53.084341 Not connected, no need to disconnect.
262 07:14:53.084422 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
263 07:14:53.084509 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
264 07:14:53.084581 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
265 07:14:53.087593 Setting prompt string to ['lava-test: # ']
266 07:14:53.087907 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
267 07:14:53.088022 end: 2.2.1 reset-connection (duration 00:00:00) [common]
268 07:14:53.088144 start: 2.2.2 reset-device (timeout 00:05:00) [common]
269 07:14:53.088242 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
270 07:14:53.088427 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
271 07:14:58.217767 >> Command sent successfully.
272 07:14:58.219901 Returned 0 in 5 seconds
273 07:14:58.320660 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
275 07:14:58.321007 end: 2.2.2 reset-device (duration 00:00:05) [common]
276 07:14:58.321116 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
277 07:14:58.321226 Setting prompt string to 'Starting depthcharge on Voema...'
278 07:14:58.321300 Changing prompt to 'Starting depthcharge on Voema...'
279 07:14:58.321401 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
280 07:14:58.321680 [Enter `^Ec?' for help]
281 07:14:59.925161
282 07:14:59.925325
283 07:14:59.934766 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
284 07:14:59.941623 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
285 07:14:59.944827 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
286 07:14:59.948360 CPU: AES supported, TXT NOT supported, VT supported
287 07:14:59.954886 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
288 07:14:59.961195 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
289 07:14:59.964387 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
290 07:14:59.967792 VBOOT: Loading verstage.
291 07:14:59.974683 FMAP: Found "FLASH" version 1.1 at 0x1804000.
292 07:14:59.977637 FMAP: base = 0x0 size = 0x2000000 #areas = 32
293 07:14:59.984480 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
294 07:14:59.990634 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
295 07:14:59.997484 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
296 07:15:00.001033
297 07:15:00.001126
298 07:15:00.010986 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
299 07:15:00.025943 Probing TPM: . done!
300 07:15:00.028969 TPM ready after 0 ms
301 07:15:00.032689 Connected to device vid:did:rid of 1ae0:0028:00
302 07:15:00.043705 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
303 07:15:00.050282 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
304 07:15:00.053501 Initialized TPM device CR50 revision 0
305 07:15:00.118523 tlcl_send_startup: Startup return code is 0
306 07:15:00.118666 TPM: setup succeeded
307 07:15:00.133318 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
308 07:15:00.147794 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
309 07:15:00.160652 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
310 07:15:00.170744 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 07:15:00.174396 Chrome EC: UHEPI supported
312 07:15:00.178095 Phase 1
313 07:15:00.181039 FMAP: area GBB found @ 1805000 (458752 bytes)
314 07:15:00.191175 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 07:15:00.197675 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 07:15:00.203859 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
317 07:15:00.210635 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
318 07:15:00.213917 Recovery requested (1009000e)
319 07:15:00.222905 TPM: Extending digest for VBOOT: boot mode into PCR 0
320 07:15:00.229412 tlcl_extend: response is 0
321 07:15:00.235915 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
322 07:15:00.245671 tlcl_extend: response is 0
323 07:15:00.252408 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
324 07:15:00.259086 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
325 07:15:00.265909 BS: verstage times (exec / console): total (unknown) / 142 ms
326 07:15:00.266005
327 07:15:00.266080
328 07:15:00.278969 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
329 07:15:00.285719 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
330 07:15:00.288711 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
331 07:15:00.292295 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
332 07:15:00.298432 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
333 07:15:00.302157 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
334 07:15:00.305115 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
335 07:15:00.308640 TCO_STS: 0000 0000
336 07:15:00.311898 GEN_PMCON: d0015038 00002200
337 07:15:00.315010 GBLRST_CAUSE: 00000000 00000000
338 07:15:00.318357 HPR_CAUSE0: 00000000
339 07:15:00.318466 prev_sleep_state 5
340 07:15:00.322096 Boot Count incremented to 18222
341 07:15:00.328729 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
342 07:15:00.334913 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 07:15:00.345213 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 07:15:00.351286 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
345 07:15:00.354792 Chrome EC: UHEPI supported
346 07:15:00.361087 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
347 07:15:00.373428 Probing TPM: done!
348 07:15:00.380767 Connected to device vid:did:rid of 1ae0:0028:00
349 07:15:00.390615 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
350 07:15:00.398017 Initialized TPM device CR50 revision 0
351 07:15:00.408256 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
352 07:15:00.414323 MRC: Hash idx 0x100b comparison successful.
353 07:15:00.417834 MRC cache found, size faa8
354 07:15:00.417920 bootmode is set to: 2
355 07:15:00.421448 SPD index = 0
356 07:15:00.428008 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
357 07:15:00.431366 SPD: module type is LPDDR4X
358 07:15:00.434490 SPD: module part number is MT53E512M64D4NW-046
359 07:15:00.441418 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
360 07:15:00.444442 SPD: device width 16 bits, bus width 16 bits
361 07:15:00.451215 SPD: module size is 1024 MB (per channel)
362 07:15:00.887213 CBMEM:
363 07:15:00.890041 IMD: root @ 0x76fff000 254 entries.
364 07:15:00.893901 IMD: root @ 0x76ffec00 62 entries.
365 07:15:00.896777 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
366 07:15:00.903441 FMAP: area RW_VPD found @ f35000 (8192 bytes)
367 07:15:00.906656 External stage cache:
368 07:15:00.910137 IMD: root @ 0x7b3ff000 254 entries.
369 07:15:00.913262 IMD: root @ 0x7b3fec00 62 entries.
370 07:15:00.928659 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
371 07:15:00.935449 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
372 07:15:00.942029 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
373 07:15:00.956663 MRC: 'RECOVERY_MRC_CACHE' does not need update.
374 07:15:00.960390 cse_lite: Skip switching to RW in the recovery path
375 07:15:00.963530 8 DIMMs found
376 07:15:00.963616 SMM Memory Map
377 07:15:00.967301 SMRAM : 0x7b000000 0x800000
378 07:15:00.970329 Subregion 0: 0x7b000000 0x200000
379 07:15:00.973979 Subregion 1: 0x7b200000 0x200000
380 07:15:00.977164 Subregion 2: 0x7b400000 0x400000
381 07:15:00.980092 top_of_ram = 0x77000000
382 07:15:00.986875 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
383 07:15:00.990324 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
384 07:15:00.997083 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
385 07:15:01.000161 MTRR Range: Start=ff000000 End=0 (Size 1000000)
386 07:15:01.009991 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
387 07:15:01.016889 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
388 07:15:01.026471 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
389 07:15:01.029874 Processing 211 relocs. Offset value of 0x74c0b000
390 07:15:01.038754 BS: romstage times (exec / console): total (unknown) / 277 ms
391 07:15:01.044610
392 07:15:01.044690
393 07:15:01.054593 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
394 07:15:01.058028 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
395 07:15:01.068047 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
396 07:15:01.074690 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
397 07:15:01.081292 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
398 07:15:01.087983 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
399 07:15:01.134836 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
400 07:15:01.141487 Processing 5008 relocs. Offset value of 0x75d98000
401 07:15:01.144575 BS: postcar times (exec / console): total (unknown) / 59 ms
402 07:15:01.148274
403 07:15:01.148385
404 07:15:01.158411 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
405 07:15:01.158581 Normal boot
406 07:15:01.162125 FW_CONFIG value is 0x804c02
407 07:15:01.165017 PCI: 00:07.0 disabled by fw_config
408 07:15:01.168688 PCI: 00:07.1 disabled by fw_config
409 07:15:01.171746 PCI: 00:0d.2 disabled by fw_config
410 07:15:01.175503 PCI: 00:1c.7 disabled by fw_config
411 07:15:01.182025 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 07:15:01.188724 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 07:15:01.191551 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 07:15:01.195373 GENERIC: 0.0 disabled by fw_config
415 07:15:01.198327 GENERIC: 1.0 disabled by fw_config
416 07:15:01.204873 fw_config match found: DB_USB=USB3_ACTIVE
417 07:15:01.208136 fw_config match found: DB_USB=USB3_ACTIVE
418 07:15:01.211703 fw_config match found: DB_USB=USB3_ACTIVE
419 07:15:01.215217 fw_config match found: DB_USB=USB3_ACTIVE
420 07:15:01.221648 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
421 07:15:01.228251 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
422 07:15:01.234775 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
423 07:15:01.244666 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
424 07:15:01.248352 microcode: sig=0x806c1 pf=0x80 revision=0x86
425 07:15:01.254994 microcode: Update skipped, already up-to-date
426 07:15:01.260996 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
427 07:15:01.288357 Detected 4 core, 8 thread CPU.
428 07:15:01.291986 Setting up SMI for CPU
429 07:15:01.295074 IED base = 0x7b400000
430 07:15:01.295162 IED size = 0x00400000
431 07:15:01.298612 Will perform SMM setup.
432 07:15:01.305449 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
433 07:15:01.311792 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
434 07:15:01.318418 Processing 16 relocs. Offset value of 0x00030000
435 07:15:01.321972 Attempting to start 7 APs
436 07:15:01.324791 Waiting for 10ms after sending INIT.
437 07:15:01.340229 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
438 07:15:01.340320 done.
439 07:15:01.344172 AP: slot 6 apic_id 2.
440 07:15:01.347192 AP: slot 2 apic_id 3.
441 07:15:01.347281 AP: slot 4 apic_id 5.
442 07:15:01.350249 AP: slot 5 apic_id 4.
443 07:15:01.353933 Waiting for 2nd SIPI to complete...done.
444 07:15:01.357097 AP: slot 3 apic_id 6.
445 07:15:01.360654 AP: slot 7 apic_id 7.
446 07:15:01.367431 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
447 07:15:01.373974 Processing 13 relocs. Offset value of 0x00038000
448 07:15:01.374064 Unable to locate Global NVS
449 07:15:01.383695 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
450 07:15:01.387343 Installing permanent SMM handler to 0x7b000000
451 07:15:01.396934 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
452 07:15:01.399981 Processing 794 relocs. Offset value of 0x7b010000
453 07:15:01.410231 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
454 07:15:01.413761 Processing 13 relocs. Offset value of 0x7b008000
455 07:15:01.420568 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
456 07:15:01.427147 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
457 07:15:01.430062 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
458 07:15:01.436571 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
459 07:15:01.443520 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
460 07:15:01.450050 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
461 07:15:01.456857 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
462 07:15:01.456945 Unable to locate Global NVS
463 07:15:01.466651 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
464 07:15:01.469714 Clearing SMI status registers
465 07:15:01.469801 SMI_STS: PM1
466 07:15:01.473399 PM1_STS: PWRBTN
467 07:15:01.479459 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
468 07:15:01.483247 In relocation handler: CPU 0
469 07:15:01.486349 New SMBASE=0x7b000000 IEDBASE=0x7b400000
470 07:15:01.493028 Writing SMRR. base = 0x7b000006, mask=0xff800c00
471 07:15:01.493124 Relocation complete.
472 07:15:01.502657 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
473 07:15:01.506356 In relocation handler: CPU 1
474 07:15:01.509261 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
475 07:15:01.509347 Relocation complete.
476 07:15:01.519428 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
477 07:15:01.522462 In relocation handler: CPU 6
478 07:15:01.526248 New SMBASE=0x7affe800 IEDBASE=0x7b400000
479 07:15:01.529176 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 07:15:01.532746 Relocation complete.
481 07:15:01.539105 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
482 07:15:01.542747 In relocation handler: CPU 2
483 07:15:01.545804 New SMBASE=0x7afff800 IEDBASE=0x7b400000
484 07:15:01.549470 Relocation complete.
485 07:15:01.555527 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
486 07:15:01.559313 In relocation handler: CPU 4
487 07:15:01.562191 New SMBASE=0x7afff000 IEDBASE=0x7b400000
488 07:15:01.565911 Relocation complete.
489 07:15:01.572437 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
490 07:15:01.575451 In relocation handler: CPU 5
491 07:15:01.578600 New SMBASE=0x7affec00 IEDBASE=0x7b400000
492 07:15:01.585476 Writing SMRR. base = 0x7b000006, mask=0xff800c00
493 07:15:01.585578 Relocation complete.
494 07:15:01.595828 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
495 07:15:01.595928 In relocation handler: CPU 7
496 07:15:01.602213 New SMBASE=0x7affe400 IEDBASE=0x7b400000
497 07:15:01.602295 Relocation complete.
498 07:15:01.611847 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
499 07:15:01.611927 In relocation handler: CPU 3
500 07:15:01.618441 New SMBASE=0x7afff400 IEDBASE=0x7b400000
501 07:15:01.622098 Writing SMRR. base = 0x7b000006, mask=0xff800c00
502 07:15:01.625830 Relocation complete.
503 07:15:01.625908 Initializing CPU #0
504 07:15:01.629479 CPU: vendor Intel device 806c1
505 07:15:01.633250 CPU: family 06, model 8c, stepping 01
506 07:15:01.636276 Clearing out pending MCEs
507 07:15:01.639324 Setting up local APIC...
508 07:15:01.639412 apic_id: 0x00 done.
509 07:15:01.642748 Turbo is available but hidden
510 07:15:01.646459 Turbo is available and visible
511 07:15:01.652622 microcode: Update skipped, already up-to-date
512 07:15:01.652758 CPU #0 initialized
513 07:15:01.656444 Initializing CPU #3
514 07:15:01.659666 Initializing CPU #7
515 07:15:01.662508 CPU: vendor Intel device 806c1
516 07:15:01.665693 CPU: family 06, model 8c, stepping 01
517 07:15:01.669373 CPU: vendor Intel device 806c1
518 07:15:01.672676 CPU: family 06, model 8c, stepping 01
519 07:15:01.675636 Clearing out pending MCEs
520 07:15:01.675732 Clearing out pending MCEs
521 07:15:01.679455 Setting up local APIC...
522 07:15:01.682557 Initializing CPU #2
523 07:15:01.682653 Initializing CPU #5
524 07:15:01.685770 Initializing CPU #6
525 07:15:01.689224 CPU: vendor Intel device 806c1
526 07:15:01.692470 CPU: family 06, model 8c, stepping 01
527 07:15:01.695319 Initializing CPU #4
528 07:15:01.699114 CPU: vendor Intel device 806c1
529 07:15:01.702035 CPU: family 06, model 8c, stepping 01
530 07:15:01.705499 CPU: vendor Intel device 806c1
531 07:15:01.708734 CPU: family 06, model 8c, stepping 01
532 07:15:01.712358 Clearing out pending MCEs
533 07:15:01.715482 Clearing out pending MCEs
534 07:15:01.715592 Setting up local APIC...
535 07:15:01.719010 apic_id: 0x06 done.
536 07:15:01.722095 Setting up local APIC...
537 07:15:01.725067 Setting up local APIC...
538 07:15:01.725152 Initializing CPU #1
539 07:15:01.728723 Clearing out pending MCEs
540 07:15:01.731683 CPU: vendor Intel device 806c1
541 07:15:01.734970 CPU: family 06, model 8c, stepping 01
542 07:15:01.738633 Setting up local APIC...
543 07:15:01.741785 apic_id: 0x07 done.
544 07:15:01.745391 microcode: Update skipped, already up-to-date
545 07:15:01.748308 microcode: Update skipped, already up-to-date
546 07:15:01.751747 CPU #3 initialized
547 07:15:01.751836 CPU #7 initialized
548 07:15:01.755410 Clearing out pending MCEs
549 07:15:01.758602 apic_id: 0x03 done.
550 07:15:01.761739 Setting up local APIC...
551 07:15:01.761823 apic_id: 0x04 done.
552 07:15:01.764647 apic_id: 0x05 done.
553 07:15:01.768403 microcode: Update skipped, already up-to-date
554 07:15:01.774496 microcode: Update skipped, already up-to-date
555 07:15:01.774593 CPU #5 initialized
556 07:15:01.778282 CPU #4 initialized
557 07:15:01.781417 microcode: Update skipped, already up-to-date
558 07:15:01.785071 apic_id: 0x02 done.
559 07:15:01.788060 CPU #2 initialized
560 07:15:01.791112 CPU: vendor Intel device 806c1
561 07:15:01.794534 CPU: family 06, model 8c, stepping 01
562 07:15:01.798182 microcode: Update skipped, already up-to-date
563 07:15:01.801355 Clearing out pending MCEs
564 07:15:01.801444 CPU #6 initialized
565 07:15:01.804421 Setting up local APIC...
566 07:15:01.808149 apic_id: 0x01 done.
567 07:15:01.811153 microcode: Update skipped, already up-to-date
568 07:15:01.814223 CPU #1 initialized
569 07:15:01.817778 bsp_do_flight_plan done after 459 msecs.
570 07:15:01.821458 CPU: frequency set to 4000 MHz
571 07:15:01.824366 Enabling SMIs.
572 07:15:01.830548 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
573 07:15:01.845680 SATAXPCIE1 indicates PCIe NVMe is present
574 07:15:01.848783 Probing TPM: done!
575 07:15:01.852278 Connected to device vid:did:rid of 1ae0:0028:00
576 07:15:01.862821 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
577 07:15:01.865972 Initialized TPM device CR50 revision 0
578 07:15:01.869643 Enabling S0i3.4
579 07:15:01.876449 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
580 07:15:01.879654 Found a VBT of 8704 bytes after decompression
581 07:15:01.886487 cse_lite: CSE RO boot. HybridStorageMode disabled
582 07:15:01.892560 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
583 07:15:01.968211 FSPS returned 0
584 07:15:01.971825 Executing Phase 1 of FspMultiPhaseSiInit
585 07:15:01.981703 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
586 07:15:01.984802 port C0 DISC req: usage 1 usb3 1 usb2 5
587 07:15:01.988319 Raw Buffer output 0 00000511
588 07:15:01.991379 Raw Buffer output 1 00000000
589 07:15:01.995112 pmc_send_ipc_cmd succeeded
590 07:15:02.002239 port C1 DISC req: usage 1 usb3 2 usb2 3
591 07:15:02.002357 Raw Buffer output 0 00000321
592 07:15:02.005181 Raw Buffer output 1 00000000
593 07:15:02.009510 pmc_send_ipc_cmd succeeded
594 07:15:02.015012 Detected 4 core, 8 thread CPU.
595 07:15:02.017846 Detected 4 core, 8 thread CPU.
596 07:15:02.251860 Display FSP Version Info HOB
597 07:15:02.255006 Reference Code - CPU = a.0.4c.31
598 07:15:02.258664 uCode Version = 0.0.0.86
599 07:15:02.261639 TXT ACM version = ff.ff.ff.ffff
600 07:15:02.265209 Reference Code - ME = a.0.4c.31
601 07:15:02.268331 MEBx version = 0.0.0.0
602 07:15:02.271949 ME Firmware Version = Consumer SKU
603 07:15:02.275105 Reference Code - PCH = a.0.4c.31
604 07:15:02.278624 PCH-CRID Status = Disabled
605 07:15:02.282009 PCH-CRID Original Value = ff.ff.ff.ffff
606 07:15:02.285090 PCH-CRID New Value = ff.ff.ff.ffff
607 07:15:02.288736 OPROM - RST - RAID = ff.ff.ff.ffff
608 07:15:02.291759 PCH Hsio Version = 4.0.0.0
609 07:15:02.294881 Reference Code - SA - System Agent = a.0.4c.31
610 07:15:02.298498 Reference Code - MRC = 2.0.0.1
611 07:15:02.301680 SA - PCIe Version = a.0.4c.31
612 07:15:02.305440 SA-CRID Status = Disabled
613 07:15:02.308451 SA-CRID Original Value = 0.0.0.1
614 07:15:02.311519 SA-CRID New Value = 0.0.0.1
615 07:15:02.315035 OPROM - VBIOS = ff.ff.ff.ffff
616 07:15:02.318462 IO Manageability Engine FW Version = 11.1.4.0
617 07:15:02.321459 PHY Build Version = 0.0.0.e0
618 07:15:02.324901 Thunderbolt(TM) FW Version = 0.0.0.0
619 07:15:02.331986 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
620 07:15:02.334715 ITSS IRQ Polarities Before:
621 07:15:02.334803 IPC0: 0xffffffff
622 07:15:02.338233 IPC1: 0xffffffff
623 07:15:02.338310 IPC2: 0xffffffff
624 07:15:02.341872 IPC3: 0xffffffff
625 07:15:02.344748 ITSS IRQ Polarities After:
626 07:15:02.344823 IPC0: 0xffffffff
627 07:15:02.348255 IPC1: 0xffffffff
628 07:15:02.348350 IPC2: 0xffffffff
629 07:15:02.351212 IPC3: 0xffffffff
630 07:15:02.354762 Found PCIe Root Port #9 at PCI: 00:1d.0.
631 07:15:02.367824 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
632 07:15:02.378347 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
633 07:15:02.391117 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
634 07:15:02.397698 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
635 07:15:02.401295 Enumerating buses...
636 07:15:02.404267 Show all devs... Before device enumeration.
637 07:15:02.407833 Root Device: enabled 1
638 07:15:02.407916 DOMAIN: 0000: enabled 1
639 07:15:02.411522 CPU_CLUSTER: 0: enabled 1
640 07:15:02.414470 PCI: 00:00.0: enabled 1
641 07:15:02.418023 PCI: 00:02.0: enabled 1
642 07:15:02.418102 PCI: 00:04.0: enabled 1
643 07:15:02.421505 PCI: 00:05.0: enabled 1
644 07:15:02.424447 PCI: 00:06.0: enabled 0
645 07:15:02.427796 PCI: 00:07.0: enabled 0
646 07:15:02.427876 PCI: 00:07.1: enabled 0
647 07:15:02.431451 PCI: 00:07.2: enabled 0
648 07:15:02.434390 PCI: 00:07.3: enabled 0
649 07:15:02.434468 PCI: 00:08.0: enabled 1
650 07:15:02.437696 PCI: 00:09.0: enabled 0
651 07:15:02.441137 PCI: 00:0a.0: enabled 0
652 07:15:02.444178 PCI: 00:0d.0: enabled 1
653 07:15:02.444257 PCI: 00:0d.1: enabled 0
654 07:15:02.447673 PCI: 00:0d.2: enabled 0
655 07:15:02.451226 PCI: 00:0d.3: enabled 0
656 07:15:02.454170 PCI: 00:0e.0: enabled 0
657 07:15:02.454248 PCI: 00:10.2: enabled 1
658 07:15:02.457840 PCI: 00:10.6: enabled 0
659 07:15:02.460977 PCI: 00:10.7: enabled 0
660 07:15:02.464248 PCI: 00:12.0: enabled 0
661 07:15:02.464324 PCI: 00:12.6: enabled 0
662 07:15:02.467340 PCI: 00:13.0: enabled 0
663 07:15:02.470977 PCI: 00:14.0: enabled 1
664 07:15:02.474749 PCI: 00:14.1: enabled 0
665 07:15:02.474826 PCI: 00:14.2: enabled 1
666 07:15:02.477500 PCI: 00:14.3: enabled 1
667 07:15:02.481132 PCI: 00:15.0: enabled 1
668 07:15:02.481209 PCI: 00:15.1: enabled 1
669 07:15:02.484134 PCI: 00:15.2: enabled 1
670 07:15:02.487685 PCI: 00:15.3: enabled 1
671 07:15:02.491191 PCI: 00:16.0: enabled 1
672 07:15:02.491280 PCI: 00:16.1: enabled 0
673 07:15:02.494064 PCI: 00:16.2: enabled 0
674 07:15:02.497656 PCI: 00:16.3: enabled 0
675 07:15:02.500619 PCI: 00:16.4: enabled 0
676 07:15:02.500710 PCI: 00:16.5: enabled 0
677 07:15:02.504206 PCI: 00:17.0: enabled 1
678 07:15:02.507219 PCI: 00:19.0: enabled 0
679 07:15:02.510530 PCI: 00:19.1: enabled 1
680 07:15:02.510630 PCI: 00:19.2: enabled 0
681 07:15:02.514010 PCI: 00:1c.0: enabled 1
682 07:15:02.517572 PCI: 00:1c.1: enabled 0
683 07:15:02.520690 PCI: 00:1c.2: enabled 0
684 07:15:02.520776 PCI: 00:1c.3: enabled 0
685 07:15:02.524260 PCI: 00:1c.4: enabled 0
686 07:15:02.527558 PCI: 00:1c.5: enabled 0
687 07:15:02.527644 PCI: 00:1c.6: enabled 1
688 07:15:02.530619 PCI: 00:1c.7: enabled 0
689 07:15:02.534035 PCI: 00:1d.0: enabled 1
690 07:15:02.537676 PCI: 00:1d.1: enabled 0
691 07:15:02.537763 PCI: 00:1d.2: enabled 1
692 07:15:02.540630 PCI: 00:1d.3: enabled 0
693 07:15:02.544120 PCI: 00:1e.0: enabled 1
694 07:15:02.547481 PCI: 00:1e.1: enabled 0
695 07:15:02.547576 PCI: 00:1e.2: enabled 1
696 07:15:02.550485 PCI: 00:1e.3: enabled 1
697 07:15:02.553671 PCI: 00:1f.0: enabled 1
698 07:15:02.557488 PCI: 00:1f.1: enabled 0
699 07:15:02.557627 PCI: 00:1f.2: enabled 1
700 07:15:02.560390 PCI: 00:1f.3: enabled 1
701 07:15:02.564002 PCI: 00:1f.4: enabled 0
702 07:15:02.564109 PCI: 00:1f.5: enabled 1
703 07:15:02.567500 PCI: 00:1f.6: enabled 0
704 07:15:02.570402 PCI: 00:1f.7: enabled 0
705 07:15:02.573869 APIC: 00: enabled 1
706 07:15:02.573957 GENERIC: 0.0: enabled 1
707 07:15:02.577246 GENERIC: 0.0: enabled 1
708 07:15:02.580306 GENERIC: 1.0: enabled 1
709 07:15:02.583902 GENERIC: 0.0: enabled 1
710 07:15:02.583998 GENERIC: 1.0: enabled 1
711 07:15:02.586975 USB0 port 0: enabled 1
712 07:15:02.590504 GENERIC: 0.0: enabled 1
713 07:15:02.590621 USB0 port 0: enabled 1
714 07:15:02.594180 GENERIC: 0.0: enabled 1
715 07:15:02.597162 I2C: 00:1a: enabled 1
716 07:15:02.597250 I2C: 00:31: enabled 1
717 07:15:02.600796 I2C: 00:32: enabled 1
718 07:15:02.603822 I2C: 00:10: enabled 1
719 07:15:02.607532 I2C: 00:15: enabled 1
720 07:15:02.607635 GENERIC: 0.0: enabled 0
721 07:15:02.610406 GENERIC: 1.0: enabled 0
722 07:15:02.614041 GENERIC: 0.0: enabled 1
723 07:15:02.614229 SPI: 00: enabled 1
724 07:15:02.616858 SPI: 00: enabled 1
725 07:15:02.620580 PNP: 0c09.0: enabled 1
726 07:15:02.620730 GENERIC: 0.0: enabled 1
727 07:15:02.623538 USB3 port 0: enabled 1
728 07:15:02.626951 USB3 port 1: enabled 1
729 07:15:02.627079 USB3 port 2: enabled 0
730 07:15:02.630548 USB3 port 3: enabled 0
731 07:15:02.634119 USB2 port 0: enabled 0
732 07:15:02.637042 USB2 port 1: enabled 1
733 07:15:02.637137 USB2 port 2: enabled 1
734 07:15:02.640507 USB2 port 3: enabled 0
735 07:15:02.643434 USB2 port 4: enabled 1
736 07:15:02.643521 USB2 port 5: enabled 0
737 07:15:02.646875 USB2 port 6: enabled 0
738 07:15:02.650396 USB2 port 7: enabled 0
739 07:15:02.653459 USB2 port 8: enabled 0
740 07:15:02.653544 USB2 port 9: enabled 0
741 07:15:02.657267 USB3 port 0: enabled 0
742 07:15:02.660253 USB3 port 1: enabled 1
743 07:15:02.660334 USB3 port 2: enabled 0
744 07:15:02.663521 USB3 port 3: enabled 0
745 07:15:02.667206 GENERIC: 0.0: enabled 1
746 07:15:02.670279 GENERIC: 1.0: enabled 1
747 07:15:02.670366 APIC: 01: enabled 1
748 07:15:02.673312 APIC: 03: enabled 1
749 07:15:02.673410 APIC: 06: enabled 1
750 07:15:02.677117 APIC: 05: enabled 1
751 07:15:02.680408 APIC: 04: enabled 1
752 07:15:02.680493 APIC: 02: enabled 1
753 07:15:02.683443 APIC: 07: enabled 1
754 07:15:02.683520 Compare with tree...
755 07:15:02.687030 Root Device: enabled 1
756 07:15:02.690051 DOMAIN: 0000: enabled 1
757 07:15:02.693583 PCI: 00:00.0: enabled 1
758 07:15:02.697164 PCI: 00:02.0: enabled 1
759 07:15:02.697245 PCI: 00:04.0: enabled 1
760 07:15:02.699873 GENERIC: 0.0: enabled 1
761 07:15:02.703622 PCI: 00:05.0: enabled 1
762 07:15:02.706458 PCI: 00:06.0: enabled 0
763 07:15:02.710232 PCI: 00:07.0: enabled 0
764 07:15:02.710319 GENERIC: 0.0: enabled 1
765 07:15:02.713139 PCI: 00:07.1: enabled 0
766 07:15:02.716700 GENERIC: 1.0: enabled 1
767 07:15:02.719660 PCI: 00:07.2: enabled 0
768 07:15:02.723291 GENERIC: 0.0: enabled 1
769 07:15:02.723373 PCI: 00:07.3: enabled 0
770 07:15:02.726497 GENERIC: 1.0: enabled 1
771 07:15:02.730007 PCI: 00:08.0: enabled 1
772 07:15:02.733437 PCI: 00:09.0: enabled 0
773 07:15:02.736320 PCI: 00:0a.0: enabled 0
774 07:15:02.736398 PCI: 00:0d.0: enabled 1
775 07:15:02.739932 USB0 port 0: enabled 1
776 07:15:02.743222 USB3 port 0: enabled 1
777 07:15:02.746751 USB3 port 1: enabled 1
778 07:15:02.749899 USB3 port 2: enabled 0
779 07:15:02.753140 USB3 port 3: enabled 0
780 07:15:02.753218 PCI: 00:0d.1: enabled 0
781 07:15:02.756576 PCI: 00:0d.2: enabled 0
782 07:15:02.759601 GENERIC: 0.0: enabled 1
783 07:15:02.763307 PCI: 00:0d.3: enabled 0
784 07:15:02.766210 PCI: 00:0e.0: enabled 0
785 07:15:02.766336 PCI: 00:10.2: enabled 1
786 07:15:02.769974 PCI: 00:10.6: enabled 0
787 07:15:02.772902 PCI: 00:10.7: enabled 0
788 07:15:02.776413 PCI: 00:12.0: enabled 0
789 07:15:02.776498 PCI: 00:12.6: enabled 0
790 07:15:02.779485 PCI: 00:13.0: enabled 0
791 07:15:02.783164 PCI: 00:14.0: enabled 1
792 07:15:02.786030 USB0 port 0: enabled 1
793 07:15:02.789680 USB2 port 0: enabled 0
794 07:15:02.792728 USB2 port 1: enabled 1
795 07:15:02.792837 USB2 port 2: enabled 1
796 07:15:02.796350 USB2 port 3: enabled 0
797 07:15:02.799297 USB2 port 4: enabled 1
798 07:15:02.802922 USB2 port 5: enabled 0
799 07:15:02.806129 USB2 port 6: enabled 0
800 07:15:02.806223 USB2 port 7: enabled 0
801 07:15:02.809494 USB2 port 8: enabled 0
802 07:15:02.812657 USB2 port 9: enabled 0
803 07:15:02.816135 USB3 port 0: enabled 0
804 07:15:02.819593 USB3 port 1: enabled 1
805 07:15:02.822494 USB3 port 2: enabled 0
806 07:15:02.822584 USB3 port 3: enabled 0
807 07:15:02.826170 PCI: 00:14.1: enabled 0
808 07:15:02.829684 PCI: 00:14.2: enabled 1
809 07:15:02.832645 PCI: 00:14.3: enabled 1
810 07:15:02.835710 GENERIC: 0.0: enabled 1
811 07:15:02.835790 PCI: 00:15.0: enabled 1
812 07:15:02.839187 I2C: 00:1a: enabled 1
813 07:15:02.842525 I2C: 00:31: enabled 1
814 07:15:02.846008 I2C: 00:32: enabled 1
815 07:15:02.849015 PCI: 00:15.1: enabled 1
816 07:15:02.849101 I2C: 00:10: enabled 1
817 07:15:02.852504 PCI: 00:15.2: enabled 1
818 07:15:02.856127 PCI: 00:15.3: enabled 1
819 07:15:02.859049 PCI: 00:16.0: enabled 1
820 07:15:02.862600 PCI: 00:16.1: enabled 0
821 07:15:02.862689 PCI: 00:16.2: enabled 0
822 07:15:02.865743 PCI: 00:16.3: enabled 0
823 07:15:02.869273 PCI: 00:16.4: enabled 0
824 07:15:02.872677 PCI: 00:16.5: enabled 0
825 07:15:02.872773 PCI: 00:17.0: enabled 1
826 07:15:02.876219 PCI: 00:19.0: enabled 0
827 07:15:02.926016 PCI: 00:19.1: enabled 1
828 07:15:02.926143 I2C: 00:15: enabled 1
829 07:15:02.926439 PCI: 00:19.2: enabled 0
830 07:15:02.926545 PCI: 00:1d.0: enabled 1
831 07:15:02.926617 GENERIC: 0.0: enabled 1
832 07:15:02.926688 PCI: 00:1e.0: enabled 1
833 07:15:02.926768 PCI: 00:1e.1: enabled 0
834 07:15:02.926837 PCI: 00:1e.2: enabled 1
835 07:15:02.926898 SPI: 00: enabled 1
836 07:15:02.927187 PCI: 00:1e.3: enabled 1
837 07:15:02.927282 SPI: 00: enabled 1
838 07:15:02.927363 PCI: 00:1f.0: enabled 1
839 07:15:02.927622 PNP: 0c09.0: enabled 1
840 07:15:02.927696 PCI: 00:1f.1: enabled 0
841 07:15:02.927949 PCI: 00:1f.2: enabled 1
842 07:15:02.928025 GENERIC: 0.0: enabled 1
843 07:15:02.928091 GENERIC: 0.0: enabled 1
844 07:15:02.928336 GENERIC: 1.0: enabled 1
845 07:15:02.928404 PCI: 00:1f.3: enabled 1
846 07:15:02.977687 PCI: 00:1f.4: enabled 0
847 07:15:02.977825 PCI: 00:1f.5: enabled 1
848 07:15:02.978104 PCI: 00:1f.6: enabled 0
849 07:15:02.978177 PCI: 00:1f.7: enabled 0
850 07:15:02.978244 CPU_CLUSTER: 0: enabled 1
851 07:15:02.978309 APIC: 00: enabled 1
852 07:15:02.978380 APIC: 01: enabled 1
853 07:15:02.978634 APIC: 03: enabled 1
854 07:15:02.978705 APIC: 06: enabled 1
855 07:15:02.978768 APIC: 05: enabled 1
856 07:15:02.978829 APIC: 04: enabled 1
857 07:15:02.978898 APIC: 02: enabled 1
858 07:15:02.978958 APIC: 07: enabled 1
859 07:15:02.979017 Root Device scanning...
860 07:15:02.979077 scan_static_bus for Root Device
861 07:15:02.979136 DOMAIN: 0000 enabled
862 07:15:02.979195 CPU_CLUSTER: 0 enabled
863 07:15:02.979254 DOMAIN: 0000 scanning...
864 07:15:02.979497 PCI: pci_scan_bus for bus 00
865 07:15:02.979562 PCI: 00:00.0 [8086/0000] ops
866 07:15:02.982196 PCI: 00:00.0 [8086/9a12] enabled
867 07:15:02.984996 PCI: 00:02.0 [8086/0000] bus ops
868 07:15:02.988743 PCI: 00:02.0 [8086/9a40] enabled
869 07:15:02.992185 PCI: 00:04.0 [8086/0000] bus ops
870 07:15:02.995168 PCI: 00:04.0 [8086/9a03] enabled
871 07:15:02.998690 PCI: 00:05.0 [8086/9a19] enabled
872 07:15:03.001707 PCI: 00:07.0 [0000/0000] hidden
873 07:15:03.005415 PCI: 00:08.0 [8086/9a11] enabled
874 07:15:03.008330 PCI: 00:0a.0 [8086/9a0d] disabled
875 07:15:03.011787 PCI: 00:0d.0 [8086/0000] bus ops
876 07:15:03.015318 PCI: 00:0d.0 [8086/9a13] enabled
877 07:15:03.018289 PCI: 00:14.0 [8086/0000] bus ops
878 07:15:03.021733 PCI: 00:14.0 [8086/a0ed] enabled
879 07:15:03.025396 PCI: 00:14.2 [8086/a0ef] enabled
880 07:15:03.028469 PCI: 00:14.3 [8086/0000] bus ops
881 07:15:03.031908 PCI: 00:14.3 [8086/a0f0] enabled
882 07:15:03.035112 PCI: 00:15.0 [8086/0000] bus ops
883 07:15:03.038550 PCI: 00:15.0 [8086/a0e8] enabled
884 07:15:03.041528 PCI: 00:15.1 [8086/0000] bus ops
885 07:15:03.045284 PCI: 00:15.1 [8086/a0e9] enabled
886 07:15:03.048191 PCI: 00:15.2 [8086/0000] bus ops
887 07:15:03.051553 PCI: 00:15.2 [8086/a0ea] enabled
888 07:15:03.055209 PCI: 00:15.3 [8086/0000] bus ops
889 07:15:03.058077 PCI: 00:15.3 [8086/a0eb] enabled
890 07:15:03.061616 PCI: 00:16.0 [8086/0000] ops
891 07:15:03.064469 PCI: 00:16.0 [8086/a0e0] enabled
892 07:15:03.071605 PCI: Static device PCI: 00:17.0 not found, disabling it.
893 07:15:03.074638 PCI: 00:19.0 [8086/0000] bus ops
894 07:15:03.078217 PCI: 00:19.0 [8086/a0c5] disabled
895 07:15:03.081221 PCI: 00:19.1 [8086/0000] bus ops
896 07:15:03.084751 PCI: 00:19.1 [8086/a0c6] enabled
897 07:15:03.088007 PCI: 00:1d.0 [8086/0000] bus ops
898 07:15:03.091417 PCI: 00:1d.0 [8086/a0b0] enabled
899 07:15:03.094996 PCI: 00:1e.0 [8086/0000] ops
900 07:15:03.097948 PCI: 00:1e.0 [8086/a0a8] enabled
901 07:15:03.101048 PCI: 00:1e.2 [8086/0000] bus ops
902 07:15:03.104728 PCI: 00:1e.2 [8086/a0aa] enabled
903 07:15:03.107735 PCI: 00:1e.3 [8086/0000] bus ops
904 07:15:03.110843 PCI: 00:1e.3 [8086/a0ab] enabled
905 07:15:03.114490 PCI: 00:1f.0 [8086/0000] bus ops
906 07:15:03.118129 PCI: 00:1f.0 [8086/a087] enabled
907 07:15:03.118211 RTC Init
908 07:15:03.120961 Set power on after power failure.
909 07:15:03.124338 Disabling Deep S3
910 07:15:03.124418 Disabling Deep S3
911 07:15:03.127270 Disabling Deep S4
912 07:15:03.127344 Disabling Deep S4
913 07:15:03.130862 Disabling Deep S5
914 07:15:03.134440 Disabling Deep S5
915 07:15:03.137416 PCI: 00:1f.2 [0000/0000] hidden
916 07:15:03.141333 PCI: 00:1f.3 [8086/0000] bus ops
917 07:15:03.144270 PCI: 00:1f.3 [8086/a0c8] enabled
918 07:15:03.147248 PCI: 00:1f.5 [8086/0000] bus ops
919 07:15:03.150845 PCI: 00:1f.5 [8086/a0a4] enabled
920 07:15:03.150922 PCI: Leftover static devices:
921 07:15:03.154182 PCI: 00:10.2
922 07:15:03.154269 PCI: 00:10.6
923 07:15:03.157078 PCI: 00:10.7
924 07:15:03.157170 PCI: 00:06.0
925 07:15:03.160441 PCI: 00:07.1
926 07:15:03.160520 PCI: 00:07.2
927 07:15:03.160585 PCI: 00:07.3
928 07:15:03.164018 PCI: 00:09.0
929 07:15:03.164096 PCI: 00:0d.1
930 07:15:03.167075 PCI: 00:0d.2
931 07:15:03.167149 PCI: 00:0d.3
932 07:15:03.167211 PCI: 00:0e.0
933 07:15:03.170610 PCI: 00:12.0
934 07:15:03.170683 PCI: 00:12.6
935 07:15:03.173538 PCI: 00:13.0
936 07:15:03.173614 PCI: 00:14.1
937 07:15:03.177285 PCI: 00:16.1
938 07:15:03.177361 PCI: 00:16.2
939 07:15:03.177428 PCI: 00:16.3
940 07:15:03.180389 PCI: 00:16.4
941 07:15:03.180465 PCI: 00:16.5
942 07:15:03.183818 PCI: 00:17.0
943 07:15:03.183894 PCI: 00:19.2
944 07:15:03.183957 PCI: 00:1e.1
945 07:15:03.187402 PCI: 00:1f.1
946 07:15:03.187499 PCI: 00:1f.4
947 07:15:03.190974 PCI: 00:1f.6
948 07:15:03.191056 PCI: 00:1f.7
949 07:15:03.193805 PCI: Check your devicetree.cb.
950 07:15:03.197169 PCI: 00:02.0 scanning...
951 07:15:03.200197 scan_generic_bus for PCI: 00:02.0
952 07:15:03.204046 scan_generic_bus for PCI: 00:02.0 done
953 07:15:03.207042 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
954 07:15:03.209987 PCI: 00:04.0 scanning...
955 07:15:03.213549 scan_generic_bus for PCI: 00:04.0
956 07:15:03.216563 GENERIC: 0.0 enabled
957 07:15:03.223543 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
958 07:15:03.227343 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
959 07:15:03.230084 PCI: 00:0d.0 scanning...
960 07:15:03.233228 scan_static_bus for PCI: 00:0d.0
961 07:15:03.237029 USB0 port 0 enabled
962 07:15:03.239988 USB0 port 0 scanning...
963 07:15:03.243692 scan_static_bus for USB0 port 0
964 07:15:03.243775 USB3 port 0 enabled
965 07:15:03.246656 USB3 port 1 enabled
966 07:15:03.246731 USB3 port 2 disabled
967 07:15:03.250179 USB3 port 3 disabled
968 07:15:03.253254 USB3 port 0 scanning...
969 07:15:03.256644 scan_static_bus for USB3 port 0
970 07:15:03.260034 scan_static_bus for USB3 port 0 done
971 07:15:03.262969 scan_bus: bus USB3 port 0 finished in 6 msecs
972 07:15:03.266333 USB3 port 1 scanning...
973 07:15:03.270129 scan_static_bus for USB3 port 1
974 07:15:03.272989 scan_static_bus for USB3 port 1 done
975 07:15:03.279420 scan_bus: bus USB3 port 1 finished in 6 msecs
976 07:15:03.283098 scan_static_bus for USB0 port 0 done
977 07:15:03.286136 scan_bus: bus USB0 port 0 finished in 43 msecs
978 07:15:03.289510 scan_static_bus for PCI: 00:0d.0 done
979 07:15:03.296322 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
980 07:15:03.299646 PCI: 00:14.0 scanning...
981 07:15:03.303032 scan_static_bus for PCI: 00:14.0
982 07:15:03.303115 USB0 port 0 enabled
983 07:15:03.305971 USB0 port 0 scanning...
984 07:15:03.309765 scan_static_bus for USB0 port 0
985 07:15:03.312636 USB2 port 0 disabled
986 07:15:03.312714 USB2 port 1 enabled
987 07:15:03.316290 USB2 port 2 enabled
988 07:15:03.319304 USB2 port 3 disabled
989 07:15:03.319385 USB2 port 4 enabled
990 07:15:03.322416 USB2 port 5 disabled
991 07:15:03.325815 USB2 port 6 disabled
992 07:15:03.325896 USB2 port 7 disabled
993 07:15:03.329312 USB2 port 8 disabled
994 07:15:03.332847 USB2 port 9 disabled
995 07:15:03.332927 USB3 port 0 disabled
996 07:15:03.336147 USB3 port 1 enabled
997 07:15:03.336225 USB3 port 2 disabled
998 07:15:03.339181 USB3 port 3 disabled
999 07:15:03.342420 USB2 port 1 scanning...
1000 07:15:03.345729 scan_static_bus for USB2 port 1
1001 07:15:03.349311 scan_static_bus for USB2 port 1 done
1002 07:15:03.352361 scan_bus: bus USB2 port 1 finished in 6 msecs
1003 07:15:03.355964 USB2 port 2 scanning...
1004 07:15:03.359069 scan_static_bus for USB2 port 2
1005 07:15:03.362304 scan_static_bus for USB2 port 2 done
1006 07:15:03.368700 scan_bus: bus USB2 port 2 finished in 6 msecs
1007 07:15:03.368810 USB2 port 4 scanning...
1008 07:15:03.372176 scan_static_bus for USB2 port 4
1009 07:15:03.378614 scan_static_bus for USB2 port 4 done
1010 07:15:03.382085 scan_bus: bus USB2 port 4 finished in 6 msecs
1011 07:15:03.385596 USB3 port 1 scanning...
1012 07:15:03.388677 scan_static_bus for USB3 port 1
1013 07:15:03.392300 scan_static_bus for USB3 port 1 done
1014 07:15:03.395526 scan_bus: bus USB3 port 1 finished in 6 msecs
1015 07:15:03.398835 scan_static_bus for USB0 port 0 done
1016 07:15:03.405583 scan_bus: bus USB0 port 0 finished in 93 msecs
1017 07:15:03.408671 scan_static_bus for PCI: 00:14.0 done
1018 07:15:03.412133 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1019 07:15:03.415076 PCI: 00:14.3 scanning...
1020 07:15:03.418256 scan_static_bus for PCI: 00:14.3
1021 07:15:03.421974 GENERIC: 0.0 enabled
1022 07:15:03.424809 scan_static_bus for PCI: 00:14.3 done
1023 07:15:03.431599 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1024 07:15:03.431687 PCI: 00:15.0 scanning...
1025 07:15:03.434886 scan_static_bus for PCI: 00:15.0
1026 07:15:03.438420 I2C: 00:1a enabled
1027 07:15:03.441938 I2C: 00:31 enabled
1028 07:15:03.442019 I2C: 00:32 enabled
1029 07:15:03.444872 scan_static_bus for PCI: 00:15.0 done
1030 07:15:03.451628 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1031 07:15:03.451709 PCI: 00:15.1 scanning...
1032 07:15:03.455137 scan_static_bus for PCI: 00:15.1
1033 07:15:03.458823 I2C: 00:10 enabled
1034 07:15:03.462253 scan_static_bus for PCI: 00:15.1 done
1035 07:15:03.465952 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1036 07:15:03.469247 PCI: 00:15.2 scanning...
1037 07:15:03.472106 scan_static_bus for PCI: 00:15.2
1038 07:15:03.475609 scan_static_bus for PCI: 00:15.2 done
1039 07:15:03.482548 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1040 07:15:03.485475 PCI: 00:15.3 scanning...
1041 07:15:03.489155 scan_static_bus for PCI: 00:15.3
1042 07:15:03.492062 scan_static_bus for PCI: 00:15.3 done
1043 07:15:03.495788 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1044 07:15:03.498900 PCI: 00:19.1 scanning...
1045 07:15:03.502410 scan_static_bus for PCI: 00:19.1
1046 07:15:03.505431 I2C: 00:15 enabled
1047 07:15:03.509010 scan_static_bus for PCI: 00:19.1 done
1048 07:15:03.512037 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1049 07:15:03.515068 PCI: 00:1d.0 scanning...
1050 07:15:03.518581 do_pci_scan_bridge for PCI: 00:1d.0
1051 07:15:03.522311 PCI: pci_scan_bus for bus 01
1052 07:15:03.525273 PCI: 01:00.0 [1c5c/174a] enabled
1053 07:15:03.528937 GENERIC: 0.0 enabled
1054 07:15:03.531988 Enabling Common Clock Configuration
1055 07:15:03.535503 L1 Sub-State supported from root port 29
1056 07:15:03.538530 L1 Sub-State Support = 0xf
1057 07:15:03.541805 CommonModeRestoreTime = 0x28
1058 07:15:03.545271 Power On Value = 0x16, Power On Scale = 0x0
1059 07:15:03.548411 ASPM: Enabled L1
1060 07:15:03.552011 PCIe: Max_Payload_Size adjusted to 128
1061 07:15:03.555188 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1062 07:15:03.558157 PCI: 00:1e.2 scanning...
1063 07:15:03.561703 scan_generic_bus for PCI: 00:1e.2
1064 07:15:03.565250 SPI: 00 enabled
1065 07:15:03.571326 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1066 07:15:03.574650 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1067 07:15:03.578201 PCI: 00:1e.3 scanning...
1068 07:15:03.581487 scan_generic_bus for PCI: 00:1e.3
1069 07:15:03.581571 SPI: 00 enabled
1070 07:15:03.587965 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1071 07:15:03.594474 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1072 07:15:03.598022 PCI: 00:1f.0 scanning...
1073 07:15:03.601470 scan_static_bus for PCI: 00:1f.0
1074 07:15:03.601558 PNP: 0c09.0 enabled
1075 07:15:03.604559 PNP: 0c09.0 scanning...
1076 07:15:03.607986 scan_static_bus for PNP: 0c09.0
1077 07:15:03.611105 scan_static_bus for PNP: 0c09.0 done
1078 07:15:03.618113 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1079 07:15:03.621125 scan_static_bus for PCI: 00:1f.0 done
1080 07:15:03.624749 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1081 07:15:03.627808 PCI: 00:1f.2 scanning...
1082 07:15:03.631419 scan_static_bus for PCI: 00:1f.2
1083 07:15:03.634400 GENERIC: 0.0 enabled
1084 07:15:03.634495 GENERIC: 0.0 scanning...
1085 07:15:03.637479 scan_static_bus for GENERIC: 0.0
1086 07:15:03.641232 GENERIC: 0.0 enabled
1087 07:15:03.644257 GENERIC: 1.0 enabled
1088 07:15:03.647571 scan_static_bus for GENERIC: 0.0 done
1089 07:15:03.651347 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1090 07:15:03.654271 scan_static_bus for PCI: 00:1f.2 done
1091 07:15:03.660848 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1092 07:15:03.664479 PCI: 00:1f.3 scanning...
1093 07:15:03.667509 scan_static_bus for PCI: 00:1f.3
1094 07:15:03.671036 scan_static_bus for PCI: 00:1f.3 done
1095 07:15:03.674225 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1096 07:15:03.677717 PCI: 00:1f.5 scanning...
1097 07:15:03.680558 scan_generic_bus for PCI: 00:1f.5
1098 07:15:03.684560 scan_generic_bus for PCI: 00:1f.5 done
1099 07:15:03.691326 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1100 07:15:03.694147 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1101 07:15:03.697546 scan_static_bus for Root Device done
1102 07:15:03.704096 scan_bus: bus Root Device finished in 737 msecs
1103 07:15:03.704178 done
1104 07:15:03.710541 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1105 07:15:03.713682 Chrome EC: UHEPI supported
1106 07:15:03.720251 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1107 07:15:03.727317 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1108 07:15:03.730419 SPI flash protection: WPSW=0 SRP0=0
1109 07:15:03.733466 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1110 07:15:03.740553 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1111 07:15:03.743728 found VGA at PCI: 00:02.0
1112 07:15:03.747382 Setting up VGA for PCI: 00:02.0
1113 07:15:03.750053 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1114 07:15:03.756739 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1115 07:15:03.760302 Allocating resources...
1116 07:15:03.760391 Reading resources...
1117 07:15:03.763344 Root Device read_resources bus 0 link: 0
1118 07:15:03.770364 DOMAIN: 0000 read_resources bus 0 link: 0
1119 07:15:03.773586 PCI: 00:04.0 read_resources bus 1 link: 0
1120 07:15:03.780470 PCI: 00:04.0 read_resources bus 1 link: 0 done
1121 07:15:03.783479 PCI: 00:0d.0 read_resources bus 0 link: 0
1122 07:15:03.790035 USB0 port 0 read_resources bus 0 link: 0
1123 07:15:03.793844 USB0 port 0 read_resources bus 0 link: 0 done
1124 07:15:03.800120 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1125 07:15:03.803555 PCI: 00:14.0 read_resources bus 0 link: 0
1126 07:15:03.806596 USB0 port 0 read_resources bus 0 link: 0
1127 07:15:03.814437 USB0 port 0 read_resources bus 0 link: 0 done
1128 07:15:03.817434 PCI: 00:14.0 read_resources bus 0 link: 0 done
1129 07:15:03.824807 PCI: 00:14.3 read_resources bus 0 link: 0
1130 07:15:03.827781 PCI: 00:14.3 read_resources bus 0 link: 0 done
1131 07:15:03.834398 PCI: 00:15.0 read_resources bus 0 link: 0
1132 07:15:03.837472 PCI: 00:15.0 read_resources bus 0 link: 0 done
1133 07:15:03.844191 PCI: 00:15.1 read_resources bus 0 link: 0
1134 07:15:03.847672 PCI: 00:15.1 read_resources bus 0 link: 0 done
1135 07:15:03.855274 PCI: 00:19.1 read_resources bus 0 link: 0
1136 07:15:03.858278 PCI: 00:19.1 read_resources bus 0 link: 0 done
1137 07:15:03.864992 PCI: 00:1d.0 read_resources bus 1 link: 0
1138 07:15:03.868492 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1139 07:15:03.875118 PCI: 00:1e.2 read_resources bus 2 link: 0
1140 07:15:03.878621 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1141 07:15:03.885371 PCI: 00:1e.3 read_resources bus 3 link: 0
1142 07:15:03.888382 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1143 07:15:03.895279 PCI: 00:1f.0 read_resources bus 0 link: 0
1144 07:15:03.898221 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1145 07:15:03.901704 PCI: 00:1f.2 read_resources bus 0 link: 0
1146 07:15:03.908725 GENERIC: 0.0 read_resources bus 0 link: 0
1147 07:15:03.911635 GENERIC: 0.0 read_resources bus 0 link: 0 done
1148 07:15:03.918286 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1149 07:15:03.924983 DOMAIN: 0000 read_resources bus 0 link: 0 done
1150 07:15:03.928464 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1151 07:15:03.934983 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1152 07:15:03.937958 Root Device read_resources bus 0 link: 0 done
1153 07:15:03.941604 Done reading resources.
1154 07:15:03.945024 Show resources in subtree (Root Device)...After reading.
1155 07:15:03.951341 Root Device child on link 0 DOMAIN: 0000
1156 07:15:03.954812 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1157 07:15:03.964581 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1158 07:15:03.975040 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1159 07:15:03.975153 PCI: 00:00.0
1160 07:15:03.984580 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1161 07:15:03.994654 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1162 07:15:04.004616 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1163 07:15:04.014278 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1164 07:15:04.024749 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1165 07:15:04.031094 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1166 07:15:04.040955 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1167 07:15:04.050922 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1168 07:15:04.061135 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1169 07:15:04.070730 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1170 07:15:04.080417 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1171 07:15:04.087139 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1172 07:15:04.097035 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1173 07:15:04.107565 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1174 07:15:04.117652 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1175 07:15:04.127114 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1176 07:15:04.137267 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1177 07:15:04.143743 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1178 07:15:04.153481 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1179 07:15:04.163197 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1180 07:15:04.167033 PCI: 00:02.0
1181 07:15:04.177026 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1182 07:15:04.186415 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1183 07:15:04.192997 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1184 07:15:04.199742 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1185 07:15:04.210038 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1186 07:15:04.210152 GENERIC: 0.0
1187 07:15:04.213052 PCI: 00:05.0
1188 07:15:04.223186 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1189 07:15:04.226371 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1190 07:15:04.230147 GENERIC: 0.0
1191 07:15:04.230244 PCI: 00:08.0
1192 07:15:04.239858 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 07:15:04.243051 PCI: 00:0a.0
1194 07:15:04.246025 PCI: 00:0d.0 child on link 0 USB0 port 0
1195 07:15:04.255837 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1196 07:15:04.263061 USB0 port 0 child on link 0 USB3 port 0
1197 07:15:04.263167 USB3 port 0
1198 07:15:04.266133 USB3 port 1
1199 07:15:04.266225 USB3 port 2
1200 07:15:04.269622 USB3 port 3
1201 07:15:04.272569 PCI: 00:14.0 child on link 0 USB0 port 0
1202 07:15:04.282475 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1203 07:15:04.285768 USB0 port 0 child on link 0 USB2 port 0
1204 07:15:04.289360 USB2 port 0
1205 07:15:04.289449 USB2 port 1
1206 07:15:04.292444 USB2 port 2
1207 07:15:04.296153 USB2 port 3
1208 07:15:04.296241 USB2 port 4
1209 07:15:04.299260 USB2 port 5
1210 07:15:04.299356 USB2 port 6
1211 07:15:04.302331 USB2 port 7
1212 07:15:04.302417 USB2 port 8
1213 07:15:04.305997 USB2 port 9
1214 07:15:04.306084 USB3 port 0
1215 07:15:04.308847 USB3 port 1
1216 07:15:04.308934 USB3 port 2
1217 07:15:04.312362 USB3 port 3
1218 07:15:04.312449 PCI: 00:14.2
1219 07:15:04.322176 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 07:15:04.332068 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1221 07:15:04.338708 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1222 07:15:04.348760 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1223 07:15:04.348860 GENERIC: 0.0
1224 07:15:04.355249 PCI: 00:15.0 child on link 0 I2C: 00:1a
1225 07:15:04.365535 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 07:15:04.365638 I2C: 00:1a
1227 07:15:04.368802 I2C: 00:31
1228 07:15:04.368896 I2C: 00:32
1229 07:15:04.371690 PCI: 00:15.1 child on link 0 I2C: 00:10
1230 07:15:04.381772 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1231 07:15:04.385249 I2C: 00:10
1232 07:15:04.385336 PCI: 00:15.2
1233 07:15:04.395389 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 07:15:04.398431 PCI: 00:15.3
1235 07:15:04.408092 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 07:15:04.408186 PCI: 00:16.0
1237 07:15:04.418148 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 07:15:04.421647 PCI: 00:19.0
1239 07:15:04.424591 PCI: 00:19.1 child on link 0 I2C: 00:15
1240 07:15:04.434688 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1241 07:15:04.438075 I2C: 00:15
1242 07:15:04.441672 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1243 07:15:04.451753 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1244 07:15:04.461472 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1245 07:15:04.467887 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1246 07:15:04.471003 GENERIC: 0.0
1247 07:15:04.471087 PCI: 01:00.0
1248 07:15:04.481004 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1249 07:15:04.491317 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1250 07:15:04.501025 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1251 07:15:04.504602 PCI: 00:1e.0
1252 07:15:04.514342 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1253 07:15:04.517836 PCI: 00:1e.2 child on link 0 SPI: 00
1254 07:15:04.527353 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 07:15:04.527457 SPI: 00
1256 07:15:04.533912 PCI: 00:1e.3 child on link 0 SPI: 00
1257 07:15:04.543984 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 07:15:04.544089 SPI: 00
1259 07:15:04.547672 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1260 07:15:04.557198 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1261 07:15:04.560796 PNP: 0c09.0
1262 07:15:04.567387 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1263 07:15:04.573882 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1264 07:15:04.580155 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1265 07:15:04.590124 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1266 07:15:04.597275 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1267 07:15:04.597372 GENERIC: 0.0
1268 07:15:04.600349 GENERIC: 1.0
1269 07:15:04.600434 PCI: 00:1f.3
1270 07:15:04.610269 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1271 07:15:04.620348 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1272 07:15:04.623587 PCI: 00:1f.5
1273 07:15:04.633438 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1274 07:15:04.636953 CPU_CLUSTER: 0 child on link 0 APIC: 00
1275 07:15:04.637042 APIC: 00
1276 07:15:04.639896 APIC: 01
1277 07:15:04.639976 APIC: 03
1278 07:15:04.640051 APIC: 06
1279 07:15:04.643287 APIC: 05
1280 07:15:04.643364 APIC: 04
1281 07:15:04.643429 APIC: 02
1282 07:15:04.646887 APIC: 07
1283 07:15:04.653302 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1284 07:15:04.659870 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1285 07:15:04.666496 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1286 07:15:04.673157 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1287 07:15:04.676777 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1288 07:15:04.679850 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1289 07:15:04.683650 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1290 07:15:04.692989 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1291 07:15:04.699508 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1292 07:15:04.706223 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1293 07:15:04.712972 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1294 07:15:04.719500 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1295 07:15:04.729088 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1296 07:15:04.735547 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1297 07:15:04.742618 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1298 07:15:04.746115 DOMAIN: 0000: Resource ranges:
1299 07:15:04.749055 * Base: 1000, Size: 800, Tag: 100
1300 07:15:04.752487 * Base: 1900, Size: e700, Tag: 100
1301 07:15:04.759101 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1302 07:15:04.765513 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1303 07:15:04.772134 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1304 07:15:04.779155 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1305 07:15:04.788979 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1306 07:15:04.795240 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1307 07:15:04.802015 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1308 07:15:04.812043 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1309 07:15:04.818544 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1310 07:15:04.825082 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1311 07:15:04.834835 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1312 07:15:04.841602 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1313 07:15:04.848475 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1314 07:15:04.858378 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1315 07:15:04.864718 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1316 07:15:04.871527 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1317 07:15:04.881648 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1318 07:15:04.888239 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1319 07:15:04.895015 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1320 07:15:04.904729 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1321 07:15:04.911234 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1322 07:15:04.918085 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1323 07:15:04.928061 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1324 07:15:04.934315 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1325 07:15:04.940754 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1326 07:15:04.944292 DOMAIN: 0000: Resource ranges:
1327 07:15:04.950976 * Base: 7fc00000, Size: 40400000, Tag: 200
1328 07:15:04.954328 * Base: d0000000, Size: 28000000, Tag: 200
1329 07:15:04.957859 * Base: fa000000, Size: 1000000, Tag: 200
1330 07:15:04.960705 * Base: fb001000, Size: 2fff000, Tag: 200
1331 07:15:04.967342 * Base: fe010000, Size: 2e000, Tag: 200
1332 07:15:04.970880 * Base: fe03f000, Size: d41000, Tag: 200
1333 07:15:04.974037 * Base: fed88000, Size: 8000, Tag: 200
1334 07:15:04.977668 * Base: fed93000, Size: d000, Tag: 200
1335 07:15:04.984041 * Base: feda2000, Size: 1e000, Tag: 200
1336 07:15:04.987702 * Base: fede0000, Size: 1220000, Tag: 200
1337 07:15:04.990746 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1338 07:15:05.000784 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1339 07:15:05.007250 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1340 07:15:05.013687 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1341 07:15:05.020498 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1342 07:15:05.027123 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1343 07:15:05.033868 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1344 07:15:05.040556 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1345 07:15:05.047222 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1346 07:15:05.053505 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1347 07:15:05.060221 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1348 07:15:05.066658 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1349 07:15:05.073653 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1350 07:15:05.080339 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1351 07:15:05.087004 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1352 07:15:05.093520 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1353 07:15:05.100056 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1354 07:15:05.106292 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1355 07:15:05.113278 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1356 07:15:05.120077 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1357 07:15:05.126126 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1358 07:15:05.132883 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1359 07:15:05.139524 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1360 07:15:05.146249 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1361 07:15:05.153204 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1362 07:15:05.156217 PCI: 00:1d.0: Resource ranges:
1363 07:15:05.162867 * Base: 7fc00000, Size: 100000, Tag: 200
1364 07:15:05.169385 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1365 07:15:05.175826 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1366 07:15:05.182451 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1367 07:15:05.188989 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1368 07:15:05.195751 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1369 07:15:05.202496 Root Device assign_resources, bus 0 link: 0
1370 07:15:05.206118 DOMAIN: 0000 assign_resources, bus 0 link: 0
1371 07:15:05.215723 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1372 07:15:05.222529 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1373 07:15:05.229087 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1374 07:15:05.238692 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1375 07:15:05.242318 PCI: 00:04.0 assign_resources, bus 1 link: 0
1376 07:15:05.248953 PCI: 00:04.0 assign_resources, bus 1 link: 0
1377 07:15:05.255483 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1378 07:15:05.265426 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1379 07:15:05.271820 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1380 07:15:05.278294 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1381 07:15:05.281843 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1382 07:15:05.288467 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1383 07:15:05.295166 PCI: 00:14.0 assign_resources, bus 0 link: 0
1384 07:15:05.298445 PCI: 00:14.0 assign_resources, bus 0 link: 0
1385 07:15:05.308612 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1386 07:15:05.315140 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1387 07:15:05.324456 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1388 07:15:05.327863 PCI: 00:14.3 assign_resources, bus 0 link: 0
1389 07:15:05.331318 PCI: 00:14.3 assign_resources, bus 0 link: 0
1390 07:15:05.341423 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1391 07:15:05.345226 PCI: 00:15.0 assign_resources, bus 0 link: 0
1392 07:15:05.351544 PCI: 00:15.0 assign_resources, bus 0 link: 0
1393 07:15:05.358294 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1394 07:15:05.364121 PCI: 00:15.1 assign_resources, bus 0 link: 0
1395 07:15:05.367732 PCI: 00:15.1 assign_resources, bus 0 link: 0
1396 07:15:05.377603 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1397 07:15:05.384051 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1398 07:15:05.393864 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1399 07:15:05.400503 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1400 07:15:05.404097 PCI: 00:19.1 assign_resources, bus 0 link: 0
1401 07:15:05.410673 PCI: 00:19.1 assign_resources, bus 0 link: 0
1402 07:15:05.417241 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1403 07:15:05.427511 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1404 07:15:05.437361 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1405 07:15:05.440453 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 07:15:05.450132 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1407 07:15:05.456971 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1408 07:15:05.467015 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1409 07:15:05.470121 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1410 07:15:05.480029 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1411 07:15:05.482970 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1412 07:15:05.486371 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1413 07:15:05.496902 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1414 07:15:05.499894 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1415 07:15:05.506609 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1416 07:15:05.510070 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1417 07:15:05.516792 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1418 07:15:05.519815 LPC: Trying to open IO window from 800 size 1ff
1419 07:15:05.529533 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1420 07:15:05.536429 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1421 07:15:05.542702 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1422 07:15:05.549497 DOMAIN: 0000 assign_resources, bus 0 link: 0
1423 07:15:05.553206 Root Device assign_resources, bus 0 link: 0
1424 07:15:05.556202 Done setting resources.
1425 07:15:05.563083 Show resources in subtree (Root Device)...After assigning values.
1426 07:15:05.566671 Root Device child on link 0 DOMAIN: 0000
1427 07:15:05.572787 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1428 07:15:05.579729 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1429 07:15:05.589875 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1430 07:15:05.592735 PCI: 00:00.0
1431 07:15:05.603125 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1432 07:15:05.612714 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1433 07:15:05.619340 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1434 07:15:05.629158 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1435 07:15:05.639263 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1436 07:15:05.649510 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1437 07:15:05.659223 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1438 07:15:05.668898 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1439 07:15:05.675547 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1440 07:15:05.685604 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1441 07:15:05.695302 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1442 07:15:05.705241 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1443 07:15:05.715311 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1444 07:15:05.722106 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1445 07:15:05.731595 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1446 07:15:05.741745 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1447 07:15:05.751663 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1448 07:15:05.761801 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1449 07:15:05.771590 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1450 07:15:05.781384 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1451 07:15:05.781476 PCI: 00:02.0
1452 07:15:05.791182 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1453 07:15:05.804639 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1454 07:15:05.811765 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1455 07:15:05.818311 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1456 07:15:05.828177 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1457 07:15:05.828265 GENERIC: 0.0
1458 07:15:05.831303 PCI: 00:05.0
1459 07:15:05.841422 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1460 07:15:05.847972 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1461 07:15:05.848060 GENERIC: 0.0
1462 07:15:05.850901 PCI: 00:08.0
1463 07:15:05.860780 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1464 07:15:05.860865 PCI: 00:0a.0
1465 07:15:05.867388 PCI: 00:0d.0 child on link 0 USB0 port 0
1466 07:15:05.877710 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1467 07:15:05.880751 USB0 port 0 child on link 0 USB3 port 0
1468 07:15:05.884585 USB3 port 0
1469 07:15:05.884665 USB3 port 1
1470 07:15:05.887548 USB3 port 2
1471 07:15:05.887626 USB3 port 3
1472 07:15:05.891084 PCI: 00:14.0 child on link 0 USB0 port 0
1473 07:15:05.904333 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1474 07:15:05.907360 USB0 port 0 child on link 0 USB2 port 0
1475 07:15:05.907452 USB2 port 0
1476 07:15:05.910703 USB2 port 1
1477 07:15:05.914301 USB2 port 2
1478 07:15:05.914375 USB2 port 3
1479 07:15:05.917125 USB2 port 4
1480 07:15:05.917209 USB2 port 5
1481 07:15:05.920870 USB2 port 6
1482 07:15:05.920947 USB2 port 7
1483 07:15:05.923796 USB2 port 8
1484 07:15:05.923868 USB2 port 9
1485 07:15:05.927395 USB3 port 0
1486 07:15:05.927470 USB3 port 1
1487 07:15:05.930419 USB3 port 2
1488 07:15:05.930525 USB3 port 3
1489 07:15:05.934082 PCI: 00:14.2
1490 07:15:05.943654 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1491 07:15:05.953779 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1492 07:15:05.960629 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1493 07:15:05.970444 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1494 07:15:05.970561 GENERIC: 0.0
1495 07:15:05.973633 PCI: 00:15.0 child on link 0 I2C: 00:1a
1496 07:15:05.986887 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1497 07:15:05.986973 I2C: 00:1a
1498 07:15:05.990473 I2C: 00:31
1499 07:15:05.990578 I2C: 00:32
1500 07:15:05.993620 PCI: 00:15.1 child on link 0 I2C: 00:10
1501 07:15:06.003375 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1502 07:15:06.007029 I2C: 00:10
1503 07:15:06.007107 PCI: 00:15.2
1504 07:15:06.019675 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1505 07:15:06.019764 PCI: 00:15.3
1506 07:15:06.030159 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1507 07:15:06.033200 PCI: 00:16.0
1508 07:15:06.043421 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1509 07:15:06.043512 PCI: 00:19.0
1510 07:15:06.049883 PCI: 00:19.1 child on link 0 I2C: 00:15
1511 07:15:06.059493 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1512 07:15:06.059616 I2C: 00:15
1513 07:15:06.066626 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1514 07:15:06.072688 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1515 07:15:06.086350 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1516 07:15:06.095948 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1517 07:15:06.099733 GENERIC: 0.0
1518 07:15:06.099814 PCI: 01:00.0
1519 07:15:06.109529 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1520 07:15:06.119667 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1521 07:15:06.132805 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1522 07:15:06.132906 PCI: 00:1e.0
1523 07:15:06.142424 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1524 07:15:06.149042 PCI: 00:1e.2 child on link 0 SPI: 00
1525 07:15:06.159360 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1526 07:15:06.159451 SPI: 00
1527 07:15:06.162217 PCI: 00:1e.3 child on link 0 SPI: 00
1528 07:15:06.172428 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1529 07:15:06.176137 SPI: 00
1530 07:15:06.178916 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1531 07:15:06.189183 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1532 07:15:06.189273 PNP: 0c09.0
1533 07:15:06.198768 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1534 07:15:06.202287 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1535 07:15:06.212101 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1536 07:15:06.222387 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1537 07:15:06.225174 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1538 07:15:06.228705 GENERIC: 0.0
1539 07:15:06.228786 GENERIC: 1.0
1540 07:15:06.232347 PCI: 00:1f.3
1541 07:15:06.242272 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1542 07:15:06.251851 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1543 07:15:06.255304 PCI: 00:1f.5
1544 07:15:06.265429 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1545 07:15:06.268260 CPU_CLUSTER: 0 child on link 0 APIC: 00
1546 07:15:06.268344 APIC: 00
1547 07:15:06.271614 APIC: 01
1548 07:15:06.271730 APIC: 03
1549 07:15:06.275145 APIC: 06
1550 07:15:06.275223 APIC: 05
1551 07:15:06.275289 APIC: 04
1552 07:15:06.278431 APIC: 02
1553 07:15:06.278542 APIC: 07
1554 07:15:06.281880 Done allocating resources.
1555 07:15:06.288615 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1556 07:15:06.295322 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1557 07:15:06.298231 Configure GPIOs for I2S audio on UP4.
1558 07:15:06.304996 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1559 07:15:06.308019 Enabling resources...
1560 07:15:06.311349 PCI: 00:00.0 subsystem <- 8086/9a12
1561 07:15:06.315112 PCI: 00:00.0 cmd <- 06
1562 07:15:06.317979 PCI: 00:02.0 subsystem <- 8086/9a40
1563 07:15:06.318055 PCI: 00:02.0 cmd <- 03
1564 07:15:06.324595 PCI: 00:04.0 subsystem <- 8086/9a03
1565 07:15:06.324678 PCI: 00:04.0 cmd <- 02
1566 07:15:06.328071 PCI: 00:05.0 subsystem <- 8086/9a19
1567 07:15:06.331707 PCI: 00:05.0 cmd <- 02
1568 07:15:06.334417 PCI: 00:08.0 subsystem <- 8086/9a11
1569 07:15:06.338005 PCI: 00:08.0 cmd <- 06
1570 07:15:06.341533 PCI: 00:0d.0 subsystem <- 8086/9a13
1571 07:15:06.344475 PCI: 00:0d.0 cmd <- 02
1572 07:15:06.348139 PCI: 00:14.0 subsystem <- 8086/a0ed
1573 07:15:06.351113 PCI: 00:14.0 cmd <- 02
1574 07:15:06.354596 PCI: 00:14.2 subsystem <- 8086/a0ef
1575 07:15:06.357616 PCI: 00:14.2 cmd <- 02
1576 07:15:06.361068 PCI: 00:14.3 subsystem <- 8086/a0f0
1577 07:15:06.364155 PCI: 00:14.3 cmd <- 02
1578 07:15:06.367814 PCI: 00:15.0 subsystem <- 8086/a0e8
1579 07:15:06.367899 PCI: 00:15.0 cmd <- 02
1580 07:15:06.374501 PCI: 00:15.1 subsystem <- 8086/a0e9
1581 07:15:06.374626 PCI: 00:15.1 cmd <- 02
1582 07:15:06.377979 PCI: 00:15.2 subsystem <- 8086/a0ea
1583 07:15:06.380867 PCI: 00:15.2 cmd <- 02
1584 07:15:06.384346 PCI: 00:15.3 subsystem <- 8086/a0eb
1585 07:15:06.387815 PCI: 00:15.3 cmd <- 02
1586 07:15:06.390851 PCI: 00:16.0 subsystem <- 8086/a0e0
1587 07:15:06.393888 PCI: 00:16.0 cmd <- 02
1588 07:15:06.397420 PCI: 00:19.1 subsystem <- 8086/a0c6
1589 07:15:06.400935 PCI: 00:19.1 cmd <- 02
1590 07:15:06.404048 PCI: 00:1d.0 bridge ctrl <- 0013
1591 07:15:06.407062 PCI: 00:1d.0 subsystem <- 8086/a0b0
1592 07:15:06.410672 PCI: 00:1d.0 cmd <- 06
1593 07:15:06.414011 PCI: 00:1e.0 subsystem <- 8086/a0a8
1594 07:15:06.417079 PCI: 00:1e.0 cmd <- 06
1595 07:15:06.420525 PCI: 00:1e.2 subsystem <- 8086/a0aa
1596 07:15:06.423701 PCI: 00:1e.2 cmd <- 06
1597 07:15:06.427160 PCI: 00:1e.3 subsystem <- 8086/a0ab
1598 07:15:06.427240 PCI: 00:1e.3 cmd <- 02
1599 07:15:06.433451 PCI: 00:1f.0 subsystem <- 8086/a087
1600 07:15:06.433543 PCI: 00:1f.0 cmd <- 407
1601 07:15:06.436990 PCI: 00:1f.3 subsystem <- 8086/a0c8
1602 07:15:06.440390 PCI: 00:1f.3 cmd <- 02
1603 07:15:06.444046 PCI: 00:1f.5 subsystem <- 8086/a0a4
1604 07:15:06.446821 PCI: 00:1f.5 cmd <- 406
1605 07:15:06.451519 PCI: 01:00.0 cmd <- 02
1606 07:15:06.456302 done.
1607 07:15:06.459362 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1608 07:15:06.462862 Initializing devices...
1609 07:15:06.465747 Root Device init
1610 07:15:06.469306 Chrome EC: Set SMI mask to 0x0000000000000000
1611 07:15:06.475705 Chrome EC: clear events_b mask to 0x0000000000000000
1612 07:15:06.482453 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1613 07:15:06.485966 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1614 07:15:06.492514 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1615 07:15:06.499075 Chrome EC: Set WAKE mask to 0x0000000000000000
1616 07:15:06.502581 fw_config match found: DB_USB=USB3_ACTIVE
1617 07:15:06.509030 Configure Right Type-C port orientation for retimer
1618 07:15:06.512067 Root Device init finished in 42 msecs
1619 07:15:06.515652 PCI: 00:00.0 init
1620 07:15:06.519047 CPU TDP = 9 Watts
1621 07:15:06.519133 CPU PL1 = 9 Watts
1622 07:15:06.521963 CPU PL2 = 40 Watts
1623 07:15:06.522040 CPU PL4 = 83 Watts
1624 07:15:06.525483 PCI: 00:00.0 init finished in 8 msecs
1625 07:15:06.529353 PCI: 00:02.0 init
1626 07:15:06.532253 GMA: Found VBT in CBFS
1627 07:15:06.535475 GMA: Found valid VBT in CBFS
1628 07:15:06.538947 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1629 07:15:06.548835 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1630 07:15:06.552178 PCI: 00:02.0 init finished in 18 msecs
1631 07:15:06.555548 PCI: 00:05.0 init
1632 07:15:06.558958 PCI: 00:05.0 init finished in 0 msecs
1633 07:15:06.559041 PCI: 00:08.0 init
1634 07:15:06.565696 PCI: 00:08.0 init finished in 0 msecs
1635 07:15:06.565869 PCI: 00:14.0 init
1636 07:15:06.572147 PCI: 00:14.0 init finished in 0 msecs
1637 07:15:06.572236 PCI: 00:14.2 init
1638 07:15:06.575142 PCI: 00:14.2 init finished in 0 msecs
1639 07:15:06.578744 PCI: 00:15.0 init
1640 07:15:06.582313 I2C bus 0 version 0x3230302a
1641 07:15:06.585868 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1642 07:15:06.589226 PCI: 00:15.0 init finished in 6 msecs
1643 07:15:06.591979 PCI: 00:15.1 init
1644 07:15:06.595458 I2C bus 1 version 0x3230302a
1645 07:15:06.598407 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1646 07:15:06.602086 PCI: 00:15.1 init finished in 6 msecs
1647 07:15:06.605225 PCI: 00:15.2 init
1648 07:15:06.608678 I2C bus 2 version 0x3230302a
1649 07:15:06.611762 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1650 07:15:06.615405 PCI: 00:15.2 init finished in 6 msecs
1651 07:15:06.618336 PCI: 00:15.3 init
1652 07:15:06.621684 I2C bus 3 version 0x3230302a
1653 07:15:06.625085 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1654 07:15:06.628275 PCI: 00:15.3 init finished in 6 msecs
1655 07:15:06.628403 PCI: 00:16.0 init
1656 07:15:06.634907 PCI: 00:16.0 init finished in 0 msecs
1657 07:15:06.635096 PCI: 00:19.1 init
1658 07:15:06.638529 I2C bus 5 version 0x3230302a
1659 07:15:06.641891 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1660 07:15:06.648226 PCI: 00:19.1 init finished in 6 msecs
1661 07:15:06.648314 PCI: 00:1d.0 init
1662 07:15:06.651616 Initializing PCH PCIe bridge.
1663 07:15:06.654986 PCI: 00:1d.0 init finished in 3 msecs
1664 07:15:06.658660 PCI: 00:1f.0 init
1665 07:15:06.661757 IOAPIC: Initializing IOAPIC at 0xfec00000
1666 07:15:06.668214 IOAPIC: Bootstrap Processor Local APIC = 0x00
1667 07:15:06.668312 IOAPIC: ID = 0x02
1668 07:15:06.671867 IOAPIC: Dumping registers
1669 07:15:06.674828 reg 0x0000: 0x02000000
1670 07:15:06.678433 reg 0x0001: 0x00770020
1671 07:15:06.678554 reg 0x0002: 0x00000000
1672 07:15:06.685068 PCI: 00:1f.0 init finished in 21 msecs
1673 07:15:06.685155 PCI: 00:1f.2 init
1674 07:15:06.688390 Disabling ACPI via APMC.
1675 07:15:06.692287 APMC done.
1676 07:15:06.695351 PCI: 00:1f.2 init finished in 5 msecs
1677 07:15:06.708061 PCI: 01:00.0 init
1678 07:15:06.711063 PCI: 01:00.0 init finished in 0 msecs
1679 07:15:06.714462 PNP: 0c09.0 init
1680 07:15:06.717717 Google Chrome EC uptime: 8.372 seconds
1681 07:15:06.724367 Google Chrome AP resets since EC boot: 1
1682 07:15:06.727152 Google Chrome most recent AP reset causes:
1683 07:15:06.730507 0.346: 32775 shutdown: entering G3
1684 07:15:06.737238 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1685 07:15:06.740621 PNP: 0c09.0 init finished in 22 msecs
1686 07:15:06.746391 Devices initialized
1687 07:15:06.749482 Show all devs... After init.
1688 07:15:06.752896 Root Device: enabled 1
1689 07:15:06.752975 DOMAIN: 0000: enabled 1
1690 07:15:06.756171 CPU_CLUSTER: 0: enabled 1
1691 07:15:06.759783 PCI: 00:00.0: enabled 1
1692 07:15:06.763192 PCI: 00:02.0: enabled 1
1693 07:15:06.763293 PCI: 00:04.0: enabled 1
1694 07:15:06.766229 PCI: 00:05.0: enabled 1
1695 07:15:06.769558 PCI: 00:06.0: enabled 0
1696 07:15:06.773205 PCI: 00:07.0: enabled 0
1697 07:15:06.773278 PCI: 00:07.1: enabled 0
1698 07:15:06.776251 PCI: 00:07.2: enabled 0
1699 07:15:06.779800 PCI: 00:07.3: enabled 0
1700 07:15:06.782614 PCI: 00:08.0: enabled 1
1701 07:15:06.782692 PCI: 00:09.0: enabled 0
1702 07:15:06.786027 PCI: 00:0a.0: enabled 0
1703 07:15:06.789551 PCI: 00:0d.0: enabled 1
1704 07:15:06.792943 PCI: 00:0d.1: enabled 0
1705 07:15:06.793021 PCI: 00:0d.2: enabled 0
1706 07:15:06.796335 PCI: 00:0d.3: enabled 0
1707 07:15:06.799438 PCI: 00:0e.0: enabled 0
1708 07:15:06.799509 PCI: 00:10.2: enabled 1
1709 07:15:06.802454 PCI: 00:10.6: enabled 0
1710 07:15:06.806194 PCI: 00:10.7: enabled 0
1711 07:15:06.809275 PCI: 00:12.0: enabled 0
1712 07:15:06.809368 PCI: 00:12.6: enabled 0
1713 07:15:06.812534 PCI: 00:13.0: enabled 0
1714 07:15:06.816454 PCI: 00:14.0: enabled 1
1715 07:15:06.819283 PCI: 00:14.1: enabled 0
1716 07:15:06.819369 PCI: 00:14.2: enabled 1
1717 07:15:06.823010 PCI: 00:14.3: enabled 1
1718 07:15:06.825825 PCI: 00:15.0: enabled 1
1719 07:15:06.829303 PCI: 00:15.1: enabled 1
1720 07:15:06.829379 PCI: 00:15.2: enabled 1
1721 07:15:06.832384 PCI: 00:15.3: enabled 1
1722 07:15:06.836397 PCI: 00:16.0: enabled 1
1723 07:15:06.836477 PCI: 00:16.1: enabled 0
1724 07:15:06.839594 PCI: 00:16.2: enabled 0
1725 07:15:06.842993 PCI: 00:16.3: enabled 0
1726 07:15:06.845691 PCI: 00:16.4: enabled 0
1727 07:15:06.845767 PCI: 00:16.5: enabled 0
1728 07:15:06.849248 PCI: 00:17.0: enabled 0
1729 07:15:06.852731 PCI: 00:19.0: enabled 0
1730 07:15:06.855595 PCI: 00:19.1: enabled 1
1731 07:15:06.855685 PCI: 00:19.2: enabled 0
1732 07:15:06.858917 PCI: 00:1c.0: enabled 1
1733 07:15:06.862413 PCI: 00:1c.1: enabled 0
1734 07:15:06.865900 PCI: 00:1c.2: enabled 0
1735 07:15:06.865981 PCI: 00:1c.3: enabled 0
1736 07:15:06.869453 PCI: 00:1c.4: enabled 0
1737 07:15:06.872281 PCI: 00:1c.5: enabled 0
1738 07:15:06.875995 PCI: 00:1c.6: enabled 1
1739 07:15:06.876069 PCI: 00:1c.7: enabled 0
1740 07:15:06.878906 PCI: 00:1d.0: enabled 1
1741 07:15:06.882135 PCI: 00:1d.1: enabled 0
1742 07:15:06.882210 PCI: 00:1d.2: enabled 1
1743 07:15:06.885737 PCI: 00:1d.3: enabled 0
1744 07:15:06.888984 PCI: 00:1e.0: enabled 1
1745 07:15:06.892460 PCI: 00:1e.1: enabled 0
1746 07:15:06.892537 PCI: 00:1e.2: enabled 1
1747 07:15:06.895780 PCI: 00:1e.3: enabled 1
1748 07:15:06.898658 PCI: 00:1f.0: enabled 1
1749 07:15:06.902526 PCI: 00:1f.1: enabled 0
1750 07:15:06.902613 PCI: 00:1f.2: enabled 1
1751 07:15:06.905372 PCI: 00:1f.3: enabled 1
1752 07:15:06.909194 PCI: 00:1f.4: enabled 0
1753 07:15:06.912176 PCI: 00:1f.5: enabled 1
1754 07:15:06.912256 PCI: 00:1f.6: enabled 0
1755 07:15:06.915551 PCI: 00:1f.7: enabled 0
1756 07:15:06.918632 APIC: 00: enabled 1
1757 07:15:06.918705 GENERIC: 0.0: enabled 1
1758 07:15:06.921974 GENERIC: 0.0: enabled 1
1759 07:15:06.925559 GENERIC: 1.0: enabled 1
1760 07:15:06.928403 GENERIC: 0.0: enabled 1
1761 07:15:06.928476 GENERIC: 1.0: enabled 1
1762 07:15:06.932076 USB0 port 0: enabled 1
1763 07:15:06.935041 GENERIC: 0.0: enabled 1
1764 07:15:06.938602 USB0 port 0: enabled 1
1765 07:15:06.938675 GENERIC: 0.0: enabled 1
1766 07:15:06.941867 I2C: 00:1a: enabled 1
1767 07:15:06.945328 I2C: 00:31: enabled 1
1768 07:15:06.945420 I2C: 00:32: enabled 1
1769 07:15:06.948514 I2C: 00:10: enabled 1
1770 07:15:06.951658 I2C: 00:15: enabled 1
1771 07:15:06.951744 GENERIC: 0.0: enabled 0
1772 07:15:06.955151 GENERIC: 1.0: enabled 0
1773 07:15:06.958486 GENERIC: 0.0: enabled 1
1774 07:15:06.958595 SPI: 00: enabled 1
1775 07:15:06.961873 SPI: 00: enabled 1
1776 07:15:06.965281 PNP: 0c09.0: enabled 1
1777 07:15:06.965370 GENERIC: 0.0: enabled 1
1778 07:15:06.968686 USB3 port 0: enabled 1
1779 07:15:06.972115 USB3 port 1: enabled 1
1780 07:15:06.974894 USB3 port 2: enabled 0
1781 07:15:06.974981 USB3 port 3: enabled 0
1782 07:15:06.978508 USB2 port 0: enabled 0
1783 07:15:06.981329 USB2 port 1: enabled 1
1784 07:15:06.981415 USB2 port 2: enabled 1
1785 07:15:06.984971 USB2 port 3: enabled 0
1786 07:15:06.988308 USB2 port 4: enabled 1
1787 07:15:06.991432 USB2 port 5: enabled 0
1788 07:15:06.991519 USB2 port 6: enabled 0
1789 07:15:06.995006 USB2 port 7: enabled 0
1790 07:15:06.997961 USB2 port 8: enabled 0
1791 07:15:06.998038 USB2 port 9: enabled 0
1792 07:15:07.001449 USB3 port 0: enabled 0
1793 07:15:07.005146 USB3 port 1: enabled 1
1794 07:15:07.007941 USB3 port 2: enabled 0
1795 07:15:07.008025 USB3 port 3: enabled 0
1796 07:15:07.011645 GENERIC: 0.0: enabled 1
1797 07:15:07.014999 GENERIC: 1.0: enabled 1
1798 07:15:07.015077 APIC: 01: enabled 1
1799 07:15:07.018175 APIC: 03: enabled 1
1800 07:15:07.021569 APIC: 06: enabled 1
1801 07:15:07.021646 APIC: 05: enabled 1
1802 07:15:07.024694 APIC: 04: enabled 1
1803 07:15:07.024777 APIC: 02: enabled 1
1804 07:15:07.028092 APIC: 07: enabled 1
1805 07:15:07.031171 PCI: 01:00.0: enabled 1
1806 07:15:07.034666 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1807 07:15:07.041040 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1808 07:15:07.044453 ELOG: NV offset 0xf30000 size 0x1000
1809 07:15:07.051953 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1810 07:15:07.058405 ELOG: Event(17) added with size 13 at 2023-03-12 07:15:07 UTC
1811 07:15:07.064788 ELOG: Event(92) added with size 9 at 2023-03-12 07:15:07 UTC
1812 07:15:07.071051 ELOG: Event(93) added with size 9 at 2023-03-12 07:15:07 UTC
1813 07:15:07.077460 ELOG: Event(9E) added with size 10 at 2023-03-12 07:15:07 UTC
1814 07:15:07.084384 ELOG: Event(9F) added with size 14 at 2023-03-12 07:15:07 UTC
1815 07:15:07.090841 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1816 07:15:07.097556 ELOG: Event(A1) added with size 10 at 2023-03-12 07:15:07 UTC
1817 07:15:07.104679 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1818 07:15:07.110952 ELOG: Event(A0) added with size 9 at 2023-03-12 07:15:07 UTC
1819 07:15:07.113787 elog_add_boot_reason: Logged dev mode boot
1820 07:15:07.120943 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1821 07:15:07.123786 Finalize devices...
1822 07:15:07.123868 Devices finalized
1823 07:15:07.130391 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 07:15:07.133888 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 07:15:07.140756 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 07:15:07.144135 ME: HFSTS1 : 0x80030055
1827 07:15:07.150397 ME: HFSTS2 : 0x30280116
1828 07:15:07.153883 ME: HFSTS3 : 0x00000050
1829 07:15:07.157213 ME: HFSTS4 : 0x00004000
1830 07:15:07.163689 ME: HFSTS5 : 0x00000000
1831 07:15:07.167030 ME: HFSTS6 : 0x00400006
1832 07:15:07.170404 ME: Manufacturing Mode : YES
1833 07:15:07.173717 ME: SPI Protection Mode Enabled : NO
1834 07:15:07.180187 ME: FW Partition Table : OK
1835 07:15:07.183546 ME: Bringup Loader Failure : NO
1836 07:15:07.187122 ME: Firmware Init Complete : NO
1837 07:15:07.190160 ME: Boot Options Present : NO
1838 07:15:07.193687 ME: Update In Progress : NO
1839 07:15:07.196596 ME: D0i3 Support : YES
1840 07:15:07.200101 ME: Low Power State Enabled : NO
1841 07:15:07.203694 ME: CPU Replaced : YES
1842 07:15:07.210078 ME: CPU Replacement Valid : YES
1843 07:15:07.213202 ME: Current Working State : 5
1844 07:15:07.216514 ME: Current Operation State : 1
1845 07:15:07.220273 ME: Current Operation Mode : 3
1846 07:15:07.223689 ME: Error Code : 0
1847 07:15:07.226771 ME: Enhanced Debug Mode : NO
1848 07:15:07.230142 ME: CPU Debug Disabled : YES
1849 07:15:07.233061 ME: TXT Support : NO
1850 07:15:07.240269 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 07:15:07.249614 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1852 07:15:07.253168 CBFS: 'fallback/slic' not found.
1853 07:15:07.256485 ACPI: Writing ACPI tables at 76b01000.
1854 07:15:07.256574 ACPI: * FACS
1855 07:15:07.260215 ACPI: * DSDT
1856 07:15:07.262819 Ramoops buffer: 0x100000@0x76a00000.
1857 07:15:07.266643 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1858 07:15:07.272743 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1859 07:15:07.276106 Google Chrome EC: version:
1860 07:15:07.279573 ro: voema_v2.0.7540-147f8d37d1
1861 07:15:07.283071 rw: voema_v2.0.7540-147f8d37d1
1862 07:15:07.283159 running image: 2
1863 07:15:07.289575 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1864 07:15:07.294336 ACPI: * FADT
1865 07:15:07.294424 SCI is IRQ9
1866 07:15:07.300744 ACPI: added table 1/32, length now 40
1867 07:15:07.300831 ACPI: * SSDT
1868 07:15:07.304084 Found 1 CPU(s) with 8 core(s) each.
1869 07:15:07.310980 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1870 07:15:07.313907 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1871 07:15:07.317406 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1872 07:15:07.320662 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1873 07:15:07.327469 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1874 07:15:07.333801 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1875 07:15:07.337341 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1876 07:15:07.343685 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1877 07:15:07.350238 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1878 07:15:07.353673 \_SB.PCI0.RP09: Added StorageD3Enable property
1879 07:15:07.360396 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1880 07:15:07.363754 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1881 07:15:07.370454 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1882 07:15:07.373785 PS2K: Passing 80 keymaps to kernel
1883 07:15:07.380238 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1884 07:15:07.386839 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1885 07:15:07.393878 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1886 07:15:07.400430 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1887 07:15:07.406891 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1888 07:15:07.413139 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1889 07:15:07.420406 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1890 07:15:07.426542 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1891 07:15:07.430230 ACPI: added table 2/32, length now 44
1892 07:15:07.430316 ACPI: * MCFG
1893 07:15:07.433371 ACPI: added table 3/32, length now 48
1894 07:15:07.436928 ACPI: * TPM2
1895 07:15:07.439767 TPM2 log created at 0x769f0000
1896 07:15:07.443453 ACPI: added table 4/32, length now 52
1897 07:15:07.443531 ACPI: * MADT
1898 07:15:07.446956 SCI is IRQ9
1899 07:15:07.449929 ACPI: added table 5/32, length now 56
1900 07:15:07.453530 current = 76b09850
1901 07:15:07.453638 ACPI: * DMAR
1902 07:15:07.456726 ACPI: added table 6/32, length now 60
1903 07:15:07.459897 ACPI: added table 7/32, length now 64
1904 07:15:07.463280 ACPI: * HPET
1905 07:15:07.466537 ACPI: added table 8/32, length now 68
1906 07:15:07.466637 ACPI: done.
1907 07:15:07.470052 ACPI tables: 35216 bytes.
1908 07:15:07.473302 smbios_write_tables: 769ef000
1909 07:15:07.476760 EC returned error result code 3
1910 07:15:07.479665 Couldn't obtain OEM name from CBI
1911 07:15:07.483201 Create SMBIOS type 16
1912 07:15:07.486615 Create SMBIOS type 17
1913 07:15:07.490093 GENERIC: 0.0 (WIFI Device)
1914 07:15:07.490178 SMBIOS tables: 1750 bytes.
1915 07:15:07.496297 Writing table forward entry at 0x00000500
1916 07:15:07.499982 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1917 07:15:07.506152 Writing coreboot table at 0x76b25000
1918 07:15:07.509677 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1919 07:15:07.516365 1. 0000000000001000-000000000009ffff: RAM
1920 07:15:07.519919 2. 00000000000a0000-00000000000fffff: RESERVED
1921 07:15:07.523125 3. 0000000000100000-00000000769eefff: RAM
1922 07:15:07.529898 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1923 07:15:07.536398 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1924 07:15:07.539502 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1925 07:15:07.546485 7. 0000000077000000-000000007fbfffff: RESERVED
1926 07:15:07.549464 8. 00000000c0000000-00000000cfffffff: RESERVED
1927 07:15:07.556242 9. 00000000f8000000-00000000f9ffffff: RESERVED
1928 07:15:07.559474 10. 00000000fb000000-00000000fb000fff: RESERVED
1929 07:15:07.566046 11. 00000000fe000000-00000000fe00ffff: RESERVED
1930 07:15:07.569682 12. 00000000fed80000-00000000fed87fff: RESERVED
1931 07:15:07.576059 13. 00000000fed90000-00000000fed92fff: RESERVED
1932 07:15:07.579511 14. 00000000feda0000-00000000feda1fff: RESERVED
1933 07:15:07.582512 15. 00000000fedc0000-00000000feddffff: RESERVED
1934 07:15:07.589605 16. 0000000100000000-00000002803fffff: RAM
1935 07:15:07.592342 Passing 4 GPIOs to payload:
1936 07:15:07.595998 NAME | PORT | POLARITY | VALUE
1937 07:15:07.602408 lid | undefined | high | high
1938 07:15:07.605903 power | undefined | high | low
1939 07:15:07.612494 oprom | undefined | high | low
1940 07:15:07.618962 EC in RW | 0x000000e5 | high | high
1941 07:15:07.622383 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f9bf
1942 07:15:07.626029 coreboot table: 1576 bytes.
1943 07:15:07.628996 IMD ROOT 0. 0x76fff000 0x00001000
1944 07:15:07.635912 IMD SMALL 1. 0x76ffe000 0x00001000
1945 07:15:07.638778 FSP MEMORY 2. 0x76c4e000 0x003b0000
1946 07:15:07.642271 VPD 3. 0x76c4d000 0x00000367
1947 07:15:07.645252 RO MCACHE 4. 0x76c4c000 0x00000fdc
1948 07:15:07.648988 CONSOLE 5. 0x76c2c000 0x00020000
1949 07:15:07.652008 FMAP 6. 0x76c2b000 0x00000578
1950 07:15:07.655638 TIME STAMP 7. 0x76c2a000 0x00000910
1951 07:15:07.658599 VBOOT WORK 8. 0x76c16000 0x00014000
1952 07:15:07.665224 ROMSTG STCK 9. 0x76c15000 0x00001000
1953 07:15:07.668923 AFTER CAR 10. 0x76c0a000 0x0000b000
1954 07:15:07.671690 RAMSTAGE 11. 0x76b97000 0x00073000
1955 07:15:07.675266 REFCODE 12. 0x76b42000 0x00055000
1956 07:15:07.678676 SMM BACKUP 13. 0x76b32000 0x00010000
1957 07:15:07.681898 4f444749 14. 0x76b30000 0x00002000
1958 07:15:07.685161 EXT VBT15. 0x76b2d000 0x0000219f
1959 07:15:07.688429 COREBOOT 16. 0x76b25000 0x00008000
1960 07:15:07.694738 ACPI 17. 0x76b01000 0x00024000
1961 07:15:07.698407 ACPI GNVS 18. 0x76b00000 0x00001000
1962 07:15:07.701888 RAMOOPS 19. 0x76a00000 0x00100000
1963 07:15:07.705221 TPM2 TCGLOG20. 0x769f0000 0x00010000
1964 07:15:07.708079 SMBIOS 21. 0x769ef000 0x00000800
1965 07:15:07.711724 IMD small region:
1966 07:15:07.715080 IMD ROOT 0. 0x76ffec00 0x00000400
1967 07:15:07.718550 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1968 07:15:07.721478 POWER STATE 2. 0x76ffeb80 0x00000044
1969 07:15:07.725004 ROMSTAGE 3. 0x76ffeb60 0x00000004
1970 07:15:07.731804 MEM INFO 4. 0x76ffe980 0x000001e0
1971 07:15:07.734782 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1972 07:15:07.738189 MTRR: Physical address space:
1973 07:15:07.744682 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1974 07:15:07.751323 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1975 07:15:07.757862 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1976 07:15:07.764485 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1977 07:15:07.771149 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1978 07:15:07.777662 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1979 07:15:07.781076 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1980 07:15:07.787830 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 07:15:07.791432 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 07:15:07.794212 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 07:15:07.797918 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 07:15:07.804357 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 07:15:07.807844 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 07:15:07.811116 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 07:15:07.814185 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 07:15:07.821475 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 07:15:07.824439 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 07:15:07.827403 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 07:15:07.831034 call enable_fixed_mtrr()
1992 07:15:07.833960 CPU physical address size: 39 bits
1993 07:15:07.840670 MTRR: default type WB/UC MTRR counts: 6/6.
1994 07:15:07.844097 MTRR: UC selected as default type.
1995 07:15:07.847571 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1996 07:15:07.854037 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1997 07:15:07.860724 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1998 07:15:07.867128 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1999 07:15:07.874147 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2000 07:15:07.880984 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2001 07:15:07.881072
2002 07:15:07.883878 MTRR check
2003 07:15:07.883957 Fixed MTRRs : Enabled
2004 07:15:07.887041 Variable MTRRs: Enabled
2005 07:15:07.887119
2006 07:15:07.894319 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 07:15:07.897260 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 07:15:07.900412 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 07:15:07.903725 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 07:15:07.907323 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 07:15:07.913403 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 07:15:07.916947 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 07:15:07.920014 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 07:15:07.923376 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 07:15:07.929976 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 07:15:07.933481 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 07:15:07.940216 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2018 07:15:07.943026 call enable_fixed_mtrr()
2019 07:15:07.946484 Checking cr50 for pending updates
2020 07:15:07.951329 CPU physical address size: 39 bits
2021 07:15:07.954337 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 07:15:07.957860 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 07:15:07.961046 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 07:15:07.964511 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 07:15:07.970967 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 07:15:07.974426 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 07:15:07.977499 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 07:15:07.981244 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 07:15:07.987640 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 07:15:07.991039 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 07:15:07.994186 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 07:15:07.997261 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 07:15:08.004842 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 07:15:08.004929 call enable_fixed_mtrr()
2035 07:15:08.011837 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 07:15:08.015063 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 07:15:08.018540 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 07:15:08.021499 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 07:15:08.028043 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 07:15:08.031637 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 07:15:08.034825 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 07:15:08.038497 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 07:15:08.044923 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 07:15:08.048654 CPU physical address size: 39 bits
2045 07:15:08.051540 call enable_fixed_mtrr()
2046 07:15:08.054936 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 07:15:08.058203 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 07:15:08.064793 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 07:15:08.068161 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 07:15:08.071221 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 07:15:08.074387 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 07:15:08.081336 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 07:15:08.084743 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 07:15:08.087771 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 07:15:08.091261 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 07:15:08.097643 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 07:15:08.100866 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 07:15:08.104499 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 07:15:08.111462 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 07:15:08.114621 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 07:15:08.117491 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 07:15:08.121003 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 07:15:08.128144 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 07:15:08.131024 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 07:15:08.134535 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 07:15:08.137603 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 07:15:08.144178 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 07:15:08.147700 call enable_fixed_mtrr()
2069 07:15:08.147783 call enable_fixed_mtrr()
2070 07:15:08.154195 MTRR: Fixed MSR 0x250 0x0606060606060606
2071 07:15:08.157619 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 07:15:08.160745 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 07:15:08.164133 MTRR: Fixed MSR 0x259 0x0000000000000000
2074 07:15:08.170770 MTRR: Fixed MSR 0x268 0x0606060606060606
2075 07:15:08.173800 MTRR: Fixed MSR 0x269 0x0606060606060606
2076 07:15:08.177298 MTRR: Fixed MSR 0x26a 0x0606060606060606
2077 07:15:08.180637 MTRR: Fixed MSR 0x26b 0x0606060606060606
2078 07:15:08.187313 MTRR: Fixed MSR 0x26c 0x0606060606060606
2079 07:15:08.190850 MTRR: Fixed MSR 0x26d 0x0606060606060606
2080 07:15:08.193765 MTRR: Fixed MSR 0x26e 0x0606060606060606
2081 07:15:08.197280 MTRR: Fixed MSR 0x26f 0x0606060606060606
2082 07:15:08.204367 MTRR: Fixed MSR 0x258 0x0606060606060606
2083 07:15:08.204459 call enable_fixed_mtrr()
2084 07:15:08.210852 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 07:15:08.214256 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 07:15:08.217662 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 07:15:08.220944 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 07:15:08.227830 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 07:15:08.230760 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 07:15:08.234003 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 07:15:08.237464 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 07:15:08.244420 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 07:15:08.247240 CPU physical address size: 39 bits
2094 07:15:08.250873 call enable_fixed_mtrr()
2095 07:15:08.253807 CPU physical address size: 39 bits
2096 07:15:08.257502 CPU physical address size: 39 bits
2097 07:15:08.260948 Reading cr50 TPM mode
2098 07:15:08.265097 CPU physical address size: 39 bits
2099 07:15:08.268056 CPU physical address size: 39 bits
2100 07:15:08.274720 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2101 07:15:08.281788 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 07:15:08.284864 Checking segment from ROM address 0xffc02b38
2103 07:15:08.291510 Checking segment from ROM address 0xffc02b54
2104 07:15:08.295017 Loading segment from ROM address 0xffc02b38
2105 07:15:08.298044 code (compression=0)
2106 07:15:08.304702 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 07:15:08.315204 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 07:15:08.318078 it's not compressed!
2109 07:15:08.456138 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 07:15:08.462303 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 07:15:08.468873 Loading segment from ROM address 0xffc02b54
2112 07:15:08.472333 Entry Point 0x30000000
2113 07:15:08.472418 Loaded segments
2114 07:15:08.478865 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2115 07:15:08.522353 Finalizing chipset.
2116 07:15:08.525239 Finalizing SMM.
2117 07:15:08.525325 APMC done.
2118 07:15:08.532119 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2119 07:15:08.534971 mp_park_aps done after 0 msecs.
2120 07:15:08.538335 Jumping to boot code at 0x30000000(0x76b25000)
2121 07:15:08.548750 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 07:15:08.548847
2123 07:15:08.548919
2124 07:15:08.551785
2125 07:15:08.551874 Starting depthcharge on Voema...
2126 07:15:08.552223 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2127 07:15:08.552329 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2128 07:15:08.552417 Setting prompt string to ['volteer:']
2129 07:15:08.552498 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2130 07:15:08.555564
2131 07:15:08.562035 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 07:15:08.562123
2133 07:15:08.568556 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 07:15:08.568649
2135 07:15:08.575067 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 07:15:08.575157
2137 07:15:08.578554 Failed to find eMMC card reader
2138 07:15:08.578642
2139 07:15:08.578710 Wipe memory regions:
2140 07:15:08.581575
2141 07:15:08.585499 [0x00000000001000, 0x000000000a0000)
2142 07:15:08.585590
2143 07:15:08.588070 [0x00000000100000, 0x00000030000000)
2144 07:15:08.613595
2145 07:15:08.616949 [0x00000032662db0, 0x000000769ef000)
2146 07:15:08.652824
2147 07:15:08.656362 [0x00000100000000, 0x00000280400000)
2148 07:15:08.856016
2149 07:15:08.859036 ec_init: CrosEC protocol v3 supported (256, 256)
2150 07:15:08.859511
2151 07:15:08.865397 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 07:15:08.865912
2153 07:15:08.874969 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 07:15:08.875081
2155 07:15:08.881674 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2156 07:15:08.881762
2157 07:15:08.885149 send_conn_disc_msg: pmc_send_cmd succeeded
2158 07:15:09.318776
2159 07:15:09.318920 R8152: Initializing
2160 07:15:09.319016
2161 07:15:09.321775 Version 6 (ocp_data = 5c30)
2162 07:15:09.321853
2163 07:15:09.325290 R8152: Done initializing
2164 07:15:09.325369
2165 07:15:09.328290 Adding net device
2166 07:15:09.630095
2167 07:15:09.633556 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 07:15:09.633642
2169 07:15:09.633728
2170 07:15:09.633807
2171 07:15:09.636671 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 07:15:09.737438 volteer: tftpboot 192.168.201.1 9567925/tftp-deploy-h7nnymxn/kernel/bzImage 9567925/tftp-deploy-h7nnymxn/kernel/cmdline 9567925/tftp-deploy-h7nnymxn/ramdisk/ramdisk.cpio.gz
2174 07:15:09.737591 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 07:15:09.737694 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2176 07:15:09.741770 tftpboot 192.168.201.1 9567925/tftp-deploy-h7nnymxn/kernel/bzImoy-h7nnymxn/kernel/cmdline 9567925/tftp-deploy-h7nnymxn/ramdisk/ramdisk.cpio.gz
2177 07:15:09.741852
2178 07:15:09.741918 Waiting for link
2179 07:15:09.947019
2180 07:15:09.947175 done.
2181 07:15:09.947246
2182 07:15:09.947309 MAC: 00:24:32:30:79:06
2183 07:15:09.947371
2184 07:15:09.950076 Sending DHCP discover... done.
2185 07:15:09.950163
2186 07:15:09.953353 Waiting for reply... done.
2187 07:15:09.953438
2188 07:15:09.956728 Sending DHCP request... done.
2189 07:15:09.956814
2190 07:15:09.960282 Waiting for reply... done.
2191 07:15:09.960367
2192 07:15:09.963382 My ip is 192.168.201.23
2193 07:15:09.963466
2194 07:15:09.966712 The DHCP server ip is 192.168.201.1
2195 07:15:09.966798
2196 07:15:09.969806 TFTP server IP predefined by user: 192.168.201.1
2197 07:15:09.969893
2198 07:15:09.976414 Bootfile predefined by user: 9567925/tftp-deploy-h7nnymxn/kernel/bzImage
2199 07:15:09.976507
2200 07:15:09.979850 Sending tftp read request... done.
2201 07:15:09.982780
2202 07:15:09.986363 Waiting for the transfer...
2203 07:15:09.986445
2204 07:15:10.507057 00000000 ################################################################
2205 07:15:10.507194
2206 07:15:11.027564 00080000 ################################################################
2207 07:15:11.027715
2208 07:15:11.545633 00100000 ################################################################
2209 07:15:11.545776
2210 07:15:12.068035 00180000 ################################################################
2211 07:15:12.068179
2212 07:15:12.588101 00200000 ################################################################
2213 07:15:12.588250
2214 07:15:13.107727 00280000 ################################################################
2215 07:15:13.107878
2216 07:15:13.619509 00300000 ################################################################
2217 07:15:13.619659
2218 07:15:14.137121 00380000 ################################################################
2219 07:15:14.137276
2220 07:15:14.703062 00400000 ################################################################
2221 07:15:14.703209
2222 07:15:15.312366 00480000 ################################################################
2223 07:15:15.312526
2224 07:15:15.883693 00500000 ################################################################
2225 07:15:15.883853
2226 07:15:16.416770 00580000 ################################################################
2227 07:15:16.416914
2228 07:15:16.947669 00600000 ################################################################
2229 07:15:16.947828
2230 07:15:17.474069 00680000 ################################################################
2231 07:15:17.474237
2232 07:15:18.000405 00700000 ################################################################
2233 07:15:18.000550
2234 07:15:18.534028 00780000 ################################################################
2235 07:15:18.534170
2236 07:15:19.060806 00800000 ################################################################
2237 07:15:19.060949
2238 07:15:19.623576 00880000 ################################################################
2239 07:15:19.623717
2240 07:15:20.018041 00900000 ################################################ done.
2241 07:15:20.018217
2242 07:15:20.021712 The bootfile was 9826304 bytes long.
2243 07:15:20.021803
2244 07:15:20.024664 Sending tftp read request... done.
2245 07:15:20.024775
2246 07:15:20.028145 Waiting for the transfer...
2247 07:15:20.028234
2248 07:15:20.538108 00000000 ################################################################
2249 07:15:20.538277
2250 07:15:21.070807 00080000 ################################################################
2251 07:15:21.070954
2252 07:15:21.578652 00100000 ################################################################
2253 07:15:21.578795
2254 07:15:22.091839 00180000 ################################################################
2255 07:15:22.091983
2256 07:15:22.605275 00200000 ################################################################
2257 07:15:22.605420
2258 07:15:23.124125 00280000 ################################################################
2259 07:15:23.124268
2260 07:15:23.633976 00300000 ################################################################
2261 07:15:23.634119
2262 07:15:24.145442 00380000 ################################################################
2263 07:15:24.145586
2264 07:15:24.652620 00400000 ################################################################
2265 07:15:24.652758
2266 07:15:25.161848 00480000 ################################################################
2267 07:15:25.162001
2268 07:15:25.683535 00500000 ################################################################
2269 07:15:25.683683
2270 07:15:26.042118 00580000 ########################################### done.
2271 07:15:26.042264
2272 07:15:26.045630 Sending tftp read request... done.
2273 07:15:26.045727
2274 07:15:26.048530 Waiting for the transfer...
2275 07:15:26.048618
2276 07:15:26.048707 00000000 # done.
2277 07:15:26.048791
2278 07:15:26.058652 Command line loaded dynamically from TFTP file: 9567925/tftp-deploy-h7nnymxn/kernel/cmdline
2279 07:15:26.058739
2280 07:15:26.081665 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9567925/extract-nfsrootfs-56e1uer4,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2281 07:15:26.086004
2282 07:15:26.088804 Shutting down all USB controllers.
2283 07:15:26.089252
2284 07:15:26.089606 Removing current net device
2285 07:15:26.089936
2286 07:15:26.092190 Finalizing coreboot
2287 07:15:26.092637
2288 07:15:26.098685 Exiting depthcharge with code 4 at timestamp: 26211561
2289 07:15:26.099188
2290 07:15:26.099579
2291 07:15:26.099944 Starting kernel ...
2292 07:15:26.100292
2293 07:15:26.100632
2294 07:15:26.101919 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2295 07:15:26.102573 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2296 07:15:26.103016 Setting prompt string to ['Linux version [0-9]']
2297 07:15:26.103421 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2298 07:15:26.103820 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2300 07:19:53.102791 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2302 07:19:53.103021 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2304 07:19:53.103200 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2307 07:19:53.103490 end: 2 depthcharge-action (duration 00:05:00) [common]
2309 07:19:53.103738 Cleaning after the job
2310 07:19:53.103828 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/ramdisk
2311 07:19:53.104316 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/kernel
2312 07:19:53.105005 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/nfsrootfs
2313 07:19:53.153004 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567925/tftp-deploy-h7nnymxn/modules
2314 07:19:53.153468 start: 4.1 power-off (timeout 00:00:30) [common]
2315 07:19:53.153635 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2316 07:19:53.227618 >> Command sent successfully.
2317 07:19:53.229776 Returned 0 in 0 seconds
2318 07:19:53.330561 end: 4.1 power-off (duration 00:00:00) [common]
2320 07:19:53.330929 start: 4.2 read-feedback (timeout 00:10:00) [common]
2321 07:19:53.331186 Listened to connection for namespace 'common' for up to 1s
2322 07:19:54.334590 Finalising connection for namespace 'common'
2323 07:19:54.334792 Disconnecting from shell: Finalise
2324 07:19:54.334889
2325 07:19:54.435793 end: 4.2 read-feedback (duration 00:00:01) [common]
2326 07:19:54.435960 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9567925
2327 07:19:54.591622 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9567925
2328 07:19:54.591834 JobError: Your job cannot terminate cleanly.