Boot log: asus-C436FA-Flip-hatch

    1 07:14:12.086045  lava-dispatcher, installed at version: 2023.01
    2 07:14:12.086227  start: 0 validate
    3 07:14:12.086341  Start time: 2023-03-12 07:14:12.086336+00:00 (UTC)
    4 07:14:12.086456  Using caching service: 'http://localhost/cache/?uri=%s'
    5 07:14:12.086586  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230303.0%2Famd64%2Finitrd.cpio.gz exists
    6 07:14:12.382356  Using caching service: 'http://localhost/cache/?uri=%s'
    7 07:14:12.383125  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-277-g507c8d80b9e20%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 07:14:12.678488  Using caching service: 'http://localhost/cache/?uri=%s'
    9 07:14:12.679208  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230303.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 07:14:16.561910  Using caching service: 'http://localhost/cache/?uri=%s'
   11 07:14:16.562646  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.273-cip92-277-g507c8d80b9e20%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 07:14:16.865277  validate duration: 4.78
   14 07:14:16.865626  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 07:14:16.865741  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 07:14:16.865833  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 07:14:16.865932  Not decompressing ramdisk as can be used compressed.
   18 07:14:16.866015  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230303.0/amd64/initrd.cpio.gz
   19 07:14:16.866083  saving as /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/ramdisk/initrd.cpio.gz
   20 07:14:16.866147  total size: 5432112 (5MB)
   21 07:14:17.587449  progress   0% (0MB)
   22 07:14:17.592413  progress   5% (0MB)
   23 07:14:17.593705  progress  10% (0MB)
   24 07:14:17.595023  progress  15% (0MB)
   25 07:14:17.596508  progress  20% (1MB)
   26 07:14:17.597795  progress  25% (1MB)
   27 07:14:17.599063  progress  30% (1MB)
   28 07:14:17.600538  progress  35% (1MB)
   29 07:14:17.601796  progress  40% (2MB)
   30 07:14:17.603052  progress  45% (2MB)
   31 07:14:17.604303  progress  50% (2MB)
   32 07:14:17.605760  progress  55% (2MB)
   33 07:14:17.607010  progress  60% (3MB)
   34 07:14:17.608257  progress  65% (3MB)
   35 07:14:17.609718  progress  70% (3MB)
   36 07:14:17.610967  progress  75% (3MB)
   37 07:14:17.612217  progress  80% (4MB)
   38 07:14:17.613521  progress  85% (4MB)
   39 07:14:17.614962  progress  90% (4MB)
   40 07:14:17.616224  progress  95% (4MB)
   41 07:14:17.617554  progress 100% (5MB)
   42 07:14:17.617753  5MB downloaded in 0.75s (6.89MB/s)
   43 07:14:17.617902  end: 1.1.1 http-download (duration 00:00:01) [common]
   45 07:14:17.618136  end: 1.1 download-retry (duration 00:00:01) [common]
   46 07:14:17.618223  start: 1.2 download-retry (timeout 00:09:59) [common]
   47 07:14:17.618307  start: 1.2.1 http-download (timeout 00:09:59) [common]
   48 07:14:17.618411  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-277-g507c8d80b9e20/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 07:14:17.618479  saving as /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/kernel/bzImage
   50 07:14:17.618539  total size: 9826304 (9MB)
   51 07:14:17.618597  No compression specified
   52 07:14:17.619469  progress   0% (0MB)
   53 07:14:17.621773  progress   5% (0MB)
   54 07:14:17.624145  progress  10% (0MB)
   55 07:14:17.626693  progress  15% (1MB)
   56 07:14:17.629117  progress  20% (1MB)
   57 07:14:17.631451  progress  25% (2MB)
   58 07:14:17.633885  progress  30% (2MB)
   59 07:14:17.636244  progress  35% (3MB)
   60 07:14:17.638631  progress  40% (3MB)
   61 07:14:17.641035  progress  45% (4MB)
   62 07:14:17.643365  progress  50% (4MB)
   63 07:14:17.645801  progress  55% (5MB)
   64 07:14:17.648136  progress  60% (5MB)
   65 07:14:17.650472  progress  65% (6MB)
   66 07:14:17.652800  progress  70% (6MB)
   67 07:14:17.655104  progress  75% (7MB)
   68 07:14:17.657448  progress  80% (7MB)
   69 07:14:17.659774  progress  85% (7MB)
   70 07:14:17.662121  progress  90% (8MB)
   71 07:14:17.664454  progress  95% (8MB)
   72 07:14:17.666775  progress 100% (9MB)
   73 07:14:17.666986  9MB downloaded in 0.05s (193.45MB/s)
   74 07:14:17.667128  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 07:14:17.667362  end: 1.2 download-retry (duration 00:00:00) [common]
   77 07:14:17.667484  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 07:14:17.667570  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 07:14:17.667678  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230303.0/amd64/full.rootfs.tar.xz
   80 07:14:17.667745  saving as /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/nfsrootfs/full.rootfs.tar
   81 07:14:17.667809  total size: 124197008 (118MB)
   82 07:14:17.667870  Using unxz to decompress xz
   83 07:14:17.671089  progress   0% (0MB)
   84 07:14:18.103166  progress   5% (5MB)
   85 07:14:18.545953  progress  10% (11MB)
   86 07:14:18.989976  progress  15% (17MB)
   87 07:14:19.440904  progress  20% (23MB)
   88 07:14:19.772112  progress  25% (29MB)
   89 07:14:20.105003  progress  30% (35MB)
   90 07:14:20.367991  progress  35% (41MB)
   91 07:14:20.518275  progress  40% (47MB)
   92 07:14:20.877828  progress  45% (53MB)
   93 07:14:21.229748  progress  50% (59MB)
   94 07:14:21.552599  progress  55% (65MB)
   95 07:14:21.892858  progress  60% (71MB)
   96 07:14:22.216609  progress  65% (77MB)
   97 07:14:22.582554  progress  70% (82MB)
   98 07:14:22.980250  progress  75% (88MB)
   99 07:14:23.383106  progress  80% (94MB)
  100 07:14:23.507378  progress  85% (100MB)
  101 07:14:23.662659  progress  90% (106MB)
  102 07:14:23.980540  progress  95% (112MB)
  103 07:14:24.346745  progress 100% (118MB)
  104 07:14:24.351748  118MB downloaded in 6.68s (17.72MB/s)
  105 07:14:24.352018  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 07:14:24.352279  end: 1.3 download-retry (duration 00:00:07) [common]
  108 07:14:24.352411  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 07:14:24.352503  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 07:14:24.352620  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.273-cip92-277-g507c8d80b9e20/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 07:14:24.352692  saving as /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/modules/modules.tar
  112 07:14:24.352754  total size: 462184 (0MB)
  113 07:14:24.352816  Using unxz to decompress xz
  114 07:14:24.355753  progress   7% (0MB)
  115 07:14:24.356103  progress  14% (0MB)
  116 07:14:24.356353  progress  21% (0MB)
  117 07:14:24.357712  progress  28% (0MB)
  118 07:14:24.359737  progress  35% (0MB)
  119 07:14:24.361843  progress  42% (0MB)
  120 07:14:24.364277  progress  49% (0MB)
  121 07:14:24.366184  progress  56% (0MB)
  122 07:14:24.367921  progress  63% (0MB)
  123 07:14:24.370034  progress  70% (0MB)
  124 07:14:24.371885  progress  77% (0MB)
  125 07:14:24.373831  progress  85% (0MB)
  126 07:14:24.375542  progress  92% (0MB)
  127 07:14:24.377545  progress  99% (0MB)
  128 07:14:24.383893  0MB downloaded in 0.03s (14.16MB/s)
  129 07:14:24.384131  end: 1.4.1 http-download (duration 00:00:00) [common]
  131 07:14:24.384465  end: 1.4 download-retry (duration 00:00:00) [common]
  132 07:14:24.384559  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  133 07:14:24.384654  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  134 07:14:26.036069  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9567901/extract-nfsrootfs-dum7ejq0
  135 07:14:26.036272  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  136 07:14:26.036506  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  137 07:14:26.036647  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj
  138 07:14:26.036751  makedir: /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin
  139 07:14:26.036837  makedir: /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/tests
  140 07:14:26.036919  makedir: /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/results
  141 07:14:26.037018  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-add-keys
  142 07:14:26.037154  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-add-sources
  143 07:14:26.037272  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-background-process-start
  144 07:14:26.037386  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-background-process-stop
  145 07:14:26.037498  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-common-functions
  146 07:14:26.037607  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-echo-ipv4
  147 07:14:26.037716  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-install-packages
  148 07:14:26.037857  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-installed-packages
  149 07:14:26.037977  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-os-build
  150 07:14:26.038084  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-probe-channel
  151 07:14:26.038190  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-probe-ip
  152 07:14:26.038296  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-target-ip
  153 07:14:26.038402  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-target-mac
  154 07:14:26.038507  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-target-storage
  155 07:14:26.038616  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-test-case
  156 07:14:26.038723  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-test-event
  157 07:14:26.038828  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-test-feedback
  158 07:14:26.038935  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-test-raise
  159 07:14:26.039043  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-test-reference
  160 07:14:26.039149  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-test-runner
  161 07:14:26.039255  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-test-set
  162 07:14:26.039361  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-test-shell
  163 07:14:26.039469  Updating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-install-packages (oe)
  164 07:14:26.039578  Updating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/bin/lava-installed-packages (oe)
  165 07:14:26.039674  Creating /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/environment
  166 07:14:26.039758  LAVA metadata
  167 07:14:26.039840  - LAVA_JOB_ID=9567901
  168 07:14:26.039970  - LAVA_DISPATCHER_IP=192.168.201.1
  169 07:14:26.040123  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  170 07:14:26.040188  skipped lava-vland-overlay
  171 07:14:26.040263  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  172 07:14:26.040378  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  173 07:14:26.040441  skipped lava-multinode-overlay
  174 07:14:26.040514  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  175 07:14:26.040594  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  176 07:14:26.040666  Loading test definitions
  177 07:14:26.040756  start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
  178 07:14:26.040825  Using /lava-9567901 at stage 0
  179 07:14:26.040918  Fetching tests from https://github.com/kernelci/test-definitions
  180 07:14:26.040995  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/0/tests/0_ltp-mm'
  181 07:14:31.244861  Running '/usr/bin/git checkout kernelci.org
  182 07:14:31.378019  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
  183 07:14:31.378745  uuid=9567901_1.5.2.3.1 testdef=None
  184 07:14:31.378899  end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
  186 07:14:31.379145  start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
  187 07:14:31.379901  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  189 07:14:31.380134  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
  190 07:14:31.381144  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  192 07:14:31.381388  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
  193 07:14:31.382327  runner path: /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/0/tests/0_ltp-mm test_uuid 9567901_1.5.2.3.1
  194 07:14:31.382420  SKIPFILE='skipfile-lkft.yaml'
  195 07:14:31.382485  SKIP_INSTALL='true'
  196 07:14:31.382545  TST_CMDFILES='mm'
  197 07:14:31.382675  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  199 07:14:31.382884  Creating lava-test-runner.conf files
  200 07:14:31.382948  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9567901/lava-overlay-krk9f1tj/lava-9567901/0 for stage 0
  201 07:14:31.383031  - 0_ltp-mm
  202 07:14:31.383130  end: 1.5.2.3 test-definition (duration 00:00:05) [common]
  203 07:14:31.383219  start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
  204 07:14:38.660774  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  205 07:14:38.660962  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
  206 07:14:38.661074  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  207 07:14:38.661177  end: 1.5.2 lava-overlay (duration 00:00:13) [common]
  208 07:14:38.661268  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
  209 07:14:38.762306  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  210 07:14:38.762666  start: 1.5.4 extract-modules (timeout 00:09:38) [common]
  211 07:14:38.762773  extracting modules file /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9567901/extract-nfsrootfs-dum7ejq0
  212 07:14:38.773338  extracting modules file /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9567901/extract-overlay-ramdisk-q30qbvcp/ramdisk
  213 07:14:38.783376  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  214 07:14:38.783491  start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
  215 07:14:38.783576  [common] Applying overlay to NFS
  216 07:14:38.783645  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9567901/compress-overlay-c_p7chx_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9567901/extract-nfsrootfs-dum7ejq0
  217 07:14:39.553292  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  218 07:14:39.553463  start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
  219 07:14:39.553557  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  220 07:14:39.553650  start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
  221 07:14:39.553733  Building ramdisk /var/lib/lava/dispatcher/tmp/9567901/extract-overlay-ramdisk-q30qbvcp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9567901/extract-overlay-ramdisk-q30qbvcp/ramdisk
  222 07:14:39.593896  >> 30003 blocks

  223 07:14:40.137147  rename /var/lib/lava/dispatcher/tmp/9567901/extract-overlay-ramdisk-q30qbvcp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/ramdisk/ramdisk.cpio.gz
  224 07:14:40.137587  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  225 07:14:40.137735  start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
  226 07:14:40.137842  start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
  227 07:14:40.137937  No mkimage arch provided, not using FIT.
  228 07:14:40.138033  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  229 07:14:40.138123  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  230 07:14:40.138222  end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
  231 07:14:40.138313  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
  232 07:14:40.138398  No LXC device requested
  233 07:14:40.138478  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  234 07:14:40.138567  start: 1.7 deploy-device-env (timeout 00:09:37) [common]
  235 07:14:40.138652  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  236 07:14:40.138723  Checking files for TFTP limit of 4294967296 bytes.
  237 07:14:40.139102  end: 1 tftp-deploy (duration 00:00:23) [common]
  238 07:14:40.139208  start: 2 depthcharge-action (timeout 00:05:00) [common]
  239 07:14:40.139301  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  240 07:14:40.139429  substitutions:
  241 07:14:40.139501  - {DTB}: None
  242 07:14:40.139596  - {INITRD}: 9567901/tftp-deploy-f6qijclf/ramdisk/ramdisk.cpio.gz
  243 07:14:40.139659  - {KERNEL}: 9567901/tftp-deploy-f6qijclf/kernel/bzImage
  244 07:14:40.139720  - {LAVA_MAC}: None
  245 07:14:40.139779  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9567901/extract-nfsrootfs-dum7ejq0
  246 07:14:40.139839  - {NFS_SERVER_IP}: 192.168.201.1
  247 07:14:40.139902  - {PRESEED_CONFIG}: None
  248 07:14:40.139965  - {PRESEED_LOCAL}: None
  249 07:14:40.140022  - {RAMDISK}: 9567901/tftp-deploy-f6qijclf/ramdisk/ramdisk.cpio.gz
  250 07:14:40.140079  - {ROOT_PART}: None
  251 07:14:40.140136  - {ROOT}: None
  252 07:14:40.140192  - {SERVER_IP}: 192.168.201.1
  253 07:14:40.140247  - {TEE}: None
  254 07:14:40.140303  Parsed boot commands:
  255 07:14:40.140369  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  256 07:14:40.140528  Parsed boot commands: tftpboot 192.168.201.1 9567901/tftp-deploy-f6qijclf/kernel/bzImage 9567901/tftp-deploy-f6qijclf/kernel/cmdline 9567901/tftp-deploy-f6qijclf/ramdisk/ramdisk.cpio.gz
  257 07:14:40.140620  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  258 07:14:40.140711  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  259 07:14:40.140810  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  260 07:14:40.140903  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  261 07:14:40.140976  Not connected, no need to disconnect.
  262 07:14:40.141055  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  263 07:14:40.141144  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  264 07:14:40.141213  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  265 07:14:40.144137  Setting prompt string to ['lava-test: # ']
  266 07:14:40.144433  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  267 07:14:40.144546  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  268 07:14:40.144644  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  269 07:14:40.144734  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  270 07:14:40.144905  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  271 07:14:45.294741  >> Command sent successfully.

  272 07:14:45.303779  Returned 0 in 5 seconds
  273 07:14:45.405364  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  275 07:14:45.406802  end: 2.2.2 reset-device (duration 00:00:05) [common]
  276 07:14:45.407304  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  277 07:14:45.407730  Setting prompt string to 'Starting depthcharge on Helios...'
  278 07:14:45.408091  Changing prompt to 'Starting depthcharge on Helios...'
  279 07:14:45.408597  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  280 07:14:45.409947  [Enter `^Ec?' for help]

  281 07:14:46.016944  

  282 07:14:46.017612  

  283 07:14:46.027325  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  284 07:14:46.030043  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  285 07:14:46.037078  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  286 07:14:46.040430  CPU: AES supported, TXT NOT supported, VT supported

  287 07:14:46.047305  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  288 07:14:46.050311  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  289 07:14:46.057310  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  290 07:14:46.060497  VBOOT: Loading verstage.

  291 07:14:46.064053  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  292 07:14:46.070614  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  293 07:14:46.073730  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  294 07:14:46.077029  CBFS @ c08000 size 3f8000

  295 07:14:46.083754  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  296 07:14:46.087252  CBFS: Locating 'fallback/verstage'

  297 07:14:46.090398  CBFS: Found @ offset 10fb80 size 1072c

  298 07:14:46.093506  

  299 07:14:46.094002  

  300 07:14:46.104231  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  301 07:14:46.118170  Probing TPM: . done!

  302 07:14:46.121014  TPM ready after 0 ms

  303 07:14:46.124768  Connected to device vid:did:rid of 1ae0:0028:00

  304 07:14:46.134512  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  305 07:14:46.138472  Initialized TPM device CR50 revision 0

  306 07:14:46.181882  tlcl_send_startup: Startup return code is 0

  307 07:14:46.182487  TPM: setup succeeded

  308 07:14:46.194359  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  309 07:14:46.198710  Chrome EC: UHEPI supported

  310 07:14:46.201862  Phase 1

  311 07:14:46.205091  FMAP: area GBB found @ c05000 (12288 bytes)

  312 07:14:46.211788  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  313 07:14:46.215152  Phase 2

  314 07:14:46.215751  Phase 3

  315 07:14:46.218285  FMAP: area GBB found @ c05000 (12288 bytes)

  316 07:14:46.224985  VB2:vb2_report_dev_firmware() This is developer signed firmware

  317 07:14:46.232519  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  318 07:14:46.235007  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  319 07:14:46.241447  VB2:vb2_verify_keyblock() Checking keyblock signature...

  320 07:14:46.257186  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  321 07:14:46.260899  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  322 07:14:46.267656  VB2:vb2_verify_fw_preamble() Verifying preamble.

  323 07:14:46.271472  Phase 4

  324 07:14:46.274661  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  325 07:14:46.281396  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  326 07:14:46.460871  VB2:vb2_rsa_verify_digest() Digest check failed!

  327 07:14:46.467836  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  328 07:14:46.468481  Saving nvdata

  329 07:14:46.470819  Reboot requested (10020007)

  330 07:14:46.474654  board_reset() called!

  331 07:14:46.475247  full_reset() called!

  332 07:14:50.983946  

  333 07:14:50.984535  

  334 07:14:50.993611  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  335 07:14:50.996893  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  336 07:14:51.003447  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  337 07:14:51.006980  CPU: AES supported, TXT NOT supported, VT supported

  338 07:14:51.013829  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  339 07:14:51.016803  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  340 07:14:51.023903  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  341 07:14:51.026856  VBOOT: Loading verstage.

  342 07:14:51.030375  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  343 07:14:51.036966  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  344 07:14:51.040092  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  345 07:14:51.043670  CBFS @ c08000 size 3f8000

  346 07:14:51.050127  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  347 07:14:51.054000  CBFS: Locating 'fallback/verstage'

  348 07:14:51.056785  CBFS: Found @ offset 10fb80 size 1072c

  349 07:14:51.060415  

  350 07:14:51.060854  

  351 07:14:51.070466  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  352 07:14:51.084522  Probing TPM: . done!

  353 07:14:51.088216  TPM ready after 0 ms

  354 07:14:51.091622  Connected to device vid:did:rid of 1ae0:0028:00

  355 07:14:51.101633  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  356 07:14:51.105492  Initialized TPM device CR50 revision 0

  357 07:14:51.148785  tlcl_send_startup: Startup return code is 0

  358 07:14:51.149305  TPM: setup succeeded

  359 07:14:51.161331  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  360 07:14:51.165057  Chrome EC: UHEPI supported

  361 07:14:51.168358  Phase 1

  362 07:14:51.171716  FMAP: area GBB found @ c05000 (12288 bytes)

  363 07:14:51.178447  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  364 07:14:51.185095  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  365 07:14:51.188433  Recovery requested (1009000e)

  366 07:14:51.194004  Saving nvdata

  367 07:14:51.200342  tlcl_extend: response is 0

  368 07:14:51.209140  tlcl_extend: response is 0

  369 07:14:51.215996  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  370 07:14:51.219318  CBFS @ c08000 size 3f8000

  371 07:14:51.225926  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  372 07:14:51.229338  CBFS: Locating 'fallback/romstage'

  373 07:14:51.232457  CBFS: Found @ offset 80 size 145fc

  374 07:14:51.235903  Accumulated console time in verstage 98 ms

  375 07:14:51.236396  

  376 07:14:51.236774  

  377 07:14:51.249145  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  378 07:14:51.255810  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  379 07:14:51.258995  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  380 07:14:51.262356  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  381 07:14:51.268731  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  382 07:14:51.272446  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  383 07:14:51.275872  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  384 07:14:51.278859  TCO_STS:   0000 0000

  385 07:14:51.282177  GEN_PMCON: e0015238 00000200

  386 07:14:51.285507  GBLRST_CAUSE: 00000000 00000000

  387 07:14:51.285958  prev_sleep_state 5

  388 07:14:51.289035  Boot Count incremented to 57165

  389 07:14:51.295795  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  390 07:14:51.298924  CBFS @ c08000 size 3f8000

  391 07:14:51.305869  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  392 07:14:51.306324  CBFS: Locating 'fspm.bin'

  393 07:14:51.309349  CBFS: Found @ offset 5ffc0 size 71000

  394 07:14:51.312912  Chrome EC: UHEPI supported

  395 07:14:51.320553  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  396 07:14:51.325682  Probing TPM:  done!

  397 07:14:51.332532  Connected to device vid:did:rid of 1ae0:0028:00

  398 07:14:51.342070  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  399 07:14:51.348013  Initialized TPM device CR50 revision 0

  400 07:14:51.357345  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  401 07:14:51.364433  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  402 07:14:51.367334  MRC cache found, size 1948

  403 07:14:51.370549  bootmode is set to: 2

  404 07:14:51.373699  PRMRR disabled by config.

  405 07:14:51.374146  SPD INDEX = 1

  406 07:14:51.380343  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  407 07:14:51.383579  CBFS @ c08000 size 3f8000

  408 07:14:51.390387  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  409 07:14:51.390834  CBFS: Locating 'spd.bin'

  410 07:14:51.394162  CBFS: Found @ offset 5fb80 size 400

  411 07:14:51.397236  SPD: module type is LPDDR3

  412 07:14:51.400364  SPD: module part is 

  413 07:14:51.407153  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  414 07:14:51.409946  SPD: device width 4 bits, bus width 8 bits

  415 07:14:51.413385  SPD: module size is 4096 MB (per channel)

  416 07:14:51.416938  memory slot: 0 configuration done.

  417 07:14:51.420193  memory slot: 2 configuration done.

  418 07:14:51.471018  CBMEM:

  419 07:14:51.474383  IMD: root @ 99fff000 254 entries.

  420 07:14:51.477730  IMD: root @ 99ffec00 62 entries.

  421 07:14:51.481148  External stage cache:

  422 07:14:51.484538  IMD: root @ 9abff000 254 entries.

  423 07:14:51.487644  IMD: root @ 9abfec00 62 entries.

  424 07:14:51.490893  Chrome EC: clear events_b mask to 0x0000000020004000

  425 07:14:51.506902  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  426 07:14:51.520174  tlcl_write: response is 0

  427 07:14:51.529528  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  428 07:14:51.535797  MRC: TPM MRC hash updated successfully.

  429 07:14:51.536254  2 DIMMs found

  430 07:14:51.539456  SMM Memory Map

  431 07:14:51.542560  SMRAM       : 0x9a000000 0x1000000

  432 07:14:51.545906   Subregion 0: 0x9a000000 0xa00000

  433 07:14:51.549099   Subregion 1: 0x9aa00000 0x200000

  434 07:14:51.552820   Subregion 2: 0x9ac00000 0x400000

  435 07:14:51.556356  top_of_ram = 0x9a000000

  436 07:14:51.559193  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  437 07:14:51.565573  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  438 07:14:51.568880  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  439 07:14:51.576104  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  440 07:14:51.578893  CBFS @ c08000 size 3f8000

  441 07:14:51.582269  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  442 07:14:51.585827  CBFS: Locating 'fallback/postcar'

  443 07:14:51.592551  CBFS: Found @ offset 107000 size 4b44

  444 07:14:51.595331  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  445 07:14:51.608017  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  446 07:14:51.611572  Processing 180 relocs. Offset value of 0x97c0c000

  447 07:14:51.619693  Accumulated console time in romstage 286 ms

  448 07:14:51.620150  

  449 07:14:51.620541  

  450 07:14:51.629955  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  451 07:14:51.636289  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  452 07:14:51.639891  CBFS @ c08000 size 3f8000

  453 07:14:51.643055  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  454 07:14:51.649921  CBFS: Locating 'fallback/ramstage'

  455 07:14:51.653285  CBFS: Found @ offset 43380 size 1b9e8

  456 07:14:51.659466  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  457 07:14:51.691796  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  458 07:14:51.695054  Processing 3976 relocs. Offset value of 0x98db0000

  459 07:14:51.701487  Accumulated console time in postcar 52 ms

  460 07:14:51.701956  

  461 07:14:51.702405  

  462 07:14:51.711523  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  463 07:14:51.718338  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  464 07:14:51.721396  WARNING: RO_VPD is uninitialized or empty.

  465 07:14:51.725257  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  466 07:14:51.731277  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  467 07:14:51.731782  Normal boot.

  468 07:14:51.738214  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  469 07:14:51.741776  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  470 07:14:51.744637  CBFS @ c08000 size 3f8000

  471 07:14:51.751410  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  472 07:14:51.754512  CBFS: Locating 'cpu_microcode_blob.bin'

  473 07:14:51.758044  CBFS: Found @ offset 14700 size 2ec00

  474 07:14:51.761150  microcode: sig=0x806ec pf=0x4 revision=0xc9

  475 07:14:51.764337  Skip microcode update

  476 07:14:51.771218  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  477 07:14:51.771675  CBFS @ c08000 size 3f8000

  478 07:14:51.777797  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  479 07:14:51.781242  CBFS: Locating 'fsps.bin'

  480 07:14:51.784423  CBFS: Found @ offset d1fc0 size 35000

  481 07:14:51.809695  Detected 4 core, 8 thread CPU.

  482 07:14:51.812877  Setting up SMI for CPU

  483 07:14:51.816448  IED base = 0x9ac00000

  484 07:14:51.816902  IED size = 0x00400000

  485 07:14:51.819865  Will perform SMM setup.

  486 07:14:51.826397  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  487 07:14:51.832880  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  488 07:14:51.835983  Processing 16 relocs. Offset value of 0x00030000

  489 07:14:51.839697  Attempting to start 7 APs

  490 07:14:51.843281  Waiting for 10ms after sending INIT.

  491 07:14:51.859357  Waiting for 1st SIPI to complete...done.

  492 07:14:51.859815  AP: slot 1 apic_id 1.

  493 07:14:51.866158  Waiting for 2nd SIPI to complete...done.

  494 07:14:51.866613  AP: slot 4 apic_id 3.

  495 07:14:51.869251  AP: slot 5 apic_id 2.

  496 07:14:51.872945  AP: slot 2 apic_id 7.

  497 07:14:51.873401  AP: slot 3 apic_id 6.

  498 07:14:51.875972  AP: slot 7 apic_id 4.

  499 07:14:51.879388  AP: slot 6 apic_id 5.

  500 07:14:51.885944  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  501 07:14:51.889050  Processing 13 relocs. Offset value of 0x00038000

  502 07:14:51.895737  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  503 07:14:51.902727  Installing SMM handler to 0x9a000000

  504 07:14:51.908997  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  505 07:14:51.915512  Processing 658 relocs. Offset value of 0x9a010000

  506 07:14:51.922375  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  507 07:14:51.925500  Processing 13 relocs. Offset value of 0x9a008000

  508 07:14:51.932122  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  509 07:14:51.939072  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  510 07:14:51.945372  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  511 07:14:51.949217  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  512 07:14:51.955565  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  513 07:14:51.962037  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  514 07:14:51.965180  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  515 07:14:51.971895  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  516 07:14:51.975223  Clearing SMI status registers

  517 07:14:51.978813  SMI_STS: PM1 

  518 07:14:51.979278  PM1_STS: PWRBTN 

  519 07:14:51.982430  TCO_STS: SECOND_TO 

  520 07:14:51.985242  New SMBASE 0x9a000000

  521 07:14:51.988887  In relocation handler: CPU 0

  522 07:14:51.992706  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  523 07:14:51.995303  Writing SMRR. base = 0x9a000006, mask=0xff000800

  524 07:14:51.999035  Relocation complete.

  525 07:14:52.001803  New SMBASE 0x99fffc00

  526 07:14:52.005721  In relocation handler: CPU 1

  527 07:14:52.008548  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  528 07:14:52.011796  Writing SMRR. base = 0x9a000006, mask=0xff000800

  529 07:14:52.015240  Relocation complete.

  530 07:14:52.018535  New SMBASE 0x99fff400

  531 07:14:52.018993  In relocation handler: CPU 3

  532 07:14:52.025322  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  533 07:14:52.028421  Writing SMRR. base = 0x9a000006, mask=0xff000800

  534 07:14:52.032074  Relocation complete.

  535 07:14:52.032554  New SMBASE 0x99fff800

  536 07:14:52.035067  In relocation handler: CPU 2

  537 07:14:52.041553  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  538 07:14:52.045052  Writing SMRR. base = 0x9a000006, mask=0xff000800

  539 07:14:52.048289  Relocation complete.

  540 07:14:52.048812  New SMBASE 0x99ffe400

  541 07:14:52.051527  In relocation handler: CPU 7

  542 07:14:52.058094  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  543 07:14:52.061558  Writing SMRR. base = 0x9a000006, mask=0xff000800

  544 07:14:52.064977  Relocation complete.

  545 07:14:52.065422  New SMBASE 0x99ffe800

  546 07:14:52.067880  In relocation handler: CPU 6

  547 07:14:52.075006  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  548 07:14:52.078102  Writing SMRR. base = 0x9a000006, mask=0xff000800

  549 07:14:52.081184  Relocation complete.

  550 07:14:52.081632  New SMBASE 0x99ffec00

  551 07:14:52.084521  In relocation handler: CPU 5

  552 07:14:52.087913  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  553 07:14:52.094647  Writing SMRR. base = 0x9a000006, mask=0xff000800

  554 07:14:52.098260  Relocation complete.

  555 07:14:52.098708  New SMBASE 0x99fff000

  556 07:14:52.101868  In relocation handler: CPU 4

  557 07:14:52.105215  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  558 07:14:52.111617  Writing SMRR. base = 0x9a000006, mask=0xff000800

  559 07:14:52.112130  Relocation complete.

  560 07:14:52.114837  Initializing CPU #0

  561 07:14:52.118539  CPU: vendor Intel device 806ec

  562 07:14:52.121398  CPU: family 06, model 8e, stepping 0c

  563 07:14:52.124740  Clearing out pending MCEs

  564 07:14:52.128095  Setting up local APIC...

  565 07:14:52.128590   apic_id: 0x00 done.

  566 07:14:52.131634  Turbo is available but hidden

  567 07:14:52.134706  Turbo is available and visible

  568 07:14:52.138057  VMX status: enabled

  569 07:14:52.141165  IA32_FEATURE_CONTROL status: locked

  570 07:14:52.144833  Skip microcode update

  571 07:14:52.145281  CPU #0 initialized

  572 07:14:52.147845  Initializing CPU #1

  573 07:14:52.151301  Initializing CPU #7

  574 07:14:52.151755  Initializing CPU #6

  575 07:14:52.154775  CPU: vendor Intel device 806ec

  576 07:14:52.158055  CPU: family 06, model 8e, stepping 0c

  577 07:14:52.161578  CPU: vendor Intel device 806ec

  578 07:14:52.164725  CPU: family 06, model 8e, stepping 0c

  579 07:14:52.168101  Clearing out pending MCEs

  580 07:14:52.171206  Clearing out pending MCEs

  581 07:14:52.174544  Setting up local APIC...

  582 07:14:52.178138  CPU: vendor Intel device 806ec

  583 07:14:52.181641  CPU: family 06, model 8e, stepping 0c

  584 07:14:52.182093  Clearing out pending MCEs

  585 07:14:52.184383  Initializing CPU #2

  586 07:14:52.187749  Initializing CPU #3

  587 07:14:52.191100  CPU: vendor Intel device 806ec

  588 07:14:52.194285  CPU: family 06, model 8e, stepping 0c

  589 07:14:52.197699  CPU: vendor Intel device 806ec

  590 07:14:52.200805  CPU: family 06, model 8e, stepping 0c

  591 07:14:52.204506  Clearing out pending MCEs

  592 07:14:52.207677  Clearing out pending MCEs

  593 07:14:52.208149  Setting up local APIC...

  594 07:14:52.211150  Initializing CPU #5

  595 07:14:52.214217  Initializing CPU #4

  596 07:14:52.214667  CPU: vendor Intel device 806ec

  597 07:14:52.220831  CPU: family 06, model 8e, stepping 0c

  598 07:14:52.224063  CPU: vendor Intel device 806ec

  599 07:14:52.227759  CPU: family 06, model 8e, stepping 0c

  600 07:14:52.228213  Clearing out pending MCEs

  601 07:14:52.231248  Clearing out pending MCEs

  602 07:14:52.234060  Setting up local APIC...

  603 07:14:52.237640   apic_id: 0x07 done.

  604 07:14:52.238095  Setting up local APIC...

  605 07:14:52.241165  Setting up local APIC...

  606 07:14:52.244074  VMX status: enabled

  607 07:14:52.244549   apic_id: 0x06 done.

  608 07:14:52.250998  IA32_FEATURE_CONTROL status: locked

  609 07:14:52.251457  VMX status: enabled

  610 07:14:52.254100  Skip microcode update

  611 07:14:52.257345  IA32_FEATURE_CONTROL status: locked

  612 07:14:52.260753  CPU #2 initialized

  613 07:14:52.261207  Skip microcode update

  614 07:14:52.263792   apic_id: 0x02 done.

  615 07:14:52.267325  Setting up local APIC...

  616 07:14:52.267732  Setting up local APIC...

  617 07:14:52.270532  CPU #3 initialized

  618 07:14:52.274164  VMX status: enabled

  619 07:14:52.274617   apic_id: 0x03 done.

  620 07:14:52.277663  IA32_FEATURE_CONTROL status: locked

  621 07:14:52.280400  VMX status: enabled

  622 07:14:52.283782  Skip microcode update

  623 07:14:52.287313  IA32_FEATURE_CONTROL status: locked

  624 07:14:52.287722  CPU #5 initialized

  625 07:14:52.290556  Skip microcode update

  626 07:14:52.294151   apic_id: 0x05 done.

  627 07:14:52.294681   apic_id: 0x04 done.

  628 07:14:52.297608  VMX status: enabled

  629 07:14:52.298061  VMX status: enabled

  630 07:14:52.303558  IA32_FEATURE_CONTROL status: locked

  631 07:14:52.307074  IA32_FEATURE_CONTROL status: locked

  632 07:14:52.307671  Skip microcode update

  633 07:14:52.310616  Skip microcode update

  634 07:14:52.313593  CPU #6 initialized

  635 07:14:52.314043  CPU #7 initialized

  636 07:14:52.316993   apic_id: 0x01 done.

  637 07:14:52.317491  CPU #4 initialized

  638 07:14:52.320750  VMX status: enabled

  639 07:14:52.323343  IA32_FEATURE_CONTROL status: locked

  640 07:14:52.327028  Skip microcode update

  641 07:14:52.327615  CPU #1 initialized

  642 07:14:52.333399  bsp_do_flight_plan done after 466 msecs.

  643 07:14:52.336598  CPU: frequency set to 4200 MHz

  644 07:14:52.337049  Enabling SMIs.

  645 07:14:52.339791  Locking SMM.

  646 07:14:52.353296  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  647 07:14:52.356990  CBFS @ c08000 size 3f8000

  648 07:14:52.363424  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  649 07:14:52.363908  CBFS: Locating 'vbt.bin'

  650 07:14:52.369705  CBFS: Found @ offset 5f5c0 size 499

  651 07:14:52.373090  Found a VBT of 4608 bytes after decompression

  652 07:14:52.554706  Display FSP Version Info HOB

  653 07:14:52.557971  Reference Code - CPU = 9.0.1e.30

  654 07:14:52.561339  uCode Version = 0.0.0.ca

  655 07:14:52.564879  TXT ACM version = ff.ff.ff.ffff

  656 07:14:52.568423  Display FSP Version Info HOB

  657 07:14:52.571505  Reference Code - ME = 9.0.1e.30

  658 07:14:52.574657  MEBx version = 0.0.0.0

  659 07:14:52.578030  ME Firmware Version = Consumer SKU

  660 07:14:52.581502  Display FSP Version Info HOB

  661 07:14:52.584363  Reference Code - CML PCH = 9.0.1e.30

  662 07:14:52.588008  PCH-CRID Status = Disabled

  663 07:14:52.591006  PCH-CRID Original Value = ff.ff.ff.ffff

  664 07:14:52.594381  PCH-CRID New Value = ff.ff.ff.ffff

  665 07:14:52.597749  OPROM - RST - RAID = ff.ff.ff.ffff

  666 07:14:52.601232  ChipsetInit Base Version = ff.ff.ff.ffff

  667 07:14:52.604575  ChipsetInit Oem Version = ff.ff.ff.ffff

  668 07:14:52.608157  Display FSP Version Info HOB

  669 07:14:52.614440  Reference Code - SA - System Agent = 9.0.1e.30

  670 07:14:52.617760  Reference Code - MRC = 0.7.1.6c

  671 07:14:52.618209  SA - PCIe Version = 9.0.1e.30

  672 07:14:52.621257  SA-CRID Status = Disabled

  673 07:14:52.624366  SA-CRID Original Value = 0.0.0.c

  674 07:14:52.627902  SA-CRID New Value = 0.0.0.c

  675 07:14:52.631230  OPROM - VBIOS = ff.ff.ff.ffff

  676 07:14:52.634266  RTC Init

  677 07:14:52.637597  Set power on after power failure.

  678 07:14:52.638166  Disabling Deep S3

  679 07:14:52.641468  Disabling Deep S3

  680 07:14:52.642026  Disabling Deep S4

  681 07:14:52.644509  Disabling Deep S4

  682 07:14:52.645043  Disabling Deep S5

  683 07:14:52.647866  Disabling Deep S5

  684 07:14:52.654501  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1

  685 07:14:52.654999  Enumerating buses...

  686 07:14:52.661083  Show all devs... Before device enumeration.

  687 07:14:52.661600  Root Device: enabled 1

  688 07:14:52.664523  CPU_CLUSTER: 0: enabled 1

  689 07:14:52.667793  DOMAIN: 0000: enabled 1

  690 07:14:52.670974  APIC: 00: enabled 1

  691 07:14:52.671443  PCI: 00:00.0: enabled 1

  692 07:14:52.674364  PCI: 00:02.0: enabled 1

  693 07:14:52.677564  PCI: 00:04.0: enabled 0

  694 07:14:52.678084  PCI: 00:05.0: enabled 0

  695 07:14:52.681001  PCI: 00:12.0: enabled 1

  696 07:14:52.684296  PCI: 00:12.5: enabled 0

  697 07:14:52.687657  PCI: 00:12.6: enabled 0

  698 07:14:52.688252  PCI: 00:14.0: enabled 1

  699 07:14:52.690685  PCI: 00:14.1: enabled 0

  700 07:14:52.694456  PCI: 00:14.3: enabled 1

  701 07:14:52.698084  PCI: 00:14.5: enabled 0

  702 07:14:52.698597  PCI: 00:15.0: enabled 1

  703 07:14:52.700719  PCI: 00:15.1: enabled 1

  704 07:14:52.704450  PCI: 00:15.2: enabled 0

  705 07:14:52.704969  PCI: 00:15.3: enabled 0

  706 07:14:52.708836  PCI: 00:16.0: enabled 1

  707 07:14:52.711439  PCI: 00:16.1: enabled 0

  708 07:14:52.714521  PCI: 00:16.2: enabled 0

  709 07:14:52.715028  PCI: 00:16.3: enabled 0

  710 07:14:52.717976  PCI: 00:16.4: enabled 0

  711 07:14:52.720882  PCI: 00:16.5: enabled 0

  712 07:14:52.724538  PCI: 00:17.0: enabled 1

  713 07:14:52.725057  PCI: 00:19.0: enabled 1

  714 07:14:52.727950  PCI: 00:19.1: enabled 0

  715 07:14:52.730884  PCI: 00:19.2: enabled 0

  716 07:14:52.734452  PCI: 00:1a.0: enabled 0

  717 07:14:52.734972  PCI: 00:1c.0: enabled 0

  718 07:14:52.737319  PCI: 00:1c.1: enabled 0

  719 07:14:52.740746  PCI: 00:1c.2: enabled 0

  720 07:14:52.741191  PCI: 00:1c.3: enabled 0

  721 07:14:52.744166  PCI: 00:1c.4: enabled 0

  722 07:14:52.747862  PCI: 00:1c.5: enabled 0

  723 07:14:52.750687  PCI: 00:1c.6: enabled 0

  724 07:14:52.751127  PCI: 00:1c.7: enabled 0

  725 07:14:52.753861  PCI: 00:1d.0: enabled 1

  726 07:14:52.757421  PCI: 00:1d.1: enabled 0

  727 07:14:52.761307  PCI: 00:1d.2: enabled 0

  728 07:14:52.761776  PCI: 00:1d.3: enabled 0

  729 07:14:52.763918  PCI: 00:1d.4: enabled 0

  730 07:14:52.767550  PCI: 00:1d.5: enabled 1

  731 07:14:52.770555  PCI: 00:1e.0: enabled 1

  732 07:14:52.771014  PCI: 00:1e.1: enabled 0

  733 07:14:52.773748  PCI: 00:1e.2: enabled 1

  734 07:14:52.777086  PCI: 00:1e.3: enabled 1

  735 07:14:52.777533  PCI: 00:1f.0: enabled 1

  736 07:14:52.780738  PCI: 00:1f.1: enabled 1

  737 07:14:52.783768  PCI: 00:1f.2: enabled 1

  738 07:14:52.787075  PCI: 00:1f.3: enabled 1

  739 07:14:52.787522  PCI: 00:1f.4: enabled 1

  740 07:14:52.790656  PCI: 00:1f.5: enabled 1

  741 07:14:52.793938  PCI: 00:1f.6: enabled 0

  742 07:14:52.797243  USB0 port 0: enabled 1

  743 07:14:52.797688  I2C: 00:15: enabled 1

  744 07:14:52.800279  I2C: 00:5d: enabled 1

  745 07:14:52.803646  GENERIC: 0.0: enabled 1

  746 07:14:52.804092  I2C: 00:1a: enabled 1

  747 07:14:52.807662  I2C: 00:38: enabled 1

  748 07:14:52.810255  I2C: 00:39: enabled 1

  749 07:14:52.810697  I2C: 00:3a: enabled 1

  750 07:14:52.814047  I2C: 00:3b: enabled 1

  751 07:14:52.817052  PCI: 00:00.0: enabled 1

  752 07:14:52.817496  SPI: 00: enabled 1

  753 07:14:52.820519  SPI: 01: enabled 1

  754 07:14:52.823776  PNP: 0c09.0: enabled 1

  755 07:14:52.824252  USB2 port 0: enabled 1

  756 07:14:52.826987  USB2 port 1: enabled 1

  757 07:14:52.830494  USB2 port 2: enabled 0

  758 07:14:52.830939  USB2 port 3: enabled 0

  759 07:14:52.833992  USB2 port 5: enabled 0

  760 07:14:52.837042  USB2 port 6: enabled 1

  761 07:14:52.840251  USB2 port 9: enabled 1

  762 07:14:52.840733  USB3 port 0: enabled 1

  763 07:14:52.843589  USB3 port 1: enabled 1

  764 07:14:52.847123  USB3 port 2: enabled 1

  765 07:14:52.847565  USB3 port 3: enabled 1

  766 07:14:52.850574  USB3 port 4: enabled 0

  767 07:14:52.853732  APIC: 01: enabled 1

  768 07:14:52.854227  APIC: 07: enabled 1

  769 07:14:52.857011  APIC: 06: enabled 1

  770 07:14:52.860347  APIC: 03: enabled 1

  771 07:14:52.860797  APIC: 02: enabled 1

  772 07:14:52.863701  APIC: 05: enabled 1

  773 07:14:52.864158  APIC: 04: enabled 1

  774 07:14:52.867004  Compare with tree...

  775 07:14:52.870247  Root Device: enabled 1

  776 07:14:52.873628   CPU_CLUSTER: 0: enabled 1

  777 07:14:52.874073    APIC: 00: enabled 1

  778 07:14:52.876959    APIC: 01: enabled 1

  779 07:14:52.880656    APIC: 07: enabled 1

  780 07:14:52.881098    APIC: 06: enabled 1

  781 07:14:52.883597    APIC: 03: enabled 1

  782 07:14:52.886732    APIC: 02: enabled 1

  783 07:14:52.887176    APIC: 05: enabled 1

  784 07:14:52.890344    APIC: 04: enabled 1

  785 07:14:52.893669   DOMAIN: 0000: enabled 1

  786 07:14:52.896854    PCI: 00:00.0: enabled 1

  787 07:14:52.897299    PCI: 00:02.0: enabled 1

  788 07:14:52.900229    PCI: 00:04.0: enabled 0

  789 07:14:52.903851    PCI: 00:05.0: enabled 0

  790 07:14:52.906725    PCI: 00:12.0: enabled 1

  791 07:14:52.907167    PCI: 00:12.5: enabled 0

  792 07:14:52.910388    PCI: 00:12.6: enabled 0

  793 07:14:52.913328    PCI: 00:14.0: enabled 1

  794 07:14:52.916866     USB0 port 0: enabled 1

  795 07:14:52.920144      USB2 port 0: enabled 1

  796 07:14:52.920609      USB2 port 1: enabled 1

  797 07:14:52.923614      USB2 port 2: enabled 0

  798 07:14:52.926659      USB2 port 3: enabled 0

  799 07:14:52.929884      USB2 port 5: enabled 0

  800 07:14:52.933587      USB2 port 6: enabled 1

  801 07:14:52.936891      USB2 port 9: enabled 1

  802 07:14:52.937338      USB3 port 0: enabled 1

  803 07:14:52.940382      USB3 port 1: enabled 1

  804 07:14:52.943195      USB3 port 2: enabled 1

  805 07:14:52.946569      USB3 port 3: enabled 1

  806 07:14:52.949867      USB3 port 4: enabled 0

  807 07:14:52.953986    PCI: 00:14.1: enabled 0

  808 07:14:52.954450    PCI: 00:14.3: enabled 1

  809 07:14:52.956742    PCI: 00:14.5: enabled 0

  810 07:14:52.960472    PCI: 00:15.0: enabled 1

  811 07:14:52.963385     I2C: 00:15: enabled 1

  812 07:14:52.963897    PCI: 00:15.1: enabled 1

  813 07:14:52.966788     I2C: 00:5d: enabled 1

  814 07:14:52.969866     GENERIC: 0.0: enabled 1

  815 07:14:52.973437    PCI: 00:15.2: enabled 0

  816 07:14:52.977015    PCI: 00:15.3: enabled 0

  817 07:14:52.977506    PCI: 00:16.0: enabled 1

  818 07:14:52.979562    PCI: 00:16.1: enabled 0

  819 07:14:52.983408    PCI: 00:16.2: enabled 0

  820 07:14:52.986685    PCI: 00:16.3: enabled 0

  821 07:14:52.989572    PCI: 00:16.4: enabled 0

  822 07:14:52.990026    PCI: 00:16.5: enabled 0

  823 07:14:52.992858    PCI: 00:17.0: enabled 1

  824 07:14:52.996464    PCI: 00:19.0: enabled 1

  825 07:14:53.000131     I2C: 00:1a: enabled 1

  826 07:14:53.000617     I2C: 00:38: enabled 1

  827 07:14:53.003216     I2C: 00:39: enabled 1

  828 07:14:53.006186     I2C: 00:3a: enabled 1

  829 07:14:53.010227     I2C: 00:3b: enabled 1

  830 07:14:53.013081    PCI: 00:19.1: enabled 0

  831 07:14:53.013536    PCI: 00:19.2: enabled 0

  832 07:14:53.016393    PCI: 00:1a.0: enabled 0

  833 07:14:53.019811    PCI: 00:1c.0: enabled 0

  834 07:14:53.023017    PCI: 00:1c.1: enabled 0

  835 07:14:53.026690    PCI: 00:1c.2: enabled 0

  836 07:14:53.027192    PCI: 00:1c.3: enabled 0

  837 07:14:53.029478    PCI: 00:1c.4: enabled 0

  838 07:14:53.032877    PCI: 00:1c.5: enabled 0

  839 07:14:53.036218    PCI: 00:1c.6: enabled 0

  840 07:14:53.039626    PCI: 00:1c.7: enabled 0

  841 07:14:53.040076    PCI: 00:1d.0: enabled 1

  842 07:14:53.042851    PCI: 00:1d.1: enabled 0

  843 07:14:53.046256    PCI: 00:1d.2: enabled 0

  844 07:14:53.049291    PCI: 00:1d.3: enabled 0

  845 07:14:53.049747    PCI: 00:1d.4: enabled 0

  846 07:14:53.052774    PCI: 00:1d.5: enabled 1

  847 07:14:53.056158     PCI: 00:00.0: enabled 1

  848 07:14:53.059269    PCI: 00:1e.0: enabled 1

  849 07:14:53.062590    PCI: 00:1e.1: enabled 0

  850 07:14:53.063045    PCI: 00:1e.2: enabled 1

  851 07:14:53.066202     SPI: 00: enabled 1

  852 07:14:53.069444    PCI: 00:1e.3: enabled 1

  853 07:14:53.072605     SPI: 01: enabled 1

  854 07:14:53.073058    PCI: 00:1f.0: enabled 1

  855 07:14:53.075753     PNP: 0c09.0: enabled 1

  856 07:14:53.079286    PCI: 00:1f.1: enabled 1

  857 07:14:53.083030    PCI: 00:1f.2: enabled 1

  858 07:14:53.086021    PCI: 00:1f.3: enabled 1

  859 07:14:53.086476    PCI: 00:1f.4: enabled 1

  860 07:14:53.089090    PCI: 00:1f.5: enabled 1

  861 07:14:53.092408    PCI: 00:1f.6: enabled 0

  862 07:14:53.096139  Root Device scanning...

  863 07:14:53.099057  scan_static_bus for Root Device

  864 07:14:53.099528  CPU_CLUSTER: 0 enabled

  865 07:14:53.102405  DOMAIN: 0000 enabled

  866 07:14:53.106157  DOMAIN: 0000 scanning...

  867 07:14:53.109584  PCI: pci_scan_bus for bus 00

  868 07:14:53.112422  PCI: 00:00.0 [8086/0000] ops

  869 07:14:53.115502  PCI: 00:00.0 [8086/9b61] enabled

  870 07:14:53.119043  PCI: 00:02.0 [8086/0000] bus ops

  871 07:14:53.122496  PCI: 00:02.0 [8086/9b41] enabled

  872 07:14:53.125764  PCI: 00:04.0 [8086/1903] disabled

  873 07:14:53.129080  PCI: 00:08.0 [8086/1911] enabled

  874 07:14:53.132711  PCI: 00:12.0 [8086/02f9] enabled

  875 07:14:53.135756  PCI: 00:14.0 [8086/0000] bus ops

  876 07:14:53.139036  PCI: 00:14.0 [8086/02ed] enabled

  877 07:14:53.142768  PCI: 00:14.2 [8086/02ef] enabled

  878 07:14:53.145819  PCI: 00:14.3 [8086/02f0] enabled

  879 07:14:53.149117  PCI: 00:15.0 [8086/0000] bus ops

  880 07:14:53.152401  PCI: 00:15.0 [8086/02e8] enabled

  881 07:14:53.155683  PCI: 00:15.1 [8086/0000] bus ops

  882 07:14:53.159257  PCI: 00:15.1 [8086/02e9] enabled

  883 07:14:53.162768  PCI: 00:16.0 [8086/0000] ops

  884 07:14:53.165514  PCI: 00:16.0 [8086/02e0] enabled

  885 07:14:53.169158  PCI: 00:17.0 [8086/0000] ops

  886 07:14:53.172129  PCI: 00:17.0 [8086/02d3] enabled

  887 07:14:53.175879  PCI: 00:19.0 [8086/0000] bus ops

  888 07:14:53.178712  PCI: 00:19.0 [8086/02c5] enabled

  889 07:14:53.182266  PCI: 00:1d.0 [8086/0000] bus ops

  890 07:14:53.185374  PCI: 00:1d.0 [8086/02b0] enabled

  891 07:14:53.188688  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  892 07:14:53.192125  PCI: 00:1e.0 [8086/0000] ops

  893 07:14:53.195620  PCI: 00:1e.0 [8086/02a8] enabled

  894 07:14:53.199008  PCI: 00:1e.2 [8086/0000] bus ops

  895 07:14:53.202207  PCI: 00:1e.2 [8086/02aa] enabled

  896 07:14:53.205656  PCI: 00:1e.3 [8086/0000] bus ops

  897 07:14:53.208819  PCI: 00:1e.3 [8086/02ab] enabled

  898 07:14:53.212300  PCI: 00:1f.0 [8086/0000] bus ops

  899 07:14:53.215290  PCI: 00:1f.0 [8086/0284] enabled

  900 07:14:53.222035  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  901 07:14:53.228637  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  902 07:14:53.232502  PCI: 00:1f.3 [8086/0000] bus ops

  903 07:14:53.235485  PCI: 00:1f.3 [8086/02c8] enabled

  904 07:14:53.238883  PCI: 00:1f.4 [8086/0000] bus ops

  905 07:14:53.242113  PCI: 00:1f.4 [8086/02a3] enabled

  906 07:14:53.245316  PCI: 00:1f.5 [8086/0000] bus ops

  907 07:14:53.248423  PCI: 00:1f.5 [8086/02a4] enabled

  908 07:14:53.248915  PCI: Leftover static devices:

  909 07:14:53.251748  PCI: 00:05.0

  910 07:14:53.252191  PCI: 00:12.5

  911 07:14:53.255130  PCI: 00:12.6

  912 07:14:53.255571  PCI: 00:14.1

  913 07:14:53.258979  PCI: 00:14.5

  914 07:14:53.259424  PCI: 00:15.2

  915 07:14:53.259810  PCI: 00:15.3

  916 07:14:53.261892  PCI: 00:16.1

  917 07:14:53.262384  PCI: 00:16.2

  918 07:14:53.265609  PCI: 00:16.3

  919 07:14:53.266107  PCI: 00:16.4

  920 07:14:53.266493  PCI: 00:16.5

  921 07:14:53.268593  PCI: 00:19.1

  922 07:14:53.269040  PCI: 00:19.2

  923 07:14:53.272102  PCI: 00:1a.0

  924 07:14:53.272591  PCI: 00:1c.0

  925 07:14:53.272951  PCI: 00:1c.1

  926 07:14:53.275584  PCI: 00:1c.2

  927 07:14:53.276026  PCI: 00:1c.3

  928 07:14:53.278692  PCI: 00:1c.4

  929 07:14:53.279133  PCI: 00:1c.5

  930 07:14:53.279487  PCI: 00:1c.6

  931 07:14:53.282052  PCI: 00:1c.7

  932 07:14:53.282501  PCI: 00:1d.1

  933 07:14:53.284980  PCI: 00:1d.2

  934 07:14:53.285424  PCI: 00:1d.3

  935 07:14:53.288570  PCI: 00:1d.4

  936 07:14:53.289018  PCI: 00:1d.5

  937 07:14:53.289368  PCI: 00:1e.1

  938 07:14:53.292040  PCI: 00:1f.1

  939 07:14:53.292520  PCI: 00:1f.2

  940 07:14:53.295162  PCI: 00:1f.6

  941 07:14:53.298528  PCI: Check your devicetree.cb.

  942 07:14:53.298977  PCI: 00:02.0 scanning...

  943 07:14:53.302105  scan_generic_bus for PCI: 00:02.0

  944 07:14:53.308560  scan_generic_bus for PCI: 00:02.0 done

  945 07:14:53.311615  scan_bus: scanning of bus PCI: 00:02.0 took 10202 usecs

  946 07:14:53.314851  PCI: 00:14.0 scanning...

  947 07:14:53.318462  scan_static_bus for PCI: 00:14.0

  948 07:14:53.322031  USB0 port 0 enabled

  949 07:14:53.322476  USB0 port 0 scanning...

  950 07:14:53.325163  scan_static_bus for USB0 port 0

  951 07:14:53.328488  USB2 port 0 enabled

  952 07:14:53.332129  USB2 port 1 enabled

  953 07:14:53.332610  USB2 port 2 disabled

  954 07:14:53.335265  USB2 port 3 disabled

  955 07:14:53.338419  USB2 port 5 disabled

  956 07:14:53.338863  USB2 port 6 enabled

  957 07:14:53.341860  USB2 port 9 enabled

  958 07:14:53.342305  USB3 port 0 enabled

  959 07:14:53.345182  USB3 port 1 enabled

  960 07:14:53.348762  USB3 port 2 enabled

  961 07:14:53.349247  USB3 port 3 enabled

  962 07:14:53.351762  USB3 port 4 disabled

  963 07:14:53.355003  USB2 port 0 scanning...

  964 07:14:53.358224  scan_static_bus for USB2 port 0

  965 07:14:53.361619  scan_static_bus for USB2 port 0 done

  966 07:14:53.368544  scan_bus: scanning of bus USB2 port 0 took 9699 usecs

  967 07:14:53.369020  USB2 port 1 scanning...

  968 07:14:53.371626  scan_static_bus for USB2 port 1

  969 07:14:53.375080  scan_static_bus for USB2 port 1 done

  970 07:14:53.381356  scan_bus: scanning of bus USB2 port 1 took 9708 usecs

  971 07:14:53.385138  USB2 port 6 scanning...

  972 07:14:53.388622  scan_static_bus for USB2 port 6

  973 07:14:53.391400  scan_static_bus for USB2 port 6 done

  974 07:14:53.398312  scan_bus: scanning of bus USB2 port 6 took 9709 usecs

  975 07:14:53.398759  USB2 port 9 scanning...

  976 07:14:53.401608  scan_static_bus for USB2 port 9

  977 07:14:53.408266  scan_static_bus for USB2 port 9 done

  978 07:14:53.411406  scan_bus: scanning of bus USB2 port 9 took 9712 usecs

  979 07:14:53.415087  USB3 port 0 scanning...

  980 07:14:53.418058  scan_static_bus for USB3 port 0

  981 07:14:53.421558  scan_static_bus for USB3 port 0 done

  982 07:14:53.427772  scan_bus: scanning of bus USB3 port 0 took 9700 usecs

  983 07:14:53.428225  USB3 port 1 scanning...

  984 07:14:53.431251  scan_static_bus for USB3 port 1

  985 07:14:53.437861  scan_static_bus for USB3 port 1 done

  986 07:14:53.441263  scan_bus: scanning of bus USB3 port 1 took 9702 usecs

  987 07:14:53.444392  USB3 port 2 scanning...

  988 07:14:53.447814  scan_static_bus for USB3 port 2

  989 07:14:53.451211  scan_static_bus for USB3 port 2 done

  990 07:14:53.458479  scan_bus: scanning of bus USB3 port 2 took 9712 usecs

  991 07:14:53.458975  USB3 port 3 scanning...

  992 07:14:53.461250  scan_static_bus for USB3 port 3

  993 07:14:53.468019  scan_static_bus for USB3 port 3 done

  994 07:14:53.472007  scan_bus: scanning of bus USB3 port 3 took 9700 usecs

  995 07:14:53.474618  scan_static_bus for USB0 port 0 done

  996 07:14:53.481255  scan_bus: scanning of bus USB0 port 0 took 155441 usecs

  997 07:14:53.484681  scan_static_bus for PCI: 00:14.0 done

  998 07:14:53.490957  scan_bus: scanning of bus PCI: 00:14.0 took 173073 usecs

  999 07:14:53.494476  PCI: 00:15.0 scanning...

 1000 07:14:53.497543  scan_generic_bus for PCI: 00:15.0

 1001 07:14:53.501059  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1002 07:14:53.504293  scan_generic_bus for PCI: 00:15.0 done

 1003 07:14:53.510702  scan_bus: scanning of bus PCI: 00:15.0 took 14302 usecs

 1004 07:14:53.514201  PCI: 00:15.1 scanning...

 1005 07:14:53.517548  scan_generic_bus for PCI: 00:15.1

 1006 07:14:53.521215  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1007 07:14:53.524337  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1008 07:14:53.527694  scan_generic_bus for PCI: 00:15.1 done

 1009 07:14:53.534219  scan_bus: scanning of bus PCI: 00:15.1 took 18588 usecs

 1010 07:14:53.537875  PCI: 00:19.0 scanning...

 1011 07:14:53.540784  scan_generic_bus for PCI: 00:19.0

 1012 07:14:53.543836  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1013 07:14:53.547327  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1014 07:14:53.554179  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1015 07:14:53.557826  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1016 07:14:53.560804  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1017 07:14:53.564015  scan_generic_bus for PCI: 00:19.0 done

 1018 07:14:53.570444  scan_bus: scanning of bus PCI: 00:19.0 took 30721 usecs

 1019 07:14:53.574107  PCI: 00:1d.0 scanning...

 1020 07:14:53.577515  do_pci_scan_bridge for PCI: 00:1d.0

 1021 07:14:53.580287  PCI: pci_scan_bus for bus 01

 1022 07:14:53.584036  PCI: 01:00.0 [1c5c/1327] enabled

 1023 07:14:53.587467  Enabling Common Clock Configuration

 1024 07:14:53.590871  L1 Sub-State supported from root port 29

 1025 07:14:53.594227  L1 Sub-State Support = 0xf

 1026 07:14:53.597526  CommonModeRestoreTime = 0x28

 1027 07:14:53.600756  Power On Value = 0x16, Power On Scale = 0x0

 1028 07:14:53.604141  ASPM: Enabled L1

 1029 07:14:53.607367  scan_bus: scanning of bus PCI: 00:1d.0 took 32794 usecs

 1030 07:14:53.610735  PCI: 00:1e.2 scanning...

 1031 07:14:53.613903  scan_generic_bus for PCI: 00:1e.2

 1032 07:14:53.617261  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1033 07:14:53.623970  scan_generic_bus for PCI: 00:1e.2 done

 1034 07:14:53.627184  scan_bus: scanning of bus PCI: 00:1e.2 took 13990 usecs

 1035 07:14:53.630545  PCI: 00:1e.3 scanning...

 1036 07:14:53.633801  scan_generic_bus for PCI: 00:1e.3

 1037 07:14:53.637701  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1038 07:14:53.640603  scan_generic_bus for PCI: 00:1e.3 done

 1039 07:14:53.647156  scan_bus: scanning of bus PCI: 00:1e.3 took 13998 usecs

 1040 07:14:53.650665  PCI: 00:1f.0 scanning...

 1041 07:14:53.653745  scan_static_bus for PCI: 00:1f.0

 1042 07:14:53.657190  PNP: 0c09.0 enabled

 1043 07:14:53.660385  scan_static_bus for PCI: 00:1f.0 done

 1044 07:14:53.663595  scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs

 1045 07:14:53.667334  PCI: 00:1f.3 scanning...

 1046 07:14:53.673757  scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs

 1047 07:14:53.676858  PCI: 00:1f.4 scanning...

 1048 07:14:53.680421  scan_generic_bus for PCI: 00:1f.4

 1049 07:14:53.683913  scan_generic_bus for PCI: 00:1f.4 done

 1050 07:14:53.690472  scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs

 1051 07:14:53.691049  PCI: 00:1f.5 scanning...

 1052 07:14:53.693652  scan_generic_bus for PCI: 00:1f.5

 1053 07:14:53.700270  scan_generic_bus for PCI: 00:1f.5 done

 1054 07:14:53.703558  scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs

 1055 07:14:53.710084  scan_bus: scanning of bus DOMAIN: 0000 took 605117 usecs

 1056 07:14:53.713315  scan_static_bus for Root Device done

 1057 07:14:53.720807  scan_bus: scanning of bus Root Device took 624993 usecs

 1058 07:14:53.721295  done

 1059 07:14:53.723360  Chrome EC: UHEPI supported

 1060 07:14:53.730033  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1061 07:14:53.736729  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1062 07:14:53.740021  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1063 07:14:53.748150  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1064 07:14:53.751305  SPI flash protection: WPSW=0 SRP0=0

 1065 07:14:53.757855  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1066 07:14:53.761502  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1067 07:14:53.764828  found VGA at PCI: 00:02.0

 1068 07:14:53.767790  Setting up VGA for PCI: 00:02.0

 1069 07:14:53.774401  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1070 07:14:53.778035  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1071 07:14:53.781295  Allocating resources...

 1072 07:14:53.784423  Reading resources...

 1073 07:14:53.787934  Root Device read_resources bus 0 link: 0

 1074 07:14:53.791064  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1075 07:14:53.797946  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1076 07:14:53.800993  DOMAIN: 0000 read_resources bus 0 link: 0

 1077 07:14:53.808071  PCI: 00:14.0 read_resources bus 0 link: 0

 1078 07:14:53.811509  USB0 port 0 read_resources bus 0 link: 0

 1079 07:14:53.819890  USB0 port 0 read_resources bus 0 link: 0 done

 1080 07:14:53.823184  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1081 07:14:53.830282  PCI: 00:15.0 read_resources bus 1 link: 0

 1082 07:14:53.833531  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1083 07:14:53.840356  PCI: 00:15.1 read_resources bus 2 link: 0

 1084 07:14:53.843271  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1085 07:14:53.851236  PCI: 00:19.0 read_resources bus 3 link: 0

 1086 07:14:53.857747  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1087 07:14:53.860817  PCI: 00:1d.0 read_resources bus 1 link: 0

 1088 07:14:53.867564  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1089 07:14:53.870980  PCI: 00:1e.2 read_resources bus 4 link: 0

 1090 07:14:53.877611  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1091 07:14:53.880984  PCI: 00:1e.3 read_resources bus 5 link: 0

 1092 07:14:53.887628  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1093 07:14:53.890983  PCI: 00:1f.0 read_resources bus 0 link: 0

 1094 07:14:53.897547  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1095 07:14:53.904490  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1096 07:14:53.907382  Root Device read_resources bus 0 link: 0 done

 1097 07:14:53.910728  Done reading resources.

 1098 07:14:53.914198  Show resources in subtree (Root Device)...After reading.

 1099 07:14:53.920688   Root Device child on link 0 CPU_CLUSTER: 0

 1100 07:14:53.923971    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1101 07:14:53.924508     APIC: 00

 1102 07:14:53.927681     APIC: 01

 1103 07:14:53.928126     APIC: 07

 1104 07:14:53.930840     APIC: 06

 1105 07:14:53.931284     APIC: 03

 1106 07:14:53.931639     APIC: 02

 1107 07:14:53.934026     APIC: 05

 1108 07:14:53.934521     APIC: 04

 1109 07:14:53.937552    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1110 07:14:53.947465    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1111 07:14:54.003566    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1112 07:14:54.004122     PCI: 00:00.0

 1113 07:14:54.005009     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1114 07:14:54.005393     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1115 07:14:54.005730     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1116 07:14:54.006431     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1117 07:14:54.053316     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1118 07:14:54.054197     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1119 07:14:54.054960     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1120 07:14:54.055353     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1121 07:14:54.056013     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1122 07:14:54.056408     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1123 07:14:54.103393     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1124 07:14:54.103836     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1125 07:14:54.104497     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1126 07:14:54.105190     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1127 07:14:54.105876     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1128 07:14:54.125608     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1129 07:14:54.126168     PCI: 00:02.0

 1130 07:14:54.126962     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1131 07:14:54.132391     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1132 07:14:54.139100     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1133 07:14:54.142368     PCI: 00:04.0

 1134 07:14:54.142824     PCI: 00:08.0

 1135 07:14:54.152426     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1136 07:14:54.155684     PCI: 00:12.0

 1137 07:14:54.165367     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1138 07:14:54.168617     PCI: 00:14.0 child on link 0 USB0 port 0

 1139 07:14:54.179124     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1140 07:14:54.181939      USB0 port 0 child on link 0 USB2 port 0

 1141 07:14:54.185172       USB2 port 0

 1142 07:14:54.185673       USB2 port 1

 1143 07:14:54.189084       USB2 port 2

 1144 07:14:54.192405       USB2 port 3

 1145 07:14:54.192902       USB2 port 5

 1146 07:14:54.195183       USB2 port 6

 1147 07:14:54.195660       USB2 port 9

 1148 07:14:54.198586       USB3 port 0

 1149 07:14:54.199088       USB3 port 1

 1150 07:14:54.202393       USB3 port 2

 1151 07:14:54.202894       USB3 port 3

 1152 07:14:54.205232       USB3 port 4

 1153 07:14:54.205743     PCI: 00:14.2

 1154 07:14:54.215461     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1155 07:14:54.225123     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1156 07:14:54.228688     PCI: 00:14.3

 1157 07:14:54.238475     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1158 07:14:54.241756     PCI: 00:15.0 child on link 0 I2C: 01:15

 1159 07:14:54.251571     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1160 07:14:54.255273      I2C: 01:15

 1161 07:14:54.258251     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1162 07:14:54.268232     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1163 07:14:54.268838      I2C: 02:5d

 1164 07:14:54.272152      GENERIC: 0.0

 1165 07:14:54.272801     PCI: 00:16.0

 1166 07:14:54.281692     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1167 07:14:54.285005     PCI: 00:17.0

 1168 07:14:54.295127     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1169 07:14:54.301469     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1170 07:14:54.311214     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1171 07:14:54.318054     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1172 07:14:54.327989     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1173 07:14:54.337489     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1174 07:14:54.340999     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1175 07:14:54.351377     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1176 07:14:54.351861      I2C: 03:1a

 1177 07:14:54.354329      I2C: 03:38

 1178 07:14:54.354762      I2C: 03:39

 1179 07:14:54.357420      I2C: 03:3a

 1180 07:14:54.357856      I2C: 03:3b

 1181 07:14:54.361249     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1182 07:14:54.370888     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1183 07:14:54.381115     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1184 07:14:54.390809     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1185 07:14:54.391312      PCI: 01:00.0

 1186 07:14:54.400576      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1187 07:14:54.404060     PCI: 00:1e.0

 1188 07:14:54.414254     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1189 07:14:54.424155     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1190 07:14:54.427579     PCI: 00:1e.2 child on link 0 SPI: 00

 1191 07:14:54.437144     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 07:14:54.440372      SPI: 00

 1193 07:14:54.443970     PCI: 00:1e.3 child on link 0 SPI: 01

 1194 07:14:54.454065     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1195 07:14:54.454565      SPI: 01

 1196 07:14:54.460624     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1197 07:14:54.467787     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1198 07:14:54.477172     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1199 07:14:54.477695      PNP: 0c09.0

 1200 07:14:54.486916      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1201 07:14:54.490672     PCI: 00:1f.3

 1202 07:14:54.500055     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1203 07:14:54.509974     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1204 07:14:54.510479     PCI: 00:1f.4

 1205 07:14:54.520414     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1206 07:14:54.530009     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1207 07:14:54.530511     PCI: 00:1f.5

 1208 07:14:54.539907     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1209 07:14:54.546878  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1210 07:14:54.553307  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1211 07:14:54.560114  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1212 07:14:54.563217  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1213 07:14:54.566456  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1214 07:14:54.570554  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1215 07:14:54.573200  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1216 07:14:54.579766  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1217 07:14:54.586477  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1218 07:14:54.596534  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1219 07:14:54.603109  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1220 07:14:54.609672  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1221 07:14:54.612887  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1222 07:14:54.623372  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1223 07:14:54.626229  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1224 07:14:54.632856  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1225 07:14:54.636274  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1226 07:14:54.643443  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1227 07:14:54.646326  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1228 07:14:54.653011  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1229 07:14:54.656432  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1230 07:14:54.662675  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1231 07:14:54.665914  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1232 07:14:54.672620  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1233 07:14:54.676188  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1234 07:14:54.679452  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1235 07:14:54.685920  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1236 07:14:54.688961  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1237 07:14:54.695611  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1238 07:14:54.699191  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1239 07:14:54.705705  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1240 07:14:54.708924  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1241 07:14:54.715487  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1242 07:14:54.718842  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1243 07:14:54.725524  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1244 07:14:54.728943  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1245 07:14:54.735439  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1246 07:14:54.741953  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1247 07:14:54.745544  avoid_fixed_resources: DOMAIN: 0000

 1248 07:14:54.752236  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1249 07:14:54.758611  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1250 07:14:54.765252  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1251 07:14:54.775124  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1252 07:14:54.781756  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1253 07:14:54.788440  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1254 07:14:54.794987  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1255 07:14:54.805050  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1256 07:14:54.811702  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1257 07:14:54.818163  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1258 07:14:54.828500  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1259 07:14:54.834581  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1260 07:14:54.835079  Setting resources...

 1261 07:14:54.841423  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1262 07:14:54.844859  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1263 07:14:54.851646  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1264 07:14:54.855094  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1265 07:14:54.858137  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1266 07:14:54.865016  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1267 07:14:54.871563  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1268 07:14:54.878159  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1269 07:14:54.885027  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1270 07:14:54.891503  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1271 07:14:54.895035  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1272 07:14:54.901442  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1273 07:14:54.904749  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1274 07:14:54.908197  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1275 07:14:54.914542  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1276 07:14:54.918018  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1277 07:14:54.925083  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1278 07:14:54.927887  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1279 07:14:54.934465  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1280 07:14:54.937987  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1281 07:14:54.944365  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1282 07:14:54.947850  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1283 07:14:54.954411  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1284 07:14:54.957670  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1285 07:14:54.964561  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1286 07:14:54.967503  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1287 07:14:54.974440  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1288 07:14:54.977119  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1289 07:14:54.980846  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1290 07:14:54.987721  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1291 07:14:54.990541  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1292 07:14:54.997419  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1293 07:14:55.004045  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1294 07:14:55.010647  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1295 07:14:55.020804  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1296 07:14:55.027290  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1297 07:14:55.030478  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1298 07:14:55.040473  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1299 07:14:55.043948  Root Device assign_resources, bus 0 link: 0

 1300 07:14:55.046866  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1301 07:14:55.056986  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1302 07:14:55.063424  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1303 07:14:55.073585  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1304 07:14:55.080391  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1305 07:14:55.090471  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1306 07:14:55.096822  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1307 07:14:55.103187  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1308 07:14:55.106788  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1309 07:14:55.116659  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1310 07:14:55.123256  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1311 07:14:55.129687  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1312 07:14:55.139779  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1313 07:14:55.143342  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1314 07:14:55.150217  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1315 07:14:55.156491  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1316 07:14:55.163622  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1317 07:14:55.166354  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1318 07:14:55.176375  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1319 07:14:55.182989  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1320 07:14:55.190165  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1321 07:14:55.199437  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1322 07:14:55.206559  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1323 07:14:55.213150  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1324 07:14:55.222760  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1325 07:14:55.229136  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1326 07:14:55.232381  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1327 07:14:55.239693  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1328 07:14:55.246032  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1329 07:14:55.255984  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1330 07:14:55.265675  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1331 07:14:55.269612  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1332 07:14:55.279140  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1333 07:14:55.282510  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1334 07:14:55.292329  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1335 07:14:55.298947  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1336 07:14:55.302036  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1337 07:14:55.308846  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1338 07:14:55.315750  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1339 07:14:55.321842  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1340 07:14:55.325093  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1341 07:14:55.331827  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1342 07:14:55.334805  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1343 07:14:55.341745  LPC: Trying to open IO window from 800 size 1ff

 1344 07:14:55.348147  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1345 07:14:55.358331  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1346 07:14:55.364815  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1347 07:14:55.374663  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1348 07:14:55.378244  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1349 07:14:55.381310  Root Device assign_resources, bus 0 link: 0

 1350 07:14:55.384625  Done setting resources.

 1351 07:14:55.391446  Show resources in subtree (Root Device)...After assigning values.

 1352 07:14:55.394371   Root Device child on link 0 CPU_CLUSTER: 0

 1353 07:14:55.401313    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1354 07:14:55.401775     APIC: 00

 1355 07:14:55.402153     APIC: 01

 1356 07:14:55.405044     APIC: 07

 1357 07:14:55.405478     APIC: 06

 1358 07:14:55.407654     APIC: 03

 1359 07:14:55.408135     APIC: 02

 1360 07:14:55.408575     APIC: 05

 1361 07:14:55.411831     APIC: 04

 1362 07:14:55.414358    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1363 07:14:55.424078    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1364 07:14:55.435040    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1365 07:14:55.437413     PCI: 00:00.0

 1366 07:14:55.447793     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1367 07:14:55.457391     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1368 07:14:55.463939     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1369 07:14:55.473877     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1370 07:14:55.483712     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1371 07:14:55.493632     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1372 07:14:55.503436     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1373 07:14:55.513453     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1374 07:14:55.519998     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1375 07:14:55.530325     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1376 07:14:55.540072     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1377 07:14:55.550460     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1378 07:14:55.559521     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1379 07:14:55.569852     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1380 07:14:55.579589     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1381 07:14:55.586163     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1382 07:14:55.589736     PCI: 00:02.0

 1383 07:14:55.599260     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1384 07:14:55.609209     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1385 07:14:55.619319     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1386 07:14:55.622725     PCI: 00:04.0

 1387 07:14:55.623219     PCI: 00:08.0

 1388 07:14:55.632928     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1389 07:14:55.635891     PCI: 00:12.0

 1390 07:14:55.645757     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1391 07:14:55.648878     PCI: 00:14.0 child on link 0 USB0 port 0

 1392 07:14:55.658833     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1393 07:14:55.665530      USB0 port 0 child on link 0 USB2 port 0

 1394 07:14:55.665987       USB2 port 0

 1395 07:14:55.668938       USB2 port 1

 1396 07:14:55.669439       USB2 port 2

 1397 07:14:55.672205       USB2 port 3

 1398 07:14:55.672758       USB2 port 5

 1399 07:14:55.675245       USB2 port 6

 1400 07:14:55.675752       USB2 port 9

 1401 07:14:55.678570       USB3 port 0

 1402 07:14:55.679029       USB3 port 1

 1403 07:14:55.682182       USB3 port 2

 1404 07:14:55.682697       USB3 port 3

 1405 07:14:55.685052       USB3 port 4

 1406 07:14:55.685504     PCI: 00:14.2

 1407 07:14:55.698256     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1408 07:14:55.708070     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1409 07:14:55.708695     PCI: 00:14.3

 1410 07:14:55.718359     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1411 07:14:55.724676     PCI: 00:15.0 child on link 0 I2C: 01:15

 1412 07:14:55.734966     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1413 07:14:55.735473      I2C: 01:15

 1414 07:14:55.737967     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1415 07:14:55.751423     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1416 07:14:55.751925      I2C: 02:5d

 1417 07:14:55.754614      GENERIC: 0.0

 1418 07:14:55.755067     PCI: 00:16.0

 1419 07:14:55.764405     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1420 07:14:55.767801     PCI: 00:17.0

 1421 07:14:55.777639     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1422 07:14:55.788069     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1423 07:14:55.797594     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1424 07:14:55.804206     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1425 07:14:55.814604     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1426 07:14:55.824342     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1427 07:14:55.830504     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1428 07:14:55.840276     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1429 07:14:55.840841      I2C: 03:1a

 1430 07:14:55.843481      I2C: 03:38

 1431 07:14:55.843974      I2C: 03:39

 1432 07:14:55.846941      I2C: 03:3a

 1433 07:14:55.847430      I2C: 03:3b

 1434 07:14:55.850224     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1435 07:14:55.860227     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1436 07:14:55.870289     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1437 07:14:55.879945     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1438 07:14:55.883408      PCI: 01:00.0

 1439 07:14:55.893460      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1440 07:14:55.896481     PCI: 00:1e.0

 1441 07:14:55.906430     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1442 07:14:55.916431     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1443 07:14:55.919524     PCI: 00:1e.2 child on link 0 SPI: 00

 1444 07:14:55.929616     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1445 07:14:55.933100      SPI: 00

 1446 07:14:55.936375     PCI: 00:1e.3 child on link 0 SPI: 01

 1447 07:14:55.946095     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1448 07:14:55.946596      SPI: 01

 1449 07:14:55.952863     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1450 07:14:55.959391     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1451 07:14:55.969138     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1452 07:14:55.972709      PNP: 0c09.0

 1453 07:14:55.979437      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1454 07:14:55.983320     PCI: 00:1f.3

 1455 07:14:55.992285     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1456 07:14:56.002422     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1457 07:14:56.005971     PCI: 00:1f.4

 1458 07:14:56.012513     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1459 07:14:56.022405     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1460 07:14:56.025589     PCI: 00:1f.5

 1461 07:14:56.035642     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1462 07:14:56.038889  Done allocating resources.

 1463 07:14:56.041870  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1464 07:14:56.045790  Enabling resources...

 1465 07:14:56.052200  PCI: 00:00.0 subsystem <- 8086/9b61

 1466 07:14:56.052704  PCI: 00:00.0 cmd <- 06

 1467 07:14:56.055911  PCI: 00:02.0 subsystem <- 8086/9b41

 1468 07:14:56.058962  PCI: 00:02.0 cmd <- 03

 1469 07:14:56.062388  PCI: 00:08.0 cmd <- 06

 1470 07:14:56.065402  PCI: 00:12.0 subsystem <- 8086/02f9

 1471 07:14:56.068739  PCI: 00:12.0 cmd <- 02

 1472 07:14:56.072056  PCI: 00:14.0 subsystem <- 8086/02ed

 1473 07:14:56.075403  PCI: 00:14.0 cmd <- 02

 1474 07:14:56.079024  PCI: 00:14.2 cmd <- 02

 1475 07:14:56.082467  PCI: 00:14.3 subsystem <- 8086/02f0

 1476 07:14:56.083046  PCI: 00:14.3 cmd <- 02

 1477 07:14:56.088785  PCI: 00:15.0 subsystem <- 8086/02e8

 1478 07:14:56.089247  PCI: 00:15.0 cmd <- 02

 1479 07:14:56.092015  PCI: 00:15.1 subsystem <- 8086/02e9

 1480 07:14:56.095235  PCI: 00:15.1 cmd <- 02

 1481 07:14:56.099394  PCI: 00:16.0 subsystem <- 8086/02e0

 1482 07:14:56.101791  PCI: 00:16.0 cmd <- 02

 1483 07:14:56.105073  PCI: 00:17.0 subsystem <- 8086/02d3

 1484 07:14:56.108827  PCI: 00:17.0 cmd <- 03

 1485 07:14:56.111679  PCI: 00:19.0 subsystem <- 8086/02c5

 1486 07:14:56.115112  PCI: 00:19.0 cmd <- 02

 1487 07:14:56.118812  PCI: 00:1d.0 bridge ctrl <- 0013

 1488 07:14:56.121707  PCI: 00:1d.0 subsystem <- 8086/02b0

 1489 07:14:56.124837  PCI: 00:1d.0 cmd <- 06

 1490 07:14:56.128358  PCI: 00:1e.0 subsystem <- 8086/02a8

 1491 07:14:56.131378  PCI: 00:1e.0 cmd <- 06

 1492 07:14:56.134607  PCI: 00:1e.2 subsystem <- 8086/02aa

 1493 07:14:56.138418  PCI: 00:1e.2 cmd <- 06

 1494 07:14:56.141485  PCI: 00:1e.3 subsystem <- 8086/02ab

 1495 07:14:56.141966  PCI: 00:1e.3 cmd <- 02

 1496 07:14:56.148171  PCI: 00:1f.0 subsystem <- 8086/0284

 1497 07:14:56.148633  PCI: 00:1f.0 cmd <- 407

 1498 07:14:56.154848  PCI: 00:1f.3 subsystem <- 8086/02c8

 1499 07:14:56.155299  PCI: 00:1f.3 cmd <- 02

 1500 07:14:56.158241  PCI: 00:1f.4 subsystem <- 8086/02a3

 1501 07:14:56.161636  PCI: 00:1f.4 cmd <- 03

 1502 07:14:56.164929  PCI: 00:1f.5 subsystem <- 8086/02a4

 1503 07:14:56.168060  PCI: 00:1f.5 cmd <- 406

 1504 07:14:56.177191  PCI: 01:00.0 cmd <- 02

 1505 07:14:56.182582  done.

 1506 07:14:56.193123  ME: Version: 14.0.39.1367

 1507 07:14:56.199810  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10

 1508 07:14:56.203153  Initializing devices...

 1509 07:14:56.203647  Root Device init ...

 1510 07:14:56.209772  Chrome EC: Set SMI mask to 0x0000000000000000

 1511 07:14:56.213078  Chrome EC: clear events_b mask to 0x0000000000000000

 1512 07:14:56.219998  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1513 07:14:56.226531  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1514 07:14:56.233061  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1515 07:14:56.236065  Chrome EC: Set WAKE mask to 0x0000000000000000

 1516 07:14:56.239894  Root Device init finished in 35151 usecs

 1517 07:14:56.243070  CPU_CLUSTER: 0 init ...

 1518 07:14:56.250268  CPU_CLUSTER: 0 init finished in 2448 usecs

 1519 07:14:56.254321  PCI: 00:00.0 init ...

 1520 07:14:56.257273  CPU TDP: 15 Watts

 1521 07:14:56.260371  CPU PL2 = 64 Watts

 1522 07:14:56.263866  PCI: 00:00.0 init finished in 7078 usecs

 1523 07:14:56.267327  PCI: 00:02.0 init ...

 1524 07:14:56.270355  PCI: 00:02.0 init finished in 2244 usecs

 1525 07:14:56.273502  PCI: 00:08.0 init ...

 1526 07:14:56.276824  PCI: 00:08.0 init finished in 2251 usecs

 1527 07:14:56.280445  PCI: 00:12.0 init ...

 1528 07:14:56.284123  PCI: 00:12.0 init finished in 2250 usecs

 1529 07:14:56.287543  PCI: 00:14.0 init ...

 1530 07:14:56.290565  PCI: 00:14.0 init finished in 2252 usecs

 1531 07:14:56.293352  PCI: 00:14.2 init ...

 1532 07:14:56.296657  PCI: 00:14.2 init finished in 2242 usecs

 1533 07:14:56.300210  PCI: 00:14.3 init ...

 1534 07:14:56.303551  PCI: 00:14.3 init finished in 2267 usecs

 1535 07:14:56.307508  PCI: 00:15.0 init ...

 1536 07:14:56.310273  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1537 07:14:56.313446  PCI: 00:15.0 init finished in 5976 usecs

 1538 07:14:56.317089  PCI: 00:15.1 init ...

 1539 07:14:56.320591  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1540 07:14:56.326736  PCI: 00:15.1 init finished in 5976 usecs

 1541 07:14:56.327192  PCI: 00:16.0 init ...

 1542 07:14:56.332894  PCI: 00:16.0 init finished in 2252 usecs

 1543 07:14:56.336970  PCI: 00:19.0 init ...

 1544 07:14:56.339943  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1545 07:14:56.343349  PCI: 00:19.0 init finished in 5976 usecs

 1546 07:14:56.346273  PCI: 00:1d.0 init ...

 1547 07:14:56.349556  Initializing PCH PCIe bridge.

 1548 07:14:56.352883  PCI: 00:1d.0 init finished in 5284 usecs

 1549 07:14:56.355988  PCI: 00:1f.0 init ...

 1550 07:14:56.359406  IOAPIC: Initializing IOAPIC at 0xfec00000

 1551 07:14:56.366027  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1552 07:14:56.366524  IOAPIC: ID = 0x02

 1553 07:14:56.369599  IOAPIC: Dumping registers

 1554 07:14:56.373020    reg 0x0000: 0x02000000

 1555 07:14:56.375945    reg 0x0001: 0x00770020

 1556 07:14:56.376423    reg 0x0002: 0x00000000

 1557 07:14:56.382844  PCI: 00:1f.0 init finished in 23527 usecs

 1558 07:14:56.386323  PCI: 00:1f.4 init ...

 1559 07:14:56.389462  PCI: 00:1f.4 init finished in 2261 usecs

 1560 07:14:56.400012  PCI: 01:00.0 init ...

 1561 07:14:56.403453  PCI: 01:00.0 init finished in 2251 usecs

 1562 07:14:56.407401  PNP: 0c09.0 init ...

 1563 07:14:56.410694  Google Chrome EC uptime: 11.107 seconds

 1564 07:14:56.417292  Google Chrome AP resets since EC boot: 0

 1565 07:14:56.420653  Google Chrome most recent AP reset causes:

 1566 07:14:56.427080  Google Chrome EC reset flags at last EC boot: reset-pin

 1567 07:14:56.430343  PNP: 0c09.0 init finished in 20607 usecs

 1568 07:14:56.433992  Devices initialized

 1569 07:14:56.437246  Show all devs... After init.

 1570 07:14:56.437762  Root Device: enabled 1

 1571 07:14:56.440954  CPU_CLUSTER: 0: enabled 1

 1572 07:14:56.443890  DOMAIN: 0000: enabled 1

 1573 07:14:56.444370  APIC: 00: enabled 1

 1574 07:14:56.447163  PCI: 00:00.0: enabled 1

 1575 07:14:56.450909  PCI: 00:02.0: enabled 1

 1576 07:14:56.453681  PCI: 00:04.0: enabled 0

 1577 07:14:56.454178  PCI: 00:05.0: enabled 0

 1578 07:14:56.456763  PCI: 00:12.0: enabled 1

 1579 07:14:56.460293  PCI: 00:12.5: enabled 0

 1580 07:14:56.463713  PCI: 00:12.6: enabled 0

 1581 07:14:56.464226  PCI: 00:14.0: enabled 1

 1582 07:14:56.466914  PCI: 00:14.1: enabled 0

 1583 07:14:56.470341  PCI: 00:14.3: enabled 1

 1584 07:14:56.470845  PCI: 00:14.5: enabled 0

 1585 07:14:56.473819  PCI: 00:15.0: enabled 1

 1586 07:14:56.476884  PCI: 00:15.1: enabled 1

 1587 07:14:56.479863  PCI: 00:15.2: enabled 0

 1588 07:14:56.479952  PCI: 00:15.3: enabled 0

 1589 07:14:56.483318  PCI: 00:16.0: enabled 1

 1590 07:14:56.486263  PCI: 00:16.1: enabled 0

 1591 07:14:56.489417  PCI: 00:16.2: enabled 0

 1592 07:14:56.489503  PCI: 00:16.3: enabled 0

 1593 07:14:56.492739  PCI: 00:16.4: enabled 0

 1594 07:14:56.496099  PCI: 00:16.5: enabled 0

 1595 07:14:56.499817  PCI: 00:17.0: enabled 1

 1596 07:14:56.499903  PCI: 00:19.0: enabled 1

 1597 07:14:56.503091  PCI: 00:19.1: enabled 0

 1598 07:14:56.506149  PCI: 00:19.2: enabled 0

 1599 07:14:56.509301  PCI: 00:1a.0: enabled 0

 1600 07:14:56.509388  PCI: 00:1c.0: enabled 0

 1601 07:14:56.512732  PCI: 00:1c.1: enabled 0

 1602 07:14:56.516488  PCI: 00:1c.2: enabled 0

 1603 07:14:56.516574  PCI: 00:1c.3: enabled 0

 1604 07:14:56.519334  PCI: 00:1c.4: enabled 0

 1605 07:14:56.522922  PCI: 00:1c.5: enabled 0

 1606 07:14:56.526006  PCI: 00:1c.6: enabled 0

 1607 07:14:56.526092  PCI: 00:1c.7: enabled 0

 1608 07:14:56.529455  PCI: 00:1d.0: enabled 1

 1609 07:14:56.532782  PCI: 00:1d.1: enabled 0

 1610 07:14:56.535980  PCI: 00:1d.2: enabled 0

 1611 07:14:56.536066  PCI: 00:1d.3: enabled 0

 1612 07:14:56.539192  PCI: 00:1d.4: enabled 0

 1613 07:14:56.542610  PCI: 00:1d.5: enabled 0

 1614 07:14:56.545637  PCI: 00:1e.0: enabled 1

 1615 07:14:56.545723  PCI: 00:1e.1: enabled 0

 1616 07:14:56.549041  PCI: 00:1e.2: enabled 1

 1617 07:14:56.552270  PCI: 00:1e.3: enabled 1

 1618 07:14:56.555515  PCI: 00:1f.0: enabled 1

 1619 07:14:56.555601  PCI: 00:1f.1: enabled 0

 1620 07:14:56.558936  PCI: 00:1f.2: enabled 0

 1621 07:14:56.562583  PCI: 00:1f.3: enabled 1

 1622 07:14:56.562669  PCI: 00:1f.4: enabled 1

 1623 07:14:56.565460  PCI: 00:1f.5: enabled 1

 1624 07:14:56.568842  PCI: 00:1f.6: enabled 0

 1625 07:14:56.572535  USB0 port 0: enabled 1

 1626 07:14:56.572637  I2C: 01:15: enabled 1

 1627 07:14:56.575396  I2C: 02:5d: enabled 1

 1628 07:14:56.579141  GENERIC: 0.0: enabled 1

 1629 07:14:56.579227  I2C: 03:1a: enabled 1

 1630 07:14:56.582407  I2C: 03:38: enabled 1

 1631 07:14:56.585403  I2C: 03:39: enabled 1

 1632 07:14:56.585489  I2C: 03:3a: enabled 1

 1633 07:14:56.588581  I2C: 03:3b: enabled 1

 1634 07:14:56.591923  PCI: 00:00.0: enabled 1

 1635 07:14:56.592009  SPI: 00: enabled 1

 1636 07:14:56.595243  SPI: 01: enabled 1

 1637 07:14:56.599108  PNP: 0c09.0: enabled 1

 1638 07:14:56.599195  USB2 port 0: enabled 1

 1639 07:14:56.602319  USB2 port 1: enabled 1

 1640 07:14:56.605622  USB2 port 2: enabled 0

 1641 07:14:56.608506  USB2 port 3: enabled 0

 1642 07:14:56.608606  USB2 port 5: enabled 0

 1643 07:14:56.611961  USB2 port 6: enabled 1

 1644 07:14:56.615392  USB2 port 9: enabled 1

 1645 07:14:56.615478  USB3 port 0: enabled 1

 1646 07:14:56.618639  USB3 port 1: enabled 1

 1647 07:14:56.621827  USB3 port 2: enabled 1

 1648 07:14:56.621913  USB3 port 3: enabled 1

 1649 07:14:56.625493  USB3 port 4: enabled 0

 1650 07:14:56.628813  APIC: 01: enabled 1

 1651 07:14:56.628899  APIC: 07: enabled 1

 1652 07:14:56.632227  APIC: 06: enabled 1

 1653 07:14:56.635233  APIC: 03: enabled 1

 1654 07:14:56.635319  APIC: 02: enabled 1

 1655 07:14:56.638722  APIC: 05: enabled 1

 1656 07:14:56.641522  APIC: 04: enabled 1

 1657 07:14:56.641608  PCI: 00:08.0: enabled 1

 1658 07:14:56.645050  PCI: 00:14.2: enabled 1

 1659 07:14:56.648216  PCI: 01:00.0: enabled 1

 1660 07:14:56.651830  Disabling ACPI via APMC:

 1661 07:14:56.655205  done.

 1662 07:14:56.658428  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1663 07:14:56.661928  ELOG: NV offset 0xaf0000 size 0x4000

 1664 07:14:56.668651  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1665 07:14:56.675514  ELOG: Event(17) added with size 13 at 2023-03-12 07:14:56 UTC

 1666 07:14:56.682230  ELOG: Event(92) added with size 9 at 2023-03-12 07:14:56 UTC

 1667 07:14:56.688642  ELOG: Event(93) added with size 9 at 2023-03-12 07:14:56 UTC

 1668 07:14:56.695134  ELOG: Event(9A) added with size 9 at 2023-03-12 07:14:56 UTC

 1669 07:14:56.701653  ELOG: Event(9E) added with size 10 at 2023-03-12 07:14:56 UTC

 1670 07:14:56.708425  ELOG: Event(9F) added with size 14 at 2023-03-12 07:14:56 UTC

 1671 07:14:56.711505  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1672 07:14:56.719123  ELOG: Event(A1) added with size 10 at 2023-03-12 07:14:56 UTC

 1673 07:14:56.729277  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1674 07:14:56.735714  ELOG: Event(A0) added with size 9 at 2023-03-12 07:14:56 UTC

 1675 07:14:56.738810  elog_add_boot_reason: Logged dev mode boot

 1676 07:14:56.738897  Finalize devices...

 1677 07:14:56.741955  PCI: 00:17.0 final

 1678 07:14:56.745447  Devices finalized

 1679 07:14:56.748651  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1680 07:14:56.755691  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1681 07:14:56.758712  ME: HFSTS1                  : 0x90000245

 1682 07:14:56.761927  ME: HFSTS2                  : 0x3B850126

 1683 07:14:56.768554  ME: HFSTS3                  : 0x00000020

 1684 07:14:56.771762  ME: HFSTS4                  : 0x00004800

 1685 07:14:56.775731  ME: HFSTS5                  : 0x00000000

 1686 07:14:56.778689  ME: HFSTS6                  : 0x40400006

 1687 07:14:56.781642  ME: Manufacturing Mode      : NO

 1688 07:14:56.784921  ME: FW Partition Table      : OK

 1689 07:14:56.788717  ME: Bringup Loader Failure  : NO

 1690 07:14:56.791527  ME: Firmware Init Complete  : YES

 1691 07:14:56.795231  ME: Boot Options Present    : NO

 1692 07:14:56.798220  ME: Update In Progress      : NO

 1693 07:14:56.801851  ME: D0i3 Support            : YES

 1694 07:14:56.804606  ME: Low Power State Enabled : NO

 1695 07:14:56.808207  ME: CPU Replaced            : NO

 1696 07:14:56.811653  ME: CPU Replacement Valid   : YES

 1697 07:14:56.814628  ME: Current Working State   : 5

 1698 07:14:56.817786  ME: Current Operation State : 1

 1699 07:14:56.821699  ME: Current Operation Mode  : 0

 1700 07:14:56.824888  ME: Error Code              : 0

 1701 07:14:56.827819  ME: CPU Debug Disabled      : YES

 1702 07:14:56.831289  ME: TXT Support             : NO

 1703 07:14:56.838058  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1704 07:14:56.844872  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1705 07:14:56.844960  CBFS @ c08000 size 3f8000

 1706 07:14:56.851497  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1707 07:14:56.854270  CBFS: Locating 'fallback/dsdt.aml'

 1708 07:14:56.857908  CBFS: Found @ offset 10bb80 size 3fa5

 1709 07:14:56.864596  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1710 07:14:56.867541  CBFS @ c08000 size 3f8000

 1711 07:14:56.873936  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1712 07:14:56.874023  CBFS: Locating 'fallback/slic'

 1713 07:14:56.879657  CBFS: 'fallback/slic' not found.

 1714 07:14:56.886115  ACPI: Writing ACPI tables at 99b3e000.

 1715 07:14:56.886202  ACPI:    * FACS

 1716 07:14:56.889263  ACPI:    * DSDT

 1717 07:14:56.893472  Ramoops buffer: 0x100000@0x99a3d000.

 1718 07:14:56.895988  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1719 07:14:56.902793  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1720 07:14:56.905893  Google Chrome EC: version:

 1721 07:14:56.909494  	ro: helios_v2.0.2659-56403530b

 1722 07:14:56.912790  	rw: helios_v2.0.2849-c41de27e7d

 1723 07:14:56.912877    running image: 1

 1724 07:14:56.916743  ACPI:    * FADT

 1725 07:14:56.916829  SCI is IRQ9

 1726 07:14:56.923661  ACPI: added table 1/32, length now 40

 1727 07:14:56.923748  ACPI:     * SSDT

 1728 07:14:56.926812  Found 1 CPU(s) with 8 core(s) each.

 1729 07:14:56.929960  Error: Could not locate 'wifi_sar' in VPD.

 1730 07:14:56.936904  Checking CBFS for default SAR values

 1731 07:14:56.940020  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1732 07:14:56.943062  CBFS @ c08000 size 3f8000

 1733 07:14:56.950047  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1734 07:14:56.953446  CBFS: Locating 'wifi_sar_defaults.hex'

 1735 07:14:56.956634  CBFS: Found @ offset 5fac0 size 77

 1736 07:14:56.959983  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1737 07:14:56.966545  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1738 07:14:56.969646  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1739 07:14:56.976540  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1740 07:14:56.979509  failed to find key in VPD: dsm_calib_r0_0

 1741 07:14:56.989671  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1742 07:14:56.993053  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1743 07:14:56.996269  failed to find key in VPD: dsm_calib_r0_1

 1744 07:14:57.006177  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1745 07:14:57.012690  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1746 07:14:57.016307  failed to find key in VPD: dsm_calib_r0_2

 1747 07:14:57.026201  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1748 07:14:57.029791  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1749 07:14:57.036209  failed to find key in VPD: dsm_calib_r0_3

 1750 07:14:57.042828  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1751 07:14:57.049420  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1752 07:14:57.052294  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1753 07:14:57.055595  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1754 07:14:57.060201  EC returned error result code 1

 1755 07:14:57.063464  EC returned error result code 1

 1756 07:14:57.067576  EC returned error result code 1

 1757 07:14:57.074415  PS2K: Bad resp from EC. Vivaldi disabled!

 1758 07:14:57.077365  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1759 07:14:57.084038  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1760 07:14:57.090692  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1761 07:14:57.094009  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1762 07:14:57.100426  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1763 07:14:57.107042  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1764 07:14:57.110385  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1765 07:14:57.117285  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1766 07:14:57.120184  ACPI: added table 2/32, length now 44

 1767 07:14:57.123454  ACPI:    * MCFG

 1768 07:14:57.127206  ACPI: added table 3/32, length now 48

 1769 07:14:57.130488  ACPI:    * TPM2

 1770 07:14:57.133324  TPM2 log created at 99a2d000

 1771 07:14:57.136999  ACPI: added table 4/32, length now 52

 1772 07:14:57.137088  ACPI:    * MADT

 1773 07:14:57.140262  SCI is IRQ9

 1774 07:14:57.143445  ACPI: added table 5/32, length now 56

 1775 07:14:57.143533  current = 99b43ac0

 1776 07:14:57.146691  ACPI:    * DMAR

 1777 07:14:57.149994  ACPI: added table 6/32, length now 60

 1778 07:14:57.153335  ACPI:    * IGD OpRegion

 1779 07:14:57.153423  GMA: Found VBT in CBFS

 1780 07:14:57.156669  GMA: Found valid VBT in CBFS

 1781 07:14:57.160255  ACPI: added table 7/32, length now 64

 1782 07:14:57.163129  ACPI:    * HPET

 1783 07:14:57.166530  ACPI: added table 8/32, length now 68

 1784 07:14:57.166617  ACPI: done.

 1785 07:14:57.170060  ACPI tables: 31744 bytes.

 1786 07:14:57.173114  smbios_write_tables: 99a2c000

 1787 07:14:57.176664  EC returned error result code 3

 1788 07:14:57.180502  Couldn't obtain OEM name from CBI

 1789 07:14:57.182990  Create SMBIOS type 17

 1790 07:14:57.186328  PCI: 00:00.0 (Intel Cannonlake)

 1791 07:14:57.189595  PCI: 00:14.3 (Intel WiFi)

 1792 07:14:57.193098  SMBIOS tables: 939 bytes.

 1793 07:14:57.196190  Writing table forward entry at 0x00000500

 1794 07:14:57.203004  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1795 07:14:57.206315  Writing coreboot table at 0x99b62000

 1796 07:14:57.213052   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1797 07:14:57.216678   1. 0000000000001000-000000000009ffff: RAM

 1798 07:14:57.220051   2. 00000000000a0000-00000000000fffff: RESERVED

 1799 07:14:57.226771   3. 0000000000100000-0000000099a2bfff: RAM

 1800 07:14:57.232922   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1801 07:14:57.235822   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1802 07:14:57.242639   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1803 07:14:57.246180   7. 000000009a000000-000000009f7fffff: RESERVED

 1804 07:14:57.252465   8. 00000000e0000000-00000000efffffff: RESERVED

 1805 07:14:57.255757   9. 00000000fc000000-00000000fc000fff: RESERVED

 1806 07:14:57.262559  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1807 07:14:57.265704  11. 00000000fed10000-00000000fed17fff: RESERVED

 1808 07:14:57.269173  12. 00000000fed80000-00000000fed83fff: RESERVED

 1809 07:14:57.275688  13. 00000000fed90000-00000000fed91fff: RESERVED

 1810 07:14:57.279279  14. 00000000feda0000-00000000feda1fff: RESERVED

 1811 07:14:57.285811  15. 0000000100000000-000000045e7fffff: RAM

 1812 07:14:57.288860  Graphics framebuffer located at 0xc0000000

 1813 07:14:57.292599  Passing 5 GPIOs to payload:

 1814 07:14:57.295804              NAME |       PORT | POLARITY |     VALUE

 1815 07:14:57.302119     write protect |  undefined |     high |       low

 1816 07:14:57.309217               lid |  undefined |     high |      high

 1817 07:14:57.312157             power |  undefined |     high |       low

 1818 07:14:57.318851             oprom |  undefined |     high |       low

 1819 07:14:57.322057          EC in RW | 0x000000cb |     high |       low

 1820 07:14:57.325681  Board ID: 4

 1821 07:14:57.328521  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1822 07:14:57.332648  CBFS @ c08000 size 3f8000

 1823 07:14:57.338504  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1824 07:14:57.345730  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa

 1825 07:14:57.345819  coreboot table: 1492 bytes.

 1826 07:14:57.348681  IMD ROOT    0. 99fff000 00001000

 1827 07:14:57.351675  IMD SMALL   1. 99ffe000 00001000

 1828 07:14:57.355344  FSP MEMORY  2. 99c4e000 003b0000

 1829 07:14:57.358853  CONSOLE     3. 99c2e000 00020000

 1830 07:14:57.361646  FMAP        4. 99c2d000 0000054e

 1831 07:14:57.365007  TIME STAMP  5. 99c2c000 00000910

 1832 07:14:57.368811  VBOOT WORK  6. 99c18000 00014000

 1833 07:14:57.371888  MRC DATA    7. 99c16000 00001958

 1834 07:14:57.375258  ROMSTG STCK 8. 99c15000 00001000

 1835 07:14:57.379044  AFTER CAR   9. 99c0b000 0000a000

 1836 07:14:57.382021  RAMSTAGE   10. 99baf000 0005c000

 1837 07:14:57.385155  REFCODE    11. 99b7a000 00035000

 1838 07:14:57.388423  SMM BACKUP 12. 99b6a000 00010000

 1839 07:14:57.391850  COREBOOT   13. 99b62000 00008000

 1840 07:14:57.395226  ACPI       14. 99b3e000 00024000

 1841 07:14:57.398675  ACPI GNVS  15. 99b3d000 00001000

 1842 07:14:57.401754  RAMOOPS    16. 99a3d000 00100000

 1843 07:14:57.405220  TPM2 TCGLOG17. 99a2d000 00010000

 1844 07:14:57.408224  SMBIOS     18. 99a2c000 00000800

 1845 07:14:57.411618  IMD small region:

 1846 07:14:57.415167    IMD ROOT    0. 99ffec00 00000400

 1847 07:14:57.418383    FSP RUNTIME 1. 99ffebe0 00000004

 1848 07:14:57.421787    EC HOSTEVENT 2. 99ffebc0 00000008

 1849 07:14:57.425356    POWER STATE 3. 99ffeb80 00000040

 1850 07:14:57.428209    ROMSTAGE    4. 99ffeb60 00000004

 1851 07:14:57.431922    MEM INFO    5. 99ffe9a0 000001b9

 1852 07:14:57.434879    VPD         6. 99ffe920 0000006c

 1853 07:14:57.438644  MTRR: Physical address space:

 1854 07:14:57.444700  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1855 07:14:57.452039  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1856 07:14:57.458041  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1857 07:14:57.464377  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1858 07:14:57.471345  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1859 07:14:57.477989  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1860 07:14:57.484292  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1861 07:14:57.487807  MTRR: Fixed MSR 0x250 0x0606060606060606

 1862 07:14:57.491105  MTRR: Fixed MSR 0x258 0x0606060606060606

 1863 07:14:57.494698  MTRR: Fixed MSR 0x259 0x0000000000000000

 1864 07:14:57.500948  MTRR: Fixed MSR 0x268 0x0606060606060606

 1865 07:14:57.504270  MTRR: Fixed MSR 0x269 0x0606060606060606

 1866 07:14:57.508514  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1867 07:14:57.510747  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1868 07:14:57.514246  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1869 07:14:57.520675  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1870 07:14:57.523971  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1871 07:14:57.527543  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1872 07:14:57.530760  call enable_fixed_mtrr()

 1873 07:14:57.533991  CPU physical address size: 39 bits

 1874 07:14:57.540453  MTRR: default type WB/UC MTRR counts: 6/8.

 1875 07:14:57.543800  MTRR: WB selected as default type.

 1876 07:14:57.550595  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1877 07:14:57.553767  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1878 07:14:57.560360  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1879 07:14:57.567044  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1880 07:14:57.573503  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1881 07:14:57.580203  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1882 07:14:57.583325  MTRR: Fixed MSR 0x250 0x0606060606060606

 1883 07:14:57.590005  MTRR: Fixed MSR 0x258 0x0606060606060606

 1884 07:14:57.593288  MTRR: Fixed MSR 0x259 0x0000000000000000

 1885 07:14:57.596504  MTRR: Fixed MSR 0x268 0x0606060606060606

 1886 07:14:57.599859  MTRR: Fixed MSR 0x269 0x0606060606060606

 1887 07:14:57.606605  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1888 07:14:57.610098  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1889 07:14:57.613184  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1890 07:14:57.616421  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1891 07:14:57.623228  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1892 07:14:57.626395  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1893 07:14:57.626482  

 1894 07:14:57.626552  MTRR check

 1895 07:14:57.629604  Fixed MTRRs   : Enabled

 1896 07:14:57.632786  Variable MTRRs: Enabled

 1897 07:14:57.632873  

 1898 07:14:57.636061  call enable_fixed_mtrr()

 1899 07:14:57.639671  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1900 07:14:57.643467  CPU physical address size: 39 bits

 1901 07:14:57.649275  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1902 07:14:57.652482  MTRR: Fixed MSR 0x250 0x0606060606060606

 1903 07:14:57.659236  MTRR: Fixed MSR 0x250 0x0606060606060606

 1904 07:14:57.662980  MTRR: Fixed MSR 0x258 0x0606060606060606

 1905 07:14:57.665758  MTRR: Fixed MSR 0x259 0x0000000000000000

 1906 07:14:57.669533  MTRR: Fixed MSR 0x268 0x0606060606060606

 1907 07:14:57.672549  MTRR: Fixed MSR 0x269 0x0606060606060606

 1908 07:14:57.678877  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1909 07:14:57.682553  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1910 07:14:57.685793  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1911 07:14:57.688947  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1912 07:14:57.695843  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1913 07:14:57.699277  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1914 07:14:57.702514  MTRR: Fixed MSR 0x258 0x0606060606060606

 1915 07:14:57.705660  call enable_fixed_mtrr()

 1916 07:14:57.708674  MTRR: Fixed MSR 0x259 0x0000000000000000

 1917 07:14:57.712154  MTRR: Fixed MSR 0x268 0x0606060606060606

 1918 07:14:57.719010  MTRR: Fixed MSR 0x269 0x0606060606060606

 1919 07:14:57.722275  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1920 07:14:57.725578  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1921 07:14:57.728587  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1922 07:14:57.735193  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1923 07:14:57.738603  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1924 07:14:57.742011  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1925 07:14:57.744907  CPU physical address size: 39 bits

 1926 07:14:57.748807  call enable_fixed_mtrr()

 1927 07:14:57.752141  CBFS @ c08000 size 3f8000

 1928 07:14:57.758620  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1929 07:14:57.762014  CBFS: Locating 'fallback/payload'

 1930 07:14:57.765294  MTRR: Fixed MSR 0x250 0x0606060606060606

 1931 07:14:57.768647  MTRR: Fixed MSR 0x250 0x0606060606060606

 1932 07:14:57.772411  MTRR: Fixed MSR 0x258 0x0606060606060606

 1933 07:14:57.778401  MTRR: Fixed MSR 0x259 0x0000000000000000

 1934 07:14:57.781643  MTRR: Fixed MSR 0x268 0x0606060606060606

 1935 07:14:57.785346  MTRR: Fixed MSR 0x269 0x0606060606060606

 1936 07:14:57.788673  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1937 07:14:57.794791  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1938 07:14:57.798354  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1939 07:14:57.801727  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1940 07:14:57.804708  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1941 07:14:57.808192  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1942 07:14:57.814619  MTRR: Fixed MSR 0x258 0x0606060606060606

 1943 07:14:57.818333  call enable_fixed_mtrr()

 1944 07:14:57.821370  MTRR: Fixed MSR 0x259 0x0000000000000000

 1945 07:14:57.824605  MTRR: Fixed MSR 0x268 0x0606060606060606

 1946 07:14:57.828052  MTRR: Fixed MSR 0x269 0x0606060606060606

 1947 07:14:57.834679  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1948 07:14:57.838233  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1949 07:14:57.841038  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1950 07:14:57.844459  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1951 07:14:57.847751  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1952 07:14:57.854485  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1953 07:14:57.857688  CPU physical address size: 39 bits

 1954 07:14:57.860959  call enable_fixed_mtrr()

 1955 07:14:57.864791  CPU physical address size: 39 bits

 1956 07:14:57.867869  CPU physical address size: 39 bits

 1957 07:14:57.871134  MTRR: Fixed MSR 0x250 0x0606060606060606

 1958 07:14:57.874388  MTRR: Fixed MSR 0x258 0x0606060606060606

 1959 07:14:57.880759  MTRR: Fixed MSR 0x259 0x0000000000000000

 1960 07:14:57.884094  MTRR: Fixed MSR 0x268 0x0606060606060606

 1961 07:14:57.887321  MTRR: Fixed MSR 0x269 0x0606060606060606

 1962 07:14:57.891078  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1963 07:14:57.897404  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1964 07:14:57.900535  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1965 07:14:57.903715  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1966 07:14:57.907436  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1967 07:14:57.910691  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1968 07:14:57.917218  MTRR: Fixed MSR 0x250 0x0606060606060606

 1969 07:14:57.920657  call enable_fixed_mtrr()

 1970 07:14:57.923854  MTRR: Fixed MSR 0x258 0x0606060606060606

 1971 07:14:57.927431  MTRR: Fixed MSR 0x259 0x0000000000000000

 1972 07:14:57.930494  MTRR: Fixed MSR 0x268 0x0606060606060606

 1973 07:14:57.937278  MTRR: Fixed MSR 0x269 0x0606060606060606

 1974 07:14:57.940234  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1975 07:14:57.943963  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1976 07:14:57.947280  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1977 07:14:57.950177  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1978 07:14:57.957039  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1979 07:14:57.960228  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1980 07:14:57.963728  CPU physical address size: 39 bits

 1981 07:14:57.966667  call enable_fixed_mtrr()

 1982 07:14:57.970952  CBFS: Found @ offset 1c96c0 size 3f798

 1983 07:14:57.973454  CPU physical address size: 39 bits

 1984 07:14:57.980374  Checking segment from ROM address 0xffdd16f8

 1985 07:14:57.983234  Checking segment from ROM address 0xffdd1714

 1986 07:14:57.986709  Loading segment from ROM address 0xffdd16f8

 1987 07:14:57.989825    code (compression=0)

 1988 07:14:58.000003    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1989 07:14:58.006607  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1990 07:14:58.009853  it's not compressed!

 1991 07:14:58.101281  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1992 07:14:58.108278  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1993 07:14:58.110988  Loading segment from ROM address 0xffdd1714

 1994 07:14:58.114629    Entry Point 0x30000000

 1995 07:14:58.117967  Loaded segments

 1996 07:14:58.123227  Finalizing chipset.

 1997 07:14:58.126936  Finalizing SMM.

 1998 07:14:58.130045  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 1999 07:14:58.133763  mp_park_aps done after 0 msecs.

 2000 07:14:58.140089  Jumping to boot code at 30000000(99b62000)

 2001 07:14:58.146545  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2002 07:14:58.146634  

 2003 07:14:58.146707  

 2004 07:14:58.146771  

 2005 07:14:58.149788  Starting depthcharge on Helios...

 2006 07:14:58.149875  

 2007 07:14:58.150222  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2008 07:14:58.150323  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2009 07:14:58.150409  Setting prompt string to ['hatch:']
 2010 07:14:58.150491  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2011 07:14:58.159867  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2012 07:14:58.159956  

 2013 07:14:58.166187  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2014 07:14:58.166275  

 2015 07:14:58.173022  board_setup: Info: eMMC controller not present; skipping

 2016 07:14:58.173110  

 2017 07:14:58.176273  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2018 07:14:58.176368  

 2019 07:14:58.183147  board_setup: Info: SDHCI controller not present; skipping

 2020 07:14:58.183235  

 2021 07:14:58.189819  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2022 07:14:58.189906  

 2023 07:14:58.189976  Wipe memory regions:

 2024 07:14:58.190040  

 2025 07:14:58.192706  	[0x00000000001000, 0x000000000a0000)

 2026 07:14:58.192793  

 2027 07:14:58.196200  	[0x00000000100000, 0x00000030000000)

 2028 07:14:58.262701  

 2029 07:14:58.265882  	[0x00000030657430, 0x00000099a2c000)

 2030 07:14:58.402866  

 2031 07:14:58.406073  	[0x00000100000000, 0x0000045e800000)

 2032 07:14:59.789414  

 2033 07:14:59.789573  R8152: Initializing

 2034 07:14:59.789644  

 2035 07:14:59.792550  Version 9 (ocp_data = 6010)

 2036 07:14:59.796492  

 2037 07:14:59.796578  R8152: Done initializing

 2038 07:14:59.796647  

 2039 07:14:59.800132  Adding net device

 2040 07:15:00.409967  

 2041 07:15:00.410123  R8152: Initializing

 2042 07:15:00.410192  

 2043 07:15:00.412941  Version 6 (ocp_data = 5c30)

 2044 07:15:00.413025  

 2045 07:15:00.416017  R8152: Done initializing

 2046 07:15:00.416099  

 2047 07:15:00.422813  net_add_device: Attemp to include the same device

 2048 07:15:00.422899  

 2049 07:15:00.429948  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2050 07:15:00.430033  

 2051 07:15:00.430099  

 2052 07:15:00.430160  

 2053 07:15:00.430430  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2055 07:15:00.531184  hatch: tftpboot 192.168.201.1 9567901/tftp-deploy-f6qijclf/kernel/bzImage 9567901/tftp-deploy-f6qijclf/kernel/cmdline 9567901/tftp-deploy-f6qijclf/ramdisk/ramdisk.cpio.gz

 2056 07:15:00.531343  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2057 07:15:00.531502  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2058 07:15:00.535937  tftpboot 192.168.201.1 9567901/tftp-deploy-f6qijclf/kernel/bzImoy-f6qijclf/kernel/cmdline 9567901/tftp-deploy-f6qijclf/ramdisk/ramdisk.cpio.gz

 2059 07:15:00.536026  

 2060 07:15:00.536093  Waiting for link

 2061 07:15:00.736572  

 2062 07:15:00.736706  done.

 2063 07:15:00.736772  

 2064 07:15:00.736863  MAC: 00:24:32:50:1a:5f

 2065 07:15:00.736925  

 2066 07:15:00.740072  Sending DHCP discover... done.

 2067 07:15:00.740160  

 2068 07:15:00.743269  Waiting for reply... done.

 2069 07:15:00.743354  

 2070 07:15:00.747024  Sending DHCP request... done.

 2071 07:15:00.747109  

 2072 07:15:00.750200  Waiting for reply... done.

 2073 07:15:00.750286  

 2074 07:15:00.753264  My ip is 192.168.201.21

 2075 07:15:00.753349  

 2076 07:15:00.756626  The DHCP server ip is 192.168.201.1

 2077 07:15:00.756712  

 2078 07:15:00.763625  TFTP server IP predefined by user: 192.168.201.1

 2079 07:15:00.763710  

 2080 07:15:00.769738  Bootfile predefined by user: 9567901/tftp-deploy-f6qijclf/kernel/bzImage

 2081 07:15:00.769824  

 2082 07:15:00.773041  Sending tftp read request... done.

 2083 07:15:00.773126  

 2084 07:15:00.776376  Waiting for the transfer... 

 2085 07:15:00.776484  

 2086 07:15:01.375178  00000000 ################################################################

 2087 07:15:01.375335  

 2088 07:15:01.992977  00080000 ################################################################

 2089 07:15:01.993131  

 2090 07:15:02.643596  00100000 ################################################################

 2091 07:15:02.644149  

 2092 07:15:03.262987  00180000 ################################################################

 2093 07:15:03.263145  

 2094 07:15:03.807367  00200000 ################################################################

 2095 07:15:03.807522  

 2096 07:15:04.369133  00280000 ################################################################

 2097 07:15:04.369290  

 2098 07:15:04.976249  00300000 ################################################################

 2099 07:15:04.976432  

 2100 07:15:05.590896  00380000 ################################################################

 2101 07:15:05.591049  

 2102 07:15:06.170593  00400000 ################################################################

 2103 07:15:06.170750  

 2104 07:15:06.730329  00480000 ################################################################

 2105 07:15:06.730480  

 2106 07:15:07.294005  00500000 ################################################################

 2107 07:15:07.294155  

 2108 07:15:07.892027  00580000 ################################################################

 2109 07:15:07.892187  

 2110 07:15:08.488777  00600000 ################################################################

 2111 07:15:08.488933  

 2112 07:15:09.102110  00680000 ################################################################

 2113 07:15:09.102263  

 2114 07:15:09.684413  00700000 ################################################################

 2115 07:15:09.684565  

 2116 07:15:10.277404  00780000 ################################################################

 2117 07:15:10.277560  

 2118 07:15:10.848321  00800000 ################################################################

 2119 07:15:10.848474  

 2120 07:15:11.417067  00880000 ################################################################

 2121 07:15:11.417222  

 2122 07:15:11.876306  00900000 ################################################ done.

 2123 07:15:11.876485  

 2124 07:15:11.879645  The bootfile was 9826304 bytes long.

 2125 07:15:11.879753  

 2126 07:15:11.883403  Sending tftp read request... done.

 2127 07:15:11.883491  

 2128 07:15:11.886311  Waiting for the transfer... 

 2129 07:15:11.886399  

 2130 07:15:12.491377  00000000 ################################################################

 2131 07:15:12.491533  

 2132 07:15:13.199807  00080000 ################################################################

 2133 07:15:13.200448  

 2134 07:15:13.945069  00100000 ################################################################

 2135 07:15:13.945694  

 2136 07:15:14.646771  00180000 ################################################################

 2137 07:15:14.647327  

 2138 07:15:15.348942  00200000 ################################################################

 2139 07:15:15.349529  

 2140 07:15:16.080458  00280000 ################################################################

 2141 07:15:16.081076  

 2142 07:15:16.780523  00300000 ################################################################

 2143 07:15:16.781137  

 2144 07:15:17.466254  00380000 ################################################################

 2145 07:15:17.466800  

 2146 07:15:18.162361  00400000 ################################################################

 2147 07:15:18.162983  

 2148 07:15:18.860615  00480000 ################################################################

 2149 07:15:18.861184  

 2150 07:15:19.573724  00500000 ################################################################

 2151 07:15:19.574453  

 2152 07:15:20.043668  00580000 ########################################### done.

 2153 07:15:20.044282  

 2154 07:15:20.047221  Sending tftp read request... done.

 2155 07:15:20.047835  

 2156 07:15:20.049662  Waiting for the transfer... 

 2157 07:15:20.050168  

 2158 07:15:20.050568  00000000 # done.

 2159 07:15:20.050951  

 2160 07:15:20.060069  Command line loaded dynamically from TFTP file: 9567901/tftp-deploy-f6qijclf/kernel/cmdline

 2161 07:15:20.060648  

 2162 07:15:20.083178  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8  console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9567901/extract-nfsrootfs-dum7ejq0,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2163 07:15:20.083810  

 2164 07:15:20.089496  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2165 07:15:20.093286  

 2166 07:15:20.096681  Shutting down all USB controllers.

 2167 07:15:20.097255  

 2168 07:15:20.097669  Removing current net device

 2169 07:15:20.104487  

 2170 07:15:20.105104  Finalizing coreboot

 2171 07:15:20.105515  

 2172 07:15:20.110578  Exiting depthcharge with code 4 at timestamp: 29306905

 2173 07:15:20.111080  

 2174 07:15:20.111477  

 2175 07:15:20.111847  Starting kernel ...

 2176 07:15:20.112203  

 2177 07:15:20.113680  end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
 2178 07:15:20.114261  start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
 2179 07:15:20.114685  Setting prompt string to ['Linux version [0-9]']
 2180 07:15:20.115085  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2181 07:15:20.115493  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2182 07:15:20.116498  

 2184 07:19:40.115343  end: 2.2.5 auto-login-action (duration 00:04:20) [common]
 2186 07:19:40.116528  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
 2188 07:19:40.117507  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2191 07:19:40.119034  end: 2 depthcharge-action (duration 00:05:00) [common]
 2193 07:19:40.119602  Cleaning after the job
 2194 07:19:40.119689  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/ramdisk
 2195 07:19:40.120264  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/kernel
 2196 07:19:40.120983  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/nfsrootfs
 2197 07:19:40.167933  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9567901/tftp-deploy-f6qijclf/modules
 2198 07:19:40.168451  start: 4.1 power-off (timeout 00:00:30) [common]
 2199 07:19:40.168611  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2200 07:19:40.244701  >> Command sent successfully.

 2201 07:19:40.248833  Returned 0 in 0 seconds
 2202 07:19:40.350207  end: 4.1 power-off (duration 00:00:00) [common]
 2204 07:19:40.351762  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2205 07:19:40.352969  Listened to connection for namespace 'common' for up to 1s
 2207 07:19:40.355211  Listened to connection for namespace 'common' for up to 1s
 2208 07:19:41.357647  Finalising connection for namespace 'common'
 2209 07:19:41.358329  Disconnecting from shell: Finalise
 2210 07:19:41.358761  
 2211 07:19:41.460366  end: 4.2 read-feedback (duration 00:00:01) [common]
 2212 07:19:41.461006  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9567901
 2213 07:19:41.614167  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9567901
 2214 07:19:41.614368  JobError: Your job cannot terminate cleanly.