Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:15:16.352225 lava-dispatcher, installed at version: 2023.01
2 03:15:16.352433 start: 0 validate
3 03:15:16.352567 Start time: 2023-03-14 03:15:16.352561+00:00 (UTC)
4 03:15:16.352696 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:15:16.352836 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 03:15:16.647362 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:15:16.648139 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.276-cip93-5-g2eb2a953ab59%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:15:16.941886 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:15:16.942601 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.276-cip93-5-g2eb2a953ab59%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 03:15:17.244378 validate duration: 0.89
12 03:15:17.244698 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:15:17.244879 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:15:17.244993 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:15:17.245112 Not decompressing ramdisk as can be used compressed.
16 03:15:17.245215 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 03:15:17.245293 saving as /var/lib/lava/dispatcher/tmp/9597734/tftp-deploy-aw6h9lvg/ramdisk/rootfs.cpio.gz
18 03:15:17.245362 total size: 8429740 (8MB)
19 03:15:17.246297 progress 0% (0MB)
20 03:15:17.248634 progress 5% (0MB)
21 03:15:17.250912 progress 10% (0MB)
22 03:15:17.253291 progress 15% (1MB)
23 03:15:17.255698 progress 20% (1MB)
24 03:15:17.257975 progress 25% (2MB)
25 03:15:17.260288 progress 30% (2MB)
26 03:15:17.262596 progress 35% (2MB)
27 03:15:17.264754 progress 40% (3MB)
28 03:15:17.267064 progress 45% (3MB)
29 03:15:17.269369 progress 50% (4MB)
30 03:15:17.271757 progress 55% (4MB)
31 03:15:17.274101 progress 60% (4MB)
32 03:15:17.276391 progress 65% (5MB)
33 03:15:17.278679 progress 70% (5MB)
34 03:15:17.280809 progress 75% (6MB)
35 03:15:17.283093 progress 80% (6MB)
36 03:15:17.285459 progress 85% (6MB)
37 03:15:17.287768 progress 90% (7MB)
38 03:15:17.289996 progress 95% (7MB)
39 03:15:17.292291 progress 100% (8MB)
40 03:15:17.292438 8MB downloaded in 0.05s (170.79MB/s)
41 03:15:17.292599 end: 1.1.1 http-download (duration 00:00:00) [common]
43 03:15:17.292869 end: 1.1 download-retry (duration 00:00:00) [common]
44 03:15:17.292968 start: 1.2 download-retry (timeout 00:10:00) [common]
45 03:15:17.293064 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 03:15:17.293182 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.276-cip93-5-g2eb2a953ab59/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 03:15:17.293258 saving as /var/lib/lava/dispatcher/tmp/9597734/tftp-deploy-aw6h9lvg/kernel/bzImage
48 03:15:17.293327 total size: 9826304 (9MB)
49 03:15:17.293394 No compression specified
50 03:15:17.294380 progress 0% (0MB)
51 03:15:17.296918 progress 5% (0MB)
52 03:15:17.299608 progress 10% (0MB)
53 03:15:17.302296 progress 15% (1MB)
54 03:15:17.304948 progress 20% (1MB)
55 03:15:17.307592 progress 25% (2MB)
56 03:15:17.310188 progress 30% (2MB)
57 03:15:17.312835 progress 35% (3MB)
58 03:15:17.315477 progress 40% (3MB)
59 03:15:17.318077 progress 45% (4MB)
60 03:15:17.320715 progress 50% (4MB)
61 03:15:17.323355 progress 55% (5MB)
62 03:15:17.325988 progress 60% (5MB)
63 03:15:17.328591 progress 65% (6MB)
64 03:15:17.331248 progress 70% (6MB)
65 03:15:17.333842 progress 75% (7MB)
66 03:15:17.336432 progress 80% (7MB)
67 03:15:17.339020 progress 85% (7MB)
68 03:15:17.341617 progress 90% (8MB)
69 03:15:17.344211 progress 95% (8MB)
70 03:15:17.346779 progress 100% (9MB)
71 03:15:17.347013 9MB downloaded in 0.05s (174.57MB/s)
72 03:15:17.347225 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:15:17.347491 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:15:17.347591 start: 1.3 download-retry (timeout 00:10:00) [common]
76 03:15:17.347688 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 03:15:17.347804 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.276-cip93-5-g2eb2a953ab59/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 03:15:17.347886 saving as /var/lib/lava/dispatcher/tmp/9597734/tftp-deploy-aw6h9lvg/modules/modules.tar
79 03:15:17.347956 total size: 461580 (0MB)
80 03:15:17.348024 Using unxz to decompress xz
81 03:15:17.351422 progress 7% (0MB)
82 03:15:17.351817 progress 14% (0MB)
83 03:15:17.352074 progress 21% (0MB)
84 03:15:17.353541 progress 28% (0MB)
85 03:15:17.355805 progress 35% (0MB)
86 03:15:17.357824 progress 42% (0MB)
87 03:15:17.360202 progress 49% (0MB)
88 03:15:17.362357 progress 56% (0MB)
89 03:15:17.364602 progress 63% (0MB)
90 03:15:17.366655 progress 70% (0MB)
91 03:15:17.369109 progress 78% (0MB)
92 03:15:17.371399 progress 85% (0MB)
93 03:15:17.373287 progress 92% (0MB)
94 03:15:17.375739 progress 99% (0MB)
95 03:15:17.383440 0MB downloaded in 0.04s (12.41MB/s)
96 03:15:17.383734 end: 1.3.1 http-download (duration 00:00:00) [common]
98 03:15:17.384084 end: 1.3 download-retry (duration 00:00:00) [common]
99 03:15:17.384194 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
100 03:15:17.384307 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
101 03:15:17.384406 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 03:15:17.384505 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
103 03:15:17.384701 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk
104 03:15:17.384821 makedir: /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin
105 03:15:17.384916 makedir: /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/tests
106 03:15:17.385007 makedir: /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/results
107 03:15:17.385183 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-add-keys
108 03:15:17.385330 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-add-sources
109 03:15:17.385460 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-background-process-start
110 03:15:17.385588 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-background-process-stop
111 03:15:17.385714 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-common-functions
112 03:15:17.385837 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-echo-ipv4
113 03:15:17.386028 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-install-packages
114 03:15:17.386154 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-installed-packages
115 03:15:17.386276 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-os-build
116 03:15:17.386399 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-probe-channel
117 03:15:17.386521 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-probe-ip
118 03:15:17.386643 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-target-ip
119 03:15:17.386764 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-target-mac
120 03:15:17.386886 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-target-storage
121 03:15:17.387009 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-test-case
122 03:15:17.387178 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-test-event
123 03:15:17.387302 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-test-feedback
124 03:15:17.387425 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-test-raise
125 03:15:17.387552 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-test-reference
126 03:15:17.387676 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-test-runner
127 03:15:17.387798 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-test-set
128 03:15:17.387995 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-test-shell
129 03:15:17.388124 Updating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-install-packages (oe)
130 03:15:17.388252 Updating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/bin/lava-installed-packages (oe)
131 03:15:17.388362 Creating /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/environment
132 03:15:17.388462 LAVA metadata
133 03:15:17.388544 - LAVA_JOB_ID=9597734
134 03:15:17.388620 - LAVA_DISPATCHER_IP=192.168.201.1
135 03:15:17.388732 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
136 03:15:17.388806 skipped lava-vland-overlay
137 03:15:17.388893 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 03:15:17.388986 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
139 03:15:17.389061 skipped lava-multinode-overlay
140 03:15:17.389146 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 03:15:17.389242 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
142 03:15:17.389325 Loading test definitions
143 03:15:17.389433 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
144 03:15:17.389519 Using /lava-9597734 at stage 0
145 03:15:17.389818 uuid=9597734_1.4.2.3.1 testdef=None
146 03:15:17.389997 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 03:15:17.390108 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
148 03:15:17.390661 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 03:15:17.390918 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
151 03:15:17.391601 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 03:15:17.391879 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
154 03:15:17.392586 runner path: /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/0/tests/0_dmesg test_uuid 9597734_1.4.2.3.1
155 03:15:17.392757 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 03:15:17.393026 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
158 03:15:17.393110 Using /lava-9597734 at stage 1
159 03:15:17.393384 uuid=9597734_1.4.2.3.5 testdef=None
160 03:15:17.393486 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 03:15:17.393585 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
162 03:15:17.394164 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 03:15:17.394421 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
165 03:15:17.395072 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 03:15:17.395354 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
168 03:15:17.395975 runner path: /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/1/tests/1_bootrr test_uuid 9597734_1.4.2.3.5
169 03:15:17.396136 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 03:15:17.396378 Creating lava-test-runner.conf files
172 03:15:17.396451 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/0 for stage 0
173 03:15:17.396544 - 0_dmesg
174 03:15:17.396628 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9597734/lava-overlay-r3w_a6nk/lava-9597734/1 for stage 1
175 03:15:17.396722 - 1_bootrr
176 03:15:17.396825 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 03:15:17.396923 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
178 03:15:17.404169 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 03:15:17.404293 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
180 03:15:17.404392 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 03:15:17.404491 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 03:15:17.404595 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
183 03:15:17.608776 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 03:15:17.609163 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
185 03:15:17.609293 extracting modules file /var/lib/lava/dispatcher/tmp/9597734/tftp-deploy-aw6h9lvg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9597734/extract-overlay-ramdisk-fohckkbc/ramdisk
186 03:15:17.621673 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 03:15:17.621814 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
188 03:15:17.621916 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9597734/compress-overlay-hr_sox62/overlay-1.4.2.4.tar.gz to ramdisk
189 03:15:17.621999 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9597734/compress-overlay-hr_sox62/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9597734/extract-overlay-ramdisk-fohckkbc/ramdisk
190 03:15:17.626563 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 03:15:17.626691 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
192 03:15:17.626799 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 03:15:17.626907 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
194 03:15:17.626997 Building ramdisk /var/lib/lava/dispatcher/tmp/9597734/extract-overlay-ramdisk-fohckkbc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9597734/extract-overlay-ramdisk-fohckkbc/ramdisk
195 03:15:17.705500 >> 53632 blocks
196 03:15:18.626465 rename /var/lib/lava/dispatcher/tmp/9597734/extract-overlay-ramdisk-fohckkbc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9597734/tftp-deploy-aw6h9lvg/ramdisk/ramdisk.cpio.gz
197 03:15:18.626911 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 03:15:18.627049 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
199 03:15:18.627356 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
200 03:15:18.627464 No mkimage arch provided, not using FIT.
201 03:15:18.627568 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 03:15:18.627663 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 03:15:18.627771 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 03:15:18.627884 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
205 03:15:18.627977 No LXC device requested
206 03:15:18.628071 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 03:15:18.628172 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
208 03:15:18.628264 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 03:15:18.628344 Checking files for TFTP limit of 4294967296 bytes.
210 03:15:18.628759 end: 1 tftp-deploy (duration 00:00:01) [common]
211 03:15:18.628877 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 03:15:18.628986 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 03:15:18.629124 substitutions:
214 03:15:18.629201 - {DTB}: None
215 03:15:18.629277 - {INITRD}: 9597734/tftp-deploy-aw6h9lvg/ramdisk/ramdisk.cpio.gz
216 03:15:18.629347 - {KERNEL}: 9597734/tftp-deploy-aw6h9lvg/kernel/bzImage
217 03:15:18.629414 - {LAVA_MAC}: None
218 03:15:18.629480 - {PRESEED_CONFIG}: None
219 03:15:18.629570 - {PRESEED_LOCAL}: None
220 03:15:18.629640 - {RAMDISK}: 9597734/tftp-deploy-aw6h9lvg/ramdisk/ramdisk.cpio.gz
221 03:15:18.629706 - {ROOT_PART}: None
222 03:15:18.629771 - {ROOT}: None
223 03:15:18.629836 - {SERVER_IP}: 192.168.201.1
224 03:15:18.629900 - {TEE}: None
225 03:15:18.629964 Parsed boot commands:
226 03:15:18.630026 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 03:15:18.630192 Parsed boot commands: tftpboot 192.168.201.1 9597734/tftp-deploy-aw6h9lvg/kernel/bzImage 9597734/tftp-deploy-aw6h9lvg/kernel/cmdline 9597734/tftp-deploy-aw6h9lvg/ramdisk/ramdisk.cpio.gz
228 03:15:18.630293 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 03:15:18.630391 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 03:15:18.630499 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 03:15:18.630598 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 03:15:18.630678 Not connected, no need to disconnect.
233 03:15:18.630765 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 03:15:18.630861 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 03:15:18.630936 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
236 03:15:18.634223 Setting prompt string to ['lava-test: # ']
237 03:15:18.634554 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 03:15:18.634675 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 03:15:18.634788 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 03:15:18.634897 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 03:15:18.635107 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
242 03:15:23.774518 >> Command sent successfully.
243 03:15:23.783631 Returned 0 in 5 seconds
244 03:15:23.885132 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 03:15:23.886343 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 03:15:23.886794 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 03:15:23.887336 Setting prompt string to 'Starting depthcharge on Helios...'
249 03:15:23.887793 Changing prompt to 'Starting depthcharge on Helios...'
250 03:15:23.888284 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
251 03:15:23.889599 [Enter `^Ec?' for help]
252 03:15:24.499527
253 03:15:24.500047
254 03:15:24.509907 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
255 03:15:24.513229 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
256 03:15:24.519916 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
257 03:15:24.523353 CPU: AES supported, TXT NOT supported, VT supported
258 03:15:24.530354 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
259 03:15:24.533658 PCH: device id 0284 (rev 00) is Cometlake-U Premium
260 03:15:24.540084 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
261 03:15:24.543593 VBOOT: Loading verstage.
262 03:15:24.546735 FMAP: Found "FLASH" version 1.1 at 0xc04000.
263 03:15:24.553285 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
264 03:15:24.556940 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
265 03:15:24.560011 CBFS @ c08000 size 3f8000
266 03:15:24.566730 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
267 03:15:24.570113 CBFS: Locating 'fallback/verstage'
268 03:15:24.573598 CBFS: Found @ offset 10fb80 size 1072c
269 03:15:24.574037
270 03:15:24.574378
271 03:15:24.586586 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
272 03:15:24.600528 Probing TPM: . done!
273 03:15:24.604365 TPM ready after 0 ms
274 03:15:24.607624 Connected to device vid:did:rid of 1ae0:0028:00
275 03:15:24.617554 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
276 03:15:24.621277 Initialized TPM device CR50 revision 0
277 03:15:24.664554 tlcl_send_startup: Startup return code is 0
278 03:15:24.665024 TPM: setup succeeded
279 03:15:24.677087 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
280 03:15:24.681126 Chrome EC: UHEPI supported
281 03:15:24.684167 Phase 1
282 03:15:24.687349 FMAP: area GBB found @ c05000 (12288 bytes)
283 03:15:24.694398 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
284 03:15:24.697407 Phase 2
285 03:15:24.697861 Phase 3
286 03:15:24.701036 FMAP: area GBB found @ c05000 (12288 bytes)
287 03:15:24.707557 VB2:vb2_report_dev_firmware() This is developer signed firmware
288 03:15:24.713869 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
289 03:15:24.717283 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
290 03:15:24.723924 VB2:vb2_verify_keyblock() Checking keyblock signature...
291 03:15:24.739786 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
292 03:15:24.743080 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
293 03:15:24.749401 VB2:vb2_verify_fw_preamble() Verifying preamble.
294 03:15:24.753885 Phase 4
295 03:15:24.757395 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
296 03:15:24.763578 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
297 03:15:24.943371 VB2:vb2_rsa_verify_digest() Digest check failed!
298 03:15:24.949792 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
299 03:15:24.950244 Saving nvdata
300 03:15:24.952872 Reboot requested (10020007)
301 03:15:24.956361 board_reset() called!
302 03:15:24.956825 full_reset() called!
303 03:15:29.467184
304 03:15:29.467777
305 03:15:29.476595 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
306 03:15:29.480445 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
307 03:15:29.486914 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
308 03:15:29.489837 CPU: AES supported, TXT NOT supported, VT supported
309 03:15:29.496889 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
310 03:15:29.499835 PCH: device id 0284 (rev 00) is Cometlake-U Premium
311 03:15:29.506531 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
312 03:15:29.509956 VBOOT: Loading verstage.
313 03:15:29.513111 FMAP: Found "FLASH" version 1.1 at 0xc04000.
314 03:15:29.519633 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
315 03:15:29.523272 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
316 03:15:29.526744 CBFS @ c08000 size 3f8000
317 03:15:29.533121 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
318 03:15:29.536321 CBFS: Locating 'fallback/verstage'
319 03:15:29.539534 CBFS: Found @ offset 10fb80 size 1072c
320 03:15:29.543421
321 03:15:29.543886
322 03:15:29.553235 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
323 03:15:29.567632 Probing TPM: . done!
324 03:15:29.571153 TPM ready after 0 ms
325 03:15:29.574651 Connected to device vid:did:rid of 1ae0:0028:00
326 03:15:29.584499 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
327 03:15:29.588174 Initialized TPM device CR50 revision 0
328 03:15:29.631789 tlcl_send_startup: Startup return code is 0
329 03:15:29.632281 TPM: setup succeeded
330 03:15:29.644170 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
331 03:15:29.647933 Chrome EC: UHEPI supported
332 03:15:29.651216 Phase 1
333 03:15:29.654643 FMAP: area GBB found @ c05000 (12288 bytes)
334 03:15:29.661448 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
335 03:15:29.668174 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
336 03:15:29.671313 Recovery requested (1009000e)
337 03:15:29.677197 Saving nvdata
338 03:15:29.683016 tlcl_extend: response is 0
339 03:15:29.691989 tlcl_extend: response is 0
340 03:15:29.699192 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
341 03:15:29.702578 CBFS @ c08000 size 3f8000
342 03:15:29.708919 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
343 03:15:29.712468 CBFS: Locating 'fallback/romstage'
344 03:15:29.715414 CBFS: Found @ offset 80 size 145fc
345 03:15:29.718885 Accumulated console time in verstage 98 ms
346 03:15:29.719339
347 03:15:29.719745
348 03:15:29.732020 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
349 03:15:29.738301 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
350 03:15:29.741994 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
351 03:15:29.745098 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
352 03:15:29.751928 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
353 03:15:29.755338 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
354 03:15:29.758616 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
355 03:15:29.761835 TCO_STS: 0000 0000
356 03:15:29.765160 GEN_PMCON: e0015238 00000200
357 03:15:29.768566 GBLRST_CAUSE: 00000000 00000000
358 03:15:29.769024 prev_sleep_state 5
359 03:15:29.771978 Boot Count incremented to 47886
360 03:15:29.779190 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 03:15:29.782062 CBFS @ c08000 size 3f8000
362 03:15:29.788608 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 03:15:29.789101 CBFS: Locating 'fspm.bin'
364 03:15:29.794894 CBFS: Found @ offset 5ffc0 size 71000
365 03:15:29.798447 Chrome EC: UHEPI supported
366 03:15:29.805024 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
367 03:15:29.809325 Probing TPM: done!
368 03:15:29.815586 Connected to device vid:did:rid of 1ae0:0028:00
369 03:15:29.825523 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
370 03:15:29.831495 Initialized TPM device CR50 revision 0
371 03:15:29.840184 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
372 03:15:29.847288 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
373 03:15:29.850459 MRC cache found, size 1948
374 03:15:29.853859 bootmode is set to: 2
375 03:15:29.856808 PRMRR disabled by config.
376 03:15:29.860032 SPD INDEX = 1
377 03:15:29.863667 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 03:15:29.866961 CBFS @ c08000 size 3f8000
379 03:15:29.873370 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 03:15:29.873834 CBFS: Locating 'spd.bin'
381 03:15:29.876803 CBFS: Found @ offset 5fb80 size 400
382 03:15:29.880070 SPD: module type is LPDDR3
383 03:15:29.883338 SPD: module part is
384 03:15:29.890295 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
385 03:15:29.893608 SPD: device width 4 bits, bus width 8 bits
386 03:15:29.896705 SPD: module size is 4096 MB (per channel)
387 03:15:29.900524 memory slot: 0 configuration done.
388 03:15:29.903173 memory slot: 2 configuration done.
389 03:15:29.955163 CBMEM:
390 03:15:29.958483 IMD: root @ 99fff000 254 entries.
391 03:15:29.961953 IMD: root @ 99ffec00 62 entries.
392 03:15:29.965432 External stage cache:
393 03:15:29.968103 IMD: root @ 9abff000 254 entries.
394 03:15:29.971770 IMD: root @ 9abfec00 62 entries.
395 03:15:29.977776 Chrome EC: clear events_b mask to 0x0000000020004000
396 03:15:29.991015 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
397 03:15:30.004489 tlcl_write: response is 0
398 03:15:30.013248 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
399 03:15:30.019509 MRC: TPM MRC hash updated successfully.
400 03:15:30.019958 2 DIMMs found
401 03:15:30.022782 SMM Memory Map
402 03:15:30.025976 SMRAM : 0x9a000000 0x1000000
403 03:15:30.029692 Subregion 0: 0x9a000000 0xa00000
404 03:15:30.033231 Subregion 1: 0x9aa00000 0x200000
405 03:15:30.036416 Subregion 2: 0x9ac00000 0x400000
406 03:15:30.039072 top_of_ram = 0x9a000000
407 03:15:30.042706 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
408 03:15:30.049501 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
409 03:15:30.052703 MTRR Range: Start=ff000000 End=0 (Size 1000000)
410 03:15:30.059197 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 03:15:30.062835 CBFS @ c08000 size 3f8000
412 03:15:30.065653 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 03:15:30.069185 CBFS: Locating 'fallback/postcar'
414 03:15:30.075763 CBFS: Found @ offset 107000 size 4b44
415 03:15:30.079251 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
416 03:15:30.091330 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
417 03:15:30.094634 Processing 180 relocs. Offset value of 0x97c0c000
418 03:15:30.103224 Accumulated console time in romstage 286 ms
419 03:15:30.103701
420 03:15:30.104057
421 03:15:30.113163 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
422 03:15:30.119911 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 03:15:30.122970 CBFS @ c08000 size 3f8000
424 03:15:30.126390 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 03:15:30.133257 CBFS: Locating 'fallback/ramstage'
426 03:15:30.136270 CBFS: Found @ offset 43380 size 1b9e8
427 03:15:30.143280 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
428 03:15:30.174834 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
429 03:15:30.178385 Processing 3976 relocs. Offset value of 0x98db0000
430 03:15:30.185163 Accumulated console time in postcar 52 ms
431 03:15:30.185611
432 03:15:30.185960
433 03:15:30.195158 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
434 03:15:30.201464 FMAP: area RO_VPD found @ c00000 (16384 bytes)
435 03:15:30.204922 WARNING: RO_VPD is uninitialized or empty.
436 03:15:30.208179 FMAP: area RW_VPD found @ af8000 (8192 bytes)
437 03:15:30.214740 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 03:15:30.215212 Normal boot.
439 03:15:30.221223 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
440 03:15:30.224894 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 03:15:30.227749 CBFS @ c08000 size 3f8000
442 03:15:30.234707 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 03:15:30.237707 CBFS: Locating 'cpu_microcode_blob.bin'
444 03:15:30.241262 CBFS: Found @ offset 14700 size 2ec00
445 03:15:30.244236 microcode: sig=0x806ec pf=0x4 revision=0xc9
446 03:15:30.247968 Skip microcode update
447 03:15:30.254753 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 03:15:30.255274 CBFS @ c08000 size 3f8000
449 03:15:30.260736 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 03:15:30.264252 CBFS: Locating 'fsps.bin'
451 03:15:30.267286 CBFS: Found @ offset d1fc0 size 35000
452 03:15:30.293048 Detected 4 core, 8 thread CPU.
453 03:15:30.296489 Setting up SMI for CPU
454 03:15:30.300138 IED base = 0x9ac00000
455 03:15:30.300634 IED size = 0x00400000
456 03:15:30.302913 Will perform SMM setup.
457 03:15:30.310074 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
458 03:15:30.316531 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
459 03:15:30.319689 Processing 16 relocs. Offset value of 0x00030000
460 03:15:30.323464 Attempting to start 7 APs
461 03:15:30.326736 Waiting for 10ms after sending INIT.
462 03:15:30.342782 Waiting for 1st SIPI to complete...done.
463 03:15:30.343310 AP: slot 3 apic_id 3.
464 03:15:30.346197 AP: slot 5 apic_id 2.
465 03:15:30.349778 AP: slot 4 apic_id 4.
466 03:15:30.350271 AP: slot 1 apic_id 5.
467 03:15:30.352878 AP: slot 2 apic_id 1.
468 03:15:30.356442 Waiting for 2nd SIPI to complete...done.
469 03:15:30.359378 AP: slot 7 apic_id 6.
470 03:15:30.363063 AP: slot 6 apic_id 7.
471 03:15:30.369586 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
472 03:15:30.373439 Processing 13 relocs. Offset value of 0x00038000
473 03:15:30.379205 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
474 03:15:30.385772 Installing SMM handler to 0x9a000000
475 03:15:30.392851 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
476 03:15:30.396323 Processing 658 relocs. Offset value of 0x9a010000
477 03:15:30.405894 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
478 03:15:30.409717 Processing 13 relocs. Offset value of 0x9a008000
479 03:15:30.415678 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
480 03:15:30.422738 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
481 03:15:30.425736 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
482 03:15:30.432286 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
483 03:15:30.439150 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
484 03:15:30.445731 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
485 03:15:30.448666 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
486 03:15:30.455265 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
487 03:15:30.459315 Clearing SMI status registers
488 03:15:30.462421 SMI_STS: PM1
489 03:15:30.462876 PM1_STS: PWRBTN
490 03:15:30.465389 TCO_STS: SECOND_TO
491 03:15:30.468809 New SMBASE 0x9a000000
492 03:15:30.472422 In relocation handler: CPU 0
493 03:15:30.475559 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
494 03:15:30.478959 Writing SMRR. base = 0x9a000006, mask=0xff000800
495 03:15:30.482094 Relocation complete.
496 03:15:30.485465 New SMBASE 0x99fff800
497 03:15:30.488930 In relocation handler: CPU 2
498 03:15:30.491919 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
499 03:15:30.495506 Writing SMRR. base = 0x9a000006, mask=0xff000800
500 03:15:30.498934 Relocation complete.
501 03:15:30.501943 New SMBASE 0x99fff000
502 03:15:30.502382 In relocation handler: CPU 4
503 03:15:30.508629 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
504 03:15:30.512331 Writing SMRR. base = 0x9a000006, mask=0xff000800
505 03:15:30.515174 Relocation complete.
506 03:15:30.515615 New SMBASE 0x99fffc00
507 03:15:30.518713 In relocation handler: CPU 1
508 03:15:30.525531 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
509 03:15:30.528897 Writing SMRR. base = 0x9a000006, mask=0xff000800
510 03:15:30.532286 Relocation complete.
511 03:15:30.532725 New SMBASE 0x99fff400
512 03:15:30.535200 In relocation handler: CPU 3
513 03:15:30.541854 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
514 03:15:30.545178 Writing SMRR. base = 0x9a000006, mask=0xff000800
515 03:15:30.548397 Relocation complete.
516 03:15:30.548836 New SMBASE 0x99ffec00
517 03:15:30.551946 In relocation handler: CPU 5
518 03:15:30.555456 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
519 03:15:30.561576 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 03:15:30.565037 Relocation complete.
521 03:15:30.565476 New SMBASE 0x99ffe800
522 03:15:30.568872 In relocation handler: CPU 6
523 03:15:30.572125 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
524 03:15:30.578238 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 03:15:30.578682 Relocation complete.
526 03:15:30.581880 New SMBASE 0x99ffe400
527 03:15:30.584758 In relocation handler: CPU 7
528 03:15:30.588583 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
529 03:15:30.594721 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 03:15:30.595188 Relocation complete.
531 03:15:30.598454 Initializing CPU #0
532 03:15:30.601665 CPU: vendor Intel device 806ec
533 03:15:30.605073 CPU: family 06, model 8e, stepping 0c
534 03:15:30.608564 Clearing out pending MCEs
535 03:15:30.611241 Setting up local APIC...
536 03:15:30.611683 apic_id: 0x00 done.
537 03:15:30.614827 Turbo is available but hidden
538 03:15:30.618295 Turbo is available and visible
539 03:15:30.621215 VMX status: enabled
540 03:15:30.624850 IA32_FEATURE_CONTROL status: locked
541 03:15:30.627759 Skip microcode update
542 03:15:30.628205 CPU #0 initialized
543 03:15:30.631447 Initializing CPU #2
544 03:15:30.635102 Initializing CPU #4
545 03:15:30.635548 Initializing CPU #1
546 03:15:30.637904 CPU: vendor Intel device 806ec
547 03:15:30.641767 CPU: family 06, model 8e, stepping 0c
548 03:15:30.644661 Clearing out pending MCEs
549 03:15:30.648170 Initializing CPU #5
550 03:15:30.648610 Initializing CPU #3
551 03:15:30.650952 CPU: vendor Intel device 806ec
552 03:15:30.654285 CPU: family 06, model 8e, stepping 0c
553 03:15:30.658113 CPU: vendor Intel device 806ec
554 03:15:30.661334 CPU: family 06, model 8e, stepping 0c
555 03:15:30.664678 Clearing out pending MCEs
556 03:15:30.667658 Clearing out pending MCEs
557 03:15:30.670916 Setting up local APIC...
558 03:15:30.674241 CPU: vendor Intel device 806ec
559 03:15:30.677798 CPU: family 06, model 8e, stepping 0c
560 03:15:30.681297 CPU: vendor Intel device 806ec
561 03:15:30.684445 CPU: family 06, model 8e, stepping 0c
562 03:15:30.687574 Clearing out pending MCEs
563 03:15:30.691049 Clearing out pending MCEs
564 03:15:30.691528 Setting up local APIC...
565 03:15:30.693998 Setting up local APIC...
566 03:15:30.697380 apic_id: 0x02 done.
567 03:15:30.697834 apic_id: 0x03 done.
568 03:15:30.700850 VMX status: enabled
569 03:15:30.703847 VMX status: enabled
570 03:15:30.707526 IA32_FEATURE_CONTROL status: locked
571 03:15:30.711109 IA32_FEATURE_CONTROL status: locked
572 03:15:30.711554 Skip microcode update
573 03:15:30.714041 Skip microcode update
574 03:15:30.717489 CPU #5 initialized
575 03:15:30.717965 CPU #3 initialized
576 03:15:30.720849 Setting up local APIC...
577 03:15:30.724155 apic_id: 0x01 done.
578 03:15:30.724734 Initializing CPU #6
579 03:15:30.727548 Initializing CPU #7
580 03:15:30.731166 CPU: vendor Intel device 806ec
581 03:15:30.733907 CPU: family 06, model 8e, stepping 0c
582 03:15:30.737363 CPU: vendor Intel device 806ec
583 03:15:30.740817 CPU: family 06, model 8e, stepping 0c
584 03:15:30.743664 Clearing out pending MCEs
585 03:15:30.747158 Clearing out pending MCEs
586 03:15:30.750526 Setting up local APIC...
587 03:15:30.751044 Setting up local APIC...
588 03:15:30.753802 VMX status: enabled
589 03:15:30.757003 apic_id: 0x04 done.
590 03:15:30.757509 apic_id: 0x05 done.
591 03:15:30.760311 IA32_FEATURE_CONTROL status: locked
592 03:15:30.763460 apic_id: 0x06 done.
593 03:15:30.767057 Setting up local APIC...
594 03:15:30.767644 Skip microcode update
595 03:15:30.770550 apic_id: 0x07 done.
596 03:15:30.773904 VMX status: enabled
597 03:15:30.774352 VMX status: enabled
598 03:15:30.776936 IA32_FEATURE_CONTROL status: locked
599 03:15:30.780203 IA32_FEATURE_CONTROL status: locked
600 03:15:30.783796 Skip microcode update
601 03:15:30.787277 Skip microcode update
602 03:15:30.787760 CPU #7 initialized
603 03:15:30.790127 CPU #6 initialized
604 03:15:30.793867 CPU #2 initialized
605 03:15:30.794313 VMX status: enabled
606 03:15:30.797058 VMX status: enabled
607 03:15:30.800277 IA32_FEATURE_CONTROL status: locked
608 03:15:30.803363 IA32_FEATURE_CONTROL status: locked
609 03:15:30.806960 Skip microcode update
610 03:15:30.807498 Skip microcode update
611 03:15:30.810172 CPU #1 initialized
612 03:15:30.810738 CPU #4 initialized
613 03:15:30.817240 bsp_do_flight_plan done after 456 msecs.
614 03:15:30.820034 CPU: frequency set to 4200 MHz
615 03:15:30.820485 Enabling SMIs.
616 03:15:30.823578 Locking SMM.
617 03:15:30.836667 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
618 03:15:30.840226 CBFS @ c08000 size 3f8000
619 03:15:30.846428 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
620 03:15:30.846941 CBFS: Locating 'vbt.bin'
621 03:15:30.850131 CBFS: Found @ offset 5f5c0 size 499
622 03:15:30.856600 Found a VBT of 4608 bytes after decompression
623 03:15:31.039379 Display FSP Version Info HOB
624 03:15:31.042858 Reference Code - CPU = 9.0.1e.30
625 03:15:31.046267 uCode Version = 0.0.0.ca
626 03:15:31.049240 TXT ACM version = ff.ff.ff.ffff
627 03:15:31.053004 Display FSP Version Info HOB
628 03:15:31.056076 Reference Code - ME = 9.0.1e.30
629 03:15:31.059476 MEBx version = 0.0.0.0
630 03:15:31.062732 ME Firmware Version = Consumer SKU
631 03:15:31.065809 Display FSP Version Info HOB
632 03:15:31.069535 Reference Code - CML PCH = 9.0.1e.30
633 03:15:31.072726 PCH-CRID Status = Disabled
634 03:15:31.076186 PCH-CRID Original Value = ff.ff.ff.ffff
635 03:15:31.079443 PCH-CRID New Value = ff.ff.ff.ffff
636 03:15:31.082485 OPROM - RST - RAID = ff.ff.ff.ffff
637 03:15:31.085649 ChipsetInit Base Version = ff.ff.ff.ffff
638 03:15:31.089232 ChipsetInit Oem Version = ff.ff.ff.ffff
639 03:15:31.092277 Display FSP Version Info HOB
640 03:15:31.098886 Reference Code - SA - System Agent = 9.0.1e.30
641 03:15:31.102098 Reference Code - MRC = 0.7.1.6c
642 03:15:31.102565 SA - PCIe Version = 9.0.1e.30
643 03:15:31.105501 SA-CRID Status = Disabled
644 03:15:31.108797 SA-CRID Original Value = 0.0.0.c
645 03:15:31.112411 SA-CRID New Value = 0.0.0.c
646 03:15:31.115622 OPROM - VBIOS = ff.ff.ff.ffff
647 03:15:31.118576 RTC Init
648 03:15:31.121835 Set power on after power failure.
649 03:15:31.122282 Disabling Deep S3
650 03:15:31.125909 Disabling Deep S3
651 03:15:31.126355 Disabling Deep S4
652 03:15:31.128751 Disabling Deep S4
653 03:15:31.131881 Disabling Deep S5
654 03:15:31.132379 Disabling Deep S5
655 03:15:31.138403 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
656 03:15:31.141948 Enumerating buses...
657 03:15:31.145381 Show all devs... Before device enumeration.
658 03:15:31.148362 Root Device: enabled 1
659 03:15:31.148847 CPU_CLUSTER: 0: enabled 1
660 03:15:31.152058 DOMAIN: 0000: enabled 1
661 03:15:31.154933 APIC: 00: enabled 1
662 03:15:31.155461 PCI: 00:00.0: enabled 1
663 03:15:31.158463 PCI: 00:02.0: enabled 1
664 03:15:31.162302 PCI: 00:04.0: enabled 0
665 03:15:31.164913 PCI: 00:05.0: enabled 0
666 03:15:31.165375 PCI: 00:12.0: enabled 1
667 03:15:31.168632 PCI: 00:12.5: enabled 0
668 03:15:31.171614 PCI: 00:12.6: enabled 0
669 03:15:31.174999 PCI: 00:14.0: enabled 1
670 03:15:31.175484 PCI: 00:14.1: enabled 0
671 03:15:31.178032 PCI: 00:14.3: enabled 1
672 03:15:31.181852 PCI: 00:14.5: enabled 0
673 03:15:31.184648 PCI: 00:15.0: enabled 1
674 03:15:31.185124 PCI: 00:15.1: enabled 1
675 03:15:31.188365 PCI: 00:15.2: enabled 0
676 03:15:31.191729 PCI: 00:15.3: enabled 0
677 03:15:31.192172 PCI: 00:16.0: enabled 1
678 03:15:31.194942 PCI: 00:16.1: enabled 0
679 03:15:31.198061 PCI: 00:16.2: enabled 0
680 03:15:31.201588 PCI: 00:16.3: enabled 0
681 03:15:31.202033 PCI: 00:16.4: enabled 0
682 03:15:31.204814 PCI: 00:16.5: enabled 0
683 03:15:31.208185 PCI: 00:17.0: enabled 1
684 03:15:31.211481 PCI: 00:19.0: enabled 1
685 03:15:31.211920 PCI: 00:19.1: enabled 0
686 03:15:31.214820 PCI: 00:19.2: enabled 0
687 03:15:31.217877 PCI: 00:1a.0: enabled 0
688 03:15:31.221249 PCI: 00:1c.0: enabled 0
689 03:15:31.221690 PCI: 00:1c.1: enabled 0
690 03:15:31.224577 PCI: 00:1c.2: enabled 0
691 03:15:31.227859 PCI: 00:1c.3: enabled 0
692 03:15:31.228302 PCI: 00:1c.4: enabled 0
693 03:15:31.231053 PCI: 00:1c.5: enabled 0
694 03:15:31.234684 PCI: 00:1c.6: enabled 0
695 03:15:31.237701 PCI: 00:1c.7: enabled 0
696 03:15:31.238180 PCI: 00:1d.0: enabled 1
697 03:15:31.241570 PCI: 00:1d.1: enabled 0
698 03:15:31.244292 PCI: 00:1d.2: enabled 0
699 03:15:31.247819 PCI: 00:1d.3: enabled 0
700 03:15:31.248300 PCI: 00:1d.4: enabled 0
701 03:15:31.250934 PCI: 00:1d.5: enabled 1
702 03:15:31.254217 PCI: 00:1e.0: enabled 1
703 03:15:31.257924 PCI: 00:1e.1: enabled 0
704 03:15:31.258464 PCI: 00:1e.2: enabled 1
705 03:15:31.261088 PCI: 00:1e.3: enabled 1
706 03:15:31.264325 PCI: 00:1f.0: enabled 1
707 03:15:31.267851 PCI: 00:1f.1: enabled 1
708 03:15:31.268341 PCI: 00:1f.2: enabled 1
709 03:15:31.270775 PCI: 00:1f.3: enabled 1
710 03:15:31.274483 PCI: 00:1f.4: enabled 1
711 03:15:31.274993 PCI: 00:1f.5: enabled 1
712 03:15:31.277491 PCI: 00:1f.6: enabled 0
713 03:15:31.281263 USB0 port 0: enabled 1
714 03:15:31.284014 I2C: 00:15: enabled 1
715 03:15:31.284506 I2C: 00:5d: enabled 1
716 03:15:31.287589 GENERIC: 0.0: enabled 1
717 03:15:31.290864 I2C: 00:1a: enabled 1
718 03:15:31.291347 I2C: 00:38: enabled 1
719 03:15:31.294168 I2C: 00:39: enabled 1
720 03:15:31.297207 I2C: 00:3a: enabled 1
721 03:15:31.297696 I2C: 00:3b: enabled 1
722 03:15:31.300717 PCI: 00:00.0: enabled 1
723 03:15:31.304133 SPI: 00: enabled 1
724 03:15:31.304573 SPI: 01: enabled 1
725 03:15:31.307589 PNP: 0c09.0: enabled 1
726 03:15:31.310849 USB2 port 0: enabled 1
727 03:15:31.311348 USB2 port 1: enabled 1
728 03:15:31.314177 USB2 port 2: enabled 0
729 03:15:31.317286 USB2 port 3: enabled 0
730 03:15:31.320830 USB2 port 5: enabled 0
731 03:15:31.321285 USB2 port 6: enabled 1
732 03:15:31.324002 USB2 port 9: enabled 1
733 03:15:31.327810 USB3 port 0: enabled 1
734 03:15:31.328306 USB3 port 1: enabled 1
735 03:15:31.330219 USB3 port 2: enabled 1
736 03:15:31.333793 USB3 port 3: enabled 1
737 03:15:31.334282 USB3 port 4: enabled 0
738 03:15:31.337401 APIC: 05: enabled 1
739 03:15:31.340400 APIC: 01: enabled 1
740 03:15:31.340887 APIC: 03: enabled 1
741 03:15:31.343590 APIC: 04: enabled 1
742 03:15:31.347037 APIC: 02: enabled 1
743 03:15:31.347516 APIC: 07: enabled 1
744 03:15:31.350574 APIC: 06: enabled 1
745 03:15:31.351050 Compare with tree...
746 03:15:31.353642 Root Device: enabled 1
747 03:15:31.357153 CPU_CLUSTER: 0: enabled 1
748 03:15:31.360293 APIC: 00: enabled 1
749 03:15:31.360894 APIC: 05: enabled 1
750 03:15:31.363740 APIC: 01: enabled 1
751 03:15:31.366475 APIC: 03: enabled 1
752 03:15:31.366912 APIC: 04: enabled 1
753 03:15:31.370236 APIC: 02: enabled 1
754 03:15:31.373485 APIC: 07: enabled 1
755 03:15:31.373951 APIC: 06: enabled 1
756 03:15:31.376793 DOMAIN: 0000: enabled 1
757 03:15:31.380147 PCI: 00:00.0: enabled 1
758 03:15:31.383015 PCI: 00:02.0: enabled 1
759 03:15:31.386566 PCI: 00:04.0: enabled 0
760 03:15:31.387006 PCI: 00:05.0: enabled 0
761 03:15:31.390156 PCI: 00:12.0: enabled 1
762 03:15:31.393699 PCI: 00:12.5: enabled 0
763 03:15:31.396607 PCI: 00:12.6: enabled 0
764 03:15:31.399814 PCI: 00:14.0: enabled 1
765 03:15:31.400273 USB0 port 0: enabled 1
766 03:15:31.402914 USB2 port 0: enabled 1
767 03:15:31.406575 USB2 port 1: enabled 1
768 03:15:31.409895 USB2 port 2: enabled 0
769 03:15:31.413430 USB2 port 3: enabled 0
770 03:15:31.413870 USB2 port 5: enabled 0
771 03:15:31.416373 USB2 port 6: enabled 1
772 03:15:31.419703 USB2 port 9: enabled 1
773 03:15:31.422997 USB3 port 0: enabled 1
774 03:15:31.426802 USB3 port 1: enabled 1
775 03:15:31.430131 USB3 port 2: enabled 1
776 03:15:31.430570 USB3 port 3: enabled 1
777 03:15:31.433173 USB3 port 4: enabled 0
778 03:15:31.436502 PCI: 00:14.1: enabled 0
779 03:15:31.440112 PCI: 00:14.3: enabled 1
780 03:15:31.443220 PCI: 00:14.5: enabled 0
781 03:15:31.443664 PCI: 00:15.0: enabled 1
782 03:15:31.446799 I2C: 00:15: enabled 1
783 03:15:31.449645 PCI: 00:15.1: enabled 1
784 03:15:31.452970 I2C: 00:5d: enabled 1
785 03:15:31.453596 GENERIC: 0.0: enabled 1
786 03:15:31.456015 PCI: 00:15.2: enabled 0
787 03:15:31.459542 PCI: 00:15.3: enabled 0
788 03:15:31.462869 PCI: 00:16.0: enabled 1
789 03:15:31.466432 PCI: 00:16.1: enabled 0
790 03:15:31.466886 PCI: 00:16.2: enabled 0
791 03:15:31.469424 PCI: 00:16.3: enabled 0
792 03:15:31.472974 PCI: 00:16.4: enabled 0
793 03:15:31.476347 PCI: 00:16.5: enabled 0
794 03:15:31.479698 PCI: 00:17.0: enabled 1
795 03:15:31.480303 PCI: 00:19.0: enabled 1
796 03:15:31.482745 I2C: 00:1a: enabled 1
797 03:15:31.486095 I2C: 00:38: enabled 1
798 03:15:31.489313 I2C: 00:39: enabled 1
799 03:15:31.489757 I2C: 00:3a: enabled 1
800 03:15:31.492862 I2C: 00:3b: enabled 1
801 03:15:31.496289 PCI: 00:19.1: enabled 0
802 03:15:31.499249 PCI: 00:19.2: enabled 0
803 03:15:31.502628 PCI: 00:1a.0: enabled 0
804 03:15:31.503075 PCI: 00:1c.0: enabled 0
805 03:15:31.505996 PCI: 00:1c.1: enabled 0
806 03:15:31.509428 PCI: 00:1c.2: enabled 0
807 03:15:31.512454 PCI: 00:1c.3: enabled 0
808 03:15:31.515803 PCI: 00:1c.4: enabled 0
809 03:15:31.516271 PCI: 00:1c.5: enabled 0
810 03:15:31.519047 PCI: 00:1c.6: enabled 0
811 03:15:31.522435 PCI: 00:1c.7: enabled 0
812 03:15:31.525826 PCI: 00:1d.0: enabled 1
813 03:15:31.529205 PCI: 00:1d.1: enabled 0
814 03:15:31.529686 PCI: 00:1d.2: enabled 0
815 03:15:31.532709 PCI: 00:1d.3: enabled 0
816 03:15:31.535708 PCI: 00:1d.4: enabled 0
817 03:15:31.539211 PCI: 00:1d.5: enabled 1
818 03:15:31.542435 PCI: 00:00.0: enabled 1
819 03:15:31.542916 PCI: 00:1e.0: enabled 1
820 03:15:31.545389 PCI: 00:1e.1: enabled 0
821 03:15:31.549246 PCI: 00:1e.2: enabled 1
822 03:15:31.552535 SPI: 00: enabled 1
823 03:15:31.552999 PCI: 00:1e.3: enabled 1
824 03:15:31.555518 SPI: 01: enabled 1
825 03:15:31.559002 PCI: 00:1f.0: enabled 1
826 03:15:31.562044 PNP: 0c09.0: enabled 1
827 03:15:31.562482 PCI: 00:1f.1: enabled 1
828 03:15:31.565501 PCI: 00:1f.2: enabled 1
829 03:15:31.569221 PCI: 00:1f.3: enabled 1
830 03:15:31.572448 PCI: 00:1f.4: enabled 1
831 03:15:31.575645 PCI: 00:1f.5: enabled 1
832 03:15:31.576114 PCI: 00:1f.6: enabled 0
833 03:15:31.579061 Root Device scanning...
834 03:15:31.581829 scan_static_bus for Root Device
835 03:15:31.585645 CPU_CLUSTER: 0 enabled
836 03:15:31.589210 DOMAIN: 0000 enabled
837 03:15:31.589652 DOMAIN: 0000 scanning...
838 03:15:31.591944 PCI: pci_scan_bus for bus 00
839 03:15:31.595707 PCI: 00:00.0 [8086/0000] ops
840 03:15:31.599122 PCI: 00:00.0 [8086/9b61] enabled
841 03:15:31.601695 PCI: 00:02.0 [8086/0000] bus ops
842 03:15:31.605389 PCI: 00:02.0 [8086/9b41] enabled
843 03:15:31.608989 PCI: 00:04.0 [8086/1903] disabled
844 03:15:31.611809 PCI: 00:08.0 [8086/1911] enabled
845 03:15:31.615349 PCI: 00:12.0 [8086/02f9] enabled
846 03:15:31.618650 PCI: 00:14.0 [8086/0000] bus ops
847 03:15:31.622123 PCI: 00:14.0 [8086/02ed] enabled
848 03:15:31.625554 PCI: 00:14.2 [8086/02ef] enabled
849 03:15:31.628823 PCI: 00:14.3 [8086/02f0] enabled
850 03:15:31.632359 PCI: 00:15.0 [8086/0000] bus ops
851 03:15:31.635523 PCI: 00:15.0 [8086/02e8] enabled
852 03:15:31.638372 PCI: 00:15.1 [8086/0000] bus ops
853 03:15:31.641945 PCI: 00:15.1 [8086/02e9] enabled
854 03:15:31.645104 PCI: 00:16.0 [8086/0000] ops
855 03:15:31.648544 PCI: 00:16.0 [8086/02e0] enabled
856 03:15:31.651897 PCI: 00:17.0 [8086/0000] ops
857 03:15:31.655343 PCI: 00:17.0 [8086/02d3] enabled
858 03:15:31.658316 PCI: 00:19.0 [8086/0000] bus ops
859 03:15:31.661971 PCI: 00:19.0 [8086/02c5] enabled
860 03:15:31.664880 PCI: 00:1d.0 [8086/0000] bus ops
861 03:15:31.668633 PCI: 00:1d.0 [8086/02b0] enabled
862 03:15:31.675036 PCI: Static device PCI: 00:1d.5 not found, disabling it.
863 03:15:31.678735 PCI: 00:1e.0 [8086/0000] ops
864 03:15:31.681520 PCI: 00:1e.0 [8086/02a8] enabled
865 03:15:31.684920 PCI: 00:1e.2 [8086/0000] bus ops
866 03:15:31.688293 PCI: 00:1e.2 [8086/02aa] enabled
867 03:15:31.691829 PCI: 00:1e.3 [8086/0000] bus ops
868 03:15:31.694785 PCI: 00:1e.3 [8086/02ab] enabled
869 03:15:31.698325 PCI: 00:1f.0 [8086/0000] bus ops
870 03:15:31.701355 PCI: 00:1f.0 [8086/0284] enabled
871 03:15:31.705023 PCI: Static device PCI: 00:1f.1 not found, disabling it.
872 03:15:31.711811 PCI: Static device PCI: 00:1f.2 not found, disabling it.
873 03:15:31.714680 PCI: 00:1f.3 [8086/0000] bus ops
874 03:15:31.718301 PCI: 00:1f.3 [8086/02c8] enabled
875 03:15:31.721823 PCI: 00:1f.4 [8086/0000] bus ops
876 03:15:31.724674 PCI: 00:1f.4 [8086/02a3] enabled
877 03:15:31.727967 PCI: 00:1f.5 [8086/0000] bus ops
878 03:15:31.731215 PCI: 00:1f.5 [8086/02a4] enabled
879 03:15:31.735134 PCI: Leftover static devices:
880 03:15:31.735578 PCI: 00:05.0
881 03:15:31.737873 PCI: 00:12.5
882 03:15:31.738350 PCI: 00:12.6
883 03:15:31.741201 PCI: 00:14.1
884 03:15:31.741639 PCI: 00:14.5
885 03:15:31.741992 PCI: 00:15.2
886 03:15:31.744989 PCI: 00:15.3
887 03:15:31.745530 PCI: 00:16.1
888 03:15:31.747916 PCI: 00:16.2
889 03:15:31.748355 PCI: 00:16.3
890 03:15:31.751555 PCI: 00:16.4
891 03:15:31.751993 PCI: 00:16.5
892 03:15:31.752343 PCI: 00:19.1
893 03:15:31.754748 PCI: 00:19.2
894 03:15:31.755229 PCI: 00:1a.0
895 03:15:31.757783 PCI: 00:1c.0
896 03:15:31.758222 PCI: 00:1c.1
897 03:15:31.758570 PCI: 00:1c.2
898 03:15:31.761003 PCI: 00:1c.3
899 03:15:31.761441 PCI: 00:1c.4
900 03:15:31.764546 PCI: 00:1c.5
901 03:15:31.764983 PCI: 00:1c.6
902 03:15:31.765378 PCI: 00:1c.7
903 03:15:31.767951 PCI: 00:1d.1
904 03:15:31.768387 PCI: 00:1d.2
905 03:15:31.771357 PCI: 00:1d.3
906 03:15:31.771822 PCI: 00:1d.4
907 03:15:31.774280 PCI: 00:1d.5
908 03:15:31.774668 PCI: 00:1e.1
909 03:15:31.775001 PCI: 00:1f.1
910 03:15:31.777808 PCI: 00:1f.2
911 03:15:31.778162 PCI: 00:1f.6
912 03:15:31.781433 PCI: Check your devicetree.cb.
913 03:15:31.784285 PCI: 00:02.0 scanning...
914 03:15:31.787838 scan_generic_bus for PCI: 00:02.0
915 03:15:31.791223 scan_generic_bus for PCI: 00:02.0 done
916 03:15:31.797541 scan_bus: scanning of bus PCI: 00:02.0 took 10180 usecs
917 03:15:31.801008 PCI: 00:14.0 scanning...
918 03:15:31.804555 scan_static_bus for PCI: 00:14.0
919 03:15:31.804994 USB0 port 0 enabled
920 03:15:31.807532 USB0 port 0 scanning...
921 03:15:31.810918 scan_static_bus for USB0 port 0
922 03:15:31.814535 USB2 port 0 enabled
923 03:15:31.814974 USB2 port 1 enabled
924 03:15:31.817487 USB2 port 2 disabled
925 03:15:31.821035 USB2 port 3 disabled
926 03:15:31.821473 USB2 port 5 disabled
927 03:15:31.824298 USB2 port 6 enabled
928 03:15:31.827764 USB2 port 9 enabled
929 03:15:31.828222 USB3 port 0 enabled
930 03:15:31.830800 USB3 port 1 enabled
931 03:15:31.831266 USB3 port 2 enabled
932 03:15:31.834210 USB3 port 3 enabled
933 03:15:31.837631 USB3 port 4 disabled
934 03:15:31.838075 USB2 port 0 scanning...
935 03:15:31.840897 scan_static_bus for USB2 port 0
936 03:15:31.847630 scan_static_bus for USB2 port 0 done
937 03:15:31.851210 scan_bus: scanning of bus USB2 port 0 took 9711 usecs
938 03:15:31.854143 USB2 port 1 scanning...
939 03:15:31.857246 scan_static_bus for USB2 port 1
940 03:15:31.860761 scan_static_bus for USB2 port 1 done
941 03:15:31.867559 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
942 03:15:31.868038 USB2 port 6 scanning...
943 03:15:31.870831 scan_static_bus for USB2 port 6
944 03:15:31.877780 scan_static_bus for USB2 port 6 done
945 03:15:31.880771 scan_bus: scanning of bus USB2 port 6 took 9713 usecs
946 03:15:31.883806 USB2 port 9 scanning...
947 03:15:31.887355 scan_static_bus for USB2 port 9
948 03:15:31.891045 scan_static_bus for USB2 port 9 done
949 03:15:31.897059 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
950 03:15:31.897555 USB3 port 0 scanning...
951 03:15:31.901009 scan_static_bus for USB3 port 0
952 03:15:31.907560 scan_static_bus for USB3 port 0 done
953 03:15:31.911279 scan_bus: scanning of bus USB3 port 0 took 9694 usecs
954 03:15:31.913910 USB3 port 1 scanning...
955 03:15:31.917558 scan_static_bus for USB3 port 1
956 03:15:31.920743 scan_static_bus for USB3 port 1 done
957 03:15:31.927196 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
958 03:15:31.927642 USB3 port 2 scanning...
959 03:15:31.930583 scan_static_bus for USB3 port 2
960 03:15:31.937618 scan_static_bus for USB3 port 2 done
961 03:15:31.941034 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
962 03:15:31.943883 USB3 port 3 scanning...
963 03:15:31.947378 scan_static_bus for USB3 port 3
964 03:15:31.950974 scan_static_bus for USB3 port 3 done
965 03:15:31.957452 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
966 03:15:31.961021 scan_static_bus for USB0 port 0 done
967 03:15:31.967052 scan_bus: scanning of bus USB0 port 0 took 155420 usecs
968 03:15:31.970395 scan_static_bus for PCI: 00:14.0 done
969 03:15:31.974030 scan_bus: scanning of bus PCI: 00:14.0 took 173038 usecs
970 03:15:31.977247 PCI: 00:15.0 scanning...
971 03:15:31.980365 scan_generic_bus for PCI: 00:15.0
972 03:15:31.983719 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
973 03:15:31.990555 scan_generic_bus for PCI: 00:15.0 done
974 03:15:31.993851 scan_bus: scanning of bus PCI: 00:15.0 took 14294 usecs
975 03:15:31.997339 PCI: 00:15.1 scanning...
976 03:15:32.000196 scan_generic_bus for PCI: 00:15.1
977 03:15:32.003620 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
978 03:15:32.010156 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
979 03:15:32.013625 scan_generic_bus for PCI: 00:15.1 done
980 03:15:32.020141 scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs
981 03:15:32.020586 PCI: 00:19.0 scanning...
982 03:15:32.023734 scan_generic_bus for PCI: 00:19.0
983 03:15:32.030027 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
984 03:15:32.033384 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
985 03:15:32.036379 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
986 03:15:32.039639 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
987 03:15:32.046544 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
988 03:15:32.049705 scan_generic_bus for PCI: 00:19.0 done
989 03:15:32.053262 scan_bus: scanning of bus PCI: 00:19.0 took 30741 usecs
990 03:15:32.056542 PCI: 00:1d.0 scanning...
991 03:15:32.059721 do_pci_scan_bridge for PCI: 00:1d.0
992 03:15:32.063327 PCI: pci_scan_bus for bus 01
993 03:15:32.066655 PCI: 01:00.0 [1c5c/1327] enabled
994 03:15:32.070016 Enabling Common Clock Configuration
995 03:15:32.076370 L1 Sub-State supported from root port 29
996 03:15:32.079527 L1 Sub-State Support = 0xf
997 03:15:32.079624 CommonModeRestoreTime = 0x28
998 03:15:32.086352 Power On Value = 0x16, Power On Scale = 0x0
999 03:15:32.086456 ASPM: Enabled L1
1000 03:15:32.092723 scan_bus: scanning of bus PCI: 00:1d.0 took 32789 usecs
1001 03:15:32.096450 PCI: 00:1e.2 scanning...
1002 03:15:32.099568 scan_generic_bus for PCI: 00:1e.2
1003 03:15:32.103038 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1004 03:15:32.106150 scan_generic_bus for PCI: 00:1e.2 done
1005 03:15:32.113023 scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs
1006 03:15:32.115945 PCI: 00:1e.3 scanning...
1007 03:15:32.119581 scan_generic_bus for PCI: 00:1e.3
1008 03:15:32.122653 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1009 03:15:32.126171 scan_generic_bus for PCI: 00:1e.3 done
1010 03:15:32.132536 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
1011 03:15:32.132633 PCI: 00:1f.0 scanning...
1012 03:15:32.139670 scan_static_bus for PCI: 00:1f.0
1013 03:15:32.139768 PNP: 0c09.0 enabled
1014 03:15:32.142572 scan_static_bus for PCI: 00:1f.0 done
1015 03:15:32.149080 scan_bus: scanning of bus PCI: 00:1f.0 took 12058 usecs
1016 03:15:32.152598 PCI: 00:1f.3 scanning...
1017 03:15:32.156223 scan_bus: scanning of bus PCI: 00:1f.3 took 2853 usecs
1018 03:15:32.159267 PCI: 00:1f.4 scanning...
1019 03:15:32.162900 scan_generic_bus for PCI: 00:1f.4
1020 03:15:32.169389 scan_generic_bus for PCI: 00:1f.4 done
1021 03:15:32.172801 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1022 03:15:32.175982 PCI: 00:1f.5 scanning...
1023 03:15:32.179348 scan_generic_bus for PCI: 00:1f.5
1024 03:15:32.182744 scan_generic_bus for PCI: 00:1f.5 done
1025 03:15:32.188870 scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs
1026 03:15:32.195937 scan_bus: scanning of bus DOMAIN: 0000 took 605211 usecs
1027 03:15:32.199314 scan_static_bus for Root Device done
1028 03:15:32.202463 scan_bus: scanning of bus Root Device took 625089 usecs
1029 03:15:32.205919 done
1030 03:15:32.209023 Chrome EC: UHEPI supported
1031 03:15:32.212285 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1032 03:15:32.219287 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1033 03:15:32.225773 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1034 03:15:32.232348 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1035 03:15:32.235894 SPI flash protection: WPSW=0 SRP0=0
1036 03:15:32.242338 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1037 03:15:32.245425 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1038 03:15:32.249075 found VGA at PCI: 00:02.0
1039 03:15:32.252341 Setting up VGA for PCI: 00:02.0
1040 03:15:32.258676 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1041 03:15:32.262299 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1042 03:15:32.265551 Allocating resources...
1043 03:15:32.268934 Reading resources...
1044 03:15:32.272244 Root Device read_resources bus 0 link: 0
1045 03:15:32.275472 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1046 03:15:32.282073 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1047 03:15:32.285350 DOMAIN: 0000 read_resources bus 0 link: 0
1048 03:15:32.292514 PCI: 00:14.0 read_resources bus 0 link: 0
1049 03:15:32.295820 USB0 port 0 read_resources bus 0 link: 0
1050 03:15:32.304683 USB0 port 0 read_resources bus 0 link: 0 done
1051 03:15:32.307696 PCI: 00:14.0 read_resources bus 0 link: 0 done
1052 03:15:32.315354 PCI: 00:15.0 read_resources bus 1 link: 0
1053 03:15:32.318316 PCI: 00:15.0 read_resources bus 1 link: 0 done
1054 03:15:32.325163 PCI: 00:15.1 read_resources bus 2 link: 0
1055 03:15:32.328238 PCI: 00:15.1 read_resources bus 2 link: 0 done
1056 03:15:32.335548 PCI: 00:19.0 read_resources bus 3 link: 0
1057 03:15:32.341995 PCI: 00:19.0 read_resources bus 3 link: 0 done
1058 03:15:32.345684 PCI: 00:1d.0 read_resources bus 1 link: 0
1059 03:15:32.352409 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1060 03:15:32.355641 PCI: 00:1e.2 read_resources bus 4 link: 0
1061 03:15:32.362074 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1062 03:15:32.365434 PCI: 00:1e.3 read_resources bus 5 link: 0
1063 03:15:32.371699 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1064 03:15:32.375387 PCI: 00:1f.0 read_resources bus 0 link: 0
1065 03:15:32.382061 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1066 03:15:32.388643 DOMAIN: 0000 read_resources bus 0 link: 0 done
1067 03:15:32.391603 Root Device read_resources bus 0 link: 0 done
1068 03:15:32.394894 Done reading resources.
1069 03:15:32.401866 Show resources in subtree (Root Device)...After reading.
1070 03:15:32.405045 Root Device child on link 0 CPU_CLUSTER: 0
1071 03:15:32.407980 CPU_CLUSTER: 0 child on link 0 APIC: 00
1072 03:15:32.411331 APIC: 00
1073 03:15:32.411778 APIC: 05
1074 03:15:32.412130 APIC: 01
1075 03:15:32.414833 APIC: 03
1076 03:15:32.415322 APIC: 04
1077 03:15:32.415675 APIC: 02
1078 03:15:32.418474 APIC: 07
1079 03:15:32.418911 APIC: 06
1080 03:15:32.424934 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1081 03:15:32.431807 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1082 03:15:32.481469 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1083 03:15:32.481933 PCI: 00:00.0
1084 03:15:32.482766 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1085 03:15:32.483256 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1086 03:15:32.484024 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1087 03:15:32.484479 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1088 03:15:32.531172 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1089 03:15:32.531985 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1090 03:15:32.532382 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1091 03:15:32.532728 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1092 03:15:32.533371 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1093 03:15:32.565786 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1094 03:15:32.566641 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1095 03:15:32.567117 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1096 03:15:32.569953 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1097 03:15:32.576289 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1098 03:15:32.586363 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1099 03:15:32.593261 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1100 03:15:32.596143 PCI: 00:02.0
1101 03:15:32.605901 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1102 03:15:32.616535 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1103 03:15:32.626278 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1104 03:15:32.626884 PCI: 00:04.0
1105 03:15:32.629130 PCI: 00:08.0
1106 03:15:32.639180 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1107 03:15:32.639648 PCI: 00:12.0
1108 03:15:32.649299 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1109 03:15:32.652492 PCI: 00:14.0 child on link 0 USB0 port 0
1110 03:15:32.662525 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1111 03:15:32.668912 USB0 port 0 child on link 0 USB2 port 0
1112 03:15:32.669352 USB2 port 0
1113 03:15:32.672626 USB2 port 1
1114 03:15:32.673105 USB2 port 2
1115 03:15:32.675508 USB2 port 3
1116 03:15:32.675952 USB2 port 5
1117 03:15:32.678982 USB2 port 6
1118 03:15:32.679510 USB2 port 9
1119 03:15:32.682424 USB3 port 0
1120 03:15:32.685514 USB3 port 1
1121 03:15:32.685993 USB3 port 2
1122 03:15:32.688868 USB3 port 3
1123 03:15:32.689308 USB3 port 4
1124 03:15:32.692458 PCI: 00:14.2
1125 03:15:32.701940 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1126 03:15:32.711913 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1127 03:15:32.712360 PCI: 00:14.3
1128 03:15:32.722016 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1129 03:15:32.725006 PCI: 00:15.0 child on link 0 I2C: 01:15
1130 03:15:32.735366 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1131 03:15:32.738387 I2C: 01:15
1132 03:15:32.741719 PCI: 00:15.1 child on link 0 I2C: 02:5d
1133 03:15:32.751849 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 03:15:32.754732 I2C: 02:5d
1135 03:15:32.755188 GENERIC: 0.0
1136 03:15:32.758339 PCI: 00:16.0
1137 03:15:32.768238 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 03:15:32.768683 PCI: 00:17.0
1139 03:15:32.778028 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1140 03:15:32.788228 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1141 03:15:32.794972 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1142 03:15:32.804449 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1143 03:15:32.811314 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1144 03:15:32.821103 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1145 03:15:32.824263 PCI: 00:19.0 child on link 0 I2C: 03:1a
1146 03:15:32.834611 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 03:15:32.837952 I2C: 03:1a
1148 03:15:32.838393 I2C: 03:38
1149 03:15:32.840874 I2C: 03:39
1150 03:15:32.841309 I2C: 03:3a
1151 03:15:32.844711 I2C: 03:3b
1152 03:15:32.847931 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1153 03:15:32.857735 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1154 03:15:32.864433 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1155 03:15:32.873924 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1156 03:15:32.877635 PCI: 01:00.0
1157 03:15:32.887284 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1158 03:15:32.887734 PCI: 00:1e.0
1159 03:15:32.900383 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1160 03:15:32.910322 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1161 03:15:32.913933 PCI: 00:1e.2 child on link 0 SPI: 00
1162 03:15:32.923796 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 03:15:32.924242 SPI: 00
1164 03:15:32.926853 PCI: 00:1e.3 child on link 0 SPI: 01
1165 03:15:32.937194 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 03:15:32.940911 SPI: 01
1167 03:15:32.943988 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1168 03:15:32.953862 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1169 03:15:32.960061 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1170 03:15:32.963773 PNP: 0c09.0
1171 03:15:32.973261 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1172 03:15:32.973706 PCI: 00:1f.3
1173 03:15:32.983261 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 03:15:32.993515 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1175 03:15:32.996487 PCI: 00:1f.4
1176 03:15:33.003027 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1177 03:15:33.013316 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1178 03:15:33.016324 PCI: 00:1f.5
1179 03:15:33.026593 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1180 03:15:33.032787 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1181 03:15:33.036210 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1182 03:15:33.045904 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1183 03:15:33.049814 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1184 03:15:33.052818 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1185 03:15:33.055983 PCI: 00:17.0 18 * [0x60 - 0x67] io
1186 03:15:33.059381 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1187 03:15:33.066547 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1188 03:15:33.073036 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1189 03:15:33.079525 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1190 03:15:33.089079 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1191 03:15:33.095732 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1192 03:15:33.099347 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1193 03:15:33.108837 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1194 03:15:33.112144 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1195 03:15:33.115721 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1196 03:15:33.122216 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1197 03:15:33.125730 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1198 03:15:33.132652 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1199 03:15:33.135419 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1200 03:15:33.141947 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1201 03:15:33.145205 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1202 03:15:33.151934 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1203 03:15:33.155141 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1204 03:15:33.161694 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1205 03:15:33.165124 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1206 03:15:33.171799 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1207 03:15:33.175294 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1208 03:15:33.178279 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1209 03:15:33.185112 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1210 03:15:33.188706 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1211 03:15:33.194856 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1212 03:15:33.198343 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1213 03:15:33.204861 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1214 03:15:33.207857 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1215 03:15:33.214956 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1216 03:15:33.217899 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1217 03:15:33.227893 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1218 03:15:33.231065 avoid_fixed_resources: DOMAIN: 0000
1219 03:15:33.237706 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1220 03:15:33.244189 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1221 03:15:33.251273 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1222 03:15:33.257609 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1223 03:15:33.267860 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1224 03:15:33.274348 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1225 03:15:33.281270 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1226 03:15:33.287427 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1227 03:15:33.297529 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1228 03:15:33.304055 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1229 03:15:33.311009 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1230 03:15:33.317536 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1231 03:15:33.320488 Setting resources...
1232 03:15:33.327028 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1233 03:15:33.330725 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1234 03:15:33.333698 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1235 03:15:33.340176 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1236 03:15:33.343868 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1237 03:15:33.350098 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1238 03:15:33.357016 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1239 03:15:33.363446 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1240 03:15:33.370008 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1241 03:15:33.373654 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1242 03:15:33.380052 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1243 03:15:33.383383 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1244 03:15:33.389969 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1245 03:15:33.393265 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1246 03:15:33.399818 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1247 03:15:33.403472 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1248 03:15:33.409886 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1249 03:15:33.412915 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1250 03:15:33.419941 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1251 03:15:33.422986 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1252 03:15:33.429490 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1253 03:15:33.432875 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1254 03:15:33.439281 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1255 03:15:33.443026 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1256 03:15:33.446024 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1257 03:15:33.452593 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1258 03:15:33.456020 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1259 03:15:33.462441 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1260 03:15:33.466266 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1261 03:15:33.472721 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1262 03:15:33.475950 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1263 03:15:33.482396 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1264 03:15:33.489349 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1265 03:15:33.495827 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1266 03:15:33.502375 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1267 03:15:33.512386 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1268 03:15:33.515510 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1269 03:15:33.522684 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1270 03:15:33.528952 Root Device assign_resources, bus 0 link: 0
1271 03:15:33.531922 DOMAIN: 0000 assign_resources, bus 0 link: 0
1272 03:15:33.542336 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1273 03:15:33.549011 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1274 03:15:33.558862 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1275 03:15:33.565104 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1276 03:15:33.575009 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1277 03:15:33.581802 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1278 03:15:33.584721 PCI: 00:14.0 assign_resources, bus 0 link: 0
1279 03:15:33.591440 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 03:15:33.598075 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1281 03:15:33.607885 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1282 03:15:33.615013 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1283 03:15:33.624946 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1284 03:15:33.627799 PCI: 00:15.0 assign_resources, bus 1 link: 0
1285 03:15:33.634507 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 03:15:33.641105 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1287 03:15:33.644612 PCI: 00:15.1 assign_resources, bus 2 link: 0
1288 03:15:33.651319 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 03:15:33.657851 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1290 03:15:33.667916 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1291 03:15:33.674533 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1292 03:15:33.684136 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1293 03:15:33.690887 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1294 03:15:33.697459 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1295 03:15:33.704369 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1296 03:15:33.714646 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1297 03:15:33.717635 PCI: 00:19.0 assign_resources, bus 3 link: 0
1298 03:15:33.724064 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 03:15:33.730938 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1300 03:15:33.741198 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1301 03:15:33.750710 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1302 03:15:33.754122 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1303 03:15:33.763614 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1304 03:15:33.767059 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1305 03:15:33.773564 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1306 03:15:33.783811 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1307 03:15:33.787029 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1308 03:15:33.793727 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 03:15:33.800166 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1310 03:15:33.807093 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1311 03:15:33.810440 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 03:15:33.813566 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1313 03:15:33.820904 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 03:15:33.824319 LPC: Trying to open IO window from 800 size 1ff
1315 03:15:33.834179 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1316 03:15:33.840835 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1317 03:15:33.850625 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1318 03:15:33.857075 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1319 03:15:33.863653 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 03:15:33.867257 Root Device assign_resources, bus 0 link: 0
1321 03:15:33.870674 Done setting resources.
1322 03:15:33.876747 Show resources in subtree (Root Device)...After assigning values.
1323 03:15:33.880586 Root Device child on link 0 CPU_CLUSTER: 0
1324 03:15:33.883393 CPU_CLUSTER: 0 child on link 0 APIC: 00
1325 03:15:33.886948 APIC: 00
1326 03:15:33.887411 APIC: 05
1327 03:15:33.890260 APIC: 01
1328 03:15:33.890711 APIC: 03
1329 03:15:33.891052 APIC: 04
1330 03:15:33.893677 APIC: 02
1331 03:15:33.894106 APIC: 07
1332 03:15:33.894551 APIC: 06
1333 03:15:33.899999 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1334 03:15:33.910112 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1335 03:15:33.920060 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1336 03:15:33.923699 PCI: 00:00.0
1337 03:15:33.933350 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1338 03:15:33.940099 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1339 03:15:33.949409 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1340 03:15:33.959797 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1341 03:15:33.969774 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1342 03:15:33.979750 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1343 03:15:33.986252 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1344 03:15:33.995955 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1345 03:15:34.005970 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1346 03:15:34.015897 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1347 03:15:34.025623 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1348 03:15:34.035215 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1349 03:15:34.042230 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1350 03:15:34.051857 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1351 03:15:34.061640 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1352 03:15:34.072104 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1353 03:15:34.074998 PCI: 00:02.0
1354 03:15:34.085323 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1355 03:15:34.095113 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1356 03:15:34.104695 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1357 03:15:34.105148 PCI: 00:04.0
1358 03:15:34.108094 PCI: 00:08.0
1359 03:15:34.118053 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1360 03:15:34.118497 PCI: 00:12.0
1361 03:15:34.128138 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1362 03:15:34.135068 PCI: 00:14.0 child on link 0 USB0 port 0
1363 03:15:34.144386 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1364 03:15:34.147868 USB0 port 0 child on link 0 USB2 port 0
1365 03:15:34.151324 USB2 port 0
1366 03:15:34.151766 USB2 port 1
1367 03:15:34.154227 USB2 port 2
1368 03:15:34.154697 USB2 port 3
1369 03:15:34.157806 USB2 port 5
1370 03:15:34.158246 USB2 port 6
1371 03:15:34.161245 USB2 port 9
1372 03:15:34.164208 USB3 port 0
1373 03:15:34.164649 USB3 port 1
1374 03:15:34.167786 USB3 port 2
1375 03:15:34.168225 USB3 port 3
1376 03:15:34.170929 USB3 port 4
1377 03:15:34.171424 PCI: 00:14.2
1378 03:15:34.181034 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1379 03:15:34.191323 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1380 03:15:34.194071 PCI: 00:14.3
1381 03:15:34.204322 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1382 03:15:34.207369 PCI: 00:15.0 child on link 0 I2C: 01:15
1383 03:15:34.217582 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1384 03:15:34.220828 I2C: 01:15
1385 03:15:34.223849 PCI: 00:15.1 child on link 0 I2C: 02:5d
1386 03:15:34.233628 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1387 03:15:34.237249 I2C: 02:5d
1388 03:15:34.237755 GENERIC: 0.0
1389 03:15:34.240344 PCI: 00:16.0
1390 03:15:34.250332 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1391 03:15:34.250818 PCI: 00:17.0
1392 03:15:34.263645 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1393 03:15:34.273684 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1394 03:15:34.280530 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1395 03:15:34.289987 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1396 03:15:34.299620 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1397 03:15:34.309716 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1398 03:15:34.313326 PCI: 00:19.0 child on link 0 I2C: 03:1a
1399 03:15:34.322639 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1400 03:15:34.326577 I2C: 03:1a
1401 03:15:34.327017 I2C: 03:38
1402 03:15:34.329422 I2C: 03:39
1403 03:15:34.329865 I2C: 03:3a
1404 03:15:34.332953 I2C: 03:3b
1405 03:15:34.336227 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1406 03:15:34.346357 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1407 03:15:34.356068 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1408 03:15:34.365979 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1409 03:15:34.369298 PCI: 01:00.0
1410 03:15:34.379330 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1411 03:15:34.379825 PCI: 00:1e.0
1412 03:15:34.392288 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1413 03:15:34.402298 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1414 03:15:34.405813 PCI: 00:1e.2 child on link 0 SPI: 00
1415 03:15:34.415423 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1416 03:15:34.415871 SPI: 00
1417 03:15:34.422574 PCI: 00:1e.3 child on link 0 SPI: 01
1418 03:15:34.432048 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1419 03:15:34.432495 SPI: 01
1420 03:15:34.435171 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1421 03:15:34.445581 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1422 03:15:34.455003 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1423 03:15:34.455478 PNP: 0c09.0
1424 03:15:34.465086 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1425 03:15:34.465536 PCI: 00:1f.3
1426 03:15:34.478272 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1427 03:15:34.488358 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1428 03:15:34.488845 PCI: 00:1f.4
1429 03:15:34.497900 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1430 03:15:34.508060 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1431 03:15:34.511698 PCI: 00:1f.5
1432 03:15:34.521269 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1433 03:15:34.521737 Done allocating resources.
1434 03:15:34.527655 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1435 03:15:34.531430 Enabling resources...
1436 03:15:34.534523 PCI: 00:00.0 subsystem <- 8086/9b61
1437 03:15:34.537643 PCI: 00:00.0 cmd <- 06
1438 03:15:34.540912 PCI: 00:02.0 subsystem <- 8086/9b41
1439 03:15:34.544548 PCI: 00:02.0 cmd <- 03
1440 03:15:34.547343 PCI: 00:08.0 cmd <- 06
1441 03:15:34.550717 PCI: 00:12.0 subsystem <- 8086/02f9
1442 03:15:34.553972 PCI: 00:12.0 cmd <- 02
1443 03:15:34.557543 PCI: 00:14.0 subsystem <- 8086/02ed
1444 03:15:34.560461 PCI: 00:14.0 cmd <- 02
1445 03:15:34.560937 PCI: 00:14.2 cmd <- 02
1446 03:15:34.567250 PCI: 00:14.3 subsystem <- 8086/02f0
1447 03:15:34.567732 PCI: 00:14.3 cmd <- 02
1448 03:15:34.570641 PCI: 00:15.0 subsystem <- 8086/02e8
1449 03:15:34.573901 PCI: 00:15.0 cmd <- 02
1450 03:15:34.577292 PCI: 00:15.1 subsystem <- 8086/02e9
1451 03:15:34.580656 PCI: 00:15.1 cmd <- 02
1452 03:15:34.583828 PCI: 00:16.0 subsystem <- 8086/02e0
1453 03:15:34.587348 PCI: 00:16.0 cmd <- 02
1454 03:15:34.590325 PCI: 00:17.0 subsystem <- 8086/02d3
1455 03:15:34.593938 PCI: 00:17.0 cmd <- 03
1456 03:15:34.597275 PCI: 00:19.0 subsystem <- 8086/02c5
1457 03:15:34.600504 PCI: 00:19.0 cmd <- 02
1458 03:15:34.603520 PCI: 00:1d.0 bridge ctrl <- 0013
1459 03:15:34.607226 PCI: 00:1d.0 subsystem <- 8086/02b0
1460 03:15:34.610185 PCI: 00:1d.0 cmd <- 06
1461 03:15:34.613720 PCI: 00:1e.0 subsystem <- 8086/02a8
1462 03:15:34.616780 PCI: 00:1e.0 cmd <- 06
1463 03:15:34.619847 PCI: 00:1e.2 subsystem <- 8086/02aa
1464 03:15:34.620316 PCI: 00:1e.2 cmd <- 06
1465 03:15:34.626820 PCI: 00:1e.3 subsystem <- 8086/02ab
1466 03:15:34.627338 PCI: 00:1e.3 cmd <- 02
1467 03:15:34.629921 PCI: 00:1f.0 subsystem <- 8086/0284
1468 03:15:34.633280 PCI: 00:1f.0 cmd <- 407
1469 03:15:34.637039 PCI: 00:1f.3 subsystem <- 8086/02c8
1470 03:15:34.640179 PCI: 00:1f.3 cmd <- 02
1471 03:15:34.643350 PCI: 00:1f.4 subsystem <- 8086/02a3
1472 03:15:34.646544 PCI: 00:1f.4 cmd <- 03
1473 03:15:34.649747 PCI: 00:1f.5 subsystem <- 8086/02a4
1474 03:15:34.653284 PCI: 00:1f.5 cmd <- 406
1475 03:15:34.661836 PCI: 01:00.0 cmd <- 02
1476 03:15:34.667165 done.
1477 03:15:34.678451 ME: Version: 14.0.39.1367
1478 03:15:34.685397 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1479 03:15:34.688895 Initializing devices...
1480 03:15:34.689355 Root Device init ...
1481 03:15:34.695324 Chrome EC: Set SMI mask to 0x0000000000000000
1482 03:15:34.698761 Chrome EC: clear events_b mask to 0x0000000000000000
1483 03:15:34.705216 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1484 03:15:34.711803 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1485 03:15:34.718472 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1486 03:15:34.721539 Chrome EC: Set WAKE mask to 0x0000000000000000
1487 03:15:34.728373 Root Device init finished in 35225 usecs
1488 03:15:34.728875 CPU_CLUSTER: 0 init ...
1489 03:15:34.735056 CPU_CLUSTER: 0 init finished in 2447 usecs
1490 03:15:34.739679 PCI: 00:00.0 init ...
1491 03:15:34.742691 CPU TDP: 15 Watts
1492 03:15:34.746522 CPU PL2 = 64 Watts
1493 03:15:34.749556 PCI: 00:00.0 init finished in 7071 usecs
1494 03:15:34.752712 PCI: 00:02.0 init ...
1495 03:15:34.755752 PCI: 00:02.0 init finished in 2253 usecs
1496 03:15:34.759247 PCI: 00:08.0 init ...
1497 03:15:34.762625 PCI: 00:08.0 init finished in 2253 usecs
1498 03:15:34.765910 PCI: 00:12.0 init ...
1499 03:15:34.769306 PCI: 00:12.0 init finished in 2252 usecs
1500 03:15:34.773019 PCI: 00:14.0 init ...
1501 03:15:34.775901 PCI: 00:14.0 init finished in 2252 usecs
1502 03:15:34.779308 PCI: 00:14.2 init ...
1503 03:15:34.782645 PCI: 00:14.2 init finished in 2244 usecs
1504 03:15:34.786005 PCI: 00:14.3 init ...
1505 03:15:34.789166 PCI: 00:14.3 init finished in 2270 usecs
1506 03:15:34.792403 PCI: 00:15.0 init ...
1507 03:15:34.796217 DW I2C bus 0 at 0xd121f000 (400 KHz)
1508 03:15:34.799429 PCI: 00:15.0 init finished in 5976 usecs
1509 03:15:34.802400 PCI: 00:15.1 init ...
1510 03:15:34.805768 DW I2C bus 1 at 0xd1220000 (400 KHz)
1511 03:15:34.812536 PCI: 00:15.1 init finished in 5976 usecs
1512 03:15:34.813085 PCI: 00:16.0 init ...
1513 03:15:34.819023 PCI: 00:16.0 init finished in 2251 usecs
1514 03:15:34.822041 PCI: 00:19.0 init ...
1515 03:15:34.825808 DW I2C bus 4 at 0xd1222000 (400 KHz)
1516 03:15:34.828637 PCI: 00:19.0 init finished in 5974 usecs
1517 03:15:34.832342 PCI: 00:1d.0 init ...
1518 03:15:34.835477 Initializing PCH PCIe bridge.
1519 03:15:34.838583 PCI: 00:1d.0 init finished in 5274 usecs
1520 03:15:34.841875 PCI: 00:1f.0 init ...
1521 03:15:34.845240 IOAPIC: Initializing IOAPIC at 0xfec00000
1522 03:15:34.851734 IOAPIC: Bootstrap Processor Local APIC = 0x00
1523 03:15:34.852182 IOAPIC: ID = 0x02
1524 03:15:34.855492 IOAPIC: Dumping registers
1525 03:15:34.858799 reg 0x0000: 0x02000000
1526 03:15:34.861491 reg 0x0001: 0x00770020
1527 03:15:34.861935 reg 0x0002: 0x00000000
1528 03:15:34.868434 PCI: 00:1f.0 init finished in 23523 usecs
1529 03:15:34.871842 PCI: 00:1f.4 init ...
1530 03:15:34.874882 PCI: 00:1f.4 init finished in 2260 usecs
1531 03:15:34.885938 PCI: 01:00.0 init ...
1532 03:15:34.889152 PCI: 01:00.0 init finished in 2243 usecs
1533 03:15:34.892936 PNP: 0c09.0 init ...
1534 03:15:34.896077 Google Chrome EC uptime: 11.069 seconds
1535 03:15:34.902830 Google Chrome AP resets since EC boot: 0
1536 03:15:34.906097 Google Chrome most recent AP reset causes:
1537 03:15:34.913005 Google Chrome EC reset flags at last EC boot: reset-pin
1538 03:15:34.916142 PNP: 0c09.0 init finished in 20566 usecs
1539 03:15:34.919702 Devices initialized
1540 03:15:34.922728 Show all devs... After init.
1541 03:15:34.923220 Root Device: enabled 1
1542 03:15:34.926389 CPU_CLUSTER: 0: enabled 1
1543 03:15:34.929448 DOMAIN: 0000: enabled 1
1544 03:15:34.929899 APIC: 00: enabled 1
1545 03:15:34.932964 PCI: 00:00.0: enabled 1
1546 03:15:34.936006 PCI: 00:02.0: enabled 1
1547 03:15:34.939650 PCI: 00:04.0: enabled 0
1548 03:15:34.940125 PCI: 00:05.0: enabled 0
1549 03:15:34.942968 PCI: 00:12.0: enabled 1
1550 03:15:34.945847 PCI: 00:12.5: enabled 0
1551 03:15:34.949442 PCI: 00:12.6: enabled 0
1552 03:15:34.949913 PCI: 00:14.0: enabled 1
1553 03:15:34.952407 PCI: 00:14.1: enabled 0
1554 03:15:34.956041 PCI: 00:14.3: enabled 1
1555 03:15:34.956510 PCI: 00:14.5: enabled 0
1556 03:15:34.959457 PCI: 00:15.0: enabled 1
1557 03:15:34.962498 PCI: 00:15.1: enabled 1
1558 03:15:34.966088 PCI: 00:15.2: enabled 0
1559 03:15:34.966670 PCI: 00:15.3: enabled 0
1560 03:15:34.969462 PCI: 00:16.0: enabled 1
1561 03:15:34.972537 PCI: 00:16.1: enabled 0
1562 03:15:34.975745 PCI: 00:16.2: enabled 0
1563 03:15:34.976255 PCI: 00:16.3: enabled 0
1564 03:15:34.979061 PCI: 00:16.4: enabled 0
1565 03:15:34.982656 PCI: 00:16.5: enabled 0
1566 03:15:34.985332 PCI: 00:17.0: enabled 1
1567 03:15:34.985881 PCI: 00:19.0: enabled 1
1568 03:15:34.988655 PCI: 00:19.1: enabled 0
1569 03:15:34.992335 PCI: 00:19.2: enabled 0
1570 03:15:34.992794 PCI: 00:1a.0: enabled 0
1571 03:15:34.995621 PCI: 00:1c.0: enabled 0
1572 03:15:34.998665 PCI: 00:1c.1: enabled 0
1573 03:15:35.002111 PCI: 00:1c.2: enabled 0
1574 03:15:35.002550 PCI: 00:1c.3: enabled 0
1575 03:15:35.005340 PCI: 00:1c.4: enabled 0
1576 03:15:35.009109 PCI: 00:1c.5: enabled 0
1577 03:15:35.012321 PCI: 00:1c.6: enabled 0
1578 03:15:35.012761 PCI: 00:1c.7: enabled 0
1579 03:15:35.015720 PCI: 00:1d.0: enabled 1
1580 03:15:35.018453 PCI: 00:1d.1: enabled 0
1581 03:15:35.022174 PCI: 00:1d.2: enabled 0
1582 03:15:35.022616 PCI: 00:1d.3: enabled 0
1583 03:15:35.025217 PCI: 00:1d.4: enabled 0
1584 03:15:35.028759 PCI: 00:1d.5: enabled 0
1585 03:15:35.031950 PCI: 00:1e.0: enabled 1
1586 03:15:35.032388 PCI: 00:1e.1: enabled 0
1587 03:15:35.035426 PCI: 00:1e.2: enabled 1
1588 03:15:35.038783 PCI: 00:1e.3: enabled 1
1589 03:15:35.039333 PCI: 00:1f.0: enabled 1
1590 03:15:35.041724 PCI: 00:1f.1: enabled 0
1591 03:15:35.045395 PCI: 00:1f.2: enabled 0
1592 03:15:35.048367 PCI: 00:1f.3: enabled 1
1593 03:15:35.048880 PCI: 00:1f.4: enabled 1
1594 03:15:35.051930 PCI: 00:1f.5: enabled 1
1595 03:15:35.055125 PCI: 00:1f.6: enabled 0
1596 03:15:35.058494 USB0 port 0: enabled 1
1597 03:15:35.058944 I2C: 01:15: enabled 1
1598 03:15:35.061539 I2C: 02:5d: enabled 1
1599 03:15:35.065023 GENERIC: 0.0: enabled 1
1600 03:15:35.065470 I2C: 03:1a: enabled 1
1601 03:15:35.068645 I2C: 03:38: enabled 1
1602 03:15:35.072006 I2C: 03:39: enabled 1
1603 03:15:35.072544 I2C: 03:3a: enabled 1
1604 03:15:35.075170 I2C: 03:3b: enabled 1
1605 03:15:35.078610 PCI: 00:00.0: enabled 1
1606 03:15:35.079050 SPI: 00: enabled 1
1607 03:15:35.081379 SPI: 01: enabled 1
1608 03:15:35.084792 PNP: 0c09.0: enabled 1
1609 03:15:35.085233 USB2 port 0: enabled 1
1610 03:15:35.087978 USB2 port 1: enabled 1
1611 03:15:35.091365 USB2 port 2: enabled 0
1612 03:15:35.091807 USB2 port 3: enabled 0
1613 03:15:35.094765 USB2 port 5: enabled 0
1614 03:15:35.097941 USB2 port 6: enabled 1
1615 03:15:35.101594 USB2 port 9: enabled 1
1616 03:15:35.102040 USB3 port 0: enabled 1
1617 03:15:35.105004 USB3 port 1: enabled 1
1618 03:15:35.108158 USB3 port 2: enabled 1
1619 03:15:35.108599 USB3 port 3: enabled 1
1620 03:15:35.110999 USB3 port 4: enabled 0
1621 03:15:35.114939 APIC: 05: enabled 1
1622 03:15:35.115416 APIC: 01: enabled 1
1623 03:15:35.117970 APIC: 03: enabled 1
1624 03:15:35.121248 APIC: 04: enabled 1
1625 03:15:35.121688 APIC: 02: enabled 1
1626 03:15:35.124570 APIC: 07: enabled 1
1627 03:15:35.125008 APIC: 06: enabled 1
1628 03:15:35.127877 PCI: 00:08.0: enabled 1
1629 03:15:35.131449 PCI: 00:14.2: enabled 1
1630 03:15:35.134176 PCI: 01:00.0: enabled 1
1631 03:15:35.137744 Disabling ACPI via APMC:
1632 03:15:35.141711 done.
1633 03:15:35.144796 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1634 03:15:35.147836 ELOG: NV offset 0xaf0000 size 0x4000
1635 03:15:35.154268 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1636 03:15:35.161686 ELOG: Event(17) added with size 13 at 2023-03-14 03:15:35 UTC
1637 03:15:35.167583 ELOG: Event(92) added with size 9 at 2023-03-14 03:15:35 UTC
1638 03:15:35.174617 ELOG: Event(93) added with size 9 at 2023-03-14 03:15:35 UTC
1639 03:15:35.181153 ELOG: Event(9A) added with size 9 at 2023-03-14 03:15:35 UTC
1640 03:15:35.187538 ELOG: Event(9E) added with size 10 at 2023-03-14 03:15:35 UTC
1641 03:15:35.194120 ELOG: Event(9F) added with size 14 at 2023-03-14 03:15:35 UTC
1642 03:15:35.197139 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1643 03:15:35.204596 ELOG: Event(A1) added with size 10 at 2023-03-14 03:15:35 UTC
1644 03:15:35.214700 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1645 03:15:35.221104 ELOG: Event(A0) added with size 9 at 2023-03-14 03:15:35 UTC
1646 03:15:35.224456 elog_add_boot_reason: Logged dev mode boot
1647 03:15:35.227834 Finalize devices...
1648 03:15:35.228274 PCI: 00:17.0 final
1649 03:15:35.231040 Devices finalized
1650 03:15:35.234748 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1651 03:15:35.241251 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1652 03:15:35.244416 ME: HFSTS1 : 0x90000245
1653 03:15:35.247984 ME: HFSTS2 : 0x3B850126
1654 03:15:35.254354 ME: HFSTS3 : 0x00000020
1655 03:15:35.257589 ME: HFSTS4 : 0x00004800
1656 03:15:35.260874 ME: HFSTS5 : 0x00000000
1657 03:15:35.264476 ME: HFSTS6 : 0x40400006
1658 03:15:35.267421 ME: Manufacturing Mode : NO
1659 03:15:35.270949 ME: FW Partition Table : OK
1660 03:15:35.274462 ME: Bringup Loader Failure : NO
1661 03:15:35.277573 ME: Firmware Init Complete : YES
1662 03:15:35.281051 ME: Boot Options Present : NO
1663 03:15:35.284056 ME: Update In Progress : NO
1664 03:15:35.287663 ME: D0i3 Support : YES
1665 03:15:35.290965 ME: Low Power State Enabled : NO
1666 03:15:35.293875 ME: CPU Replaced : NO
1667 03:15:35.297324 ME: CPU Replacement Valid : YES
1668 03:15:35.300606 ME: Current Working State : 5
1669 03:15:35.303807 ME: Current Operation State : 1
1670 03:15:35.307546 ME: Current Operation Mode : 0
1671 03:15:35.310485 ME: Error Code : 0
1672 03:15:35.313846 ME: CPU Debug Disabled : YES
1673 03:15:35.317344 ME: TXT Support : NO
1674 03:15:35.324016 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1675 03:15:35.330438 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1676 03:15:35.330887 CBFS @ c08000 size 3f8000
1677 03:15:35.336992 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1678 03:15:35.340335 CBFS: Locating 'fallback/dsdt.aml'
1679 03:15:35.343705 CBFS: Found @ offset 10bb80 size 3fa5
1680 03:15:35.349954 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1681 03:15:35.353652 CBFS @ c08000 size 3f8000
1682 03:15:35.360401 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1683 03:15:35.360847 CBFS: Locating 'fallback/slic'
1684 03:15:35.365443 CBFS: 'fallback/slic' not found.
1685 03:15:35.372088 ACPI: Writing ACPI tables at 99b3e000.
1686 03:15:35.372532 ACPI: * FACS
1687 03:15:35.375592 ACPI: * DSDT
1688 03:15:35.378537 Ramoops buffer: 0x100000@0x99a3d000.
1689 03:15:35.381612 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1690 03:15:35.388154 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1691 03:15:35.391954 Google Chrome EC: version:
1692 03:15:35.394993 ro: helios_v2.0.2659-56403530b
1693 03:15:35.397973 rw: helios_v2.0.2849-c41de27e7d
1694 03:15:35.398491 running image: 1
1695 03:15:35.402543 ACPI: * FADT
1696 03:15:35.402986 SCI is IRQ9
1697 03:15:35.409555 ACPI: added table 1/32, length now 40
1698 03:15:35.410016 ACPI: * SSDT
1699 03:15:35.412806 Found 1 CPU(s) with 8 core(s) each.
1700 03:15:35.416362 Error: Could not locate 'wifi_sar' in VPD.
1701 03:15:35.422796 Checking CBFS for default SAR values
1702 03:15:35.425875 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1703 03:15:35.429209 CBFS @ c08000 size 3f8000
1704 03:15:35.435761 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1705 03:15:35.439521 CBFS: Locating 'wifi_sar_defaults.hex'
1706 03:15:35.442223 CBFS: Found @ offset 5fac0 size 77
1707 03:15:35.445515 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1708 03:15:35.452882 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1709 03:15:35.455645 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1710 03:15:35.462159 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1711 03:15:35.465626 failed to find key in VPD: dsm_calib_r0_0
1712 03:15:35.475712 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1713 03:15:35.478783 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1714 03:15:35.482238 failed to find key in VPD: dsm_calib_r0_1
1715 03:15:35.492238 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1716 03:15:35.498759 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1717 03:15:35.501975 failed to find key in VPD: dsm_calib_r0_2
1718 03:15:35.512038 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1719 03:15:35.515302 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1720 03:15:35.521676 failed to find key in VPD: dsm_calib_r0_3
1721 03:15:35.528378 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1722 03:15:35.534656 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1723 03:15:35.538124 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1724 03:15:35.541211 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1725 03:15:35.545423 EC returned error result code 1
1726 03:15:35.549448 EC returned error result code 1
1727 03:15:35.552657 EC returned error result code 1
1728 03:15:35.559574 PS2K: Bad resp from EC. Vivaldi disabled!
1729 03:15:35.562663 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1730 03:15:35.569732 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1731 03:15:35.576391 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1732 03:15:35.579362 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1733 03:15:35.585906 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1734 03:15:35.592544 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1735 03:15:35.598965 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1736 03:15:35.602470 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1737 03:15:35.609544 ACPI: added table 2/32, length now 44
1738 03:15:35.609990 ACPI: * MCFG
1739 03:15:35.612355 ACPI: added table 3/32, length now 48
1740 03:15:35.615772 ACPI: * TPM2
1741 03:15:35.619382 TPM2 log created at 99a2d000
1742 03:15:35.622855 ACPI: added table 4/32, length now 52
1743 03:15:35.623368 ACPI: * MADT
1744 03:15:35.625662 SCI is IRQ9
1745 03:15:35.629345 ACPI: added table 5/32, length now 56
1746 03:15:35.629872 current = 99b43ac0
1747 03:15:35.632453 ACPI: * DMAR
1748 03:15:35.635764 ACPI: added table 6/32, length now 60
1749 03:15:35.639233 ACPI: * IGD OpRegion
1750 03:15:35.639674 GMA: Found VBT in CBFS
1751 03:15:35.642281 GMA: Found valid VBT in CBFS
1752 03:15:35.645669 ACPI: added table 7/32, length now 64
1753 03:15:35.648760 ACPI: * HPET
1754 03:15:35.652001 ACPI: added table 8/32, length now 68
1755 03:15:35.652447 ACPI: done.
1756 03:15:35.655381 ACPI tables: 31744 bytes.
1757 03:15:35.659463 smbios_write_tables: 99a2c000
1758 03:15:35.662547 EC returned error result code 3
1759 03:15:35.665772 Couldn't obtain OEM name from CBI
1760 03:15:35.668987 Create SMBIOS type 17
1761 03:15:35.672418 PCI: 00:00.0 (Intel Cannonlake)
1762 03:15:35.675540 PCI: 00:14.3 (Intel WiFi)
1763 03:15:35.679111 SMBIOS tables: 939 bytes.
1764 03:15:35.682439 Writing table forward entry at 0x00000500
1765 03:15:35.689152 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1766 03:15:35.692151 Writing coreboot table at 0x99b62000
1767 03:15:35.698661 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1768 03:15:35.702289 1. 0000000000001000-000000000009ffff: RAM
1769 03:15:35.705216 2. 00000000000a0000-00000000000fffff: RESERVED
1770 03:15:35.712374 3. 0000000000100000-0000000099a2bfff: RAM
1771 03:15:35.718676 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1772 03:15:35.721808 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1773 03:15:35.728262 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1774 03:15:35.731659 7. 000000009a000000-000000009f7fffff: RESERVED
1775 03:15:35.738427 8. 00000000e0000000-00000000efffffff: RESERVED
1776 03:15:35.741887 9. 00000000fc000000-00000000fc000fff: RESERVED
1777 03:15:35.748605 10. 00000000fe000000-00000000fe00ffff: RESERVED
1778 03:15:35.751994 11. 00000000fed10000-00000000fed17fff: RESERVED
1779 03:15:35.754631 12. 00000000fed80000-00000000fed83fff: RESERVED
1780 03:15:35.761349 13. 00000000fed90000-00000000fed91fff: RESERVED
1781 03:15:35.764685 14. 00000000feda0000-00000000feda1fff: RESERVED
1782 03:15:35.771340 15. 0000000100000000-000000045e7fffff: RAM
1783 03:15:35.775039 Graphics framebuffer located at 0xc0000000
1784 03:15:35.778021 Passing 5 GPIOs to payload:
1785 03:15:35.780984 NAME | PORT | POLARITY | VALUE
1786 03:15:35.788094 write protect | undefined | high | low
1787 03:15:35.794210 lid | undefined | high | high
1788 03:15:35.798027 power | undefined | high | low
1789 03:15:35.804536 oprom | undefined | high | low
1790 03:15:35.807723 EC in RW | 0x000000cb | high | low
1791 03:15:35.811198 Board ID: 4
1792 03:15:35.814693 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1793 03:15:35.817908 CBFS @ c08000 size 3f8000
1794 03:15:35.824392 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1795 03:15:35.830814 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1796 03:15:35.831289 coreboot table: 1492 bytes.
1797 03:15:35.834099 IMD ROOT 0. 99fff000 00001000
1798 03:15:35.837334 IMD SMALL 1. 99ffe000 00001000
1799 03:15:35.840693 FSP MEMORY 2. 99c4e000 003b0000
1800 03:15:35.843905 CONSOLE 3. 99c2e000 00020000
1801 03:15:35.847455 FMAP 4. 99c2d000 0000054e
1802 03:15:35.850773 TIME STAMP 5. 99c2c000 00000910
1803 03:15:35.854269 VBOOT WORK 6. 99c18000 00014000
1804 03:15:35.857346 MRC DATA 7. 99c16000 00001958
1805 03:15:35.860819 ROMSTG STCK 8. 99c15000 00001000
1806 03:15:35.864260 AFTER CAR 9. 99c0b000 0000a000
1807 03:15:35.867184 RAMSTAGE 10. 99baf000 0005c000
1808 03:15:35.870651 REFCODE 11. 99b7a000 00035000
1809 03:15:35.874021 SMM BACKUP 12. 99b6a000 00010000
1810 03:15:35.877040 COREBOOT 13. 99b62000 00008000
1811 03:15:35.881035 ACPI 14. 99b3e000 00024000
1812 03:15:35.883715 ACPI GNVS 15. 99b3d000 00001000
1813 03:15:35.887000 RAMOOPS 16. 99a3d000 00100000
1814 03:15:35.890831 TPM2 TCGLOG17. 99a2d000 00010000
1815 03:15:35.896978 SMBIOS 18. 99a2c000 00000800
1816 03:15:35.897422 IMD small region:
1817 03:15:35.900365 IMD ROOT 0. 99ffec00 00000400
1818 03:15:35.903979 FSP RUNTIME 1. 99ffebe0 00000004
1819 03:15:35.907037 EC HOSTEVENT 2. 99ffebc0 00000008
1820 03:15:35.910404 POWER STATE 3. 99ffeb80 00000040
1821 03:15:35.914242 ROMSTAGE 4. 99ffeb60 00000004
1822 03:15:35.920594 MEM INFO 5. 99ffe9a0 000001b9
1823 03:15:35.923633 VPD 6. 99ffe920 0000006c
1824 03:15:35.924078 MTRR: Physical address space:
1825 03:15:35.930472 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1826 03:15:35.936645 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1827 03:15:35.943473 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1828 03:15:35.950407 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1829 03:15:35.956670 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1830 03:15:35.963181 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1831 03:15:35.970117 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1832 03:15:35.972923 MTRR: Fixed MSR 0x250 0x0606060606060606
1833 03:15:35.976648 MTRR: Fixed MSR 0x258 0x0606060606060606
1834 03:15:35.979516 MTRR: Fixed MSR 0x259 0x0000000000000000
1835 03:15:35.986151 MTRR: Fixed MSR 0x268 0x0606060606060606
1836 03:15:35.989672 MTRR: Fixed MSR 0x269 0x0606060606060606
1837 03:15:35.993031 MTRR: Fixed MSR 0x26a 0x0606060606060606
1838 03:15:35.996396 MTRR: Fixed MSR 0x26b 0x0606060606060606
1839 03:15:36.003057 MTRR: Fixed MSR 0x26c 0x0606060606060606
1840 03:15:36.006083 MTRR: Fixed MSR 0x26d 0x0606060606060606
1841 03:15:36.009652 MTRR: Fixed MSR 0x26e 0x0606060606060606
1842 03:15:36.012639 MTRR: Fixed MSR 0x26f 0x0606060606060606
1843 03:15:36.016202 call enable_fixed_mtrr()
1844 03:15:36.019667 CPU physical address size: 39 bits
1845 03:15:36.026353 MTRR: default type WB/UC MTRR counts: 6/8.
1846 03:15:36.029316 MTRR: WB selected as default type.
1847 03:15:36.035794 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1848 03:15:36.039586 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1849 03:15:36.045949 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1850 03:15:36.052585 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1851 03:15:36.058923 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1852 03:15:36.066021 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1853 03:15:36.071757 MTRR: Fixed MSR 0x250 0x0606060606060606
1854 03:15:36.075017 MTRR: Fixed MSR 0x258 0x0606060606060606
1855 03:15:36.078301 MTRR: Fixed MSR 0x259 0x0000000000000000
1856 03:15:36.081688 MTRR: Fixed MSR 0x268 0x0606060606060606
1857 03:15:36.088333 MTRR: Fixed MSR 0x269 0x0606060606060606
1858 03:15:36.092005 MTRR: Fixed MSR 0x26a 0x0606060606060606
1859 03:15:36.095073 MTRR: Fixed MSR 0x26b 0x0606060606060606
1860 03:15:36.098398 MTRR: Fixed MSR 0x26c 0x0606060606060606
1861 03:15:36.101442 MTRR: Fixed MSR 0x26d 0x0606060606060606
1862 03:15:36.108040 MTRR: Fixed MSR 0x26e 0x0606060606060606
1863 03:15:36.111479 MTRR: Fixed MSR 0x26f 0x0606060606060606
1864 03:15:36.111580
1865 03:15:36.111657 MTRR check
1866 03:15:36.114526 Fixed MTRRs : Enabled
1867 03:15:36.118181 Variable MTRRs: Enabled
1868 03:15:36.118281
1869 03:15:36.121679 call enable_fixed_mtrr()
1870 03:15:36.124676 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1871 03:15:36.128234 CPU physical address size: 39 bits
1872 03:15:36.134862 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1873 03:15:36.138081 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 03:15:36.144493 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 03:15:36.148113 MTRR: Fixed MSR 0x258 0x0606060606060606
1876 03:15:36.150998 MTRR: Fixed MSR 0x259 0x0000000000000000
1877 03:15:36.154629 MTRR: Fixed MSR 0x268 0x0606060606060606
1878 03:15:36.157634 MTRR: Fixed MSR 0x269 0x0606060606060606
1879 03:15:36.164501 MTRR: Fixed MSR 0x26a 0x0606060606060606
1880 03:15:36.167654 MTRR: Fixed MSR 0x26b 0x0606060606060606
1881 03:15:36.170897 MTRR: Fixed MSR 0x26c 0x0606060606060606
1882 03:15:36.174276 MTRR: Fixed MSR 0x26d 0x0606060606060606
1883 03:15:36.181643 MTRR: Fixed MSR 0x26e 0x0606060606060606
1884 03:15:36.184455 MTRR: Fixed MSR 0x26f 0x0606060606060606
1885 03:15:36.187495 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 03:15:36.190822 call enable_fixed_mtrr()
1887 03:15:36.194188 MTRR: Fixed MSR 0x259 0x0000000000000000
1888 03:15:36.197127 MTRR: Fixed MSR 0x268 0x0606060606060606
1889 03:15:36.204122 MTRR: Fixed MSR 0x269 0x0606060606060606
1890 03:15:36.207470 MTRR: Fixed MSR 0x26a 0x0606060606060606
1891 03:15:36.210510 MTRR: Fixed MSR 0x26b 0x0606060606060606
1892 03:15:36.214167 MTRR: Fixed MSR 0x26c 0x0606060606060606
1893 03:15:36.220692 MTRR: Fixed MSR 0x26d 0x0606060606060606
1894 03:15:36.224130 MTRR: Fixed MSR 0x26e 0x0606060606060606
1895 03:15:36.227078 MTRR: Fixed MSR 0x26f 0x0606060606060606
1896 03:15:36.230304 CPU physical address size: 39 bits
1897 03:15:36.234437 call enable_fixed_mtrr()
1898 03:15:36.237368 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 03:15:36.243948 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 03:15:36.247063 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 03:15:36.250974 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 03:15:36.253791 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 03:15:36.257177 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 03:15:36.263822 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 03:15:36.267392 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 03:15:36.270225 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 03:15:36.273641 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 03:15:36.280100 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 03:15:36.283684 MTRR: Fixed MSR 0x250 0x0606060606060606
1910 03:15:36.286931 call enable_fixed_mtrr()
1911 03:15:36.290165 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 03:15:36.293630 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 03:15:36.296852 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 03:15:36.303042 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 03:15:36.306819 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 03:15:36.310158 MTRR: Fixed MSR 0x26b 0x0606060606060606
1917 03:15:36.312993 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 03:15:36.320013 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 03:15:36.322968 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 03:15:36.326480 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 03:15:36.329527 CPU physical address size: 39 bits
1922 03:15:36.333799 call enable_fixed_mtrr()
1923 03:15:36.336846 CPU physical address size: 39 bits
1924 03:15:36.340273 CBFS @ c08000 size 3f8000
1925 03:15:36.346706 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1926 03:15:36.350104 CBFS: Locating 'fallback/payload'
1927 03:15:36.353051 CPU physical address size: 39 bits
1928 03:15:36.356618 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 03:15:36.360237 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 03:15:36.363045 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 03:15:36.369790 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 03:15:36.373611 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 03:15:36.376295 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 03:15:36.379843 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 03:15:36.386439 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 03:15:36.389823 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 03:15:36.393143 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 03:15:36.396035 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 03:15:36.402971 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 03:15:36.406457 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 03:15:36.409497 call enable_fixed_mtrr()
1942 03:15:36.412863 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 03:15:36.416279 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 03:15:36.419580 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 03:15:36.425756 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 03:15:36.429404 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 03:15:36.432313 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 03:15:36.435986 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 03:15:36.442600 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 03:15:36.445671 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 03:15:36.449057 CPU physical address size: 39 bits
1952 03:15:36.452648 call enable_fixed_mtrr()
1953 03:15:36.456190 CBFS: Found @ offset 1c96c0 size 3f798
1954 03:15:36.459039 CPU physical address size: 39 bits
1955 03:15:36.462570 Checking segment from ROM address 0xffdd16f8
1956 03:15:36.469298 Checking segment from ROM address 0xffdd1714
1957 03:15:36.472306 Loading segment from ROM address 0xffdd16f8
1958 03:15:36.475903 code (compression=0)
1959 03:15:36.482007 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1960 03:15:36.492039 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1961 03:15:36.495781 it's not compressed!
1962 03:15:36.586959 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1963 03:15:36.593212 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1964 03:15:36.596672 Loading segment from ROM address 0xffdd1714
1965 03:15:36.599911 Entry Point 0x30000000
1966 03:15:36.602671 Loaded segments
1967 03:15:36.608813 Finalizing chipset.
1968 03:15:36.611769 Finalizing SMM.
1969 03:15:36.615549 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1970 03:15:36.618726 mp_park_aps done after 0 msecs.
1971 03:15:36.625267 Jumping to boot code at 30000000(99b62000)
1972 03:15:36.631794 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1973 03:15:36.631965
1974 03:15:36.632099
1975 03:15:36.632222
1976 03:15:36.635050 Starting depthcharge on Helios...
1977 03:15:36.635218
1978 03:15:36.635714 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1979 03:15:36.635901 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1980 03:15:36.636051 Setting prompt string to ['hatch:']
1981 03:15:36.636202 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1982 03:15:36.644669 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1983 03:15:36.644890
1984 03:15:36.651197 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1985 03:15:36.651443
1986 03:15:36.658246 board_setup: Info: eMMC controller not present; skipping
1987 03:15:36.658699
1988 03:15:36.661548 New NVMe Controller 0x30053ac0 @ 00:1d:00
1989 03:15:36.661989
1990 03:15:36.667695 board_setup: Info: SDHCI controller not present; skipping
1991 03:15:36.668147
1992 03:15:36.674925 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1993 03:15:36.675465
1994 03:15:36.675862 Wipe memory regions:
1995 03:15:36.676234
1996 03:15:36.677909 [0x00000000001000, 0x000000000a0000)
1997 03:15:36.681285
1998 03:15:36.684498 [0x00000000100000, 0x00000030000000)
1999 03:15:36.748298
2000 03:15:36.751367 [0x00000030657430, 0x00000099a2c000)
2001 03:15:36.898037
2002 03:15:36.901252 [0x00000100000000, 0x0000045e800000)
2003 03:15:38.357218
2004 03:15:38.357376 R8152: Initializing
2005 03:15:38.357457
2006 03:15:38.360345 Version 9 (ocp_data = 6010)
2007 03:15:38.364728
2008 03:15:38.364826 R8152: Done initializing
2009 03:15:38.364904
2010 03:15:38.368033 Adding net device
2011 03:15:38.850654
2012 03:15:38.850825 R8152: Initializing
2013 03:15:38.850905
2014 03:15:38.853976 Version 6 (ocp_data = 5c30)
2015 03:15:38.854077
2016 03:15:38.857728 R8152: Done initializing
2017 03:15:38.857827
2018 03:15:38.860806 net_add_device: Attemp to include the same device
2019 03:15:38.864586
2020 03:15:38.871393 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2021 03:15:38.871490
2022 03:15:38.871565
2023 03:15:38.871634
2024 03:15:38.871915 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2026 03:15:38.972733 hatch: tftpboot 192.168.201.1 9597734/tftp-deploy-aw6h9lvg/kernel/bzImage 9597734/tftp-deploy-aw6h9lvg/kernel/cmdline 9597734/tftp-deploy-aw6h9lvg/ramdisk/ramdisk.cpio.gz
2027 03:15:38.972931 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2028 03:15:38.973043 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2029 03:15:38.977072 tftpboot 192.168.201.1 9597734/tftp-deploy-aw6h9lvg/kernel/bzImoy-aw6h9lvg/kernel/cmdline 9597734/tftp-deploy-aw6h9lvg/ramdisk/ramdisk.cpio.gz
2030 03:15:38.977174
2031 03:15:38.977249 Waiting for link
2032 03:15:39.177781
2033 03:15:39.177941 done.
2034 03:15:39.178023
2035 03:15:39.178097 MAC: 00:24:32:50:1a:59
2036 03:15:39.178168
2037 03:15:39.180907 Sending DHCP discover... done.
2038 03:15:39.181012
2039 03:15:39.184226 Waiting for reply... done.
2040 03:15:39.184307
2041 03:15:39.188116 Sending DHCP request... done.
2042 03:15:39.188207
2043 03:15:39.191327 Waiting for reply... done.
2044 03:15:39.191424
2045 03:15:39.194531 My ip is 192.168.201.14
2046 03:15:39.194620
2047 03:15:39.197415 The DHCP server ip is 192.168.201.1
2048 03:15:39.197518
2049 03:15:39.201099 TFTP server IP predefined by user: 192.168.201.1
2050 03:15:39.201218
2051 03:15:39.207370 Bootfile predefined by user: 9597734/tftp-deploy-aw6h9lvg/kernel/bzImage
2052 03:15:39.207476
2053 03:15:39.210836 Sending tftp read request... done.
2054 03:15:39.210948
2055 03:15:39.217337 Waiting for the transfer...
2056 03:15:39.217438
2057 03:15:39.763859 00000000 ################################################################
2058 03:15:39.764010
2059 03:15:40.316222 00080000 ################################################################
2060 03:15:40.316380
2061 03:15:40.869823 00100000 ################################################################
2062 03:15:40.869972
2063 03:15:41.436697 00180000 ################################################################
2064 03:15:41.436853
2065 03:15:42.008389 00200000 ################################################################
2066 03:15:42.008551
2067 03:15:42.612158 00280000 ################################################################
2068 03:15:42.612324
2069 03:15:43.181141 00300000 ################################################################
2070 03:15:43.181291
2071 03:15:43.759370 00380000 ################################################################
2072 03:15:43.759529
2073 03:15:44.348486 00400000 ################################################################
2074 03:15:44.348645
2075 03:15:44.941481 00480000 ################################################################
2076 03:15:44.941639
2077 03:15:45.529441 00500000 ################################################################
2078 03:15:45.529597
2079 03:15:46.124323 00580000 ################################################################
2080 03:15:46.124492
2081 03:15:46.713678 00600000 ################################################################
2082 03:15:46.713834
2083 03:15:47.287633 00680000 ################################################################
2084 03:15:47.287802
2085 03:15:47.861623 00700000 ################################################################
2086 03:15:47.861794
2087 03:15:48.450105 00780000 ################################################################
2088 03:15:48.450278
2089 03:15:49.029158 00800000 ################################################################
2090 03:15:49.029331
2091 03:15:49.608045 00880000 ################################################################
2092 03:15:49.608219
2093 03:15:50.029173 00900000 ################################################ done.
2094 03:15:50.029339
2095 03:15:50.032663 The bootfile was 9826304 bytes long.
2096 03:15:50.032763
2097 03:15:50.035821 Sending tftp read request... done.
2098 03:15:50.035927
2099 03:15:50.039358 Waiting for the transfer...
2100 03:15:50.039468
2101 03:15:50.578501 00000000 ################################################################
2102 03:15:50.578663
2103 03:15:51.117279 00080000 ################################################################
2104 03:15:51.117449
2105 03:15:51.644537 00100000 ################################################################
2106 03:15:51.644694
2107 03:15:52.172241 00180000 ################################################################
2108 03:15:52.172403
2109 03:15:52.698636 00200000 ################################################################
2110 03:15:52.698794
2111 03:15:53.235077 00280000 ################################################################
2112 03:15:53.235252
2113 03:15:53.761549 00300000 ################################################################
2114 03:15:53.761706
2115 03:15:54.287187 00380000 ################################################################
2116 03:15:54.287348
2117 03:15:54.818394 00400000 ################################################################
2118 03:15:54.818552
2119 03:15:55.353708 00480000 ################################################################
2120 03:15:55.353859
2121 03:15:55.883401 00500000 ################################################################
2122 03:15:55.883553
2123 03:15:56.411798 00580000 ################################################################
2124 03:15:56.411950
2125 03:15:56.960999 00600000 ################################################################
2126 03:15:56.961154
2127 03:15:57.507300 00680000 ################################################################
2128 03:15:57.507456
2129 03:15:58.043510 00700000 ################################################################
2130 03:15:58.043678
2131 03:15:58.571062 00780000 ################################################################
2132 03:15:58.571233
2133 03:15:59.127511 00800000 ################################################################
2134 03:15:59.127676
2135 03:15:59.414714 00880000 ################################## done.
2136 03:15:59.414879
2137 03:15:59.417810 Sending tftp read request... done.
2138 03:15:59.420780
2139 03:15:59.420895 Waiting for the transfer...
2140 03:15:59.420997
2141 03:15:59.424586 00000000 # done.
2142 03:15:59.424682
2143 03:15:59.434097 Command line loaded dynamically from TFTP file: 9597734/tftp-deploy-aw6h9lvg/kernel/cmdline
2144 03:15:59.434206
2145 03:15:59.450742 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2146 03:15:59.450882
2147 03:15:59.453847 ec_init(0): CrosEC protocol v3 supported (256, 256)
2148 03:15:59.461174
2149 03:15:59.464425 Shutting down all USB controllers.
2150 03:15:59.464525
2151 03:15:59.464602 Removing current net device
2152 03:15:59.467970
2153 03:15:59.468068 Finalizing coreboot
2154 03:15:59.468146
2155 03:15:59.474388 Exiting depthcharge with code 4 at timestamp: 30193339
2156 03:15:59.474499
2157 03:15:59.474577
2158 03:15:59.474649 Starting kernel ...
2159 03:15:59.474719
2160 03:15:59.475135 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2161 03:15:59.475250 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2162 03:15:59.475337 Setting prompt string to ['Linux version [0-9]']
2163 03:15:59.475417 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 03:15:59.475496 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2165 03:15:59.477726
2167 03:20:18.476115 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2169 03:20:18.477212 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2171 03:20:18.478001 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2174 03:20:18.479497 end: 2 depthcharge-action (duration 00:05:00) [common]
2176 03:20:18.480743 Cleaning after the job
2177 03:20:18.481247 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9597734/tftp-deploy-aw6h9lvg/ramdisk
2178 03:20:18.484366 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9597734/tftp-deploy-aw6h9lvg/kernel
2179 03:20:18.487476 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9597734/tftp-deploy-aw6h9lvg/modules
2180 03:20:18.489144 start: 5.1 power-off (timeout 00:00:30) [common]
2181 03:20:18.489891 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2182 03:20:18.600724 >> Command sent successfully.
2183 03:20:18.604729 Returned 0 in 0 seconds
2184 03:20:18.705948 end: 5.1 power-off (duration 00:00:00) [common]
2186 03:20:18.707511 start: 5.2 read-feedback (timeout 00:10:00) [common]
2187 03:20:18.708635 Listened to connection for namespace 'common' for up to 1s
2189 03:20:18.710025 Listened to connection for namespace 'common' for up to 1s
2190 03:20:19.711408 Finalising connection for namespace 'common'
2191 03:20:19.712032 Disconnecting from shell: Finalise
2192 03:20:19.712483
2193 03:20:19.813857 end: 5.2 read-feedback (duration 00:00:01) [common]
2194 03:20:19.814434 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9597734
2195 03:20:19.842119 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9597734
2196 03:20:19.842715 JobError: Your job cannot terminate cleanly.