Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:53:54.470716 lava-dispatcher, installed at version: 2023.01
2 12:53:54.470968 start: 0 validate
3 12:53:54.471158 Start time: 2023-04-05 12:53:54.471146+00:00 (UTC)
4 12:53:54.471351 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:53:54.471541 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230324.0%2Fx86%2Frootfs.cpio.gz exists
6 12:53:54.763526 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:53:54.763747 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:53:55.058510 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:53:55.059257 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:54:00.911968 validate duration: 6.44
12 12:54:00.912275 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:54:00.912406 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:54:00.912508 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:54:00.912624 Not decompressing ramdisk as can be used compressed.
16 12:54:00.912717 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230324.0/x86/rootfs.cpio.gz
17 12:54:00.912814 saving as /var/lib/lava/dispatcher/tmp/9879075/tftp-deploy-ag9yv5tl/ramdisk/rootfs.cpio.gz
18 12:54:00.912886 total size: 8429597 (8MB)
19 12:54:01.645234 progress 0% (0MB)
20 12:54:01.647661 progress 5% (0MB)
21 12:54:01.650004 progress 10% (0MB)
22 12:54:01.652408 progress 15% (1MB)
23 12:54:01.654742 progress 20% (1MB)
24 12:54:01.657127 progress 25% (2MB)
25 12:54:01.659463 progress 30% (2MB)
26 12:54:01.661793 progress 35% (2MB)
27 12:54:01.663950 progress 40% (3MB)
28 12:54:01.666292 progress 45% (3MB)
29 12:54:01.668616 progress 50% (4MB)
30 12:54:01.670930 progress 55% (4MB)
31 12:54:01.673231 progress 60% (4MB)
32 12:54:01.675532 progress 65% (5MB)
33 12:54:01.677839 progress 70% (5MB)
34 12:54:01.680004 progress 75% (6MB)
35 12:54:01.682318 progress 80% (6MB)
36 12:54:01.684617 progress 85% (6MB)
37 12:54:01.686899 progress 90% (7MB)
38 12:54:01.689192 progress 95% (7MB)
39 12:54:01.691498 progress 100% (8MB)
40 12:54:01.691641 8MB downloaded in 0.78s (10.32MB/s)
41 12:54:01.691804 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:54:01.692079 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:54:01.692176 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:54:01.692270 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:54:01.692387 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:54:01.692468 saving as /var/lib/lava/dispatcher/tmp/9879075/tftp-deploy-ag9yv5tl/kernel/bzImage
48 12:54:01.692537 total size: 10854400 (10MB)
49 12:54:01.692603 No compression specified
50 12:54:01.693777 progress 0% (0MB)
51 12:54:01.696770 progress 5% (0MB)
52 12:54:01.699798 progress 10% (1MB)
53 12:54:01.702649 progress 15% (1MB)
54 12:54:01.705699 progress 20% (2MB)
55 12:54:01.708549 progress 25% (2MB)
56 12:54:01.711567 progress 30% (3MB)
57 12:54:01.714423 progress 35% (3MB)
58 12:54:01.717445 progress 40% (4MB)
59 12:54:01.720535 progress 45% (4MB)
60 12:54:01.723383 progress 50% (5MB)
61 12:54:01.726403 progress 55% (5MB)
62 12:54:01.729296 progress 60% (6MB)
63 12:54:01.732297 progress 65% (6MB)
64 12:54:01.735134 progress 70% (7MB)
65 12:54:01.738249 progress 75% (7MB)
66 12:54:01.741123 progress 80% (8MB)
67 12:54:01.744101 progress 85% (8MB)
68 12:54:01.747157 progress 90% (9MB)
69 12:54:01.749983 progress 95% (9MB)
70 12:54:01.752996 progress 100% (10MB)
71 12:54:01.753170 10MB downloaded in 0.06s (170.74MB/s)
72 12:54:01.753334 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:54:01.753597 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:54:01.753698 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:54:01.753793 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:54:01.753915 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:54:01.753991 saving as /var/lib/lava/dispatcher/tmp/9879075/tftp-deploy-ag9yv5tl/modules/modules.tar
79 12:54:01.754060 total size: 484468 (0MB)
80 12:54:01.754128 Using unxz to decompress xz
81 12:54:01.758000 progress 6% (0MB)
82 12:54:01.758449 progress 13% (0MB)
83 12:54:01.758715 progress 20% (0MB)
84 12:54:01.760310 progress 27% (0MB)
85 12:54:01.762726 progress 33% (0MB)
86 12:54:01.765244 progress 40% (0MB)
87 12:54:01.768020 progress 47% (0MB)
88 12:54:01.770476 progress 54% (0MB)
89 12:54:01.772459 progress 60% (0MB)
90 12:54:01.774717 progress 67% (0MB)
91 12:54:01.777076 progress 74% (0MB)
92 12:54:01.780235 progress 81% (0MB)
93 12:54:01.783243 progress 87% (0MB)
94 12:54:01.786323 progress 94% (0MB)
95 12:54:01.789197 progress 100% (0MB)
96 12:54:01.798706 0MB downloaded in 0.04s (10.35MB/s)
97 12:54:01.799084 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:54:01.799563 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:54:01.799675 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:54:01.799792 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:54:01.799888 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:54:01.800033 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:54:01.800290 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15
105 12:54:01.800455 makedir: /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin
106 12:54:01.800564 makedir: /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/tests
107 12:54:01.800658 makedir: /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/results
108 12:54:01.800809 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-add-keys
109 12:54:01.800973 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-add-sources
110 12:54:01.801147 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-background-process-start
111 12:54:01.801300 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-background-process-stop
112 12:54:01.801470 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-common-functions
113 12:54:01.801635 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-echo-ipv4
114 12:54:01.801817 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-install-packages
115 12:54:01.801982 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-installed-packages
116 12:54:01.802157 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-os-build
117 12:54:01.802335 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-probe-channel
118 12:54:01.802512 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-probe-ip
119 12:54:01.802679 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-target-ip
120 12:54:01.802852 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-target-mac
121 12:54:01.803019 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-target-storage
122 12:54:01.803187 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-test-case
123 12:54:01.803361 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-test-event
124 12:54:01.803500 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-test-feedback
125 12:54:01.803631 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-test-raise
126 12:54:01.803758 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-test-reference
127 12:54:01.803937 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-test-runner
128 12:54:01.804112 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-test-set
129 12:54:01.804288 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-test-shell
130 12:54:01.804470 Updating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-install-packages (oe)
131 12:54:01.804643 Updating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/bin/lava-installed-packages (oe)
132 12:54:01.804794 Creating /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/environment
133 12:54:01.804935 LAVA metadata
134 12:54:01.805045 - LAVA_JOB_ID=9879075
135 12:54:01.805121 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:54:01.805242 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:54:01.805319 skipped lava-vland-overlay
138 12:54:01.805444 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:54:01.805575 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:54:01.805679 skipped lava-multinode-overlay
141 12:54:01.805814 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:54:01.805949 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:54:01.806068 Loading test definitions
144 12:54:01.806227 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:54:01.806352 Using /lava-9879075 at stage 0
146 12:54:01.806791 uuid=9879075_1.4.2.3.1 testdef=None
147 12:54:01.806937 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:54:01.807070 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:54:01.807771 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:54:01.808169 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:54:01.808940 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:54:01.809354 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:54:01.810338 runner path: /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/0/tests/0_dmesg test_uuid 9879075_1.4.2.3.1
156 12:54:01.810553 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:54:01.810986 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 12:54:01.811111 Using /lava-9879075 at stage 1
160 12:54:01.811500 uuid=9879075_1.4.2.3.5 testdef=None
161 12:54:01.811599 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:54:01.811722 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 12:54:01.812471 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:54:01.812732 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 12:54:01.813739 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:54:01.814179 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 12:54:01.815179 runner path: /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/1/tests/1_bootrr test_uuid 9879075_1.4.2.3.5
170 12:54:01.815362 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:54:01.815683 Creating lava-test-runner.conf files
173 12:54:01.815790 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/0 for stage 0
174 12:54:01.815922 - 0_dmesg
175 12:54:01.816054 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879075/lava-overlay-2bomcd15/lava-9879075/1 for stage 1
176 12:54:01.816200 - 1_bootrr
177 12:54:01.816350 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:54:01.816497 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 12:54:01.825874 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:54:01.826008 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 12:54:01.826108 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:54:01.826204 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:54:01.826303 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 12:54:02.056343 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:54:02.056777 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 12:54:02.056911 extracting modules file /var/lib/lava/dispatcher/tmp/9879075/tftp-deploy-ag9yv5tl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879075/extract-overlay-ramdisk-fa0q1elz/ramdisk
187 12:54:02.072255 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:54:02.072443 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 12:54:02.072564 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9879075/compress-overlay-n2bigj9p/overlay-1.4.2.4.tar.gz to ramdisk
190 12:54:02.072653 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9879075/compress-overlay-n2bigj9p/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9879075/extract-overlay-ramdisk-fa0q1elz/ramdisk
191 12:54:02.080211 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:54:02.080377 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 12:54:02.080497 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:54:02.080603 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 12:54:02.080694 Building ramdisk /var/lib/lava/dispatcher/tmp/9879075/extract-overlay-ramdisk-fa0q1elz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9879075/extract-overlay-ramdisk-fa0q1elz/ramdisk
196 12:54:02.187784 >> 53976 blocks
197 12:54:03.162958 rename /var/lib/lava/dispatcher/tmp/9879075/extract-overlay-ramdisk-fa0q1elz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9879075/tftp-deploy-ag9yv5tl/ramdisk/ramdisk.cpio.gz
198 12:54:03.163451 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:54:03.163588 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:54:03.163699 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:54:03.163810 No mkimage arch provided, not using FIT.
202 12:54:03.163917 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:54:03.164018 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:54:03.164140 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:54:03.164247 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:54:03.164339 No LXC device requested
207 12:54:03.164442 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:54:03.164541 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:54:03.164638 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:54:03.164726 Checking files for TFTP limit of 4294967296 bytes.
211 12:54:03.165230 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:54:03.165355 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:54:03.165459 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:54:03.165595 substitutions:
215 12:54:03.165673 - {DTB}: None
216 12:54:03.165745 - {INITRD}: 9879075/tftp-deploy-ag9yv5tl/ramdisk/ramdisk.cpio.gz
217 12:54:03.165815 - {KERNEL}: 9879075/tftp-deploy-ag9yv5tl/kernel/bzImage
218 12:54:03.165884 - {LAVA_MAC}: None
219 12:54:03.165953 - {PRESEED_CONFIG}: None
220 12:54:03.166019 - {PRESEED_LOCAL}: None
221 12:54:03.166084 - {RAMDISK}: 9879075/tftp-deploy-ag9yv5tl/ramdisk/ramdisk.cpio.gz
222 12:54:03.166150 - {ROOT_PART}: None
223 12:54:03.166214 - {ROOT}: None
224 12:54:03.166279 - {SERVER_IP}: 192.168.201.1
225 12:54:03.166343 - {TEE}: None
226 12:54:03.166407 Parsed boot commands:
227 12:54:03.166470 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:54:03.166640 Parsed boot commands: tftpboot 192.168.201.1 9879075/tftp-deploy-ag9yv5tl/kernel/bzImage 9879075/tftp-deploy-ag9yv5tl/kernel/cmdline 9879075/tftp-deploy-ag9yv5tl/ramdisk/ramdisk.cpio.gz
229 12:54:03.166739 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:54:03.166838 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:54:03.166946 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:54:03.167047 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:54:03.167127 Not connected, no need to disconnect.
234 12:54:03.167216 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:54:03.167310 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:54:03.167389 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-4'
237 12:54:03.171056 Setting prompt string to ['lava-test: # ']
238 12:54:03.171655 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:54:03.171778 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:54:03.171888 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:54:03.171991 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:54:03.172201 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-4' '--port=1' '--command=reboot'
243 12:54:08.319342 >> Command sent successfully.
244 12:54:08.329003 Returned 0 in 5 seconds
245 12:54:08.430576 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:54:08.432173 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:54:08.432744 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:54:08.433184 Setting prompt string to 'Starting depthcharge on Magolor...'
250 12:54:08.433524 Changing prompt to 'Starting depthcharge on Magolor...'
251 12:54:08.433857 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
252 12:54:08.434981 [Enter `^Ec?' for help]
253 12:54:09.566984
254 12:54:09.567479
255 12:54:09.574239 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
256 12:54:09.581459 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
257 12:54:09.585239 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
258 12:54:09.588867 CPU: AES supported, TXT NOT supported, VT supported
259 12:54:09.595286 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
260 12:54:09.598472 PCH: device id 4d87 (rev 01) is Jasperlake Super
261 12:54:09.605245 IGD: device id 4e55 (rev 01) is Jasperlake GT4
262 12:54:09.608789 VBOOT: Loading verstage.
263 12:54:09.611788 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 12:54:09.618730 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 12:54:09.621956 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 12:54:09.628621 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
267 12:54:09.629271
268 12:54:09.629616
269 12:54:09.639616 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
270 12:54:09.655080 Probing TPM: . done!
271 12:54:09.658845 TPM ready after 0 ms
272 12:54:09.662166 Connected to device vid:did:rid of 1ae0:0028:00
273 12:54:09.672307 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
274 12:54:09.679408 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 12:54:09.728631 Initialized TPM device CR50 revision 0
276 12:54:09.738776 tlcl_send_startup: Startup return code is 0
277 12:54:09.739013 TPM: setup succeeded
278 12:54:09.753779 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 12:54:09.767862 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 12:54:09.780330 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 12:54:09.789951 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 12:54:09.793871 Chrome EC: UHEPI supported
283 12:54:09.793969 Phase 1
284 12:54:09.801276 FMAP: area GBB found @ c05000 (12288 bytes)
285 12:54:09.808237 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 12:54:09.814368 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 12:54:09.818056 Recovery requested (1009000e)
288 12:54:09.821075 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 12:54:09.832774 tlcl_extend: response is 0
290 12:54:09.843708 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 12:54:09.849757 tlcl_extend: response is 0
292 12:54:09.857164 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 12:54:09.861867 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
294 12:54:09.869062 BS: verstage times (exec / console): total (unknown) / 125 ms
295 12:54:09.869514
296 12:54:09.869875
297 12:54:09.881153 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
298 12:54:09.884781 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 12:54:09.889006 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 12:54:09.893060 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
301 12:54:09.900032 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 12:54:09.904147 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 12:54:09.907298 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
304 12:54:09.910271 TCO_STS: 0000 0001
305 12:54:09.914067 GEN_PMCON: d0015038 00002200
306 12:54:09.917164 GBLRST_CAUSE: 00000000 00000000
307 12:54:09.917613 prev_sleep_state 5
308 12:54:09.920258 Boot Count incremented to 9250
309 12:54:09.926928 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 12:54:09.930484 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
311 12:54:09.934544 Chrome EC: UHEPI supported
312 12:54:09.941208 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
313 12:54:09.947399 Probing TPM: done!
314 12:54:09.954480 Connected to device vid:did:rid of 1ae0:0028:00
315 12:54:09.964439 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
316 12:54:09.967590 Initialized TPM device CR50 revision 0
317 12:54:09.982884 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 12:54:09.990454 MRC: Hash idx 0x100b comparison successful.
319 12:54:09.991012 MRC cache found, size 5458
320 12:54:09.993731 bootmode is set to: 2
321 12:54:09.994176 SPD INDEX = 0
322 12:54:10.000447 CBFS: Found 'spd.bin' @0x40c40 size 0x600
323 12:54:10.001035 SPD: module type is LPDDR4X
324 12:54:10.008592 SPD: module part number is MT53E512M32D2NP-046 WT:E
325 12:54:10.014862 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
326 12:54:10.017895 SPD: device width 16 bits, bus width 32 bits
327 12:54:10.021519 SPD: module size is 4096 MB (per channel)
328 12:54:10.028300 meminit_channels: DRAM half-populated
329 12:54:10.108855 CBMEM:
330 12:54:10.111433 IMD: root @ 0x76fff000 254 entries.
331 12:54:10.115069 IMD: root @ 0x76ffec00 62 entries.
332 12:54:10.118454 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 12:54:10.124823 WARNING: RO_VPD is uninitialized or empty.
334 12:54:10.128482 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
335 12:54:10.131974 External stage cache:
336 12:54:10.135478 IMD: root @ 0x7b3ff000 254 entries.
337 12:54:10.138587 IMD: root @ 0x7b3fec00 62 entries.
338 12:54:10.148968 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 12:54:10.155043 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 12:54:10.161560 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
341 12:54:10.170139 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 12:54:10.176721 cse_lite: Skip switching to RW in the recovery path
343 12:54:10.177233 1 DIMMs found
344 12:54:10.177594 SMM Memory Map
345 12:54:10.179999 SMRAM : 0x7b000000 0x800000
346 12:54:10.187125 Subregion 0: 0x7b000000 0x200000
347 12:54:10.189959 Subregion 1: 0x7b200000 0x200000
348 12:54:10.193486 Subregion 2: 0x7b400000 0x400000
349 12:54:10.194090 top_of_ram = 0x77000000
350 12:54:10.199915 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
351 12:54:10.206944 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
352 12:54:10.209946 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 12:54:10.216675 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
354 12:54:10.223366 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
355 12:54:10.233504 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
356 12:54:10.236661 Processing 188 relocs. Offset value of 0x74c0e000
357 12:54:10.245851 BS: romstage times (exec / console): total (unknown) / 257 ms
358 12:54:10.250586
359 12:54:10.251190
360 12:54:10.260654 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
361 12:54:10.267077 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 12:54:10.270228 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
363 12:54:10.277057 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
364 12:54:10.333162 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
365 12:54:10.340001 Processing 4805 relocs. Offset value of 0x75da8000
366 12:54:10.343161 BS: postcar times (exec / console): total (unknown) / 43 ms
367 12:54:10.346771
368 12:54:10.347207
369 12:54:10.356506 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
370 12:54:10.357003 Normal boot
371 12:54:10.360849 EC returned error result code 3
372 12:54:10.363954 FW_CONFIG value is 0x204
373 12:54:10.367095 GENERIC: 0.0 disabled by fw_config
374 12:54:10.373734 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 12:54:10.377839 I2C: 00:10 disabled by fw_config
376 12:54:10.381044 I2C: 00:10 disabled by fw_config
377 12:54:10.383884 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 12:54:10.390274 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 12:54:10.394414 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 12:54:10.400277 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
381 12:54:10.403805 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
382 12:54:10.407362 I2C: 00:10 disabled by fw_config
383 12:54:10.414425 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
384 12:54:10.420582 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
385 12:54:10.424087 I2C: 00:1a disabled by fw_config
386 12:54:10.427077 I2C: 00:1a disabled by fw_config
387 12:54:10.434026 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 12:54:10.437087 fw_config match found: AUDIO_AMP=UNPROVISIONED
389 12:54:10.440131 GENERIC: 0.0 disabled by fw_config
390 12:54:10.446859 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 12:54:10.450242 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
392 12:54:10.456947 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
393 12:54:10.460555 microcode: Update skipped, already up-to-date
394 12:54:10.467024 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
395 12:54:10.493702 Detected 2 core, 2 thread CPU.
396 12:54:10.496606 Setting up SMI for CPU
397 12:54:10.499751 IED base = 0x7b400000
398 12:54:10.500187 IED size = 0x00400000
399 12:54:10.503535 Will perform SMM setup.
400 12:54:10.506725 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
401 12:54:10.516751 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 12:54:10.519734 Processing 16 relocs. Offset value of 0x00030000
403 12:54:10.523947 Attempting to start 1 APs
404 12:54:10.527473 Waiting for 10ms after sending INIT.
405 12:54:10.543246 Waiting for 1st SIPI to complete...done.
406 12:54:10.543764 AP: slot 1 apic_id 2.
407 12:54:10.550035 Waiting for 2nd SIPI to complete...done.
408 12:54:10.556601 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 12:54:10.563237 Processing 13 relocs. Offset value of 0x00038000
410 12:54:10.563679 Unable to locate Global NVS
411 12:54:10.572965 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
412 12:54:10.576678 Installing permanent SMM handler to 0x7b000000
413 12:54:10.586527 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
414 12:54:10.589783 Processing 704 relocs. Offset value of 0x7b010000
415 12:54:10.600496 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
416 12:54:10.603313 Processing 13 relocs. Offset value of 0x7b008000
417 12:54:10.610070 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
418 12:54:10.613068 Unable to locate Global NVS
419 12:54:10.619774 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
420 12:54:10.623426 Clearing SMI status registers
421 12:54:10.623905 SMI_STS: PM1
422 12:54:10.626480 PM1_STS: PWRBTN
423 12:54:10.626942 TCO_STS: INTRD_DET
424 12:54:10.629921 GPE0 STD STS:
425 12:54:10.636136 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
426 12:54:10.639578 In relocation handler: CPU 0
427 12:54:10.643247 New SMBASE=0x7b000000 IEDBASE=0x7b400000
428 12:54:10.649928 Writing SMRR. base = 0x7b000006, mask=0xff800800
429 12:54:10.650625 Relocation complete.
430 12:54:10.656349 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
431 12:54:10.660070 In relocation handler: CPU 1
432 12:54:10.664044 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
433 12:54:10.671295 Writing SMRR. base = 0x7b000006, mask=0xff800800
434 12:54:10.671738 Relocation complete.
435 12:54:10.674546 Initializing CPU #0
436 12:54:10.677520 CPU: vendor Intel device 906c0
437 12:54:10.680924 CPU: family 06, model 9c, stepping 00
438 12:54:10.684700 Clearing out pending MCEs
439 12:54:10.687626 Setting up local APIC...
440 12:54:10.688079 apic_id: 0x00 done.
441 12:54:10.690862 Turbo is available but hidden
442 12:54:10.694590 Turbo is available and visible
443 12:54:10.701018 microcode: Update skipped, already up-to-date
444 12:54:10.701462 CPU #0 initialized
445 12:54:10.704031 Initializing CPU #1
446 12:54:10.707922 CPU: vendor Intel device 906c0
447 12:54:10.710922 CPU: family 06, model 9c, stepping 00
448 12:54:10.714053 Clearing out pending MCEs
449 12:54:10.717764 Setting up local APIC...
450 12:54:10.718165 apic_id: 0x02 done.
451 12:54:10.724199 microcode: Update skipped, already up-to-date
452 12:54:10.724691 CPU #1 initialized
453 12:54:10.727440 bsp_do_flight_plan done after 176 msecs.
454 12:54:10.731199 CPU: frequency set to 2800 MHz
455 12:54:10.734070 Enabling SMIs.
456 12:54:10.740498 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 290 ms
457 12:54:10.750535 Probing TPM: done!
458 12:54:10.756861 Connected to device vid:did:rid of 1ae0:0028:00
459 12:54:10.767095 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
460 12:54:10.770248 Initialized TPM device CR50 revision 0
461 12:54:10.773319 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
462 12:54:10.780761 Found a VBT of 7680 bytes after decompression
463 12:54:10.787684 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
464 12:54:10.822916 Detected 2 core, 2 thread CPU.
465 12:54:10.825678 Detected 2 core, 2 thread CPU.
466 12:54:11.188021 Display FSP Version Info HOB
467 12:54:11.190682 Reference Code - CPU = 8.7.22.30
468 12:54:11.194106 uCode Version = 24.0.0.1f
469 12:54:11.197474 TXT ACM version = ff.ff.ff.ffff
470 12:54:11.200433 Reference Code - ME = 8.7.22.30
471 12:54:11.204151 MEBx version = 0.0.0.0
472 12:54:11.207192 ME Firmware Version = Consumer SKU
473 12:54:11.211000 Reference Code - PCH = 8.7.22.30
474 12:54:11.214244 PCH-CRID Status = Disabled
475 12:54:11.217815 PCH-CRID Original Value = ff.ff.ff.ffff
476 12:54:11.220897 PCH-CRID New Value = ff.ff.ff.ffff
477 12:54:11.223747 OPROM - RST - RAID = ff.ff.ff.ffff
478 12:54:11.227304 PCH Hsio Version = 4.0.0.0
479 12:54:11.230763 Reference Code - SA - System Agent = 8.7.22.30
480 12:54:11.233878 Reference Code - MRC = 0.0.4.68
481 12:54:11.237147 SA - PCIe Version = 8.7.22.30
482 12:54:11.240802 SA-CRID Status = Disabled
483 12:54:11.245169 SA-CRID Original Value = 0.0.0.0
484 12:54:11.248716 SA-CRID New Value = 0.0.0.0
485 12:54:11.249295 OPROM - VBIOS = ff.ff.ff.ffff
486 12:54:11.255240 IO Manageability Engine FW Version = ff.ff.ff.ffff
487 12:54:11.259541 PHY Build Version = ff.ff.ff.ffff
488 12:54:11.263109 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
489 12:54:11.270121 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
490 12:54:11.270573 ITSS IRQ Polarities Before:
491 12:54:11.273123 IPC0: 0xffffffff
492 12:54:11.273568 IPC1: 0xffffffff
493 12:54:11.276553 IPC2: 0xffffffff
494 12:54:11.279655 IPC3: 0xffffffff
495 12:54:11.280093 ITSS IRQ Polarities After:
496 12:54:11.283088 IPC0: 0xffffffff
497 12:54:11.283484 IPC1: 0xffffffff
498 12:54:11.286680 IPC2: 0xffffffff
499 12:54:11.289989 IPC3: 0xffffffff
500 12:54:11.299751 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
501 12:54:11.306442 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 157 ms
502 12:54:11.309638 Enumerating buses...
503 12:54:11.313129 Show all devs... Before device enumeration.
504 12:54:11.316301 Root Device: enabled 1
505 12:54:11.319405 CPU_CLUSTER: 0: enabled 1
506 12:54:11.319844 DOMAIN: 0000: enabled 1
507 12:54:11.323043 PCI: 00:00.0: enabled 1
508 12:54:11.326304 PCI: 00:02.0: enabled 1
509 12:54:11.329538 PCI: 00:04.0: enabled 1
510 12:54:11.329982 PCI: 00:05.0: enabled 1
511 12:54:11.333100 PCI: 00:09.0: enabled 0
512 12:54:11.336024 PCI: 00:12.6: enabled 0
513 12:54:11.339920 PCI: 00:14.0: enabled 1
514 12:54:11.340359 PCI: 00:14.1: enabled 0
515 12:54:11.342977 PCI: 00:14.2: enabled 0
516 12:54:11.346081 PCI: 00:14.3: enabled 1
517 12:54:11.346528 PCI: 00:14.5: enabled 1
518 12:54:11.349665 PCI: 00:15.0: enabled 1
519 12:54:11.352770 PCI: 00:15.1: enabled 1
520 12:54:11.356528 PCI: 00:15.2: enabled 1
521 12:54:11.356973 PCI: 00:15.3: enabled 1
522 12:54:11.359686 PCI: 00:16.0: enabled 1
523 12:54:11.362854 PCI: 00:16.1: enabled 0
524 12:54:11.366301 PCI: 00:16.4: enabled 0
525 12:54:11.366749 PCI: 00:16.5: enabled 0
526 12:54:11.369853 PCI: 00:17.0: enabled 0
527 12:54:11.373017 PCI: 00:19.0: enabled 1
528 12:54:11.376137 PCI: 00:19.1: enabled 0
529 12:54:11.376615 PCI: 00:19.2: enabled 1
530 12:54:11.380149 PCI: 00:1a.0: enabled 1
531 12:54:11.382860 PCI: 00:1c.0: enabled 0
532 12:54:11.383309 PCI: 00:1c.1: enabled 0
533 12:54:11.386535 PCI: 00:1c.2: enabled 0
534 12:54:11.390045 PCI: 00:1c.3: enabled 0
535 12:54:11.392855 PCI: 00:1c.4: enabled 0
536 12:54:11.393302 PCI: 00:1c.5: enabled 0
537 12:54:11.396205 PCI: 00:1c.6: enabled 0
538 12:54:11.399738 PCI: 00:1c.7: enabled 1
539 12:54:11.402915 PCI: 00:1e.0: enabled 0
540 12:54:11.403353 PCI: 00:1e.1: enabled 0
541 12:54:11.406315 PCI: 00:1e.2: enabled 1
542 12:54:11.409708 PCI: 00:1e.3: enabled 0
543 12:54:11.412818 PCI: 00:1f.0: enabled 1
544 12:54:11.413257 PCI: 00:1f.1: enabled 1
545 12:54:11.416979 PCI: 00:1f.2: enabled 1
546 12:54:11.419650 PCI: 00:1f.3: enabled 1
547 12:54:11.422746 PCI: 00:1f.4: enabled 0
548 12:54:11.423203 PCI: 00:1f.5: enabled 1
549 12:54:11.426655 PCI: 00:1f.7: enabled 0
550 12:54:11.429707 GENERIC: 0.0: enabled 1
551 12:54:11.430173 GENERIC: 0.0: enabled 1
552 12:54:11.432812 USB0 port 0: enabled 1
553 12:54:11.436292 GENERIC: 0.0: enabled 1
554 12:54:11.440052 I2C: 00:2c: enabled 1
555 12:54:11.440746 I2C: 00:15: enabled 1
556 12:54:11.443029 GENERIC: 0.0: enabled 0
557 12:54:11.445986 I2C: 00:15: enabled 1
558 12:54:11.446428 I2C: 00:10: enabled 0
559 12:54:11.449946 I2C: 00:10: enabled 0
560 12:54:11.452968 I2C: 00:2c: enabled 1
561 12:54:11.453410 I2C: 00:40: enabled 1
562 12:54:11.456488 I2C: 00:10: enabled 1
563 12:54:11.459658 I2C: 00:39: enabled 1
564 12:54:11.460116 I2C: 00:36: enabled 1
565 12:54:11.462774 I2C: 00:10: enabled 0
566 12:54:11.466548 I2C: 00:0c: enabled 1
567 12:54:11.467017 I2C: 00:50: enabled 1
568 12:54:11.469367 I2C: 00:1a: enabled 1
569 12:54:11.472981 I2C: 00:1a: enabled 0
570 12:54:11.473478 I2C: 00:1a: enabled 0
571 12:54:11.475954 I2C: 00:28: enabled 1
572 12:54:11.479752 I2C: 00:29: enabled 1
573 12:54:11.482720 PCI: 00:00.0: enabled 1
574 12:54:11.483204 SPI: 00: enabled 1
575 12:54:11.486388 PNP: 0c09.0: enabled 1
576 12:54:11.489569 GENERIC: 0.0: enabled 0
577 12:54:11.490077 USB2 port 0: enabled 1
578 12:54:11.493344 USB2 port 1: enabled 1
579 12:54:11.496386 USB2 port 2: enabled 1
580 12:54:11.496867 USB2 port 3: enabled 1
581 12:54:11.499649 USB2 port 4: enabled 0
582 12:54:11.503183 USB2 port 5: enabled 1
583 12:54:11.503642 USB2 port 6: enabled 0
584 12:54:11.506852 USB2 port 7: enabled 1
585 12:54:11.509450 USB3 port 0: enabled 1
586 12:54:11.513027 USB3 port 1: enabled 1
587 12:54:11.513474 USB3 port 2: enabled 1
588 12:54:11.516649 USB3 port 3: enabled 1
589 12:54:11.519342 APIC: 00: enabled 1
590 12:54:11.519790 APIC: 02: enabled 1
591 12:54:11.523294 Compare with tree...
592 12:54:11.526135 Root Device: enabled 1
593 12:54:11.526579 CPU_CLUSTER: 0: enabled 1
594 12:54:11.529852 APIC: 00: enabled 1
595 12:54:11.532910 APIC: 02: enabled 1
596 12:54:11.536386 DOMAIN: 0000: enabled 1
597 12:54:11.536860 PCI: 00:00.0: enabled 1
598 12:54:11.539734 PCI: 00:02.0: enabled 1
599 12:54:11.543008 PCI: 00:04.0: enabled 1
600 12:54:11.545961 GENERIC: 0.0: enabled 1
601 12:54:11.550029 PCI: 00:05.0: enabled 1
602 12:54:11.550602 GENERIC: 0.0: enabled 1
603 12:54:11.552839 PCI: 00:09.0: enabled 0
604 12:54:11.556553 PCI: 00:12.6: enabled 0
605 12:54:11.559460 PCI: 00:14.0: enabled 1
606 12:54:11.562979 USB0 port 0: enabled 1
607 12:54:11.563461 USB2 port 0: enabled 1
608 12:54:11.566057 USB2 port 1: enabled 1
609 12:54:11.569307 USB2 port 2: enabled 1
610 12:54:11.572924 USB2 port 3: enabled 1
611 12:54:11.576178 USB2 port 4: enabled 0
612 12:54:11.576744 USB2 port 5: enabled 1
613 12:54:11.579626 USB2 port 6: enabled 0
614 12:54:11.582689 USB2 port 7: enabled 1
615 12:54:11.585925 USB3 port 0: enabled 1
616 12:54:11.589519 USB3 port 1: enabled 1
617 12:54:11.592717 USB3 port 2: enabled 1
618 12:54:11.593205 USB3 port 3: enabled 1
619 12:54:11.596460 PCI: 00:14.1: enabled 0
620 12:54:11.599658 PCI: 00:14.2: enabled 0
621 12:54:11.602877 PCI: 00:14.3: enabled 1
622 12:54:11.606073 GENERIC: 0.0: enabled 1
623 12:54:11.606575 PCI: 00:14.5: enabled 1
624 12:54:11.609613 PCI: 00:15.0: enabled 1
625 12:54:11.613075 I2C: 00:2c: enabled 1
626 12:54:11.616538 I2C: 00:15: enabled 1
627 12:54:11.616999 PCI: 00:15.1: enabled 1
628 12:54:11.619421 PCI: 00:15.2: enabled 1
629 12:54:11.622719 GENERIC: 0.0: enabled 0
630 12:54:11.626123 I2C: 00:15: enabled 1
631 12:54:11.629399 I2C: 00:10: enabled 0
632 12:54:11.629951 I2C: 00:10: enabled 0
633 12:54:11.632942 I2C: 00:2c: enabled 1
634 12:54:11.636130 I2C: 00:40: enabled 1
635 12:54:11.639256 I2C: 00:10: enabled 1
636 12:54:11.639704 I2C: 00:39: enabled 1
637 12:54:11.642644 PCI: 00:15.3: enabled 1
638 12:54:11.646337 I2C: 00:36: enabled 1
639 12:54:11.649302 I2C: 00:10: enabled 0
640 12:54:11.652605 I2C: 00:0c: enabled 1
641 12:54:11.653178 I2C: 00:50: enabled 1
642 12:54:11.656037 PCI: 00:16.0: enabled 1
643 12:54:11.659254 PCI: 00:16.1: enabled 0
644 12:54:11.662873 PCI: 00:16.4: enabled 0
645 12:54:11.665785 PCI: 00:16.5: enabled 0
646 12:54:11.666265 PCI: 00:17.0: enabled 0
647 12:54:11.669584 PCI: 00:19.0: enabled 1
648 12:54:11.672744 I2C: 00:1a: enabled 1
649 12:54:11.675867 I2C: 00:1a: enabled 0
650 12:54:11.676373 I2C: 00:1a: enabled 0
651 12:54:11.679409 I2C: 00:28: enabled 1
652 12:54:11.682714 I2C: 00:29: enabled 1
653 12:54:11.686602 PCI: 00:19.1: enabled 0
654 12:54:11.687115 PCI: 00:19.2: enabled 1
655 12:54:11.689461 PCI: 00:1a.0: enabled 1
656 12:54:11.692549 PCI: 00:1e.0: enabled 0
657 12:54:11.695664 PCI: 00:1e.1: enabled 0
658 12:54:11.699479 PCI: 00:1e.2: enabled 1
659 12:54:11.699920 SPI: 00: enabled 1
660 12:54:11.702706 PCI: 00:1e.3: enabled 0
661 12:54:11.705876 PCI: 00:1f.0: enabled 1
662 12:54:11.709801 PNP: 0c09.0: enabled 1
663 12:54:11.712524 PCI: 00:1f.1: enabled 1
664 12:54:11.713100 PCI: 00:1f.2: enabled 1
665 12:54:11.715835 PCI: 00:1f.3: enabled 1
666 12:54:11.719316 GENERIC: 0.0: enabled 0
667 12:54:11.722666 PCI: 00:1f.4: enabled 0
668 12:54:11.725764 PCI: 00:1f.5: enabled 1
669 12:54:11.726230 PCI: 00:1f.7: enabled 0
670 12:54:11.729198 Root Device scanning...
671 12:54:11.732664 scan_static_bus for Root Device
672 12:54:11.736096 CPU_CLUSTER: 0 enabled
673 12:54:11.736647 DOMAIN: 0000 enabled
674 12:54:11.739568 DOMAIN: 0000 scanning...
675 12:54:11.742863 PCI: pci_scan_bus for bus 00
676 12:54:11.745701 PCI: 00:00.0 [8086/0000] ops
677 12:54:11.749185 PCI: 00:00.0 [8086/4e22] enabled
678 12:54:11.752623 PCI: 00:02.0 [8086/0000] bus ops
679 12:54:11.755833 PCI: 00:02.0 [8086/4e55] enabled
680 12:54:11.759689 PCI: 00:04.0 [8086/0000] bus ops
681 12:54:11.762530 PCI: 00:04.0 [8086/4e03] enabled
682 12:54:11.766359 PCI: 00:05.0 [8086/0000] bus ops
683 12:54:11.769338 PCI: 00:05.0 [8086/4e19] enabled
684 12:54:11.772897 PCI: 00:08.0 [8086/4e11] enabled
685 12:54:11.776046 PCI: 00:14.0 [8086/0000] bus ops
686 12:54:11.779626 PCI: 00:14.0 [8086/4ded] enabled
687 12:54:11.782654 PCI: 00:14.2 [8086/4def] disabled
688 12:54:11.786580 PCI: 00:14.3 [8086/0000] bus ops
689 12:54:11.789741 PCI: 00:14.3 [8086/4df0] enabled
690 12:54:11.792557 PCI: 00:14.5 [8086/0000] ops
691 12:54:11.796351 PCI: 00:14.5 [8086/4df8] enabled
692 12:54:11.799887 PCI: 00:15.0 [8086/0000] bus ops
693 12:54:11.802872 PCI: 00:15.0 [8086/4de8] enabled
694 12:54:11.805927 PCI: 00:15.1 [8086/0000] bus ops
695 12:54:11.809534 PCI: 00:15.1 [8086/4de9] enabled
696 12:54:11.812580 PCI: 00:15.2 [8086/0000] bus ops
697 12:54:11.816263 PCI: 00:15.2 [8086/4dea] enabled
698 12:54:11.819199 PCI: 00:15.3 [8086/0000] bus ops
699 12:54:11.822892 PCI: 00:15.3 [8086/4deb] enabled
700 12:54:11.826128 PCI: 00:16.0 [8086/0000] ops
701 12:54:11.829578 PCI: 00:16.0 [8086/4de0] enabled
702 12:54:11.832910 PCI: 00:19.0 [8086/0000] bus ops
703 12:54:11.836134 PCI: 00:19.0 [8086/4dc5] enabled
704 12:54:11.839385 PCI: 00:19.2 [8086/0000] ops
705 12:54:11.842903 PCI: 00:19.2 [8086/4dc7] enabled
706 12:54:11.846012 PCI: 00:1a.0 [8086/0000] ops
707 12:54:11.849321 PCI: 00:1a.0 [8086/4dc4] enabled
708 12:54:11.849765 PCI: 00:1e.0 [8086/0000] ops
709 12:54:11.852745 PCI: 00:1e.0 [8086/4da8] disabled
710 12:54:11.856441 PCI: 00:1e.2 [8086/0000] bus ops
711 12:54:11.859555 PCI: 00:1e.2 [8086/4daa] enabled
712 12:54:11.862494 PCI: 00:1f.0 [8086/0000] bus ops
713 12:54:11.866350 PCI: 00:1f.0 [8086/4d87] enabled
714 12:54:11.873054 PCI: Static device PCI: 00:1f.1 not found, disabling it.
715 12:54:11.876118 RTC Init
716 12:54:11.879224 Set power on after power failure.
717 12:54:11.879666 Disabling Deep S3
718 12:54:11.883055 Disabling Deep S3
719 12:54:11.883619 Disabling Deep S4
720 12:54:11.886173 Disabling Deep S4
721 12:54:11.886731 Disabling Deep S5
722 12:54:11.889497 Disabling Deep S5
723 12:54:11.893029 PCI: 00:1f.2 [0000/0000] hidden
724 12:54:11.896073 PCI: 00:1f.3 [8086/0000] bus ops
725 12:54:11.899150 PCI: 00:1f.3 [8086/4dc8] enabled
726 12:54:11.903051 PCI: 00:1f.5 [8086/0000] bus ops
727 12:54:11.906009 PCI: 00:1f.5 [8086/4da4] enabled
728 12:54:11.909160 PCI: Leftover static devices:
729 12:54:11.909600 PCI: 00:12.6
730 12:54:11.912966 PCI: 00:09.0
731 12:54:11.913531 PCI: 00:14.1
732 12:54:11.916024 PCI: 00:16.1
733 12:54:11.916592 PCI: 00:16.4
734 12:54:11.916953 PCI: 00:16.5
735 12:54:11.919252 PCI: 00:17.0
736 12:54:11.919691 PCI: 00:19.1
737 12:54:11.923131 PCI: 00:1e.1
738 12:54:11.923573 PCI: 00:1e.3
739 12:54:11.923928 PCI: 00:1f.1
740 12:54:11.926823 PCI: 00:1f.4
741 12:54:11.927255 PCI: 00:1f.7
742 12:54:11.930798 PCI: Check your devicetree.cb.
743 12:54:11.934368 PCI: 00:02.0 scanning...
744 12:54:11.937391 scan_generic_bus for PCI: 00:02.0
745 12:54:11.940778 scan_generic_bus for PCI: 00:02.0 done
746 12:54:11.944410 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
747 12:54:11.947060 PCI: 00:04.0 scanning...
748 12:54:11.950641 scan_generic_bus for PCI: 00:04.0
749 12:54:11.954175 GENERIC: 0.0 enabled
750 12:54:11.960884 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
751 12:54:11.964473 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
752 12:54:11.967402 PCI: 00:05.0 scanning...
753 12:54:11.970536 scan_generic_bus for PCI: 00:05.0
754 12:54:11.970973 GENERIC: 0.0 enabled
755 12:54:11.977234 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
756 12:54:11.984114 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
757 12:54:11.984651 PCI: 00:14.0 scanning...
758 12:54:11.988004 scan_static_bus for PCI: 00:14.0
759 12:54:11.991009 USB0 port 0 enabled
760 12:54:11.994479 USB0 port 0 scanning...
761 12:54:11.997565 scan_static_bus for USB0 port 0
762 12:54:11.998135 USB2 port 0 enabled
763 12:54:12.000976 USB2 port 1 enabled
764 12:54:12.004118 USB2 port 2 enabled
765 12:54:12.004658 USB2 port 3 enabled
766 12:54:12.007313 USB2 port 4 disabled
767 12:54:12.011025 USB2 port 5 enabled
768 12:54:12.011622 USB2 port 6 disabled
769 12:54:12.014139 USB2 port 7 enabled
770 12:54:12.014602 USB3 port 0 enabled
771 12:54:12.017849 USB3 port 1 enabled
772 12:54:12.020805 USB3 port 2 enabled
773 12:54:12.021264 USB3 port 3 enabled
774 12:54:12.024096 USB2 port 0 scanning...
775 12:54:12.027891 scan_static_bus for USB2 port 0
776 12:54:12.031082 scan_static_bus for USB2 port 0 done
777 12:54:12.037317 scan_bus: bus USB2 port 0 finished in 6 msecs
778 12:54:12.037759 USB2 port 1 scanning...
779 12:54:12.040931 scan_static_bus for USB2 port 1
780 12:54:12.044258 scan_static_bus for USB2 port 1 done
781 12:54:12.050703 scan_bus: bus USB2 port 1 finished in 6 msecs
782 12:54:12.054200 USB2 port 2 scanning...
783 12:54:12.057705 scan_static_bus for USB2 port 2
784 12:54:12.060758 scan_static_bus for USB2 port 2 done
785 12:54:12.064267 scan_bus: bus USB2 port 2 finished in 6 msecs
786 12:54:12.067642 USB2 port 3 scanning...
787 12:54:12.070661 scan_static_bus for USB2 port 3
788 12:54:12.073794 scan_static_bus for USB2 port 3 done
789 12:54:12.077133 scan_bus: bus USB2 port 3 finished in 6 msecs
790 12:54:12.080689 USB2 port 5 scanning...
791 12:54:12.083720 scan_static_bus for USB2 port 5
792 12:54:12.087392 scan_static_bus for USB2 port 5 done
793 12:54:12.094111 scan_bus: bus USB2 port 5 finished in 6 msecs
794 12:54:12.094588 USB2 port 7 scanning...
795 12:54:12.097775 scan_static_bus for USB2 port 7
796 12:54:12.100969 scan_static_bus for USB2 port 7 done
797 12:54:12.107380 scan_bus: bus USB2 port 7 finished in 6 msecs
798 12:54:12.111165 USB3 port 0 scanning...
799 12:54:12.114085 scan_static_bus for USB3 port 0
800 12:54:12.117418 scan_static_bus for USB3 port 0 done
801 12:54:12.120463 scan_bus: bus USB3 port 0 finished in 6 msecs
802 12:54:12.124082 USB3 port 1 scanning...
803 12:54:12.127369 scan_static_bus for USB3 port 1
804 12:54:12.130548 scan_static_bus for USB3 port 1 done
805 12:54:12.134537 scan_bus: bus USB3 port 1 finished in 6 msecs
806 12:54:12.137365 USB3 port 2 scanning...
807 12:54:12.140917 scan_static_bus for USB3 port 2
808 12:54:12.144133 scan_static_bus for USB3 port 2 done
809 12:54:12.150570 scan_bus: bus USB3 port 2 finished in 6 msecs
810 12:54:12.151046 USB3 port 3 scanning...
811 12:54:12.154063 scan_static_bus for USB3 port 3
812 12:54:12.157242 scan_static_bus for USB3 port 3 done
813 12:54:12.164147 scan_bus: bus USB3 port 3 finished in 6 msecs
814 12:54:12.167146 scan_static_bus for USB0 port 0 done
815 12:54:12.170867 scan_bus: bus USB0 port 0 finished in 173 msecs
816 12:54:12.177484 scan_static_bus for PCI: 00:14.0 done
817 12:54:12.180353 scan_bus: bus PCI: 00:14.0 finished in 190 msecs
818 12:54:12.183715 PCI: 00:14.3 scanning...
819 12:54:12.187168 scan_static_bus for PCI: 00:14.3
820 12:54:12.190504 GENERIC: 0.0 enabled
821 12:54:12.194165 scan_static_bus for PCI: 00:14.3 done
822 12:54:12.197190 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
823 12:54:12.200259 PCI: 00:15.0 scanning...
824 12:54:12.204071 scan_static_bus for PCI: 00:15.0
825 12:54:12.206965 I2C: 00:2c enabled
826 12:54:12.207419 I2C: 00:15 enabled
827 12:54:12.210547 scan_static_bus for PCI: 00:15.0 done
828 12:54:12.217203 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
829 12:54:12.220321 PCI: 00:15.1 scanning...
830 12:54:12.223908 scan_static_bus for PCI: 00:15.1
831 12:54:12.227042 scan_static_bus for PCI: 00:15.1 done
832 12:54:12.230179 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
833 12:54:12.234168 PCI: 00:15.2 scanning...
834 12:54:12.237077 scan_static_bus for PCI: 00:15.2
835 12:54:12.240528 GENERIC: 0.0 disabled
836 12:54:12.241092 I2C: 00:15 enabled
837 12:54:12.244173 I2C: 00:10 disabled
838 12:54:12.244783 I2C: 00:10 disabled
839 12:54:12.247013 I2C: 00:2c enabled
840 12:54:12.250499 I2C: 00:40 enabled
841 12:54:12.251011 I2C: 00:10 enabled
842 12:54:12.253693 I2C: 00:39 enabled
843 12:54:12.257172 scan_static_bus for PCI: 00:15.2 done
844 12:54:12.260327 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
845 12:54:12.263717 PCI: 00:15.3 scanning...
846 12:54:12.266724 scan_static_bus for PCI: 00:15.3
847 12:54:12.270464 I2C: 00:36 enabled
848 12:54:12.270998 I2C: 00:10 disabled
849 12:54:12.273987 I2C: 00:0c enabled
850 12:54:12.276769 I2C: 00:50 enabled
851 12:54:12.280286 scan_static_bus for PCI: 00:15.3 done
852 12:54:12.283783 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
853 12:54:12.287338 PCI: 00:19.0 scanning...
854 12:54:12.290608 scan_static_bus for PCI: 00:19.0
855 12:54:12.293449 I2C: 00:1a enabled
856 12:54:12.293888 I2C: 00:1a disabled
857 12:54:12.296948 I2C: 00:1a disabled
858 12:54:12.297400 I2C: 00:28 enabled
859 12:54:12.300233 I2C: 00:29 enabled
860 12:54:12.303942 scan_static_bus for PCI: 00:19.0 done
861 12:54:12.310296 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
862 12:54:12.310740 PCI: 00:1e.2 scanning...
863 12:54:12.313429 scan_generic_bus for PCI: 00:1e.2
864 12:54:12.317097 SPI: 00 enabled
865 12:54:12.323880 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
866 12:54:12.326862 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
867 12:54:12.330611 PCI: 00:1f.0 scanning...
868 12:54:12.333968 scan_static_bus for PCI: 00:1f.0
869 12:54:12.337003 PNP: 0c09.0 enabled
870 12:54:12.337445 PNP: 0c09.0 scanning...
871 12:54:12.339939 scan_static_bus for PNP: 0c09.0
872 12:54:12.346859 scan_static_bus for PNP: 0c09.0 done
873 12:54:12.349904 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
874 12:54:12.353738 scan_static_bus for PCI: 00:1f.0 done
875 12:54:12.356923 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
876 12:54:12.360009 PCI: 00:1f.3 scanning...
877 12:54:12.363613 scan_static_bus for PCI: 00:1f.3
878 12:54:12.366594 GENERIC: 0.0 disabled
879 12:54:12.370151 scan_static_bus for PCI: 00:1f.3 done
880 12:54:12.377100 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
881 12:54:12.377545 PCI: 00:1f.5 scanning...
882 12:54:12.379766 scan_generic_bus for PCI: 00:1f.5
883 12:54:12.386485 scan_generic_bus for PCI: 00:1f.5 done
884 12:54:12.389707 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
885 12:54:12.393224 scan_bus: bus DOMAIN: 0000 finished in 650 msecs
886 12:54:12.399903 scan_static_bus for Root Device done
887 12:54:12.403433 scan_bus: bus Root Device finished in 669 msecs
888 12:54:12.403988 done
889 12:54:12.410105 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1091 ms
890 12:54:12.413414 Chrome EC: UHEPI supported
891 12:54:12.420108 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
892 12:54:12.426264 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
893 12:54:12.429983 SPI flash protection: WPSW=0 SRP0=1
894 12:54:12.433140 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
895 12:54:12.439972 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
896 12:54:12.442971 found VGA at PCI: 00:02.0
897 12:54:12.446801 Setting up VGA for PCI: 00:02.0
898 12:54:12.449763 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
899 12:54:12.456589 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
900 12:54:12.459761 Allocating resources...
901 12:54:12.460205 Reading resources...
902 12:54:12.463462 Root Device read_resources bus 0 link: 0
903 12:54:12.469678 CPU_CLUSTER: 0 read_resources bus 0 link: 0
904 12:54:12.473277 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
905 12:54:12.480218 DOMAIN: 0000 read_resources bus 0 link: 0
906 12:54:12.482992 PCI: 00:04.0 read_resources bus 1 link: 0
907 12:54:12.489960 PCI: 00:04.0 read_resources bus 1 link: 0 done
908 12:54:12.493356 PCI: 00:05.0 read_resources bus 2 link: 0
909 12:54:12.499379 PCI: 00:05.0 read_resources bus 2 link: 0 done
910 12:54:12.503338 PCI: 00:14.0 read_resources bus 0 link: 0
911 12:54:12.506841 USB0 port 0 read_resources bus 0 link: 0
912 12:54:12.514604 USB0 port 0 read_resources bus 0 link: 0 done
913 12:54:12.518432 PCI: 00:14.0 read_resources bus 0 link: 0 done
914 12:54:12.522142 PCI: 00:14.3 read_resources bus 0 link: 0
915 12:54:12.581714 PCI: 00:14.3 read_resources bus 0 link: 0 done
916 12:54:12.582240 PCI: 00:15.0 read_resources bus 0 link: 0
917 12:54:12.582961 PCI: 00:15.0 read_resources bus 0 link: 0 done
918 12:54:12.583305 PCI: 00:15.2 read_resources bus 0 link: 0
919 12:54:12.583616 PCI: 00:15.2 read_resources bus 0 link: 0 done
920 12:54:12.583930 PCI: 00:15.3 read_resources bus 0 link: 0
921 12:54:12.584220 PCI: 00:15.3 read_resources bus 0 link: 0 done
922 12:54:12.584546 PCI: 00:19.0 read_resources bus 0 link: 0
923 12:54:12.584838 PCI: 00:19.0 read_resources bus 0 link: 0 done
924 12:54:12.585121 PCI: 00:1e.2 read_resources bus 3 link: 0
925 12:54:12.585400 PCI: 00:1e.2 read_resources bus 3 link: 0 done
926 12:54:12.585677 PCI: 00:1f.0 read_resources bus 0 link: 0
927 12:54:12.596010 PCI: 00:1f.0 read_resources bus 0 link: 0 done
928 12:54:12.596459 PCI: 00:1f.3 read_resources bus 0 link: 0
929 12:54:12.599352 PCI: 00:1f.3 read_resources bus 0 link: 0 done
930 12:54:12.602532 DOMAIN: 0000 read_resources bus 0 link: 0 done
931 12:54:12.606063 Root Device read_resources bus 0 link: 0 done
932 12:54:12.609448 Done reading resources.
933 12:54:12.616353 Show resources in subtree (Root Device)...After reading.
934 12:54:12.619648 Root Device child on link 0 CPU_CLUSTER: 0
935 12:54:12.625915 CPU_CLUSTER: 0 child on link 0 APIC: 00
936 12:54:12.626335 APIC: 00
937 12:54:12.626680 APIC: 02
938 12:54:12.632887 DOMAIN: 0000 child on link 0 PCI: 00:00.0
939 12:54:12.639483 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
940 12:54:12.649564 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
941 12:54:12.652514 PCI: 00:00.0
942 12:54:12.662484 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
943 12:54:12.672390 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
944 12:54:12.682410 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
945 12:54:12.689240 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
946 12:54:12.699400 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
947 12:54:12.709562 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
948 12:54:12.718913 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
949 12:54:12.729174 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
950 12:54:12.735932 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
951 12:54:12.745478 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
952 12:54:12.755811 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
953 12:54:12.765380 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
954 12:54:12.775855 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
955 12:54:12.782610 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
956 12:54:12.791965 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
957 12:54:12.802383 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
958 12:54:12.811958 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
959 12:54:12.821893 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
960 12:54:12.832511 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
961 12:54:12.832972 PCI: 00:02.0
962 12:54:12.841974 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 12:54:12.852077 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
964 12:54:12.862319 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
965 12:54:12.865273 PCI: 00:04.0 child on link 0 GENERIC: 0.0
966 12:54:12.875768 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
967 12:54:12.879067 GENERIC: 0.0
968 12:54:12.882473 PCI: 00:05.0 child on link 0 GENERIC: 0.0
969 12:54:12.892509 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
970 12:54:12.895464 GENERIC: 0.0
971 12:54:12.895910 PCI: 00:08.0
972 12:54:12.905516 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
973 12:54:12.911984 PCI: 00:14.0 child on link 0 USB0 port 0
974 12:54:12.922050 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
975 12:54:12.925432 USB0 port 0 child on link 0 USB2 port 0
976 12:54:12.928846 USB2 port 0
977 12:54:12.929287 USB2 port 1
978 12:54:12.931873 USB2 port 2
979 12:54:12.932344 USB2 port 3
980 12:54:12.935627 USB2 port 4
981 12:54:12.936081 USB2 port 5
982 12:54:12.938890 USB2 port 6
983 12:54:12.939447 USB2 port 7
984 12:54:12.941864 USB3 port 0
985 12:54:12.942303 USB3 port 1
986 12:54:12.945568 USB3 port 2
987 12:54:12.946006 USB3 port 3
988 12:54:12.948623 PCI: 00:14.2
989 12:54:12.952202 PCI: 00:14.3 child on link 0 GENERIC: 0.0
990 12:54:12.962293 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
991 12:54:12.965856 GENERIC: 0.0
992 12:54:12.966366 PCI: 00:14.5
993 12:54:12.975973 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
994 12:54:12.981996 PCI: 00:15.0 child on link 0 I2C: 00:2c
995 12:54:12.992183 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
996 12:54:12.992762 I2C: 00:2c
997 12:54:12.993137 I2C: 00:15
998 12:54:12.995270 PCI: 00:15.1
999 12:54:13.005558 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1000 12:54:13.009027 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1001 12:54:13.018918 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1002 12:54:13.022038 GENERIC: 0.0
1003 12:54:13.022477 I2C: 00:15
1004 12:54:13.025100 I2C: 00:10
1005 12:54:13.025627 I2C: 00:10
1006 12:54:13.028521 I2C: 00:2c
1007 12:54:13.028983 I2C: 00:40
1008 12:54:13.031911 I2C: 00:10
1009 12:54:13.032350 I2C: 00:39
1010 12:54:13.035234 PCI: 00:15.3 child on link 0 I2C: 00:36
1011 12:54:13.045182 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 12:54:13.048647 I2C: 00:36
1013 12:54:13.049215 I2C: 00:10
1014 12:54:13.052595 I2C: 00:0c
1015 12:54:13.053117 I2C: 00:50
1016 12:54:13.055861 PCI: 00:16.0
1017 12:54:13.065677 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1018 12:54:13.068506 PCI: 00:19.0 child on link 0 I2C: 00:1a
1019 12:54:13.078469 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1020 12:54:13.082077 I2C: 00:1a
1021 12:54:13.082522 I2C: 00:1a
1022 12:54:13.085285 I2C: 00:1a
1023 12:54:13.085827 I2C: 00:28
1024 12:54:13.086215 I2C: 00:29
1025 12:54:13.089165 PCI: 00:19.2
1026 12:54:13.098392 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1027 12:54:13.108471 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1028 12:54:13.111921 PCI: 00:1a.0
1029 12:54:13.122397 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1030 12:54:13.122898 PCI: 00:1e.0
1031 12:54:13.128683 PCI: 00:1e.2 child on link 0 SPI: 00
1032 12:54:13.138487 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1033 12:54:13.138958 SPI: 00
1034 12:54:13.141949 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1035 12:54:13.152034 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1036 12:54:13.152580 PNP: 0c09.0
1037 12:54:13.162320 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1038 12:54:13.165250 PCI: 00:1f.2
1039 12:54:13.171684 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1040 12:54:13.181860 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1041 12:54:13.186319 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1042 12:54:13.196464 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1043 12:54:13.206274 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1044 12:54:13.209930 GENERIC: 0.0
1045 12:54:13.210369 PCI: 00:1f.5
1046 12:54:13.220045 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1047 12:54:13.226552 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1048 12:54:13.236425 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1049 12:54:13.239273 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1050 12:54:13.249622 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1051 12:54:13.256351 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1052 12:54:13.263046 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1053 12:54:13.266548 DOMAIN: 0000: Resource ranges:
1054 12:54:13.269845 * Base: 1000, Size: 800, Tag: 100
1055 12:54:13.272691 * Base: 1900, Size: e700, Tag: 100
1056 12:54:13.279675 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1057 12:54:13.286562 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1058 12:54:13.292905 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1059 12:54:13.299752 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1060 12:54:13.309923 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1061 12:54:13.316318 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1062 12:54:13.323090 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1063 12:54:13.333040 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1064 12:54:13.340102 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1065 12:54:13.346147 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1066 12:54:13.355974 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1067 12:54:13.362539 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1068 12:54:13.369532 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1069 12:54:13.379442 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1070 12:54:13.386459 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1071 12:54:13.392622 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1072 12:54:13.399354 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1073 12:54:13.409490 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1074 12:54:13.416518 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1075 12:54:13.426053 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1076 12:54:13.433069 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1077 12:54:13.439324 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1078 12:54:13.445912 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1079 12:54:13.455751 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1080 12:54:13.459390 DOMAIN: 0000: Resource ranges:
1081 12:54:13.462292 * Base: 7fc00000, Size: 40400000, Tag: 200
1082 12:54:13.465957 * Base: d0000000, Size: 2b000000, Tag: 200
1083 12:54:13.472183 * Base: fb001000, Size: 2fff000, Tag: 200
1084 12:54:13.475845 * Base: fe010000, Size: 22000, Tag: 200
1085 12:54:13.479214 * Base: fe033000, Size: a4d000, Tag: 200
1086 12:54:13.482330 * Base: fea88000, Size: 2f8000, Tag: 200
1087 12:54:13.489299 * Base: fed88000, Size: 8000, Tag: 200
1088 12:54:13.492726 * Base: fed93000, Size: d000, Tag: 200
1089 12:54:13.495531 * Base: feda2000, Size: 125e000, Tag: 200
1090 12:54:13.502581 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1091 12:54:13.509026 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1092 12:54:13.515894 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1093 12:54:13.522534 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1094 12:54:13.528866 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1095 12:54:13.535483 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1096 12:54:13.542405 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1097 12:54:13.549166 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1098 12:54:13.555604 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1099 12:54:13.562576 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1100 12:54:13.569267 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1101 12:54:13.575942 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1102 12:54:13.582367 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1103 12:54:13.588918 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1104 12:54:13.595364 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1105 12:54:13.602450 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1106 12:54:13.609136 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1107 12:54:13.615839 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1108 12:54:13.622089 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1109 12:54:13.628968 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1110 12:54:13.635660 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1111 12:54:13.642385 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1112 12:54:13.649066 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1113 12:54:13.652086 Root Device assign_resources, bus 0 link: 0
1114 12:54:13.658708 DOMAIN: 0000 assign_resources, bus 0 link: 0
1115 12:54:13.665854 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1116 12:54:13.675889 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1117 12:54:13.682265 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1118 12:54:13.692511 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1119 12:54:13.695920 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 12:54:13.698793 PCI: 00:04.0 assign_resources, bus 1 link: 0
1121 12:54:13.709388 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1122 12:54:13.712605 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 12:54:13.718933 PCI: 00:05.0 assign_resources, bus 2 link: 0
1124 12:54:13.725628 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1125 12:54:13.735354 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1126 12:54:13.738543 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 12:54:13.742340 PCI: 00:14.0 assign_resources, bus 0 link: 0
1128 12:54:13.752482 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1129 12:54:13.755496 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 12:54:13.762691 PCI: 00:14.3 assign_resources, bus 0 link: 0
1131 12:54:13.769983 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1132 12:54:13.776557 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1133 12:54:13.783356 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 12:54:13.786515 PCI: 00:15.0 assign_resources, bus 0 link: 0
1135 12:54:13.793231 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1136 12:54:13.803024 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1137 12:54:13.806738 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 12:54:13.812961 PCI: 00:15.2 assign_resources, bus 0 link: 0
1139 12:54:13.819888 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1140 12:54:13.823066 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 12:54:13.829857 PCI: 00:15.3 assign_resources, bus 0 link: 0
1142 12:54:13.836697 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1143 12:54:13.846765 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1144 12:54:13.849664 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 12:54:13.856239 PCI: 00:19.0 assign_resources, bus 0 link: 0
1146 12:54:13.863171 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1147 12:54:13.869704 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1148 12:54:13.879655 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1149 12:54:13.883037 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 12:54:13.889862 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1151 12:54:13.892944 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 12:54:13.899706 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1153 12:54:13.902649 LPC: Trying to open IO window from 800 size 1ff
1154 12:54:13.912734 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1155 12:54:13.919294 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1156 12:54:13.922922 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 12:54:13.929319 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1158 12:54:13.936191 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1159 12:54:13.942798 DOMAIN: 0000 assign_resources, bus 0 link: 0
1160 12:54:13.946155 Root Device assign_resources, bus 0 link: 0
1161 12:54:13.949040 Done setting resources.
1162 12:54:13.955861 Show resources in subtree (Root Device)...After assigning values.
1163 12:54:13.958852 Root Device child on link 0 CPU_CLUSTER: 0
1164 12:54:13.962852 CPU_CLUSTER: 0 child on link 0 APIC: 00
1165 12:54:13.966177 APIC: 00
1166 12:54:13.966605 APIC: 02
1167 12:54:13.969210 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1168 12:54:13.979460 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1169 12:54:13.989050 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1170 12:54:13.992908 PCI: 00:00.0
1171 12:54:14.003082 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1172 12:54:14.009385 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1173 12:54:14.018877 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1174 12:54:14.029194 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1175 12:54:14.039036 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1176 12:54:14.048816 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1177 12:54:14.058846 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1178 12:54:14.065614 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1179 12:54:14.075881 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1180 12:54:14.085537 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1181 12:54:14.095856 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1182 12:54:14.105240 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1183 12:54:14.111997 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1184 12:54:14.122141 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1185 12:54:14.132154 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1186 12:54:14.141895 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1187 12:54:14.151485 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1188 12:54:14.161320 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1189 12:54:14.167920 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1190 12:54:14.171637 PCI: 00:02.0
1191 12:54:14.181883 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1192 12:54:14.191174 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1193 12:54:14.201631 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1194 12:54:14.207876 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1195 12:54:14.217738 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1196 12:54:14.217862 GENERIC: 0.0
1197 12:54:14.224775 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1198 12:54:14.234644 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1199 12:54:14.234791 GENERIC: 0.0
1200 12:54:14.237602 PCI: 00:08.0
1201 12:54:14.247939 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1202 12:54:14.251356 PCI: 00:14.0 child on link 0 USB0 port 0
1203 12:54:14.261247 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1204 12:54:14.268062 USB0 port 0 child on link 0 USB2 port 0
1205 12:54:14.268215 USB2 port 0
1206 12:54:14.270940 USB2 port 1
1207 12:54:14.271076 USB2 port 2
1208 12:54:14.274657 USB2 port 3
1209 12:54:14.274774 USB2 port 4
1210 12:54:14.277685 USB2 port 5
1211 12:54:14.277800 USB2 port 6
1212 12:54:14.281464 USB2 port 7
1213 12:54:14.281586 USB3 port 0
1214 12:54:14.284641 USB3 port 1
1215 12:54:14.287634 USB3 port 2
1216 12:54:14.287733 USB3 port 3
1217 12:54:14.291264 PCI: 00:14.2
1218 12:54:14.294872 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1219 12:54:14.304837 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1220 12:54:14.308130 GENERIC: 0.0
1221 12:54:14.308266 PCI: 00:14.5
1222 12:54:14.317758 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1223 12:54:14.321489 PCI: 00:15.0 child on link 0 I2C: 00:2c
1224 12:54:14.334649 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1225 12:54:14.334827 I2C: 00:2c
1226 12:54:14.334955 I2C: 00:15
1227 12:54:14.338120 PCI: 00:15.1
1228 12:54:14.347867 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1229 12:54:14.350810 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1230 12:54:14.364570 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1231 12:54:14.364719 GENERIC: 0.0
1232 12:54:14.367708 I2C: 00:15
1233 12:54:14.367804 I2C: 00:10
1234 12:54:14.370893 I2C: 00:10
1235 12:54:14.371017 I2C: 00:2c
1236 12:54:14.371125 I2C: 00:40
1237 12:54:14.374468 I2C: 00:10
1238 12:54:14.374595 I2C: 00:39
1239 12:54:14.381283 PCI: 00:15.3 child on link 0 I2C: 00:36
1240 12:54:14.390997 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1241 12:54:14.391117 I2C: 00:36
1242 12:54:14.394107 I2C: 00:10
1243 12:54:14.394201 I2C: 00:0c
1244 12:54:14.397743 I2C: 00:50
1245 12:54:14.397842 PCI: 00:16.0
1246 12:54:14.407527 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1247 12:54:14.414359 PCI: 00:19.0 child on link 0 I2C: 00:1a
1248 12:54:14.424305 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1249 12:54:14.424445 I2C: 00:1a
1250 12:54:14.427987 I2C: 00:1a
1251 12:54:14.428086 I2C: 00:1a
1252 12:54:14.430918 I2C: 00:28
1253 12:54:14.431016 I2C: 00:29
1254 12:54:14.434090 PCI: 00:19.2
1255 12:54:14.444072 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1256 12:54:14.454011 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1257 12:54:14.457600 PCI: 00:1a.0
1258 12:54:14.467440 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1259 12:54:14.467554 PCI: 00:1e.0
1260 12:54:14.470584 PCI: 00:1e.2 child on link 0 SPI: 00
1261 12:54:14.484055 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1262 12:54:14.484210 SPI: 00
1263 12:54:14.487084 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1264 12:54:14.497597 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1265 12:54:14.497746 PNP: 0c09.0
1266 12:54:14.507300 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1267 12:54:14.510892 PCI: 00:1f.2
1268 12:54:14.517224 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1269 12:54:14.527219 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1270 12:54:14.530828 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1271 12:54:14.544326 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1272 12:54:14.554320 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1273 12:54:14.554465 GENERIC: 0.0
1274 12:54:14.557078 PCI: 00:1f.5
1275 12:54:14.567073 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1276 12:54:14.570567 Done allocating resources.
1277 12:54:14.577371 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2110 ms
1278 12:54:14.577499 Enabling resources...
1279 12:54:14.584077 PCI: 00:00.0 subsystem <- 8086/4e22
1280 12:54:14.584197 PCI: 00:00.0 cmd <- 06
1281 12:54:14.587635 PCI: 00:02.0 subsystem <- 8086/4e55
1282 12:54:14.590918 PCI: 00:02.0 cmd <- 03
1283 12:54:14.593929 PCI: 00:04.0 subsystem <- 8086/4e03
1284 12:54:14.597519 PCI: 00:04.0 cmd <- 02
1285 12:54:14.600636 PCI: 00:05.0 bridge ctrl <- 0003
1286 12:54:14.603796 PCI: 00:05.0 subsystem <- 8086/4e19
1287 12:54:14.607152 PCI: 00:05.0 cmd <- 02
1288 12:54:14.610944 PCI: 00:08.0 cmd <- 06
1289 12:54:14.613955 PCI: 00:14.0 subsystem <- 8086/4ded
1290 12:54:14.614061 PCI: 00:14.0 cmd <- 02
1291 12:54:14.620811 PCI: 00:14.3 subsystem <- 8086/4df0
1292 12:54:14.620931 PCI: 00:14.3 cmd <- 02
1293 12:54:14.623757 PCI: 00:14.5 subsystem <- 8086/4df8
1294 12:54:14.627629 PCI: 00:14.5 cmd <- 06
1295 12:54:14.630627 PCI: 00:15.0 subsystem <- 8086/4de8
1296 12:54:14.633904 PCI: 00:15.0 cmd <- 02
1297 12:54:14.637731 PCI: 00:15.1 subsystem <- 8086/4de9
1298 12:54:14.640475 PCI: 00:15.1 cmd <- 02
1299 12:54:14.643796 PCI: 00:15.2 subsystem <- 8086/4dea
1300 12:54:14.647286 PCI: 00:15.2 cmd <- 02
1301 12:54:14.650460 PCI: 00:15.3 subsystem <- 8086/4deb
1302 12:54:14.654140 PCI: 00:15.3 cmd <- 02
1303 12:54:14.657228 PCI: 00:16.0 subsystem <- 8086/4de0
1304 12:54:14.657356 PCI: 00:16.0 cmd <- 02
1305 12:54:14.663901 PCI: 00:19.0 subsystem <- 8086/4dc5
1306 12:54:14.664052 PCI: 00:19.0 cmd <- 02
1307 12:54:14.666851 PCI: 00:19.2 subsystem <- 8086/4dc7
1308 12:54:14.670292 PCI: 00:19.2 cmd <- 06
1309 12:54:14.673777 PCI: 00:1a.0 subsystem <- 8086/4dc4
1310 12:54:14.677332 PCI: 00:1a.0 cmd <- 06
1311 12:54:14.680426 PCI: 00:1e.2 subsystem <- 8086/4daa
1312 12:54:14.683529 PCI: 00:1e.2 cmd <- 06
1313 12:54:14.687203 PCI: 00:1f.0 subsystem <- 8086/4d87
1314 12:54:14.690304 PCI: 00:1f.0 cmd <- 407
1315 12:54:14.693953 PCI: 00:1f.3 subsystem <- 8086/4dc8
1316 12:54:14.697103 PCI: 00:1f.3 cmd <- 02
1317 12:54:14.700085 PCI: 00:1f.5 subsystem <- 8086/4da4
1318 12:54:14.700219 PCI: 00:1f.5 cmd <- 406
1319 12:54:14.706344 done.
1320 12:54:14.709354 BS: BS_DEV_ENABLE run times (exec / console): 7 / 122 ms
1321 12:54:14.712765 Initializing devices...
1322 12:54:14.715857 Root Device init
1323 12:54:14.715965 mainboard: EC init
1324 12:54:14.722615 Chrome EC: Set SMI mask to 0x0000000000000000
1325 12:54:14.725823 Chrome EC: clear events_b mask to 0x0000000000000000
1326 12:54:14.733240 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1327 12:54:14.739526 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1328 12:54:14.746238 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1329 12:54:14.749899 Chrome EC: Set WAKE mask to 0x0000000000000000
1330 12:54:14.756325 Root Device init finished in 35 msecs
1331 12:54:14.759361 PCI: 00:00.0 init
1332 12:54:14.759502 CPU TDP = 6 Watts
1333 12:54:14.762898 CPU PL1 = 7 Watts
1334 12:54:14.766215 CPU PL2 = 12 Watts
1335 12:54:14.769657 PCI: 00:00.0 init finished in 6 msecs
1336 12:54:14.769767 PCI: 00:02.0 init
1337 12:54:14.772655 GMA: Found VBT in CBFS
1338 12:54:14.775841 GMA: Found valid VBT in CBFS
1339 12:54:14.782775 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1340 12:54:14.789516 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1341 12:54:14.793034 PCI: 00:02.0 init finished in 18 msecs
1342 12:54:14.796350 PCI: 00:08.0 init
1343 12:54:14.799163 PCI: 00:08.0 init finished in 0 msecs
1344 12:54:14.802846 PCI: 00:14.0 init
1345 12:54:14.806126 XHCI: Updated LFPS sampling OFF time to 9 ms
1346 12:54:14.809249 PCI: 00:14.0 init finished in 4 msecs
1347 12:54:14.812760 PCI: 00:15.0 init
1348 12:54:14.816163 I2C bus 0 version 0x3230302a
1349 12:54:14.819264 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1350 12:54:14.822887 PCI: 00:15.0 init finished in 6 msecs
1351 12:54:14.826125 PCI: 00:15.1 init
1352 12:54:14.829763 I2C bus 1 version 0x3230302a
1353 12:54:14.833084 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1354 12:54:14.836186 PCI: 00:15.1 init finished in 6 msecs
1355 12:54:14.839278 PCI: 00:15.2 init
1356 12:54:14.839387 I2C bus 2 version 0x3230302a
1357 12:54:14.846124 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1358 12:54:14.849284 PCI: 00:15.2 init finished in 6 msecs
1359 12:54:14.849389 PCI: 00:15.3 init
1360 12:54:14.852973 I2C bus 3 version 0x3230302a
1361 12:54:14.856190 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1362 12:54:14.862416 PCI: 00:15.3 init finished in 6 msecs
1363 12:54:14.862542 PCI: 00:16.0 init
1364 12:54:14.866469 PCI: 00:16.0 init finished in 0 msecs
1365 12:54:14.869322 PCI: 00:19.0 init
1366 12:54:14.872724 I2C bus 4 version 0x3230302a
1367 12:54:14.875545 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1368 12:54:14.879224 PCI: 00:19.0 init finished in 6 msecs
1369 12:54:14.882636 PCI: 00:1a.0 init
1370 12:54:14.886066 PCI: 00:1a.0 init finished in 0 msecs
1371 12:54:14.889588 PCI: 00:1f.0 init
1372 12:54:14.892350 IOAPIC: Initializing IOAPIC at 0xfec00000
1373 12:54:14.895772 IOAPIC: Bootstrap Processor Local APIC = 0x00
1374 12:54:14.899393 IOAPIC: ID = 0x02
1375 12:54:14.902472 IOAPIC: Dumping registers
1376 12:54:14.902571 reg 0x0000: 0x02000000
1377 12:54:14.906198 reg 0x0001: 0x00770020
1378 12:54:14.909342 reg 0x0002: 0x00000000
1379 12:54:14.912509 PCI: 00:1f.0 init finished in 21 msecs
1380 12:54:14.915620 PCI: 00:1f.2 init
1381 12:54:14.919694 Disabling ACPI via APMC.
1382 12:54:14.922782 APMC done.
1383 12:54:14.926327 PCI: 00:1f.2 init finished in 5 msecs
1384 12:54:14.936221 PNP: 0c09.0 init
1385 12:54:14.940006 Google Chrome EC uptime: 6.552 seconds
1386 12:54:14.946197 Google Chrome AP resets since EC boot: 0
1387 12:54:14.949801 Google Chrome most recent AP reset causes:
1388 12:54:14.956140 Google Chrome EC reset flags at last EC boot: reset-pin
1389 12:54:14.959858 PNP: 0c09.0 init finished in 18 msecs
1390 12:54:14.959989 Devices initialized
1391 12:54:14.963031 Show all devs... After init.
1392 12:54:14.966092 Root Device: enabled 1
1393 12:54:14.969386 CPU_CLUSTER: 0: enabled 1
1394 12:54:14.972922 DOMAIN: 0000: enabled 1
1395 12:54:14.973048 PCI: 00:00.0: enabled 1
1396 12:54:14.976255 PCI: 00:02.0: enabled 1
1397 12:54:14.979204 PCI: 00:04.0: enabled 1
1398 12:54:14.979330 PCI: 00:05.0: enabled 1
1399 12:54:14.982683 PCI: 00:09.0: enabled 0
1400 12:54:14.986221 PCI: 00:12.6: enabled 0
1401 12:54:14.989665 PCI: 00:14.0: enabled 1
1402 12:54:14.989805 PCI: 00:14.1: enabled 0
1403 12:54:14.993061 PCI: 00:14.2: enabled 0
1404 12:54:14.996625 PCI: 00:14.3: enabled 1
1405 12:54:14.999804 PCI: 00:14.5: enabled 1
1406 12:54:14.999904 PCI: 00:15.0: enabled 1
1407 12:54:15.002709 PCI: 00:15.1: enabled 1
1408 12:54:15.006076 PCI: 00:15.2: enabled 1
1409 12:54:15.009605 PCI: 00:15.3: enabled 1
1410 12:54:15.009713 PCI: 00:16.0: enabled 1
1411 12:54:15.012577 PCI: 00:16.1: enabled 0
1412 12:54:15.016345 PCI: 00:16.4: enabled 0
1413 12:54:15.019430 PCI: 00:16.5: enabled 0
1414 12:54:15.019532 PCI: 00:17.0: enabled 0
1415 12:54:15.022927 PCI: 00:19.0: enabled 1
1416 12:54:15.026730 PCI: 00:19.1: enabled 0
1417 12:54:15.026835 PCI: 00:19.2: enabled 1
1418 12:54:15.029471 PCI: 00:1a.0: enabled 1
1419 12:54:15.032960 PCI: 00:1c.0: enabled 0
1420 12:54:15.036102 PCI: 00:1c.1: enabled 0
1421 12:54:15.036206 PCI: 00:1c.2: enabled 0
1422 12:54:15.039319 PCI: 00:1c.3: enabled 0
1423 12:54:15.042947 PCI: 00:1c.4: enabled 0
1424 12:54:15.046119 PCI: 00:1c.5: enabled 0
1425 12:54:15.046223 PCI: 00:1c.6: enabled 0
1426 12:54:15.049899 PCI: 00:1c.7: enabled 1
1427 12:54:15.052927 PCI: 00:1e.0: enabled 0
1428 12:54:15.056105 PCI: 00:1e.1: enabled 0
1429 12:54:15.056223 PCI: 00:1e.2: enabled 1
1430 12:54:15.059279 PCI: 00:1e.3: enabled 0
1431 12:54:15.063090 PCI: 00:1f.0: enabled 1
1432 12:54:15.063215 PCI: 00:1f.1: enabled 0
1433 12:54:15.066266 PCI: 00:1f.2: enabled 1
1434 12:54:15.069325 PCI: 00:1f.3: enabled 1
1435 12:54:15.073070 PCI: 00:1f.4: enabled 0
1436 12:54:15.073191 PCI: 00:1f.5: enabled 1
1437 12:54:15.076178 PCI: 00:1f.7: enabled 0
1438 12:54:15.079734 GENERIC: 0.0: enabled 1
1439 12:54:15.082649 GENERIC: 0.0: enabled 1
1440 12:54:15.082769 USB0 port 0: enabled 1
1441 12:54:15.086274 GENERIC: 0.0: enabled 1
1442 12:54:15.089243 I2C: 00:2c: enabled 1
1443 12:54:15.089367 I2C: 00:15: enabled 1
1444 12:54:15.092750 GENERIC: 0.0: enabled 0
1445 12:54:15.096266 I2C: 00:15: enabled 1
1446 12:54:15.096406 I2C: 00:10: enabled 0
1447 12:54:15.099602 I2C: 00:10: enabled 0
1448 12:54:15.102927 I2C: 00:2c: enabled 1
1449 12:54:15.105860 I2C: 00:40: enabled 1
1450 12:54:15.105986 I2C: 00:10: enabled 1
1451 12:54:15.109301 I2C: 00:39: enabled 1
1452 12:54:15.112534 I2C: 00:36: enabled 1
1453 12:54:15.112658 I2C: 00:10: enabled 0
1454 12:54:15.116426 I2C: 00:0c: enabled 1
1455 12:54:15.119357 I2C: 00:50: enabled 1
1456 12:54:15.119478 I2C: 00:1a: enabled 1
1457 12:54:15.122998 I2C: 00:1a: enabled 0
1458 12:54:15.125957 I2C: 00:1a: enabled 0
1459 12:54:15.126083 I2C: 00:28: enabled 1
1460 12:54:15.129502 I2C: 00:29: enabled 1
1461 12:54:15.132600 PCI: 00:00.0: enabled 1
1462 12:54:15.132723 SPI: 00: enabled 1
1463 12:54:15.135961 PNP: 0c09.0: enabled 1
1464 12:54:15.139761 GENERIC: 0.0: enabled 0
1465 12:54:15.139887 USB2 port 0: enabled 1
1466 12:54:15.142900 USB2 port 1: enabled 1
1467 12:54:15.145998 USB2 port 2: enabled 1
1468 12:54:15.149744 USB2 port 3: enabled 1
1469 12:54:15.149869 USB2 port 4: enabled 0
1470 12:54:15.152901 USB2 port 5: enabled 1
1471 12:54:15.155984 USB2 port 6: enabled 0
1472 12:54:15.156102 USB2 port 7: enabled 1
1473 12:54:15.159715 USB3 port 0: enabled 1
1474 12:54:15.162722 USB3 port 1: enabled 1
1475 12:54:15.162847 USB3 port 2: enabled 1
1476 12:54:15.165875 USB3 port 3: enabled 1
1477 12:54:15.169137 APIC: 00: enabled 1
1478 12:54:15.169266 APIC: 02: enabled 1
1479 12:54:15.172830 PCI: 00:08.0: enabled 1
1480 12:54:15.179605 BS: BS_DEV_INIT run times (exec / console): 23 / 440 ms
1481 12:54:15.182640 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1482 12:54:15.186307 ELOG: NV offset 0xbfa000 size 0x1000
1483 12:54:15.194309 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1484 12:54:15.200600 ELOG: Event(17) added with size 13 at 2023-04-05 12:54:15 UTC
1485 12:54:15.207523 ELOG: Event(92) added with size 9 at 2023-04-05 12:54:15 UTC
1486 12:54:15.214064 ELOG: Event(93) added with size 9 at 2023-04-05 12:54:15 UTC
1487 12:54:15.220681 ELOG: Event(9E) added with size 10 at 2023-04-05 12:54:15 UTC
1488 12:54:15.227135 ELOG: Event(9F) added with size 14 at 2023-04-05 12:54:15 UTC
1489 12:54:15.233683 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1490 12:54:15.237166 ELOG: Event(A1) added with size 10 at 2023-04-05 12:54:15 UTC
1491 12:54:15.247048 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1492 12:54:15.253956 ELOG: Event(A0) added with size 9 at 2023-04-05 12:54:15 UTC
1493 12:54:15.257123 elog_add_boot_reason: Logged dev mode boot
1494 12:54:15.263863 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1495 12:54:15.264012 Finalize devices...
1496 12:54:15.266978 Devices finalized
1497 12:54:15.273741 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1498 12:54:15.276816 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1499 12:54:15.283700 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1500 12:54:15.286817 ME: HFSTS1 : 0x80030045
1501 12:54:15.290513 ME: HFSTS2 : 0x30280136
1502 12:54:15.297269 ME: HFSTS3 : 0x00000050
1503 12:54:15.300691 ME: HFSTS4 : 0x00004000
1504 12:54:15.303825 ME: HFSTS5 : 0x00000000
1505 12:54:15.306951 ME: HFSTS6 : 0x40400006
1506 12:54:15.310264 ME: Manufacturing Mode : NO
1507 12:54:15.313631 ME: FW Partition Table : OK
1508 12:54:15.317277 ME: Bringup Loader Failure : NO
1509 12:54:15.320061 ME: Firmware Init Complete : NO
1510 12:54:15.323979 ME: Boot Options Present : NO
1511 12:54:15.326838 ME: Update In Progress : NO
1512 12:54:15.330289 ME: D0i3 Support : YES
1513 12:54:15.333689 ME: Low Power State Enabled : NO
1514 12:54:15.337115 ME: CPU Replaced : YES
1515 12:54:15.340041 ME: CPU Replacement Valid : YES
1516 12:54:15.343368 ME: Current Working State : 5
1517 12:54:15.346670 ME: Current Operation State : 1
1518 12:54:15.350461 ME: Current Operation Mode : 3
1519 12:54:15.353590 ME: Error Code : 0
1520 12:54:15.356709 ME: CPU Debug Disabled : YES
1521 12:54:15.360483 ME: TXT Support : NO
1522 12:54:15.366555 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 78 ms
1523 12:54:15.373502 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1524 12:54:15.377237 ACPI: Writing ACPI tables at 76b27000.
1525 12:54:15.380234 ACPI: * FACS
1526 12:54:15.380369 ACPI: * DSDT
1527 12:54:15.383383 Ramoops buffer: 0x100000@0x76a26000.
1528 12:54:15.390275 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1529 12:54:15.393395 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1530 12:54:15.397001 Google Chrome EC: version:
1531 12:54:15.400136 ro: magolor_1.1.9999-103b6f9
1532 12:54:15.403582 rw: magolor_1.1.9999-103b6f9
1533 12:54:15.406686 running image: 1
1534 12:54:15.413510 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1535 12:54:15.416630 ACPI: * FADT
1536 12:54:15.416740 SCI is IRQ9
1537 12:54:15.419986 ACPI: added table 1/32, length now 40
1538 12:54:15.423547 ACPI: * SSDT
1539 12:54:15.426906 Found 1 CPU(s) with 2 core(s) each.
1540 12:54:15.430364 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1541 12:54:15.436541 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1542 12:54:15.440088 Could not locate 'wifi_sar' in VPD.
1543 12:54:15.443058 Checking CBFS for default SAR values
1544 12:54:15.446496 wifi_sar_defaults.hex has bad len in CBFS
1545 12:54:15.449915 failed from getting SAR limits!
1546 12:54:15.456917 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1547 12:54:15.459970 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1548 12:54:15.466862 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1549 12:54:15.469899 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1550 12:54:15.476716 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1551 12:54:15.479879 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1552 12:54:15.486684 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1553 12:54:15.489797 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1554 12:54:15.496718 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1555 12:54:15.503442 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1556 12:54:15.510002 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1557 12:54:15.516497 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1558 12:54:15.520218 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1559 12:54:15.527122 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1560 12:54:15.530155 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1561 12:54:15.536981 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1562 12:54:15.540356 PS2K: Passing 101 keymaps to kernel
1563 12:54:15.547323 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1564 12:54:15.553689 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1565 12:54:15.557123 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1566 12:54:15.564129 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1567 12:54:15.570467 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1568 12:54:15.574221 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1569 12:54:15.580346 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1570 12:54:15.587249 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1571 12:54:15.590909 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1572 12:54:15.597099 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1573 12:54:15.600853 ACPI: added table 2/32, length now 44
1574 12:54:15.603868 ACPI: * MCFG
1575 12:54:15.607666 ACPI: added table 3/32, length now 48
1576 12:54:15.607776 ACPI: * TPM2
1577 12:54:15.610800 TPM2 log created at 0x76a16000
1578 12:54:15.613813 ACPI: added table 4/32, length now 52
1579 12:54:15.617338 ACPI: * MADT
1580 12:54:15.617449 SCI is IRQ9
1581 12:54:15.620883 ACPI: added table 5/32, length now 56
1582 12:54:15.623943 current = 76b2d580
1583 12:54:15.627104 ACPI: * DMAR
1584 12:54:15.630817 ACPI: added table 6/32, length now 60
1585 12:54:15.634284 ACPI: added table 7/32, length now 64
1586 12:54:15.634392 ACPI: * HPET
1587 12:54:15.640703 ACPI: added table 8/32, length now 68
1588 12:54:15.640819 ACPI: done.
1589 12:54:15.644312 ACPI tables: 26304 bytes.
1590 12:54:15.647627 smbios_write_tables: 76a15000
1591 12:54:15.650647 EC returned error result code 3
1592 12:54:15.654252 Couldn't obtain OEM name from CBI
1593 12:54:15.657103 Create SMBIOS type 16
1594 12:54:15.657207 Create SMBIOS type 17
1595 12:54:15.660844 GENERIC: 0.0 (WIFI Device)
1596 12:54:15.664303 SMBIOS tables: 913 bytes.
1597 12:54:15.667282 Writing table forward entry at 0x00000500
1598 12:54:15.674148 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1599 12:54:15.677441 Writing coreboot table at 0x76b4b000
1600 12:54:15.684361 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1601 12:54:15.687304 1. 0000000000001000-000000000009ffff: RAM
1602 12:54:15.694123 2. 00000000000a0000-00000000000fffff: RESERVED
1603 12:54:15.697306 3. 0000000000100000-0000000076a14fff: RAM
1604 12:54:15.704083 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1605 12:54:15.707573 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1606 12:54:15.713804 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1607 12:54:15.717636 7. 0000000077000000-000000007fbfffff: RESERVED
1608 12:54:15.723953 8. 00000000c0000000-00000000cfffffff: RESERVED
1609 12:54:15.727261 9. 00000000fb000000-00000000fb000fff: RESERVED
1610 12:54:15.734061 10. 00000000fe000000-00000000fe00ffff: RESERVED
1611 12:54:15.737020 11. 00000000fea80000-00000000fea87fff: RESERVED
1612 12:54:15.743581 12. 00000000fed80000-00000000fed87fff: RESERVED
1613 12:54:15.747065 13. 00000000fed90000-00000000fed92fff: RESERVED
1614 12:54:15.753562 14. 00000000feda0000-00000000feda1fff: RESERVED
1615 12:54:15.757489 15. 0000000100000000-00000001803fffff: RAM
1616 12:54:15.760412 Passing 4 GPIOs to payload:
1617 12:54:15.763652 NAME | PORT | POLARITY | VALUE
1618 12:54:15.770545 lid | undefined | high | high
1619 12:54:15.774003 power | undefined | high | low
1620 12:54:15.780778 oprom | undefined | high | low
1621 12:54:15.786988 EC in RW | 0x000000b9 | high | low
1622 12:54:15.793653 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 1fd0
1623 12:54:15.793775 coreboot table: 1504 bytes.
1624 12:54:15.797416 IMD ROOT 0. 0x76fff000 0x00001000
1625 12:54:15.803656 IMD SMALL 1. 0x76ffe000 0x00001000
1626 12:54:15.807291 FSP MEMORY 2. 0x76c4e000 0x003b0000
1627 12:54:15.810378 CONSOLE 3. 0x76c2e000 0x00020000
1628 12:54:15.814053 FMAP 4. 0x76c2d000 0x00000578
1629 12:54:15.817124 TIME STAMP 5. 0x76c2c000 0x00000910
1630 12:54:15.820811 VBOOT WORK 6. 0x76c18000 0x00014000
1631 12:54:15.823976 ROMSTG STCK 7. 0x76c17000 0x00001000
1632 12:54:15.827566 AFTER CAR 8. 0x76c0d000 0x0000a000
1633 12:54:15.834016 RAMSTAGE 9. 0x76ba7000 0x00066000
1634 12:54:15.837034 REFCODE 10. 0x76b67000 0x00040000
1635 12:54:15.840678 SMM BACKUP 11. 0x76b57000 0x00010000
1636 12:54:15.844259 4f444749 12. 0x76b55000 0x00002000
1637 12:54:15.847244 EXT VBT13. 0x76b53000 0x00001c43
1638 12:54:15.850591 COREBOOT 14. 0x76b4b000 0x00008000
1639 12:54:15.853727 ACPI 15. 0x76b27000 0x00024000
1640 12:54:15.857267 ACPI GNVS 16. 0x76b26000 0x00001000
1641 12:54:15.860739 RAMOOPS 17. 0x76a26000 0x00100000
1642 12:54:15.863774 TPM2 TCGLOG18. 0x76a16000 0x00010000
1643 12:54:15.870392 SMBIOS 19. 0x76a15000 0x00000800
1644 12:54:15.870522 IMD small region:
1645 12:54:15.873939 IMD ROOT 0. 0x76ffec00 0x00000400
1646 12:54:15.880832 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1647 12:54:15.883874 VPD 2. 0x76ffeb80 0x0000004c
1648 12:54:15.887627 POWER STATE 3. 0x76ffeb40 0x00000040
1649 12:54:15.890671 ROMSTAGE 4. 0x76ffeb20 0x00000004
1650 12:54:15.894380 MEM INFO 5. 0x76ffe940 0x000001e0
1651 12:54:15.900767 BS: BS_WRITE_TABLES run times (exec / console): 8 / 520 ms
1652 12:54:15.903833 MTRR: Physical address space:
1653 12:54:15.910605 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1654 12:54:15.917431 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1655 12:54:15.924217 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1656 12:54:15.927245 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1657 12:54:15.934223 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1658 12:54:15.940779 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1659 12:54:15.947545 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1660 12:54:15.951146 MTRR: Fixed MSR 0x250 0x0606060606060606
1661 12:54:15.957348 MTRR: Fixed MSR 0x258 0x0606060606060606
1662 12:54:15.960965 MTRR: Fixed MSR 0x259 0x0000000000000000
1663 12:54:15.964275 MTRR: Fixed MSR 0x268 0x0606060606060606
1664 12:54:15.967102 MTRR: Fixed MSR 0x269 0x0606060606060606
1665 12:54:15.970496 MTRR: Fixed MSR 0x26a 0x0606060606060606
1666 12:54:15.977676 MTRR: Fixed MSR 0x26b 0x0606060606060606
1667 12:54:15.980503 MTRR: Fixed MSR 0x26c 0x0606060606060606
1668 12:54:15.983981 MTRR: Fixed MSR 0x26d 0x0606060606060606
1669 12:54:15.987359 MTRR: Fixed MSR 0x26e 0x0606060606060606
1670 12:54:15.994151 MTRR: Fixed MSR 0x26f 0x0606060606060606
1671 12:54:15.997211 call enable_fixed_mtrr()
1672 12:54:16.000340 CPU physical address size: 39 bits
1673 12:54:16.004064 MTRR: default type WB/UC MTRR counts: 6/5.
1674 12:54:16.007237 MTRR: UC selected as default type.
1675 12:54:16.013839 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1676 12:54:16.020787 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1677 12:54:16.026983 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1678 12:54:16.033835 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1679 12:54:16.037428 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1680 12:54:16.040867
1681 12:54:16.040974 MTRR check
1682 12:54:16.044318 Fixed MTRRs : Enabled
1683 12:54:16.044462 Variable MTRRs: Enabled
1684 12:54:16.044549
1685 12:54:16.050540 MTRR: Fixed MSR 0x250 0x0606060606060606
1686 12:54:16.054309 MTRR: Fixed MSR 0x258 0x0606060606060606
1687 12:54:16.057255 MTRR: Fixed MSR 0x259 0x0000000000000000
1688 12:54:16.060752 MTRR: Fixed MSR 0x268 0x0606060606060606
1689 12:54:16.067437 MTRR: Fixed MSR 0x269 0x0606060606060606
1690 12:54:16.070585 MTRR: Fixed MSR 0x26a 0x0606060606060606
1691 12:54:16.073941 MTRR: Fixed MSR 0x26b 0x0606060606060606
1692 12:54:16.077675 MTRR: Fixed MSR 0x26c 0x0606060606060606
1693 12:54:16.080753 MTRR: Fixed MSR 0x26d 0x0606060606060606
1694 12:54:16.087243 MTRR: Fixed MSR 0x26e 0x0606060606060606
1695 12:54:16.090639 MTRR: Fixed MSR 0x26f 0x0606060606060606
1696 12:54:16.097445 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 144 ms
1697 12:54:16.100508 call enable_fixed_mtrr()
1698 12:54:16.104828 Checking cr50 for pending updates
1699 12:54:16.104940 CPU physical address size: 39 bits
1700 12:54:16.109773 Reading cr50 TPM mode
1701 12:54:16.119675 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1702 12:54:16.127155 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1703 12:54:16.130867 Checking segment from ROM address 0xfff9d5b8
1704 12:54:16.137504 Checking segment from ROM address 0xfff9d5d4
1705 12:54:16.140520 Loading segment from ROM address 0xfff9d5b8
1706 12:54:16.143993 code (compression=0)
1707 12:54:16.150571 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1708 12:54:16.160505 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1709 12:54:16.164348 it's not compressed!
1710 12:54:16.289636 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1711 12:54:16.296727 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1712 12:54:16.303917 Loading segment from ROM address 0xfff9d5d4
1713 12:54:16.307350 Entry Point 0x30000000
1714 12:54:16.307466 Loaded segments
1715 12:54:16.313678 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 61 ms
1716 12:54:16.330541 Finalizing chipset.
1717 12:54:16.333607 Finalizing SMM.
1718 12:54:16.333725 APMC done.
1719 12:54:16.340433 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1720 12:54:16.343496 mp_park_aps done after 0 msecs.
1721 12:54:16.346571 Jumping to boot code at 0x30000000(0x76b4b000)
1722 12:54:16.356627 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1723 12:54:16.356768
1724 12:54:16.356862
1725 12:54:16.356955
1726 12:54:16.359796 Starting depthcharge on Magolor...
1727 12:54:16.360155 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1728 12:54:16.360277 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1729 12:54:16.360380 Setting prompt string to ['dedede:']
1730 12:54:16.360494 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1731 12:54:16.363591
1732 12:54:16.370317 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1733 12:54:16.370450
1734 12:54:16.376745 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1735 12:54:16.376857
1736 12:54:16.379973 fw_config match found: AUDIO_AMP=UNPROVISIONED
1737 12:54:16.383157
1738 12:54:16.383254 Wipe memory regions:
1739 12:54:16.383330
1740 12:54:16.386791 [0x00000000001000, 0x000000000a0000)
1741 12:54:16.386886
1742 12:54:16.389687 [0x00000000100000, 0x00000030000000)
1743 12:54:16.519346
1744 12:54:16.522725 [0x00000031062170, 0x00000076a15000)
1745 12:54:16.692218
1746 12:54:16.695222 [0x00000100000000, 0x00000180400000)
1747 12:54:17.759479
1748 12:54:17.759645 R8152: Initializing
1749 12:54:17.759723
1750 12:54:17.762484 Version 6 (ocp_data = 5c30)
1751 12:54:17.766176
1752 12:54:17.766300 R8152: Done initializing
1753 12:54:17.766382
1754 12:54:17.769302 Adding net device
1755 12:54:17.769401
1756 12:54:17.772388 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1757 12:54:17.776077
1758 12:54:17.776188
1759 12:54:17.776266
1760 12:54:17.776567 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1762 12:54:17.877339 dedede: tftpboot 192.168.201.1 9879075/tftp-deploy-ag9yv5tl/kernel/bzImage 9879075/tftp-deploy-ag9yv5tl/kernel/cmdline 9879075/tftp-deploy-ag9yv5tl/ramdisk/ramdisk.cpio.gz
1763 12:54:17.877530 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1764 12:54:17.877634 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1765 12:54:17.882151 tftpboot 192.168.201.1 9879075/tftp-deploy-ag9yv5tl/kernel/bzImoy-ag9yv5tl/kernel/cmdline 9879075/tftp-deploy-ag9yv5tl/ramdisk/ramdisk.cpio.gz
1766 12:54:17.882261
1767 12:54:17.882337 Waiting for link
1768 12:54:18.084615
1769 12:54:18.084780 done.
1770 12:54:18.084857
1771 12:54:18.084928 MAC: 00:24:32:30:7b:81
1772 12:54:18.084996
1773 12:54:18.087662 Sending DHCP discover... done.
1774 12:54:18.087782
1775 12:54:18.090764 Waiting for reply... done.
1776 12:54:18.090868
1777 12:54:18.094351 Sending DHCP request... done.
1778 12:54:18.094458
1779 12:54:18.097522 Waiting for reply... done.
1780 12:54:18.097620
1781 12:54:18.100761 My ip is 192.168.201.12
1782 12:54:18.100857
1783 12:54:18.104307 The DHCP server ip is 192.168.201.1
1784 12:54:18.104452
1785 12:54:18.107415 TFTP server IP predefined by user: 192.168.201.1
1786 12:54:18.107543
1787 12:54:18.114415 Bootfile predefined by user: 9879075/tftp-deploy-ag9yv5tl/kernel/bzImage
1788 12:54:18.114541
1789 12:54:18.117455 Sending tftp read request... done.
1790 12:54:18.117557
1791 12:54:18.124408 Waiting for the transfer...
1792 12:54:18.124548
1793 12:54:18.665199 00000000 ################################################################
1794 12:54:18.665393
1795 12:54:19.213538 00080000 ################################################################
1796 12:54:19.213688
1797 12:54:19.763784 00100000 ################################################################
1798 12:54:19.763992
1799 12:54:20.320208 00180000 ################################################################
1800 12:54:20.320416
1801 12:54:20.889662 00200000 ################################################################
1802 12:54:20.889812
1803 12:54:21.467544 00280000 ################################################################
1804 12:54:21.467693
1805 12:54:22.016755 00300000 ################################################################
1806 12:54:22.016946
1807 12:54:22.565349 00380000 ################################################################
1808 12:54:22.565522
1809 12:54:23.102626 00400000 ################################################################
1810 12:54:23.102820
1811 12:54:23.648307 00480000 ################################################################
1812 12:54:23.648513
1813 12:54:24.174388 00500000 ################################################################
1814 12:54:24.174545
1815 12:54:24.696362 00580000 ################################################################
1816 12:54:24.696531
1817 12:54:25.228909 00600000 ################################################################
1818 12:54:25.229087
1819 12:54:25.770575 00680000 ################################################################
1820 12:54:25.770725
1821 12:54:26.295852 00700000 ################################################################
1822 12:54:26.296042
1823 12:54:26.836667 00780000 ################################################################
1824 12:54:26.836843
1825 12:54:27.361156 00800000 ################################################################
1826 12:54:27.361324
1827 12:54:27.889760 00880000 ################################################################
1828 12:54:27.889911
1829 12:54:28.418667 00900000 ################################################################
1830 12:54:28.418832
1831 12:54:28.950425 00980000 ################################################################
1832 12:54:28.950571
1833 12:54:29.331620 00a00000 ############################################## done.
1834 12:54:29.331769
1835 12:54:29.334686 The bootfile was 10854400 bytes long.
1836 12:54:29.334812
1837 12:54:29.338591 Sending tftp read request... done.
1838 12:54:29.338709
1839 12:54:29.341314 Waiting for the transfer...
1840 12:54:29.341430
1841 12:54:29.869403 00000000 ################################################################
1842 12:54:29.869567
1843 12:54:30.397198 00080000 ################################################################
1844 12:54:30.397379
1845 12:54:30.923939 00100000 ################################################################
1846 12:54:30.924124
1847 12:54:31.457257 00180000 ################################################################
1848 12:54:31.457410
1849 12:54:31.983214 00200000 ################################################################
1850 12:54:31.983403
1851 12:54:32.518185 00280000 ################################################################
1852 12:54:32.518357
1853 12:54:33.048649 00300000 ################################################################
1854 12:54:33.048827
1855 12:54:33.573926 00380000 ################################################################
1856 12:54:33.574078
1857 12:54:34.096720 00400000 ################################################################
1858 12:54:34.096917
1859 12:54:34.625758 00480000 ################################################################
1860 12:54:34.625925
1861 12:54:35.169287 00500000 ################################################################
1862 12:54:35.169454
1863 12:54:35.710113 00580000 ################################################################
1864 12:54:35.710266
1865 12:54:36.248492 00600000 ################################################################
1866 12:54:36.248653
1867 12:54:36.790681 00680000 ################################################################
1868 12:54:36.790844
1869 12:54:37.335200 00700000 ################################################################
1870 12:54:37.335370
1871 12:54:37.879064 00780000 ################################################################
1872 12:54:37.879253
1873 12:54:38.418709 00800000 ################################################################
1874 12:54:38.418852
1875 12:54:38.724881 00880000 ###################################### done.
1876 12:54:38.725033
1877 12:54:38.728444 Sending tftp read request... done.
1878 12:54:38.728544
1879 12:54:38.731484 Waiting for the transfer...
1880 12:54:38.731580
1881 12:54:38.735227 00000000 # done.
1882 12:54:38.735324
1883 12:54:38.741748 Command line loaded dynamically from TFTP file: 9879075/tftp-deploy-ag9yv5tl/kernel/cmdline
1884 12:54:38.741846
1885 12:54:38.754821 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1886 12:54:38.754925
1887 12:54:38.761475 ec_init: CrosEC protocol v3 supported (256, 256)
1888 12:54:38.767974
1889 12:54:38.771678 Shutting down all USB controllers.
1890 12:54:38.771776
1891 12:54:38.771852 Removing current net device
1892 12:54:38.771923
1893 12:54:38.774812 Finalizing coreboot
1894 12:54:38.774909
1895 12:54:38.781180 Exiting depthcharge with code 4 at timestamp: 29259181
1896 12:54:38.781290
1897 12:54:38.781367
1898 12:54:38.781438 Starting kernel ...
1899 12:54:38.781507
1900 12:54:38.781574
1901 12:54:38.781972 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
1902 12:54:38.782084 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
1903 12:54:38.782171 Setting prompt string to ['Linux version [0-9]']
1904 12:54:38.782273 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1905 12:54:38.782354 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1907 12:59:02.782344 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
1909 12:59:02.782583 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
1911 12:59:02.782768 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1914 12:59:02.783058 end: 2 depthcharge-action (duration 00:05:00) [common]
1916 12:59:02.783345 Cleaning after the job
1917 12:59:02.783448 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879075/tftp-deploy-ag9yv5tl/ramdisk
1918 12:59:02.784402 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879075/tftp-deploy-ag9yv5tl/kernel
1919 12:59:02.785422 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879075/tftp-deploy-ag9yv5tl/modules
1920 12:59:02.785886 start: 5.1 power-off (timeout 00:00:30) [common]
1921 12:59:02.786069 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-4' '--port=1' '--command=off'
1922 12:59:02.863656 >> Command sent successfully.
1923 12:59:02.866209 Returned 0 in 0 seconds
1924 12:59:02.967344 end: 5.1 power-off (duration 00:00:00) [common]
1926 12:59:02.968848 start: 5.2 read-feedback (timeout 00:10:00) [common]
1927 12:59:02.970017 Listened to connection for namespace 'common' for up to 1s
1929 12:59:02.971354 Listened to connection for namespace 'common' for up to 1s
1930 12:59:03.972469 Finalising connection for namespace 'common'
1931 12:59:03.972662 Disconnecting from shell: Finalise
1932 12:59:03.972754
1933 12:59:04.073522 end: 5.2 read-feedback (duration 00:00:01) [common]
1934 12:59:04.073687 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9879075
1935 12:59:04.080929 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9879075
1936 12:59:04.081066 JobError: Your job cannot terminate cleanly.