Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:54:00.772291 lava-dispatcher, installed at version: 2023.01
2 12:54:00.772544 start: 0 validate
3 12:54:00.772692 Start time: 2023-04-05 12:54:00.772684+00:00 (UTC)
4 12:54:00.772848 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:54:00.772996 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230324.0%2Fx86%2Frootfs.cpio.gz exists
6 12:54:01.059625 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:54:01.059821 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:54:01.348534 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:54:01.348739 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:54:01.639148 validate duration: 0.87
12 12:54:01.639501 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:54:01.639614 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:54:01.639712 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:54:01.639847 Not decompressing ramdisk as can be used compressed.
16 12:54:01.639941 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230324.0/x86/rootfs.cpio.gz
17 12:54:01.640014 saving as /var/lib/lava/dispatcher/tmp/9879144/tftp-deploy-gbduol20/ramdisk/rootfs.cpio.gz
18 12:54:01.640083 total size: 8429597 (8MB)
19 12:54:01.641680 progress 0% (0MB)
20 12:54:01.644076 progress 5% (0MB)
21 12:54:01.646490 progress 10% (0MB)
22 12:54:01.648959 progress 15% (1MB)
23 12:54:01.651392 progress 20% (1MB)
24 12:54:01.653767 progress 25% (2MB)
25 12:54:01.656100 progress 30% (2MB)
26 12:54:01.658449 progress 35% (2MB)
27 12:54:01.660626 progress 40% (3MB)
28 12:54:01.662985 progress 45% (3MB)
29 12:54:01.665308 progress 50% (4MB)
30 12:54:01.667642 progress 55% (4MB)
31 12:54:01.669948 progress 60% (4MB)
32 12:54:01.672236 progress 65% (5MB)
33 12:54:01.674681 progress 70% (5MB)
34 12:54:01.676873 progress 75% (6MB)
35 12:54:01.679184 progress 80% (6MB)
36 12:54:01.681474 progress 85% (6MB)
37 12:54:01.683768 progress 90% (7MB)
38 12:54:01.686140 progress 95% (7MB)
39 12:54:01.688461 progress 100% (8MB)
40 12:54:01.688612 8MB downloaded in 0.05s (165.67MB/s)
41 12:54:01.688785 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:54:01.689060 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:54:01.689157 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:54:01.689256 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:54:01.689376 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:54:01.689451 saving as /var/lib/lava/dispatcher/tmp/9879144/tftp-deploy-gbduol20/kernel/bzImage
48 12:54:01.689519 total size: 10854400 (10MB)
49 12:54:01.689586 No compression specified
50 12:54:01.690956 progress 0% (0MB)
51 12:54:01.694157 progress 5% (0MB)
52 12:54:01.697275 progress 10% (1MB)
53 12:54:01.700167 progress 15% (1MB)
54 12:54:01.703232 progress 20% (2MB)
55 12:54:01.706249 progress 25% (2MB)
56 12:54:01.709304 progress 30% (3MB)
57 12:54:01.712329 progress 35% (3MB)
58 12:54:01.715477 progress 40% (4MB)
59 12:54:01.718587 progress 45% (4MB)
60 12:54:01.721467 progress 50% (5MB)
61 12:54:01.724519 progress 55% (5MB)
62 12:54:01.727416 progress 60% (6MB)
63 12:54:01.730486 progress 65% (6MB)
64 12:54:01.733363 progress 70% (7MB)
65 12:54:01.736464 progress 75% (7MB)
66 12:54:01.739334 progress 80% (8MB)
67 12:54:01.742735 progress 85% (8MB)
68 12:54:01.745916 progress 90% (9MB)
69 12:54:01.749057 progress 95% (9MB)
70 12:54:01.752175 progress 100% (10MB)
71 12:54:01.752366 10MB downloaded in 0.06s (164.72MB/s)
72 12:54:01.752536 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:54:01.752798 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:54:01.752900 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:54:01.752996 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:54:01.753121 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:54:01.753198 saving as /var/lib/lava/dispatcher/tmp/9879144/tftp-deploy-gbduol20/modules/modules.tar
79 12:54:01.753266 total size: 484468 (0MB)
80 12:54:01.753334 Using unxz to decompress xz
81 12:54:01.757414 progress 6% (0MB)
82 12:54:01.757911 progress 13% (0MB)
83 12:54:01.758195 progress 20% (0MB)
84 12:54:01.759758 progress 27% (0MB)
85 12:54:01.762123 progress 33% (0MB)
86 12:54:01.764532 progress 40% (0MB)
87 12:54:01.767259 progress 47% (0MB)
88 12:54:01.769764 progress 54% (0MB)
89 12:54:01.771678 progress 60% (0MB)
90 12:54:01.773853 progress 67% (0MB)
91 12:54:01.776120 progress 74% (0MB)
92 12:54:01.778396 progress 81% (0MB)
93 12:54:01.780491 progress 87% (0MB)
94 12:54:01.782686 progress 94% (0MB)
95 12:54:01.784744 progress 100% (0MB)
96 12:54:01.791479 0MB downloaded in 0.04s (12.10MB/s)
97 12:54:01.791849 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:54:01.792154 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:54:01.792261 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 12:54:01.792371 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 12:54:01.792474 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:54:01.792574 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 12:54:01.792787 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk
105 12:54:01.792906 makedir: /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin
106 12:54:01.793005 makedir: /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/tests
107 12:54:01.793096 makedir: /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/results
108 12:54:01.793224 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-add-keys
109 12:54:01.793371 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-add-sources
110 12:54:01.793501 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-background-process-start
111 12:54:01.793646 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-background-process-stop
112 12:54:01.793770 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-common-functions
113 12:54:01.793893 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-echo-ipv4
114 12:54:01.794016 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-install-packages
115 12:54:01.794137 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-installed-packages
116 12:54:01.794258 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-os-build
117 12:54:01.794382 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-probe-channel
118 12:54:01.794506 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-probe-ip
119 12:54:01.794627 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-target-ip
120 12:54:01.794746 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-target-mac
121 12:54:01.794866 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-target-storage
122 12:54:01.794988 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-test-case
123 12:54:01.795108 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-test-event
124 12:54:01.795227 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-test-feedback
125 12:54:01.795350 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-test-raise
126 12:54:01.795472 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-test-reference
127 12:54:01.795597 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-test-runner
128 12:54:01.795717 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-test-set
129 12:54:01.795838 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-test-shell
130 12:54:01.795961 Updating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-install-packages (oe)
131 12:54:01.796087 Updating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/bin/lava-installed-packages (oe)
132 12:54:01.796193 Creating /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/environment
133 12:54:01.796294 LAVA metadata
134 12:54:01.796376 - LAVA_JOB_ID=9879144
135 12:54:01.796448 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:54:01.796570 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 12:54:01.796646 skipped lava-vland-overlay
138 12:54:01.796733 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:54:01.796823 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 12:54:01.796893 skipped lava-multinode-overlay
141 12:54:01.796973 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:54:01.797062 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 12:54:01.797147 Loading test definitions
144 12:54:01.797255 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 12:54:01.797340 Using /lava-9879144 at stage 0
146 12:54:01.797651 uuid=9879144_1.4.2.3.1 testdef=None
147 12:54:01.797755 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:54:01.797851 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 12:54:01.798398 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:54:01.798658 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 12:54:01.799276 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:54:01.799529 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 12:54:01.800112 runner path: /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/0/tests/0_dmesg test_uuid 9879144_1.4.2.3.1
156 12:54:01.800271 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:54:01.800522 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 12:54:01.800604 Using /lava-9879144 at stage 1
160 12:54:01.800875 uuid=9879144_1.4.2.3.5 testdef=None
161 12:54:01.800971 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:54:01.801065 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 12:54:01.801543 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:54:01.801798 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 12:54:01.802453 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:54:01.802707 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 12:54:01.803403 runner path: /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/1/tests/1_bootrr test_uuid 9879144_1.4.2.3.5
170 12:54:01.803559 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:54:01.803787 Creating lava-test-runner.conf files
173 12:54:01.803858 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/0 for stage 0
174 12:54:01.803950 - 0_dmesg
175 12:54:01.804035 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879144/lava-overlay-wrlizowk/lava-9879144/1 for stage 1
176 12:54:01.804127 - 1_bootrr
177 12:54:01.804226 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:54:01.804319 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 12:54:01.813587 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:54:01.813783 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 12:54:01.813888 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:54:01.813987 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:54:01.814086 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 12:54:02.043780 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:54:02.044233 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 12:54:02.044360 extracting modules file /var/lib/lava/dispatcher/tmp/9879144/tftp-deploy-gbduol20/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879144/extract-overlay-ramdisk-bnji1pg3/ramdisk
187 12:54:02.057046 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:54:02.057277 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 12:54:02.057426 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9879144/compress-overlay-hfd1mxuh/overlay-1.4.2.4.tar.gz to ramdisk
190 12:54:02.057542 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9879144/compress-overlay-hfd1mxuh/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9879144/extract-overlay-ramdisk-bnji1pg3/ramdisk
191 12:54:02.064144 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:54:02.064311 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 12:54:02.064426 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:54:02.064531 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 12:54:02.064625 Building ramdisk /var/lib/lava/dispatcher/tmp/9879144/extract-overlay-ramdisk-bnji1pg3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9879144/extract-overlay-ramdisk-bnji1pg3/ramdisk
196 12:54:02.168981 >> 53976 blocks
197 12:54:03.173115 rename /var/lib/lava/dispatcher/tmp/9879144/extract-overlay-ramdisk-bnji1pg3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9879144/tftp-deploy-gbduol20/ramdisk/ramdisk.cpio.gz
198 12:54:03.173650 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:54:03.173796 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:54:03.173933 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:54:03.174056 No mkimage arch provided, not using FIT.
202 12:54:03.174160 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:54:03.174256 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:54:03.174370 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:54:03.174474 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:54:03.174604 No LXC device requested
207 12:54:03.174706 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:54:03.174808 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:54:03.174905 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:54:03.174991 Checking files for TFTP limit of 4294967296 bytes.
211 12:54:03.175461 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:54:03.175579 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:54:03.175680 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:54:03.175829 substitutions:
215 12:54:03.175909 - {DTB}: None
216 12:54:03.175981 - {INITRD}: 9879144/tftp-deploy-gbduol20/ramdisk/ramdisk.cpio.gz
217 12:54:03.176049 - {KERNEL}: 9879144/tftp-deploy-gbduol20/kernel/bzImage
218 12:54:03.176116 - {LAVA_MAC}: None
219 12:54:03.176181 - {PRESEED_CONFIG}: None
220 12:54:03.176245 - {PRESEED_LOCAL}: None
221 12:54:03.176308 - {RAMDISK}: 9879144/tftp-deploy-gbduol20/ramdisk/ramdisk.cpio.gz
222 12:54:03.176388 - {ROOT_PART}: None
223 12:54:03.176497 - {ROOT}: None
224 12:54:03.176566 - {SERVER_IP}: 192.168.201.1
225 12:54:03.176630 - {TEE}: None
226 12:54:03.176693 Parsed boot commands:
227 12:54:03.176755 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:54:03.176930 Parsed boot commands: tftpboot 192.168.201.1 9879144/tftp-deploy-gbduol20/kernel/bzImage 9879144/tftp-deploy-gbduol20/kernel/cmdline 9879144/tftp-deploy-gbduol20/ramdisk/ramdisk.cpio.gz
229 12:54:03.177032 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:54:03.177165 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:54:03.177290 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:54:03.177392 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:54:03.177471 Not connected, no need to disconnect.
234 12:54:03.177558 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:54:03.177670 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:54:03.177767 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
237 12:54:03.181731 Setting prompt string to ['lava-test: # ']
238 12:54:03.182402 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:54:03.182544 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:54:03.182682 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:54:03.182791 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:54:03.183004 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
243 12:54:08.325395 >> Command sent successfully.
244 12:54:08.328118 Returned 0 in 5 seconds
245 12:54:08.428976 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:54:08.429463 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:54:08.429625 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:54:08.429764 Setting prompt string to 'Starting depthcharge on Helios...'
250 12:54:08.429875 Changing prompt to 'Starting depthcharge on Helios...'
251 12:54:08.430006 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 12:54:08.430398 [Enter `^Ec?' for help]
253 12:54:09.049418
254 12:54:09.049635
255 12:54:09.059404 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 12:54:09.062674 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 12:54:09.069394 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 12:54:09.072598 CPU: AES supported, TXT NOT supported, VT supported
259 12:54:09.079611 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 12:54:09.082826 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 12:54:09.089792 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 12:54:09.093021 VBOOT: Loading verstage.
263 12:54:09.095891 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 12:54:09.102732 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 12:54:09.105848 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 12:54:09.109686 CBFS @ c08000 size 3f8000
267 12:54:09.116274 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 12:54:09.119400 CBFS: Locating 'fallback/verstage'
269 12:54:09.122741 CBFS: Found @ offset 10fb80 size 1072c
270 12:54:09.126141
271 12:54:09.126281
272 12:54:09.135856 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 12:54:09.150847 Probing TPM: . done!
274 12:54:09.154012 TPM ready after 0 ms
275 12:54:09.157259 Connected to device vid:did:rid of 1ae0:0028:00
276 12:54:09.167234 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
277 12:54:09.171127 Initialized TPM device CR50 revision 0
278 12:54:09.214394 tlcl_send_startup: Startup return code is 0
279 12:54:09.214592 TPM: setup succeeded
280 12:54:09.227143 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 12:54:09.231000 Chrome EC: UHEPI supported
282 12:54:09.234101 Phase 1
283 12:54:09.237502 FMAP: area GBB found @ c05000 (12288 bytes)
284 12:54:09.244236 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 12:54:09.247544 Phase 2
286 12:54:09.247679 Phase 3
287 12:54:09.250752 FMAP: area GBB found @ c05000 (12288 bytes)
288 12:54:09.257358 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 12:54:09.264142 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
290 12:54:09.267421 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
291 12:54:09.274031 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 12:54:09.289517 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
293 12:54:09.293229 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
294 12:54:09.299952 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 12:54:09.303717 Phase 4
296 12:54:09.307266 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
297 12:54:09.314064 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 12:54:09.492929 VB2:vb2_rsa_verify_digest() Digest check failed!
299 12:54:09.500318 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 12:54:09.500459 Saving nvdata
301 12:54:09.502883 Reboot requested (10020007)
302 12:54:09.506143 board_reset() called!
303 12:54:09.506283 full_reset() called!
304 12:54:14.016412
305 12:54:14.016566
306 12:54:14.026805 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 12:54:14.029496 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 12:54:14.036493 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 12:54:14.039823 CPU: AES supported, TXT NOT supported, VT supported
310 12:54:14.046142 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 12:54:14.049867 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 12:54:14.056322 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 12:54:14.059528 VBOOT: Loading verstage.
314 12:54:14.062752 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 12:54:14.069397 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 12:54:14.072707 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 12:54:14.076021 CBFS @ c08000 size 3f8000
318 12:54:14.082929 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 12:54:14.086388 CBFS: Locating 'fallback/verstage'
320 12:54:14.089132 CBFS: Found @ offset 10fb80 size 1072c
321 12:54:14.093106
322 12:54:14.093218
323 12:54:14.103223 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 12:54:14.117729 Probing TPM: . done!
325 12:54:14.120968 TPM ready after 0 ms
326 12:54:14.124442 Connected to device vid:did:rid of 1ae0:0028:00
327 12:54:14.134363 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 12:54:14.137827 Initialized TPM device CR50 revision 0
329 12:54:14.181292 tlcl_send_startup: Startup return code is 0
330 12:54:14.181455 TPM: setup succeeded
331 12:54:14.194045 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 12:54:14.198017 Chrome EC: UHEPI supported
333 12:54:14.201430 Phase 1
334 12:54:14.204162 FMAP: area GBB found @ c05000 (12288 bytes)
335 12:54:14.211421 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 12:54:14.218170 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 12:54:14.220871 Recovery requested (1009000e)
338 12:54:14.226911 Saving nvdata
339 12:54:14.232965 tlcl_extend: response is 0
340 12:54:14.241880 tlcl_extend: response is 0
341 12:54:14.248538 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 12:54:14.251907 CBFS @ c08000 size 3f8000
343 12:54:14.258729 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 12:54:14.262025 CBFS: Locating 'fallback/romstage'
345 12:54:14.265200 CBFS: Found @ offset 80 size 145fc
346 12:54:14.268404 Accumulated console time in verstage 98 ms
347 12:54:14.268535
348 12:54:14.268645
349 12:54:14.281568 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 12:54:14.288255 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 12:54:14.291603 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 12:54:14.295024 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 12:54:14.301954 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 12:54:14.304470 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 12:54:14.307864 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 12:54:14.311230 TCO_STS: 0000 0000
357 12:54:14.314606 GEN_PMCON: e0015238 00000200
358 12:54:14.318130 GBLRST_CAUSE: 00000000 00000000
359 12:54:14.318248 prev_sleep_state 5
360 12:54:14.321389 Boot Count incremented to 49722
361 12:54:14.328682 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 12:54:14.332104 CBFS @ c08000 size 3f8000
363 12:54:14.338145 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 12:54:14.338264 CBFS: Locating 'fspm.bin'
365 12:54:14.344894 CBFS: Found @ offset 5ffc0 size 71000
366 12:54:14.348292 Chrome EC: UHEPI supported
367 12:54:14.354984 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 12:54:14.358327 Probing TPM: done!
369 12:54:14.364933 Connected to device vid:did:rid of 1ae0:0028:00
370 12:54:14.375065 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
371 12:54:14.380631 Initialized TPM device CR50 revision 0
372 12:54:14.390205 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 12:54:14.396347 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 12:54:14.399525 MRC cache found, size 1948
375 12:54:14.402891 bootmode is set to: 2
376 12:54:14.406316 PRMRR disabled by config.
377 12:54:14.409775 SPD INDEX = 1
378 12:54:14.412991 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 12:54:14.416310 CBFS @ c08000 size 3f8000
380 12:54:14.422974 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 12:54:14.423093 CBFS: Locating 'spd.bin'
382 12:54:14.426334 CBFS: Found @ offset 5fb80 size 400
383 12:54:14.429633 SPD: module type is LPDDR3
384 12:54:14.432889 SPD: module part is
385 12:54:14.439666 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 12:54:14.443034 SPD: device width 4 bits, bus width 8 bits
387 12:54:14.445859 SPD: module size is 4096 MB (per channel)
388 12:54:14.449829 memory slot: 0 configuration done.
389 12:54:14.452639 memory slot: 2 configuration done.
390 12:54:14.504115 CBMEM:
391 12:54:14.507329 IMD: root @ 99fff000 254 entries.
392 12:54:14.510770 IMD: root @ 99ffec00 62 entries.
393 12:54:14.514141 External stage cache:
394 12:54:14.517452 IMD: root @ 9abff000 254 entries.
395 12:54:14.520709 IMD: root @ 9abfec00 62 entries.
396 12:54:14.527418 Chrome EC: clear events_b mask to 0x0000000020004000
397 12:54:14.540318 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 12:54:14.553088 tlcl_write: response is 0
399 12:54:14.562056 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 12:54:14.568921 MRC: TPM MRC hash updated successfully.
401 12:54:14.569017 2 DIMMs found
402 12:54:14.572235 SMM Memory Map
403 12:54:14.575428 SMRAM : 0x9a000000 0x1000000
404 12:54:14.578697 Subregion 0: 0x9a000000 0xa00000
405 12:54:14.582022 Subregion 1: 0x9aa00000 0x200000
406 12:54:14.585279 Subregion 2: 0x9ac00000 0x400000
407 12:54:14.588626 top_of_ram = 0x9a000000
408 12:54:14.592042 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 12:54:14.598523 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 12:54:14.601738 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 12:54:14.608320 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 12:54:14.611631 CBFS @ c08000 size 3f8000
413 12:54:14.614950 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 12:54:14.618240 CBFS: Locating 'fallback/postcar'
415 12:54:14.624977 CBFS: Found @ offset 107000 size 4b44
416 12:54:14.628132 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 12:54:14.640824 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 12:54:14.643950 Processing 180 relocs. Offset value of 0x97c0c000
419 12:54:14.652190 Accumulated console time in romstage 286 ms
420 12:54:14.652287
421 12:54:14.652362
422 12:54:14.662478 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 12:54:14.668557 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 12:54:14.672011 CBFS @ c08000 size 3f8000
425 12:54:14.675363 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 12:54:14.682030 CBFS: Locating 'fallback/ramstage'
427 12:54:14.685490 CBFS: Found @ offset 43380 size 1b9e8
428 12:54:14.692105 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 12:54:14.723828 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 12:54:14.727265 Processing 3976 relocs. Offset value of 0x98db0000
431 12:54:14.733986 Accumulated console time in postcar 52 ms
432 12:54:14.734081
433 12:54:14.734156
434 12:54:14.744005 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 12:54:14.750598 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 12:54:14.753753 WARNING: RO_VPD is uninitialized or empty.
437 12:54:14.756809 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 12:54:14.763714 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 12:54:14.763849 Normal boot.
440 12:54:14.770460 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 12:54:14.773829 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 12:54:14.777243 CBFS @ c08000 size 3f8000
443 12:54:14.783714 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 12:54:14.787034 CBFS: Locating 'cpu_microcode_blob.bin'
445 12:54:14.790561 CBFS: Found @ offset 14700 size 2ec00
446 12:54:14.793925 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 12:54:14.797316 Skip microcode update
448 12:54:14.803754 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 12:54:14.803878 CBFS @ c08000 size 3f8000
450 12:54:14.810012 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 12:54:14.813032 CBFS: Locating 'fsps.bin'
452 12:54:14.816749 CBFS: Found @ offset d1fc0 size 35000
453 12:54:14.842368 Detected 4 core, 8 thread CPU.
454 12:54:14.845456 Setting up SMI for CPU
455 12:54:14.848740 IED base = 0x9ac00000
456 12:54:14.848845 IED size = 0x00400000
457 12:54:14.852117 Will perform SMM setup.
458 12:54:14.858670 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 12:54:14.865326 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 12:54:14.868369 Processing 16 relocs. Offset value of 0x00030000
461 12:54:14.872285 Attempting to start 7 APs
462 12:54:14.875697 Waiting for 10ms after sending INIT.
463 12:54:14.891821 Waiting for 1st SIPI to complete...done.
464 12:54:14.891943 AP: slot 2 apic_id 1.
465 12:54:14.898645 Waiting for 2nd SIPI to complete...done.
466 12:54:14.898761 AP: slot 1 apic_id 2.
467 12:54:14.902025 AP: slot 3 apic_id 3.
468 12:54:14.905225 AP: slot 4 apic_id 4.
469 12:54:14.905349 AP: slot 5 apic_id 5.
470 12:54:14.908518 AP: slot 6 apic_id 6.
471 12:54:14.911944 AP: slot 7 apic_id 7.
472 12:54:14.918305 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 12:54:14.925204 Processing 13 relocs. Offset value of 0x00038000
474 12:54:14.928590 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 12:54:14.935037 Installing SMM handler to 0x9a000000
476 12:54:14.941426 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 12:54:14.944666 Processing 658 relocs. Offset value of 0x9a010000
478 12:54:14.954621 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 12:54:14.958089 Processing 13 relocs. Offset value of 0x9a008000
480 12:54:14.964748 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 12:54:14.971548 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 12:54:14.977835 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 12:54:14.981216 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 12:54:14.987948 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 12:54:14.994837 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 12:54:14.997558 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 12:54:15.004331 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 12:54:15.007634 Clearing SMI status registers
489 12:54:15.011036 SMI_STS: PM1
490 12:54:15.011130 PM1_STS: PWRBTN
491 12:54:15.014541 TCO_STS: SECOND_TO
492 12:54:15.017928 New SMBASE 0x9a000000
493 12:54:15.021320 In relocation handler: CPU 0
494 12:54:15.024622 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 12:54:15.027812 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 12:54:15.031512 Relocation complete.
497 12:54:15.034790 New SMBASE 0x99fff800
498 12:54:15.034884 In relocation handler: CPU 2
499 12:54:15.041196 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
500 12:54:15.044519 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 12:54:15.047809 Relocation complete.
502 12:54:15.051051 New SMBASE 0x99fffc00
503 12:54:15.051145 In relocation handler: CPU 1
504 12:54:15.057870 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
505 12:54:15.061289 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 12:54:15.064570 Relocation complete.
507 12:54:15.064664 New SMBASE 0x99fff400
508 12:54:15.067885 In relocation handler: CPU 3
509 12:54:15.074056 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
510 12:54:15.078059 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 12:54:15.081226 Relocation complete.
512 12:54:15.081320 New SMBASE 0x99ffec00
513 12:54:15.084486 In relocation handler: CPU 5
514 12:54:15.091180 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
515 12:54:15.094440 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 12:54:15.097693 Relocation complete.
517 12:54:15.097782 New SMBASE 0x99fff000
518 12:54:15.101196 In relocation handler: CPU 4
519 12:54:15.104084 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
520 12:54:15.110729 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 12:54:15.113904 Relocation complete.
522 12:54:15.114002 New SMBASE 0x99ffe400
523 12:54:15.117212 In relocation handler: CPU 7
524 12:54:15.120565 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
525 12:54:15.127452 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 12:54:15.130933 Relocation complete.
527 12:54:15.131059 New SMBASE 0x99ffe800
528 12:54:15.134126 In relocation handler: CPU 6
529 12:54:15.137179 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
530 12:54:15.143853 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 12:54:15.143992 Relocation complete.
532 12:54:15.147253 Initializing CPU #0
533 12:54:15.150452 CPU: vendor Intel device 806ec
534 12:54:15.153793 CPU: family 06, model 8e, stepping 0c
535 12:54:15.157007 Clearing out pending MCEs
536 12:54:15.160191 Setting up local APIC...
537 12:54:15.160290 apic_id: 0x00 done.
538 12:54:15.163517 Turbo is available but hidden
539 12:54:15.166881 Turbo is available and visible
540 12:54:15.170202 VMX status: enabled
541 12:54:15.173562 IA32_FEATURE_CONTROL status: locked
542 12:54:15.177030 Skip microcode update
543 12:54:15.177158 CPU #0 initialized
544 12:54:15.180448 Initializing CPU #2
545 12:54:15.183864 Initializing CPU #3
546 12:54:15.183989 Initializing CPU #1
547 12:54:15.187052 CPU: vendor Intel device 806ec
548 12:54:15.190451 CPU: family 06, model 8e, stepping 0c
549 12:54:15.193635 CPU: vendor Intel device 806ec
550 12:54:15.196948 CPU: family 06, model 8e, stepping 0c
551 12:54:15.200132 Clearing out pending MCEs
552 12:54:15.203486 Clearing out pending MCEs
553 12:54:15.206960 Setting up local APIC...
554 12:54:15.210313 CPU: vendor Intel device 806ec
555 12:54:15.213067 CPU: family 06, model 8e, stepping 0c
556 12:54:15.216295 Clearing out pending MCEs
557 12:54:15.216418 Initializing CPU #6
558 12:54:15.219793 Initializing CPU #7
559 12:54:15.223063 CPU: vendor Intel device 806ec
560 12:54:15.226468 CPU: family 06, model 8e, stepping 0c
561 12:54:15.229911 CPU: vendor Intel device 806ec
562 12:54:15.233227 CPU: family 06, model 8e, stepping 0c
563 12:54:15.236571 Clearing out pending MCEs
564 12:54:15.239471 Clearing out pending MCEs
565 12:54:15.239587 Setting up local APIC...
566 12:54:15.242809 Initializing CPU #5
567 12:54:15.246076 Initializing CPU #4
568 12:54:15.249906 CPU: vendor Intel device 806ec
569 12:54:15.253003 CPU: family 06, model 8e, stepping 0c
570 12:54:15.256317 CPU: vendor Intel device 806ec
571 12:54:15.259643 CPU: family 06, model 8e, stepping 0c
572 12:54:15.262813 Clearing out pending MCEs
573 12:54:15.262903 Clearing out pending MCEs
574 12:54:15.265842 Setting up local APIC...
575 12:54:15.269187 Setting up local APIC...
576 12:54:15.272953 apic_id: 0x02 done.
577 12:54:15.273069 Setting up local APIC...
578 12:54:15.276165 Setting up local APIC...
579 12:54:15.279443 apic_id: 0x03 done.
580 12:54:15.279555 VMX status: enabled
581 12:54:15.282914 VMX status: enabled
582 12:54:15.286093 IA32_FEATURE_CONTROL status: locked
583 12:54:15.289486 IA32_FEATURE_CONTROL status: locked
584 12:54:15.292762 Skip microcode update
585 12:54:15.292881 apic_id: 0x01 done.
586 12:54:15.296242 apic_id: 0x04 done.
587 12:54:15.299509 Setting up local APIC...
588 12:54:15.302793 apic_id: 0x06 done.
589 12:54:15.302903 apic_id: 0x07 done.
590 12:54:15.306158 VMX status: enabled
591 12:54:15.306238 VMX status: enabled
592 12:54:15.309539 apic_id: 0x05 done.
593 12:54:15.312942 IA32_FEATURE_CONTROL status: locked
594 12:54:15.316287 VMX status: enabled
595 12:54:15.316399 Skip microcode update
596 12:54:15.322447 IA32_FEATURE_CONTROL status: locked
597 12:54:15.322568 CPU #4 initialized
598 12:54:15.325894 VMX status: enabled
599 12:54:15.329193 IA32_FEATURE_CONTROL status: locked
600 12:54:15.329306 Skip microcode update
601 12:54:15.332586 Skip microcode update
602 12:54:15.336048 CPU #1 initialized
603 12:54:15.336158 CPU #3 initialized
604 12:54:15.338890 VMX status: enabled
605 12:54:15.342287 Skip microcode update
606 12:54:15.345438 IA32_FEATURE_CONTROL status: locked
607 12:54:15.345550 CPU #6 initialized
608 12:54:15.348867 Skip microcode update
609 12:54:15.352157 CPU #5 initialized
610 12:54:15.355830 IA32_FEATURE_CONTROL status: locked
611 12:54:15.355951 CPU #7 initialized
612 12:54:15.359274 Skip microcode update
613 12:54:15.362434 CPU #2 initialized
614 12:54:15.365465 bsp_do_flight_plan done after 466 msecs.
615 12:54:15.368667 CPU: frequency set to 4200 MHz
616 12:54:15.368785 Enabling SMIs.
617 12:54:15.371868 Locking SMM.
618 12:54:15.385768 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 12:54:15.388981 CBFS @ c08000 size 3f8000
620 12:54:15.395725 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 12:54:15.395842 CBFS: Locating 'vbt.bin'
622 12:54:15.399329 CBFS: Found @ offset 5f5c0 size 499
623 12:54:15.405984 Found a VBT of 4608 bytes after decompression
624 12:54:15.587692 Display FSP Version Info HOB
625 12:54:15.590882 Reference Code - CPU = 9.0.1e.30
626 12:54:15.594131 uCode Version = 0.0.0.ca
627 12:54:15.597284 TXT ACM version = ff.ff.ff.ffff
628 12:54:15.600413 Display FSP Version Info HOB
629 12:54:15.603724 Reference Code - ME = 9.0.1e.30
630 12:54:15.607161 MEBx version = 0.0.0.0
631 12:54:15.611065 ME Firmware Version = Consumer SKU
632 12:54:15.613899 Display FSP Version Info HOB
633 12:54:15.617301 Reference Code - CML PCH = 9.0.1e.30
634 12:54:15.620657 PCH-CRID Status = Disabled
635 12:54:15.623839 PCH-CRID Original Value = ff.ff.ff.ffff
636 12:54:15.627153 PCH-CRID New Value = ff.ff.ff.ffff
637 12:54:15.630610 OPROM - RST - RAID = ff.ff.ff.ffff
638 12:54:15.633975 ChipsetInit Base Version = ff.ff.ff.ffff
639 12:54:15.637425 ChipsetInit Oem Version = ff.ff.ff.ffff
640 12:54:15.640265 Display FSP Version Info HOB
641 12:54:15.646943 Reference Code - SA - System Agent = 9.0.1e.30
642 12:54:15.650381 Reference Code - MRC = 0.7.1.6c
643 12:54:15.650495 SA - PCIe Version = 9.0.1e.30
644 12:54:15.653916 SA-CRID Status = Disabled
645 12:54:15.657304 SA-CRID Original Value = 0.0.0.c
646 12:54:15.659994 SA-CRID New Value = 0.0.0.c
647 12:54:15.663497 OPROM - VBIOS = ff.ff.ff.ffff
648 12:54:15.666821 RTC Init
649 12:54:15.670125 Set power on after power failure.
650 12:54:15.670235 Disabling Deep S3
651 12:54:15.673514 Disabling Deep S3
652 12:54:15.673627 Disabling Deep S4
653 12:54:15.676939 Disabling Deep S4
654 12:54:15.677046 Disabling Deep S5
655 12:54:15.680301 Disabling Deep S5
656 12:54:15.686970 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
657 12:54:15.687090 Enumerating buses...
658 12:54:15.693458 Show all devs... Before device enumeration.
659 12:54:15.693576 Root Device: enabled 1
660 12:54:15.696628 CPU_CLUSTER: 0: enabled 1
661 12:54:15.700227 DOMAIN: 0000: enabled 1
662 12:54:15.703521 APIC: 00: enabled 1
663 12:54:15.703637 PCI: 00:00.0: enabled 1
664 12:54:15.706788 PCI: 00:02.0: enabled 1
665 12:54:15.710098 PCI: 00:04.0: enabled 0
666 12:54:15.713232 PCI: 00:05.0: enabled 0
667 12:54:15.713349 PCI: 00:12.0: enabled 1
668 12:54:15.716339 PCI: 00:12.5: enabled 0
669 12:54:15.720345 PCI: 00:12.6: enabled 0
670 12:54:15.723573 PCI: 00:14.0: enabled 1
671 12:54:15.723691 PCI: 00:14.1: enabled 0
672 12:54:15.726824 PCI: 00:14.3: enabled 1
673 12:54:15.730186 PCI: 00:14.5: enabled 0
674 12:54:15.730310 PCI: 00:15.0: enabled 1
675 12:54:15.733699 PCI: 00:15.1: enabled 1
676 12:54:15.736915 PCI: 00:15.2: enabled 0
677 12:54:15.740171 PCI: 00:15.3: enabled 0
678 12:54:15.740297 PCI: 00:16.0: enabled 1
679 12:54:15.742941 PCI: 00:16.1: enabled 0
680 12:54:15.746304 PCI: 00:16.2: enabled 0
681 12:54:15.749681 PCI: 00:16.3: enabled 0
682 12:54:15.749766 PCI: 00:16.4: enabled 0
683 12:54:15.753127 PCI: 00:16.5: enabled 0
684 12:54:15.756695 PCI: 00:17.0: enabled 1
685 12:54:15.759990 PCI: 00:19.0: enabled 1
686 12:54:15.760104 PCI: 00:19.1: enabled 0
687 12:54:15.763280 PCI: 00:19.2: enabled 0
688 12:54:15.766670 PCI: 00:1a.0: enabled 0
689 12:54:15.766786 PCI: 00:1c.0: enabled 0
690 12:54:15.769487 PCI: 00:1c.1: enabled 0
691 12:54:15.772683 PCI: 00:1c.2: enabled 0
692 12:54:15.776073 PCI: 00:1c.3: enabled 0
693 12:54:15.776182 PCI: 00:1c.4: enabled 0
694 12:54:15.779495 PCI: 00:1c.5: enabled 0
695 12:54:15.782998 PCI: 00:1c.6: enabled 0
696 12:54:15.786309 PCI: 00:1c.7: enabled 0
697 12:54:15.786425 PCI: 00:1d.0: enabled 1
698 12:54:15.789728 PCI: 00:1d.1: enabled 0
699 12:54:15.793048 PCI: 00:1d.2: enabled 0
700 12:54:15.796330 PCI: 00:1d.3: enabled 0
701 12:54:15.796439 PCI: 00:1d.4: enabled 0
702 12:54:15.799508 PCI: 00:1d.5: enabled 1
703 12:54:15.802687 PCI: 00:1e.0: enabled 1
704 12:54:15.802796 PCI: 00:1e.1: enabled 0
705 12:54:15.805931 PCI: 00:1e.2: enabled 1
706 12:54:15.809794 PCI: 00:1e.3: enabled 1
707 12:54:15.813094 PCI: 00:1f.0: enabled 1
708 12:54:15.813220 PCI: 00:1f.1: enabled 1
709 12:54:15.815827 PCI: 00:1f.2: enabled 1
710 12:54:15.819091 PCI: 00:1f.3: enabled 1
711 12:54:15.823127 PCI: 00:1f.4: enabled 1
712 12:54:15.823240 PCI: 00:1f.5: enabled 1
713 12:54:15.825807 PCI: 00:1f.6: enabled 0
714 12:54:15.828962 USB0 port 0: enabled 1
715 12:54:15.829072 I2C: 00:15: enabled 1
716 12:54:15.832406 I2C: 00:5d: enabled 1
717 12:54:15.835779 GENERIC: 0.0: enabled 1
718 12:54:15.835861 I2C: 00:1a: enabled 1
719 12:54:15.839612 I2C: 00:38: enabled 1
720 12:54:15.842767 I2C: 00:39: enabled 1
721 12:54:15.845751 I2C: 00:3a: enabled 1
722 12:54:15.845864 I2C: 00:3b: enabled 1
723 12:54:15.849105 PCI: 00:00.0: enabled 1
724 12:54:15.852472 SPI: 00: enabled 1
725 12:54:15.852582 SPI: 01: enabled 1
726 12:54:15.855799 PNP: 0c09.0: enabled 1
727 12:54:15.859331 USB2 port 0: enabled 1
728 12:54:15.859439 USB2 port 1: enabled 1
729 12:54:15.862734 USB2 port 2: enabled 0
730 12:54:15.866110 USB2 port 3: enabled 0
731 12:54:15.866219 USB2 port 5: enabled 0
732 12:54:15.868908 USB2 port 6: enabled 1
733 12:54:15.872787 USB2 port 9: enabled 1
734 12:54:15.872896 USB3 port 0: enabled 1
735 12:54:15.875997 USB3 port 1: enabled 1
736 12:54:15.878759 USB3 port 2: enabled 1
737 12:54:15.882181 USB3 port 3: enabled 1
738 12:54:15.882302 USB3 port 4: enabled 0
739 12:54:15.885663 APIC: 02: enabled 1
740 12:54:15.889106 APIC: 01: enabled 1
741 12:54:15.889224 APIC: 03: enabled 1
742 12:54:15.892343 APIC: 04: enabled 1
743 12:54:15.892454 APIC: 05: enabled 1
744 12:54:15.895793 APIC: 06: enabled 1
745 12:54:15.899154 APIC: 07: enabled 1
746 12:54:15.899263 Compare with tree...
747 12:54:15.902495 Root Device: enabled 1
748 12:54:15.905755 CPU_CLUSTER: 0: enabled 1
749 12:54:15.905853 APIC: 00: enabled 1
750 12:54:15.908890 APIC: 02: enabled 1
751 12:54:15.911914 APIC: 01: enabled 1
752 12:54:15.912024 APIC: 03: enabled 1
753 12:54:15.915594 APIC: 04: enabled 1
754 12:54:15.918778 APIC: 05: enabled 1
755 12:54:15.918887 APIC: 06: enabled 1
756 12:54:15.921923 APIC: 07: enabled 1
757 12:54:15.925419 DOMAIN: 0000: enabled 1
758 12:54:15.928713 PCI: 00:00.0: enabled 1
759 12:54:15.932124 PCI: 00:02.0: enabled 1
760 12:54:15.932237 PCI: 00:04.0: enabled 0
761 12:54:15.935292 PCI: 00:05.0: enabled 0
762 12:54:15.938607 PCI: 00:12.0: enabled 1
763 12:54:15.941959 PCI: 00:12.5: enabled 0
764 12:54:15.942060 PCI: 00:12.6: enabled 0
765 12:54:15.945226 PCI: 00:14.0: enabled 1
766 12:54:15.948506 USB0 port 0: enabled 1
767 12:54:15.952253 USB2 port 0: enabled 1
768 12:54:15.955447 USB2 port 1: enabled 1
769 12:54:15.958846 USB2 port 2: enabled 0
770 12:54:15.958941 USB2 port 3: enabled 0
771 12:54:15.962202 USB2 port 5: enabled 0
772 12:54:15.965491 USB2 port 6: enabled 1
773 12:54:15.968917 USB2 port 9: enabled 1
774 12:54:15.972014 USB3 port 0: enabled 1
775 12:54:15.972108 USB3 port 1: enabled 1
776 12:54:15.975454 USB3 port 2: enabled 1
777 12:54:15.978701 USB3 port 3: enabled 1
778 12:54:15.982044 USB3 port 4: enabled 0
779 12:54:15.985407 PCI: 00:14.1: enabled 0
780 12:54:15.988729 PCI: 00:14.3: enabled 1
781 12:54:15.988818 PCI: 00:14.5: enabled 0
782 12:54:15.992100 PCI: 00:15.0: enabled 1
783 12:54:15.995321 I2C: 00:15: enabled 1
784 12:54:15.998619 PCI: 00:15.1: enabled 1
785 12:54:15.998751 I2C: 00:5d: enabled 1
786 12:54:16.001378 GENERIC: 0.0: enabled 1
787 12:54:16.004831 PCI: 00:15.2: enabled 0
788 12:54:16.008126 PCI: 00:15.3: enabled 0
789 12:54:16.011966 PCI: 00:16.0: enabled 1
790 12:54:16.012053 PCI: 00:16.1: enabled 0
791 12:54:16.015156 PCI: 00:16.2: enabled 0
792 12:54:16.018349 PCI: 00:16.3: enabled 0
793 12:54:16.021537 PCI: 00:16.4: enabled 0
794 12:54:16.024752 PCI: 00:16.5: enabled 0
795 12:54:16.024855 PCI: 00:17.0: enabled 1
796 12:54:16.028653 PCI: 00:19.0: enabled 1
797 12:54:16.032003 I2C: 00:1a: enabled 1
798 12:54:16.035140 I2C: 00:38: enabled 1
799 12:54:16.035230 I2C: 00:39: enabled 1
800 12:54:16.038413 I2C: 00:3a: enabled 1
801 12:54:16.041570 I2C: 00:3b: enabled 1
802 12:54:16.044993 PCI: 00:19.1: enabled 0
803 12:54:16.048463 PCI: 00:19.2: enabled 0
804 12:54:16.048559 PCI: 00:1a.0: enabled 0
805 12:54:16.051176 PCI: 00:1c.0: enabled 0
806 12:54:16.054983 PCI: 00:1c.1: enabled 0
807 12:54:16.058218 PCI: 00:1c.2: enabled 0
808 12:54:16.061400 PCI: 00:1c.3: enabled 0
809 12:54:16.061495 PCI: 00:1c.4: enabled 0
810 12:54:16.064702 PCI: 00:1c.5: enabled 0
811 12:54:16.068046 PCI: 00:1c.6: enabled 0
812 12:54:16.071577 PCI: 00:1c.7: enabled 0
813 12:54:16.074847 PCI: 00:1d.0: enabled 1
814 12:54:16.074943 PCI: 00:1d.1: enabled 0
815 12:54:16.078116 PCI: 00:1d.2: enabled 0
816 12:54:16.081399 PCI: 00:1d.3: enabled 0
817 12:54:16.084628 PCI: 00:1d.4: enabled 0
818 12:54:16.084723 PCI: 00:1d.5: enabled 1
819 12:54:16.088022 PCI: 00:00.0: enabled 1
820 12:54:16.091416 PCI: 00:1e.0: enabled 1
821 12:54:16.094195 PCI: 00:1e.1: enabled 0
822 12:54:16.097612 PCI: 00:1e.2: enabled 1
823 12:54:16.097716 SPI: 00: enabled 1
824 12:54:16.100923 PCI: 00:1e.3: enabled 1
825 12:54:16.104407 SPI: 01: enabled 1
826 12:54:16.107781 PCI: 00:1f.0: enabled 1
827 12:54:16.107870 PNP: 0c09.0: enabled 1
828 12:54:16.111239 PCI: 00:1f.1: enabled 1
829 12:54:16.114516 PCI: 00:1f.2: enabled 1
830 12:54:16.117937 PCI: 00:1f.3: enabled 1
831 12:54:16.120578 PCI: 00:1f.4: enabled 1
832 12:54:16.120664 PCI: 00:1f.5: enabled 1
833 12:54:16.124425 PCI: 00:1f.6: enabled 0
834 12:54:16.127478 Root Device scanning...
835 12:54:16.130606 scan_static_bus for Root Device
836 12:54:16.134366 CPU_CLUSTER: 0 enabled
837 12:54:16.134463 DOMAIN: 0000 enabled
838 12:54:16.137699 DOMAIN: 0000 scanning...
839 12:54:16.140746 PCI: pci_scan_bus for bus 00
840 12:54:16.144016 PCI: 00:00.0 [8086/0000] ops
841 12:54:16.147457 PCI: 00:00.0 [8086/9b61] enabled
842 12:54:16.150693 PCI: 00:02.0 [8086/0000] bus ops
843 12:54:16.154204 PCI: 00:02.0 [8086/9b41] enabled
844 12:54:16.157585 PCI: 00:04.0 [8086/1903] disabled
845 12:54:16.161061 PCI: 00:08.0 [8086/1911] enabled
846 12:54:16.164094 PCI: 00:12.0 [8086/02f9] enabled
847 12:54:16.167354 PCI: 00:14.0 [8086/0000] bus ops
848 12:54:16.170443 PCI: 00:14.0 [8086/02ed] enabled
849 12:54:16.173907 PCI: 00:14.2 [8086/02ef] enabled
850 12:54:16.177264 PCI: 00:14.3 [8086/02f0] enabled
851 12:54:16.180605 PCI: 00:15.0 [8086/0000] bus ops
852 12:54:16.183821 PCI: 00:15.0 [8086/02e8] enabled
853 12:54:16.187108 PCI: 00:15.1 [8086/0000] bus ops
854 12:54:16.190403 PCI: 00:15.1 [8086/02e9] enabled
855 12:54:16.193765 PCI: 00:16.0 [8086/0000] ops
856 12:54:16.197078 PCI: 00:16.0 [8086/02e0] enabled
857 12:54:16.200534 PCI: 00:17.0 [8086/0000] ops
858 12:54:16.203869 PCI: 00:17.0 [8086/02d3] enabled
859 12:54:16.207146 PCI: 00:19.0 [8086/0000] bus ops
860 12:54:16.210579 PCI: 00:19.0 [8086/02c5] enabled
861 12:54:16.214091 PCI: 00:1d.0 [8086/0000] bus ops
862 12:54:16.217481 PCI: 00:1d.0 [8086/02b0] enabled
863 12:54:16.224214 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 12:54:16.224312 PCI: 00:1e.0 [8086/0000] ops
865 12:54:16.226845 PCI: 00:1e.0 [8086/02a8] enabled
866 12:54:16.230223 PCI: 00:1e.2 [8086/0000] bus ops
867 12:54:16.233858 PCI: 00:1e.2 [8086/02aa] enabled
868 12:54:16.237076 PCI: 00:1e.3 [8086/0000] bus ops
869 12:54:16.240275 PCI: 00:1e.3 [8086/02ab] enabled
870 12:54:16.243528 PCI: 00:1f.0 [8086/0000] bus ops
871 12:54:16.246781 PCI: 00:1f.0 [8086/0284] enabled
872 12:54:16.253346 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 12:54:16.260069 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 12:54:16.263498 PCI: 00:1f.3 [8086/0000] bus ops
875 12:54:16.266766 PCI: 00:1f.3 [8086/02c8] enabled
876 12:54:16.270065 PCI: 00:1f.4 [8086/0000] bus ops
877 12:54:16.273291 PCI: 00:1f.4 [8086/02a3] enabled
878 12:54:16.276552 PCI: 00:1f.5 [8086/0000] bus ops
879 12:54:16.280272 PCI: 00:1f.5 [8086/02a4] enabled
880 12:54:16.283333 PCI: Leftover static devices:
881 12:54:16.283429 PCI: 00:05.0
882 12:54:16.286702 PCI: 00:12.5
883 12:54:16.286796 PCI: 00:12.6
884 12:54:16.286870 PCI: 00:14.1
885 12:54:16.290209 PCI: 00:14.5
886 12:54:16.290302 PCI: 00:15.2
887 12:54:16.293387 PCI: 00:15.3
888 12:54:16.293480 PCI: 00:16.1
889 12:54:16.296717 PCI: 00:16.2
890 12:54:16.296809 PCI: 00:16.3
891 12:54:16.296882 PCI: 00:16.4
892 12:54:16.300131 PCI: 00:16.5
893 12:54:16.300225 PCI: 00:19.1
894 12:54:16.303588 PCI: 00:19.2
895 12:54:16.303681 PCI: 00:1a.0
896 12:54:16.303755 PCI: 00:1c.0
897 12:54:16.306242 PCI: 00:1c.1
898 12:54:16.306335 PCI: 00:1c.2
899 12:54:16.310321 PCI: 00:1c.3
900 12:54:16.310414 PCI: 00:1c.4
901 12:54:16.310488 PCI: 00:1c.5
902 12:54:16.313024 PCI: 00:1c.6
903 12:54:16.313117 PCI: 00:1c.7
904 12:54:16.316495 PCI: 00:1d.1
905 12:54:16.316589 PCI: 00:1d.2
906 12:54:16.320024 PCI: 00:1d.3
907 12:54:16.320117 PCI: 00:1d.4
908 12:54:16.320191 PCI: 00:1d.5
909 12:54:16.322896 PCI: 00:1e.1
910 12:54:16.322988 PCI: 00:1f.1
911 12:54:16.326726 PCI: 00:1f.2
912 12:54:16.326824 PCI: 00:1f.6
913 12:54:16.330185 PCI: Check your devicetree.cb.
914 12:54:16.332850 PCI: 00:02.0 scanning...
915 12:54:16.336253 scan_generic_bus for PCI: 00:02.0
916 12:54:16.339388 scan_generic_bus for PCI: 00:02.0 done
917 12:54:16.346249 scan_bus: scanning of bus PCI: 00:02.0 took 10189 usecs
918 12:54:16.346353 PCI: 00:14.0 scanning...
919 12:54:16.349969 scan_static_bus for PCI: 00:14.0
920 12:54:16.353251 USB0 port 0 enabled
921 12:54:16.356333 USB0 port 0 scanning...
922 12:54:16.359790 scan_static_bus for USB0 port 0
923 12:54:16.362902 USB2 port 0 enabled
924 12:54:16.363027 USB2 port 1 enabled
925 12:54:16.366742 USB2 port 2 disabled
926 12:54:16.366847 USB2 port 3 disabled
927 12:54:16.370123 USB2 port 5 disabled
928 12:54:16.373442 USB2 port 6 enabled
929 12:54:16.373568 USB2 port 9 enabled
930 12:54:16.376696 USB3 port 0 enabled
931 12:54:16.379595 USB3 port 1 enabled
932 12:54:16.379690 USB3 port 2 enabled
933 12:54:16.382817 USB3 port 3 enabled
934 12:54:16.382912 USB3 port 4 disabled
935 12:54:16.386252 USB2 port 0 scanning...
936 12:54:16.389450 scan_static_bus for USB2 port 0
937 12:54:16.393243 scan_static_bus for USB2 port 0 done
938 12:54:16.399699 scan_bus: scanning of bus USB2 port 0 took 9710 usecs
939 12:54:16.403142 USB2 port 1 scanning...
940 12:54:16.406433 scan_static_bus for USB2 port 1
941 12:54:16.409235 scan_static_bus for USB2 port 1 done
942 12:54:16.413063 scan_bus: scanning of bus USB2 port 1 took 9701 usecs
943 12:54:16.415800 USB2 port 6 scanning...
944 12:54:16.419242 scan_static_bus for USB2 port 6
945 12:54:16.422621 scan_static_bus for USB2 port 6 done
946 12:54:16.429151 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
947 12:54:16.432524 USB2 port 9 scanning...
948 12:54:16.435935 scan_static_bus for USB2 port 9
949 12:54:16.439132 scan_static_bus for USB2 port 9 done
950 12:54:16.445766 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
951 12:54:16.445863 USB3 port 0 scanning...
952 12:54:16.448929 scan_static_bus for USB3 port 0
953 12:54:16.452465 scan_static_bus for USB3 port 0 done
954 12:54:16.458934 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
955 12:54:16.462209 USB3 port 1 scanning...
956 12:54:16.465426 scan_static_bus for USB3 port 1
957 12:54:16.468789 scan_static_bus for USB3 port 1 done
958 12:54:16.475955 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
959 12:54:16.476077 USB3 port 2 scanning...
960 12:54:16.479235 scan_static_bus for USB3 port 2
961 12:54:16.485352 scan_static_bus for USB3 port 2 done
962 12:54:16.488830 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
963 12:54:16.492118 USB3 port 3 scanning...
964 12:54:16.495223 scan_static_bus for USB3 port 3
965 12:54:16.499030 scan_static_bus for USB3 port 3 done
966 12:54:16.505337 scan_bus: scanning of bus USB3 port 3 took 9683 usecs
967 12:54:16.508844 scan_static_bus for USB0 port 0 done
968 12:54:16.512081 scan_bus: scanning of bus USB0 port 0 took 155381 usecs
969 12:54:16.518714 scan_static_bus for PCI: 00:14.0 done
970 12:54:16.522094 scan_bus: scanning of bus PCI: 00:14.0 took 173006 usecs
971 12:54:16.525389 PCI: 00:15.0 scanning...
972 12:54:16.528809 scan_generic_bus for PCI: 00:15.0
973 12:54:16.532174 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 12:54:16.538879 scan_generic_bus for PCI: 00:15.0 done
975 12:54:16.542234 scan_bus: scanning of bus PCI: 00:15.0 took 14305 usecs
976 12:54:16.545410 PCI: 00:15.1 scanning...
977 12:54:16.548786 scan_generic_bus for PCI: 00:15.1
978 12:54:16.552095 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 12:54:16.558736 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 12:54:16.561877 scan_generic_bus for PCI: 00:15.1 done
981 12:54:16.568170 scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs
982 12:54:16.568294 PCI: 00:19.0 scanning...
983 12:54:16.571389 scan_generic_bus for PCI: 00:19.0
984 12:54:16.578103 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 12:54:16.581244 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 12:54:16.585113 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 12:54:16.587989 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 12:54:16.594722 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 12:54:16.598185 scan_generic_bus for PCI: 00:19.0 done
990 12:54:16.601441 scan_bus: scanning of bus PCI: 00:19.0 took 30727 usecs
991 12:54:16.604614 PCI: 00:1d.0 scanning...
992 12:54:16.607829 do_pci_scan_bridge for PCI: 00:1d.0
993 12:54:16.611751 PCI: pci_scan_bus for bus 01
994 12:54:16.614942 PCI: 01:00.0 [1c5c/1327] enabled
995 12:54:16.617792 Enabling Common Clock Configuration
996 12:54:16.624549 L1 Sub-State supported from root port 29
997 12:54:16.628113 L1 Sub-State Support = 0xf
998 12:54:16.628232 CommonModeRestoreTime = 0x28
999 12:54:16.634915 Power On Value = 0x16, Power On Scale = 0x0
1000 12:54:16.635033 ASPM: Enabled L1
1001 12:54:16.641399 scan_bus: scanning of bus PCI: 00:1d.0 took 32805 usecs
1002 12:54:16.644731 PCI: 00:1e.2 scanning...
1003 12:54:16.648213 scan_generic_bus for PCI: 00:1e.2
1004 12:54:16.651493 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 12:54:16.654869 scan_generic_bus for PCI: 00:1e.2 done
1006 12:54:16.661129 scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs
1007 12:54:16.664330 PCI: 00:1e.3 scanning...
1008 12:54:16.667816 scan_generic_bus for PCI: 00:1e.3
1009 12:54:16.670834 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 12:54:16.674438 scan_generic_bus for PCI: 00:1e.3 done
1011 12:54:16.681050 scan_bus: scanning of bus PCI: 00:1e.3 took 14018 usecs
1012 12:54:16.681147 PCI: 00:1f.0 scanning...
1013 12:54:16.684398 scan_static_bus for PCI: 00:1f.0
1014 12:54:16.687604 PNP: 0c09.0 enabled
1015 12:54:16.691333 scan_static_bus for PCI: 00:1f.0 done
1016 12:54:16.697965 scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs
1017 12:54:16.701272 PCI: 00:1f.3 scanning...
1018 12:54:16.704580 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1019 12:54:16.707762 PCI: 00:1f.4 scanning...
1020 12:54:16.710967 scan_generic_bus for PCI: 00:1f.4
1021 12:54:16.714160 scan_generic_bus for PCI: 00:1f.4 done
1022 12:54:16.721211 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1023 12:54:16.724405 PCI: 00:1f.5 scanning...
1024 12:54:16.727793 scan_generic_bus for PCI: 00:1f.5
1025 12:54:16.731146 scan_generic_bus for PCI: 00:1f.5 done
1026 12:54:16.737674 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1027 12:54:16.743866 scan_bus: scanning of bus DOMAIN: 0000 took 605250 usecs
1028 12:54:16.747210 scan_static_bus for Root Device done
1029 12:54:16.750555 scan_bus: scanning of bus Root Device took 625118 usecs
1030 12:54:16.754502 done
1031 12:54:16.757760 Chrome EC: UHEPI supported
1032 12:54:16.761235 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 12:54:16.767362 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 12:54:16.774025 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 12:54:16.780449 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 12:54:16.784365 SPI flash protection: WPSW=0 SRP0=0
1037 12:54:16.790597 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 12:54:16.794057 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1039 12:54:16.797250 found VGA at PCI: 00:02.0
1040 12:54:16.800322 Setting up VGA for PCI: 00:02.0
1041 12:54:16.807039 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 12:54:16.810477 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 12:54:16.813726 Allocating resources...
1044 12:54:16.816885 Reading resources...
1045 12:54:16.820161 Root Device read_resources bus 0 link: 0
1046 12:54:16.823879 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 12:54:16.830335 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 12:54:16.833584 DOMAIN: 0000 read_resources bus 0 link: 0
1049 12:54:16.841212 PCI: 00:14.0 read_resources bus 0 link: 0
1050 12:54:16.843848 USB0 port 0 read_resources bus 0 link: 0
1051 12:54:16.852558 USB0 port 0 read_resources bus 0 link: 0 done
1052 12:54:16.855245 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 12:54:16.863362 PCI: 00:15.0 read_resources bus 1 link: 0
1054 12:54:16.866005 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 12:54:16.872924 PCI: 00:15.1 read_resources bus 2 link: 0
1056 12:54:16.876364 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 12:54:16.883605 PCI: 00:19.0 read_resources bus 3 link: 0
1058 12:54:16.890106 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 12:54:16.893426 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 12:54:16.899972 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 12:54:16.903347 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 12:54:16.910348 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 12:54:16.913002 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 12:54:16.919673 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 12:54:16.923464 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 12:54:16.929574 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 12:54:16.936547 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 12:54:16.939898 Root Device read_resources bus 0 link: 0 done
1069 12:54:16.943230 Done reading resources.
1070 12:54:16.949947 Show resources in subtree (Root Device)...After reading.
1071 12:54:16.953323 Root Device child on link 0 CPU_CLUSTER: 0
1072 12:54:16.956118 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 12:54:16.960033 APIC: 00
1074 12:54:16.960150 APIC: 02
1075 12:54:16.960257 APIC: 01
1076 12:54:16.963179 APIC: 03
1077 12:54:16.963291 APIC: 04
1078 12:54:16.963395 APIC: 05
1079 12:54:16.966576 APIC: 06
1080 12:54:16.966689 APIC: 07
1081 12:54:16.972779 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 12:54:16.979557 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 12:54:17.032314 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 12:54:17.032654 PCI: 00:00.0
1085 12:54:17.032772 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 12:54:17.032906 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 12:54:17.033012 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 12:54:17.033866 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 12:54:17.082625 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 12:54:17.082978 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 12:54:17.083103 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 12:54:17.083419 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 12:54:17.083561 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 12:54:17.131753 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 12:54:17.132099 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 12:54:17.132228 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 12:54:17.132338 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 12:54:17.133015 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 12:54:17.133322 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 12:54:17.160900 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 12:54:17.161072 PCI: 00:02.0
1102 12:54:17.161377 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 12:54:17.164298 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 12:54:17.171115 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 12:54:17.174324 PCI: 00:04.0
1106 12:54:17.174439 PCI: 00:08.0
1107 12:54:17.184516 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 12:54:17.187920 PCI: 00:12.0
1109 12:54:17.197863 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 12:54:17.201075 PCI: 00:14.0 child on link 0 USB0 port 0
1111 12:54:17.211289 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 12:54:17.217783 USB0 port 0 child on link 0 USB2 port 0
1113 12:54:17.217905 USB2 port 0
1114 12:54:17.221069 USB2 port 1
1115 12:54:17.221181 USB2 port 2
1116 12:54:17.224200 USB2 port 3
1117 12:54:17.224323 USB2 port 5
1118 12:54:17.227493 USB2 port 6
1119 12:54:17.227604 USB2 port 9
1120 12:54:17.230777 USB3 port 0
1121 12:54:17.230889 USB3 port 1
1122 12:54:17.234171 USB3 port 2
1123 12:54:17.234282 USB3 port 3
1124 12:54:17.237582 USB3 port 4
1125 12:54:17.237701 PCI: 00:14.2
1126 12:54:17.246978 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 12:54:17.257430 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 12:54:17.260794 PCI: 00:14.3
1129 12:54:17.270290 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 12:54:17.273498 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 12:54:17.283679 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 12:54:17.287127 I2C: 01:15
1133 12:54:17.290510 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 12:54:17.300319 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 12:54:17.303700 I2C: 02:5d
1136 12:54:17.303825 GENERIC: 0.0
1137 12:54:17.306485 PCI: 00:16.0
1138 12:54:17.316841 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 12:54:17.316955 PCI: 00:17.0
1140 12:54:17.326477 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 12:54:17.333267 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 12:54:17.343222 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 12:54:17.349985 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 12:54:17.359916 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 12:54:17.369793 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 12:54:17.373012 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 12:54:17.383035 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 12:54:17.383138 I2C: 03:1a
1149 12:54:17.386388 I2C: 03:38
1150 12:54:17.386470 I2C: 03:39
1151 12:54:17.389830 I2C: 03:3a
1152 12:54:17.389936 I2C: 03:3b
1153 12:54:17.396482 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 12:54:17.402578 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 12:54:17.412569 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 12:54:17.422526 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 12:54:17.425845 PCI: 01:00.0
1158 12:54:17.435775 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 12:54:17.435885 PCI: 00:1e.0
1160 12:54:17.445537 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 12:54:17.455614 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 12:54:17.462309 PCI: 00:1e.2 child on link 0 SPI: 00
1163 12:54:17.471997 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 12:54:17.472136 SPI: 00
1165 12:54:17.475678 PCI: 00:1e.3 child on link 0 SPI: 01
1166 12:54:17.485430 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 12:54:17.488793 SPI: 01
1168 12:54:17.492070 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 12:54:17.502142 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 12:54:17.508938 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 12:54:17.512332 PNP: 0c09.0
1172 12:54:17.518420 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 12:54:17.521871 PCI: 00:1f.3
1174 12:54:17.531583 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 12:54:17.541436 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 12:54:17.541572 PCI: 00:1f.4
1177 12:54:17.551550 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 12:54:17.561437 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 12:54:17.564812 PCI: 00:1f.5
1180 12:54:17.571445 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 12:54:17.578205 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 12:54:17.584711 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 12:54:17.591131 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 12:54:17.594432 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 12:54:17.597885 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 12:54:17.604567 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 12:54:17.608134 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 12:54:17.614310 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 12:54:17.621314 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 12:54:17.627459 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 12:54:17.637552 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 12:54:17.644062 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 12:54:17.647231 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 12:54:17.654099 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 12:54:17.660788 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 12:54:17.663873 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 12:54:17.670555 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 12:54:17.673833 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 12:54:17.687036 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 12:54:17.687150 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 12:54:17.690839 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 12:54:17.694066 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 12:54:17.697370 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 12:54:17.703538 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 12:54:17.707519 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 12:54:17.713611 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 12:54:17.716808 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 12:54:17.723505 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 12:54:17.726880 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 12:54:17.733804 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 12:54:17.736965 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 12:54:17.743384 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 12:54:17.746660 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 12:54:17.753095 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 12:54:17.756481 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 12:54:17.763422 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 12:54:17.766642 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 12:54:17.776657 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 12:54:17.780020 avoid_fixed_resources: DOMAIN: 0000
1220 12:54:17.786507 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 12:54:17.789962 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 12:54:17.799828 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 12:54:17.806259 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 12:54:17.812862 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 12:54:17.822836 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 12:54:17.829213 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 12:54:17.835983 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 12:54:17.842596 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 12:54:17.852839 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 12:54:17.858994 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 12:54:17.865720 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 12:54:17.869076 Setting resources...
1233 12:54:17.876185 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 12:54:17.879265 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 12:54:17.882496 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 12:54:17.885955 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 12:54:17.892192 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 12:54:17.895791 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 12:54:17.902343 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 12:54:17.908804 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 12:54:17.918743 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 12:54:17.922185 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 12:54:17.928987 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 12:54:17.932519 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 12:54:17.939014 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 12:54:17.942552 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 12:54:17.945894 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 12:54:17.951787 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 12:54:17.955001 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 12:54:17.962152 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 12:54:17.965758 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 12:54:17.971650 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 12:54:17.974846 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 12:54:17.982263 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 12:54:17.985365 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 12:54:17.992112 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 12:54:17.995333 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 12:54:18.001604 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 12:54:18.004690 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 12:54:18.011619 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 12:54:18.014789 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 12:54:18.021444 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 12:54:18.024614 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 12:54:18.027866 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 12:54:18.038004 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 12:54:18.044707 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 12:54:18.051393 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 12:54:18.057679 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 12:54:18.064438 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 12:54:18.071001 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 12:54:18.074485 Root Device assign_resources, bus 0 link: 0
1272 12:54:18.081251 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 12:54:18.087629 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 12:54:18.098153 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 12:54:18.105044 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 12:54:18.114266 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 12:54:18.121141 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 12:54:18.131034 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 12:54:18.134375 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 12:54:18.141178 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 12:54:18.147456 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 12:54:18.154141 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 12:54:18.164133 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 12:54:18.170920 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 12:54:18.177349 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 12:54:18.180839 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 12:54:18.190817 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 12:54:18.194096 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 12:54:18.200664 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 12:54:18.207241 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 12:54:18.217355 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 12:54:18.223802 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 12:54:18.230148 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 12:54:18.239893 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 12:54:18.246700 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 12:54:18.253306 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 12:54:18.263313 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 12:54:18.266523 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 12:54:18.273258 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 12:54:18.279371 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 12:54:18.289782 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 12:54:18.296197 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 12:54:18.302762 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 12:54:18.309268 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 12:54:18.315671 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 12:54:18.322394 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 12:54:18.332203 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 12:54:18.335473 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 12:54:18.342335 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 12:54:18.348625 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 12:54:18.355326 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 12:54:18.358788 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 12:54:18.362157 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 12:54:18.368859 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 12:54:18.372207 LPC: Trying to open IO window from 800 size 1ff
1316 12:54:18.382242 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 12:54:18.389021 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 12:54:18.398455 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 12:54:18.405132 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 12:54:18.411799 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 12:54:18.414937 Root Device assign_resources, bus 0 link: 0
1322 12:54:18.418389 Done setting resources.
1323 12:54:18.424712 Show resources in subtree (Root Device)...After assigning values.
1324 12:54:18.428432 Root Device child on link 0 CPU_CLUSTER: 0
1325 12:54:18.431636 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 12:54:18.434647 APIC: 00
1327 12:54:18.434785 APIC: 02
1328 12:54:18.438426 APIC: 01
1329 12:54:18.438540 APIC: 03
1330 12:54:18.438653 APIC: 04
1331 12:54:18.441671 APIC: 05
1332 12:54:18.441791 APIC: 06
1333 12:54:18.444641 APIC: 07
1334 12:54:18.447788 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 12:54:18.457620 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 12:54:18.468066 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 12:54:18.471460 PCI: 00:00.0
1338 12:54:18.481333 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 12:54:18.487994 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 12:54:18.497585 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 12:54:18.507911 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 12:54:18.517870 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 12:54:18.527271 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 12:54:18.537587 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 12:54:18.543737 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 12:54:18.554012 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 12:54:18.563787 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 12:54:18.573785 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 12:54:18.583899 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 12:54:18.590513 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 12:54:18.599833 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 12:54:18.610165 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 12:54:18.619615 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 12:54:18.622927 PCI: 00:02.0
1355 12:54:18.633547 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 12:54:18.642917 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 12:54:18.653210 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 12:54:18.653363 PCI: 00:04.0
1359 12:54:18.656361 PCI: 00:08.0
1360 12:54:18.665831 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 12:54:18.665935 PCI: 00:12.0
1362 12:54:18.676042 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 12:54:18.682818 PCI: 00:14.0 child on link 0 USB0 port 0
1364 12:54:18.692643 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 12:54:18.696022 USB0 port 0 child on link 0 USB2 port 0
1366 12:54:18.698713 USB2 port 0
1367 12:54:18.698828 USB2 port 1
1368 12:54:18.702243 USB2 port 2
1369 12:54:18.702360 USB2 port 3
1370 12:54:18.705518 USB2 port 5
1371 12:54:18.705656 USB2 port 6
1372 12:54:18.708879 USB2 port 9
1373 12:54:18.712213 USB3 port 0
1374 12:54:18.712337 USB3 port 1
1375 12:54:18.715420 USB3 port 2
1376 12:54:18.715548 USB3 port 3
1377 12:54:18.719194 USB3 port 4
1378 12:54:18.719312 PCI: 00:14.2
1379 12:54:18.728594 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 12:54:18.738757 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 12:54:18.742014 PCI: 00:14.3
1382 12:54:18.752306 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 12:54:18.755402 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 12:54:18.765148 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 12:54:18.768418 I2C: 01:15
1386 12:54:18.771786 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 12:54:18.781848 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 12:54:18.785317 I2C: 02:5d
1389 12:54:18.785415 GENERIC: 0.0
1390 12:54:18.788138 PCI: 00:16.0
1391 12:54:18.798490 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 12:54:18.798589 PCI: 00:17.0
1393 12:54:18.811742 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 12:54:18.821403 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 12:54:18.827893 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 12:54:18.837866 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 12:54:18.847767 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 12:54:18.857783 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 12:54:18.861027 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 12:54:18.870669 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 12:54:18.874337 I2C: 03:1a
1402 12:54:18.874426 I2C: 03:38
1403 12:54:18.877488 I2C: 03:39
1404 12:54:18.877614 I2C: 03:3a
1405 12:54:18.880706 I2C: 03:3b
1406 12:54:18.884296 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 12:54:18.894317 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 12:54:18.904300 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 12:54:18.913856 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 12:54:18.917200 PCI: 01:00.0
1411 12:54:18.927063 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 12:54:18.927163 PCI: 00:1e.0
1413 12:54:18.940548 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 12:54:18.950499 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 12:54:18.953720 PCI: 00:1e.2 child on link 0 SPI: 00
1416 12:54:18.963521 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 12:54:18.963617 SPI: 00
1418 12:54:18.970234 PCI: 00:1e.3 child on link 0 SPI: 01
1419 12:54:18.980282 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 12:54:18.980381 SPI: 01
1421 12:54:18.983484 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 12:54:18.993054 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 12:54:19.003387 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 12:54:19.003480 PNP: 0c09.0
1425 12:54:19.013029 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 12:54:19.013142 PCI: 00:1f.3
1427 12:54:19.026418 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 12:54:19.036186 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 12:54:19.036281 PCI: 00:1f.4
1430 12:54:19.046023 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 12:54:19.056042 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 12:54:19.059575 PCI: 00:1f.5
1433 12:54:19.069235 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 12:54:19.072498 Done allocating resources.
1435 12:54:19.075701 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 12:54:19.079146 Enabling resources...
1437 12:54:19.082313 PCI: 00:00.0 subsystem <- 8086/9b61
1438 12:54:19.085335 PCI: 00:00.0 cmd <- 06
1439 12:54:19.089210 PCI: 00:02.0 subsystem <- 8086/9b41
1440 12:54:19.092348 PCI: 00:02.0 cmd <- 03
1441 12:54:19.095383 PCI: 00:08.0 cmd <- 06
1442 12:54:19.098622 PCI: 00:12.0 subsystem <- 8086/02f9
1443 12:54:19.101902 PCI: 00:12.0 cmd <- 02
1444 12:54:19.105230 PCI: 00:14.0 subsystem <- 8086/02ed
1445 12:54:19.108424 PCI: 00:14.0 cmd <- 02
1446 12:54:19.108518 PCI: 00:14.2 cmd <- 02
1447 12:54:19.115708 PCI: 00:14.3 subsystem <- 8086/02f0
1448 12:54:19.115803 PCI: 00:14.3 cmd <- 02
1449 12:54:19.119200 PCI: 00:15.0 subsystem <- 8086/02e8
1450 12:54:19.122450 PCI: 00:15.0 cmd <- 02
1451 12:54:19.125543 PCI: 00:15.1 subsystem <- 8086/02e9
1452 12:54:19.128785 PCI: 00:15.1 cmd <- 02
1453 12:54:19.132281 PCI: 00:16.0 subsystem <- 8086/02e0
1454 12:54:19.135376 PCI: 00:16.0 cmd <- 02
1455 12:54:19.138670 PCI: 00:17.0 subsystem <- 8086/02d3
1456 12:54:19.141867 PCI: 00:17.0 cmd <- 03
1457 12:54:19.144944 PCI: 00:19.0 subsystem <- 8086/02c5
1458 12:54:19.148918 PCI: 00:19.0 cmd <- 02
1459 12:54:19.152153 PCI: 00:1d.0 bridge ctrl <- 0013
1460 12:54:19.154722 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 12:54:19.158237 PCI: 00:1d.0 cmd <- 06
1462 12:54:19.161619 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 12:54:19.164614 PCI: 00:1e.0 cmd <- 06
1464 12:54:19.168524 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 12:54:19.171843 PCI: 00:1e.2 cmd <- 06
1466 12:54:19.175233 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 12:54:19.175323 PCI: 00:1e.3 cmd <- 02
1468 12:54:19.181454 PCI: 00:1f.0 subsystem <- 8086/0284
1469 12:54:19.181573 PCI: 00:1f.0 cmd <- 407
1470 12:54:19.188350 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 12:54:19.188475 PCI: 00:1f.3 cmd <- 02
1472 12:54:19.191470 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 12:54:19.194425 PCI: 00:1f.4 cmd <- 03
1474 12:54:19.197773 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 12:54:19.201462 PCI: 00:1f.5 cmd <- 406
1476 12:54:19.210485 PCI: 01:00.0 cmd <- 02
1477 12:54:19.215931 done.
1478 12:54:19.227827 ME: Version: 14.0.39.1367
1479 12:54:19.234377 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1480 12:54:19.237882 Initializing devices...
1481 12:54:19.237979 Root Device init ...
1482 12:54:19.244510 Chrome EC: Set SMI mask to 0x0000000000000000
1483 12:54:19.247643 Chrome EC: clear events_b mask to 0x0000000000000000
1484 12:54:19.254506 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 12:54:19.260749 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 12:54:19.267279 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 12:54:19.270549 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 12:54:19.273843 Root Device init finished in 35222 usecs
1489 12:54:19.277902 CPU_CLUSTER: 0 init ...
1490 12:54:19.284461 CPU_CLUSTER: 0 init finished in 2446 usecs
1491 12:54:19.288364 PCI: 00:00.0 init ...
1492 12:54:19.291761 CPU TDP: 15 Watts
1493 12:54:19.295137 CPU PL2 = 64 Watts
1494 12:54:19.298267 PCI: 00:00.0 init finished in 7063 usecs
1495 12:54:19.301354 PCI: 00:02.0 init ...
1496 12:54:19.305142 PCI: 00:02.0 init finished in 2252 usecs
1497 12:54:19.308432 PCI: 00:08.0 init ...
1498 12:54:19.311609 PCI: 00:08.0 init finished in 2251 usecs
1499 12:54:19.315258 PCI: 00:12.0 init ...
1500 12:54:19.318444 PCI: 00:12.0 init finished in 2252 usecs
1501 12:54:19.321751 PCI: 00:14.0 init ...
1502 12:54:19.325060 PCI: 00:14.0 init finished in 2252 usecs
1503 12:54:19.328193 PCI: 00:14.2 init ...
1504 12:54:19.331576 PCI: 00:14.2 init finished in 2252 usecs
1505 12:54:19.334763 PCI: 00:14.3 init ...
1506 12:54:19.338279 PCI: 00:14.3 init finished in 2273 usecs
1507 12:54:19.341632 PCI: 00:15.0 init ...
1508 12:54:19.344964 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 12:54:19.347797 PCI: 00:15.0 init finished in 5966 usecs
1510 12:54:19.351166 PCI: 00:15.1 init ...
1511 12:54:19.355081 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 12:54:19.361469 PCI: 00:15.1 init finished in 5976 usecs
1513 12:54:19.361599 PCI: 00:16.0 init ...
1514 12:54:19.367760 PCI: 00:16.0 init finished in 2251 usecs
1515 12:54:19.367853 PCI: 00:19.0 init ...
1516 12:54:19.374342 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 12:54:19.377771 PCI: 00:19.0 init finished in 5975 usecs
1518 12:54:19.380971 PCI: 00:1d.0 init ...
1519 12:54:19.384250 Initializing PCH PCIe bridge.
1520 12:54:19.387373 PCI: 00:1d.0 init finished in 5282 usecs
1521 12:54:19.390687 PCI: 00:1f.0 init ...
1522 12:54:19.394203 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 12:54:19.400780 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 12:54:19.400874 IOAPIC: ID = 0x02
1525 12:54:19.404081 IOAPIC: Dumping registers
1526 12:54:19.407802 reg 0x0000: 0x02000000
1527 12:54:19.410883 reg 0x0001: 0x00770020
1528 12:54:19.410977 reg 0x0002: 0x00000000
1529 12:54:19.417308 PCI: 00:1f.0 init finished in 23541 usecs
1530 12:54:19.420470 PCI: 00:1f.4 init ...
1531 12:54:19.424118 PCI: 00:1f.4 init finished in 2263 usecs
1532 12:54:19.434297 PCI: 01:00.0 init ...
1533 12:54:19.438174 PCI: 01:00.0 init finished in 2251 usecs
1534 12:54:19.442325 PNP: 0c09.0 init ...
1535 12:54:19.445545 Google Chrome EC uptime: 11.065 seconds
1536 12:54:19.452130 Google Chrome AP resets since EC boot: 0
1537 12:54:19.455431 Google Chrome most recent AP reset causes:
1538 12:54:19.461966 Google Chrome EC reset flags at last EC boot: reset-pin
1539 12:54:19.465308 PNP: 0c09.0 init finished in 20569 usecs
1540 12:54:19.468323 Devices initialized
1541 12:54:19.471850 Show all devs... After init.
1542 12:54:19.471943 Root Device: enabled 1
1543 12:54:19.475303 CPU_CLUSTER: 0: enabled 1
1544 12:54:19.478656 DOMAIN: 0000: enabled 1
1545 12:54:19.478748 APIC: 00: enabled 1
1546 12:54:19.481458 PCI: 00:00.0: enabled 1
1547 12:54:19.485251 PCI: 00:02.0: enabled 1
1548 12:54:19.488408 PCI: 00:04.0: enabled 0
1549 12:54:19.488501 PCI: 00:05.0: enabled 0
1550 12:54:19.491592 PCI: 00:12.0: enabled 1
1551 12:54:19.494726 PCI: 00:12.5: enabled 0
1552 12:54:19.498212 PCI: 00:12.6: enabled 0
1553 12:54:19.498309 PCI: 00:14.0: enabled 1
1554 12:54:19.501565 PCI: 00:14.1: enabled 0
1555 12:54:19.504938 PCI: 00:14.3: enabled 1
1556 12:54:19.505031 PCI: 00:14.5: enabled 0
1557 12:54:19.508199 PCI: 00:15.0: enabled 1
1558 12:54:19.511451 PCI: 00:15.1: enabled 1
1559 12:54:19.514774 PCI: 00:15.2: enabled 0
1560 12:54:19.514867 PCI: 00:15.3: enabled 0
1561 12:54:19.518218 PCI: 00:16.0: enabled 1
1562 12:54:19.521547 PCI: 00:16.1: enabled 0
1563 12:54:19.524480 PCI: 00:16.2: enabled 0
1564 12:54:19.524607 PCI: 00:16.3: enabled 0
1565 12:54:19.528184 PCI: 00:16.4: enabled 0
1566 12:54:19.531372 PCI: 00:16.5: enabled 0
1567 12:54:19.534360 PCI: 00:17.0: enabled 1
1568 12:54:19.534451 PCI: 00:19.0: enabled 1
1569 12:54:19.538165 PCI: 00:19.1: enabled 0
1570 12:54:19.541301 PCI: 00:19.2: enabled 0
1571 12:54:19.544337 PCI: 00:1a.0: enabled 0
1572 12:54:19.544429 PCI: 00:1c.0: enabled 0
1573 12:54:19.547901 PCI: 00:1c.1: enabled 0
1574 12:54:19.551135 PCI: 00:1c.2: enabled 0
1575 12:54:19.551233 PCI: 00:1c.3: enabled 0
1576 12:54:19.554439 PCI: 00:1c.4: enabled 0
1577 12:54:19.557468 PCI: 00:1c.5: enabled 0
1578 12:54:19.560636 PCI: 00:1c.6: enabled 0
1579 12:54:19.560728 PCI: 00:1c.7: enabled 0
1580 12:54:19.564016 PCI: 00:1d.0: enabled 1
1581 12:54:19.567337 PCI: 00:1d.1: enabled 0
1582 12:54:19.570573 PCI: 00:1d.2: enabled 0
1583 12:54:19.570666 PCI: 00:1d.3: enabled 0
1584 12:54:19.574393 PCI: 00:1d.4: enabled 0
1585 12:54:19.577569 PCI: 00:1d.5: enabled 0
1586 12:54:19.581139 PCI: 00:1e.0: enabled 1
1587 12:54:19.581231 PCI: 00:1e.1: enabled 0
1588 12:54:19.584353 PCI: 00:1e.2: enabled 1
1589 12:54:19.587193 PCI: 00:1e.3: enabled 1
1590 12:54:19.590474 PCI: 00:1f.0: enabled 1
1591 12:54:19.590566 PCI: 00:1f.1: enabled 0
1592 12:54:19.594155 PCI: 00:1f.2: enabled 0
1593 12:54:19.597341 PCI: 00:1f.3: enabled 1
1594 12:54:19.597433 PCI: 00:1f.4: enabled 1
1595 12:54:19.600793 PCI: 00:1f.5: enabled 1
1596 12:54:19.604043 PCI: 00:1f.6: enabled 0
1597 12:54:19.607466 USB0 port 0: enabled 1
1598 12:54:19.607562 I2C: 01:15: enabled 1
1599 12:54:19.610861 I2C: 02:5d: enabled 1
1600 12:54:19.614237 GENERIC: 0.0: enabled 1
1601 12:54:19.614329 I2C: 03:1a: enabled 1
1602 12:54:19.617025 I2C: 03:38: enabled 1
1603 12:54:19.620284 I2C: 03:39: enabled 1
1604 12:54:19.620377 I2C: 03:3a: enabled 1
1605 12:54:19.624217 I2C: 03:3b: enabled 1
1606 12:54:19.627382 PCI: 00:00.0: enabled 1
1607 12:54:19.627474 SPI: 00: enabled 1
1608 12:54:19.630564 SPI: 01: enabled 1
1609 12:54:19.633874 PNP: 0c09.0: enabled 1
1610 12:54:19.633966 USB2 port 0: enabled 1
1611 12:54:19.637015 USB2 port 1: enabled 1
1612 12:54:19.640202 USB2 port 2: enabled 0
1613 12:54:19.643486 USB2 port 3: enabled 0
1614 12:54:19.643578 USB2 port 5: enabled 0
1615 12:54:19.647059 USB2 port 6: enabled 1
1616 12:54:19.650332 USB2 port 9: enabled 1
1617 12:54:19.650426 USB3 port 0: enabled 1
1618 12:54:19.653716 USB3 port 1: enabled 1
1619 12:54:19.657130 USB3 port 2: enabled 1
1620 12:54:19.657222 USB3 port 3: enabled 1
1621 12:54:19.660452 USB3 port 4: enabled 0
1622 12:54:19.663840 APIC: 02: enabled 1
1623 12:54:19.663963 APIC: 01: enabled 1
1624 12:54:19.667076 APIC: 03: enabled 1
1625 12:54:19.670151 APIC: 04: enabled 1
1626 12:54:19.670269 APIC: 05: enabled 1
1627 12:54:19.673458 APIC: 06: enabled 1
1628 12:54:19.676773 APIC: 07: enabled 1
1629 12:54:19.676863 PCI: 00:08.0: enabled 1
1630 12:54:19.680064 PCI: 00:14.2: enabled 1
1631 12:54:19.683339 PCI: 01:00.0: enabled 1
1632 12:54:19.686961 Disabling ACPI via APMC:
1633 12:54:19.690450 done.
1634 12:54:19.693781 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 12:54:19.696887 ELOG: NV offset 0xaf0000 size 0x4000
1636 12:54:19.703917 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 12:54:19.710509 ELOG: Event(17) added with size 13 at 2023-04-05 12:54:19 UTC
1638 12:54:19.716879 ELOG: Event(92) added with size 9 at 2023-04-05 12:54:19 UTC
1639 12:54:19.723882 ELOG: Event(93) added with size 9 at 2023-04-05 12:54:19 UTC
1640 12:54:19.730324 ELOG: Event(9A) added with size 9 at 2023-04-05 12:54:19 UTC
1641 12:54:19.736670 ELOG: Event(9E) added with size 10 at 2023-04-05 12:54:19 UTC
1642 12:54:19.743196 ELOG: Event(9F) added with size 14 at 2023-04-05 12:54:19 UTC
1643 12:54:19.746319 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1644 12:54:19.753871 ELOG: Event(A1) added with size 10 at 2023-04-05 12:54:19 UTC
1645 12:54:19.763780 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 12:54:19.770467 ELOG: Event(A0) added with size 9 at 2023-04-05 12:54:19 UTC
1647 12:54:19.773699 elog_add_boot_reason: Logged dev mode boot
1648 12:54:19.777074 Finalize devices...
1649 12:54:19.777168 PCI: 00:17.0 final
1650 12:54:19.780543 Devices finalized
1651 12:54:19.783234 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 12:54:19.789796 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 12:54:19.793445 ME: HFSTS1 : 0x90000245
1654 12:54:19.796739 ME: HFSTS2 : 0x3B850126
1655 12:54:19.803220 ME: HFSTS3 : 0x00000020
1656 12:54:19.806416 ME: HFSTS4 : 0x00004800
1657 12:54:19.809540 ME: HFSTS5 : 0x00000000
1658 12:54:19.812830 ME: HFSTS6 : 0x40400006
1659 12:54:19.816620 ME: Manufacturing Mode : NO
1660 12:54:19.819537 ME: FW Partition Table : OK
1661 12:54:19.823372 ME: Bringup Loader Failure : NO
1662 12:54:19.826051 ME: Firmware Init Complete : YES
1663 12:54:19.829379 ME: Boot Options Present : NO
1664 12:54:19.833219 ME: Update In Progress : NO
1665 12:54:19.836309 ME: D0i3 Support : YES
1666 12:54:19.839492 ME: Low Power State Enabled : NO
1667 12:54:19.842912 ME: CPU Replaced : NO
1668 12:54:19.846118 ME: CPU Replacement Valid : YES
1669 12:54:19.849265 ME: Current Working State : 5
1670 12:54:19.852948 ME: Current Operation State : 1
1671 12:54:19.856161 ME: Current Operation Mode : 0
1672 12:54:19.859366 ME: Error Code : 0
1673 12:54:19.862480 ME: CPU Debug Disabled : YES
1674 12:54:19.866172 ME: TXT Support : NO
1675 12:54:19.872360 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 12:54:19.879077 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 12:54:19.879171 CBFS @ c08000 size 3f8000
1678 12:54:19.885920 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 12:54:19.889331 CBFS: Locating 'fallback/dsdt.aml'
1680 12:54:19.895443 CBFS: Found @ offset 10bb80 size 3fa5
1681 12:54:19.898802 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 12:54:19.902104 CBFS @ c08000 size 3f8000
1683 12:54:19.908793 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 12:54:19.912004 CBFS: Locating 'fallback/slic'
1685 12:54:19.915159 CBFS: 'fallback/slic' not found.
1686 12:54:19.918462 ACPI: Writing ACPI tables at 99b3e000.
1687 12:54:19.922195 ACPI: * FACS
1688 12:54:19.922288 ACPI: * DSDT
1689 12:54:19.928815 Ramoops buffer: 0x100000@0x99a3d000.
1690 12:54:19.932277 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 12:54:19.935300 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 12:54:19.938509 Google Chrome EC: version:
1693 12:54:19.942084 ro: helios_v2.0.2659-56403530b
1694 12:54:19.945206 rw: helios_v2.0.2849-c41de27e7d
1695 12:54:19.948745 running image: 1
1696 12:54:19.952271 ACPI: * FADT
1697 12:54:19.952365 SCI is IRQ9
1698 12:54:19.955334 ACPI: added table 1/32, length now 40
1699 12:54:19.958693 ACPI: * SSDT
1700 12:54:19.961823 Found 1 CPU(s) with 8 core(s) each.
1701 12:54:19.965598 Error: Could not locate 'wifi_sar' in VPD.
1702 12:54:19.968765 Checking CBFS for default SAR values
1703 12:54:19.975700 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 12:54:19.978282 CBFS @ c08000 size 3f8000
1705 12:54:19.984787 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 12:54:19.988197 CBFS: Locating 'wifi_sar_defaults.hex'
1707 12:54:19.991474 CBFS: Found @ offset 5fac0 size 77
1708 12:54:19.994845 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 12:54:19.998247 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 12:54:20.005033 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 12:54:20.011471 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 12:54:20.014986 failed to find key in VPD: dsm_calib_r0_0
1713 12:54:20.024451 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 12:54:20.028312 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 12:54:20.031417 failed to find key in VPD: dsm_calib_r0_1
1716 12:54:20.041298 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 12:54:20.048260 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 12:54:20.050980 failed to find key in VPD: dsm_calib_r0_2
1719 12:54:20.061120 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 12:54:20.064341 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 12:54:20.070869 failed to find key in VPD: dsm_calib_r0_3
1722 12:54:20.077909 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 12:54:20.084428 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 12:54:20.087596 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 12:54:20.090400 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 12:54:20.095027 EC returned error result code 1
1727 12:54:20.098406 EC returned error result code 1
1728 12:54:20.102472 EC returned error result code 1
1729 12:54:20.108457 PS2K: Bad resp from EC. Vivaldi disabled!
1730 12:54:20.115477 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 12:54:20.118574 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 12:54:20.125468 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 12:54:20.128694 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 12:54:20.135388 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 12:54:20.142043 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 12:54:20.148498 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 12:54:20.151748 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 12:54:20.158373 ACPI: added table 2/32, length now 44
1739 12:54:20.158498 ACPI: * MCFG
1740 12:54:20.161869 ACPI: added table 3/32, length now 48
1741 12:54:20.165072 ACPI: * TPM2
1742 12:54:20.168355 TPM2 log created at 99a2d000
1743 12:54:20.171392 ACPI: added table 4/32, length now 52
1744 12:54:20.171485 ACPI: * MADT
1745 12:54:20.175058 SCI is IRQ9
1746 12:54:20.178151 ACPI: added table 5/32, length now 56
1747 12:54:20.178245 current = 99b43ac0
1748 12:54:20.181268 ACPI: * DMAR
1749 12:54:20.184962 ACPI: added table 6/32, length now 60
1750 12:54:20.188020 ACPI: * IGD OpRegion
1751 12:54:20.188144 GMA: Found VBT in CBFS
1752 12:54:20.191034 GMA: Found valid VBT in CBFS
1753 12:54:20.194560 ACPI: added table 7/32, length now 64
1754 12:54:20.197743 ACPI: * HPET
1755 12:54:20.201156 ACPI: added table 8/32, length now 68
1756 12:54:20.204368 ACPI: done.
1757 12:54:20.204459 ACPI tables: 31744 bytes.
1758 12:54:20.207938 smbios_write_tables: 99a2c000
1759 12:54:20.211181 EC returned error result code 3
1760 12:54:20.215177 Couldn't obtain OEM name from CBI
1761 12:54:20.217881 Create SMBIOS type 17
1762 12:54:20.221496 PCI: 00:00.0 (Intel Cannonlake)
1763 12:54:20.224867 PCI: 00:14.3 (Intel WiFi)
1764 12:54:20.228015 SMBIOS tables: 939 bytes.
1765 12:54:20.231621 Writing table forward entry at 0x00000500
1766 12:54:20.238145 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 12:54:20.240994 Writing coreboot table at 0x99b62000
1768 12:54:20.247969 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 12:54:20.251182 1. 0000000000001000-000000000009ffff: RAM
1770 12:54:20.254310 2. 00000000000a0000-00000000000fffff: RESERVED
1771 12:54:20.260886 3. 0000000000100000-0000000099a2bfff: RAM
1772 12:54:20.267631 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 12:54:20.271197 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 12:54:20.277395 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 12:54:20.281218 7. 000000009a000000-000000009f7fffff: RESERVED
1776 12:54:20.287471 8. 00000000e0000000-00000000efffffff: RESERVED
1777 12:54:20.290543 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 12:54:20.297490 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 12:54:20.300720 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 12:54:20.304089 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 12:54:20.310986 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 12:54:20.314252 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 12:54:20.320244 15. 0000000100000000-000000045e7fffff: RAM
1784 12:54:20.324129 Graphics framebuffer located at 0xc0000000
1785 12:54:20.327147 Passing 5 GPIOs to payload:
1786 12:54:20.330578 NAME | PORT | POLARITY | VALUE
1787 12:54:20.337279 write protect | undefined | high | low
1788 12:54:20.340420 lid | undefined | high | high
1789 12:54:20.347029 power | undefined | high | low
1790 12:54:20.353598 oprom | undefined | high | low
1791 12:54:20.356901 EC in RW | 0x000000cb | high | low
1792 12:54:20.360103 Board ID: 4
1793 12:54:20.363711 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 12:54:20.367094 CBFS @ c08000 size 3f8000
1795 12:54:20.373818 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 12:54:20.380117 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1797 12:54:20.380214 coreboot table: 1492 bytes.
1798 12:54:20.383404 IMD ROOT 0. 99fff000 00001000
1799 12:54:20.386636 IMD SMALL 1. 99ffe000 00001000
1800 12:54:20.390032 FSP MEMORY 2. 99c4e000 003b0000
1801 12:54:20.393721 CONSOLE 3. 99c2e000 00020000
1802 12:54:20.396844 FMAP 4. 99c2d000 0000054e
1803 12:54:20.400009 TIME STAMP 5. 99c2c000 00000910
1804 12:54:20.403210 VBOOT WORK 6. 99c18000 00014000
1805 12:54:20.407111 MRC DATA 7. 99c16000 00001958
1806 12:54:20.410284 ROMSTG STCK 8. 99c15000 00001000
1807 12:54:20.413175 AFTER CAR 9. 99c0b000 0000a000
1808 12:54:20.416248 RAMSTAGE 10. 99baf000 0005c000
1809 12:54:20.419600 REFCODE 11. 99b7a000 00035000
1810 12:54:20.423026 SMM BACKUP 12. 99b6a000 00010000
1811 12:54:20.426362 COREBOOT 13. 99b62000 00008000
1812 12:54:20.429862 ACPI 14. 99b3e000 00024000
1813 12:54:20.432923 ACPI GNVS 15. 99b3d000 00001000
1814 12:54:20.436362 RAMOOPS 16. 99a3d000 00100000
1815 12:54:20.439740 TPM2 TCGLOG17. 99a2d000 00010000
1816 12:54:20.443127 SMBIOS 18. 99a2c000 00000800
1817 12:54:20.446403 IMD small region:
1818 12:54:20.449546 IMD ROOT 0. 99ffec00 00000400
1819 12:54:20.452823 FSP RUNTIME 1. 99ffebe0 00000004
1820 12:54:20.456134 EC HOSTEVENT 2. 99ffebc0 00000008
1821 12:54:20.459381 POWER STATE 3. 99ffeb80 00000040
1822 12:54:20.462650 ROMSTAGE 4. 99ffeb60 00000004
1823 12:54:20.466125 MEM INFO 5. 99ffe9a0 000001b9
1824 12:54:20.473043 VPD 6. 99ffe920 0000006c
1825 12:54:20.473134 MTRR: Physical address space:
1826 12:54:20.479224 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 12:54:20.486163 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 12:54:20.492704 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 12:54:20.499046 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 12:54:20.506319 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 12:54:20.512818 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 12:54:20.519445 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 12:54:20.522914 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 12:54:20.525549 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 12:54:20.528825 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 12:54:20.535370 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 12:54:20.538745 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 12:54:20.542690 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 12:54:20.545510 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 12:54:20.551997 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 12:54:20.555624 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 12:54:20.558392 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 12:54:20.562413 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 12:54:20.565624 call enable_fixed_mtrr()
1845 12:54:20.569193 CPU physical address size: 39 bits
1846 12:54:20.575931 MTRR: default type WB/UC MTRR counts: 6/8.
1847 12:54:20.578938 MTRR: WB selected as default type.
1848 12:54:20.585130 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 12:54:20.588431 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 12:54:20.595312 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 12:54:20.601835 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 12:54:20.608875 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 12:54:20.615057 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 12:54:20.618205 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 12:54:20.624804 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 12:54:20.628111 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 12:54:20.631457 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 12:54:20.634978 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 12:54:20.641780 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 12:54:20.645079 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 12:54:20.648220 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 12:54:20.651495 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 12:54:20.657994 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 12:54:20.661127 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 12:54:20.661273
1866 12:54:20.661391 MTRR check
1867 12:54:20.664530 Fixed MTRRs : Enabled
1868 12:54:20.667819 Variable MTRRs: Enabled
1869 12:54:20.667971
1870 12:54:20.671156 call enable_fixed_mtrr()
1871 12:54:20.674394 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1872 12:54:20.677903 CPU physical address size: 39 bits
1873 12:54:20.684932 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1874 12:54:20.688100 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 12:54:20.691400 MTRR: Fixed MSR 0x250 0x0606060606060606
1876 12:54:20.698154 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 12:54:20.701070 MTRR: Fixed MSR 0x259 0x0000000000000000
1878 12:54:20.704272 MTRR: Fixed MSR 0x268 0x0606060606060606
1879 12:54:20.708316 MTRR: Fixed MSR 0x269 0x0606060606060606
1880 12:54:20.714584 MTRR: Fixed MSR 0x26a 0x0606060606060606
1881 12:54:20.717579 MTRR: Fixed MSR 0x26b 0x0606060606060606
1882 12:54:20.721405 MTRR: Fixed MSR 0x26c 0x0606060606060606
1883 12:54:20.724662 MTRR: Fixed MSR 0x26d 0x0606060606060606
1884 12:54:20.728069 MTRR: Fixed MSR 0x26e 0x0606060606060606
1885 12:54:20.734096 MTRR: Fixed MSR 0x26f 0x0606060606060606
1886 12:54:20.737430 MTRR: Fixed MSR 0x258 0x0606060606060606
1887 12:54:20.741057 call enable_fixed_mtrr()
1888 12:54:20.744316 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 12:54:20.747611 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 12:54:20.754167 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 12:54:20.757315 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 12:54:20.760863 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 12:54:20.764032 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 12:54:20.767123 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 12:54:20.774009 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 12:54:20.777259 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 12:54:20.780582 CPU physical address size: 39 bits
1898 12:54:20.783958 call enable_fixed_mtrr()
1899 12:54:20.787169 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 12:54:20.790474 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 12:54:20.797182 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 12:54:20.800697 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 12:54:20.803869 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 12:54:20.807072 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 12:54:20.813581 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 12:54:20.816803 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 12:54:20.820099 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 12:54:20.823770 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 12:54:20.829967 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 12:54:20.833328 MTRR: Fixed MSR 0x250 0x0606060606060606
1911 12:54:20.836642 call enable_fixed_mtrr()
1912 12:54:20.840152 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 12:54:20.843340 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 12:54:20.846324 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 12:54:20.853560 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 12:54:20.856764 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 12:54:20.859901 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 12:54:20.863326 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 12:54:20.869853 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 12:54:20.873282 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 12:54:20.876079 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 12:54:20.879402 CPU physical address size: 39 bits
1923 12:54:20.882816 call enable_fixed_mtrr()
1924 12:54:20.885960 CBFS @ c08000 size 3f8000
1925 12:54:20.892585 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1926 12:54:20.896021 CBFS: Locating 'fallback/payload'
1927 12:54:20.899264 CPU physical address size: 39 bits
1928 12:54:20.902555 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 12:54:20.905798 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 12:54:20.908986 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:54:20.915540 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:54:20.919366 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:54:20.922315 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:54:20.925788 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:54:20.932177 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:54:20.935448 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:54:20.939203 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:54:20.942090 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:54:20.948888 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:54:20.952118 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 12:54:20.954985 call enable_fixed_mtrr()
1942 12:54:20.958325 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 12:54:20.962201 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 12:54:20.965478 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 12:54:20.971809 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 12:54:20.975324 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 12:54:20.978343 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 12:54:20.981714 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 12:54:20.988428 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 12:54:20.991601 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 12:54:20.994904 CPU physical address size: 39 bits
1952 12:54:20.998282 call enable_fixed_mtrr()
1953 12:54:21.001738 CPU physical address size: 39 bits
1954 12:54:21.004960 CBFS: Found @ offset 1c96c0 size 3f798
1955 12:54:21.008455 CPU physical address size: 39 bits
1956 12:54:21.014617 Checking segment from ROM address 0xffdd16f8
1957 12:54:21.017880 Checking segment from ROM address 0xffdd1714
1958 12:54:21.021285 Loading segment from ROM address 0xffdd16f8
1959 12:54:21.024659 code (compression=0)
1960 12:54:21.034185 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 12:54:21.041051 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 12:54:21.044247 it's not compressed!
1963 12:54:21.135877 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 12:54:21.142448 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 12:54:21.145838 Loading segment from ROM address 0xffdd1714
1966 12:54:21.148590 Entry Point 0x30000000
1967 12:54:21.151744 Loaded segments
1968 12:54:21.157616 Finalizing chipset.
1969 12:54:21.160881 Finalizing SMM.
1970 12:54:21.164240 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1971 12:54:21.167597 mp_park_aps done after 0 msecs.
1972 12:54:21.174385 Jumping to boot code at 30000000(99b62000)
1973 12:54:21.181219 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 12:54:21.181437
1975 12:54:21.181576
1976 12:54:21.181705
1977 12:54:21.184246 Starting depthcharge on Helios...
1978 12:54:21.184363
1979 12:54:21.184731 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 12:54:21.184846 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 12:54:21.184942 Setting prompt string to ['hatch:']
1982 12:54:21.185035 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 12:54:21.193808 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 12:54:21.193969
1985 12:54:21.201048 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 12:54:21.201202
1987 12:54:21.206973 board_setup: Info: eMMC controller not present; skipping
1988 12:54:21.207171
1989 12:54:21.210415 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 12:54:21.210575
1991 12:54:21.216969 board_setup: Info: SDHCI controller not present; skipping
1992 12:54:21.217156
1993 12:54:21.223772 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 12:54:21.223968
1995 12:54:21.224076 Wipe memory regions:
1996 12:54:21.224190
1997 12:54:21.227177 [0x00000000001000, 0x000000000a0000)
1998 12:54:21.227319
1999 12:54:21.230293 [0x00000000100000, 0x00000030000000)
2000 12:54:21.297006
2001 12:54:21.300283 [0x00000030657430, 0x00000099a2c000)
2002 12:54:21.446857
2003 12:54:21.450211 [0x00000100000000, 0x0000045e800000)
2004 12:54:22.906471
2005 12:54:22.906658 R8152: Initializing
2006 12:54:22.906769
2007 12:54:22.909915 Version 9 (ocp_data = 6010)
2008 12:54:22.914305
2009 12:54:22.914447 R8152: Done initializing
2010 12:54:22.914531
2011 12:54:22.917095 Adding net device
2012 12:54:23.399717
2013 12:54:23.399921 R8152: Initializing
2014 12:54:23.400052
2015 12:54:23.403520 Version 6 (ocp_data = 5c30)
2016 12:54:23.403650
2017 12:54:23.406448 R8152: Done initializing
2018 12:54:23.406589
2019 12:54:23.409737 net_add_device: Attemp to include the same device
2020 12:54:23.413042
2021 12:54:23.420467 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 12:54:23.420649
2023 12:54:23.420768
2024 12:54:23.420867
2025 12:54:23.421211 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 12:54:23.522034 hatch: tftpboot 192.168.201.1 9879144/tftp-deploy-gbduol20/kernel/bzImage 9879144/tftp-deploy-gbduol20/kernel/cmdline 9879144/tftp-deploy-gbduol20/ramdisk/ramdisk.cpio.gz
2028 12:54:23.522246 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 12:54:23.522386 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 12:54:23.527013 tftpboot 192.168.201.1 9879144/tftp-deploy-gbduol20/kernel/bzImaoy-gbduol20/kernel/cmdline 9879144/tftp-deploy-gbduol20/ramdisk/ramdisk.cpio.gz
2031 12:54:23.527203
2032 12:54:23.527314 Waiting for link
2033 12:54:23.727488
2034 12:54:23.727638 done.
2035 12:54:23.727725
2036 12:54:23.727803 MAC: 00:24:32:50:1a:59
2037 12:54:23.727879
2038 12:54:23.731438 Sending DHCP discover... done.
2039 12:54:23.731583
2040 12:54:23.734165 Waiting for reply... done.
2041 12:54:23.734293
2042 12:54:23.737637 Sending DHCP request... done.
2043 12:54:23.737790
2044 12:54:23.740767 Waiting for reply... done.
2045 12:54:23.740898
2046 12:54:23.744244 My ip is 192.168.201.14
2047 12:54:23.744415
2048 12:54:23.747328 The DHCP server ip is 192.168.201.1
2049 12:54:23.747500
2050 12:54:23.750620 TFTP server IP predefined by user: 192.168.201.1
2051 12:54:23.750790
2052 12:54:23.757382 Bootfile predefined by user: 9879144/tftp-deploy-gbduol20/kernel/bzImage
2053 12:54:23.757614
2054 12:54:23.760678 Sending tftp read request... done.
2055 12:54:23.760851
2056 12:54:23.767398 Waiting for the transfer...
2057 12:54:23.767574
2058 12:54:24.288172 00000000 ################################################################
2059 12:54:24.288373
2060 12:54:24.816599 00080000 ################################################################
2061 12:54:24.816768
2062 12:54:25.341884 00100000 ################################################################
2063 12:54:25.342030
2064 12:54:25.858971 00180000 ################################################################
2065 12:54:25.859189
2066 12:54:26.373503 00200000 ################################################################
2067 12:54:26.373696
2068 12:54:26.891778 00280000 ################################################################
2069 12:54:26.891936
2070 12:54:27.413470 00300000 ################################################################
2071 12:54:27.413666
2072 12:54:27.935671 00380000 ################################################################
2073 12:54:27.935864
2074 12:54:28.460251 00400000 ################################################################
2075 12:54:28.460437
2076 12:54:28.983996 00480000 ################################################################
2077 12:54:28.984162
2078 12:54:29.501748 00500000 ################################################################
2079 12:54:29.501976
2080 12:54:30.014698 00580000 ################################################################
2081 12:54:30.014879
2082 12:54:30.525851 00600000 ################################################################
2083 12:54:30.526058
2084 12:54:31.036070 00680000 ################################################################
2085 12:54:31.036253
2086 12:54:31.564912 00700000 ################################################################
2087 12:54:31.565078
2088 12:54:32.091817 00780000 ################################################################
2089 12:54:32.091993
2090 12:54:32.609621 00800000 ################################################################
2091 12:54:32.609806
2092 12:54:33.129040 00880000 ################################################################
2093 12:54:33.129238
2094 12:54:33.639295 00900000 ################################################################
2095 12:54:33.639464
2096 12:54:34.151393 00980000 ################################################################
2097 12:54:34.151598
2098 12:54:34.510654 00a00000 ############################################## done.
2099 12:54:34.510843
2100 12:54:34.514096 The bootfile was 10854400 bytes long.
2101 12:54:34.514238
2102 12:54:34.517301 Sending tftp read request... done.
2103 12:54:34.517446
2104 12:54:34.520688 Waiting for the transfer...
2105 12:54:34.520818
2106 12:54:35.034284 00000000 ################################################################
2107 12:54:35.034453
2108 12:54:35.544682 00080000 ################################################################
2109 12:54:35.544860
2110 12:54:36.055674 00100000 ################################################################
2111 12:54:36.055827
2112 12:54:36.567337 00180000 ################################################################
2113 12:54:36.567504
2114 12:54:37.077138 00200000 ################################################################
2115 12:54:37.077303
2116 12:54:37.588130 00280000 ################################################################
2117 12:54:37.588284
2118 12:54:38.101188 00300000 ################################################################
2119 12:54:38.101377
2120 12:54:38.613418 00380000 ################################################################
2121 12:54:38.613605
2122 12:54:39.123163 00400000 ################################################################
2123 12:54:39.123346
2124 12:54:39.632701 00480000 ################################################################
2125 12:54:39.632855
2126 12:54:40.142513 00500000 ################################################################
2127 12:54:40.142695
2128 12:54:40.653149 00580000 ################################################################
2129 12:54:40.653315
2130 12:54:41.165932 00600000 ################################################################
2131 12:54:41.166079
2132 12:54:41.681802 00680000 ################################################################
2133 12:54:41.681992
2134 12:54:42.193370 00700000 ################################################################
2135 12:54:42.193554
2136 12:54:42.715446 00780000 ################################################################
2137 12:54:42.715629
2138 12:54:43.245793 00800000 ################################################################
2139 12:54:43.245964
2140 12:54:43.569595 00880000 ###################################### done.
2141 12:54:43.569773
2142 12:54:43.573511 Sending tftp read request... done.
2143 12:54:43.573639
2144 12:54:43.576916 Waiting for the transfer...
2145 12:54:43.577013
2146 12:54:43.580254 00000000 # done.
2147 12:54:43.580350
2148 12:54:43.586738 Command line loaded dynamically from TFTP file: 9879144/tftp-deploy-gbduol20/kernel/cmdline
2149 12:54:43.586833
2150 12:54:43.606193 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2151 12:54:43.606302
2152 12:54:43.609582 ec_init(0): CrosEC protocol v3 supported (256, 256)
2153 12:54:43.615876
2154 12:54:43.619386 Shutting down all USB controllers.
2155 12:54:43.619480
2156 12:54:43.619555 Removing current net device
2157 12:54:43.622794
2158 12:54:43.622887 Finalizing coreboot
2159 12:54:43.622963
2160 12:54:43.629082 Exiting depthcharge with code 4 at timestamp: 29795691
2161 12:54:43.629178
2162 12:54:43.629252
2163 12:54:43.629323 Starting kernel ...
2164 12:54:43.629391
2165 12:54:43.629784 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2166 12:54:43.629892 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2167 12:54:43.629976 Setting prompt string to ['Linux version [0-9]']
2168 12:54:43.630061 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2169 12:54:43.630144 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2170 12:54:43.632434
2172 12:59:03.630172 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2174 12:59:03.630409 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2176 12:59:03.630587 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2179 12:59:03.630868 end: 2 depthcharge-action (duration 00:05:00) [common]
2181 12:59:03.631104 Cleaning after the job
2182 12:59:03.631202 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879144/tftp-deploy-gbduol20/ramdisk
2183 12:59:03.632083 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879144/tftp-deploy-gbduol20/kernel
2184 12:59:03.633073 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879144/tftp-deploy-gbduol20/modules
2185 12:59:03.633527 start: 5.1 power-off (timeout 00:00:30) [common]
2186 12:59:03.633728 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2187 12:59:03.712091 >> Command sent successfully.
2188 12:59:03.714781 Returned 0 in 0 seconds
2189 12:59:03.815586 end: 5.1 power-off (duration 00:00:00) [common]
2191 12:59:03.815982 start: 5.2 read-feedback (timeout 00:10:00) [common]
2192 12:59:03.816272 Listened to connection for namespace 'common' for up to 1s
2194 12:59:03.816727 Listened to connection for namespace 'common' for up to 1s
2195 12:59:04.820893 Finalising connection for namespace 'common'
2196 12:59:04.821087 Disconnecting from shell: Finalise
2197 12:59:04.821182
2198 12:59:04.921712 end: 5.2 read-feedback (duration 00:00:01) [common]
2199 12:59:04.921890 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9879144
2200 12:59:04.930774 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9879144
2201 12:59:04.930951 JobError: Your job cannot terminate cleanly.