Boot log: asus-C436FA-Flip-hatch

    1 12:54:35.676455  lava-dispatcher, installed at version: 2023.01
    2 12:54:35.676651  start: 0 validate
    3 12:54:35.676777  Start time: 2023-04-05 12:54:35.676770+00:00 (UTC)
    4 12:54:35.676894  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:54:35.677017  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230331.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:54:35.971385  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:54:35.972108  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:54:36.271094  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:54:36.271792  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230331.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:54:41.004352  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:54:41.004593  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:54:41.307364  validate duration: 5.63
   14 12:54:41.307724  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:54:41.307853  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:54:41.307951  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:54:41.308048  Not decompressing ramdisk as can be used compressed.
   18 12:54:41.308143  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230331.0/amd64/initrd.cpio.gz
   19 12:54:41.308210  saving as /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/ramdisk/initrd.cpio.gz
   20 12:54:41.308271  total size: 5432106 (5MB)
   21 12:54:42.039037  progress   0% (0MB)
   22 12:54:42.040568  progress   5% (0MB)
   23 12:54:42.041920  progress  10% (0MB)
   24 12:54:42.043218  progress  15% (0MB)
   25 12:54:42.044664  progress  20% (1MB)
   26 12:54:42.046007  progress  25% (1MB)
   27 12:54:42.047293  progress  30% (1MB)
   28 12:54:42.048719  progress  35% (1MB)
   29 12:54:42.050034  progress  40% (2MB)
   30 12:54:42.051311  progress  45% (2MB)
   31 12:54:42.052581  progress  50% (2MB)
   32 12:54:42.054046  progress  55% (2MB)
   33 12:54:42.055321  progress  60% (3MB)
   34 12:54:42.056591  progress  65% (3MB)
   35 12:54:42.058050  progress  70% (3MB)
   36 12:54:42.059322  progress  75% (3MB)
   37 12:54:42.060591  progress  80% (4MB)
   38 12:54:42.061868  progress  85% (4MB)
   39 12:54:42.063284  progress  90% (4MB)
   40 12:54:42.064552  progress  95% (4MB)
   41 12:54:42.065887  progress 100% (5MB)
   42 12:54:42.066085  5MB downloaded in 0.76s (6.84MB/s)
   43 12:54:42.066229  end: 1.1.1 http-download (duration 00:00:01) [common]
   45 12:54:42.066465  end: 1.1 download-retry (duration 00:00:01) [common]
   46 12:54:42.066551  start: 1.2 download-retry (timeout 00:09:59) [common]
   47 12:54:42.066637  start: 1.2.1 http-download (timeout 00:09:59) [common]
   48 12:54:42.066740  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 12:54:42.066808  saving as /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/kernel/bzImage
   50 12:54:42.066868  total size: 10854400 (10MB)
   51 12:54:42.066928  No compression specified
   52 12:54:42.068029  progress   0% (0MB)
   53 12:54:42.070634  progress   5% (0MB)
   54 12:54:42.073302  progress  10% (1MB)
   55 12:54:42.075846  progress  15% (1MB)
   56 12:54:42.078504  progress  20% (2MB)
   57 12:54:42.081003  progress  25% (2MB)
   58 12:54:42.083698  progress  30% (3MB)
   59 12:54:42.086279  progress  35% (3MB)
   60 12:54:42.088957  progress  40% (4MB)
   61 12:54:42.091644  progress  45% (4MB)
   62 12:54:42.094185  progress  50% (5MB)
   63 12:54:42.096835  progress  55% (5MB)
   64 12:54:42.099346  progress  60% (6MB)
   65 12:54:42.102033  progress  65% (6MB)
   66 12:54:42.104499  progress  70% (7MB)
   67 12:54:42.107286  progress  75% (7MB)
   68 12:54:42.109980  progress  80% (8MB)
   69 12:54:42.112654  progress  85% (8MB)
   70 12:54:42.115467  progress  90% (9MB)
   71 12:54:42.118075  progress  95% (9MB)
   72 12:54:42.120712  progress 100% (10MB)
   73 12:54:42.120842  10MB downloaded in 0.05s (191.81MB/s)
   74 12:54:42.120983  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:54:42.121238  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:54:42.121356  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 12:54:42.121443  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 12:54:42.121573  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230331.0/amd64/full.rootfs.tar.xz
   80 12:54:42.121640  saving as /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/nfsrootfs/full.rootfs.tar
   81 12:54:42.121732  total size: 133357532 (127MB)
   82 12:54:42.121793  Using unxz to decompress xz
   83 12:54:42.125465  progress   0% (0MB)
   84 12:54:42.459439  progress   5% (6MB)
   85 12:54:42.816511  progress  10% (12MB)
   86 12:54:43.103028  progress  15% (19MB)
   87 12:54:43.285462  progress  20% (25MB)
   88 12:54:43.540611  progress  25% (31MB)
   89 12:54:43.891128  progress  30% (38MB)
   90 12:54:44.235554  progress  35% (44MB)
   91 12:54:44.615553  progress  40% (50MB)
   92 12:54:44.988899  progress  45% (57MB)
   93 12:54:45.333440  progress  50% (63MB)
   94 12:54:45.700123  progress  55% (69MB)
   95 12:54:46.049413  progress  60% (76MB)
   96 12:54:46.402852  progress  65% (82MB)
   97 12:54:46.756848  progress  70% (89MB)
   98 12:54:47.113546  progress  75% (95MB)
   99 12:54:47.539914  progress  80% (101MB)
  100 12:54:47.969287  progress  85% (108MB)
  101 12:54:48.235300  progress  90% (114MB)
  102 12:54:48.566522  progress  95% (120MB)
  103 12:54:48.942475  progress 100% (127MB)
  104 12:54:48.948339  127MB downloaded in 6.83s (18.63MB/s)
  105 12:54:48.948627  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 12:54:48.948892  end: 1.3 download-retry (duration 00:00:07) [common]
  108 12:54:48.948983  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 12:54:48.949071  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 12:54:48.949219  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 12:54:48.949290  saving as /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/modules/modules.tar
  112 12:54:48.949352  total size: 484468 (0MB)
  113 12:54:48.949416  Using unxz to decompress xz
  114 12:54:48.952852  progress   6% (0MB)
  115 12:54:48.953321  progress  13% (0MB)
  116 12:54:48.953625  progress  20% (0MB)
  117 12:54:48.954997  progress  27% (0MB)
  118 12:54:48.957165  progress  33% (0MB)
  119 12:54:48.959582  progress  40% (0MB)
  120 12:54:48.961851  progress  47% (0MB)
  121 12:54:48.963855  progress  54% (0MB)
  122 12:54:48.965535  progress  60% (0MB)
  123 12:54:48.967438  progress  67% (0MB)
  124 12:54:48.969391  progress  74% (0MB)
  125 12:54:48.971388  progress  81% (0MB)
  126 12:54:48.973221  progress  87% (0MB)
  127 12:54:48.975141  progress  94% (0MB)
  128 12:54:48.977051  progress 100% (0MB)
  129 12:54:48.982846  0MB downloaded in 0.03s (13.80MB/s)
  130 12:54:48.983104  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 12:54:48.983363  end: 1.4 download-retry (duration 00:00:00) [common]
  133 12:54:48.983459  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  134 12:54:48.983557  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  135 12:54:50.146400  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9879087/extract-nfsrootfs-3c0xcl9t
  136 12:54:50.146603  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  137 12:54:50.146705  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  138 12:54:50.146841  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k
  139 12:54:50.146943  makedir: /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin
  140 12:54:50.147033  makedir: /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/tests
  141 12:54:50.147115  makedir: /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/results
  142 12:54:50.147214  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-add-keys
  143 12:54:50.147342  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-add-sources
  144 12:54:50.147463  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-background-process-start
  145 12:54:50.147586  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-background-process-stop
  146 12:54:50.147704  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-common-functions
  147 12:54:50.147822  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-echo-ipv4
  148 12:54:50.147943  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-install-packages
  149 12:54:50.148059  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-installed-packages
  150 12:54:50.148174  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-os-build
  151 12:54:50.148291  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-probe-channel
  152 12:54:50.148407  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-probe-ip
  153 12:54:50.148525  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-target-ip
  154 12:54:50.148640  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-target-mac
  155 12:54:50.148757  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-target-storage
  156 12:54:50.148876  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-test-case
  157 12:54:50.148993  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-test-event
  158 12:54:50.149109  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-test-feedback
  159 12:54:50.149224  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-test-raise
  160 12:54:50.149338  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-test-reference
  161 12:54:50.149455  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-test-runner
  162 12:54:50.149613  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-test-set
  163 12:54:50.149725  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-test-shell
  164 12:54:50.149836  Updating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-install-packages (oe)
  165 12:54:50.149950  Updating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/bin/lava-installed-packages (oe)
  166 12:54:50.150046  Creating /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/environment
  167 12:54:50.150134  LAVA metadata
  168 12:54:50.150203  - LAVA_JOB_ID=9879087
  169 12:54:50.150268  - LAVA_DISPATCHER_IP=192.168.201.1
  170 12:54:50.150362  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  171 12:54:50.150428  skipped lava-vland-overlay
  172 12:54:50.150503  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 12:54:50.150582  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  174 12:54:50.150644  skipped lava-multinode-overlay
  175 12:54:50.150718  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 12:54:50.150795  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  177 12:54:50.150869  Loading test definitions
  178 12:54:50.150957  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
  179 12:54:50.151028  Using /lava-9879087 at stage 0
  180 12:54:50.151273  uuid=9879087_1.5.2.3.1 testdef=None
  181 12:54:50.151361  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  182 12:54:50.151446  start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
  183 12:54:50.151905  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  185 12:54:50.152125  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
  186 12:54:50.152668  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  188 12:54:50.152900  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
  189 12:54:50.153421  runner path: /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/0/tests/0_dmesg test_uuid 9879087_1.5.2.3.1
  190 12:54:50.153601  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  192 12:54:50.153825  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
  193 12:54:50.153897  Using /lava-9879087 at stage 1
  194 12:54:50.154133  uuid=9879087_1.5.2.3.5 testdef=None
  195 12:54:50.154220  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  196 12:54:50.154303  start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
  197 12:54:50.154725  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  199 12:54:50.154940  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
  200 12:54:50.155487  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  202 12:54:50.155715  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
  203 12:54:50.156245  runner path: /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/1/tests/1_bootrr test_uuid 9879087_1.5.2.3.5
  204 12:54:50.156380  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  206 12:54:50.156585  Creating lava-test-runner.conf files
  207 12:54:50.156648  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/0 for stage 0
  208 12:54:50.156731  - 0_dmesg
  209 12:54:50.156805  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879087/lava-overlay-cnf42s1k/lava-9879087/1 for stage 1
  210 12:54:50.156886  - 1_bootrr
  211 12:54:50.156974  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  212 12:54:50.157057  start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
  213 12:54:50.164150  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  214 12:54:50.164251  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
  215 12:54:50.164337  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 12:54:50.164421  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  217 12:54:50.164506  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
  218 12:54:50.275567  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 12:54:50.275943  start: 1.5.4 extract-modules (timeout 00:09:51) [common]
  220 12:54:50.276053  extracting modules file /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879087/extract-nfsrootfs-3c0xcl9t
  221 12:54:50.286646  extracting modules file /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879087/extract-overlay-ramdisk-78gxcwna/ramdisk
  222 12:54:50.296727  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 12:54:50.296847  start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
  224 12:54:50.296940  [common] Applying overlay to NFS
  225 12:54:50.297014  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9879087/compress-overlay-w3ieohfz/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9879087/extract-nfsrootfs-3c0xcl9t
  226 12:54:50.302453  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 12:54:50.302561  start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
  228 12:54:50.302654  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 12:54:50.302745  start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
  230 12:54:50.302823  Building ramdisk /var/lib/lava/dispatcher/tmp/9879087/extract-overlay-ramdisk-78gxcwna/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9879087/extract-overlay-ramdisk-78gxcwna/ramdisk
  231 12:54:50.355247  >> 30347 blocks

  232 12:54:50.963511  rename /var/lib/lava/dispatcher/tmp/9879087/extract-overlay-ramdisk-78gxcwna/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/ramdisk/ramdisk.cpio.gz
  233 12:54:50.963921  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  234 12:54:50.964044  start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
  235 12:54:50.964148  start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
  236 12:54:50.964243  No mkimage arch provided, not using FIT.
  237 12:54:50.964334  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 12:54:50.964423  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 12:54:50.964534  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  240 12:54:50.964630  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
  241 12:54:50.964714  No LXC device requested
  242 12:54:50.964795  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 12:54:50.964921  start: 1.7 deploy-device-env (timeout 00:09:50) [common]
  244 12:54:50.965005  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 12:54:50.965078  Checking files for TFTP limit of 4294967296 bytes.
  246 12:54:50.965503  end: 1 tftp-deploy (duration 00:00:10) [common]
  247 12:54:50.965632  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 12:54:50.965728  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 12:54:50.965851  substitutions:
  250 12:54:50.965921  - {DTB}: None
  251 12:54:50.965985  - {INITRD}: 9879087/tftp-deploy-13ptv4r2/ramdisk/ramdisk.cpio.gz
  252 12:54:50.966046  - {KERNEL}: 9879087/tftp-deploy-13ptv4r2/kernel/bzImage
  253 12:54:50.966106  - {LAVA_MAC}: None
  254 12:54:50.966165  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9879087/extract-nfsrootfs-3c0xcl9t
  255 12:54:50.966224  - {NFS_SERVER_IP}: 192.168.201.1
  256 12:54:50.966281  - {PRESEED_CONFIG}: None
  257 12:54:50.966337  - {PRESEED_LOCAL}: None
  258 12:54:50.966393  - {RAMDISK}: 9879087/tftp-deploy-13ptv4r2/ramdisk/ramdisk.cpio.gz
  259 12:54:50.966449  - {ROOT_PART}: None
  260 12:54:50.966505  - {ROOT}: None
  261 12:54:50.966561  - {SERVER_IP}: 192.168.201.1
  262 12:54:50.966616  - {TEE}: None
  263 12:54:50.966671  Parsed boot commands:
  264 12:54:50.966726  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 12:54:50.966883  Parsed boot commands: tftpboot 192.168.201.1 9879087/tftp-deploy-13ptv4r2/kernel/bzImage 9879087/tftp-deploy-13ptv4r2/kernel/cmdline 9879087/tftp-deploy-13ptv4r2/ramdisk/ramdisk.cpio.gz
  266 12:54:50.966971  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 12:54:50.967053  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 12:54:50.967145  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 12:54:50.967233  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 12:54:50.967303  Not connected, no need to disconnect.
  271 12:54:50.967378  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 12:54:50.967458  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 12:54:50.967527  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  274 12:54:50.970677  Setting prompt string to ['lava-test: # ']
  275 12:54:50.971011  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 12:54:50.971154  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 12:54:50.971255  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 12:54:50.971347  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 12:54:50.971534  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  280 12:54:56.100285  >> Command sent successfully.

  281 12:54:56.102610  Returned 0 in 5 seconds
  282 12:54:56.203849  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  284 12:54:56.205326  end: 2.2.2 reset-device (duration 00:00:05) [common]
  285 12:54:56.206006  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  286 12:54:56.206478  Setting prompt string to 'Starting depthcharge on Helios...'
  287 12:54:56.206893  Changing prompt to 'Starting depthcharge on Helios...'
  288 12:54:56.207349  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  289 12:54:56.209015  [Enter `^Ec?' for help]

  290 12:54:56.824039  

  291 12:54:56.824207  

  292 12:54:56.833423  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  293 12:54:56.836850  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  294 12:54:56.843579  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  295 12:54:56.846954  CPU: AES supported, TXT NOT supported, VT supported

  296 12:54:56.853628  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  297 12:54:56.857474  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  298 12:54:56.863585  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  299 12:54:56.867141  VBOOT: Loading verstage.

  300 12:54:56.870175  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  301 12:54:56.877019  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  302 12:54:56.880193  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  303 12:54:56.883708  CBFS @ c08000 size 3f8000

  304 12:54:56.890237  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  305 12:54:56.893373  CBFS: Locating 'fallback/verstage'

  306 12:54:56.896583  CBFS: Found @ offset 10fb80 size 1072c

  307 12:54:56.900095  

  308 12:54:56.900200  

  309 12:54:56.910138  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  310 12:54:56.924277  Probing TPM: . done!

  311 12:54:56.927873  TPM ready after 0 ms

  312 12:54:56.931015  Connected to device vid:did:rid of 1ae0:0028:00

  313 12:54:56.941266  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  314 12:54:56.944591  Initialized TPM device CR50 revision 0

  315 12:54:56.989862  tlcl_send_startup: Startup return code is 0

  316 12:54:56.990316  TPM: setup succeeded

  317 12:54:57.002005  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  318 12:54:57.005807  Chrome EC: UHEPI supported

  319 12:54:57.009688  Phase 1

  320 12:54:57.012741  FMAP: area GBB found @ c05000 (12288 bytes)

  321 12:54:57.019519  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  322 12:54:57.022641  Phase 2

  323 12:54:57.022792  Phase 3

  324 12:54:57.026187  FMAP: area GBB found @ c05000 (12288 bytes)

  325 12:54:57.033094  VB2:vb2_report_dev_firmware() This is developer signed firmware

  326 12:54:57.039634  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  327 12:54:57.042835  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  328 12:54:57.049370  VB2:vb2_verify_keyblock() Checking keyblock signature...

  329 12:54:57.064867  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  330 12:54:57.068379  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  331 12:54:57.075044  VB2:vb2_verify_fw_preamble() Verifying preamble.

  332 12:54:57.079396  Phase 4

  333 12:54:57.083129  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  334 12:54:57.089461  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  335 12:54:57.269364  VB2:vb2_rsa_verify_digest() Digest check failed!

  336 12:54:57.275623  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  337 12:54:57.276100  Saving nvdata

  338 12:54:57.278895  Reboot requested (10020007)

  339 12:54:57.281819  board_reset() called!

  340 12:54:57.282244  full_reset() called!

  341 12:55:01.790952  

  342 12:55:01.791547  

  343 12:55:01.800799  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  344 12:55:01.804269  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  345 12:55:01.810911  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  346 12:55:01.814105  CPU: AES supported, TXT NOT supported, VT supported

  347 12:55:01.820884  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  348 12:55:01.824111  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  349 12:55:01.831096  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  350 12:55:01.833919  VBOOT: Loading verstage.

  351 12:55:01.837663  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  352 12:55:01.844095  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  353 12:55:01.847417  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  354 12:55:01.851004  CBFS @ c08000 size 3f8000

  355 12:55:01.857264  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  356 12:55:01.860536  CBFS: Locating 'fallback/verstage'

  357 12:55:01.863757  CBFS: Found @ offset 10fb80 size 1072c

  358 12:55:01.867502  

  359 12:55:01.867928  

  360 12:55:01.877497  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  361 12:55:01.891686  Probing TPM: . done!

  362 12:55:01.895393  TPM ready after 0 ms

  363 12:55:01.898446  Connected to device vid:did:rid of 1ae0:0028:00

  364 12:55:01.908384  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  365 12:55:01.911970  Initialized TPM device CR50 revision 0

  366 12:55:01.956298  tlcl_send_startup: Startup return code is 0

  367 12:55:01.956412  TPM: setup succeeded

  368 12:55:01.968983  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  369 12:55:01.973149  Chrome EC: UHEPI supported

  370 12:55:01.976600  Phase 1

  371 12:55:01.979585  FMAP: area GBB found @ c05000 (12288 bytes)

  372 12:55:01.986392  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  373 12:55:01.992727  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  374 12:55:01.996286  Recovery requested (1009000e)

  375 12:55:02.002043  Saving nvdata

  376 12:55:02.007875  tlcl_extend: response is 0

  377 12:55:02.016644  tlcl_extend: response is 0

  378 12:55:02.023691  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  379 12:55:02.026969  CBFS @ c08000 size 3f8000

  380 12:55:02.033610  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  381 12:55:02.037346  CBFS: Locating 'fallback/romstage'

  382 12:55:02.040551  CBFS: Found @ offset 80 size 145fc

  383 12:55:02.044044  Accumulated console time in verstage 98 ms

  384 12:55:02.044163  

  385 12:55:02.044230  

  386 12:55:02.057571  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  387 12:55:02.063498  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  388 12:55:02.067101  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  389 12:55:02.070045  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  390 12:55:02.077145  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  391 12:55:02.079958  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  392 12:55:02.083412  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  393 12:55:02.086699  TCO_STS:   0000 0000

  394 12:55:02.090306  GEN_PMCON: e0015238 00000200

  395 12:55:02.093579  GBLRST_CAUSE: 00000000 00000000

  396 12:55:02.093662  prev_sleep_state 5

  397 12:55:02.096672  Boot Count incremented to 59028

  398 12:55:02.103582  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  399 12:55:02.106764  CBFS @ c08000 size 3f8000

  400 12:55:02.113628  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  401 12:55:02.113709  CBFS: Locating 'fspm.bin'

  402 12:55:02.117370  CBFS: Found @ offset 5ffc0 size 71000

  403 12:55:02.121035  Chrome EC: UHEPI supported

  404 12:55:02.128307  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  405 12:55:02.133396  Probing TPM:  done!

  406 12:55:02.140127  Connected to device vid:did:rid of 1ae0:0028:00

  407 12:55:02.149709  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  408 12:55:02.155890  Initialized TPM device CR50 revision 0

  409 12:55:02.164803  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  410 12:55:02.171820  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  411 12:55:02.174951  MRC cache found, size 1948

  412 12:55:02.178457  bootmode is set to: 2

  413 12:55:02.181642  PRMRR disabled by config.

  414 12:55:02.181719  SPD INDEX = 1

  415 12:55:02.188336  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  416 12:55:02.191429  CBFS @ c08000 size 3f8000

  417 12:55:02.198402  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  418 12:55:02.198484  CBFS: Locating 'spd.bin'

  419 12:55:02.201189  CBFS: Found @ offset 5fb80 size 400

  420 12:55:02.205183  SPD: module type is LPDDR3

  421 12:55:02.208174  SPD: module part is 

  422 12:55:02.215016  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  423 12:55:02.218483  SPD: device width 4 bits, bus width 8 bits

  424 12:55:02.221364  SPD: module size is 4096 MB (per channel)

  425 12:55:02.224511  memory slot: 0 configuration done.

  426 12:55:02.228204  memory slot: 2 configuration done.

  427 12:55:02.279515  CBMEM:

  428 12:55:02.282769  IMD: root @ 99fff000 254 entries.

  429 12:55:02.286195  IMD: root @ 99ffec00 62 entries.

  430 12:55:02.289556  External stage cache:

  431 12:55:02.292690  IMD: root @ 9abff000 254 entries.

  432 12:55:02.296250  IMD: root @ 9abfec00 62 entries.

  433 12:55:02.299540  Chrome EC: clear events_b mask to 0x0000000020004000

  434 12:55:02.315484  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  435 12:55:02.328788  tlcl_write: response is 0

  436 12:55:02.338167  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  437 12:55:02.344417  MRC: TPM MRC hash updated successfully.

  438 12:55:02.344499  2 DIMMs found

  439 12:55:02.348004  SMM Memory Map

  440 12:55:02.350939  SMRAM       : 0x9a000000 0x1000000

  441 12:55:02.354323   Subregion 0: 0x9a000000 0xa00000

  442 12:55:02.357706   Subregion 1: 0x9aa00000 0x200000

  443 12:55:02.361176   Subregion 2: 0x9ac00000 0x400000

  444 12:55:02.364350  top_of_ram = 0x9a000000

  445 12:55:02.367568  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  446 12:55:02.374505  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  447 12:55:02.377632  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  448 12:55:02.384232  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  449 12:55:02.387705  CBFS @ c08000 size 3f8000

  450 12:55:02.391273  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  451 12:55:02.394178  CBFS: Locating 'fallback/postcar'

  452 12:55:02.401161  CBFS: Found @ offset 107000 size 4b44

  453 12:55:02.404040  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  454 12:55:02.416654  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  455 12:55:02.420320  Processing 180 relocs. Offset value of 0x97c0c000

  456 12:55:02.428945  Accumulated console time in romstage 286 ms

  457 12:55:02.429032  

  458 12:55:02.429101  

  459 12:55:02.438601  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  460 12:55:02.445338  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  461 12:55:02.448832  CBFS @ c08000 size 3f8000

  462 12:55:02.452026  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  463 12:55:02.455233  CBFS: Locating 'fallback/ramstage'

  464 12:55:02.462354  CBFS: Found @ offset 43380 size 1b9e8

  465 12:55:02.468586  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  466 12:55:02.500276  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  467 12:55:02.503564  Processing 3976 relocs. Offset value of 0x98db0000

  468 12:55:02.510443  Accumulated console time in postcar 52 ms

  469 12:55:02.510525  

  470 12:55:02.510593  

  471 12:55:02.520232  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  472 12:55:02.526843  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  473 12:55:02.529996  WARNING: RO_VPD is uninitialized or empty.

  474 12:55:02.533730  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  475 12:55:02.539957  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  476 12:55:02.540037  Normal boot.

  477 12:55:02.546601  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  478 12:55:02.549937  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  479 12:55:02.553552  CBFS @ c08000 size 3f8000

  480 12:55:02.560059  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  481 12:55:02.563616  CBFS: Locating 'cpu_microcode_blob.bin'

  482 12:55:02.566395  CBFS: Found @ offset 14700 size 2ec00

  483 12:55:02.569891  microcode: sig=0x806ec pf=0x4 revision=0xc9

  484 12:55:02.573440  Skip microcode update

  485 12:55:02.579743  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  486 12:55:02.579828  CBFS @ c08000 size 3f8000

  487 12:55:02.586593  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  488 12:55:02.589738  CBFS: Locating 'fsps.bin'

  489 12:55:02.592932  CBFS: Found @ offset d1fc0 size 35000

  490 12:55:02.618433  Detected 4 core, 8 thread CPU.

  491 12:55:02.621716  Setting up SMI for CPU

  492 12:55:02.625227  IED base = 0x9ac00000

  493 12:55:02.625311  IED size = 0x00400000

  494 12:55:02.628266  Will perform SMM setup.

  495 12:55:02.635440  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  496 12:55:02.641781  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  497 12:55:02.644988  Processing 16 relocs. Offset value of 0x00030000

  498 12:55:02.648523  Attempting to start 7 APs

  499 12:55:02.652036  Waiting for 10ms after sending INIT.

  500 12:55:02.668421  Waiting for 1st SIPI to complete...done.

  501 12:55:02.668506  AP: slot 3 apic_id 2.

  502 12:55:02.671973  AP: slot 1 apic_id 3.

  503 12:55:02.675194  AP: slot 6 apic_id 5.

  504 12:55:02.675278  AP: slot 7 apic_id 4.

  505 12:55:02.681401  Waiting for 2nd SIPI to complete...done.

  506 12:55:02.681508  AP: slot 2 apic_id 1.

  507 12:55:02.684959  AP: slot 5 apic_id 6.

  508 12:55:02.688267  AP: slot 4 apic_id 7.

  509 12:55:02.694726  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  510 12:55:02.701840  Processing 13 relocs. Offset value of 0x00038000

  511 12:55:02.704481  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  512 12:55:02.711438  Installing SMM handler to 0x9a000000

  513 12:55:02.718077  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  514 12:55:02.721543  Processing 658 relocs. Offset value of 0x9a010000

  515 12:55:02.730975  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  516 12:55:02.734730  Processing 13 relocs. Offset value of 0x9a008000

  517 12:55:02.741132  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  518 12:55:02.747560  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  519 12:55:02.754198  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  520 12:55:02.757829  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  521 12:55:02.764347  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  522 12:55:02.770780  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  523 12:55:02.774204  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  524 12:55:02.780852  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  525 12:55:02.784283  Clearing SMI status registers

  526 12:55:02.787704  SMI_STS: PM1 

  527 12:55:02.787783  PM1_STS: PWRBTN 

  528 12:55:02.791079  TCO_STS: SECOND_TO 

  529 12:55:02.794257  New SMBASE 0x9a000000

  530 12:55:02.797683  In relocation handler: CPU 0

  531 12:55:02.801242  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  532 12:55:02.804219  Writing SMRR. base = 0x9a000006, mask=0xff000800

  533 12:55:02.807921  Relocation complete.

  534 12:55:02.810750  New SMBASE 0x99fff800

  535 12:55:02.814301  In relocation handler: CPU 2

  536 12:55:02.817416  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  537 12:55:02.820978  Writing SMRR. base = 0x9a000006, mask=0xff000800

  538 12:55:02.824610  Relocation complete.

  539 12:55:02.827657  New SMBASE 0x99fff000

  540 12:55:02.827764  In relocation handler: CPU 4

  541 12:55:02.834164  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  542 12:55:02.837377  Writing SMRR. base = 0x9a000006, mask=0xff000800

  543 12:55:02.840812  Relocation complete.

  544 12:55:02.840895  New SMBASE 0x99ffec00

  545 12:55:02.844045  In relocation handler: CPU 5

  546 12:55:02.850562  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  547 12:55:02.854196  Writing SMRR. base = 0x9a000006, mask=0xff000800

  548 12:55:02.857688  Relocation complete.

  549 12:55:02.857764  New SMBASE 0x99ffe400

  550 12:55:02.860988  In relocation handler: CPU 7

  551 12:55:02.867068  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  552 12:55:02.870493  Writing SMRR. base = 0x9a000006, mask=0xff000800

  553 12:55:02.874405  Relocation complete.

  554 12:55:02.874485  New SMBASE 0x99ffe800

  555 12:55:02.877221  In relocation handler: CPU 6

  556 12:55:02.880991  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  557 12:55:02.887392  Writing SMRR. base = 0x9a000006, mask=0xff000800

  558 12:55:02.890588  Relocation complete.

  559 12:55:02.890669  New SMBASE 0x99fff400

  560 12:55:02.893882  In relocation handler: CPU 3

  561 12:55:02.897698  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  562 12:55:02.903829  Writing SMRR. base = 0x9a000006, mask=0xff000800

  563 12:55:02.906966  Relocation complete.

  564 12:55:02.907053  New SMBASE 0x99fffc00

  565 12:55:02.910474  In relocation handler: CPU 1

  566 12:55:02.913558  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  567 12:55:02.920300  Writing SMRR. base = 0x9a000006, mask=0xff000800

  568 12:55:02.920390  Relocation complete.

  569 12:55:02.923705  Initializing CPU #0

  570 12:55:02.927382  CPU: vendor Intel device 806ec

  571 12:55:02.930090  CPU: family 06, model 8e, stepping 0c

  572 12:55:02.933973  Clearing out pending MCEs

  573 12:55:02.937031  Setting up local APIC...

  574 12:55:02.937104   apic_id: 0x00 done.

  575 12:55:02.940009  Turbo is available but hidden

  576 12:55:02.943404  Turbo is available and visible

  577 12:55:02.947014  VMX status: enabled

  578 12:55:02.949938  IA32_FEATURE_CONTROL status: locked

  579 12:55:02.953410  Skip microcode update

  580 12:55:02.953514  CPU #0 initialized

  581 12:55:02.956538  Initializing CPU #2

  582 12:55:02.960232  Initializing CPU #5

  583 12:55:02.960307  Initializing CPU #4

  584 12:55:02.963265  CPU: vendor Intel device 806ec

  585 12:55:02.967000  CPU: family 06, model 8e, stepping 0c

  586 12:55:02.969984  Initializing CPU #6

  587 12:55:02.973303  Initializing CPU #7

  588 12:55:02.973375  CPU: vendor Intel device 806ec

  589 12:55:02.980620  CPU: family 06, model 8e, stepping 0c

  590 12:55:02.983794  CPU: vendor Intel device 806ec

  591 12:55:02.986651  CPU: family 06, model 8e, stepping 0c

  592 12:55:02.986728  Clearing out pending MCEs

  593 12:55:02.989953  CPU: vendor Intel device 806ec

  594 12:55:02.996453  CPU: family 06, model 8e, stepping 0c

  595 12:55:02.996531  Clearing out pending MCEs

  596 12:55:02.999789  Clearing out pending MCEs

  597 12:55:03.003250  Setting up local APIC...

  598 12:55:03.007144  CPU: vendor Intel device 806ec

  599 12:55:03.009686  CPU: family 06, model 8e, stepping 0c

  600 12:55:03.013200  Clearing out pending MCEs

  601 12:55:03.013277  Initializing CPU #1

  602 12:55:03.016503  Initializing CPU #3

  603 12:55:03.020086  CPU: vendor Intel device 806ec

  604 12:55:03.023203  CPU: family 06, model 8e, stepping 0c

  605 12:55:03.026488  CPU: vendor Intel device 806ec

  606 12:55:03.029881  CPU: family 06, model 8e, stepping 0c

  607 12:55:03.033023  Clearing out pending MCEs

  608 12:55:03.036357  Clearing out pending MCEs

  609 12:55:03.039666  Setting up local APIC...

  610 12:55:03.039739  Setting up local APIC...

  611 12:55:03.042812  Setting up local APIC...

  612 12:55:03.046194   apic_id: 0x01 done.

  613 12:55:03.046266   apic_id: 0x03 done.

  614 12:55:03.049619  Setting up local APIC...

  615 12:55:03.053223  VMX status: enabled

  616 12:55:03.053293  VMX status: enabled

  617 12:55:03.056354   apic_id: 0x02 done.

  618 12:55:03.059900  IA32_FEATURE_CONTROL status: locked

  619 12:55:03.063117  VMX status: enabled

  620 12:55:03.063190  Skip microcode update

  621 12:55:03.066219  IA32_FEATURE_CONTROL status: locked

  622 12:55:03.069597  CPU #1 initialized

  623 12:55:03.073184  Skip microcode update

  624 12:55:03.073265   apic_id: 0x07 done.

  625 12:55:03.076599   apic_id: 0x06 done.

  626 12:55:03.079611  VMX status: enabled

  627 12:55:03.079690  VMX status: enabled

  628 12:55:03.082777  IA32_FEATURE_CONTROL status: locked

  629 12:55:03.086129  IA32_FEATURE_CONTROL status: locked

  630 12:55:03.089397  Skip microcode update

  631 12:55:03.093023  Skip microcode update

  632 12:55:03.093106  CPU #4 initialized

  633 12:55:03.096461  CPU #5 initialized

  634 12:55:03.099803  IA32_FEATURE_CONTROL status: locked

  635 12:55:03.102933  Clearing out pending MCEs

  636 12:55:03.106102  Setting up local APIC...

  637 12:55:03.106190  Skip microcode update

  638 12:55:03.109241   apic_id: 0x05 done.

  639 12:55:03.113631  Setting up local APIC...

  640 12:55:03.113706  CPU #3 initialized

  641 12:55:03.115966   apic_id: 0x04 done.

  642 12:55:03.116042  VMX status: enabled

  643 12:55:03.119232  VMX status: enabled

  644 12:55:03.122471  IA32_FEATURE_CONTROL status: locked

  645 12:55:03.126283  IA32_FEATURE_CONTROL status: locked

  646 12:55:03.129601  Skip microcode update

  647 12:55:03.132499  Skip microcode update

  648 12:55:03.132583  CPU #6 initialized

  649 12:55:03.135691  CPU #7 initialized

  650 12:55:03.135767  CPU #2 initialized

  651 12:55:03.142608  bsp_do_flight_plan done after 459 msecs.

  652 12:55:03.145851  CPU: frequency set to 4200 MHz

  653 12:55:03.145930  Enabling SMIs.

  654 12:55:03.145999  Locking SMM.

  655 12:55:03.162208  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  656 12:55:03.165848  CBFS @ c08000 size 3f8000

  657 12:55:03.172311  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  658 12:55:03.172393  CBFS: Locating 'vbt.bin'

  659 12:55:03.175527  CBFS: Found @ offset 5f5c0 size 499

  660 12:55:03.182358  Found a VBT of 4608 bytes after decompression

  661 12:55:03.367040  Display FSP Version Info HOB

  662 12:55:03.370301  Reference Code - CPU = 9.0.1e.30

  663 12:55:03.373936  uCode Version = 0.0.0.ca

  664 12:55:03.376957  TXT ACM version = ff.ff.ff.ffff

  665 12:55:03.379992  Display FSP Version Info HOB

  666 12:55:03.383850  Reference Code - ME = 9.0.1e.30

  667 12:55:03.386865  MEBx version = 0.0.0.0

  668 12:55:03.390353  ME Firmware Version = Consumer SKU

  669 12:55:03.393254  Display FSP Version Info HOB

  670 12:55:03.396731  Reference Code - CML PCH = 9.0.1e.30

  671 12:55:03.399831  PCH-CRID Status = Disabled

  672 12:55:03.403695  PCH-CRID Original Value = ff.ff.ff.ffff

  673 12:55:03.406659  PCH-CRID New Value = ff.ff.ff.ffff

  674 12:55:03.410145  OPROM - RST - RAID = ff.ff.ff.ffff

  675 12:55:03.413546  ChipsetInit Base Version = ff.ff.ff.ffff

  676 12:55:03.416593  ChipsetInit Oem Version = ff.ff.ff.ffff

  677 12:55:03.419941  Display FSP Version Info HOB

  678 12:55:03.426594  Reference Code - SA - System Agent = 9.0.1e.30

  679 12:55:03.430138  Reference Code - MRC = 0.7.1.6c

  680 12:55:03.430269  SA - PCIe Version = 9.0.1e.30

  681 12:55:03.433178  SA-CRID Status = Disabled

  682 12:55:03.436543  SA-CRID Original Value = 0.0.0.c

  683 12:55:03.440219  SA-CRID New Value = 0.0.0.c

  684 12:55:03.443241  OPROM - VBIOS = ff.ff.ff.ffff

  685 12:55:03.443322  RTC Init

  686 12:55:03.450307  Set power on after power failure.

  687 12:55:03.450387  Disabling Deep S3

  688 12:55:03.453410  Disabling Deep S3

  689 12:55:03.453544  Disabling Deep S4

  690 12:55:03.457025  Disabling Deep S4

  691 12:55:03.457104  Disabling Deep S5

  692 12:55:03.460357  Disabling Deep S5

  693 12:55:03.466607  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1

  694 12:55:03.466698  Enumerating buses...

  695 12:55:03.473472  Show all devs... Before device enumeration.

  696 12:55:03.473557  Root Device: enabled 1

  697 12:55:03.476528  CPU_CLUSTER: 0: enabled 1

  698 12:55:03.480046  DOMAIN: 0000: enabled 1

  699 12:55:03.480131  APIC: 00: enabled 1

  700 12:55:03.483147  PCI: 00:00.0: enabled 1

  701 12:55:03.486752  PCI: 00:02.0: enabled 1

  702 12:55:03.490087  PCI: 00:04.0: enabled 0

  703 12:55:03.490178  PCI: 00:05.0: enabled 0

  704 12:55:03.493364  PCI: 00:12.0: enabled 1

  705 12:55:03.496750  PCI: 00:12.5: enabled 0

  706 12:55:03.499955  PCI: 00:12.6: enabled 0

  707 12:55:03.500044  PCI: 00:14.0: enabled 1

  708 12:55:03.503638  PCI: 00:14.1: enabled 0

  709 12:55:03.506643  PCI: 00:14.3: enabled 1

  710 12:55:03.509862  PCI: 00:14.5: enabled 0

  711 12:55:03.509957  PCI: 00:15.0: enabled 1

  712 12:55:03.513396  PCI: 00:15.1: enabled 1

  713 12:55:03.516371  PCI: 00:15.2: enabled 0

  714 12:55:03.516498  PCI: 00:15.3: enabled 0

  715 12:55:03.519887  PCI: 00:16.0: enabled 1

  716 12:55:03.523265  PCI: 00:16.1: enabled 0

  717 12:55:03.526408  PCI: 00:16.2: enabled 0

  718 12:55:03.526500  PCI: 00:16.3: enabled 0

  719 12:55:03.529440  PCI: 00:16.4: enabled 0

  720 12:55:03.532925  PCI: 00:16.5: enabled 0

  721 12:55:03.536474  PCI: 00:17.0: enabled 1

  722 12:55:03.536567  PCI: 00:19.0: enabled 1

  723 12:55:03.539464  PCI: 00:19.1: enabled 0

  724 12:55:03.542972  PCI: 00:19.2: enabled 0

  725 12:55:03.546047  PCI: 00:1a.0: enabled 0

  726 12:55:03.546124  PCI: 00:1c.0: enabled 0

  727 12:55:03.549558  PCI: 00:1c.1: enabled 0

  728 12:55:03.553103  PCI: 00:1c.2: enabled 0

  729 12:55:03.553188  PCI: 00:1c.3: enabled 0

  730 12:55:03.556189  PCI: 00:1c.4: enabled 0

  731 12:55:03.559683  PCI: 00:1c.5: enabled 0

  732 12:55:03.562903  PCI: 00:1c.6: enabled 0

  733 12:55:03.562983  PCI: 00:1c.7: enabled 0

  734 12:55:03.566331  PCI: 00:1d.0: enabled 1

  735 12:55:03.569402  PCI: 00:1d.1: enabled 0

  736 12:55:03.572750  PCI: 00:1d.2: enabled 0

  737 12:55:03.572828  PCI: 00:1d.3: enabled 0

  738 12:55:03.575962  PCI: 00:1d.4: enabled 0

  739 12:55:03.579221  PCI: 00:1d.5: enabled 1

  740 12:55:03.582682  PCI: 00:1e.0: enabled 1

  741 12:55:03.582769  PCI: 00:1e.1: enabled 0

  742 12:55:03.585731  PCI: 00:1e.2: enabled 1

  743 12:55:03.589666  PCI: 00:1e.3: enabled 1

  744 12:55:03.592690  PCI: 00:1f.0: enabled 1

  745 12:55:03.592791  PCI: 00:1f.1: enabled 1

  746 12:55:03.595807  PCI: 00:1f.2: enabled 1

  747 12:55:03.599333  PCI: 00:1f.3: enabled 1

  748 12:55:03.599433  PCI: 00:1f.4: enabled 1

  749 12:55:03.602495  PCI: 00:1f.5: enabled 1

  750 12:55:03.605977  PCI: 00:1f.6: enabled 0

  751 12:55:03.609157  USB0 port 0: enabled 1

  752 12:55:03.609283  I2C: 00:15: enabled 1

  753 12:55:03.612435  I2C: 00:5d: enabled 1

  754 12:55:03.616121  GENERIC: 0.0: enabled 1

  755 12:55:03.616223  I2C: 00:1a: enabled 1

  756 12:55:03.619433  I2C: 00:38: enabled 1

  757 12:55:03.622524  I2C: 00:39: enabled 1

  758 12:55:03.622608  I2C: 00:3a: enabled 1

  759 12:55:03.626345  I2C: 00:3b: enabled 1

  760 12:55:03.629169  PCI: 00:00.0: enabled 1

  761 12:55:03.629272  SPI: 00: enabled 1

  762 12:55:03.632243  SPI: 01: enabled 1

  763 12:55:03.635586  PNP: 0c09.0: enabled 1

  764 12:55:03.635672  USB2 port 0: enabled 1

  765 12:55:03.639358  USB2 port 1: enabled 1

  766 12:55:03.642592  USB2 port 2: enabled 0

  767 12:55:03.645612  USB2 port 3: enabled 0

  768 12:55:03.645695  USB2 port 5: enabled 0

  769 12:55:03.649478  USB2 port 6: enabled 1

  770 12:55:03.652600  USB2 port 9: enabled 1

  771 12:55:03.652683  USB3 port 0: enabled 1

  772 12:55:03.655591  USB3 port 1: enabled 1

  773 12:55:03.658868  USB3 port 2: enabled 1

  774 12:55:03.658951  USB3 port 3: enabled 1

  775 12:55:03.662264  USB3 port 4: enabled 0

  776 12:55:03.666050  APIC: 03: enabled 1

  777 12:55:03.666133  APIC: 01: enabled 1

  778 12:55:03.669070  APIC: 02: enabled 1

  779 12:55:03.672354  APIC: 07: enabled 1

  780 12:55:03.672437  APIC: 06: enabled 1

  781 12:55:03.675896  APIC: 05: enabled 1

  782 12:55:03.675979  APIC: 04: enabled 1

  783 12:55:03.678671  Compare with tree...

  784 12:55:03.682082  Root Device: enabled 1

  785 12:55:03.685462   CPU_CLUSTER: 0: enabled 1

  786 12:55:03.685567    APIC: 00: enabled 1

  787 12:55:03.689033    APIC: 03: enabled 1

  788 12:55:03.692418    APIC: 01: enabled 1

  789 12:55:03.692492    APIC: 02: enabled 1

  790 12:55:03.695404    APIC: 07: enabled 1

  791 12:55:03.699064    APIC: 06: enabled 1

  792 12:55:03.699147    APIC: 05: enabled 1

  793 12:55:03.702115    APIC: 04: enabled 1

  794 12:55:03.705298   DOMAIN: 0000: enabled 1

  795 12:55:03.709019    PCI: 00:00.0: enabled 1

  796 12:55:03.709102    PCI: 00:02.0: enabled 1

  797 12:55:03.712518    PCI: 00:04.0: enabled 0

  798 12:55:03.715698    PCI: 00:05.0: enabled 0

  799 12:55:03.718796    PCI: 00:12.0: enabled 1

  800 12:55:03.721925    PCI: 00:12.5: enabled 0

  801 12:55:03.722008    PCI: 00:12.6: enabled 0

  802 12:55:03.725227    PCI: 00:14.0: enabled 1

  803 12:55:03.728510     USB0 port 0: enabled 1

  804 12:55:03.732376      USB2 port 0: enabled 1

  805 12:55:03.735285      USB2 port 1: enabled 1

  806 12:55:03.735368      USB2 port 2: enabled 0

  807 12:55:03.738976      USB2 port 3: enabled 0

  808 12:55:03.742125      USB2 port 5: enabled 0

  809 12:55:03.745603      USB2 port 6: enabled 1

  810 12:55:03.748613      USB2 port 9: enabled 1

  811 12:55:03.748696      USB3 port 0: enabled 1

  812 12:55:03.751986      USB3 port 1: enabled 1

  813 12:55:03.755498      USB3 port 2: enabled 1

  814 12:55:03.758611      USB3 port 3: enabled 1

  815 12:55:03.761950      USB3 port 4: enabled 0

  816 12:55:03.765558    PCI: 00:14.1: enabled 0

  817 12:55:03.765642    PCI: 00:14.3: enabled 1

  818 12:55:03.768571    PCI: 00:14.5: enabled 0

  819 12:55:03.771903    PCI: 00:15.0: enabled 1

  820 12:55:03.775114     I2C: 00:15: enabled 1

  821 12:55:03.775225    PCI: 00:15.1: enabled 1

  822 12:55:03.778790     I2C: 00:5d: enabled 1

  823 12:55:03.781874     GENERIC: 0.0: enabled 1

  824 12:55:03.785172    PCI: 00:15.2: enabled 0

  825 12:55:03.788633    PCI: 00:15.3: enabled 0

  826 12:55:03.788719    PCI: 00:16.0: enabled 1

  827 12:55:03.792176    PCI: 00:16.1: enabled 0

  828 12:55:03.795939    PCI: 00:16.2: enabled 0

  829 12:55:03.798683    PCI: 00:16.3: enabled 0

  830 12:55:03.801741    PCI: 00:16.4: enabled 0

  831 12:55:03.801824    PCI: 00:16.5: enabled 0

  832 12:55:03.805285    PCI: 00:17.0: enabled 1

  833 12:55:03.808514    PCI: 00:19.0: enabled 1

  834 12:55:03.812033     I2C: 00:1a: enabled 1

  835 12:55:03.812116     I2C: 00:38: enabled 1

  836 12:55:03.815322     I2C: 00:39: enabled 1

  837 12:55:03.818349     I2C: 00:3a: enabled 1

  838 12:55:03.821611     I2C: 00:3b: enabled 1

  839 12:55:03.824793    PCI: 00:19.1: enabled 0

  840 12:55:03.824876    PCI: 00:19.2: enabled 0

  841 12:55:03.828118    PCI: 00:1a.0: enabled 0

  842 12:55:03.831523    PCI: 00:1c.0: enabled 0

  843 12:55:03.834852    PCI: 00:1c.1: enabled 0

  844 12:55:03.838117    PCI: 00:1c.2: enabled 0

  845 12:55:03.838217    PCI: 00:1c.3: enabled 0

  846 12:55:03.841361    PCI: 00:1c.4: enabled 0

  847 12:55:03.845218    PCI: 00:1c.5: enabled 0

  848 12:55:03.848357    PCI: 00:1c.6: enabled 0

  849 12:55:03.851598    PCI: 00:1c.7: enabled 0

  850 12:55:03.851681    PCI: 00:1d.0: enabled 1

  851 12:55:03.854572    PCI: 00:1d.1: enabled 0

  852 12:55:03.858217    PCI: 00:1d.2: enabled 0

  853 12:55:03.861238    PCI: 00:1d.3: enabled 0

  854 12:55:03.861339    PCI: 00:1d.4: enabled 0

  855 12:55:03.864954    PCI: 00:1d.5: enabled 1

  856 12:55:03.868319     PCI: 00:00.0: enabled 1

  857 12:55:03.871236    PCI: 00:1e.0: enabled 1

  858 12:55:03.874501    PCI: 00:1e.1: enabled 0

  859 12:55:03.874600    PCI: 00:1e.2: enabled 1

  860 12:55:03.878001     SPI: 00: enabled 1

  861 12:55:03.881357    PCI: 00:1e.3: enabled 1

  862 12:55:03.884517     SPI: 01: enabled 1

  863 12:55:03.884618    PCI: 00:1f.0: enabled 1

  864 12:55:03.887942     PNP: 0c09.0: enabled 1

  865 12:55:03.891363    PCI: 00:1f.1: enabled 1

  866 12:55:03.894421    PCI: 00:1f.2: enabled 1

  867 12:55:03.897707    PCI: 00:1f.3: enabled 1

  868 12:55:03.897791    PCI: 00:1f.4: enabled 1

  869 12:55:03.901134    PCI: 00:1f.5: enabled 1

  870 12:55:03.904763    PCI: 00:1f.6: enabled 0

  871 12:55:03.907984  Root Device scanning...

  872 12:55:03.911276  scan_static_bus for Root Device

  873 12:55:03.911400  CPU_CLUSTER: 0 enabled

  874 12:55:03.914308  DOMAIN: 0000 enabled

  875 12:55:03.917613  DOMAIN: 0000 scanning...

  876 12:55:03.920912  PCI: pci_scan_bus for bus 00

  877 12:55:03.924352  PCI: 00:00.0 [8086/0000] ops

  878 12:55:03.927361  PCI: 00:00.0 [8086/9b61] enabled

  879 12:55:03.930794  PCI: 00:02.0 [8086/0000] bus ops

  880 12:55:03.934174  PCI: 00:02.0 [8086/9b41] enabled

  881 12:55:03.937552  PCI: 00:04.0 [8086/1903] disabled

  882 12:55:03.940874  PCI: 00:08.0 [8086/1911] enabled

  883 12:55:03.943909  PCI: 00:12.0 [8086/02f9] enabled

  884 12:55:03.947449  PCI: 00:14.0 [8086/0000] bus ops

  885 12:55:03.950670  PCI: 00:14.0 [8086/02ed] enabled

  886 12:55:03.953979  PCI: 00:14.2 [8086/02ef] enabled

  887 12:55:03.957334  PCI: 00:14.3 [8086/02f0] enabled

  888 12:55:03.961005  PCI: 00:15.0 [8086/0000] bus ops

  889 12:55:03.963906  PCI: 00:15.0 [8086/02e8] enabled

  890 12:55:03.967571  PCI: 00:15.1 [8086/0000] bus ops

  891 12:55:03.970522  PCI: 00:15.1 [8086/02e9] enabled

  892 12:55:03.974317  PCI: 00:16.0 [8086/0000] ops

  893 12:55:03.977118  PCI: 00:16.0 [8086/02e0] enabled

  894 12:55:03.980774  PCI: 00:17.0 [8086/0000] ops

  895 12:55:03.984085  PCI: 00:17.0 [8086/02d3] enabled

  896 12:55:03.987323  PCI: 00:19.0 [8086/0000] bus ops

  897 12:55:03.990570  PCI: 00:19.0 [8086/02c5] enabled

  898 12:55:03.993794  PCI: 00:1d.0 [8086/0000] bus ops

  899 12:55:03.997173  PCI: 00:1d.0 [8086/02b0] enabled

  900 12:55:04.000515  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  901 12:55:04.003724  PCI: 00:1e.0 [8086/0000] ops

  902 12:55:04.007033  PCI: 00:1e.0 [8086/02a8] enabled

  903 12:55:04.010225  PCI: 00:1e.2 [8086/0000] bus ops

  904 12:55:04.013796  PCI: 00:1e.2 [8086/02aa] enabled

  905 12:55:04.017225  PCI: 00:1e.3 [8086/0000] bus ops

  906 12:55:04.020265  PCI: 00:1e.3 [8086/02ab] enabled

  907 12:55:04.023913  PCI: 00:1f.0 [8086/0000] bus ops

  908 12:55:04.027145  PCI: 00:1f.0 [8086/0284] enabled

  909 12:55:04.033670  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  910 12:55:04.040534  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  911 12:55:04.043611  PCI: 00:1f.3 [8086/0000] bus ops

  912 12:55:04.047201  PCI: 00:1f.3 [8086/02c8] enabled

  913 12:55:04.050785  PCI: 00:1f.4 [8086/0000] bus ops

  914 12:55:04.053702  PCI: 00:1f.4 [8086/02a3] enabled

  915 12:55:04.056908  PCI: 00:1f.5 [8086/0000] bus ops

  916 12:55:04.060314  PCI: 00:1f.5 [8086/02a4] enabled

  917 12:55:04.063563  PCI: Leftover static devices:

  918 12:55:04.063647  PCI: 00:05.0

  919 12:55:04.063714  PCI: 00:12.5

  920 12:55:04.067308  PCI: 00:12.6

  921 12:55:04.067392  PCI: 00:14.1

  922 12:55:04.070276  PCI: 00:14.5

  923 12:55:04.070359  PCI: 00:15.2

  924 12:55:04.070426  PCI: 00:15.3

  925 12:55:04.073382  PCI: 00:16.1

  926 12:55:04.073470  PCI: 00:16.2

  927 12:55:04.076878  PCI: 00:16.3

  928 12:55:04.076961  PCI: 00:16.4

  929 12:55:04.080004  PCI: 00:16.5

  930 12:55:04.080087  PCI: 00:19.1

  931 12:55:04.080154  PCI: 00:19.2

  932 12:55:04.083206  PCI: 00:1a.0

  933 12:55:04.083289  PCI: 00:1c.0

  934 12:55:04.086864  PCI: 00:1c.1

  935 12:55:04.086947  PCI: 00:1c.2

  936 12:55:04.087013  PCI: 00:1c.3

  937 12:55:04.089909  PCI: 00:1c.4

  938 12:55:04.089992  PCI: 00:1c.5

  939 12:55:04.093739  PCI: 00:1c.6

  940 12:55:04.093822  PCI: 00:1c.7

  941 12:55:04.093889  PCI: 00:1d.1

  942 12:55:04.096798  PCI: 00:1d.2

  943 12:55:04.096881  PCI: 00:1d.3

  944 12:55:04.100101  PCI: 00:1d.4

  945 12:55:04.100223  PCI: 00:1d.5

  946 12:55:04.103492  PCI: 00:1e.1

  947 12:55:04.103575  PCI: 00:1f.1

  948 12:55:04.103642  PCI: 00:1f.2

  949 12:55:04.106486  PCI: 00:1f.6

  950 12:55:04.110093  PCI: Check your devicetree.cb.

  951 12:55:04.110177  PCI: 00:02.0 scanning...

  952 12:55:04.116696  scan_generic_bus for PCI: 00:02.0

  953 12:55:04.120206  scan_generic_bus for PCI: 00:02.0 done

  954 12:55:04.123382  scan_bus: scanning of bus PCI: 00:02.0 took 10195 usecs

  955 12:55:04.126885  PCI: 00:14.0 scanning...

  956 12:55:04.130379  scan_static_bus for PCI: 00:14.0

  957 12:55:04.133189  USB0 port 0 enabled

  958 12:55:04.136821  USB0 port 0 scanning...

  959 12:55:04.139843  scan_static_bus for USB0 port 0

  960 12:55:04.139927  USB2 port 0 enabled

  961 12:55:04.143683  USB2 port 1 enabled

  962 12:55:04.146615  USB2 port 2 disabled

  963 12:55:04.146698  USB2 port 3 disabled

  964 12:55:04.150006  USB2 port 5 disabled

  965 12:55:04.150094  USB2 port 6 enabled

  966 12:55:04.153406  USB2 port 9 enabled

  967 12:55:04.156620  USB3 port 0 enabled

  968 12:55:04.156703  USB3 port 1 enabled

  969 12:55:04.159787  USB3 port 2 enabled

  970 12:55:04.159870  USB3 port 3 enabled

  971 12:55:04.163270  USB3 port 4 disabled

  972 12:55:04.166506  USB2 port 0 scanning...

  973 12:55:04.169865  scan_static_bus for USB2 port 0

  974 12:55:04.173701  scan_static_bus for USB2 port 0 done

  975 12:55:04.179695  scan_bus: scanning of bus USB2 port 0 took 9709 usecs

  976 12:55:04.179779  USB2 port 1 scanning...

  977 12:55:04.183235  scan_static_bus for USB2 port 1

  978 12:55:04.189863  scan_static_bus for USB2 port 1 done

  979 12:55:04.193306  scan_bus: scanning of bus USB2 port 1 took 9708 usecs

  980 12:55:04.196531  USB2 port 6 scanning...

  981 12:55:04.199582  scan_static_bus for USB2 port 6

  982 12:55:04.203752  scan_static_bus for USB2 port 6 done

  983 12:55:04.209822  scan_bus: scanning of bus USB2 port 6 took 9706 usecs

  984 12:55:04.209906  USB2 port 9 scanning...

  985 12:55:04.213108  scan_static_bus for USB2 port 9

  986 12:55:04.219716  scan_static_bus for USB2 port 9 done

  987 12:55:04.222959  scan_bus: scanning of bus USB2 port 9 took 9706 usecs

  988 12:55:04.226521  USB3 port 0 scanning...

  989 12:55:04.230123  scan_static_bus for USB3 port 0

  990 12:55:04.233136  scan_static_bus for USB3 port 0 done

  991 12:55:04.239642  scan_bus: scanning of bus USB3 port 0 took 9705 usecs

  992 12:55:04.239726  USB3 port 1 scanning...

  993 12:55:04.242951  scan_static_bus for USB3 port 1

  994 12:55:04.249892  scan_static_bus for USB3 port 1 done

  995 12:55:04.253015  scan_bus: scanning of bus USB3 port 1 took 9695 usecs

  996 12:55:04.257049  USB3 port 2 scanning...

  997 12:55:04.259859  scan_static_bus for USB3 port 2

  998 12:55:04.263626  scan_static_bus for USB3 port 2 done

  999 12:55:04.270090  scan_bus: scanning of bus USB3 port 2 took 9697 usecs

 1000 12:55:04.270174  USB3 port 3 scanning...

 1001 12:55:04.273417  scan_static_bus for USB3 port 3

 1002 12:55:04.279592  scan_static_bus for USB3 port 3 done

 1003 12:55:04.283690  scan_bus: scanning of bus USB3 port 3 took 9704 usecs

 1004 12:55:04.286831  scan_static_bus for USB0 port 0 done

 1005 12:55:04.293286  scan_bus: scanning of bus USB0 port 0 took 155378 usecs

 1006 12:55:04.296869  scan_static_bus for PCI: 00:14.0 done

 1007 12:55:04.302772  scan_bus: scanning of bus PCI: 00:14.0 took 173006 usecs

 1008 12:55:04.306503  PCI: 00:15.0 scanning...

 1009 12:55:04.309375  scan_generic_bus for PCI: 00:15.0

 1010 12:55:04.312933  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1011 12:55:04.315967  scan_generic_bus for PCI: 00:15.0 done

 1012 12:55:04.322687  scan_bus: scanning of bus PCI: 00:15.0 took 14343 usecs

 1013 12:55:04.326049  PCI: 00:15.1 scanning...

 1014 12:55:04.329313  scan_generic_bus for PCI: 00:15.1

 1015 12:55:04.332843  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1016 12:55:04.335915  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1017 12:55:04.339512  scan_generic_bus for PCI: 00:15.1 done

 1018 12:55:04.346329  scan_bus: scanning of bus PCI: 00:15.1 took 18597 usecs

 1019 12:55:04.348970  PCI: 00:19.0 scanning...

 1020 12:55:04.352382  scan_generic_bus for PCI: 00:19.0

 1021 12:55:04.355912  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1022 12:55:04.359358  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1023 12:55:04.365697  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1024 12:55:04.368699  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1025 12:55:04.372235  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1026 12:55:04.375393  scan_generic_bus for PCI: 00:19.0 done

 1027 12:55:04.382091  scan_bus: scanning of bus PCI: 00:19.0 took 30697 usecs

 1028 12:55:04.385359  PCI: 00:1d.0 scanning...

 1029 12:55:04.388467  do_pci_scan_bridge for PCI: 00:1d.0

 1030 12:55:04.392159  PCI: pci_scan_bus for bus 01

 1031 12:55:04.395247  PCI: 01:00.0 [1c5c/1327] enabled

 1032 12:55:04.398454  Enabling Common Clock Configuration

 1033 12:55:04.402545  L1 Sub-State supported from root port 29

 1034 12:55:04.405183  L1 Sub-State Support = 0xf

 1035 12:55:04.408551  CommonModeRestoreTime = 0x28

 1036 12:55:04.412216  Power On Value = 0x16, Power On Scale = 0x0

 1037 12:55:04.415562  ASPM: Enabled L1

 1038 12:55:04.422314  scan_bus: scanning of bus PCI: 00:1d.0 took 32790 usecs

 1039 12:55:04.422397  PCI: 00:1e.2 scanning...

 1040 12:55:04.425154  scan_generic_bus for PCI: 00:1e.2

 1041 12:55:04.431836  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1042 12:55:04.435242  scan_generic_bus for PCI: 00:1e.2 done

 1043 12:55:04.438480  scan_bus: scanning of bus PCI: 00:1e.2 took 14014 usecs

 1044 12:55:04.441785  PCI: 00:1e.3 scanning...

 1045 12:55:04.445212  scan_generic_bus for PCI: 00:1e.3

 1046 12:55:04.448382  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1047 12:55:04.455047  scan_generic_bus for PCI: 00:1e.3 done

 1048 12:55:04.458395  scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs

 1049 12:55:04.461807  PCI: 00:1f.0 scanning...

 1050 12:55:04.465018  scan_static_bus for PCI: 00:1f.0

 1051 12:55:04.468170  PNP: 0c09.0 enabled

 1052 12:55:04.471317  scan_static_bus for PCI: 00:1f.0 done

 1053 12:55:04.477933  scan_bus: scanning of bus PCI: 00:1f.0 took 12057 usecs

 1054 12:55:04.478016  PCI: 00:1f.3 scanning...

 1055 12:55:04.484768  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs

 1056 12:55:04.488217  PCI: 00:1f.4 scanning...

 1057 12:55:04.491228  scan_generic_bus for PCI: 00:1f.4

 1058 12:55:04.494674  scan_generic_bus for PCI: 00:1f.4 done

 1059 12:55:04.501503  scan_bus: scanning of bus PCI: 00:1f.4 took 10178 usecs

 1060 12:55:04.505048  PCI: 00:1f.5 scanning...

 1061 12:55:04.507821  scan_generic_bus for PCI: 00:1f.5

 1062 12:55:04.511477  scan_generic_bus for PCI: 00:1f.5 done

 1063 12:55:04.517745  scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs

 1064 12:55:04.521288  scan_bus: scanning of bus DOMAIN: 0000 took 605162 usecs

 1065 12:55:04.524476  scan_static_bus for Root Device done

 1066 12:55:04.531349  scan_bus: scanning of bus Root Device took 625019 usecs

 1067 12:55:04.531431  done

 1068 12:55:04.534435  Chrome EC: UHEPI supported

 1069 12:55:04.541304  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1070 12:55:04.547779  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1071 12:55:04.554941  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1072 12:55:04.561356  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1073 12:55:04.564511  SPI flash protection: WPSW=0 SRP0=0

 1074 12:55:04.568099  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1075 12:55:04.574772  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1076 12:55:04.578186  found VGA at PCI: 00:02.0

 1077 12:55:04.581203  Setting up VGA for PCI: 00:02.0

 1078 12:55:04.584994  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1079 12:55:04.590964  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1080 12:55:04.594735  Allocating resources...

 1081 12:55:04.594816  Reading resources...

 1082 12:55:04.598321  Root Device read_resources bus 0 link: 0

 1083 12:55:04.604462  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1084 12:55:04.607792  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1085 12:55:04.614278  DOMAIN: 0000 read_resources bus 0 link: 0

 1086 12:55:04.621037  PCI: 00:14.0 read_resources bus 0 link: 0

 1087 12:55:04.624420  USB0 port 0 read_resources bus 0 link: 0

 1088 12:55:04.631469  USB0 port 0 read_resources bus 0 link: 0 done

 1089 12:55:04.635115  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1090 12:55:04.642365  PCI: 00:15.0 read_resources bus 1 link: 0

 1091 12:55:04.645616  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1092 12:55:04.652303  PCI: 00:15.1 read_resources bus 2 link: 0

 1093 12:55:04.655419  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1094 12:55:04.662983  PCI: 00:19.0 read_resources bus 3 link: 0

 1095 12:55:04.669831  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1096 12:55:04.673139  PCI: 00:1d.0 read_resources bus 1 link: 0

 1097 12:55:04.679549  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1098 12:55:04.683340  PCI: 00:1e.2 read_resources bus 4 link: 0

 1099 12:55:04.689926  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1100 12:55:04.693021  PCI: 00:1e.3 read_resources bus 5 link: 0

 1101 12:55:04.699716  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1102 12:55:04.703455  PCI: 00:1f.0 read_resources bus 0 link: 0

 1103 12:55:04.709764  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1104 12:55:04.713095  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1105 12:55:04.720198  Root Device read_resources bus 0 link: 0 done

 1106 12:55:04.723385  Done reading resources.

 1107 12:55:04.726518  Show resources in subtree (Root Device)...After reading.

 1108 12:55:04.733504   Root Device child on link 0 CPU_CLUSTER: 0

 1109 12:55:04.736869    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1110 12:55:04.736950     APIC: 00

 1111 12:55:04.739943     APIC: 03

 1112 12:55:04.740024     APIC: 01

 1113 12:55:04.740089     APIC: 02

 1114 12:55:04.743141     APIC: 07

 1115 12:55:04.743223     APIC: 06

 1116 12:55:04.746537     APIC: 05

 1117 12:55:04.746619     APIC: 04

 1118 12:55:04.749577    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1119 12:55:04.760441    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1120 12:55:04.809977    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1121 12:55:04.810078     PCI: 00:00.0

 1122 12:55:04.810647     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1123 12:55:04.810909     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1124 12:55:04.811241     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1125 12:55:04.811667     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1126 12:55:04.859434     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1127 12:55:04.859881     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1128 12:55:04.860144     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1129 12:55:04.860833     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1130 12:55:04.862273     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1131 12:55:04.870507     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1132 12:55:04.877221     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1133 12:55:04.883868     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1134 12:55:04.893790     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1135 12:55:04.903741     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1136 12:55:04.914201     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1137 12:55:04.920194     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1138 12:55:04.923652     PCI: 00:02.0

 1139 12:55:04.933587     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1140 12:55:04.943374     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1141 12:55:04.953181     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1142 12:55:04.953270     PCI: 00:04.0

 1143 12:55:04.956327     PCI: 00:08.0

 1144 12:55:04.966128     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1145 12:55:04.966220     PCI: 00:12.0

 1146 12:55:04.976366     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1147 12:55:04.979589     PCI: 00:14.0 child on link 0 USB0 port 0

 1148 12:55:04.989364     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1149 12:55:04.996256      USB0 port 0 child on link 0 USB2 port 0

 1150 12:55:04.996371       USB2 port 0

 1151 12:55:04.999297       USB2 port 1

 1152 12:55:04.999373       USB2 port 2

 1153 12:55:05.002793       USB2 port 3

 1154 12:55:05.002875       USB2 port 5

 1155 12:55:05.006175       USB2 port 6

 1156 12:55:05.006257       USB2 port 9

 1157 12:55:05.009396       USB3 port 0

 1158 12:55:05.013233       USB3 port 1

 1159 12:55:05.013340       USB3 port 2

 1160 12:55:05.015868       USB3 port 3

 1161 12:55:05.015950       USB3 port 4

 1162 12:55:05.019663     PCI: 00:14.2

 1163 12:55:05.029192     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1164 12:55:05.039079     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1165 12:55:05.039162     PCI: 00:14.3

 1166 12:55:05.049057     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1167 12:55:05.052268     PCI: 00:15.0 child on link 0 I2C: 01:15

 1168 12:55:05.062536     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1169 12:55:05.065560      I2C: 01:15

 1170 12:55:05.069463     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1171 12:55:05.079111     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1172 12:55:05.082437      I2C: 02:5d

 1173 12:55:05.082519      GENERIC: 0.0

 1174 12:55:05.085568     PCI: 00:16.0

 1175 12:55:05.095479     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1176 12:55:05.095587     PCI: 00:17.0

 1177 12:55:05.105438     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1178 12:55:05.115680     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1179 12:55:05.122102     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1180 12:55:05.132100     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1181 12:55:05.139069     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1182 12:55:05.148718     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1183 12:55:05.151977     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1184 12:55:05.161761     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1185 12:55:05.165439      I2C: 03:1a

 1186 12:55:05.165570      I2C: 03:38

 1187 12:55:05.165649      I2C: 03:39

 1188 12:55:05.169007      I2C: 03:3a

 1189 12:55:05.169091      I2C: 03:3b

 1190 12:55:05.175226     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1191 12:55:05.182474     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1192 12:55:05.191965     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1193 12:55:05.201813     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1194 12:55:05.204810      PCI: 01:00.0

 1195 12:55:05.215064      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1196 12:55:05.215148     PCI: 00:1e.0

 1197 12:55:05.225280     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1198 12:55:05.234823     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1199 12:55:05.241434     PCI: 00:1e.2 child on link 0 SPI: 00

 1200 12:55:05.251448     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1201 12:55:05.251531      SPI: 00

 1202 12:55:05.254547     PCI: 00:1e.3 child on link 0 SPI: 01

 1203 12:55:05.264767     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1204 12:55:05.268210      SPI: 01

 1205 12:55:05.271242     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1206 12:55:05.281371     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1207 12:55:05.288171     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1208 12:55:05.291333      PNP: 0c09.0

 1209 12:55:05.298000      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1210 12:55:05.301179     PCI: 00:1f.3

 1211 12:55:05.311150     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1212 12:55:05.321035     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1213 12:55:05.321119     PCI: 00:1f.4

 1214 12:55:05.330714     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1215 12:55:05.340564     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1216 12:55:05.344379     PCI: 00:1f.5

 1217 12:55:05.350610     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1218 12:55:05.357729  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1219 12:55:05.364207  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1220 12:55:05.370675  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1221 12:55:05.374123  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1222 12:55:05.377331  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1223 12:55:05.383824  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1224 12:55:05.387423  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1225 12:55:05.394044  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1226 12:55:05.400463  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1227 12:55:05.407345  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1228 12:55:05.417491  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1229 12:55:05.424002  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1230 12:55:05.427553  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1231 12:55:05.433727  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1232 12:55:05.440350  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1233 12:55:05.443992  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1234 12:55:05.450679  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1235 12:55:05.453783  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1236 12:55:05.456672  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1237 12:55:05.463507  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1238 12:55:05.466554  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1239 12:55:05.473452  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1240 12:55:05.476557  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1241 12:55:05.483334  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1242 12:55:05.486516  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1243 12:55:05.493113  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1244 12:55:05.496787  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1245 12:55:05.503170  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1246 12:55:05.506965  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1247 12:55:05.513279  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1248 12:55:05.516569  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1249 12:55:05.519809  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1250 12:55:05.526405  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1251 12:55:05.529764  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1252 12:55:05.536320  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1253 12:55:05.539612  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1254 12:55:05.546127  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1255 12:55:05.553203  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1256 12:55:05.556339  avoid_fixed_resources: DOMAIN: 0000

 1257 12:55:05.562956  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1258 12:55:05.569704  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1259 12:55:05.576354  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1260 12:55:05.586074  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1261 12:55:05.592775  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1262 12:55:05.599461  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1263 12:55:05.609298  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1264 12:55:05.615864  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1265 12:55:05.622563  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1266 12:55:05.632361  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1267 12:55:05.638644  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1268 12:55:05.645541  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1269 12:55:05.649353  Setting resources...

 1270 12:55:05.655641  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1271 12:55:05.658573  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1272 12:55:05.661953  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1273 12:55:05.665450  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1274 12:55:05.668865  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1275 12:55:05.675268  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1276 12:55:05.681885  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1277 12:55:05.688810  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1278 12:55:05.695176  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1279 12:55:05.701977  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1280 12:55:05.705081  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1281 12:55:05.711740  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1282 12:55:05.715153  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1283 12:55:05.721698  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1284 12:55:05.725251  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1285 12:55:05.731727  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1286 12:55:05.734940  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1287 12:55:05.742090  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1288 12:55:05.745096  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1289 12:55:05.751711  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1290 12:55:05.755000  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1291 12:55:05.758806  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1292 12:55:05.765044  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1293 12:55:05.768335  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1294 12:55:05.775364  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1295 12:55:05.778620  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1296 12:55:05.784840  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1297 12:55:05.788242  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1298 12:55:05.794586  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1299 12:55:05.798278  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1300 12:55:05.805219  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1301 12:55:05.807757  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1302 12:55:05.815029  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1303 12:55:05.824489  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1304 12:55:05.831628  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1305 12:55:05.837566  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1306 12:55:05.844435  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1307 12:55:05.850813  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1308 12:55:05.854356  Root Device assign_resources, bus 0 link: 0

 1309 12:55:05.861162  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1310 12:55:05.867416  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1311 12:55:05.877342  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1312 12:55:05.883894  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1313 12:55:05.893832  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1314 12:55:05.900682  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1315 12:55:05.910844  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1316 12:55:05.913727  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1317 12:55:05.917277  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1318 12:55:05.927215  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1319 12:55:05.934199  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1320 12:55:05.943753  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1321 12:55:05.950330  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1322 12:55:05.957045  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1323 12:55:05.960656  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1324 12:55:05.967228  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1325 12:55:05.973691  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1326 12:55:05.977065  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1327 12:55:05.987003  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1328 12:55:05.993543  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1329 12:55:06.003436  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1330 12:55:06.010376  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1331 12:55:06.016802  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1332 12:55:06.023167  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1333 12:55:06.033320  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1334 12:55:06.039873  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1335 12:55:06.046436  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1336 12:55:06.049876  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1337 12:55:06.060092  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1338 12:55:06.066602  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1339 12:55:06.076715  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1340 12:55:06.079712  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1341 12:55:06.089338  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1342 12:55:06.092785  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1343 12:55:06.102794  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1344 12:55:06.109569  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1345 12:55:06.116001  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1346 12:55:06.119263  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1347 12:55:06.129052  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1348 12:55:06.132275  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1349 12:55:06.135957  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1350 12:55:06.142595  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1351 12:55:06.145849  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1352 12:55:06.152371  LPC: Trying to open IO window from 800 size 1ff

 1353 12:55:06.159367  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1354 12:55:06.169059  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1355 12:55:06.176055  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1356 12:55:06.185365  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1357 12:55:06.188660  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1358 12:55:06.195526  Root Device assign_resources, bus 0 link: 0

 1359 12:55:06.195607  Done setting resources.

 1360 12:55:06.202043  Show resources in subtree (Root Device)...After assigning values.

 1361 12:55:06.209136   Root Device child on link 0 CPU_CLUSTER: 0

 1362 12:55:06.211995    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1363 12:55:06.212074     APIC: 00

 1364 12:55:06.215481     APIC: 03

 1365 12:55:06.215561     APIC: 01

 1366 12:55:06.215624     APIC: 02

 1367 12:55:06.218498     APIC: 07

 1368 12:55:06.218577     APIC: 06

 1369 12:55:06.222293     APIC: 05

 1370 12:55:06.222372     APIC: 04

 1371 12:55:06.224980    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1372 12:55:06.235153    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1373 12:55:06.248564    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1374 12:55:06.248647     PCI: 00:00.0

 1375 12:55:06.258429     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1376 12:55:06.268841     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1377 12:55:06.278138     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1378 12:55:06.284573     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1379 12:55:06.294777     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1380 12:55:06.304341     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1381 12:55:06.314273     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1382 12:55:06.324452     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1383 12:55:06.334045     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1384 12:55:06.340836     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1385 12:55:06.350969     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1386 12:55:06.361032     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1387 12:55:06.370569     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1388 12:55:06.380291     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1389 12:55:06.390430     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1390 12:55:06.397210     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1391 12:55:06.400236     PCI: 00:02.0

 1392 12:55:06.410163     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1393 12:55:06.420245     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1394 12:55:06.429816     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1395 12:55:06.433318     PCI: 00:04.0

 1396 12:55:06.433403     PCI: 00:08.0

 1397 12:55:06.443692     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1398 12:55:06.446480     PCI: 00:12.0

 1399 12:55:06.456641     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1400 12:55:06.459784     PCI: 00:14.0 child on link 0 USB0 port 0

 1401 12:55:06.469406     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1402 12:55:06.476084      USB0 port 0 child on link 0 USB2 port 0

 1403 12:55:06.476166       USB2 port 0

 1404 12:55:06.479793       USB2 port 1

 1405 12:55:06.479876       USB2 port 2

 1406 12:55:06.482787       USB2 port 3

 1407 12:55:06.482869       USB2 port 5

 1408 12:55:06.486255       USB2 port 6

 1409 12:55:06.486336       USB2 port 9

 1410 12:55:06.489445       USB3 port 0

 1411 12:55:06.489549       USB3 port 1

 1412 12:55:06.492968       USB3 port 2

 1413 12:55:06.496122       USB3 port 3

 1414 12:55:06.496204       USB3 port 4

 1415 12:55:06.499321     PCI: 00:14.2

 1416 12:55:06.509439     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1417 12:55:06.519055     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1418 12:55:06.519140     PCI: 00:14.3

 1419 12:55:06.529144     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1420 12:55:06.536113     PCI: 00:15.0 child on link 0 I2C: 01:15

 1421 12:55:06.545720     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1422 12:55:06.545803      I2C: 01:15

 1423 12:55:06.552479     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1424 12:55:06.562557     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1425 12:55:06.562641      I2C: 02:5d

 1426 12:55:06.565698      GENERIC: 0.0

 1427 12:55:06.565780     PCI: 00:16.0

 1428 12:55:06.575554     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1429 12:55:06.578580     PCI: 00:17.0

 1430 12:55:06.588448     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1431 12:55:06.598843     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1432 12:55:06.608570     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1433 12:55:06.615341     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1434 12:55:06.624960     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1435 12:55:06.634807     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1436 12:55:06.641378     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1437 12:55:06.651727     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1438 12:55:06.651811      I2C: 03:1a

 1439 12:55:06.654890      I2C: 03:38

 1440 12:55:06.654971      I2C: 03:39

 1441 12:55:06.658584      I2C: 03:3a

 1442 12:55:06.658665      I2C: 03:3b

 1443 12:55:06.661449     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1444 12:55:06.671311     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1445 12:55:06.681764     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1446 12:55:06.691248     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1447 12:55:06.694671      PCI: 01:00.0

 1448 12:55:06.704298      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1449 12:55:06.707941     PCI: 00:1e.0

 1450 12:55:06.717695     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1451 12:55:06.727545     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1452 12:55:06.730740     PCI: 00:1e.2 child on link 0 SPI: 00

 1453 12:55:06.740733     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1454 12:55:06.744271      SPI: 00

 1455 12:55:06.747721     PCI: 00:1e.3 child on link 0 SPI: 01

 1456 12:55:06.757263     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1457 12:55:06.757373      SPI: 01

 1458 12:55:06.763958     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1459 12:55:06.770561     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1460 12:55:06.780377     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1461 12:55:06.784027      PNP: 0c09.0

 1462 12:55:06.790491      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1463 12:55:06.793566     PCI: 00:1f.3

 1464 12:55:06.803520     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1465 12:55:06.813730     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1466 12:55:06.816909     PCI: 00:1f.4

 1467 12:55:06.823573     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1468 12:55:06.833436     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1469 12:55:06.836626     PCI: 00:1f.5

 1470 12:55:06.847055     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1471 12:55:06.850053  Done allocating resources.

 1472 12:55:06.853314  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1473 12:55:06.857358  Enabling resources...

 1474 12:55:06.863862  PCI: 00:00.0 subsystem <- 8086/9b61

 1475 12:55:06.863944  PCI: 00:00.0 cmd <- 06

 1476 12:55:06.866929  PCI: 00:02.0 subsystem <- 8086/9b41

 1477 12:55:06.870374  PCI: 00:02.0 cmd <- 03

 1478 12:55:06.873485  PCI: 00:08.0 cmd <- 06

 1479 12:55:06.876821  PCI: 00:12.0 subsystem <- 8086/02f9

 1480 12:55:06.880368  PCI: 00:12.0 cmd <- 02

 1481 12:55:06.883535  PCI: 00:14.0 subsystem <- 8086/02ed

 1482 12:55:06.887011  PCI: 00:14.0 cmd <- 02

 1483 12:55:06.890225  PCI: 00:14.2 cmd <- 02

 1484 12:55:06.893434  PCI: 00:14.3 subsystem <- 8086/02f0

 1485 12:55:06.893561  PCI: 00:14.3 cmd <- 02

 1486 12:55:06.899942  PCI: 00:15.0 subsystem <- 8086/02e8

 1487 12:55:06.900026  PCI: 00:15.0 cmd <- 02

 1488 12:55:06.903580  PCI: 00:15.1 subsystem <- 8086/02e9

 1489 12:55:06.906689  PCI: 00:15.1 cmd <- 02

 1490 12:55:06.909776  PCI: 00:16.0 subsystem <- 8086/02e0

 1491 12:55:06.913287  PCI: 00:16.0 cmd <- 02

 1492 12:55:06.916490  PCI: 00:17.0 subsystem <- 8086/02d3

 1493 12:55:06.920276  PCI: 00:17.0 cmd <- 03

 1494 12:55:06.923466  PCI: 00:19.0 subsystem <- 8086/02c5

 1495 12:55:06.926314  PCI: 00:19.0 cmd <- 02

 1496 12:55:06.929652  PCI: 00:1d.0 bridge ctrl <- 0013

 1497 12:55:06.933265  PCI: 00:1d.0 subsystem <- 8086/02b0

 1498 12:55:06.936297  PCI: 00:1d.0 cmd <- 06

 1499 12:55:06.939658  PCI: 00:1e.0 subsystem <- 8086/02a8

 1500 12:55:06.943396  PCI: 00:1e.0 cmd <- 06

 1501 12:55:06.946160  PCI: 00:1e.2 subsystem <- 8086/02aa

 1502 12:55:06.949944  PCI: 00:1e.2 cmd <- 06

 1503 12:55:06.952871  PCI: 00:1e.3 subsystem <- 8086/02ab

 1504 12:55:06.952958  PCI: 00:1e.3 cmd <- 02

 1505 12:55:06.959481  PCI: 00:1f.0 subsystem <- 8086/0284

 1506 12:55:06.959571  PCI: 00:1f.0 cmd <- 407

 1507 12:55:06.963256  PCI: 00:1f.3 subsystem <- 8086/02c8

 1508 12:55:06.966595  PCI: 00:1f.3 cmd <- 02

 1509 12:55:06.969677  PCI: 00:1f.4 subsystem <- 8086/02a3

 1510 12:55:06.973055  PCI: 00:1f.4 cmd <- 03

 1511 12:55:06.976157  PCI: 00:1f.5 subsystem <- 8086/02a4

 1512 12:55:06.979355  PCI: 00:1f.5 cmd <- 406

 1513 12:55:06.988633  PCI: 01:00.0 cmd <- 02

 1514 12:55:06.993914  done.

 1515 12:55:07.007407  ME: Version: 14.0.39.1367

 1516 12:55:07.013748  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13

 1517 12:55:07.016749  Initializing devices...

 1518 12:55:07.016828  Root Device init ...

 1519 12:55:07.023786  Chrome EC: Set SMI mask to 0x0000000000000000

 1520 12:55:07.027321  Chrome EC: clear events_b mask to 0x0000000000000000

 1521 12:55:07.033315  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1522 12:55:07.039967  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1523 12:55:07.046875  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1524 12:55:07.050333  Chrome EC: Set WAKE mask to 0x0000000000000000

 1525 12:55:07.053333  Root Device init finished in 35162 usecs

 1526 12:55:07.056713  CPU_CLUSTER: 0 init ...

 1527 12:55:07.063456  CPU_CLUSTER: 0 init finished in 2449 usecs

 1528 12:55:07.067882  PCI: 00:00.0 init ...

 1529 12:55:07.071338  CPU TDP: 15 Watts

 1530 12:55:07.074551  CPU PL2 = 64 Watts

 1531 12:55:07.077631  PCI: 00:00.0 init finished in 7084 usecs

 1532 12:55:07.080973  PCI: 00:02.0 init ...

 1533 12:55:07.084400  PCI: 00:02.0 init finished in 2245 usecs

 1534 12:55:07.087420  PCI: 00:08.0 init ...

 1535 12:55:07.090592  PCI: 00:08.0 init finished in 2252 usecs

 1536 12:55:07.094494  PCI: 00:12.0 init ...

 1537 12:55:07.097587  PCI: 00:12.0 init finished in 2253 usecs

 1538 12:55:07.100547  PCI: 00:14.0 init ...

 1539 12:55:07.104235  PCI: 00:14.0 init finished in 2254 usecs

 1540 12:55:07.107471  PCI: 00:14.2 init ...

 1541 12:55:07.110860  PCI: 00:14.2 init finished in 2253 usecs

 1542 12:55:07.114802  PCI: 00:14.3 init ...

 1543 12:55:07.117231  PCI: 00:14.3 init finished in 2260 usecs

 1544 12:55:07.120756  PCI: 00:15.0 init ...

 1545 12:55:07.123840  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1546 12:55:07.127302  PCI: 00:15.0 init finished in 5980 usecs

 1547 12:55:07.130600  PCI: 00:15.1 init ...

 1548 12:55:07.133632  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1549 12:55:07.140194  PCI: 00:15.1 init finished in 5979 usecs

 1550 12:55:07.140278  PCI: 00:16.0 init ...

 1551 12:55:07.146747  PCI: 00:16.0 init finished in 2251 usecs

 1552 12:55:07.150175  PCI: 00:19.0 init ...

 1553 12:55:07.153406  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1554 12:55:07.157099  PCI: 00:19.0 init finished in 5980 usecs

 1555 12:55:07.160273  PCI: 00:1d.0 init ...

 1556 12:55:07.163281  Initializing PCH PCIe bridge.

 1557 12:55:07.166491  PCI: 00:1d.0 init finished in 5279 usecs

 1558 12:55:07.169837  PCI: 00:1f.0 init ...

 1559 12:55:07.173389  IOAPIC: Initializing IOAPIC at 0xfec00000

 1560 12:55:07.180357  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1561 12:55:07.180439  IOAPIC: ID = 0x02

 1562 12:55:07.182968  IOAPIC: Dumping registers

 1563 12:55:07.186646    reg 0x0000: 0x02000000

 1564 12:55:07.189613    reg 0x0001: 0x00770020

 1565 12:55:07.189696    reg 0x0002: 0x00000000

 1566 12:55:07.196512  PCI: 00:1f.0 init finished in 23557 usecs

 1567 12:55:07.199555  PCI: 00:1f.4 init ...

 1568 12:55:07.202990  PCI: 00:1f.4 init finished in 2263 usecs

 1569 12:55:07.213581  PCI: 01:00.0 init ...

 1570 12:55:07.216992  PCI: 01:00.0 init finished in 2252 usecs

 1571 12:55:07.221246  PNP: 0c09.0 init ...

 1572 12:55:07.227622  Google Chrome EC uptime: 11.096 seconds

 1573 12:55:07.231245  Google Chrome AP resets since EC boot: 0

 1574 12:55:07.234596  Google Chrome most recent AP reset causes:

 1575 12:55:07.240834  Google Chrome EC reset flags at last EC boot: reset-pin

 1576 12:55:07.244243  PNP: 0c09.0 init finished in 20610 usecs

 1577 12:55:07.247381  Devices initialized

 1578 12:55:07.251553  Show all devs... After init.

 1579 12:55:07.251635  Root Device: enabled 1

 1580 12:55:07.254373  CPU_CLUSTER: 0: enabled 1

 1581 12:55:07.257819  DOMAIN: 0000: enabled 1

 1582 12:55:07.257901  APIC: 00: enabled 1

 1583 12:55:07.261074  PCI: 00:00.0: enabled 1

 1584 12:55:07.264365  PCI: 00:02.0: enabled 1

 1585 12:55:07.267534  PCI: 00:04.0: enabled 0

 1586 12:55:07.267617  PCI: 00:05.0: enabled 0

 1587 12:55:07.270592  PCI: 00:12.0: enabled 1

 1588 12:55:07.274204  PCI: 00:12.5: enabled 0

 1589 12:55:07.277358  PCI: 00:12.6: enabled 0

 1590 12:55:07.277440  PCI: 00:14.0: enabled 1

 1591 12:55:07.280532  PCI: 00:14.1: enabled 0

 1592 12:55:07.284154  PCI: 00:14.3: enabled 1

 1593 12:55:07.287652  PCI: 00:14.5: enabled 0

 1594 12:55:07.287734  PCI: 00:15.0: enabled 1

 1595 12:55:07.290529  PCI: 00:15.1: enabled 1

 1596 12:55:07.293780  PCI: 00:15.2: enabled 0

 1597 12:55:07.293862  PCI: 00:15.3: enabled 0

 1598 12:55:07.297303  PCI: 00:16.0: enabled 1

 1599 12:55:07.300438  PCI: 00:16.1: enabled 0

 1600 12:55:07.303705  PCI: 00:16.2: enabled 0

 1601 12:55:07.303788  PCI: 00:16.3: enabled 0

 1602 12:55:07.307721  PCI: 00:16.4: enabled 0

 1603 12:55:07.310739  PCI: 00:16.5: enabled 0

 1604 12:55:07.313939  PCI: 00:17.0: enabled 1

 1605 12:55:07.314021  PCI: 00:19.0: enabled 1

 1606 12:55:07.317317  PCI: 00:19.1: enabled 0

 1607 12:55:07.320306  PCI: 00:19.2: enabled 0

 1608 12:55:07.323780  PCI: 00:1a.0: enabled 0

 1609 12:55:07.323862  PCI: 00:1c.0: enabled 0

 1610 12:55:07.327157  PCI: 00:1c.1: enabled 0

 1611 12:55:07.330119  PCI: 00:1c.2: enabled 0

 1612 12:55:07.333437  PCI: 00:1c.3: enabled 0

 1613 12:55:07.333525  PCI: 00:1c.4: enabled 0

 1614 12:55:07.337330  PCI: 00:1c.5: enabled 0

 1615 12:55:07.340415  PCI: 00:1c.6: enabled 0

 1616 12:55:07.340497  PCI: 00:1c.7: enabled 0

 1617 12:55:07.343633  PCI: 00:1d.0: enabled 1

 1618 12:55:07.346988  PCI: 00:1d.1: enabled 0

 1619 12:55:07.350188  PCI: 00:1d.2: enabled 0

 1620 12:55:07.350276  PCI: 00:1d.3: enabled 0

 1621 12:55:07.353295  PCI: 00:1d.4: enabled 0

 1622 12:55:07.356692  PCI: 00:1d.5: enabled 0

 1623 12:55:07.360120  PCI: 00:1e.0: enabled 1

 1624 12:55:07.360216  PCI: 00:1e.1: enabled 0

 1625 12:55:07.363060  PCI: 00:1e.2: enabled 1

 1626 12:55:07.366940  PCI: 00:1e.3: enabled 1

 1627 12:55:07.370241  PCI: 00:1f.0: enabled 1

 1628 12:55:07.370339  PCI: 00:1f.1: enabled 0

 1629 12:55:07.373117  PCI: 00:1f.2: enabled 0

 1630 12:55:07.376479  PCI: 00:1f.3: enabled 1

 1631 12:55:07.380266  PCI: 00:1f.4: enabled 1

 1632 12:55:07.380347  PCI: 00:1f.5: enabled 1

 1633 12:55:07.383473  PCI: 00:1f.6: enabled 0

 1634 12:55:07.386400  USB0 port 0: enabled 1

 1635 12:55:07.386482  I2C: 01:15: enabled 1

 1636 12:55:07.389592  I2C: 02:5d: enabled 1

 1637 12:55:07.393096  GENERIC: 0.0: enabled 1

 1638 12:55:07.393178  I2C: 03:1a: enabled 1

 1639 12:55:07.396338  I2C: 03:38: enabled 1

 1640 12:55:07.399435  I2C: 03:39: enabled 1

 1641 12:55:07.399516  I2C: 03:3a: enabled 1

 1642 12:55:07.402885  I2C: 03:3b: enabled 1

 1643 12:55:07.406285  PCI: 00:00.0: enabled 1

 1644 12:55:07.406367  SPI: 00: enabled 1

 1645 12:55:07.409814  SPI: 01: enabled 1

 1646 12:55:07.412761  PNP: 0c09.0: enabled 1

 1647 12:55:07.412843  USB2 port 0: enabled 1

 1648 12:55:07.416370  USB2 port 1: enabled 1

 1649 12:55:07.419354  USB2 port 2: enabled 0

 1650 12:55:07.422837  USB2 port 3: enabled 0

 1651 12:55:07.422919  USB2 port 5: enabled 0

 1652 12:55:07.426158  USB2 port 6: enabled 1

 1653 12:55:07.429446  USB2 port 9: enabled 1

 1654 12:55:07.429565  USB3 port 0: enabled 1

 1655 12:55:07.432638  USB3 port 1: enabled 1

 1656 12:55:07.436376  USB3 port 2: enabled 1

 1657 12:55:07.439886  USB3 port 3: enabled 1

 1658 12:55:07.439982  USB3 port 4: enabled 0

 1659 12:55:07.442555  APIC: 03: enabled 1

 1660 12:55:07.442637  APIC: 01: enabled 1

 1661 12:55:07.445917  APIC: 02: enabled 1

 1662 12:55:07.449351  APIC: 07: enabled 1

 1663 12:55:07.449433  APIC: 06: enabled 1

 1664 12:55:07.452472  APIC: 05: enabled 1

 1665 12:55:07.456199  APIC: 04: enabled 1

 1666 12:55:07.456281  PCI: 00:08.0: enabled 1

 1667 12:55:07.459332  PCI: 00:14.2: enabled 1

 1668 12:55:07.462880  PCI: 01:00.0: enabled 1

 1669 12:55:07.466564  Disabling ACPI via APMC:

 1670 12:55:07.469575  done.

 1671 12:55:07.472575  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1672 12:55:07.475843  ELOG: NV offset 0xaf0000 size 0x4000

 1673 12:55:07.482979  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1674 12:55:07.489812  ELOG: Event(17) added with size 13 at 2023-04-05 12:55:07 UTC

 1675 12:55:07.496607  ELOG: Event(92) added with size 9 at 2023-04-05 12:55:07 UTC

 1676 12:55:07.502827  ELOG: Event(93) added with size 9 at 2023-04-05 12:55:07 UTC

 1677 12:55:07.509341  ELOG: Event(9A) added with size 9 at 2023-04-05 12:55:07 UTC

 1678 12:55:07.516709  ELOG: Event(9E) added with size 10 at 2023-04-05 12:55:07 UTC

 1679 12:55:07.522788  ELOG: Event(9F) added with size 14 at 2023-04-05 12:55:07 UTC

 1680 12:55:07.526137  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1681 12:55:07.533332  ELOG: Event(A1) added with size 10 at 2023-04-05 12:55:07 UTC

 1682 12:55:07.543616  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1683 12:55:07.549832  ELOG: Event(A0) added with size 9 at 2023-04-05 12:55:07 UTC

 1684 12:55:07.553200  elog_add_boot_reason: Logged dev mode boot

 1685 12:55:07.556709  Finalize devices...

 1686 12:55:07.556784  PCI: 00:17.0 final

 1687 12:55:07.559919  Devices finalized

 1688 12:55:07.563366  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1689 12:55:07.569929  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1690 12:55:07.573325  ME: HFSTS1                  : 0x90000245

 1691 12:55:07.576335  ME: HFSTS2                  : 0x3B850126

 1692 12:55:07.583066  ME: HFSTS3                  : 0x00000020

 1693 12:55:07.586217  ME: HFSTS4                  : 0x00004800

 1694 12:55:07.589422  ME: HFSTS5                  : 0x00000000

 1695 12:55:07.592941  ME: HFSTS6                  : 0x40400006

 1696 12:55:07.596532  ME: Manufacturing Mode      : NO

 1697 12:55:07.599502  ME: FW Partition Table      : OK

 1698 12:55:07.602748  ME: Bringup Loader Failure  : NO

 1699 12:55:07.606088  ME: Firmware Init Complete  : YES

 1700 12:55:07.609444  ME: Boot Options Present    : NO

 1701 12:55:07.612802  ME: Update In Progress      : NO

 1702 12:55:07.616142  ME: D0i3 Support            : YES

 1703 12:55:07.619570  ME: Low Power State Enabled : NO

 1704 12:55:07.622821  ME: CPU Replaced            : NO

 1705 12:55:07.626127  ME: CPU Replacement Valid   : YES

 1706 12:55:07.629640  ME: Current Working State   : 5

 1707 12:55:07.632552  ME: Current Operation State : 1

 1708 12:55:07.635952  ME: Current Operation Mode  : 0

 1709 12:55:07.639243  ME: Error Code              : 0

 1710 12:55:07.642709  ME: CPU Debug Disabled      : YES

 1711 12:55:07.645728  ME: TXT Support             : NO

 1712 12:55:07.652477  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1713 12:55:07.659238  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1714 12:55:07.659323  CBFS @ c08000 size 3f8000

 1715 12:55:07.665547  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1716 12:55:07.669119  CBFS: Locating 'fallback/dsdt.aml'

 1717 12:55:07.672431  CBFS: Found @ offset 10bb80 size 3fa5

 1718 12:55:07.679086  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1719 12:55:07.682350  CBFS @ c08000 size 3f8000

 1720 12:55:07.688948  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1721 12:55:07.689041  CBFS: Locating 'fallback/slic'

 1722 12:55:07.693925  CBFS: 'fallback/slic' not found.

 1723 12:55:07.700860  ACPI: Writing ACPI tables at 99b3e000.

 1724 12:55:07.700943  ACPI:    * FACS

 1725 12:55:07.704081  ACPI:    * DSDT

 1726 12:55:07.707640  Ramoops buffer: 0x100000@0x99a3d000.

 1727 12:55:07.710863  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1728 12:55:07.717343  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1729 12:55:07.720710  Google Chrome EC: version:

 1730 12:55:07.723728  	ro: helios_v2.0.2659-56403530b

 1731 12:55:07.727133  	rw: helios_v2.0.2849-c41de27e7d

 1732 12:55:07.727208    running image: 1

 1733 12:55:07.731342  ACPI:    * FADT

 1734 12:55:07.731435  SCI is IRQ9

 1735 12:55:07.738220  ACPI: added table 1/32, length now 40

 1736 12:55:07.738298  ACPI:     * SSDT

 1737 12:55:07.741284  Found 1 CPU(s) with 8 core(s) each.

 1738 12:55:07.744610  Error: Could not locate 'wifi_sar' in VPD.

 1739 12:55:07.751174  Checking CBFS for default SAR values

 1740 12:55:07.754582  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1741 12:55:07.758003  CBFS @ c08000 size 3f8000

 1742 12:55:07.764191  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1743 12:55:07.767873  CBFS: Locating 'wifi_sar_defaults.hex'

 1744 12:55:07.770829  CBFS: Found @ offset 5fac0 size 77

 1745 12:55:07.774171  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1746 12:55:07.781146  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1747 12:55:07.784243  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1748 12:55:07.790956  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1749 12:55:07.794140  failed to find key in VPD: dsm_calib_r0_0

 1750 12:55:07.804057  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1751 12:55:07.807065  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1752 12:55:07.813721  failed to find key in VPD: dsm_calib_r0_1

 1753 12:55:07.820313  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1754 12:55:07.826813  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1755 12:55:07.830344  failed to find key in VPD: dsm_calib_r0_2

 1756 12:55:07.840088  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1757 12:55:07.843874  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1758 12:55:07.850070  failed to find key in VPD: dsm_calib_r0_3

 1759 12:55:07.856793  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1760 12:55:07.863540  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1761 12:55:07.866706  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1762 12:55:07.873383  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1763 12:55:07.876925  EC returned error result code 1

 1764 12:55:07.880401  EC returned error result code 1

 1765 12:55:07.884097  EC returned error result code 1

 1766 12:55:07.887062  PS2K: Bad resp from EC. Vivaldi disabled!

 1767 12:55:07.894155  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1768 12:55:07.900374  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1769 12:55:07.903547  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1770 12:55:07.910334  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1771 12:55:07.913646  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1772 12:55:07.920250  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1773 12:55:07.926683  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1774 12:55:07.933747  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1775 12:55:07.936842  ACPI: added table 2/32, length now 44

 1776 12:55:07.936924  ACPI:    * MCFG

 1777 12:55:07.943351  ACPI: added table 3/32, length now 48

 1778 12:55:07.943433  ACPI:    * TPM2

 1779 12:55:07.946741  TPM2 log created at 99a2d000

 1780 12:55:07.950000  ACPI: added table 4/32, length now 52

 1781 12:55:07.953081  ACPI:    * MADT

 1782 12:55:07.953162  SCI is IRQ9

 1783 12:55:07.956503  ACPI: added table 5/32, length now 56

 1784 12:55:07.959867  current = 99b43ac0

 1785 12:55:07.959949  ACPI:    * DMAR

 1786 12:55:07.963189  ACPI: added table 6/32, length now 60

 1787 12:55:07.966541  ACPI:    * IGD OpRegion

 1788 12:55:07.969667  GMA: Found VBT in CBFS

 1789 12:55:07.972923  GMA: Found valid VBT in CBFS

 1790 12:55:07.976149  ACPI: added table 7/32, length now 64

 1791 12:55:07.976231  ACPI:    * HPET

 1792 12:55:07.982843  ACPI: added table 8/32, length now 68

 1793 12:55:07.982930  ACPI: done.

 1794 12:55:07.985998  ACPI tables: 31744 bytes.

 1795 12:55:07.989741  smbios_write_tables: 99a2c000

 1796 12:55:07.992674  EC returned error result code 3

 1797 12:55:07.996033  Couldn't obtain OEM name from CBI

 1798 12:55:07.999444  Create SMBIOS type 17

 1799 12:55:08.002782  PCI: 00:00.0 (Intel Cannonlake)

 1800 12:55:08.002888  PCI: 00:14.3 (Intel WiFi)

 1801 12:55:08.006184  SMBIOS tables: 939 bytes.

 1802 12:55:08.009230  Writing table forward entry at 0x00000500

 1803 12:55:08.015996  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1804 12:55:08.019751  Writing coreboot table at 0x99b62000

 1805 12:55:08.025690   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1806 12:55:08.032439   1. 0000000000001000-000000000009ffff: RAM

 1807 12:55:08.035806   2. 00000000000a0000-00000000000fffff: RESERVED

 1808 12:55:08.039135   3. 0000000000100000-0000000099a2bfff: RAM

 1809 12:55:08.045714   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1810 12:55:08.048898   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1811 12:55:08.055459   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1812 12:55:08.062307   7. 000000009a000000-000000009f7fffff: RESERVED

 1813 12:55:08.065742   8. 00000000e0000000-00000000efffffff: RESERVED

 1814 12:55:08.072255   9. 00000000fc000000-00000000fc000fff: RESERVED

 1815 12:55:08.075360  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1816 12:55:08.078651  11. 00000000fed10000-00000000fed17fff: RESERVED

 1817 12:55:08.085248  12. 00000000fed80000-00000000fed83fff: RESERVED

 1818 12:55:08.088843  13. 00000000fed90000-00000000fed91fff: RESERVED

 1819 12:55:08.095838  14. 00000000feda0000-00000000feda1fff: RESERVED

 1820 12:55:08.099015  15. 0000000100000000-000000045e7fffff: RAM

 1821 12:55:08.102004  Graphics framebuffer located at 0xc0000000

 1822 12:55:08.105256  Passing 5 GPIOs to payload:

 1823 12:55:08.111731              NAME |       PORT | POLARITY |     VALUE

 1824 12:55:08.114909     write protect |  undefined |     high |       low

 1825 12:55:08.121591               lid |  undefined |     high |      high

 1826 12:55:08.128419             power |  undefined |     high |       low

 1827 12:55:08.131694             oprom |  undefined |     high |       low

 1828 12:55:08.138988          EC in RW | 0x000000cb |     high |       low

 1829 12:55:08.139094  Board ID: 4

 1830 12:55:08.145175  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1831 12:55:08.148351  CBFS @ c08000 size 3f8000

 1832 12:55:08.151717  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1833 12:55:08.157983  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa

 1834 12:55:08.161406  coreboot table: 1492 bytes.

 1835 12:55:08.164962  IMD ROOT    0. 99fff000 00001000

 1836 12:55:08.167926  IMD SMALL   1. 99ffe000 00001000

 1837 12:55:08.171290  FSP MEMORY  2. 99c4e000 003b0000

 1838 12:55:08.174962  CONSOLE     3. 99c2e000 00020000

 1839 12:55:08.177910  FMAP        4. 99c2d000 0000054e

 1840 12:55:08.181392  TIME STAMP  5. 99c2c000 00000910

 1841 12:55:08.184672  VBOOT WORK  6. 99c18000 00014000

 1842 12:55:08.188608  MRC DATA    7. 99c16000 00001958

 1843 12:55:08.191272  ROMSTG STCK 8. 99c15000 00001000

 1844 12:55:08.194653  AFTER CAR   9. 99c0b000 0000a000

 1845 12:55:08.197897  RAMSTAGE   10. 99baf000 0005c000

 1846 12:55:08.201069  REFCODE    11. 99b7a000 00035000

 1847 12:55:08.204500  SMM BACKUP 12. 99b6a000 00010000

 1848 12:55:08.207914  COREBOOT   13. 99b62000 00008000

 1849 12:55:08.210985  ACPI       14. 99b3e000 00024000

 1850 12:55:08.214559  ACPI GNVS  15. 99b3d000 00001000

 1851 12:55:08.218287  RAMOOPS    16. 99a3d000 00100000

 1852 12:55:08.221138  TPM2 TCGLOG17. 99a2d000 00010000

 1853 12:55:08.224407  SMBIOS     18. 99a2c000 00000800

 1854 12:55:08.227734  IMD small region:

 1855 12:55:08.231051    IMD ROOT    0. 99ffec00 00000400

 1856 12:55:08.234364    FSP RUNTIME 1. 99ffebe0 00000004

 1857 12:55:08.237703    EC HOSTEVENT 2. 99ffebc0 00000008

 1858 12:55:08.241030    POWER STATE 3. 99ffeb80 00000040

 1859 12:55:08.244338    ROMSTAGE    4. 99ffeb60 00000004

 1860 12:55:08.248099    MEM INFO    5. 99ffe9a0 000001b9

 1861 12:55:08.251337    VPD         6. 99ffe920 0000006c

 1862 12:55:08.254616  MTRR: Physical address space:

 1863 12:55:08.261361  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1864 12:55:08.267560  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1865 12:55:08.274052  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1866 12:55:08.277589  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1867 12:55:08.283886  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1868 12:55:08.290686  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1869 12:55:08.297338  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1870 12:55:08.300511  MTRR: Fixed MSR 0x250 0x0606060606060606

 1871 12:55:08.307417  MTRR: Fixed MSR 0x258 0x0606060606060606

 1872 12:55:08.310406  MTRR: Fixed MSR 0x259 0x0000000000000000

 1873 12:55:08.314001  MTRR: Fixed MSR 0x268 0x0606060606060606

 1874 12:55:08.317299  MTRR: Fixed MSR 0x269 0x0606060606060606

 1875 12:55:08.323941  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1876 12:55:08.327181  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1877 12:55:08.330592  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1878 12:55:08.333826  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1879 12:55:08.340317  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1880 12:55:08.343621  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1881 12:55:08.347259  call enable_fixed_mtrr()

 1882 12:55:08.350371  CPU physical address size: 39 bits

 1883 12:55:08.353742  MTRR: default type WB/UC MTRR counts: 6/8.

 1884 12:55:08.356851  MTRR: WB selected as default type.

 1885 12:55:08.363577  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1886 12:55:08.370180  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1887 12:55:08.376668  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1888 12:55:08.383315  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1889 12:55:08.390159  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1890 12:55:08.396407  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1891 12:55:08.399731  MTRR: Fixed MSR 0x250 0x0606060606060606

 1892 12:55:08.402925  MTRR: Fixed MSR 0x258 0x0606060606060606

 1893 12:55:08.410203  MTRR: Fixed MSR 0x259 0x0000000000000000

 1894 12:55:08.413093  MTRR: Fixed MSR 0x268 0x0606060606060606

 1895 12:55:08.416370  MTRR: Fixed MSR 0x269 0x0606060606060606

 1896 12:55:08.419658  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1897 12:55:08.423191  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1898 12:55:08.430002  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1899 12:55:08.432987  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1900 12:55:08.436437  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1901 12:55:08.439537  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1902 12:55:08.439656  

 1903 12:55:08.443192  MTRR check

 1904 12:55:08.443274  Fixed MTRRs   : Enabled

 1905 12:55:08.446907  Variable MTRRs: Enabled

 1906 12:55:08.446989  

 1907 12:55:08.449904  call enable_fixed_mtrr()

 1908 12:55:08.456589  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1909 12:55:08.459860  CPU physical address size: 39 bits

 1910 12:55:08.463228  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1911 12:55:08.469725  MTRR: Fixed MSR 0x250 0x0606060606060606

 1912 12:55:08.473257  MTRR: Fixed MSR 0x258 0x0606060606060606

 1913 12:55:08.476387  MTRR: Fixed MSR 0x259 0x0000000000000000

 1914 12:55:08.479612  MTRR: Fixed MSR 0x268 0x0606060606060606

 1915 12:55:08.486120  MTRR: Fixed MSR 0x269 0x0606060606060606

 1916 12:55:08.489223  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1917 12:55:08.492580  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1918 12:55:08.495988  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1919 12:55:08.502756  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1920 12:55:08.505942  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1921 12:55:08.509340  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1922 12:55:08.512784  MTRR: Fixed MSR 0x250 0x0606060606060606

 1923 12:55:08.515863  call enable_fixed_mtrr()

 1924 12:55:08.518810  MTRR: Fixed MSR 0x258 0x0606060606060606

 1925 12:55:08.525648  MTRR: Fixed MSR 0x259 0x0000000000000000

 1926 12:55:08.529390  MTRR: Fixed MSR 0x268 0x0606060606060606

 1927 12:55:08.532307  MTRR: Fixed MSR 0x269 0x0606060606060606

 1928 12:55:08.535694  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1929 12:55:08.541952  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1930 12:55:08.545784  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1931 12:55:08.548669  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1932 12:55:08.552506  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1933 12:55:08.558744  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1934 12:55:08.562088  CPU physical address size: 39 bits

 1935 12:55:08.565114  call enable_fixed_mtrr()

 1936 12:55:08.569177  MTRR: Fixed MSR 0x250 0x0606060606060606

 1937 12:55:08.572173  MTRR: Fixed MSR 0x258 0x0606060606060606

 1938 12:55:08.575308  MTRR: Fixed MSR 0x259 0x0000000000000000

 1939 12:55:08.578546  MTRR: Fixed MSR 0x268 0x0606060606060606

 1940 12:55:08.585076  MTRR: Fixed MSR 0x269 0x0606060606060606

 1941 12:55:08.588427  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1942 12:55:08.591755  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1943 12:55:08.595011  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1944 12:55:08.601873  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1945 12:55:08.604723  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1946 12:55:08.608429  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1947 12:55:08.611439  MTRR: Fixed MSR 0x250 0x0606060606060606

 1948 12:55:08.614899  call enable_fixed_mtrr()

 1949 12:55:08.618237  MTRR: Fixed MSR 0x258 0x0606060606060606

 1950 12:55:08.624677  MTRR: Fixed MSR 0x259 0x0000000000000000

 1951 12:55:08.627951  MTRR: Fixed MSR 0x268 0x0606060606060606

 1952 12:55:08.631338  MTRR: Fixed MSR 0x269 0x0606060606060606

 1953 12:55:08.634659  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1954 12:55:08.641248  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1955 12:55:08.644900  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1956 12:55:08.647770  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1957 12:55:08.651377  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1958 12:55:08.657847  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1959 12:55:08.661132  CPU physical address size: 39 bits

 1960 12:55:08.664702  call enable_fixed_mtrr()

 1961 12:55:08.667692  MTRR: Fixed MSR 0x250 0x0606060606060606

 1962 12:55:08.671547  MTRR: Fixed MSR 0x258 0x0606060606060606

 1963 12:55:08.674356  MTRR: Fixed MSR 0x259 0x0000000000000000

 1964 12:55:08.680848  MTRR: Fixed MSR 0x268 0x0606060606060606

 1965 12:55:08.684391  MTRR: Fixed MSR 0x269 0x0606060606060606

 1966 12:55:08.687597  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1967 12:55:08.691490  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1968 12:55:08.694585  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1969 12:55:08.700967  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1970 12:55:08.704305  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1971 12:55:08.707409  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1972 12:55:08.714010  MTRR: Fixed MSR 0x250 0x0606060606060606

 1973 12:55:08.714092  call enable_fixed_mtrr()

 1974 12:55:08.720659  MTRR: Fixed MSR 0x258 0x0606060606060606

 1975 12:55:08.723958  MTRR: Fixed MSR 0x259 0x0000000000000000

 1976 12:55:08.727520  MTRR: Fixed MSR 0x268 0x0606060606060606

 1977 12:55:08.731211  MTRR: Fixed MSR 0x269 0x0606060606060606

 1978 12:55:08.733734  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1979 12:55:08.740825  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1980 12:55:08.744058  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1981 12:55:08.747064  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1982 12:55:08.750246  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1983 12:55:08.757366  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1984 12:55:08.760549  CPU physical address size: 39 bits

 1985 12:55:08.763520  call enable_fixed_mtrr()

 1986 12:55:08.766895  CPU physical address size: 39 bits

 1987 12:55:08.770391  CPU physical address size: 39 bits

 1988 12:55:08.773784  CPU physical address size: 39 bits

 1989 12:55:08.776725  CBFS @ c08000 size 3f8000

 1990 12:55:08.780713  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1991 12:55:08.783806  CBFS: Locating 'fallback/payload'

 1992 12:55:08.790878  CBFS: Found @ offset 1c96c0 size 3f798

 1993 12:55:08.794181  Checking segment from ROM address 0xffdd16f8

 1994 12:55:08.797707  Checking segment from ROM address 0xffdd1714

 1995 12:55:08.804351  Loading segment from ROM address 0xffdd16f8

 1996 12:55:08.804434    code (compression=0)

 1997 12:55:08.814287    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1998 12:55:08.824324  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1999 12:55:08.824407  it's not compressed!

 2000 12:55:08.916976  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2001 12:55:08.923551  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2002 12:55:08.927038  Loading segment from ROM address 0xffdd1714

 2003 12:55:08.930008    Entry Point 0x30000000

 2004 12:55:08.933370  Loaded segments

 2005 12:55:08.939981  Finalizing chipset.

 2006 12:55:08.942801  Finalizing SMM.

 2007 12:55:08.945997  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5

 2008 12:55:08.949308  mp_park_aps done after 0 msecs.

 2009 12:55:08.955640  Jumping to boot code at 30000000(99b62000)

 2010 12:55:08.962380  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2011 12:55:08.962463  

 2012 12:55:08.962528  

 2013 12:55:08.962589  

 2014 12:55:08.965799  Starting depthcharge on Helios...

 2015 12:55:08.965880  

 2016 12:55:08.966214  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2017 12:55:08.966311  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2018 12:55:08.966396  Setting prompt string to ['hatch:']
 2019 12:55:08.966482  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2020 12:55:08.975496  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2021 12:55:08.975578  

 2022 12:55:08.982120  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2023 12:55:08.982202  

 2024 12:55:08.989073  board_setup: Info: eMMC controller not present; skipping

 2025 12:55:08.989155  

 2026 12:55:08.992272  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2027 12:55:08.992364  

 2028 12:55:08.998751  board_setup: Info: SDHCI controller not present; skipping

 2029 12:55:08.998859  

 2030 12:55:09.005137  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2031 12:55:09.005221  

 2032 12:55:09.005319  Wipe memory regions:

 2033 12:55:09.005379  

 2034 12:55:09.008626  	[0x00000000001000, 0x000000000a0000)

 2035 12:55:09.008707  

 2036 12:55:09.011925  	[0x00000000100000, 0x00000030000000)

 2037 12:55:09.078454  

 2038 12:55:09.081772  	[0x00000030657430, 0x00000099a2c000)

 2039 12:55:09.218333  

 2040 12:55:09.221801  	[0x00000100000000, 0x0000045e800000)

 2041 12:55:10.604308  

 2042 12:55:10.604461  R8152: Initializing

 2043 12:55:10.604530  

 2044 12:55:10.607281  Version 9 (ocp_data = 6010)

 2045 12:55:10.611705  

 2046 12:55:10.611786  R8152: Done initializing

 2047 12:55:10.611851  

 2048 12:55:10.614882  Adding net device

 2049 12:55:11.224371  

 2050 12:55:11.224529  R8152: Initializing

 2051 12:55:11.224602  

 2052 12:55:11.227389  Version 6 (ocp_data = 5c30)

 2053 12:55:11.227461  

 2054 12:55:11.230820  R8152: Done initializing

 2055 12:55:11.230896  

 2056 12:55:11.234591  net_add_device: Attemp to include the same device

 2057 12:55:11.237895  

 2058 12:55:11.244994  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2059 12:55:11.245078  

 2060 12:55:11.245143  

 2061 12:55:11.245203  

 2062 12:55:11.245498  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2064 12:55:11.346215  hatch: tftpboot 192.168.201.1 9879087/tftp-deploy-13ptv4r2/kernel/bzImage 9879087/tftp-deploy-13ptv4r2/kernel/cmdline 9879087/tftp-deploy-13ptv4r2/ramdisk/ramdisk.cpio.gz

 2065 12:55:11.346402  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2066 12:55:11.346519  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2067 12:55:11.350702  tftpboot 192.168.201.1 9879087/tftp-deploy-13ptv4r2/kernel/bzImaoy-13ptv4r2/kernel/cmdline 9879087/tftp-deploy-13ptv4r2/ramdisk/ramdisk.cpio.gz

 2068 12:55:11.350819  

 2069 12:55:11.350913  Waiting for link

 2070 12:55:11.551828  

 2071 12:55:11.552006  done.

 2072 12:55:11.552090  

 2073 12:55:11.552157  MAC: 00:24:32:50:1a:5f

 2074 12:55:11.552217  

 2075 12:55:11.554493  Sending DHCP discover... done.

 2076 12:55:11.554570  

 2077 12:55:11.557961  Waiting for reply... done.

 2078 12:55:11.558034  

 2079 12:55:11.561278  Sending DHCP request... done.

 2080 12:55:11.561352  

 2081 12:55:11.564513  Waiting for reply... done.

 2082 12:55:11.564586  

 2083 12:55:11.567943  My ip is 192.168.201.21

 2084 12:55:11.568012  

 2085 12:55:11.571348  The DHCP server ip is 192.168.201.1

 2086 12:55:11.571415  

 2087 12:55:11.577864  TFTP server IP predefined by user: 192.168.201.1

 2088 12:55:11.577942  

 2089 12:55:11.584945  Bootfile predefined by user: 9879087/tftp-deploy-13ptv4r2/kernel/bzImage

 2090 12:55:11.585036  

 2091 12:55:11.587846  Sending tftp read request... done.

 2092 12:55:11.587947  

 2093 12:55:11.590769  Waiting for the transfer... 

 2094 12:55:11.590842  

 2095 12:55:12.192973  00000000 ################################################################

 2096 12:55:12.193123  

 2097 12:55:12.709176  00080000 ################################################################

 2098 12:55:12.709350  

 2099 12:55:13.254363  00100000 ################################################################

 2100 12:55:13.254515  

 2101 12:55:13.798324  00180000 ################################################################

 2102 12:55:13.798472  

 2103 12:55:14.368493  00200000 ################################################################

 2104 12:55:14.368637  

 2105 12:55:14.907738  00280000 ################################################################

 2106 12:55:14.907891  

 2107 12:55:15.454330  00300000 ################################################################

 2108 12:55:15.454509  

 2109 12:55:15.986618  00380000 ################################################################

 2110 12:55:15.986805  

 2111 12:55:16.515261  00400000 ################################################################

 2112 12:55:16.515464  

 2113 12:55:17.041656  00480000 ################################################################

 2114 12:55:17.041811  

 2115 12:55:17.558666  00500000 ################################################################

 2116 12:55:17.558878  

 2117 12:55:18.076079  00580000 ################################################################

 2118 12:55:18.076277  

 2119 12:55:18.605525  00600000 ################################################################

 2120 12:55:18.605753  

 2121 12:55:19.122230  00680000 ################################################################

 2122 12:55:19.122432  

 2123 12:55:19.647014  00700000 ################################################################

 2124 12:55:19.647196  

 2125 12:55:20.175717  00780000 ################################################################

 2126 12:55:20.175908  

 2127 12:55:20.702773  00800000 ################################################################

 2128 12:55:20.702966  

 2129 12:55:21.235276  00880000 ################################################################

 2130 12:55:21.235463  

 2131 12:55:21.753459  00900000 ################################################################

 2132 12:55:21.753613  

 2133 12:55:22.267562  00980000 ################################################################

 2134 12:55:22.267720  

 2135 12:55:22.649142  00a00000 ############################################## done.

 2136 12:55:22.649292  

 2137 12:55:22.652173  The bootfile was 10854400 bytes long.

 2138 12:55:22.652257  

 2139 12:55:22.655275  Sending tftp read request... done.

 2140 12:55:22.655359  

 2141 12:55:22.658610  Waiting for the transfer... 

 2142 12:55:22.658721  

 2143 12:55:23.185427  00000000 ################################################################

 2144 12:55:23.185597  

 2145 12:55:23.729881  00080000 ################################################################

 2146 12:55:23.730060  

 2147 12:55:24.274757  00100000 ################################################################

 2148 12:55:24.274917  

 2149 12:55:24.809718  00180000 ################################################################

 2150 12:55:24.809876  

 2151 12:55:25.332978  00200000 ################################################################

 2152 12:55:25.333133  

 2153 12:55:25.863595  00280000 ################################################################

 2154 12:55:25.863788  

 2155 12:55:26.394513  00300000 ################################################################

 2156 12:55:26.394751  

 2157 12:55:26.947047  00380000 ################################################################

 2158 12:55:26.947221  

 2159 12:55:27.493356  00400000 ################################################################

 2160 12:55:27.493551  

 2161 12:55:28.052300  00480000 ################################################################

 2162 12:55:28.052464  

 2163 12:55:28.593182  00500000 ################################################################

 2164 12:55:28.593329  

 2165 12:55:29.001046  00580000 ################################################ done.

 2166 12:55:29.001205  

 2167 12:55:29.004269  Sending tftp read request... done.

 2168 12:55:29.004355  

 2169 12:55:29.007775  Waiting for the transfer... 

 2170 12:55:29.007850  

 2171 12:55:29.011206  00000000 # done.

 2172 12:55:29.011291  

 2173 12:55:29.021303  Command line loaded dynamically from TFTP file: 9879087/tftp-deploy-13ptv4r2/kernel/cmdline

 2174 12:55:29.021388  

 2175 12:55:29.047540  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9879087/extract-nfsrootfs-3c0xcl9t,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2176 12:55:29.047640  

 2177 12:55:29.050750  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2178 12:55:29.056559  

 2179 12:55:29.059962  Shutting down all USB controllers.

 2180 12:55:29.060046  

 2181 12:55:29.060132  Removing current net device

 2182 12:55:29.068370  

 2183 12:55:29.068454  Finalizing coreboot

 2184 12:55:29.068541  

 2185 12:55:29.074909  Exiting depthcharge with code 4 at timestamp: 27453464

 2186 12:55:29.074993  

 2187 12:55:29.075079  

 2188 12:55:29.075160  Starting kernel ...

 2189 12:55:29.075239  

 2190 12:55:29.075316  

 2191 12:55:29.075930  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2192 12:55:29.076067  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2193 12:55:29.076151  Setting prompt string to ['Linux version [0-9]']
 2194 12:55:29.076257  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2195 12:55:29.076361  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2197 12:59:51.077123  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2199 12:59:51.078750  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2201 12:59:51.080011  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2204 12:59:51.082321  end: 2 depthcharge-action (duration 00:05:00) [common]
 2206 12:59:51.084150  Cleaning after the job
 2207 12:59:51.084762  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/ramdisk
 2208 12:59:51.087833  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/kernel
 2209 12:59:51.092721  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/nfsrootfs
 2210 12:59:51.154068  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879087/tftp-deploy-13ptv4r2/modules
 2211 12:59:51.154596  start: 5.1 power-off (timeout 00:00:30) [common]
 2212 12:59:51.154763  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2213 12:59:51.238932  >> Command sent successfully.

 2214 12:59:51.249177  Returned 0 in 0 seconds
 2215 12:59:51.350994  end: 5.1 power-off (duration 00:00:00) [common]
 2217 12:59:51.352762  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2218 12:59:51.354137  Listened to connection for namespace 'common' for up to 1s
 2220 12:59:51.355589  Listened to connection for namespace 'common' for up to 1s
 2221 12:59:52.358396  Finalising connection for namespace 'common'
 2222 12:59:52.359001  Disconnecting from shell: Finalise
 2223 12:59:52.359383  
 2224 12:59:52.460459  end: 5.2 read-feedback (duration 00:00:01) [common]
 2225 12:59:52.460634  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9879087
 2226 12:59:52.597608  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9879087
 2227 12:59:52.597831  JobError: Your job cannot terminate cleanly.