Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:53:50.438207 lava-dispatcher, installed at version: 2023.01
2 12:53:50.438424 start: 0 validate
3 12:53:50.438561 Start time: 2023-04-05 12:53:50.438554+00:00 (UTC)
4 12:53:50.438694 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:53:50.438824 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230331.0%2Famd64%2Finitrd.cpio.gz exists
6 12:53:50.724997 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:53:50.725768 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:53:51.014889 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:53:51.015654 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230331.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:53:54.189078 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:53:54.189821 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:53:54.481910 validate duration: 4.04
14 12:53:54.483256 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:53:54.483757 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:53:54.484200 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:53:54.484689 Not decompressing ramdisk as can be used compressed.
18 12:53:54.485104 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230331.0/amd64/initrd.cpio.gz
19 12:53:54.485445 saving as /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/ramdisk/initrd.cpio.gz
20 12:53:54.485764 total size: 5432106 (5MB)
21 12:53:55.179748 progress 0% (0MB)
22 12:53:55.188038 progress 5% (0MB)
23 12:53:55.194780 progress 10% (0MB)
24 12:53:55.201487 progress 15% (0MB)
25 12:53:55.208669 progress 20% (1MB)
26 12:53:55.213220 progress 25% (1MB)
27 12:53:55.216982 progress 30% (1MB)
28 12:53:55.220344 progress 35% (1MB)
29 12:53:55.223107 progress 40% (2MB)
30 12:53:55.225524 progress 45% (2MB)
31 12:53:55.227895 progress 50% (2MB)
32 12:53:55.230149 progress 55% (2MB)
33 12:53:55.232255 progress 60% (3MB)
34 12:53:55.234154 progress 65% (3MB)
35 12:53:55.236185 progress 70% (3MB)
36 12:53:55.237979 progress 75% (3MB)
37 12:53:55.239598 progress 80% (4MB)
38 12:53:55.241181 progress 85% (4MB)
39 12:53:55.242964 progress 90% (4MB)
40 12:53:55.244407 progress 95% (4MB)
41 12:53:55.245855 progress 100% (5MB)
42 12:53:55.246074 5MB downloaded in 0.76s (6.81MB/s)
43 12:53:55.246242 end: 1.1.1 http-download (duration 00:00:01) [common]
45 12:53:55.246512 end: 1.1 download-retry (duration 00:00:01) [common]
46 12:53:55.246616 start: 1.2 download-retry (timeout 00:09:59) [common]
47 12:53:55.246744 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 12:53:55.246864 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:53:55.246946 saving as /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/kernel/bzImage
50 12:53:55.247015 total size: 10854400 (10MB)
51 12:53:55.247092 No compression specified
52 12:53:55.248267 progress 0% (0MB)
53 12:53:55.250897 progress 5% (0MB)
54 12:53:55.253651 progress 10% (1MB)
55 12:53:55.256217 progress 15% (1MB)
56 12:53:55.258879 progress 20% (2MB)
57 12:53:55.261448 progress 25% (2MB)
58 12:53:55.264140 progress 30% (3MB)
59 12:53:55.266661 progress 35% (3MB)
60 12:53:55.269325 progress 40% (4MB)
61 12:53:55.272036 progress 45% (4MB)
62 12:53:55.274542 progress 50% (5MB)
63 12:53:55.277209 progress 55% (5MB)
64 12:53:55.279775 progress 60% (6MB)
65 12:53:55.282414 progress 65% (6MB)
66 12:53:55.284931 progress 70% (7MB)
67 12:53:55.287552 progress 75% (7MB)
68 12:53:55.290016 progress 80% (8MB)
69 12:53:55.292677 progress 85% (8MB)
70 12:53:55.295345 progress 90% (9MB)
71 12:53:55.297832 progress 95% (9MB)
72 12:53:55.300484 progress 100% (10MB)
73 12:53:55.300614 10MB downloaded in 0.05s (193.15MB/s)
74 12:53:55.300756 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:53:55.300986 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:53:55.301077 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:53:55.301161 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:53:55.301266 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230331.0/amd64/full.rootfs.tar.xz
80 12:53:55.301335 saving as /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/nfsrootfs/full.rootfs.tar
81 12:53:55.301396 total size: 133357532 (127MB)
82 12:53:55.301456 Using unxz to decompress xz
83 12:53:55.304976 progress 0% (0MB)
84 12:53:55.636083 progress 5% (6MB)
85 12:53:55.988232 progress 10% (12MB)
86 12:53:56.265286 progress 15% (19MB)
87 12:53:56.447103 progress 20% (25MB)
88 12:53:56.693017 progress 25% (31MB)
89 12:53:57.031581 progress 30% (38MB)
90 12:53:57.382035 progress 35% (44MB)
91 12:53:57.772430 progress 40% (50MB)
92 12:53:58.150493 progress 45% (57MB)
93 12:53:58.498367 progress 50% (63MB)
94 12:53:58.866649 progress 55% (69MB)
95 12:53:59.220021 progress 60% (76MB)
96 12:53:59.581578 progress 65% (82MB)
97 12:53:59.940226 progress 70% (89MB)
98 12:54:00.299379 progress 75% (95MB)
99 12:54:00.737616 progress 80% (101MB)
100 12:54:01.171668 progress 85% (108MB)
101 12:54:01.446343 progress 90% (114MB)
102 12:54:01.782638 progress 95% (120MB)
103 12:54:02.163620 progress 100% (127MB)
104 12:54:02.169602 127MB downloaded in 6.87s (18.52MB/s)
105 12:54:02.169987 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:54:02.170381 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:54:02.170513 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:54:02.170642 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:54:02.170804 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:54:02.170910 saving as /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/modules/modules.tar
112 12:54:02.171026 total size: 484468 (0MB)
113 12:54:02.171150 Using unxz to decompress xz
114 12:54:02.175479 progress 6% (0MB)
115 12:54:02.176066 progress 13% (0MB)
116 12:54:02.176457 progress 20% (0MB)
117 12:54:02.177696 progress 27% (0MB)
118 12:54:02.179834 progress 33% (0MB)
119 12:54:02.181954 progress 40% (0MB)
120 12:54:02.184396 progress 47% (0MB)
121 12:54:02.186634 progress 54% (0MB)
122 12:54:02.188408 progress 60% (0MB)
123 12:54:02.190368 progress 67% (0MB)
124 12:54:02.192443 progress 74% (0MB)
125 12:54:02.194449 progress 81% (0MB)
126 12:54:02.196326 progress 87% (0MB)
127 12:54:02.198266 progress 94% (0MB)
128 12:54:02.200131 progress 100% (0MB)
129 12:54:02.206190 0MB downloaded in 0.04s (13.14MB/s)
130 12:54:02.206521 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:54:02.206912 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:54:02.207104 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 12:54:02.207246 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 12:54:03.399351 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9879107/extract-nfsrootfs-m3mha37a
136 12:54:03.399562 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
137 12:54:03.399672 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 12:54:03.399811 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf
139 12:54:03.399913 makedir: /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin
140 12:54:03.400000 makedir: /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/tests
141 12:54:03.400083 makedir: /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/results
142 12:54:03.400183 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-add-keys
143 12:54:03.400311 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-add-sources
144 12:54:03.400426 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-background-process-start
145 12:54:03.400543 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-background-process-stop
146 12:54:03.400656 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-common-functions
147 12:54:03.400765 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-echo-ipv4
148 12:54:03.400874 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-install-packages
149 12:54:03.400984 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-installed-packages
150 12:54:03.401091 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-os-build
151 12:54:03.401200 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-probe-channel
152 12:54:03.401309 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-probe-ip
153 12:54:03.401418 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-target-ip
154 12:54:03.401526 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-target-mac
155 12:54:03.401634 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-target-storage
156 12:54:03.401745 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-test-case
157 12:54:03.401855 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-test-event
158 12:54:03.402000 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-test-feedback
159 12:54:03.402109 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-test-raise
160 12:54:03.402217 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-test-reference
161 12:54:03.402325 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-test-runner
162 12:54:03.402432 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-test-set
163 12:54:03.402542 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-test-shell
164 12:54:03.402653 Updating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-install-packages (oe)
165 12:54:03.402773 Updating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/bin/lava-installed-packages (oe)
166 12:54:03.402870 Creating /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/environment
167 12:54:03.402956 LAVA metadata
168 12:54:03.403027 - LAVA_JOB_ID=9879107
169 12:54:03.403144 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:54:03.403245 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 12:54:03.403312 skipped lava-vland-overlay
172 12:54:03.403389 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:54:03.403469 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 12:54:03.403531 skipped lava-multinode-overlay
175 12:54:03.403605 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:54:03.403686 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 12:54:03.403761 Loading test definitions
178 12:54:03.403850 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
179 12:54:03.403924 Using /lava-9879107 at stage 0
180 12:54:03.404180 uuid=9879107_1.5.2.3.1 testdef=None
181 12:54:03.404269 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 12:54:03.404354 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
183 12:54:03.404896 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 12:54:03.405124 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
186 12:54:03.405680 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 12:54:03.405912 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
189 12:54:03.406476 runner path: /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/0/tests/0_dmesg test_uuid 9879107_1.5.2.3.1
190 12:54:03.406619 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 12:54:03.406846 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
193 12:54:03.406919 Using /lava-9879107 at stage 1
194 12:54:03.407275 uuid=9879107_1.5.2.3.5 testdef=None
195 12:54:03.407364 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 12:54:03.407448 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
197 12:54:03.407880 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 12:54:03.408097 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
200 12:54:03.408656 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 12:54:03.408886 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
203 12:54:03.409424 runner path: /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/1/tests/1_bootrr test_uuid 9879107_1.5.2.3.5
204 12:54:03.409561 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 12:54:03.409768 Creating lava-test-runner.conf files
207 12:54:03.409832 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/0 for stage 0
208 12:54:03.409953 - 0_dmesg
209 12:54:03.410028 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879107/lava-overlay-62_vkdvf/lava-9879107/1 for stage 1
210 12:54:03.410111 - 1_bootrr
211 12:54:03.410201 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 12:54:03.410287 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
213 12:54:03.417375 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 12:54:03.417526 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
215 12:54:03.417622 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:54:03.417711 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 12:54:03.417811 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
218 12:54:03.530739 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:54:03.531168 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
220 12:54:03.531291 extracting modules file /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879107/extract-nfsrootfs-m3mha37a
221 12:54:03.542218 extracting modules file /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879107/extract-overlay-ramdisk-g4jxgukd/ramdisk
222 12:54:03.553205 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:54:03.553379 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
224 12:54:03.553482 [common] Applying overlay to NFS
225 12:54:03.553558 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9879107/compress-overlay-g18670ys/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9879107/extract-nfsrootfs-m3mha37a
226 12:54:03.559263 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 12:54:03.559407 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
228 12:54:03.559506 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:54:03.559600 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
230 12:54:03.559684 Building ramdisk /var/lib/lava/dispatcher/tmp/9879107/extract-overlay-ramdisk-g4jxgukd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9879107/extract-overlay-ramdisk-g4jxgukd/ramdisk
231 12:54:03.612410 >> 30347 blocks
232 12:54:04.190929 rename /var/lib/lava/dispatcher/tmp/9879107/extract-overlay-ramdisk-g4jxgukd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/ramdisk/ramdisk.cpio.gz
233 12:54:04.191438 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 12:54:04.191564 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
235 12:54:04.191669 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
236 12:54:04.191764 No mkimage arch provided, not using FIT.
237 12:54:04.191853 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:54:04.191938 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:54:04.192045 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
240 12:54:04.192138 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
241 12:54:04.192221 No LXC device requested
242 12:54:04.192308 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:54:04.192397 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
244 12:54:04.192482 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:54:04.192560 Checking files for TFTP limit of 4294967296 bytes.
246 12:54:04.192969 end: 1 tftp-deploy (duration 00:00:10) [common]
247 12:54:04.193080 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:54:04.193173 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:54:04.193299 substitutions:
250 12:54:04.193369 - {DTB}: None
251 12:54:04.193433 - {INITRD}: 9879107/tftp-deploy-5t6wizud/ramdisk/ramdisk.cpio.gz
252 12:54:04.193494 - {KERNEL}: 9879107/tftp-deploy-5t6wizud/kernel/bzImage
253 12:54:04.193553 - {LAVA_MAC}: None
254 12:54:04.193611 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9879107/extract-nfsrootfs-m3mha37a
255 12:54:04.193669 - {NFS_SERVER_IP}: 192.168.201.1
256 12:54:04.193728 - {PRESEED_CONFIG}: None
257 12:54:04.193785 - {PRESEED_LOCAL}: None
258 12:54:04.193842 - {RAMDISK}: 9879107/tftp-deploy-5t6wizud/ramdisk/ramdisk.cpio.gz
259 12:54:04.193899 - {ROOT_PART}: None
260 12:54:04.193955 - {ROOT}: None
261 12:54:04.194011 - {SERVER_IP}: 192.168.201.1
262 12:54:04.194067 - {TEE}: None
263 12:54:04.194122 Parsed boot commands:
264 12:54:04.194177 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:54:04.194330 Parsed boot commands: tftpboot 192.168.201.1 9879107/tftp-deploy-5t6wizud/kernel/bzImage 9879107/tftp-deploy-5t6wizud/kernel/cmdline 9879107/tftp-deploy-5t6wizud/ramdisk/ramdisk.cpio.gz
266 12:54:04.194420 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:54:04.194503 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:54:04.194595 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:54:04.194682 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:54:04.194751 Not connected, no need to disconnect.
271 12:54:04.194826 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:54:04.194910 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:54:04.194978 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
274 12:54:04.198366 Setting prompt string to ['lava-test: # ']
275 12:54:04.198751 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:54:04.198872 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:54:04.198975 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:54:04.199133 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:54:04.199358 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
280 12:54:09.335989 >> Command sent successfully.
281 12:54:09.338192 Returned 0 in 5 seconds
282 12:54:09.438978 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 12:54:09.439420 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 12:54:09.439552 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 12:54:09.439675 Setting prompt string to 'Starting depthcharge on Voema...'
287 12:54:09.439774 Changing prompt to 'Starting depthcharge on Voema...'
288 12:54:09.439869 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 12:54:09.440126 [Enter `^Ec?' for help]
290 12:54:11.001220
291 12:54:11.001430
292 12:54:11.011867 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 12:54:11.014933 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
294 12:54:11.021507 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 12:54:11.025022 CPU: AES supported, TXT NOT supported, VT supported
296 12:54:11.031630 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 12:54:11.035001 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 12:54:11.042188 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 12:54:11.045166 VBOOT: Loading verstage.
300 12:54:11.048850 FMAP: Found "FLASH" version 1.1 at 0x1804000.
301 12:54:11.055382 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 12:54:11.058666 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 12:54:11.068534 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 12:54:11.074797 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 12:54:11.074964
306 12:54:11.075079
307 12:54:11.085553 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 12:54:11.101935 Probing TPM: . done!
309 12:54:11.105239 TPM ready after 0 ms
310 12:54:11.108878 Connected to device vid:did:rid of 1ae0:0028:00
311 12:54:11.120114 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
312 12:54:11.126427 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 12:54:11.129745 Initialized TPM device CR50 revision 0
314 12:54:11.187323 tlcl_send_startup: Startup return code is 0
315 12:54:11.187484 TPM: setup succeeded
316 12:54:11.201480 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 12:54:11.216054 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 12:54:11.229075 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 12:54:11.238309 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 12:54:11.242054 Chrome EC: UHEPI supported
321 12:54:11.245367 Phase 1
322 12:54:11.248599 FMAP: area GBB found @ 1805000 (458752 bytes)
323 12:54:11.258699 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 12:54:11.265049 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 12:54:11.272000 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 12:54:11.278937 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 12:54:11.282245 Recovery requested (1009000e)
328 12:54:11.285241 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 12:54:11.296850 tlcl_extend: response is 0
330 12:54:11.303307 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 12:54:11.313061 tlcl_extend: response is 0
332 12:54:11.319713 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 12:54:11.326536 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 12:54:11.333114 BS: verstage times (exec / console): total (unknown) / 142 ms
335 12:54:11.333322
336 12:54:11.333433
337 12:54:11.346021 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 12:54:11.352895 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 12:54:11.356095 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 12:54:11.359581 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 12:54:11.365966 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 12:54:11.369248 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 12:54:11.372969 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 12:54:11.376041 TCO_STS: 0000 0000
345 12:54:11.379546 GEN_PMCON: d0015038 00002200
346 12:54:11.382464 GBLRST_CAUSE: 00000000 00000000
347 12:54:11.385704 HPR_CAUSE0: 00000000
348 12:54:11.385860 prev_sleep_state 5
349 12:54:11.388843 Boot Count incremented to 16276
350 12:54:11.395805 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:54:11.402290 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:54:11.412505 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:54:11.418628 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 12:54:11.421963 Chrome EC: UHEPI supported
355 12:54:11.428726 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 12:54:11.440116 Probing TPM: done!
357 12:54:11.446636 Connected to device vid:did:rid of 1ae0:0028:00
358 12:54:11.456516 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
359 12:54:11.459849 Initialized TPM device CR50 revision 0
360 12:54:11.474946 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 12:54:11.481777 MRC: Hash idx 0x100b comparison successful.
362 12:54:11.484687 MRC cache found, size faa8
363 12:54:11.484825 bootmode is set to: 2
364 12:54:11.487953 SPD index = 2
365 12:54:11.494676 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 12:54:11.497955 SPD: module type is LPDDR4X
367 12:54:11.501430 SPD: module part number is MT53D1G64D4NW-046
368 12:54:11.507700 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
369 12:54:11.511320 SPD: device width 16 bits, bus width 16 bits
370 12:54:11.517961 SPD: module size is 2048 MB (per channel)
371 12:54:11.947833 CBMEM:
372 12:54:11.951162 IMD: root @ 0x76fff000 254 entries.
373 12:54:11.954216 IMD: root @ 0x76ffec00 62 entries.
374 12:54:11.957854 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 12:54:11.964651 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 12:54:11.967764 External stage cache:
377 12:54:11.970982 IMD: root @ 0x7b3ff000 254 entries.
378 12:54:11.974574 IMD: root @ 0x7b3fec00 62 entries.
379 12:54:11.988860 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 12:54:11.995503 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 12:54:12.002376 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 12:54:12.016450 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 12:54:12.022292 cse_lite: Skip switching to RW in the recovery path
384 12:54:12.022449 8 DIMMs found
385 12:54:12.025947 SMM Memory Map
386 12:54:12.028992 SMRAM : 0x7b000000 0x800000
387 12:54:12.032190 Subregion 0: 0x7b000000 0x200000
388 12:54:12.035654 Subregion 1: 0x7b200000 0x200000
389 12:54:12.038997 Subregion 2: 0x7b400000 0x400000
390 12:54:12.039146 top_of_ram = 0x77000000
391 12:54:12.045730 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 12:54:12.052479 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 12:54:12.055776 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 12:54:12.061864 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 12:54:12.068565 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 12:54:12.075191 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 12:54:12.085401 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 12:54:12.092719 Processing 211 relocs. Offset value of 0x74c0b000
399 12:54:12.098870 BS: romstage times (exec / console): total (unknown) / 277 ms
400 12:54:12.104675
401 12:54:12.104853
402 12:54:12.114705 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 12:54:12.118065 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 12:54:12.128155 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 12:54:12.134506 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 12:54:12.141386 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 12:54:12.148053 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 12:54:12.191589 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 12:54:12.197806 Processing 5008 relocs. Offset value of 0x75d98000
410 12:54:12.201613 BS: postcar times (exec / console): total (unknown) / 59 ms
411 12:54:12.204234
412 12:54:12.204341
413 12:54:12.214288 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 12:54:12.214426 Normal boot
415 12:54:12.217688 FW_CONFIG value is 0x804c02
416 12:54:12.221070 PCI: 00:07.0 disabled by fw_config
417 12:54:12.224224 PCI: 00:07.1 disabled by fw_config
418 12:54:12.227402 PCI: 00:0d.2 disabled by fw_config
419 12:54:12.234192 PCI: 00:1c.7 disabled by fw_config
420 12:54:12.237784 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 12:54:12.244482 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 12:54:12.250605 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 12:54:12.254168 GENERIC: 0.0 disabled by fw_config
424 12:54:12.257029 GENERIC: 1.0 disabled by fw_config
425 12:54:12.260455 fw_config match found: DB_USB=USB3_ACTIVE
426 12:54:12.264059 fw_config match found: DB_USB=USB3_ACTIVE
427 12:54:12.270523 fw_config match found: DB_USB=USB3_ACTIVE
428 12:54:12.273919 fw_config match found: DB_USB=USB3_ACTIVE
429 12:54:12.277065 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 12:54:12.287166 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 12:54:12.293576 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 12:54:12.300311 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 12:54:12.306295 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 12:54:12.309816 microcode: Update skipped, already up-to-date
435 12:54:12.316194 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 12:54:12.344830 Detected 4 core, 8 thread CPU.
437 12:54:12.348053 Setting up SMI for CPU
438 12:54:12.352216 IED base = 0x7b400000
439 12:54:12.352359 IED size = 0x00400000
440 12:54:12.354756 Will perform SMM setup.
441 12:54:12.361415 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
442 12:54:12.367824 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 12:54:12.374549 Processing 16 relocs. Offset value of 0x00030000
444 12:54:12.377782 Attempting to start 7 APs
445 12:54:12.380909 Waiting for 10ms after sending INIT.
446 12:54:12.397120 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
447 12:54:12.400253 AP: slot 4 apic_id 5.
448 12:54:12.403896 AP: slot 5 apic_id 4.
449 12:54:12.403997 AP: slot 6 apic_id 2.
450 12:54:12.406884 AP: slot 2 apic_id 3.
451 12:54:12.407001 done.
452 12:54:12.410067 AP: slot 3 apic_id 6.
453 12:54:12.410200 AP: slot 7 apic_id 7.
454 12:54:12.417002 Waiting for 2nd SIPI to complete...done.
455 12:54:12.423267 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 12:54:12.430025 Processing 13 relocs. Offset value of 0x00038000
457 12:54:12.430177 Unable to locate Global NVS
458 12:54:12.439907 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 12:54:12.443265 Installing permanent SMM handler to 0x7b000000
460 12:54:12.453245 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 12:54:12.456870 Processing 794 relocs. Offset value of 0x7b010000
462 12:54:12.466978 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 12:54:12.469810 Processing 13 relocs. Offset value of 0x7b008000
464 12:54:12.476293 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 12:54:12.482878 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 12:54:12.486765 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 12:54:12.492966 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 12:54:12.499512 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 12:54:12.506771 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 12:54:12.512742 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 12:54:12.512895 Unable to locate Global NVS
472 12:54:12.523272 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 12:54:12.526038 Clearing SMI status registers
474 12:54:12.526165 SMI_STS: PM1
475 12:54:12.529838 PM1_STS: PWRBTN
476 12:54:12.536031 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 12:54:12.539609 In relocation handler: CPU 0
478 12:54:12.542618 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 12:54:12.549390 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 12:54:12.549541 Relocation complete.
481 12:54:12.559372 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 12:54:12.562470 In relocation handler: CPU 1
483 12:54:12.565652 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 12:54:12.565763 Relocation complete.
485 12:54:12.575339 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
486 12:54:12.579243 In relocation handler: CPU 7
487 12:54:12.582001 New SMBASE=0x7affe400 IEDBASE=0x7b400000
488 12:54:12.582109 Relocation complete.
489 12:54:12.592215 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
490 12:54:12.592357 In relocation handler: CPU 3
491 12:54:12.598566 New SMBASE=0x7afff400 IEDBASE=0x7b400000
492 12:54:12.601872 Writing SMRR. base = 0x7b000006, mask=0xff800c00
493 12:54:12.605240 Relocation complete.
494 12:54:12.611931 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
495 12:54:12.615638 In relocation handler: CPU 2
496 12:54:12.618895 New SMBASE=0x7afff800 IEDBASE=0x7b400000
497 12:54:12.621842 Relocation complete.
498 12:54:12.629020 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
499 12:54:12.632217 In relocation handler: CPU 6
500 12:54:12.634853 New SMBASE=0x7affe800 IEDBASE=0x7b400000
501 12:54:12.642183 Writing SMRR. base = 0x7b000006, mask=0xff800c00
502 12:54:12.642326 Relocation complete.
503 12:54:12.648617 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
504 12:54:12.651672 In relocation handler: CPU 5
505 12:54:12.658060 New SMBASE=0x7affec00 IEDBASE=0x7b400000
506 12:54:12.661600 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 12:54:12.664757 Relocation complete.
508 12:54:12.671286 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
509 12:54:12.674653 In relocation handler: CPU 4
510 12:54:12.678030 New SMBASE=0x7afff000 IEDBASE=0x7b400000
511 12:54:12.681600 Relocation complete.
512 12:54:12.681704 Initializing CPU #0
513 12:54:12.684419 CPU: vendor Intel device 806c1
514 12:54:12.691689 CPU: family 06, model 8c, stepping 01
515 12:54:12.691816 Clearing out pending MCEs
516 12:54:12.694428 Setting up local APIC...
517 12:54:12.697808 apic_id: 0x00 done.
518 12:54:12.700874 Turbo is available but hidden
519 12:54:12.704663 Turbo is available and visible
520 12:54:12.707741 microcode: Update skipped, already up-to-date
521 12:54:12.710806 CPU #0 initialized
522 12:54:12.710905 Initializing CPU #5
523 12:54:12.714539 Initializing CPU #4
524 12:54:12.717602 CPU: vendor Intel device 806c1
525 12:54:12.721028 CPU: family 06, model 8c, stepping 01
526 12:54:12.724238 CPU: vendor Intel device 806c1
527 12:54:12.727326 CPU: family 06, model 8c, stepping 01
528 12:54:12.730907 Initializing CPU #7
529 12:54:12.731016 Initializing CPU #3
530 12:54:12.734220 CPU: vendor Intel device 806c1
531 12:54:12.740658 CPU: family 06, model 8c, stepping 01
532 12:54:12.740759 CPU: vendor Intel device 806c1
533 12:54:12.747489 CPU: family 06, model 8c, stepping 01
534 12:54:12.747621 Clearing out pending MCEs
535 12:54:12.750487 Clearing out pending MCEs
536 12:54:12.753796 Setting up local APIC...
537 12:54:12.756997 Initializing CPU #2
538 12:54:12.757113 Initializing CPU #6
539 12:54:12.760486 CPU: vendor Intel device 806c1
540 12:54:12.763671 CPU: family 06, model 8c, stepping 01
541 12:54:12.767670 CPU: vendor Intel device 806c1
542 12:54:12.770727 CPU: family 06, model 8c, stepping 01
543 12:54:12.774294 Clearing out pending MCEs
544 12:54:12.777658 Clearing out pending MCEs
545 12:54:12.780916 Setting up local APIC...
546 12:54:12.781012 Clearing out pending MCEs
547 12:54:12.784365 Clearing out pending MCEs
548 12:54:12.787846 Setting up local APIC...
549 12:54:12.790877 Setting up local APIC...
550 12:54:12.790983 apic_id: 0x07 done.
551 12:54:12.794125 Setting up local APIC...
552 12:54:12.797464 apic_id: 0x03 done.
553 12:54:12.800810 Setting up local APIC...
554 12:54:12.800904 apic_id: 0x06 done.
555 12:54:12.807376 microcode: Update skipped, already up-to-date
556 12:54:12.810595 microcode: Update skipped, already up-to-date
557 12:54:12.813885 CPU #7 initialized
558 12:54:12.813979 CPU #3 initialized
559 12:54:12.817570 apic_id: 0x05 done.
560 12:54:12.817673 apic_id: 0x04 done.
561 12:54:12.823852 microcode: Update skipped, already up-to-date
562 12:54:12.827188 microcode: Update skipped, already up-to-date
563 12:54:12.830430 CPU #4 initialized
564 12:54:12.830518 CPU #5 initialized
565 12:54:12.834045 Initializing CPU #1
566 12:54:12.837797 apic_id: 0x02 done.
567 12:54:12.840774 microcode: Update skipped, already up-to-date
568 12:54:12.843616 CPU: vendor Intel device 806c1
569 12:54:12.847053 CPU: family 06, model 8c, stepping 01
570 12:54:12.850341 Clearing out pending MCEs
571 12:54:12.853773 CPU #2 initialized
572 12:54:12.856931 microcode: Update skipped, already up-to-date
573 12:54:12.860380 Setting up local APIC...
574 12:54:12.860498 CPU #6 initialized
575 12:54:12.863827 apic_id: 0x01 done.
576 12:54:12.866759 microcode: Update skipped, already up-to-date
577 12:54:12.870039 CPU #1 initialized
578 12:54:12.873820 bsp_do_flight_plan done after 454 msecs.
579 12:54:12.877156 CPU: frequency set to 4400 MHz
580 12:54:12.880046 Enabling SMIs.
581 12:54:12.886658 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
582 12:54:12.901295 SATAXPCIE1 indicates PCIe NVMe is present
583 12:54:12.905032 Probing TPM: done!
584 12:54:12.908167 Connected to device vid:did:rid of 1ae0:0028:00
585 12:54:12.918510 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
586 12:54:12.921808 Initialized TPM device CR50 revision 0
587 12:54:12.925363 Enabling S0i3.4
588 12:54:12.931637 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 12:54:12.935373 Found a VBT of 8704 bytes after decompression
590 12:54:12.941453 cse_lite: CSE RO boot. HybridStorageMode disabled
591 12:54:12.948359 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 12:54:13.023455 FSPS returned 0
593 12:54:13.027031 Executing Phase 1 of FspMultiPhaseSiInit
594 12:54:13.036818 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 12:54:13.040253 port C0 DISC req: usage 1 usb3 1 usb2 5
596 12:54:13.043212 Raw Buffer output 0 00000511
597 12:54:13.046480 Raw Buffer output 1 00000000
598 12:54:13.050223 pmc_send_ipc_cmd succeeded
599 12:54:13.056880 port C1 DISC req: usage 1 usb3 2 usb2 3
600 12:54:13.057040 Raw Buffer output 0 00000321
601 12:54:13.060030 Raw Buffer output 1 00000000
602 12:54:13.064034 pmc_send_ipc_cmd succeeded
603 12:54:13.069323 Detected 4 core, 8 thread CPU.
604 12:54:13.072845 Detected 4 core, 8 thread CPU.
605 12:54:13.273162 Display FSP Version Info HOB
606 12:54:13.275849 Reference Code - CPU = a.0.4c.31
607 12:54:13.279650 uCode Version = 0.0.0.86
608 12:54:13.282796 TXT ACM version = ff.ff.ff.ffff
609 12:54:13.286111 Reference Code - ME = a.0.4c.31
610 12:54:13.289351 MEBx version = 0.0.0.0
611 12:54:13.293350 ME Firmware Version = Consumer SKU
612 12:54:13.295886 Reference Code - PCH = a.0.4c.31
613 12:54:13.299411 PCH-CRID Status = Disabled
614 12:54:13.302518 PCH-CRID Original Value = ff.ff.ff.ffff
615 12:54:13.305948 PCH-CRID New Value = ff.ff.ff.ffff
616 12:54:13.309125 OPROM - RST - RAID = ff.ff.ff.ffff
617 12:54:13.312781 PCH Hsio Version = 4.0.0.0
618 12:54:13.316084 Reference Code - SA - System Agent = a.0.4c.31
619 12:54:13.318961 Reference Code - MRC = 2.0.0.1
620 12:54:13.322559 SA - PCIe Version = a.0.4c.31
621 12:54:13.326113 SA-CRID Status = Disabled
622 12:54:13.329011 SA-CRID Original Value = 0.0.0.1
623 12:54:13.332495 SA-CRID New Value = 0.0.0.1
624 12:54:13.335627 OPROM - VBIOS = ff.ff.ff.ffff
625 12:54:13.339111 IO Manageability Engine FW Version = 11.1.4.0
626 12:54:13.342176 PHY Build Version = 0.0.0.e0
627 12:54:13.345595 Thunderbolt(TM) FW Version = 0.0.0.0
628 12:54:13.353645 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 12:54:13.353824 ITSS IRQ Polarities Before:
630 12:54:13.357171 IPC0: 0xffffffff
631 12:54:13.357308 IPC1: 0xffffffff
632 12:54:13.360117 IPC2: 0xffffffff
633 12:54:13.363779 IPC3: 0xffffffff
634 12:54:13.363901 ITSS IRQ Polarities After:
635 12:54:13.366721 IPC0: 0xffffffff
636 12:54:13.366853 IPC1: 0xffffffff
637 12:54:13.370091 IPC2: 0xffffffff
638 12:54:13.370208 IPC3: 0xffffffff
639 12:54:13.376872 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 12:54:13.386800 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 12:54:13.399978 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 12:54:13.413233 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 12:54:13.419662 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
644 12:54:13.419818 Enumerating buses...
645 12:54:13.426155 Show all devs... Before device enumeration.
646 12:54:13.426315 Root Device: enabled 1
647 12:54:13.429466 DOMAIN: 0000: enabled 1
648 12:54:13.433035 CPU_CLUSTER: 0: enabled 1
649 12:54:13.436290 PCI: 00:00.0: enabled 1
650 12:54:13.436432 PCI: 00:02.0: enabled 1
651 12:54:13.439522 PCI: 00:04.0: enabled 1
652 12:54:13.442840 PCI: 00:05.0: enabled 1
653 12:54:13.446581 PCI: 00:06.0: enabled 0
654 12:54:13.446683 PCI: 00:07.0: enabled 0
655 12:54:13.449132 PCI: 00:07.1: enabled 0
656 12:54:13.452674 PCI: 00:07.2: enabled 0
657 12:54:13.455837 PCI: 00:07.3: enabled 0
658 12:54:13.455980 PCI: 00:08.0: enabled 1
659 12:54:13.458953 PCI: 00:09.0: enabled 0
660 12:54:13.462591 PCI: 00:0a.0: enabled 0
661 12:54:13.462692 PCI: 00:0d.0: enabled 1
662 12:54:13.465611 PCI: 00:0d.1: enabled 0
663 12:54:13.468907 PCI: 00:0d.2: enabled 0
664 12:54:13.472538 PCI: 00:0d.3: enabled 0
665 12:54:13.472639 PCI: 00:0e.0: enabled 0
666 12:54:13.475567 PCI: 00:10.2: enabled 1
667 12:54:13.479406 PCI: 00:10.6: enabled 0
668 12:54:13.482149 PCI: 00:10.7: enabled 0
669 12:54:13.482249 PCI: 00:12.0: enabled 0
670 12:54:13.485675 PCI: 00:12.6: enabled 0
671 12:54:13.488803 PCI: 00:13.0: enabled 0
672 12:54:13.491801 PCI: 00:14.0: enabled 1
673 12:54:13.491898 PCI: 00:14.1: enabled 0
674 12:54:13.495842 PCI: 00:14.2: enabled 1
675 12:54:13.498408 PCI: 00:14.3: enabled 1
676 12:54:13.501872 PCI: 00:15.0: enabled 1
677 12:54:13.501972 PCI: 00:15.1: enabled 1
678 12:54:13.505347 PCI: 00:15.2: enabled 1
679 12:54:13.508483 PCI: 00:15.3: enabled 1
680 12:54:13.512018 PCI: 00:16.0: enabled 1
681 12:54:13.512128 PCI: 00:16.1: enabled 0
682 12:54:13.515107 PCI: 00:16.2: enabled 0
683 12:54:13.518897 PCI: 00:16.3: enabled 0
684 12:54:13.522352 PCI: 00:16.4: enabled 0
685 12:54:13.522510 PCI: 00:16.5: enabled 0
686 12:54:13.524988 PCI: 00:17.0: enabled 1
687 12:54:13.528455 PCI: 00:19.0: enabled 0
688 12:54:13.528560 PCI: 00:19.1: enabled 1
689 12:54:13.532060 PCI: 00:19.2: enabled 0
690 12:54:13.534817 PCI: 00:1c.0: enabled 1
691 12:54:13.538553 PCI: 00:1c.1: enabled 0
692 12:54:13.538653 PCI: 00:1c.2: enabled 0
693 12:54:13.541526 PCI: 00:1c.3: enabled 0
694 12:54:13.545555 PCI: 00:1c.4: enabled 0
695 12:54:13.548053 PCI: 00:1c.5: enabled 0
696 12:54:13.548158 PCI: 00:1c.6: enabled 1
697 12:54:13.551931 PCI: 00:1c.7: enabled 0
698 12:54:13.555160 PCI: 00:1d.0: enabled 1
699 12:54:13.558955 PCI: 00:1d.1: enabled 0
700 12:54:13.559075 PCI: 00:1d.2: enabled 1
701 12:54:13.561320 PCI: 00:1d.3: enabled 0
702 12:54:13.565009 PCI: 00:1e.0: enabled 1
703 12:54:13.568223 PCI: 00:1e.1: enabled 0
704 12:54:13.568319 PCI: 00:1e.2: enabled 1
705 12:54:13.571844 PCI: 00:1e.3: enabled 1
706 12:54:13.574721 PCI: 00:1f.0: enabled 1
707 12:54:13.574840 PCI: 00:1f.1: enabled 0
708 12:54:13.578380 PCI: 00:1f.2: enabled 1
709 12:54:13.581224 PCI: 00:1f.3: enabled 1
710 12:54:13.584547 PCI: 00:1f.4: enabled 0
711 12:54:13.584691 PCI: 00:1f.5: enabled 1
712 12:54:13.587971 PCI: 00:1f.6: enabled 0
713 12:54:13.591577 PCI: 00:1f.7: enabled 0
714 12:54:13.594773 APIC: 00: enabled 1
715 12:54:13.594882 GENERIC: 0.0: enabled 1
716 12:54:13.597713 GENERIC: 0.0: enabled 1
717 12:54:13.601194 GENERIC: 1.0: enabled 1
718 12:54:13.601292 GENERIC: 0.0: enabled 1
719 12:54:13.604429 GENERIC: 1.0: enabled 1
720 12:54:13.607771 USB0 port 0: enabled 1
721 12:54:13.611332 GENERIC: 0.0: enabled 1
722 12:54:13.611434 USB0 port 0: enabled 1
723 12:54:13.614492 GENERIC: 0.0: enabled 1
724 12:54:13.617600 I2C: 00:1a: enabled 1
725 12:54:13.621594 I2C: 00:31: enabled 1
726 12:54:13.621695 I2C: 00:32: enabled 1
727 12:54:13.624113 I2C: 00:10: enabled 1
728 12:54:13.628026 I2C: 00:15: enabled 1
729 12:54:13.628128 GENERIC: 0.0: enabled 0
730 12:54:13.630994 GENERIC: 1.0: enabled 0
731 12:54:13.633997 GENERIC: 0.0: enabled 1
732 12:54:13.634119 SPI: 00: enabled 1
733 12:54:13.637623 SPI: 00: enabled 1
734 12:54:13.640818 PNP: 0c09.0: enabled 1
735 12:54:13.640938 GENERIC: 0.0: enabled 1
736 12:54:13.644353 USB3 port 0: enabled 1
737 12:54:13.647729 USB3 port 1: enabled 1
738 12:54:13.647883 USB3 port 2: enabled 0
739 12:54:13.650984 USB3 port 3: enabled 0
740 12:54:13.654276 USB2 port 0: enabled 0
741 12:54:13.657270 USB2 port 1: enabled 1
742 12:54:13.657393 USB2 port 2: enabled 1
743 12:54:13.660619 USB2 port 3: enabled 0
744 12:54:13.664516 USB2 port 4: enabled 1
745 12:54:13.664638 USB2 port 5: enabled 0
746 12:54:13.667374 USB2 port 6: enabled 0
747 12:54:13.671160 USB2 port 7: enabled 0
748 12:54:13.674066 USB2 port 8: enabled 0
749 12:54:13.674192 USB2 port 9: enabled 0
750 12:54:13.677281 USB3 port 0: enabled 0
751 12:54:13.680633 USB3 port 1: enabled 1
752 12:54:13.680762 USB3 port 2: enabled 0
753 12:54:13.683763 USB3 port 3: enabled 0
754 12:54:13.687281 GENERIC: 0.0: enabled 1
755 12:54:13.690414 GENERIC: 1.0: enabled 1
756 12:54:13.690540 APIC: 01: enabled 1
757 12:54:13.693856 APIC: 03: enabled 1
758 12:54:13.693974 APIC: 06: enabled 1
759 12:54:13.697194 APIC: 05: enabled 1
760 12:54:13.700525 APIC: 04: enabled 1
761 12:54:13.700661 APIC: 02: enabled 1
762 12:54:13.703851 APIC: 07: enabled 1
763 12:54:13.707127 Compare with tree...
764 12:54:13.707218 Root Device: enabled 1
765 12:54:13.710472 DOMAIN: 0000: enabled 1
766 12:54:13.714220 PCI: 00:00.0: enabled 1
767 12:54:13.717050 PCI: 00:02.0: enabled 1
768 12:54:13.717148 PCI: 00:04.0: enabled 1
769 12:54:13.720325 GENERIC: 0.0: enabled 1
770 12:54:13.723589 PCI: 00:05.0: enabled 1
771 12:54:13.726857 PCI: 00:06.0: enabled 0
772 12:54:13.730107 PCI: 00:07.0: enabled 0
773 12:54:13.730206 GENERIC: 0.0: enabled 1
774 12:54:13.733529 PCI: 00:07.1: enabled 0
775 12:54:13.737163 GENERIC: 1.0: enabled 1
776 12:54:13.740558 PCI: 00:07.2: enabled 0
777 12:54:13.743707 GENERIC: 0.0: enabled 1
778 12:54:13.747023 PCI: 00:07.3: enabled 0
779 12:54:13.747155 GENERIC: 1.0: enabled 1
780 12:54:13.750602 PCI: 00:08.0: enabled 1
781 12:54:13.753134 PCI: 00:09.0: enabled 0
782 12:54:13.756578 PCI: 00:0a.0: enabled 0
783 12:54:13.759997 PCI: 00:0d.0: enabled 1
784 12:54:13.760102 USB0 port 0: enabled 1
785 12:54:13.763496 USB3 port 0: enabled 1
786 12:54:13.766429 USB3 port 1: enabled 1
787 12:54:13.770204 USB3 port 2: enabled 0
788 12:54:13.773422 USB3 port 3: enabled 0
789 12:54:13.773519 PCI: 00:0d.1: enabled 0
790 12:54:13.776652 PCI: 00:0d.2: enabled 0
791 12:54:13.780006 GENERIC: 0.0: enabled 1
792 12:54:13.783021 PCI: 00:0d.3: enabled 0
793 12:54:13.786584 PCI: 00:0e.0: enabled 0
794 12:54:13.786693 PCI: 00:10.2: enabled 1
795 12:54:13.789742 PCI: 00:10.6: enabled 0
796 12:54:13.793284 PCI: 00:10.7: enabled 0
797 12:54:13.796473 PCI: 00:12.0: enabled 0
798 12:54:13.799672 PCI: 00:12.6: enabled 0
799 12:54:13.799768 PCI: 00:13.0: enabled 0
800 12:54:13.803088 PCI: 00:14.0: enabled 1
801 12:54:13.806534 USB0 port 0: enabled 1
802 12:54:13.809839 USB2 port 0: enabled 0
803 12:54:13.812718 USB2 port 1: enabled 1
804 12:54:13.816111 USB2 port 2: enabled 1
805 12:54:13.816210 USB2 port 3: enabled 0
806 12:54:13.819479 USB2 port 4: enabled 1
807 12:54:13.822859 USB2 port 5: enabled 0
808 12:54:13.826160 USB2 port 6: enabled 0
809 12:54:13.829510 USB2 port 7: enabled 0
810 12:54:13.829633 USB2 port 8: enabled 0
811 12:54:13.833014 USB2 port 9: enabled 0
812 12:54:13.836210 USB3 port 0: enabled 0
813 12:54:13.839502 USB3 port 1: enabled 1
814 12:54:13.842551 USB3 port 2: enabled 0
815 12:54:13.846238 USB3 port 3: enabled 0
816 12:54:13.846337 PCI: 00:14.1: enabled 0
817 12:54:13.849564 PCI: 00:14.2: enabled 1
818 12:54:13.852935 PCI: 00:14.3: enabled 1
819 12:54:13.855924 GENERIC: 0.0: enabled 1
820 12:54:13.859125 PCI: 00:15.0: enabled 1
821 12:54:13.859228 I2C: 00:1a: enabled 1
822 12:54:13.862415 I2C: 00:31: enabled 1
823 12:54:13.866111 I2C: 00:32: enabled 1
824 12:54:13.869185 PCI: 00:15.1: enabled 1
825 12:54:13.869288 I2C: 00:10: enabled 1
826 12:54:13.872701 PCI: 00:15.2: enabled 1
827 12:54:13.875905 PCI: 00:15.3: enabled 1
828 12:54:13.879419 PCI: 00:16.0: enabled 1
829 12:54:13.882669 PCI: 00:16.1: enabled 0
830 12:54:13.882794 PCI: 00:16.2: enabled 0
831 12:54:13.885800 PCI: 00:16.3: enabled 0
832 12:54:13.889031 PCI: 00:16.4: enabled 0
833 12:54:13.892573 PCI: 00:16.5: enabled 0
834 12:54:13.895828 PCI: 00:17.0: enabled 1
835 12:54:13.895947 PCI: 00:19.0: enabled 0
836 12:54:13.898947 PCI: 00:19.1: enabled 1
837 12:54:13.902636 I2C: 00:15: enabled 1
838 12:54:13.906299 PCI: 00:19.2: enabled 0
839 12:54:13.909123 PCI: 00:1d.0: enabled 1
840 12:54:13.909218 GENERIC: 0.0: enabled 1
841 12:54:13.912351 PCI: 00:1e.0: enabled 1
842 12:54:13.916239 PCI: 00:1e.1: enabled 0
843 12:54:13.918774 PCI: 00:1e.2: enabled 1
844 12:54:13.918905 SPI: 00: enabled 1
845 12:54:13.922663 PCI: 00:1e.3: enabled 1
846 12:54:13.925946 SPI: 00: enabled 1
847 12:54:13.929268 PCI: 00:1f.0: enabled 1
848 12:54:13.929390 PNP: 0c09.0: enabled 1
849 12:54:13.932352 PCI: 00:1f.1: enabled 0
850 12:54:13.935780 PCI: 00:1f.2: enabled 1
851 12:54:13.938982 GENERIC: 0.0: enabled 1
852 12:54:13.942122 GENERIC: 0.0: enabled 1
853 12:54:13.945779 GENERIC: 1.0: enabled 1
854 12:54:13.945918 PCI: 00:1f.3: enabled 1
855 12:54:13.948904 PCI: 00:1f.4: enabled 0
856 12:54:13.952793 PCI: 00:1f.5: enabled 1
857 12:54:13.990822 PCI: 00:1f.6: enabled 0
858 12:54:13.991023 PCI: 00:1f.7: enabled 0
859 12:54:13.991326 CPU_CLUSTER: 0: enabled 1
860 12:54:13.991398 APIC: 00: enabled 1
861 12:54:13.991462 APIC: 01: enabled 1
862 12:54:13.991521 APIC: 03: enabled 1
863 12:54:13.991579 APIC: 06: enabled 1
864 12:54:13.991655 APIC: 05: enabled 1
865 12:54:13.991784 APIC: 04: enabled 1
866 12:54:13.991860 APIC: 02: enabled 1
867 12:54:13.991917 APIC: 07: enabled 1
868 12:54:13.991984 Root Device scanning...
869 12:54:13.992042 scan_static_bus for Root Device
870 12:54:13.992282 DOMAIN: 0000 enabled
871 12:54:13.992345 CPU_CLUSTER: 0 enabled
872 12:54:13.992402 DOMAIN: 0000 scanning...
873 12:54:13.995671 PCI: pci_scan_bus for bus 00
874 12:54:13.998243 PCI: 00:00.0 [8086/0000] ops
875 12:54:14.001739 PCI: 00:00.0 [8086/9a12] enabled
876 12:54:14.004985 PCI: 00:02.0 [8086/0000] bus ops
877 12:54:14.008487 PCI: 00:02.0 [8086/9a40] enabled
878 12:54:14.011996 PCI: 00:04.0 [8086/0000] bus ops
879 12:54:14.015564 PCI: 00:04.0 [8086/9a03] enabled
880 12:54:14.018570 PCI: 00:05.0 [8086/9a19] enabled
881 12:54:14.022164 PCI: 00:07.0 [0000/0000] hidden
882 12:54:14.025733 PCI: 00:08.0 [8086/9a11] enabled
883 12:54:14.028900 PCI: 00:0a.0 [8086/9a0d] disabled
884 12:54:14.032930 PCI: 00:0d.0 [8086/0000] bus ops
885 12:54:14.035267 PCI: 00:0d.0 [8086/9a13] enabled
886 12:54:14.038698 PCI: 00:14.0 [8086/0000] bus ops
887 12:54:14.042491 PCI: 00:14.0 [8086/a0ed] enabled
888 12:54:14.045167 PCI: 00:14.2 [8086/a0ef] enabled
889 12:54:14.048701 PCI: 00:14.3 [8086/0000] bus ops
890 12:54:14.051683 PCI: 00:14.3 [8086/a0f0] enabled
891 12:54:14.055392 PCI: 00:15.0 [8086/0000] bus ops
892 12:54:14.058853 PCI: 00:15.0 [8086/a0e8] enabled
893 12:54:14.061764 PCI: 00:15.1 [8086/0000] bus ops
894 12:54:14.065271 PCI: 00:15.1 [8086/a0e9] enabled
895 12:54:14.068251 PCI: 00:15.2 [8086/0000] bus ops
896 12:54:14.072177 PCI: 00:15.2 [8086/a0ea] enabled
897 12:54:14.075071 PCI: 00:15.3 [8086/0000] bus ops
898 12:54:14.078193 PCI: 00:15.3 [8086/a0eb] enabled
899 12:54:14.081781 PCI: 00:16.0 [8086/0000] ops
900 12:54:14.085526 PCI: 00:16.0 [8086/a0e0] enabled
901 12:54:14.091694 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 12:54:14.095085 PCI: 00:19.0 [8086/0000] bus ops
903 12:54:14.098610 PCI: 00:19.0 [8086/a0c5] disabled
904 12:54:14.101332 PCI: 00:19.1 [8086/0000] bus ops
905 12:54:14.104856 PCI: 00:19.1 [8086/a0c6] enabled
906 12:54:14.108459 PCI: 00:1d.0 [8086/0000] bus ops
907 12:54:14.111157 PCI: 00:1d.0 [8086/a0b0] enabled
908 12:54:14.114612 PCI: 00:1e.0 [8086/0000] ops
909 12:54:14.117814 PCI: 00:1e.0 [8086/a0a8] enabled
910 12:54:14.121237 PCI: 00:1e.2 [8086/0000] bus ops
911 12:54:14.124936 PCI: 00:1e.2 [8086/a0aa] enabled
912 12:54:14.127902 PCI: 00:1e.3 [8086/0000] bus ops
913 12:54:14.131074 PCI: 00:1e.3 [8086/a0ab] enabled
914 12:54:14.134268 PCI: 00:1f.0 [8086/0000] bus ops
915 12:54:14.137869 PCI: 00:1f.0 [8086/a087] enabled
916 12:54:14.138022 RTC Init
917 12:54:14.140836 Set power on after power failure.
918 12:54:14.144349 Disabling Deep S3
919 12:54:14.144473 Disabling Deep S3
920 12:54:14.147309 Disabling Deep S4
921 12:54:14.147405 Disabling Deep S4
922 12:54:14.150829 Disabling Deep S5
923 12:54:14.154650 Disabling Deep S5
924 12:54:14.157896 PCI: 00:1f.2 [0000/0000] hidden
925 12:54:14.160668 PCI: 00:1f.3 [8086/0000] bus ops
926 12:54:14.164205 PCI: 00:1f.3 [8086/a0c8] enabled
927 12:54:14.167052 PCI: 00:1f.5 [8086/0000] bus ops
928 12:54:14.170645 PCI: 00:1f.5 [8086/a0a4] enabled
929 12:54:14.174116 PCI: Leftover static devices:
930 12:54:14.174261 PCI: 00:10.2
931 12:54:14.174336 PCI: 00:10.6
932 12:54:14.176995 PCI: 00:10.7
933 12:54:14.177097 PCI: 00:06.0
934 12:54:14.180444 PCI: 00:07.1
935 12:54:14.180556 PCI: 00:07.2
936 12:54:14.180628 PCI: 00:07.3
937 12:54:14.183865 PCI: 00:09.0
938 12:54:14.184006 PCI: 00:0d.1
939 12:54:14.186977 PCI: 00:0d.2
940 12:54:14.187133 PCI: 00:0d.3
941 12:54:14.190477 PCI: 00:0e.0
942 12:54:14.190587 PCI: 00:12.0
943 12:54:14.190659 PCI: 00:12.6
944 12:54:14.193883 PCI: 00:13.0
945 12:54:14.193996 PCI: 00:14.1
946 12:54:14.197124 PCI: 00:16.1
947 12:54:14.197224 PCI: 00:16.2
948 12:54:14.197293 PCI: 00:16.3
949 12:54:14.200400 PCI: 00:16.4
950 12:54:14.200497 PCI: 00:16.5
951 12:54:14.203375 PCI: 00:17.0
952 12:54:14.203470 PCI: 00:19.2
953 12:54:14.206865 PCI: 00:1e.1
954 12:54:14.206964 PCI: 00:1f.1
955 12:54:14.207032 PCI: 00:1f.4
956 12:54:14.210055 PCI: 00:1f.6
957 12:54:14.210154 PCI: 00:1f.7
958 12:54:14.213493 PCI: Check your devicetree.cb.
959 12:54:14.216956 PCI: 00:02.0 scanning...
960 12:54:14.220315 scan_generic_bus for PCI: 00:02.0
961 12:54:14.223311 scan_generic_bus for PCI: 00:02.0 done
962 12:54:14.230050 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 12:54:14.230228 PCI: 00:04.0 scanning...
964 12:54:14.233902 scan_generic_bus for PCI: 00:04.0
965 12:54:14.236586 GENERIC: 0.0 enabled
966 12:54:14.243691 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 12:54:14.246239 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 12:54:14.250073 PCI: 00:0d.0 scanning...
969 12:54:14.253260 scan_static_bus for PCI: 00:0d.0
970 12:54:14.256395 USB0 port 0 enabled
971 12:54:14.259514 USB0 port 0 scanning...
972 12:54:14.263019 scan_static_bus for USB0 port 0
973 12:54:14.263151 USB3 port 0 enabled
974 12:54:14.265855 USB3 port 1 enabled
975 12:54:14.269592 USB3 port 2 disabled
976 12:54:14.269692 USB3 port 3 disabled
977 12:54:14.272907 USB3 port 0 scanning...
978 12:54:14.276186 scan_static_bus for USB3 port 0
979 12:54:14.279563 scan_static_bus for USB3 port 0 done
980 12:54:14.285692 scan_bus: bus USB3 port 0 finished in 6 msecs
981 12:54:14.285815 USB3 port 1 scanning...
982 12:54:14.289133 scan_static_bus for USB3 port 1
983 12:54:14.292459 scan_static_bus for USB3 port 1 done
984 12:54:14.299200 scan_bus: bus USB3 port 1 finished in 6 msecs
985 12:54:14.302535 scan_static_bus for USB0 port 0 done
986 12:54:14.305686 scan_bus: bus USB0 port 0 finished in 43 msecs
987 12:54:14.312234 scan_static_bus for PCI: 00:0d.0 done
988 12:54:14.316222 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 12:54:14.319308 PCI: 00:14.0 scanning...
990 12:54:14.322199 scan_static_bus for PCI: 00:14.0
991 12:54:14.322295 USB0 port 0 enabled
992 12:54:14.325605 USB0 port 0 scanning...
993 12:54:14.328796 scan_static_bus for USB0 port 0
994 12:54:14.332283 USB2 port 0 disabled
995 12:54:14.335697 USB2 port 1 enabled
996 12:54:14.335780 USB2 port 2 enabled
997 12:54:14.339012 USB2 port 3 disabled
998 12:54:14.339104 USB2 port 4 enabled
999 12:54:14.342071 USB2 port 5 disabled
1000 12:54:14.345352 USB2 port 6 disabled
1001 12:54:14.345463 USB2 port 7 disabled
1002 12:54:14.348600 USB2 port 8 disabled
1003 12:54:14.352328 USB2 port 9 disabled
1004 12:54:14.352412 USB3 port 0 disabled
1005 12:54:14.355572 USB3 port 1 enabled
1006 12:54:14.358866 USB3 port 2 disabled
1007 12:54:14.358973 USB3 port 3 disabled
1008 12:54:14.362263 USB2 port 1 scanning...
1009 12:54:14.365065 scan_static_bus for USB2 port 1
1010 12:54:14.368284 scan_static_bus for USB2 port 1 done
1011 12:54:14.375233 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 12:54:14.375316 USB2 port 2 scanning...
1013 12:54:14.378541 scan_static_bus for USB2 port 2
1014 12:54:14.381875 scan_static_bus for USB2 port 2 done
1015 12:54:14.388336 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 12:54:14.391798 USB2 port 4 scanning...
1017 12:54:14.394819 scan_static_bus for USB2 port 4
1018 12:54:14.398343 scan_static_bus for USB2 port 4 done
1019 12:54:14.401863 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 12:54:14.404686 USB3 port 1 scanning...
1021 12:54:14.408483 scan_static_bus for USB3 port 1
1022 12:54:14.411432 scan_static_bus for USB3 port 1 done
1023 12:54:14.414886 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 12:54:14.421210 scan_static_bus for USB0 port 0 done
1025 12:54:14.424838 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 12:54:14.427973 scan_static_bus for PCI: 00:14.0 done
1027 12:54:14.434654 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1028 12:54:14.434743 PCI: 00:14.3 scanning...
1029 12:54:14.437788 scan_static_bus for PCI: 00:14.3
1030 12:54:14.441180 GENERIC: 0.0 enabled
1031 12:54:14.444684 scan_static_bus for PCI: 00:14.3 done
1032 12:54:14.450924 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 12:54:14.451045 PCI: 00:15.0 scanning...
1034 12:54:14.457418 scan_static_bus for PCI: 00:15.0
1035 12:54:14.457502 I2C: 00:1a enabled
1036 12:54:14.461317 I2C: 00:31 enabled
1037 12:54:14.461399 I2C: 00:32 enabled
1038 12:54:14.464152 scan_static_bus for PCI: 00:15.0 done
1039 12:54:14.470977 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 12:54:14.474232 PCI: 00:15.1 scanning...
1041 12:54:14.477611 scan_static_bus for PCI: 00:15.1
1042 12:54:14.477692 I2C: 00:10 enabled
1043 12:54:14.480694 scan_static_bus for PCI: 00:15.1 done
1044 12:54:14.487536 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 12:54:14.490618 PCI: 00:15.2 scanning...
1046 12:54:14.494496 scan_static_bus for PCI: 00:15.2
1047 12:54:14.497620 scan_static_bus for PCI: 00:15.2 done
1048 12:54:14.500481 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 12:54:14.504632 PCI: 00:15.3 scanning...
1050 12:54:14.507647 scan_static_bus for PCI: 00:15.3
1051 12:54:14.510343 scan_static_bus for PCI: 00:15.3 done
1052 12:54:14.517165 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 12:54:14.517258 PCI: 00:19.1 scanning...
1054 12:54:14.524248 scan_static_bus for PCI: 00:19.1
1055 12:54:14.524407 I2C: 00:15 enabled
1056 12:54:14.527572 scan_static_bus for PCI: 00:19.1 done
1057 12:54:14.534036 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 12:54:14.534127 PCI: 00:1d.0 scanning...
1059 12:54:14.540413 do_pci_scan_bridge for PCI: 00:1d.0
1060 12:54:14.540530 PCI: pci_scan_bus for bus 01
1061 12:54:14.544181 PCI: 01:00.0 [15b7/5009] enabled
1062 12:54:14.547479 GENERIC: 0.0 enabled
1063 12:54:14.550703 Enabling Common Clock Configuration
1064 12:54:14.556784 L1 Sub-State supported from root port 29
1065 12:54:14.556870 L1 Sub-State Support = 0x5
1066 12:54:14.560312 CommonModeRestoreTime = 0x28
1067 12:54:14.566918 Power On Value = 0x16, Power On Scale = 0x0
1068 12:54:14.567028 ASPM: Enabled L1
1069 12:54:14.570367 PCIe: Max_Payload_Size adjusted to 128
1070 12:54:14.577049 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 12:54:14.580265 PCI: 00:1e.2 scanning...
1072 12:54:14.583367 scan_generic_bus for PCI: 00:1e.2
1073 12:54:14.583450 SPI: 00 enabled
1074 12:54:14.590443 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 12:54:14.593325 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 12:54:14.597111 PCI: 00:1e.3 scanning...
1077 12:54:14.600658 scan_generic_bus for PCI: 00:1e.3
1078 12:54:14.604673 SPI: 00 enabled
1079 12:54:14.607327 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 12:54:14.613988 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 12:54:14.617474 PCI: 00:1f.0 scanning...
1082 12:54:14.620833 scan_static_bus for PCI: 00:1f.0
1083 12:54:14.620915 PNP: 0c09.0 enabled
1084 12:54:14.623728 PNP: 0c09.0 scanning...
1085 12:54:14.627053 scan_static_bus for PNP: 0c09.0
1086 12:54:14.630878 scan_static_bus for PNP: 0c09.0 done
1087 12:54:14.636903 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 12:54:14.640813 scan_static_bus for PCI: 00:1f.0 done
1089 12:54:14.643866 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 12:54:14.647209 PCI: 00:1f.2 scanning...
1091 12:54:14.650673 scan_static_bus for PCI: 00:1f.2
1092 12:54:14.653624 GENERIC: 0.0 enabled
1093 12:54:14.653702 GENERIC: 0.0 scanning...
1094 12:54:14.657136 scan_static_bus for GENERIC: 0.0
1095 12:54:14.660866 GENERIC: 0.0 enabled
1096 12:54:14.663832 GENERIC: 1.0 enabled
1097 12:54:14.667567 scan_static_bus for GENERIC: 0.0 done
1098 12:54:14.670806 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 12:54:14.677252 scan_static_bus for PCI: 00:1f.2 done
1100 12:54:14.680398 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 12:54:14.683848 PCI: 00:1f.3 scanning...
1102 12:54:14.687073 scan_static_bus for PCI: 00:1f.3
1103 12:54:14.690645 scan_static_bus for PCI: 00:1f.3 done
1104 12:54:14.693757 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 12:54:14.697070 PCI: 00:1f.5 scanning...
1106 12:54:14.700515 scan_generic_bus for PCI: 00:1f.5
1107 12:54:14.703626 scan_generic_bus for PCI: 00:1f.5 done
1108 12:54:14.710159 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 12:54:14.713342 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1110 12:54:14.716599 scan_static_bus for Root Device done
1111 12:54:14.723254 scan_bus: bus Root Device finished in 736 msecs
1112 12:54:14.723338 done
1113 12:54:14.730447 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1114 12:54:14.733084 Chrome EC: UHEPI supported
1115 12:54:14.740288 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 12:54:14.746759 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 12:54:14.749904 SPI flash protection: WPSW=0 SRP0=1
1118 12:54:14.753258 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 12:54:14.759980 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 12:54:14.762820 found VGA at PCI: 00:02.0
1121 12:54:14.766407 Setting up VGA for PCI: 00:02.0
1122 12:54:14.773144 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 12:54:14.776422 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 12:54:14.779561 Allocating resources...
1125 12:54:14.779647 Reading resources...
1126 12:54:14.786094 Root Device read_resources bus 0 link: 0
1127 12:54:14.789230 DOMAIN: 0000 read_resources bus 0 link: 0
1128 12:54:14.796274 PCI: 00:04.0 read_resources bus 1 link: 0
1129 12:54:14.799511 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 12:54:14.805736 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 12:54:14.809159 USB0 port 0 read_resources bus 0 link: 0
1132 12:54:14.815954 USB0 port 0 read_resources bus 0 link: 0 done
1133 12:54:14.819185 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 12:54:14.822540 PCI: 00:14.0 read_resources bus 0 link: 0
1135 12:54:14.829376 USB0 port 0 read_resources bus 0 link: 0
1136 12:54:14.832297 USB0 port 0 read_resources bus 0 link: 0 done
1137 12:54:14.839178 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 12:54:14.842383 PCI: 00:14.3 read_resources bus 0 link: 0
1139 12:54:14.849159 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 12:54:14.852661 PCI: 00:15.0 read_resources bus 0 link: 0
1141 12:54:14.858979 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 12:54:14.862681 PCI: 00:15.1 read_resources bus 0 link: 0
1143 12:54:14.869267 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 12:54:14.872704 PCI: 00:19.1 read_resources bus 0 link: 0
1145 12:54:14.879449 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 12:54:14.882457 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 12:54:14.889334 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 12:54:14.892446 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 12:54:14.899377 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 12:54:14.902695 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 12:54:14.909002 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 12:54:14.912955 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 12:54:14.918939 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 12:54:14.921966 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 12:54:14.925416 GENERIC: 0.0 read_resources bus 0 link: 0
1156 12:54:14.932857 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 12:54:14.936075 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 12:54:14.943660 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 12:54:14.946508 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 12:54:14.953434 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 12:54:14.956677 Root Device read_resources bus 0 link: 0 done
1162 12:54:14.959888 Done reading resources.
1163 12:54:14.966262 Show resources in subtree (Root Device)...After reading.
1164 12:54:14.969563 Root Device child on link 0 DOMAIN: 0000
1165 12:54:14.973079 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 12:54:14.982955 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 12:54:14.992971 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 12:54:14.996039 PCI: 00:00.0
1169 12:54:15.006537 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 12:54:15.012643 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 12:54:15.022851 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 12:54:15.032702 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 12:54:15.042478 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 12:54:15.053177 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 12:54:15.062456 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 12:54:15.069420 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 12:54:15.079261 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 12:54:15.088784 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 12:54:15.098765 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 12:54:15.108645 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 12:54:15.118921 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 12:54:15.125227 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 12:54:15.135547 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 12:54:15.146066 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 12:54:15.155388 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 12:54:15.165040 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 12:54:15.175245 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 12:54:15.184908 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 12:54:15.185003 PCI: 00:02.0
1190 12:54:15.194980 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 12:54:15.205208 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 12:54:15.215169 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 12:54:15.218354 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 12:54:15.227996 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 12:54:15.231202 GENERIC: 0.0
1196 12:54:15.231285 PCI: 00:05.0
1197 12:54:15.241302 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 12:54:15.248386 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 12:54:15.248472 GENERIC: 0.0
1200 12:54:15.251701 PCI: 00:08.0
1201 12:54:15.261041 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 12:54:15.261129 PCI: 00:0a.0
1203 12:54:15.267879 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 12:54:15.277463 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 12:54:15.280946 USB0 port 0 child on link 0 USB3 port 0
1206 12:54:15.281030 USB3 port 0
1207 12:54:15.284160 USB3 port 1
1208 12:54:15.287421 USB3 port 2
1209 12:54:15.287503 USB3 port 3
1210 12:54:15.291200 PCI: 00:14.0 child on link 0 USB0 port 0
1211 12:54:15.300661 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 12:54:15.307800 USB0 port 0 child on link 0 USB2 port 0
1213 12:54:15.307886 USB2 port 0
1214 12:54:15.311109 USB2 port 1
1215 12:54:15.311191 USB2 port 2
1216 12:54:15.314482 USB2 port 3
1217 12:54:15.314564 USB2 port 4
1218 12:54:15.318166 USB2 port 5
1219 12:54:15.320653 USB2 port 6
1220 12:54:15.320734 USB2 port 7
1221 12:54:15.324022 USB2 port 8
1222 12:54:15.324104 USB2 port 9
1223 12:54:15.327504 USB3 port 0
1224 12:54:15.327586 USB3 port 1
1225 12:54:15.330279 USB3 port 2
1226 12:54:15.330360 USB3 port 3
1227 12:54:15.333850 PCI: 00:14.2
1228 12:54:15.343778 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 12:54:15.353513 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 12:54:15.357028 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 12:54:15.366944 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 12:54:15.370184 GENERIC: 0.0
1233 12:54:15.373521 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 12:54:15.383244 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 12:54:15.383329 I2C: 00:1a
1236 12:54:15.386484 I2C: 00:31
1237 12:54:15.386566 I2C: 00:32
1238 12:54:15.393172 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 12:54:15.403018 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 12:54:15.403109 I2C: 00:10
1241 12:54:15.406581 PCI: 00:15.2
1242 12:54:15.416181 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:54:15.416268 PCI: 00:15.3
1244 12:54:15.426384 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 12:54:15.429620 PCI: 00:16.0
1246 12:54:15.439738 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 12:54:15.439862 PCI: 00:19.0
1248 12:54:15.445976 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 12:54:15.456302 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 12:54:15.456399 I2C: 00:15
1251 12:54:15.459648 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 12:54:15.469488 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 12:54:15.479309 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 12:54:15.489212 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 12:54:15.489343 GENERIC: 0.0
1256 12:54:15.492642 PCI: 01:00.0
1257 12:54:15.502141 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 12:54:15.512386 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1259 12:54:15.512498 PCI: 00:1e.0
1260 12:54:15.525243 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1261 12:54:15.529017 PCI: 00:1e.2 child on link 0 SPI: 00
1262 12:54:15.538794 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 12:54:15.538922 SPI: 00
1264 12:54:15.545546 PCI: 00:1e.3 child on link 0 SPI: 00
1265 12:54:15.554834 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1266 12:54:15.554967 SPI: 00
1267 12:54:15.558275 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1268 12:54:15.568276 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1269 12:54:15.568393 PNP: 0c09.0
1270 12:54:15.578649 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1271 12:54:15.581276 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1272 12:54:15.591432 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1273 12:54:15.601245 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1274 12:54:15.604592 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1275 12:54:15.607769 GENERIC: 0.0
1276 12:54:15.611392 GENERIC: 1.0
1277 12:54:15.611470 PCI: 00:1f.3
1278 12:54:15.620734 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1279 12:54:15.631079 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1280 12:54:15.634189 PCI: 00:1f.5
1281 12:54:15.641012 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1282 12:54:15.647587 CPU_CLUSTER: 0 child on link 0 APIC: 00
1283 12:54:15.647675 APIC: 00
1284 12:54:15.651345 APIC: 01
1285 12:54:15.651429 APIC: 03
1286 12:54:15.651496 APIC: 06
1287 12:54:15.654328 APIC: 05
1288 12:54:15.654454 APIC: 04
1289 12:54:15.654524 APIC: 02
1290 12:54:15.657396 APIC: 07
1291 12:54:15.664364 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1292 12:54:15.670696 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1293 12:54:15.677391 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1294 12:54:15.683807 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1295 12:54:15.687089 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1296 12:54:15.690381 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1297 12:54:15.697398 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1298 12:54:15.703960 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1299 12:54:15.713312 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1300 12:54:15.720034 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1301 12:54:15.726780 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1302 12:54:15.733139 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1303 12:54:15.739702 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1304 12:54:15.750535 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1305 12:54:15.753419 DOMAIN: 0000: Resource ranges:
1306 12:54:15.756509 * Base: 1000, Size: 800, Tag: 100
1307 12:54:15.759882 * Base: 1900, Size: e700, Tag: 100
1308 12:54:15.763028 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1309 12:54:15.769981 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1310 12:54:15.779450 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1311 12:54:15.786333 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1312 12:54:15.792657 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1313 12:54:15.802642 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1314 12:54:15.809239 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1315 12:54:15.816053 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1316 12:54:15.825718 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1317 12:54:15.832509 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1318 12:54:15.838833 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1319 12:54:15.848852 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1320 12:54:15.855270 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1321 12:54:15.862098 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1322 12:54:15.872012 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1323 12:54:15.878522 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1324 12:54:15.885527 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1325 12:54:15.895254 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1326 12:54:15.901847 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1327 12:54:15.908596 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1328 12:54:15.918120 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1329 12:54:15.925099 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1330 12:54:15.931531 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1331 12:54:15.941848 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1332 12:54:15.948008 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1333 12:54:15.951643 DOMAIN: 0000: Resource ranges:
1334 12:54:15.954595 * Base: 7fc00000, Size: 40400000, Tag: 200
1335 12:54:15.961165 * Base: d0000000, Size: 28000000, Tag: 200
1336 12:54:15.964621 * Base: fa000000, Size: 1000000, Tag: 200
1337 12:54:15.968139 * Base: fb001000, Size: 2fff000, Tag: 200
1338 12:54:15.971766 * Base: fe010000, Size: 2e000, Tag: 200
1339 12:54:15.977837 * Base: fe03f000, Size: d41000, Tag: 200
1340 12:54:15.981523 * Base: fed88000, Size: 8000, Tag: 200
1341 12:54:15.984567 * Base: fed93000, Size: d000, Tag: 200
1342 12:54:15.987771 * Base: feda2000, Size: 1e000, Tag: 200
1343 12:54:15.994568 * Base: fede0000, Size: 1220000, Tag: 200
1344 12:54:15.997900 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1345 12:54:16.004193 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1346 12:54:16.011168 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1347 12:54:16.017278 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1348 12:54:16.024677 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1349 12:54:16.030952 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1350 12:54:16.037694 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1351 12:54:16.044314 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1352 12:54:16.050816 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1353 12:54:16.057188 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1354 12:54:16.063760 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1355 12:54:16.070235 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1356 12:54:16.076791 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1357 12:54:16.083351 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1358 12:54:16.090293 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1359 12:54:16.096866 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1360 12:54:16.103859 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1361 12:54:16.110281 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1362 12:54:16.116701 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1363 12:54:16.123527 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1364 12:54:16.129839 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1365 12:54:16.136392 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1366 12:54:16.143096 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1367 12:54:16.152853 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1368 12:54:16.159597 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1369 12:54:16.162939 PCI: 00:1d.0: Resource ranges:
1370 12:54:16.166180 * Base: 7fc00000, Size: 100000, Tag: 200
1371 12:54:16.173103 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1372 12:54:16.179830 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1373 12:54:16.189368 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1374 12:54:16.196136 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1375 12:54:16.199380 Root Device assign_resources, bus 0 link: 0
1376 12:54:16.205614 DOMAIN: 0000 assign_resources, bus 0 link: 0
1377 12:54:16.212808 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1378 12:54:16.222347 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1379 12:54:16.228914 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1380 12:54:16.239033 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1381 12:54:16.242233 PCI: 00:04.0 assign_resources, bus 1 link: 0
1382 12:54:16.245550 PCI: 00:04.0 assign_resources, bus 1 link: 0
1383 12:54:16.255768 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1384 12:54:16.262505 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1385 12:54:16.271876 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1386 12:54:16.275097 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1387 12:54:16.281921 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1388 12:54:16.288352 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1389 12:54:16.295217 PCI: 00:14.0 assign_resources, bus 0 link: 0
1390 12:54:16.298575 PCI: 00:14.0 assign_resources, bus 0 link: 0
1391 12:54:16.304663 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1392 12:54:16.315212 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1393 12:54:16.321595 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1394 12:54:16.328021 PCI: 00:14.3 assign_resources, bus 0 link: 0
1395 12:54:16.331273 PCI: 00:14.3 assign_resources, bus 0 link: 0
1396 12:54:16.341232 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1397 12:54:16.344331 PCI: 00:15.0 assign_resources, bus 0 link: 0
1398 12:54:16.348153 PCI: 00:15.0 assign_resources, bus 0 link: 0
1399 12:54:16.357968 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1400 12:54:16.361393 PCI: 00:15.1 assign_resources, bus 0 link: 0
1401 12:54:16.368282 PCI: 00:15.1 assign_resources, bus 0 link: 0
1402 12:54:16.374446 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1403 12:54:16.384764 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1404 12:54:16.390706 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1405 12:54:16.400980 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1406 12:54:16.404245 PCI: 00:19.1 assign_resources, bus 0 link: 0
1407 12:54:16.407366 PCI: 00:19.1 assign_resources, bus 0 link: 0
1408 12:54:16.417535 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1409 12:54:16.427256 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1410 12:54:16.437600 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1411 12:54:16.440678 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 12:54:16.450700 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1413 12:54:16.457095 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1414 12:54:16.460984 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 12:54:16.470669 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1416 12:54:16.473841 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1417 12:54:16.480352 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1418 12:54:16.486997 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1419 12:54:16.493226 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1420 12:54:16.496627 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1421 12:54:16.500127 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1422 12:54:16.507041 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1423 12:54:16.510175 LPC: Trying to open IO window from 800 size 1ff
1424 12:54:16.520123 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1425 12:54:16.526622 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1426 12:54:16.536504 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1427 12:54:16.540184 DOMAIN: 0000 assign_resources, bus 0 link: 0
1428 12:54:16.546478 Root Device assign_resources, bus 0 link: 0
1429 12:54:16.546564 Done setting resources.
1430 12:54:16.553056 Show resources in subtree (Root Device)...After assigning values.
1431 12:54:16.559720 Root Device child on link 0 DOMAIN: 0000
1432 12:54:16.563042 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1433 12:54:16.573225 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1434 12:54:16.583276 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1435 12:54:16.583410 PCI: 00:00.0
1436 12:54:16.592968 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1437 12:54:16.602994 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1438 12:54:16.612887 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1439 12:54:16.622669 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1440 12:54:16.629393 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1441 12:54:16.639573 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1442 12:54:16.649459 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1443 12:54:16.659925 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1444 12:54:16.668975 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1445 12:54:16.679089 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1446 12:54:16.685780 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1447 12:54:16.696025 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1448 12:54:16.706162 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1449 12:54:16.715946 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1450 12:54:16.722148 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1451 12:54:16.731887 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1452 12:54:16.742097 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1453 12:54:16.752241 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1454 12:54:16.762165 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1455 12:54:16.771856 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1456 12:54:16.771979 PCI: 00:02.0
1457 12:54:16.785208 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1458 12:54:16.795170 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1459 12:54:16.805413 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1460 12:54:16.808397 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1461 12:54:16.818230 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1462 12:54:16.821587 GENERIC: 0.0
1463 12:54:16.821676 PCI: 00:05.0
1464 12:54:16.831842 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1465 12:54:16.838590 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1466 12:54:16.838681 GENERIC: 0.0
1467 12:54:16.841859 PCI: 00:08.0
1468 12:54:16.851395 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1469 12:54:16.851530 PCI: 00:0a.0
1470 12:54:16.857847 PCI: 00:0d.0 child on link 0 USB0 port 0
1471 12:54:16.867966 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1472 12:54:16.871446 USB0 port 0 child on link 0 USB3 port 0
1473 12:54:16.874440 USB3 port 0
1474 12:54:16.874522 USB3 port 1
1475 12:54:16.877608 USB3 port 2
1476 12:54:16.877690 USB3 port 3
1477 12:54:16.884440 PCI: 00:14.0 child on link 0 USB0 port 0
1478 12:54:16.894631 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1479 12:54:16.897913 USB0 port 0 child on link 0 USB2 port 0
1480 12:54:16.901193 USB2 port 0
1481 12:54:16.901275 USB2 port 1
1482 12:54:16.904325 USB2 port 2
1483 12:54:16.904407 USB2 port 3
1484 12:54:16.907394 USB2 port 4
1485 12:54:16.907475 USB2 port 5
1486 12:54:16.910922 USB2 port 6
1487 12:54:16.911004 USB2 port 7
1488 12:54:16.914778 USB2 port 8
1489 12:54:16.918120 USB2 port 9
1490 12:54:16.918203 USB3 port 0
1491 12:54:16.920949 USB3 port 1
1492 12:54:16.921031 USB3 port 2
1493 12:54:16.924161 USB3 port 3
1494 12:54:16.924242 PCI: 00:14.2
1495 12:54:16.933923 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1496 12:54:16.944132 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1497 12:54:16.950813 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1498 12:54:16.960399 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1499 12:54:16.960532 GENERIC: 0.0
1500 12:54:16.967373 PCI: 00:15.0 child on link 0 I2C: 00:1a
1501 12:54:16.977248 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1502 12:54:16.977371 I2C: 00:1a
1503 12:54:16.979999 I2C: 00:31
1504 12:54:16.980084 I2C: 00:32
1505 12:54:16.986638 PCI: 00:15.1 child on link 0 I2C: 00:10
1506 12:54:16.996701 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1507 12:54:16.996817 I2C: 00:10
1508 12:54:16.999901 PCI: 00:15.2
1509 12:54:17.010373 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1510 12:54:17.010481 PCI: 00:15.3
1511 12:54:17.020033 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1512 12:54:17.022973 PCI: 00:16.0
1513 12:54:17.032856 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1514 12:54:17.036832 PCI: 00:19.0
1515 12:54:17.039574 PCI: 00:19.1 child on link 0 I2C: 00:15
1516 12:54:17.049338 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1517 12:54:17.052985 I2C: 00:15
1518 12:54:17.056120 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1519 12:54:17.066521 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1520 12:54:17.076431 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1521 12:54:17.086387 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1522 12:54:17.089554 GENERIC: 0.0
1523 12:54:17.089668 PCI: 01:00.0
1524 12:54:17.103014 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1525 12:54:17.113117 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1526 12:54:17.113250 PCI: 00:1e.0
1527 12:54:17.125765 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1528 12:54:17.129147 PCI: 00:1e.2 child on link 0 SPI: 00
1529 12:54:17.138562 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1530 12:54:17.138699 SPI: 00
1531 12:54:17.145486 PCI: 00:1e.3 child on link 0 SPI: 00
1532 12:54:17.155358 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1533 12:54:17.155529 SPI: 00
1534 12:54:17.158567 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1535 12:54:17.168422 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1536 12:54:17.168520 PNP: 0c09.0
1537 12:54:17.178452 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1538 12:54:17.181629 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1539 12:54:17.191727 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1540 12:54:17.201756 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1541 12:54:17.208234 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1542 12:54:17.208343 GENERIC: 0.0
1543 12:54:17.211730 GENERIC: 1.0
1544 12:54:17.211822 PCI: 00:1f.3
1545 12:54:17.222252 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1546 12:54:17.231867 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1547 12:54:17.234754 PCI: 00:1f.5
1548 12:54:17.244488 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1549 12:54:17.247951 CPU_CLUSTER: 0 child on link 0 APIC: 00
1550 12:54:17.251728 APIC: 00
1551 12:54:17.251856 APIC: 01
1552 12:54:17.254562 APIC: 03
1553 12:54:17.254714 APIC: 06
1554 12:54:17.254858 APIC: 05
1555 12:54:17.257712 APIC: 04
1556 12:54:17.257803 APIC: 02
1557 12:54:17.257870 APIC: 07
1558 12:54:17.261554 Done allocating resources.
1559 12:54:17.268081 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1560 12:54:17.274483 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1561 12:54:17.277699 Configure GPIOs for I2S audio on UP4.
1562 12:54:17.284261 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1563 12:54:17.287826 Enabling resources...
1564 12:54:17.291192 PCI: 00:00.0 subsystem <- 8086/9a12
1565 12:54:17.294403 PCI: 00:00.0 cmd <- 06
1566 12:54:17.297796 PCI: 00:02.0 subsystem <- 8086/9a40
1567 12:54:17.300797 PCI: 00:02.0 cmd <- 03
1568 12:54:17.304553 PCI: 00:04.0 subsystem <- 8086/9a03
1569 12:54:17.307282 PCI: 00:04.0 cmd <- 02
1570 12:54:17.310463 PCI: 00:05.0 subsystem <- 8086/9a19
1571 12:54:17.310569 PCI: 00:05.0 cmd <- 02
1572 12:54:17.317164 PCI: 00:08.0 subsystem <- 8086/9a11
1573 12:54:17.317319 PCI: 00:08.0 cmd <- 06
1574 12:54:17.320426 PCI: 00:0d.0 subsystem <- 8086/9a13
1575 12:54:17.323935 PCI: 00:0d.0 cmd <- 02
1576 12:54:17.327615 PCI: 00:14.0 subsystem <- 8086/a0ed
1577 12:54:17.330254 PCI: 00:14.0 cmd <- 02
1578 12:54:17.334007 PCI: 00:14.2 subsystem <- 8086/a0ef
1579 12:54:17.337271 PCI: 00:14.2 cmd <- 02
1580 12:54:17.340485 PCI: 00:14.3 subsystem <- 8086/a0f0
1581 12:54:17.343766 PCI: 00:14.3 cmd <- 02
1582 12:54:17.347026 PCI: 00:15.0 subsystem <- 8086/a0e8
1583 12:54:17.350312 PCI: 00:15.0 cmd <- 02
1584 12:54:17.353402 PCI: 00:15.1 subsystem <- 8086/a0e9
1585 12:54:17.356754 PCI: 00:15.1 cmd <- 02
1586 12:54:17.360198 PCI: 00:15.2 subsystem <- 8086/a0ea
1587 12:54:17.360354 PCI: 00:15.2 cmd <- 02
1588 12:54:17.367033 PCI: 00:15.3 subsystem <- 8086/a0eb
1589 12:54:17.367170 PCI: 00:15.3 cmd <- 02
1590 12:54:17.370377 PCI: 00:16.0 subsystem <- 8086/a0e0
1591 12:54:17.373727 PCI: 00:16.0 cmd <- 02
1592 12:54:17.376712 PCI: 00:19.1 subsystem <- 8086/a0c6
1593 12:54:17.380336 PCI: 00:19.1 cmd <- 02
1594 12:54:17.383388 PCI: 00:1d.0 bridge ctrl <- 0013
1595 12:54:17.386548 PCI: 00:1d.0 subsystem <- 8086/a0b0
1596 12:54:17.389959 PCI: 00:1d.0 cmd <- 06
1597 12:54:17.393297 PCI: 00:1e.0 subsystem <- 8086/a0a8
1598 12:54:17.396470 PCI: 00:1e.0 cmd <- 06
1599 12:54:17.399671 PCI: 00:1e.2 subsystem <- 8086/a0aa
1600 12:54:17.402960 PCI: 00:1e.2 cmd <- 06
1601 12:54:17.406405 PCI: 00:1e.3 subsystem <- 8086/a0ab
1602 12:54:17.409520 PCI: 00:1e.3 cmd <- 02
1603 12:54:17.412908 PCI: 00:1f.0 subsystem <- 8086/a087
1604 12:54:17.416343 PCI: 00:1f.0 cmd <- 407
1605 12:54:17.419661 PCI: 00:1f.3 subsystem <- 8086/a0c8
1606 12:54:17.419772 PCI: 00:1f.3 cmd <- 02
1607 12:54:17.426569 PCI: 00:1f.5 subsystem <- 8086/a0a4
1608 12:54:17.426706 PCI: 00:1f.5 cmd <- 406
1609 12:54:17.431661 PCI: 01:00.0 cmd <- 02
1610 12:54:17.435806 done.
1611 12:54:17.439224 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1612 12:54:17.442319 Initializing devices...
1613 12:54:17.445800 Root Device init
1614 12:54:17.449075 Chrome EC: Set SMI mask to 0x0000000000000000
1615 12:54:17.455584 Chrome EC: clear events_b mask to 0x0000000000000000
1616 12:54:17.462770 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1617 12:54:17.468938 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1618 12:54:17.475585 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1619 12:54:17.478749 Chrome EC: Set WAKE mask to 0x0000000000000000
1620 12:54:17.486548 fw_config match found: DB_USB=USB3_ACTIVE
1621 12:54:17.490090 Configure Right Type-C port orientation for retimer
1622 12:54:17.493548 Root Device init finished in 46 msecs
1623 12:54:17.497480 PCI: 00:00.0 init
1624 12:54:17.500569 CPU TDP = 9 Watts
1625 12:54:17.500683 CPU PL1 = 9 Watts
1626 12:54:17.504508 CPU PL2 = 40 Watts
1627 12:54:17.507247 CPU PL4 = 83 Watts
1628 12:54:17.510915 PCI: 00:00.0 init finished in 8 msecs
1629 12:54:17.511069 PCI: 00:02.0 init
1630 12:54:17.514504 GMA: Found VBT in CBFS
1631 12:54:17.517368 GMA: Found valid VBT in CBFS
1632 12:54:17.523805 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1633 12:54:17.530812 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1634 12:54:17.534172 PCI: 00:02.0 init finished in 18 msecs
1635 12:54:17.537023 PCI: 00:05.0 init
1636 12:54:17.541128 PCI: 00:05.0 init finished in 0 msecs
1637 12:54:17.543942 PCI: 00:08.0 init
1638 12:54:17.547001 PCI: 00:08.0 init finished in 0 msecs
1639 12:54:17.550505 PCI: 00:14.0 init
1640 12:54:17.553776 PCI: 00:14.0 init finished in 0 msecs
1641 12:54:17.557132 PCI: 00:14.2 init
1642 12:54:17.560309 PCI: 00:14.2 init finished in 0 msecs
1643 12:54:17.563642 PCI: 00:15.0 init
1644 12:54:17.566524 I2C bus 0 version 0x3230302a
1645 12:54:17.570536 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1646 12:54:17.573652 PCI: 00:15.0 init finished in 6 msecs
1647 12:54:17.573740 PCI: 00:15.1 init
1648 12:54:17.576539 I2C bus 1 version 0x3230302a
1649 12:54:17.579787 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1650 12:54:17.586591 PCI: 00:15.1 init finished in 6 msecs
1651 12:54:17.586683 PCI: 00:15.2 init
1652 12:54:17.590054 I2C bus 2 version 0x3230302a
1653 12:54:17.592941 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1654 12:54:17.596581 PCI: 00:15.2 init finished in 6 msecs
1655 12:54:17.600081 PCI: 00:15.3 init
1656 12:54:17.603581 I2C bus 3 version 0x3230302a
1657 12:54:17.606614 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1658 12:54:17.609871 PCI: 00:15.3 init finished in 6 msecs
1659 12:54:17.613113 PCI: 00:16.0 init
1660 12:54:17.616568 PCI: 00:16.0 init finished in 0 msecs
1661 12:54:17.619759 PCI: 00:19.1 init
1662 12:54:17.623370 I2C bus 5 version 0x3230302a
1663 12:54:17.626148 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1664 12:54:17.629511 PCI: 00:19.1 init finished in 6 msecs
1665 12:54:17.632921 PCI: 00:1d.0 init
1666 12:54:17.636640 Initializing PCH PCIe bridge.
1667 12:54:17.639297 PCI: 00:1d.0 init finished in 3 msecs
1668 12:54:17.642667 PCI: 00:1f.0 init
1669 12:54:17.646126 IOAPIC: Initializing IOAPIC at 0xfec00000
1670 12:54:17.649677 IOAPIC: Bootstrap Processor Local APIC = 0x00
1671 12:54:17.653149 IOAPIC: ID = 0x02
1672 12:54:17.655837 IOAPIC: Dumping registers
1673 12:54:17.655926 reg 0x0000: 0x02000000
1674 12:54:17.659223 reg 0x0001: 0x00770020
1675 12:54:17.662725 reg 0x0002: 0x00000000
1676 12:54:17.665643 PCI: 00:1f.0 init finished in 21 msecs
1677 12:54:17.669232 PCI: 00:1f.2 init
1678 12:54:17.672848 Disabling ACPI via APMC.
1679 12:54:17.672936 APMC done.
1680 12:54:17.679465 PCI: 00:1f.2 init finished in 5 msecs
1681 12:54:17.689377 PCI: 01:00.0 init
1682 12:54:17.692885 PCI: 01:00.0 init finished in 0 msecs
1683 12:54:17.696294 PNP: 0c09.0 init
1684 12:54:17.699426 Google Chrome EC uptime: 8.258 seconds
1685 12:54:17.706063 Google Chrome AP resets since EC boot: 1
1686 12:54:17.709301 Google Chrome most recent AP reset causes:
1687 12:54:17.713014 0.451: 32775 shutdown: entering G3
1688 12:54:17.719392 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1689 12:54:17.722432 PNP: 0c09.0 init finished in 22 msecs
1690 12:54:17.728435 Devices initialized
1691 12:54:17.731457 Show all devs... After init.
1692 12:54:17.735164 Root Device: enabled 1
1693 12:54:17.735255 DOMAIN: 0000: enabled 1
1694 12:54:17.738673 CPU_CLUSTER: 0: enabled 1
1695 12:54:17.741410 PCI: 00:00.0: enabled 1
1696 12:54:17.745203 PCI: 00:02.0: enabled 1
1697 12:54:17.745293 PCI: 00:04.0: enabled 1
1698 12:54:17.748392 PCI: 00:05.0: enabled 1
1699 12:54:17.751392 PCI: 00:06.0: enabled 0
1700 12:54:17.754877 PCI: 00:07.0: enabled 0
1701 12:54:17.755001 PCI: 00:07.1: enabled 0
1702 12:54:17.758353 PCI: 00:07.2: enabled 0
1703 12:54:17.761712 PCI: 00:07.3: enabled 0
1704 12:54:17.764572 PCI: 00:08.0: enabled 1
1705 12:54:17.764681 PCI: 00:09.0: enabled 0
1706 12:54:17.768335 PCI: 00:0a.0: enabled 0
1707 12:54:17.771769 PCI: 00:0d.0: enabled 1
1708 12:54:17.774536 PCI: 00:0d.1: enabled 0
1709 12:54:17.774640 PCI: 00:0d.2: enabled 0
1710 12:54:17.778187 PCI: 00:0d.3: enabled 0
1711 12:54:17.782040 PCI: 00:0e.0: enabled 0
1712 12:54:17.782151 PCI: 00:10.2: enabled 1
1713 12:54:17.784423 PCI: 00:10.6: enabled 0
1714 12:54:17.788062 PCI: 00:10.7: enabled 0
1715 12:54:17.791279 PCI: 00:12.0: enabled 0
1716 12:54:17.791401 PCI: 00:12.6: enabled 0
1717 12:54:17.794672 PCI: 00:13.0: enabled 0
1718 12:54:17.797672 PCI: 00:14.0: enabled 1
1719 12:54:17.801471 PCI: 00:14.1: enabled 0
1720 12:54:17.801584 PCI: 00:14.2: enabled 1
1721 12:54:17.804491 PCI: 00:14.3: enabled 1
1722 12:54:17.807540 PCI: 00:15.0: enabled 1
1723 12:54:17.811002 PCI: 00:15.1: enabled 1
1724 12:54:17.811149 PCI: 00:15.2: enabled 1
1725 12:54:17.814737 PCI: 00:15.3: enabled 1
1726 12:54:17.818177 PCI: 00:16.0: enabled 1
1727 12:54:17.820979 PCI: 00:16.1: enabled 0
1728 12:54:17.821080 PCI: 00:16.2: enabled 0
1729 12:54:17.824336 PCI: 00:16.3: enabled 0
1730 12:54:17.827985 PCI: 00:16.4: enabled 0
1731 12:54:17.828094 PCI: 00:16.5: enabled 0
1732 12:54:17.831117 PCI: 00:17.0: enabled 0
1733 12:54:17.834246 PCI: 00:19.0: enabled 0
1734 12:54:17.837551 PCI: 00:19.1: enabled 1
1735 12:54:17.837664 PCI: 00:19.2: enabled 0
1736 12:54:17.841085 PCI: 00:1c.0: enabled 1
1737 12:54:17.844291 PCI: 00:1c.1: enabled 0
1738 12:54:17.847679 PCI: 00:1c.2: enabled 0
1739 12:54:17.847788 PCI: 00:1c.3: enabled 0
1740 12:54:17.850981 PCI: 00:1c.4: enabled 0
1741 12:54:17.853918 PCI: 00:1c.5: enabled 0
1742 12:54:17.857658 PCI: 00:1c.6: enabled 1
1743 12:54:17.857778 PCI: 00:1c.7: enabled 0
1744 12:54:17.860820 PCI: 00:1d.0: enabled 1
1745 12:54:17.864298 PCI: 00:1d.1: enabled 0
1746 12:54:17.867542 PCI: 00:1d.2: enabled 1
1747 12:54:17.867650 PCI: 00:1d.3: enabled 0
1748 12:54:17.870717 PCI: 00:1e.0: enabled 1
1749 12:54:17.874236 PCI: 00:1e.1: enabled 0
1750 12:54:17.874372 PCI: 00:1e.2: enabled 1
1751 12:54:17.877371 PCI: 00:1e.3: enabled 1
1752 12:54:17.880535 PCI: 00:1f.0: enabled 1
1753 12:54:17.884298 PCI: 00:1f.1: enabled 0
1754 12:54:17.884415 PCI: 00:1f.2: enabled 1
1755 12:54:17.887868 PCI: 00:1f.3: enabled 1
1756 12:54:17.890828 PCI: 00:1f.4: enabled 0
1757 12:54:17.894299 PCI: 00:1f.5: enabled 1
1758 12:54:17.894415 PCI: 00:1f.6: enabled 0
1759 12:54:17.897659 PCI: 00:1f.7: enabled 0
1760 12:54:17.900761 APIC: 00: enabled 1
1761 12:54:17.900866 GENERIC: 0.0: enabled 1
1762 12:54:17.903940 GENERIC: 0.0: enabled 1
1763 12:54:17.907633 GENERIC: 1.0: enabled 1
1764 12:54:17.911357 GENERIC: 0.0: enabled 1
1765 12:54:17.911476 GENERIC: 1.0: enabled 1
1766 12:54:17.913791 USB0 port 0: enabled 1
1767 12:54:17.917523 GENERIC: 0.0: enabled 1
1768 12:54:17.920342 USB0 port 0: enabled 1
1769 12:54:17.920453 GENERIC: 0.0: enabled 1
1770 12:54:17.923933 I2C: 00:1a: enabled 1
1771 12:54:17.926990 I2C: 00:31: enabled 1
1772 12:54:17.927141 I2C: 00:32: enabled 1
1773 12:54:17.930777 I2C: 00:10: enabled 1
1774 12:54:17.933760 I2C: 00:15: enabled 1
1775 12:54:17.933858 GENERIC: 0.0: enabled 0
1776 12:54:17.937011 GENERIC: 1.0: enabled 0
1777 12:54:17.940519 GENERIC: 0.0: enabled 1
1778 12:54:17.940638 SPI: 00: enabled 1
1779 12:54:17.943477 SPI: 00: enabled 1
1780 12:54:17.947025 PNP: 0c09.0: enabled 1
1781 12:54:17.950510 GENERIC: 0.0: enabled 1
1782 12:54:17.950622 USB3 port 0: enabled 1
1783 12:54:17.953524 USB3 port 1: enabled 1
1784 12:54:17.956629 USB3 port 2: enabled 0
1785 12:54:17.956741 USB3 port 3: enabled 0
1786 12:54:17.960305 USB2 port 0: enabled 0
1787 12:54:17.963632 USB2 port 1: enabled 1
1788 12:54:17.963737 USB2 port 2: enabled 1
1789 12:54:17.967351 USB2 port 3: enabled 0
1790 12:54:17.970701 USB2 port 4: enabled 1
1791 12:54:17.973506 USB2 port 5: enabled 0
1792 12:54:17.973607 USB2 port 6: enabled 0
1793 12:54:17.976740 USB2 port 7: enabled 0
1794 12:54:17.979891 USB2 port 8: enabled 0
1795 12:54:17.980000 USB2 port 9: enabled 0
1796 12:54:17.983210 USB3 port 0: enabled 0
1797 12:54:17.986650 USB3 port 1: enabled 1
1798 12:54:17.989654 USB3 port 2: enabled 0
1799 12:54:17.989768 USB3 port 3: enabled 0
1800 12:54:17.993747 GENERIC: 0.0: enabled 1
1801 12:54:17.996533 GENERIC: 1.0: enabled 1
1802 12:54:17.996665 APIC: 01: enabled 1
1803 12:54:17.999822 APIC: 03: enabled 1
1804 12:54:18.002909 APIC: 06: enabled 1
1805 12:54:18.003020 APIC: 05: enabled 1
1806 12:54:18.006289 APIC: 04: enabled 1
1807 12:54:18.009815 APIC: 02: enabled 1
1808 12:54:18.009924 APIC: 07: enabled 1
1809 12:54:18.013184 PCI: 01:00.0: enabled 1
1810 12:54:18.019786 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1811 12:54:18.022634 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1812 12:54:18.025933 ELOG: NV offset 0xf30000 size 0x1000
1813 12:54:18.033426 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1814 12:54:18.040210 ELOG: Event(17) added with size 13 at 2023-04-05 12:54:18 UTC
1815 12:54:18.046644 ELOG: Event(92) added with size 9 at 2023-04-05 12:54:18 UTC
1816 12:54:18.053063 ELOG: Event(93) added with size 9 at 2023-04-05 12:54:18 UTC
1817 12:54:18.060154 ELOG: Event(9E) added with size 10 at 2023-04-05 12:54:18 UTC
1818 12:54:18.066311 ELOG: Event(9F) added with size 14 at 2023-04-05 12:54:18 UTC
1819 12:54:18.072890 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1820 12:54:18.080085 ELOG: Event(A1) added with size 10 at 2023-04-05 12:54:18 UTC
1821 12:54:18.085991 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1822 12:54:18.092545 ELOG: Event(A0) added with size 9 at 2023-04-05 12:54:18 UTC
1823 12:54:18.095884 elog_add_boot_reason: Logged dev mode boot
1824 12:54:18.102272 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1825 12:54:18.106161 Finalize devices...
1826 12:54:18.106299 Devices finalized
1827 12:54:18.112303 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1828 12:54:18.115598 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1829 12:54:18.122482 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1830 12:54:18.125793 ME: HFSTS1 : 0x80030055
1831 12:54:18.132743 ME: HFSTS2 : 0x30280116
1832 12:54:18.135876 ME: HFSTS3 : 0x00000050
1833 12:54:18.142990 ME: HFSTS4 : 0x00004000
1834 12:54:18.145740 ME: HFSTS5 : 0x00000000
1835 12:54:18.148894 ME: HFSTS6 : 0x40400006
1836 12:54:18.151822 ME: Manufacturing Mode : YES
1837 12:54:18.158527 ME: SPI Protection Mode Enabled : NO
1838 12:54:18.162031 ME: FW Partition Table : OK
1839 12:54:18.165433 ME: Bringup Loader Failure : NO
1840 12:54:18.168526 ME: Firmware Init Complete : NO
1841 12:54:18.172196 ME: Boot Options Present : NO
1842 12:54:18.175468 ME: Update In Progress : NO
1843 12:54:18.179152 ME: D0i3 Support : YES
1844 12:54:18.182150 ME: Low Power State Enabled : NO
1845 12:54:18.188389 ME: CPU Replaced : YES
1846 12:54:18.192381 ME: CPU Replacement Valid : YES
1847 12:54:18.195102 ME: Current Working State : 5
1848 12:54:18.198427 ME: Current Operation State : 1
1849 12:54:18.201797 ME: Current Operation Mode : 3
1850 12:54:18.205284 ME: Error Code : 0
1851 12:54:18.208534 ME: Enhanced Debug Mode : NO
1852 12:54:18.212024 ME: CPU Debug Disabled : YES
1853 12:54:18.215008 ME: TXT Support : NO
1854 12:54:18.221464 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1855 12:54:18.231916 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1856 12:54:18.234832 CBFS: 'fallback/slic' not found.
1857 12:54:18.238448 ACPI: Writing ACPI tables at 76b01000.
1858 12:54:18.238532 ACPI: * FACS
1859 12:54:18.241768 ACPI: * DSDT
1860 12:54:18.244926 Ramoops buffer: 0x100000@0x76a00000.
1861 12:54:18.248635 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1862 12:54:18.254937 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1863 12:54:18.258485 Google Chrome EC: version:
1864 12:54:18.261435 ro: voema_v2.0.10114-a447f03e46
1865 12:54:18.264677 rw: voema_v2.0.10114-a447f03e46
1866 12:54:18.264758 running image: 2
1867 12:54:18.271317 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1868 12:54:18.276578 ACPI: * FADT
1869 12:54:18.276661 SCI is IRQ9
1870 12:54:18.282899 ACPI: added table 1/32, length now 40
1871 12:54:18.282982 ACPI: * SSDT
1872 12:54:18.286423 Found 1 CPU(s) with 8 core(s) each.
1873 12:54:18.293084 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1874 12:54:18.296678 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1875 12:54:18.299346 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1876 12:54:18.302785 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1877 12:54:18.309194 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1878 12:54:18.315581 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1879 12:54:18.318847 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1880 12:54:18.325898 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1881 12:54:18.332874 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1882 12:54:18.335879 \_SB.PCI0.RP09: Added StorageD3Enable property
1883 12:54:18.342198 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1884 12:54:18.345815 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1885 12:54:18.352235 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1886 12:54:18.355063 PS2K: Passing 80 keymaps to kernel
1887 12:54:18.361992 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1888 12:54:18.368793 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1889 12:54:18.375091 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1890 12:54:18.382344 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1891 12:54:18.388964 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1892 12:54:18.394999 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1893 12:54:18.401923 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1894 12:54:18.408589 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1895 12:54:18.412046 ACPI: added table 2/32, length now 44
1896 12:54:18.412132 ACPI: * MCFG
1897 12:54:18.418205 ACPI: added table 3/32, length now 48
1898 12:54:18.418289 ACPI: * TPM2
1899 12:54:18.421760 TPM2 log created at 0x769f0000
1900 12:54:18.425273 ACPI: added table 4/32, length now 52
1901 12:54:18.428676 ACPI: * MADT
1902 12:54:18.428760 SCI is IRQ9
1903 12:54:18.431494 ACPI: added table 5/32, length now 56
1904 12:54:18.434993 current = 76b09850
1905 12:54:18.435100 ACPI: * DMAR
1906 12:54:18.438062 ACPI: added table 6/32, length now 60
1907 12:54:18.444669 ACPI: added table 7/32, length now 64
1908 12:54:18.444755 ACPI: * HPET
1909 12:54:18.448177 ACPI: added table 8/32, length now 68
1910 12:54:18.451526 ACPI: done.
1911 12:54:18.451640 ACPI tables: 35216 bytes.
1912 12:54:18.454499 smbios_write_tables: 769ef000
1913 12:54:18.458236 EC returned error result code 3
1914 12:54:18.464525 Couldn't obtain OEM name from CBI
1915 12:54:18.468115 Create SMBIOS type 16
1916 12:54:18.468198 Create SMBIOS type 17
1917 12:54:18.470947 GENERIC: 0.0 (WIFI Device)
1918 12:54:18.474621 SMBIOS tables: 1734 bytes.
1919 12:54:18.477972 Writing table forward entry at 0x00000500
1920 12:54:18.484268 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1921 12:54:18.487699 Writing coreboot table at 0x76b25000
1922 12:54:18.494113 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1923 12:54:18.497382 1. 0000000000001000-000000000009ffff: RAM
1924 12:54:18.504279 2. 00000000000a0000-00000000000fffff: RESERVED
1925 12:54:18.507440 3. 0000000000100000-00000000769eefff: RAM
1926 12:54:18.514412 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1927 12:54:18.517295 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1928 12:54:18.524580 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1929 12:54:18.530633 7. 0000000077000000-000000007fbfffff: RESERVED
1930 12:54:18.533723 8. 00000000c0000000-00000000cfffffff: RESERVED
1931 12:54:18.540420 9. 00000000f8000000-00000000f9ffffff: RESERVED
1932 12:54:18.543511 10. 00000000fb000000-00000000fb000fff: RESERVED
1933 12:54:18.546942 11. 00000000fe000000-00000000fe00ffff: RESERVED
1934 12:54:18.553644 12. 00000000fed80000-00000000fed87fff: RESERVED
1935 12:54:18.557331 13. 00000000fed90000-00000000fed92fff: RESERVED
1936 12:54:18.563478 14. 00000000feda0000-00000000feda1fff: RESERVED
1937 12:54:18.566950 15. 00000000fedc0000-00000000feddffff: RESERVED
1938 12:54:18.570579 16. 0000000100000000-00000004803fffff: RAM
1939 12:54:18.574045 Passing 4 GPIOs to payload:
1940 12:54:18.580256 NAME | PORT | POLARITY | VALUE
1941 12:54:18.587031 lid | undefined | high | high
1942 12:54:18.590397 power | undefined | high | low
1943 12:54:18.596893 oprom | undefined | high | low
1944 12:54:18.599807 EC in RW | 0x000000e5 | high | high
1945 12:54:18.606609 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1946 12:54:18.609681 coreboot table: 1576 bytes.
1947 12:54:18.612919 IMD ROOT 0. 0x76fff000 0x00001000
1948 12:54:18.616359 IMD SMALL 1. 0x76ffe000 0x00001000
1949 12:54:18.622995 FSP MEMORY 2. 0x76c4e000 0x003b0000
1950 12:54:18.626496 VPD 3. 0x76c4d000 0x00000367
1951 12:54:18.629573 RO MCACHE 4. 0x76c4c000 0x00000fdc
1952 12:54:18.633058 CONSOLE 5. 0x76c2c000 0x00020000
1953 12:54:18.636604 FMAP 6. 0x76c2b000 0x00000578
1954 12:54:18.639594 TIME STAMP 7. 0x76c2a000 0x00000910
1955 12:54:18.642528 VBOOT WORK 8. 0x76c16000 0x00014000
1956 12:54:18.645823 ROMSTG STCK 9. 0x76c15000 0x00001000
1957 12:54:18.652430 AFTER CAR 10. 0x76c0a000 0x0000b000
1958 12:54:18.655639 RAMSTAGE 11. 0x76b97000 0x00073000
1959 12:54:18.659040 REFCODE 12. 0x76b42000 0x00055000
1960 12:54:18.662990 SMM BACKUP 13. 0x76b32000 0x00010000
1961 12:54:18.665566 4f444749 14. 0x76b30000 0x00002000
1962 12:54:18.668837 EXT VBT15. 0x76b2d000 0x0000219f
1963 12:54:18.672649 COREBOOT 16. 0x76b25000 0x00008000
1964 12:54:18.675826 ACPI 17. 0x76b01000 0x00024000
1965 12:54:18.682528 ACPI GNVS 18. 0x76b00000 0x00001000
1966 12:54:18.685429 RAMOOPS 19. 0x76a00000 0x00100000
1967 12:54:18.688807 TPM2 TCGLOG20. 0x769f0000 0x00010000
1968 12:54:18.692239 SMBIOS 21. 0x769ef000 0x00000800
1969 12:54:18.692320 IMD small region:
1970 12:54:18.698935 IMD ROOT 0. 0x76ffec00 0x00000400
1971 12:54:18.702035 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1972 12:54:18.705195 POWER STATE 2. 0x76ffeb80 0x00000044
1973 12:54:18.708413 ROMSTAGE 3. 0x76ffeb60 0x00000004
1974 12:54:18.712248 MEM INFO 4. 0x76ffe980 0x000001e0
1975 12:54:18.718183 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1976 12:54:18.721706 MTRR: Physical address space:
1977 12:54:18.728194 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1978 12:54:18.735205 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1979 12:54:18.741720 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1980 12:54:18.748287 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1981 12:54:18.754598 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1982 12:54:18.758014 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1983 12:54:18.764801 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1984 12:54:18.771162 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 12:54:18.775397 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 12:54:18.778141 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 12:54:18.781802 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 12:54:18.788223 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 12:54:18.791178 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 12:54:18.794348 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 12:54:18.797861 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 12:54:18.804313 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 12:54:18.807917 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 12:54:18.810767 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 12:54:18.814531 call enable_fixed_mtrr()
1996 12:54:18.818005 CPU physical address size: 39 bits
1997 12:54:18.824573 MTRR: default type WB/UC MTRR counts: 6/7.
1998 12:54:18.828544 MTRR: WB selected as default type.
1999 12:54:18.834529 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2000 12:54:18.838052 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2001 12:54:18.844544 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2002 12:54:18.850794 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2003 12:54:18.857449 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2004 12:54:18.864438 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2005 12:54:18.871721 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 12:54:18.874604 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 12:54:18.877858 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 12:54:18.881309 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 12:54:18.888087 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 12:54:18.891409 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 12:54:18.894509 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 12:54:18.897882 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 12:54:18.904254 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 12:54:18.907667 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 12:54:18.910835 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 12:54:18.910943
2017 12:54:18.915277 MTRR check
2018 12:54:18.918417 call enable_fixed_mtrr()
2019 12:54:18.918530 Fixed MTRRs : Enabled
2020 12:54:18.921797 Variable MTRRs: Enabled
2021 12:54:18.921911
2022 12:54:18.925209 CPU physical address size: 39 bits
2023 12:54:18.932622 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
2024 12:54:18.935849 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 12:54:18.942505 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 12:54:18.945765 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 12:54:18.949244 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 12:54:18.953008 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 12:54:18.959277 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 12:54:18.962613 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 12:54:18.966327 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 12:54:18.969161 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 12:54:18.975908 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 12:54:18.979007 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 12:54:18.982665 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 12:54:18.989343 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 12:54:18.989427 call enable_fixed_mtrr()
2038 12:54:18.996255 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 12:54:18.999313 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 12:54:19.002661 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 12:54:19.006387 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 12:54:19.012563 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 12:54:19.015879 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 12:54:19.019034 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 12:54:19.022347 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 12:54:19.029073 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 12:54:19.032222 CPU physical address size: 39 bits
2048 12:54:19.036750 call enable_fixed_mtrr()
2049 12:54:19.041057 Checking cr50 for pending updates
2050 12:54:19.044611 CPU physical address size: 39 bits
2051 12:54:19.048042 MTRR: Fixed MSR 0x250 0x0606060606060606
2052 12:54:19.051237 MTRR: Fixed MSR 0x250 0x0606060606060606
2053 12:54:19.058435 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 12:54:19.060941 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 12:54:19.064599 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 12:54:19.067767 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 12:54:19.074315 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 12:54:19.077628 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 12:54:19.080967 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 12:54:19.084545 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 12:54:19.091065 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 12:54:19.094377 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 12:54:19.100911 MTRR: Fixed MSR 0x258 0x0606060606060606
2064 12:54:19.104341 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 12:54:19.107231 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 12:54:19.110943 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 12:54:19.114089 MTRR: Fixed MSR 0x26a 0x0606060606060606
2068 12:54:19.121096 MTRR: Fixed MSR 0x26b 0x0606060606060606
2069 12:54:19.123910 MTRR: Fixed MSR 0x26c 0x0606060606060606
2070 12:54:19.127852 MTRR: Fixed MSR 0x26d 0x0606060606060606
2071 12:54:19.130968 MTRR: Fixed MSR 0x26e 0x0606060606060606
2072 12:54:19.137426 MTRR: Fixed MSR 0x26f 0x0606060606060606
2073 12:54:19.140472 call enable_fixed_mtrr()
2074 12:54:19.143976 call enable_fixed_mtrr()
2075 12:54:19.146921 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 12:54:19.150474 MTRR: Fixed MSR 0x250 0x0606060606060606
2077 12:54:19.153671 MTRR: Fixed MSR 0x258 0x0606060606060606
2078 12:54:19.160223 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 12:54:19.163529 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 12:54:19.166732 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 12:54:19.170267 MTRR: Fixed MSR 0x26a 0x0606060606060606
2082 12:54:19.176762 MTRR: Fixed MSR 0x26b 0x0606060606060606
2083 12:54:19.180088 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 12:54:19.183667 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 12:54:19.186723 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 12:54:19.193338 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 12:54:19.196605 MTRR: Fixed MSR 0x258 0x0606060606060606
2088 12:54:19.199954 call enable_fixed_mtrr()
2089 12:54:19.203025 MTRR: Fixed MSR 0x259 0x0000000000000000
2090 12:54:19.209669 MTRR: Fixed MSR 0x268 0x0606060606060606
2091 12:54:19.213871 MTRR: Fixed MSR 0x269 0x0606060606060606
2092 12:54:19.216513 MTRR: Fixed MSR 0x26a 0x0606060606060606
2093 12:54:19.219819 MTRR: Fixed MSR 0x26b 0x0606060606060606
2094 12:54:19.226300 MTRR: Fixed MSR 0x26c 0x0606060606060606
2095 12:54:19.230118 MTRR: Fixed MSR 0x26d 0x0606060606060606
2096 12:54:19.232854 MTRR: Fixed MSR 0x26e 0x0606060606060606
2097 12:54:19.236036 MTRR: Fixed MSR 0x26f 0x0606060606060606
2098 12:54:19.240928 CPU physical address size: 39 bits
2099 12:54:19.247661 call enable_fixed_mtrr()
2100 12:54:19.251227 Reading cr50 TPM mode
2101 12:54:19.251350 CPU physical address size: 39 bits
2102 12:54:19.256652 CPU physical address size: 39 bits
2103 12:54:19.263274 BS: BS_PAYLOAD_LOAD entry times (exec / console): 314 / 6 ms
2104 12:54:19.266358 CPU physical address size: 39 bits
2105 12:54:19.276865 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2106 12:54:19.279481 Checking segment from ROM address 0xffc02b38
2107 12:54:19.283217 Checking segment from ROM address 0xffc02b54
2108 12:54:19.289830 Loading segment from ROM address 0xffc02b38
2109 12:54:19.289953 code (compression=0)
2110 12:54:19.299213 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2111 12:54:19.309310 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2112 12:54:19.309427 it's not compressed!
2113 12:54:19.450458 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2114 12:54:19.457536 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2115 12:54:19.463795 Loading segment from ROM address 0xffc02b54
2116 12:54:19.467387 Entry Point 0x30000000
2117 12:54:19.467512 Loaded segments
2118 12:54:19.474373 BS: BS_PAYLOAD_LOAD run times (exec / console): 140 / 63 ms
2119 12:54:19.519103 Finalizing chipset.
2120 12:54:19.522126 Finalizing SMM.
2121 12:54:19.522250 APMC done.
2122 12:54:19.528962 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2123 12:54:19.531863 mp_park_aps done after 0 msecs.
2124 12:54:19.535047 Jumping to boot code at 0x30000000(0x76b25000)
2125 12:54:19.545437 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2126 12:54:19.545569
2127 12:54:19.548547
2128 12:54:19.548653
2129 12:54:19.549057 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2130 12:54:19.549198 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2131 12:54:19.549324 Setting prompt string to ['volteer:']
2132 12:54:19.549447 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2133 12:54:19.552094 Starting depthcharge on Voema...
2134 12:54:19.552207
2135 12:54:19.558277 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2136 12:54:19.558390
2137 12:54:19.565005 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2138 12:54:19.565124
2139 12:54:19.571964 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2140 12:54:19.572077
2141 12:54:19.575316 Failed to find eMMC card reader
2142 12:54:19.575430
2143 12:54:19.578215 Wipe memory regions:
2144 12:54:19.578326
2145 12:54:19.581439 [0x00000000001000, 0x000000000a0000)
2146 12:54:19.581550
2147 12:54:19.584791 [0x00000000100000, 0x00000030000000)
2148 12:54:19.619451
2149 12:54:19.622829 [0x00000032662db0, 0x000000769ef000)
2150 12:54:19.669944
2151 12:54:19.673470 [0x00000100000000, 0x00000480400000)
2152 12:54:20.317911
2153 12:54:20.320754 ec_init: CrosEC protocol v3 supported (256, 256)
2154 12:54:20.752631
2155 12:54:20.752789 R8152: Initializing
2156 12:54:20.752862
2157 12:54:20.755675 Version 6 (ocp_data = 5c30)
2158 12:54:20.755759
2159 12:54:20.759465 R8152: Done initializing
2160 12:54:20.759548
2161 12:54:20.762548 Adding net device
2162 12:54:21.064554
2163 12:54:21.067206 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2164 12:54:21.067596
2165 12:54:21.067902
2166 12:54:21.068186
2167 12:54:21.071372 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2169 12:54:21.173017 volteer: tftpboot 192.168.201.1 9879107/tftp-deploy-5t6wizud/kernel/bzImage 9879107/tftp-deploy-5t6wizud/kernel/cmdline 9879107/tftp-deploy-5t6wizud/ramdisk/ramdisk.cpio.gz
2170 12:54:21.173574 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2171 12:54:21.173987 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2172 12:54:21.178325 tftpboot 192.168.201.1 9879107/tftp-deploy-5t6wizud/kernel/bzImaoy-5t6wizud/kernel/cmdline 9879107/tftp-deploy-5t6wizud/ramdisk/ramdisk.cpio.gz
2173 12:54:21.178719
2174 12:54:21.179192 Waiting for link
2175 12:54:21.381395
2176 12:54:21.381880 done.
2177 12:54:21.382268
2178 12:54:21.382623 MAC: 00:24:32:30:7d:ab
2179 12:54:21.383049
2180 12:54:21.384822 Sending DHCP discover... done.
2181 12:54:21.385322
2182 12:54:21.388438 Waiting for reply... done.
2183 12:54:21.388811
2184 12:54:21.391283 Sending DHCP request... done.
2185 12:54:21.391658
2186 12:54:21.394883 Waiting for reply... done.
2187 12:54:21.395293
2188 12:54:21.397749 My ip is 192.168.201.20
2189 12:54:21.398240
2190 12:54:21.401377 The DHCP server ip is 192.168.201.1
2191 12:54:21.401717
2192 12:54:21.404402 TFTP server IP predefined by user: 192.168.201.1
2193 12:54:21.404743
2194 12:54:21.411265 Bootfile predefined by user: 9879107/tftp-deploy-5t6wizud/kernel/bzImage
2195 12:54:21.411624
2196 12:54:21.414706 Sending tftp read request... done.
2197 12:54:21.417728
2198 12:54:21.423436 Waiting for the transfer...
2199 12:54:21.423835
2200 12:54:22.127030 00000000 ################################################################
2201 12:54:22.127589
2202 12:54:22.701587 00080000 ################################################################
2203 12:54:22.701738
2204 12:54:23.283759 00100000 ################################################################
2205 12:54:23.283910
2206 12:54:23.924287 00180000 ################################################################
2207 12:54:23.924960
2208 12:54:24.502038 00200000 ################################################################
2209 12:54:24.502641
2210 12:54:25.116978 00280000 ################################################################
2211 12:54:25.117125
2212 12:54:25.686424 00300000 ################################################################
2213 12:54:25.686556
2214 12:54:26.276166 00380000 ################################################################
2215 12:54:26.276757
2216 12:54:26.849641 00400000 ################################################################
2217 12:54:26.850189
2218 12:54:27.401322 00480000 ################################################################
2219 12:54:27.401493
2220 12:54:27.962421 00500000 ################################################################
2221 12:54:27.963095
2222 12:54:28.597640 00580000 ################################################################
2223 12:54:28.598137
2224 12:54:29.221572 00600000 ################################################################
2225 12:54:29.222106
2226 12:54:29.795981 00680000 ################################################################
2227 12:54:29.796118
2228 12:54:30.311778 00700000 ################################################################
2229 12:54:30.311915
2230 12:54:30.839628 00780000 ################################################################
2231 12:54:30.839764
2232 12:54:31.369425 00800000 ################################################################
2233 12:54:31.369597
2234 12:54:31.906898 00880000 ################################################################
2235 12:54:31.907083
2236 12:54:32.438123 00900000 ################################################################
2237 12:54:32.438262
2238 12:54:32.968290 00980000 ################################################################
2239 12:54:32.968425
2240 12:54:33.346644 00a00000 ############################################## done.
2241 12:54:33.346781
2242 12:54:33.350356 The bootfile was 10854400 bytes long.
2243 12:54:33.350442
2244 12:54:33.353787 Sending tftp read request... done.
2245 12:54:33.353872
2246 12:54:33.357034 Waiting for the transfer...
2247 12:54:33.357119
2248 12:54:33.879469 00000000 ################################################################
2249 12:54:33.879641
2250 12:54:34.400756 00080000 ################################################################
2251 12:54:34.400924
2252 12:54:34.924807 00100000 ################################################################
2253 12:54:34.924942
2254 12:54:35.445418 00180000 ################################################################
2255 12:54:35.445558
2256 12:54:35.974593 00200000 ################################################################
2257 12:54:35.974733
2258 12:54:36.496474 00280000 ################################################################
2259 12:54:36.496638
2260 12:54:37.021561 00300000 ################################################################
2261 12:54:37.021701
2262 12:54:37.553862 00380000 ################################################################
2263 12:54:37.554037
2264 12:54:38.085374 00400000 ################################################################
2265 12:54:38.085510
2266 12:54:38.607782 00480000 ################################################################
2267 12:54:38.607925
2268 12:54:39.126110 00500000 ################################################################
2269 12:54:39.126242
2270 12:54:39.512685 00580000 ################################################ done.
2271 12:54:39.512834
2272 12:54:39.515830 Sending tftp read request... done.
2273 12:54:39.515912
2274 12:54:39.519243 Waiting for the transfer...
2275 12:54:39.519349
2276 12:54:39.522336 00000000 # done.
2277 12:54:39.522411
2278 12:54:39.532394 Command line loaded dynamically from TFTP file: 9879107/tftp-deploy-5t6wizud/kernel/cmdline
2279 12:54:39.532510
2280 12:54:39.551871 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9879107/extract-nfsrootfs-m3mha37a,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2281 12:54:39.557746
2282 12:54:39.561314 Shutting down all USB controllers.
2283 12:54:39.561400
2284 12:54:39.561468 Removing current net device
2285 12:54:39.561530
2286 12:54:39.564493 Finalizing coreboot
2287 12:54:39.564578
2288 12:54:39.570765 Exiting depthcharge with code 4 at timestamp: 28596139
2289 12:54:39.570851
2290 12:54:39.570918
2291 12:54:39.570981 Starting kernel ...
2292 12:54:39.571042
2293 12:54:39.571422 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2294 12:54:39.571520 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2295 12:54:39.571600 Setting prompt string to ['Linux version [0-9]']
2296 12:54:39.571672 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2297 12:54:39.571741 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2298 12:54:39.573693
2300 12:59:04.572243 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2302 12:59:04.573259 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2304 12:59:04.573990 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2307 12:59:04.575329 end: 2 depthcharge-action (duration 00:05:00) [common]
2309 12:59:04.576308 Cleaning after the job
2310 12:59:04.576716 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/ramdisk
2311 12:59:04.579402 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/kernel
2312 12:59:04.583280 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/nfsrootfs
2313 12:59:04.651776 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879107/tftp-deploy-5t6wizud/modules
2314 12:59:04.652274 start: 5.1 power-off (timeout 00:00:30) [common]
2315 12:59:04.652445 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2316 12:59:04.729087 >> Command sent successfully.
2317 12:59:04.733650 Returned 0 in 0 seconds
2318 12:59:04.835043 end: 5.1 power-off (duration 00:00:00) [common]
2320 12:59:04.836603 start: 5.2 read-feedback (timeout 00:10:00) [common]
2321 12:59:04.837755 Listened to connection for namespace 'common' for up to 1s
2322 12:59:05.842424 Finalising connection for namespace 'common'
2323 12:59:05.843136 Disconnecting from shell: Finalise
2324 12:59:05.843612
2325 12:59:05.944817 end: 5.2 read-feedback (duration 00:00:01) [common]
2326 12:59:05.945323 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9879107
2327 12:59:06.086860 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9879107
2328 12:59:06.087064 JobError: Your job cannot terminate cleanly.