Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:54:10.109224 lava-dispatcher, installed at version: 2023.01
2 12:54:10.109447 start: 0 validate
3 12:54:10.109605 Start time: 2023-04-05 12:54:10.109598+00:00 (UTC)
4 12:54:10.109748 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:54:10.109876 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230331.0%2Famd64%2Frootfs.cpio.gz exists
6 12:54:10.396449 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:54:10.396716 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:54:10.687473 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:54:10.687731 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:54:15.022154 validate duration: 4.91
12 12:54:15.022556 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:54:15.022705 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:54:15.022838 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:54:15.022981 Not decompressing ramdisk as can be used compressed.
16 12:54:15.023107 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230331.0/amd64/rootfs.cpio.gz
17 12:54:15.023211 saving as /var/lib/lava/dispatcher/tmp/9879109/tftp-deploy-_lky30fg/ramdisk/rootfs.cpio.gz
18 12:54:15.023310 total size: 35753363 (34MB)
19 12:54:15.741899 progress 0% (0MB)
20 12:54:15.750828 progress 5% (1MB)
21 12:54:15.759782 progress 10% (3MB)
22 12:54:15.768457 progress 15% (5MB)
23 12:54:15.777179 progress 20% (6MB)
24 12:54:15.785997 progress 25% (8MB)
25 12:54:15.794890 progress 30% (10MB)
26 12:54:15.803544 progress 35% (11MB)
27 12:54:15.812330 progress 40% (13MB)
28 12:54:15.821037 progress 45% (15MB)
29 12:54:15.829841 progress 50% (17MB)
30 12:54:15.838674 progress 55% (18MB)
31 12:54:15.847260 progress 60% (20MB)
32 12:54:15.856370 progress 65% (22MB)
33 12:54:15.865058 progress 70% (23MB)
34 12:54:15.874060 progress 75% (25MB)
35 12:54:15.882966 progress 80% (27MB)
36 12:54:15.891823 progress 85% (29MB)
37 12:54:15.900661 progress 90% (30MB)
38 12:54:15.909472 progress 95% (32MB)
39 12:54:15.918183 progress 100% (34MB)
40 12:54:15.918329 34MB downloaded in 0.90s (38.10MB/s)
41 12:54:15.918486 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:54:15.918735 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:54:15.918823 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:54:15.918909 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:54:15.919017 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:54:15.919085 saving as /var/lib/lava/dispatcher/tmp/9879109/tftp-deploy-_lky30fg/kernel/bzImage
48 12:54:15.919146 total size: 10854400 (10MB)
49 12:54:15.919207 No compression specified
50 12:54:15.920316 progress 0% (0MB)
51 12:54:15.922975 progress 5% (0MB)
52 12:54:15.925717 progress 10% (1MB)
53 12:54:15.928418 progress 15% (1MB)
54 12:54:15.931233 progress 20% (2MB)
55 12:54:15.933808 progress 25% (2MB)
56 12:54:15.936519 progress 30% (3MB)
57 12:54:15.939101 progress 35% (3MB)
58 12:54:15.942217 progress 40% (4MB)
59 12:54:15.944963 progress 45% (4MB)
60 12:54:15.947631 progress 50% (5MB)
61 12:54:15.950343 progress 55% (5MB)
62 12:54:15.953287 progress 60% (6MB)
63 12:54:15.956133 progress 65% (6MB)
64 12:54:15.958788 progress 70% (7MB)
65 12:54:15.961643 progress 75% (7MB)
66 12:54:15.964157 progress 80% (8MB)
67 12:54:15.966810 progress 85% (8MB)
68 12:54:15.969425 progress 90% (9MB)
69 12:54:15.971973 progress 95% (9MB)
70 12:54:15.974942 progress 100% (10MB)
71 12:54:15.975102 10MB downloaded in 0.06s (185.01MB/s)
72 12:54:15.975364 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:54:15.975729 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:54:15.975845 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:54:15.975962 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:54:15.976099 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:54:15.976192 saving as /var/lib/lava/dispatcher/tmp/9879109/tftp-deploy-_lky30fg/modules/modules.tar
79 12:54:15.976280 total size: 484468 (0MB)
80 12:54:15.976367 Using unxz to decompress xz
81 12:54:15.979884 progress 6% (0MB)
82 12:54:15.980286 progress 13% (0MB)
83 12:54:15.980521 progress 20% (0MB)
84 12:54:15.981953 progress 27% (0MB)
85 12:54:15.984235 progress 33% (0MB)
86 12:54:15.986463 progress 40% (0MB)
87 12:54:15.988841 progress 47% (0MB)
88 12:54:15.990989 progress 54% (0MB)
89 12:54:15.992702 progress 60% (0MB)
90 12:54:15.994715 progress 67% (0MB)
91 12:54:15.997322 progress 74% (0MB)
92 12:54:15.999329 progress 81% (0MB)
93 12:54:16.001142 progress 87% (0MB)
94 12:54:16.003076 progress 94% (0MB)
95 12:54:16.004881 progress 100% (0MB)
96 12:54:16.011139 0MB downloaded in 0.03s (13.26MB/s)
97 12:54:16.011405 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:54:16.011685 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:54:16.011775 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:54:16.011868 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:54:16.011949 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:54:16.012034 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:54:16.012219 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt
105 12:54:16.012324 makedir: /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin
106 12:54:16.012411 makedir: /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/tests
107 12:54:16.012491 makedir: /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/results
108 12:54:16.012604 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-add-keys
109 12:54:16.012776 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-add-sources
110 12:54:16.012891 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-background-process-start
111 12:54:16.013005 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-background-process-stop
112 12:54:16.013115 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-common-functions
113 12:54:16.013222 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-echo-ipv4
114 12:54:16.013336 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-install-packages
115 12:54:16.013443 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-installed-packages
116 12:54:16.013593 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-os-build
117 12:54:16.013702 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-probe-channel
118 12:54:16.013810 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-probe-ip
119 12:54:16.013919 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-target-ip
120 12:54:16.014026 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-target-mac
121 12:54:16.014133 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-target-storage
122 12:54:16.014243 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-test-case
123 12:54:16.014350 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-test-event
124 12:54:16.014456 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-test-feedback
125 12:54:16.014564 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-test-raise
126 12:54:16.014688 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-test-reference
127 12:54:16.014829 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-test-runner
128 12:54:16.014938 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-test-set
129 12:54:16.015046 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-test-shell
130 12:54:16.015157 Updating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-install-packages (oe)
131 12:54:16.015267 Updating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/bin/lava-installed-packages (oe)
132 12:54:16.015363 Creating /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/environment
133 12:54:16.015450 LAVA metadata
134 12:54:16.015521 - LAVA_JOB_ID=9879109
135 12:54:16.015583 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:54:16.015681 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:54:16.015749 skipped lava-vland-overlay
138 12:54:16.015823 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:54:16.015921 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:54:16.016015 skipped lava-multinode-overlay
141 12:54:16.016120 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:54:16.016231 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:54:16.016337 Loading test definitions
144 12:54:16.016461 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:54:16.016569 Using /lava-9879109 at stage 0
146 12:54:16.016831 uuid=9879109_1.4.2.3.1 testdef=None
147 12:54:16.016920 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:54:16.017010 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:54:16.017480 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:54:16.017716 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:54:16.018387 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:54:16.018679 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:54:16.019169 runner path: /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/0/tests/0_cros-ec test_uuid 9879109_1.4.2.3.1
156 12:54:16.019307 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:54:16.019508 Creating lava-test-runner.conf files
159 12:54:16.019570 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879109/lava-overlay-jp8nd8tt/lava-9879109/0 for stage 0
160 12:54:16.019649 - 0_cros-ec
161 12:54:16.019735 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 12:54:16.019816 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
163 12:54:16.026238 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 12:54:16.026341 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
165 12:54:16.026427 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 12:54:16.026510 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 12:54:16.026594 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
168 12:54:16.867048 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
169 12:54:16.867516 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
170 12:54:16.867689 extracting modules file /var/lib/lava/dispatcher/tmp/9879109/tftp-deploy-_lky30fg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879109/extract-overlay-ramdisk-2v16q2ob/ramdisk
171 12:54:16.884838 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 12:54:16.885055 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
173 12:54:16.885191 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9879109/compress-overlay-p3ercm4x/overlay-1.4.2.4.tar.gz to ramdisk
174 12:54:16.885305 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9879109/compress-overlay-p3ercm4x/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9879109/extract-overlay-ramdisk-2v16q2ob/ramdisk
175 12:54:16.892837 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 12:54:16.893019 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
177 12:54:16.893158 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 12:54:16.893292 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
179 12:54:16.893417 Building ramdisk /var/lib/lava/dispatcher/tmp/9879109/extract-overlay-ramdisk-2v16q2ob/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9879109/extract-overlay-ramdisk-2v16q2ob/ramdisk
180 12:54:17.230602 >> 188232 blocks
181 12:54:20.857082 rename /var/lib/lava/dispatcher/tmp/9879109/extract-overlay-ramdisk-2v16q2ob/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9879109/tftp-deploy-_lky30fg/ramdisk/ramdisk.cpio.gz
182 12:54:20.857575 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
183 12:54:20.857732 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
184 12:54:20.857866 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
185 12:54:20.857990 No mkimage arch provided, not using FIT.
186 12:54:20.858113 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 12:54:20.858228 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 12:54:20.858367 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
189 12:54:20.858486 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
190 12:54:20.858601 No LXC device requested
191 12:54:20.858717 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 12:54:20.858839 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
193 12:54:20.858951 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 12:54:20.859054 Checking files for TFTP limit of 4294967296 bytes.
195 12:54:20.859574 end: 1 tftp-deploy (duration 00:00:06) [common]
196 12:54:20.859705 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 12:54:20.859826 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 12:54:20.859977 substitutions:
199 12:54:20.860072 - {DTB}: None
200 12:54:20.860166 - {INITRD}: 9879109/tftp-deploy-_lky30fg/ramdisk/ramdisk.cpio.gz
201 12:54:20.860256 - {KERNEL}: 9879109/tftp-deploy-_lky30fg/kernel/bzImage
202 12:54:20.860345 - {LAVA_MAC}: None
203 12:54:20.860430 - {PRESEED_CONFIG}: None
204 12:54:20.860516 - {PRESEED_LOCAL}: None
205 12:54:20.860601 - {RAMDISK}: 9879109/tftp-deploy-_lky30fg/ramdisk/ramdisk.cpio.gz
206 12:54:20.860684 - {ROOT_PART}: None
207 12:54:20.860766 - {ROOT}: None
208 12:54:20.860852 - {SERVER_IP}: 192.168.201.1
209 12:54:20.860935 - {TEE}: None
210 12:54:20.861017 Parsed boot commands:
211 12:54:20.861102 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 12:54:20.861296 Parsed boot commands: tftpboot 192.168.201.1 9879109/tftp-deploy-_lky30fg/kernel/bzImage 9879109/tftp-deploy-_lky30fg/kernel/cmdline 9879109/tftp-deploy-_lky30fg/ramdisk/ramdisk.cpio.gz
213 12:54:20.861412 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 12:54:20.861534 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 12:54:20.861628 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 12:54:20.861725 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 12:54:20.861794 Not connected, no need to disconnect.
218 12:54:20.861868 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 12:54:20.861953 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 12:54:20.862021 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-14'
221 12:54:20.865377 Setting prompt string to ['lava-test: # ']
222 12:54:20.865790 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 12:54:20.865940 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 12:54:20.866073 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 12:54:20.866201 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 12:54:20.867198 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
227 12:54:25.999686 >> Command sent successfully.
228 12:54:26.002225 Returned 0 in 5 seconds
229 12:54:26.103027 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 12:54:26.103345 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 12:54:26.103446 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 12:54:26.103565 Setting prompt string to 'Starting depthcharge on Voema...'
234 12:54:26.103633 Changing prompt to 'Starting depthcharge on Voema...'
235 12:54:26.103715 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
236 12:54:26.104010 [Enter `^Ec?' for help]
237 12:54:27.663393
238 12:54:27.663541
239 12:54:27.673854 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
240 12:54:27.676603 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
241 12:54:27.683589 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
242 12:54:27.687542 CPU: AES supported, TXT NOT supported, VT supported
243 12:54:27.694729 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
244 12:54:27.697549 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
245 12:54:27.704468 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
246 12:54:27.707922 VBOOT: Loading verstage.
247 12:54:27.711171 FMAP: Found "FLASH" version 1.1 at 0x1804000.
248 12:54:27.717662 FMAP: base = 0x0 size = 0x2000000 #areas = 32
249 12:54:27.721021 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
250 12:54:27.730846 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
251 12:54:27.737759 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
252 12:54:27.737873
253 12:54:27.737942
254 12:54:27.748214 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
255 12:54:27.764039 Probing TPM: . done!
256 12:54:27.767309 TPM ready after 0 ms
257 12:54:27.771136 Connected to device vid:did:rid of 1ae0:0028:00
258 12:54:27.782243 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
259 12:54:27.788305 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
260 12:54:27.791789 Initialized TPM device CR50 revision 0
261 12:54:27.848100 tlcl_send_startup: Startup return code is 0
262 12:54:27.848346 TPM: setup succeeded
263 12:54:27.862478 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
264 12:54:27.876535 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
265 12:54:27.889737 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
266 12:54:27.899160 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 12:54:27.903285 Chrome EC: UHEPI supported
268 12:54:27.906720 Phase 1
269 12:54:27.909548 FMAP: area GBB found @ 1805000 (458752 bytes)
270 12:54:27.919858 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
271 12:54:27.926159 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
272 12:54:27.932744 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 12:54:27.939270 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 12:54:27.942542 Recovery requested (1009000e)
275 12:54:27.946028 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 12:54:27.958072 tlcl_extend: response is 0
277 12:54:27.964426 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 12:54:27.974630 tlcl_extend: response is 0
279 12:54:27.981260 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
280 12:54:27.988089 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
281 12:54:27.994450 BS: verstage times (exec / console): total (unknown) / 142 ms
282 12:54:27.994560
283 12:54:27.994634
284 12:54:28.007637 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
285 12:54:28.013959 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 12:54:28.017432 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 12:54:28.021132 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
288 12:54:28.027364 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 12:54:28.030968 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
290 12:54:28.034361 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
291 12:54:28.037098 TCO_STS: 0000 0000
292 12:54:28.040617 GEN_PMCON: d0015038 00002200
293 12:54:28.043989 GBLRST_CAUSE: 00000000 00000000
294 12:54:28.047281 HPR_CAUSE0: 00000000
295 12:54:28.047392 prev_sleep_state 5
296 12:54:28.050544 Boot Count incremented to 6205
297 12:54:28.057212 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 12:54:28.063351 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
299 12:54:28.073596 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
300 12:54:28.080303 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
301 12:54:28.083630 Chrome EC: UHEPI supported
302 12:54:28.089712 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
303 12:54:28.101386 Probing TPM: done!
304 12:54:28.108160 Connected to device vid:did:rid of 1ae0:0028:00
305 12:54:28.117994 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
306 12:54:28.121381 Initialized TPM device CR50 revision 0
307 12:54:28.136089 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
308 12:54:28.142914 MRC: Hash idx 0x100b comparison successful.
309 12:54:28.145789 MRC cache found, size faa8
310 12:54:28.145881 bootmode is set to: 2
311 12:54:28.149323 SPD index = 2
312 12:54:28.155940 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
313 12:54:28.159129 SPD: module type is LPDDR4X
314 12:54:28.162566 SPD: module part number is MT53D1G64D4NW-046
315 12:54:28.169291 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
316 12:54:28.172476 SPD: device width 16 bits, bus width 16 bits
317 12:54:28.179767 SPD: module size is 2048 MB (per channel)
318 12:54:28.609706 CBMEM:
319 12:54:28.613146 IMD: root @ 0x76fff000 254 entries.
320 12:54:28.616404 IMD: root @ 0x76ffec00 62 entries.
321 12:54:28.619876 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
322 12:54:28.626413 FMAP: area RW_VPD found @ f35000 (8192 bytes)
323 12:54:28.629575 External stage cache:
324 12:54:28.632920 IMD: root @ 0x7b3ff000 254 entries.
325 12:54:28.636423 IMD: root @ 0x7b3fec00 62 entries.
326 12:54:28.651162 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 12:54:28.658077 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 12:54:28.664249 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
329 12:54:28.677968 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 12:54:28.684946 cse_lite: Skip switching to RW in the recovery path
331 12:54:28.685075 8 DIMMs found
332 12:54:28.685183 SMM Memory Map
333 12:54:28.691248 SMRAM : 0x7b000000 0x800000
334 12:54:28.694496 Subregion 0: 0x7b000000 0x200000
335 12:54:28.698001 Subregion 1: 0x7b200000 0x200000
336 12:54:28.701257 Subregion 2: 0x7b400000 0x400000
337 12:54:28.701343 top_of_ram = 0x77000000
338 12:54:28.708075 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 12:54:28.714767 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 12:54:28.717667 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
341 12:54:28.724252 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 12:54:28.731026 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
343 12:54:28.737877 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
344 12:54:28.747639 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
345 12:54:28.754471 Processing 211 relocs. Offset value of 0x74c0b000
346 12:54:28.761406 BS: romstage times (exec / console): total (unknown) / 276 ms
347 12:54:28.767052
348 12:54:28.767150
349 12:54:28.776713 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
350 12:54:28.780148 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:54:28.789874 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:54:28.796602 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:54:28.802709 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
354 12:54:28.809400 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
355 12:54:28.853791 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
356 12:54:28.860009 Processing 5008 relocs. Offset value of 0x75d98000
357 12:54:28.863567 BS: postcar times (exec / console): total (unknown) / 59 ms
358 12:54:28.866426
359 12:54:28.866510
360 12:54:28.876774 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
361 12:54:28.876874 Normal boot
362 12:54:28.880338 FW_CONFIG value is 0x804c02
363 12:54:28.883084 PCI: 00:07.0 disabled by fw_config
364 12:54:28.886461 PCI: 00:07.1 disabled by fw_config
365 12:54:28.889982 PCI: 00:0d.2 disabled by fw_config
366 12:54:28.896240 PCI: 00:1c.7 disabled by fw_config
367 12:54:28.899833 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 12:54:28.906052 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 12:54:28.909469 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 12:54:28.916327 GENERIC: 0.0 disabled by fw_config
371 12:54:28.919819 GENERIC: 1.0 disabled by fw_config
372 12:54:28.923219 fw_config match found: DB_USB=USB3_ACTIVE
373 12:54:28.926069 fw_config match found: DB_USB=USB3_ACTIVE
374 12:54:28.929502 fw_config match found: DB_USB=USB3_ACTIVE
375 12:54:28.936354 fw_config match found: DB_USB=USB3_ACTIVE
376 12:54:28.939593 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 12:54:28.949351 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
378 12:54:28.955990 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
379 12:54:28.962476 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
380 12:54:28.968830 microcode: sig=0x806c1 pf=0x80 revision=0x86
381 12:54:28.972318 microcode: Update skipped, already up-to-date
382 12:54:28.979702 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
383 12:54:29.006813 Detected 4 core, 8 thread CPU.
384 12:54:29.010332 Setting up SMI for CPU
385 12:54:29.013812 IED base = 0x7b400000
386 12:54:29.013918 IED size = 0x00400000
387 12:54:29.016627 Will perform SMM setup.
388 12:54:29.023919 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
389 12:54:29.030537 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 12:54:29.036905 Processing 16 relocs. Offset value of 0x00030000
391 12:54:29.040382 Attempting to start 7 APs
392 12:54:29.043109 Waiting for 10ms after sending INIT.
393 12:54:29.058730 Waiting for 1st SIPI to complete...AP: slot 6 apic_id 1.
394 12:54:29.062266 AP: slot 5 apic_id 4.
395 12:54:29.065419 AP: slot 2 apic_id 2.
396 12:54:29.065502 AP: slot 7 apic_id 3.
397 12:54:29.068491 AP: slot 4 apic_id 7.
398 12:54:29.072058 AP: slot 3 apic_id 6.
399 12:54:29.072144 AP: slot 1 apic_id 5.
400 12:54:29.072211 done.
401 12:54:29.078582 Waiting for 2nd SIPI to complete...done.
402 12:54:29.085656 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 12:54:29.091908 Processing 13 relocs. Offset value of 0x00038000
404 12:54:29.095305 Unable to locate Global NVS
405 12:54:29.102334 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
406 12:54:29.105154 Installing permanent SMM handler to 0x7b000000
407 12:54:29.115119 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
408 12:54:29.118578 Processing 794 relocs. Offset value of 0x7b010000
409 12:54:29.128343 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
410 12:54:29.131673 Processing 13 relocs. Offset value of 0x7b008000
411 12:54:29.138470 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 12:54:29.144742 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
413 12:54:29.148207 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
414 12:54:29.155097 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
415 12:54:29.161869 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
416 12:54:29.168222 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
417 12:54:29.175209 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
418 12:54:29.175326 Unable to locate Global NVS
419 12:54:29.185131 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
420 12:54:29.188033 Clearing SMI status registers
421 12:54:29.188150 SMI_STS: PM1
422 12:54:29.191431 PM1_STS: PWRBTN
423 12:54:29.197752 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 12:54:29.201204 In relocation handler: CPU 0
425 12:54:29.204642 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 12:54:29.211651 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 12:54:29.211733 Relocation complete.
428 12:54:29.220861 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
429 12:54:29.224453 In relocation handler: CPU 6
430 12:54:29.228087 New SMBASE=0x7affe800 IEDBASE=0x7b400000
431 12:54:29.228189 Relocation complete.
432 12:54:29.237951 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
433 12:54:29.238035 In relocation handler: CPU 7
434 12:54:29.244044 New SMBASE=0x7affe400 IEDBASE=0x7b400000
435 12:54:29.244149 Relocation complete.
436 12:54:29.254400 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
437 12:54:29.254483 In relocation handler: CPU 5
438 12:54:29.261272 New SMBASE=0x7affec00 IEDBASE=0x7b400000
439 12:54:29.263972 Writing SMRR. base = 0x7b000006, mask=0xff800c00
440 12:54:29.267404 Relocation complete.
441 12:54:29.274641 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
442 12:54:29.277358 In relocation handler: CPU 1
443 12:54:29.280677 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
444 12:54:29.284348 Relocation complete.
445 12:54:29.291006 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
446 12:54:29.294308 In relocation handler: CPU 2
447 12:54:29.297656 New SMBASE=0x7afff800 IEDBASE=0x7b400000
448 12:54:29.303929 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 12:54:29.304012 Relocation complete.
450 12:54:29.310918 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
451 12:54:29.314381 In relocation handler: CPU 3
452 12:54:29.320972 New SMBASE=0x7afff400 IEDBASE=0x7b400000
453 12:54:29.324046 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 12:54:29.326977 Relocation complete.
455 12:54:29.334038 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
456 12:54:29.336892 In relocation handler: CPU 4
457 12:54:29.340303 New SMBASE=0x7afff000 IEDBASE=0x7b400000
458 12:54:29.343888 Relocation complete.
459 12:54:29.344019 Initializing CPU #0
460 12:54:29.347206 CPU: vendor Intel device 806c1
461 12:54:29.350559 CPU: family 06, model 8c, stepping 01
462 12:54:29.353916 Clearing out pending MCEs
463 12:54:29.357422 Setting up local APIC...
464 12:54:29.360137 apic_id: 0x00 done.
465 12:54:29.363533 Turbo is available but hidden
466 12:54:29.366936 Turbo is available and visible
467 12:54:29.370157 microcode: Update skipped, already up-to-date
468 12:54:29.373484 CPU #0 initialized
469 12:54:29.373772 Initializing CPU #4
470 12:54:29.376923 Initializing CPU #2
471 12:54:29.380019 Initializing CPU #7
472 12:54:29.380121 CPU: vendor Intel device 806c1
473 12:54:29.386950 CPU: family 06, model 8c, stepping 01
474 12:54:29.389813 CPU: vendor Intel device 806c1
475 12:54:29.393280 CPU: family 06, model 8c, stepping 01
476 12:54:29.393431 Clearing out pending MCEs
477 12:54:29.396715 Clearing out pending MCEs
478 12:54:29.400226 Setting up local APIC...
479 12:54:29.402994 Initializing CPU #5
480 12:54:29.403188 Initializing CPU #3
481 12:54:29.406470 CPU: vendor Intel device 806c1
482 12:54:29.409765 CPU: family 06, model 8c, stepping 01
483 12:54:29.413338 apic_id: 0x02 done.
484 12:54:29.416856 Setting up local APIC...
485 12:54:29.420284 CPU: vendor Intel device 806c1
486 12:54:29.424216 CPU: family 06, model 8c, stepping 01
487 12:54:29.424304 Initializing CPU #1
488 12:54:29.427795 Initializing CPU #6
489 12:54:29.430762 Clearing out pending MCEs
490 12:54:29.434149 CPU: vendor Intel device 806c1
491 12:54:29.437830 CPU: family 06, model 8c, stepping 01
492 12:54:29.437938 Setting up local APIC...
493 12:54:29.440570 apic_id: 0x03 done.
494 12:54:29.443991 microcode: Update skipped, already up-to-date
495 12:54:29.451092 microcode: Update skipped, already up-to-date
496 12:54:29.451177 CPU #2 initialized
497 12:54:29.454453 CPU #7 initialized
498 12:54:29.457244 Clearing out pending MCEs
499 12:54:29.460721 CPU: vendor Intel device 806c1
500 12:54:29.464217 CPU: family 06, model 8c, stepping 01
501 12:54:29.467589 Setting up local APIC...
502 12:54:29.467686 apic_id: 0x07 done.
503 12:54:29.470445 Clearing out pending MCEs
504 12:54:29.473931 microcode: Update skipped, already up-to-date
505 12:54:29.477115 Setting up local APIC...
506 12:54:29.481037 apic_id: 0x04 done.
507 12:54:29.483753 Clearing out pending MCEs
508 12:54:29.487379 microcode: Update skipped, already up-to-date
509 12:54:29.490938 Setting up local APIC...
510 12:54:29.491022 apic_id: 0x06 done.
511 12:54:29.493794 CPU #4 initialized
512 12:54:29.497400 apic_id: 0x05 done.
513 12:54:29.497484 CPU #5 initialized
514 12:54:29.504221 microcode: Update skipped, already up-to-date
515 12:54:29.506888 CPU: vendor Intel device 806c1
516 12:54:29.510334 CPU: family 06, model 8c, stepping 01
517 12:54:29.513778 microcode: Update skipped, already up-to-date
518 12:54:29.517382 CPU #1 initialized
519 12:54:29.517467 CPU #3 initialized
520 12:54:29.520343 Clearing out pending MCEs
521 12:54:29.523708 Setting up local APIC...
522 12:54:29.527238 apic_id: 0x01 done.
523 12:54:29.530029 microcode: Update skipped, already up-to-date
524 12:54:29.533459 CPU #6 initialized
525 12:54:29.536879 bsp_do_flight_plan done after 454 msecs.
526 12:54:29.540241 CPU: frequency set to 4400 MHz
527 12:54:29.540326 Enabling SMIs.
528 12:54:29.546593 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
529 12:54:29.563965 SATAXPCIE1 indicates PCIe NVMe is present
530 12:54:29.567316 Probing TPM: done!
531 12:54:29.570685 Connected to device vid:did:rid of 1ae0:0028:00
532 12:54:29.581297 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
533 12:54:29.584498 Initialized TPM device CR50 revision 0
534 12:54:29.587990 Enabling S0i3.4
535 12:54:29.594515 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 12:54:29.597337 Found a VBT of 8704 bytes after decompression
537 12:54:29.604341 cse_lite: CSE RO boot. HybridStorageMode disabled
538 12:54:29.610477 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 12:54:29.685182 FSPS returned 0
540 12:54:29.688599 Executing Phase 1 of FspMultiPhaseSiInit
541 12:54:29.698315 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 12:54:29.701908 port C0 DISC req: usage 1 usb3 1 usb2 5
543 12:54:29.704848 Raw Buffer output 0 00000511
544 12:54:29.708372 Raw Buffer output 1 00000000
545 12:54:29.712419 pmc_send_ipc_cmd succeeded
546 12:54:29.718788 port C1 DISC req: usage 1 usb3 2 usb2 3
547 12:54:29.718904 Raw Buffer output 0 00000321
548 12:54:29.722265 Raw Buffer output 1 00000000
549 12:54:29.726323 pmc_send_ipc_cmd succeeded
550 12:54:29.731224 Detected 4 core, 8 thread CPU.
551 12:54:29.734660 Detected 4 core, 8 thread CPU.
552 12:54:29.935154 Display FSP Version Info HOB
553 12:54:29.938578 Reference Code - CPU = a.0.4c.31
554 12:54:29.942042 uCode Version = 0.0.0.86
555 12:54:29.944742 TXT ACM version = ff.ff.ff.ffff
556 12:54:29.948411 Reference Code - ME = a.0.4c.31
557 12:54:29.951919 MEBx version = 0.0.0.0
558 12:54:29.954817 ME Firmware Version = Consumer SKU
559 12:54:29.958590 Reference Code - PCH = a.0.4c.31
560 12:54:29.961403 PCH-CRID Status = Disabled
561 12:54:29.964962 PCH-CRID Original Value = ff.ff.ff.ffff
562 12:54:29.968454 PCH-CRID New Value = ff.ff.ff.ffff
563 12:54:29.971412 OPROM - RST - RAID = ff.ff.ff.ffff
564 12:54:29.974835 PCH Hsio Version = 4.0.0.0
565 12:54:29.978525 Reference Code - SA - System Agent = a.0.4c.31
566 12:54:29.981237 Reference Code - MRC = 2.0.0.1
567 12:54:29.984868 SA - PCIe Version = a.0.4c.31
568 12:54:29.988228 SA-CRID Status = Disabled
569 12:54:29.991678 SA-CRID Original Value = 0.0.0.1
570 12:54:29.995124 SA-CRID New Value = 0.0.0.1
571 12:54:29.997983 OPROM - VBIOS = ff.ff.ff.ffff
572 12:54:30.001271 IO Manageability Engine FW Version = 11.1.4.0
573 12:54:30.005296 PHY Build Version = 0.0.0.e0
574 12:54:30.008856 Thunderbolt(TM) FW Version = 0.0.0.0
575 12:54:30.015825 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 12:54:30.019020 ITSS IRQ Polarities Before:
577 12:54:30.019111 IPC0: 0xffffffff
578 12:54:30.022272 IPC1: 0xffffffff
579 12:54:30.022358 IPC2: 0xffffffff
580 12:54:30.025045 IPC3: 0xffffffff
581 12:54:30.025167 ITSS IRQ Polarities After:
582 12:54:30.028528 IPC0: 0xffffffff
583 12:54:30.032124 IPC1: 0xffffffff
584 12:54:30.032208 IPC2: 0xffffffff
585 12:54:30.035555 IPC3: 0xffffffff
586 12:54:30.038964 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 12:54:30.048611 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 12:54:30.062003 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
589 12:54:30.075273 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
590 12:54:30.082039 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
591 12:54:30.082140 Enumerating buses...
592 12:54:30.088127 Show all devs... Before device enumeration.
593 12:54:30.088230 Root Device: enabled 1
594 12:54:30.091652 DOMAIN: 0000: enabled 1
595 12:54:30.095149 CPU_CLUSTER: 0: enabled 1
596 12:54:30.097928 PCI: 00:00.0: enabled 1
597 12:54:30.098024 PCI: 00:02.0: enabled 1
598 12:54:30.101276 PCI: 00:04.0: enabled 1
599 12:54:30.104891 PCI: 00:05.0: enabled 1
600 12:54:30.108331 PCI: 00:06.0: enabled 0
601 12:54:30.108422 PCI: 00:07.0: enabled 0
602 12:54:30.111716 PCI: 00:07.1: enabled 0
603 12:54:30.115010 PCI: 00:07.2: enabled 0
604 12:54:30.118500 PCI: 00:07.3: enabled 0
605 12:54:30.118592 PCI: 00:08.0: enabled 1
606 12:54:30.121768 PCI: 00:09.0: enabled 0
607 12:54:30.125124 PCI: 00:0a.0: enabled 0
608 12:54:30.125207 PCI: 00:0d.0: enabled 1
609 12:54:30.128307 PCI: 00:0d.1: enabled 0
610 12:54:30.131576 PCI: 00:0d.2: enabled 0
611 12:54:30.134953 PCI: 00:0d.3: enabled 0
612 12:54:30.135046 PCI: 00:0e.0: enabled 0
613 12:54:30.138427 PCI: 00:10.2: enabled 1
614 12:54:30.141303 PCI: 00:10.6: enabled 0
615 12:54:30.144606 PCI: 00:10.7: enabled 0
616 12:54:30.144714 PCI: 00:12.0: enabled 0
617 12:54:30.148028 PCI: 00:12.6: enabled 0
618 12:54:30.151251 PCI: 00:13.0: enabled 0
619 12:54:30.154909 PCI: 00:14.0: enabled 1
620 12:54:30.154989 PCI: 00:14.1: enabled 0
621 12:54:30.158325 PCI: 00:14.2: enabled 1
622 12:54:30.161130 PCI: 00:14.3: enabled 1
623 12:54:30.161239 PCI: 00:15.0: enabled 1
624 12:54:30.164809 PCI: 00:15.1: enabled 1
625 12:54:30.168287 PCI: 00:15.2: enabled 1
626 12:54:30.171047 PCI: 00:15.3: enabled 1
627 12:54:30.171207 PCI: 00:16.0: enabled 1
628 12:54:30.174571 PCI: 00:16.1: enabled 0
629 12:54:30.178185 PCI: 00:16.2: enabled 0
630 12:54:30.180870 PCI: 00:16.3: enabled 0
631 12:54:30.180947 PCI: 00:16.4: enabled 0
632 12:54:30.184356 PCI: 00:16.5: enabled 0
633 12:54:30.187718 PCI: 00:17.0: enabled 1
634 12:54:30.191238 PCI: 00:19.0: enabled 0
635 12:54:30.191316 PCI: 00:19.1: enabled 1
636 12:54:30.194729 PCI: 00:19.2: enabled 0
637 12:54:30.197581 PCI: 00:1c.0: enabled 1
638 12:54:30.201277 PCI: 00:1c.1: enabled 0
639 12:54:30.201357 PCI: 00:1c.2: enabled 0
640 12:54:30.204037 PCI: 00:1c.3: enabled 0
641 12:54:30.207435 PCI: 00:1c.4: enabled 0
642 12:54:30.207514 PCI: 00:1c.5: enabled 0
643 12:54:30.211035 PCI: 00:1c.6: enabled 1
644 12:54:30.214454 PCI: 00:1c.7: enabled 0
645 12:54:30.217919 PCI: 00:1d.0: enabled 1
646 12:54:30.218009 PCI: 00:1d.1: enabled 0
647 12:54:30.221260 PCI: 00:1d.2: enabled 1
648 12:54:30.224077 PCI: 00:1d.3: enabled 0
649 12:54:30.227395 PCI: 00:1e.0: enabled 1
650 12:54:30.227479 PCI: 00:1e.1: enabled 0
651 12:54:30.231236 PCI: 00:1e.2: enabled 1
652 12:54:30.234063 PCI: 00:1e.3: enabled 1
653 12:54:30.237471 PCI: 00:1f.0: enabled 1
654 12:54:30.237596 PCI: 00:1f.1: enabled 0
655 12:54:30.240864 PCI: 00:1f.2: enabled 1
656 12:54:30.244474 PCI: 00:1f.3: enabled 1
657 12:54:30.247363 PCI: 00:1f.4: enabled 0
658 12:54:30.247448 PCI: 00:1f.5: enabled 1
659 12:54:30.250925 PCI: 00:1f.6: enabled 0
660 12:54:30.254314 PCI: 00:1f.7: enabled 0
661 12:54:30.254390 APIC: 00: enabled 1
662 12:54:30.257819 GENERIC: 0.0: enabled 1
663 12:54:30.260631 GENERIC: 0.0: enabled 1
664 12:54:30.264111 GENERIC: 1.0: enabled 1
665 12:54:30.264194 GENERIC: 0.0: enabled 1
666 12:54:30.267562 GENERIC: 1.0: enabled 1
667 12:54:30.271026 USB0 port 0: enabled 1
668 12:54:30.271108 GENERIC: 0.0: enabled 1
669 12:54:30.273793 USB0 port 0: enabled 1
670 12:54:30.277359 GENERIC: 0.0: enabled 1
671 12:54:30.281040 I2C: 00:1a: enabled 1
672 12:54:30.281122 I2C: 00:31: enabled 1
673 12:54:30.283996 I2C: 00:32: enabled 1
674 12:54:30.287371 I2C: 00:10: enabled 1
675 12:54:30.287455 I2C: 00:15: enabled 1
676 12:54:30.290960 GENERIC: 0.0: enabled 0
677 12:54:30.293665 GENERIC: 1.0: enabled 0
678 12:54:30.297340 GENERIC: 0.0: enabled 1
679 12:54:30.297422 SPI: 00: enabled 1
680 12:54:30.300990 SPI: 00: enabled 1
681 12:54:30.301072 PNP: 0c09.0: enabled 1
682 12:54:30.303617 GENERIC: 0.0: enabled 1
683 12:54:30.307228 USB3 port 0: enabled 1
684 12:54:30.310663 USB3 port 1: enabled 1
685 12:54:30.310772 USB3 port 2: enabled 0
686 12:54:30.313992 USB3 port 3: enabled 0
687 12:54:30.317334 USB2 port 0: enabled 0
688 12:54:30.317443 USB2 port 1: enabled 1
689 12:54:30.320247 USB2 port 2: enabled 1
690 12:54:30.323774 USB2 port 3: enabled 0
691 12:54:30.327025 USB2 port 4: enabled 1
692 12:54:30.327137 USB2 port 5: enabled 0
693 12:54:30.330333 USB2 port 6: enabled 0
694 12:54:30.333693 USB2 port 7: enabled 0
695 12:54:30.333778 USB2 port 8: enabled 0
696 12:54:30.336881 USB2 port 9: enabled 0
697 12:54:30.340269 USB3 port 0: enabled 0
698 12:54:30.340352 USB3 port 1: enabled 1
699 12:54:30.343636 USB3 port 2: enabled 0
700 12:54:30.347131 USB3 port 3: enabled 0
701 12:54:30.350077 GENERIC: 0.0: enabled 1
702 12:54:30.350190 GENERIC: 1.0: enabled 1
703 12:54:30.353547 APIC: 05: enabled 1
704 12:54:30.357004 APIC: 02: enabled 1
705 12:54:30.357111 APIC: 06: enabled 1
706 12:54:30.360253 APIC: 07: enabled 1
707 12:54:30.360359 APIC: 04: enabled 1
708 12:54:30.363169 APIC: 01: enabled 1
709 12:54:30.366611 APIC: 03: enabled 1
710 12:54:30.366722 Compare with tree...
711 12:54:30.370223 Root Device: enabled 1
712 12:54:30.373107 DOMAIN: 0000: enabled 1
713 12:54:30.376736 PCI: 00:00.0: enabled 1
714 12:54:30.376850 PCI: 00:02.0: enabled 1
715 12:54:30.380105 PCI: 00:04.0: enabled 1
716 12:54:30.383531 GENERIC: 0.0: enabled 1
717 12:54:30.386495 PCI: 00:05.0: enabled 1
718 12:54:30.389998 PCI: 00:06.0: enabled 0
719 12:54:30.390113 PCI: 00:07.0: enabled 0
720 12:54:30.393281 GENERIC: 0.0: enabled 1
721 12:54:30.396695 PCI: 00:07.1: enabled 0
722 12:54:30.400160 GENERIC: 1.0: enabled 1
723 12:54:30.403587 PCI: 00:07.2: enabled 0
724 12:54:30.403671 GENERIC: 0.0: enabled 1
725 12:54:30.406502 PCI: 00:07.3: enabled 0
726 12:54:30.410033 GENERIC: 1.0: enabled 1
727 12:54:30.413563 PCI: 00:08.0: enabled 1
728 12:54:30.416310 PCI: 00:09.0: enabled 0
729 12:54:30.416393 PCI: 00:0a.0: enabled 0
730 12:54:30.419802 PCI: 00:0d.0: enabled 1
731 12:54:30.423165 USB0 port 0: enabled 1
732 12:54:30.426690 USB3 port 0: enabled 1
733 12:54:30.430206 USB3 port 1: enabled 1
734 12:54:30.432984 USB3 port 2: enabled 0
735 12:54:30.433068 USB3 port 3: enabled 0
736 12:54:30.436422 PCI: 00:0d.1: enabled 0
737 12:54:30.439707 PCI: 00:0d.2: enabled 0
738 12:54:30.443040 GENERIC: 0.0: enabled 1
739 12:54:30.446255 PCI: 00:0d.3: enabled 0
740 12:54:30.446339 PCI: 00:0e.0: enabled 0
741 12:54:30.449664 PCI: 00:10.2: enabled 1
742 12:54:30.452751 PCI: 00:10.6: enabled 0
743 12:54:30.456099 PCI: 00:10.7: enabled 0
744 12:54:30.459429 PCI: 00:12.0: enabled 0
745 12:54:30.459512 PCI: 00:12.6: enabled 0
746 12:54:30.462752 PCI: 00:13.0: enabled 0
747 12:54:30.466113 PCI: 00:14.0: enabled 1
748 12:54:30.469359 USB0 port 0: enabled 1
749 12:54:30.472650 USB2 port 0: enabled 0
750 12:54:30.472735 USB2 port 1: enabled 1
751 12:54:30.476163 USB2 port 2: enabled 1
752 12:54:30.479624 USB2 port 3: enabled 0
753 12:54:30.482426 USB2 port 4: enabled 1
754 12:54:30.485988 USB2 port 5: enabled 0
755 12:54:30.488809 USB2 port 6: enabled 0
756 12:54:30.488909 USB2 port 7: enabled 0
757 12:54:30.492271 USB2 port 8: enabled 0
758 12:54:30.495655 USB2 port 9: enabled 0
759 12:54:30.499266 USB3 port 0: enabled 0
760 12:54:30.502913 USB3 port 1: enabled 1
761 12:54:30.505599 USB3 port 2: enabled 0
762 12:54:30.505705 USB3 port 3: enabled 0
763 12:54:30.509295 PCI: 00:14.1: enabled 0
764 12:54:30.512063 PCI: 00:14.2: enabled 1
765 12:54:30.515419 PCI: 00:14.3: enabled 1
766 12:54:30.519150 GENERIC: 0.0: enabled 1
767 12:54:30.519255 PCI: 00:15.0: enabled 1
768 12:54:30.522625 I2C: 00:1a: enabled 1
769 12:54:30.525437 I2C: 00:31: enabled 1
770 12:54:30.528929 I2C: 00:32: enabled 1
771 12:54:30.529040 PCI: 00:15.1: enabled 1
772 12:54:30.532487 I2C: 00:10: enabled 1
773 12:54:30.535306 PCI: 00:15.2: enabled 1
774 12:54:30.538806 PCI: 00:15.3: enabled 1
775 12:54:30.542247 PCI: 00:16.0: enabled 1
776 12:54:30.542351 PCI: 00:16.1: enabled 0
777 12:54:30.545558 PCI: 00:16.2: enabled 0
778 12:54:30.549006 PCI: 00:16.3: enabled 0
779 12:54:30.552325 PCI: 00:16.4: enabled 0
780 12:54:30.555159 PCI: 00:16.5: enabled 0
781 12:54:30.555280 PCI: 00:17.0: enabled 1
782 12:54:30.558325 PCI: 00:19.0: enabled 0
783 12:54:30.562259 PCI: 00:19.1: enabled 1
784 12:54:30.565488 I2C: 00:15: enabled 1
785 12:54:30.568897 PCI: 00:19.2: enabled 0
786 12:54:30.569015 PCI: 00:1d.0: enabled 1
787 12:54:30.572085 GENERIC: 0.0: enabled 1
788 12:54:30.575433 PCI: 00:1e.0: enabled 1
789 12:54:30.578177 PCI: 00:1e.1: enabled 0
790 12:54:30.581671 PCI: 00:1e.2: enabled 1
791 12:54:30.581755 SPI: 00: enabled 1
792 12:54:30.584897 PCI: 00:1e.3: enabled 1
793 12:54:30.588184 SPI: 00: enabled 1
794 12:54:30.591722 PCI: 00:1f.0: enabled 1
795 12:54:30.591806 PNP: 0c09.0: enabled 1
796 12:54:30.594809 PCI: 00:1f.1: enabled 0
797 12:54:30.598310 PCI: 00:1f.2: enabled 1
798 12:54:30.601719 GENERIC: 0.0: enabled 1
799 12:54:30.642125 GENERIC: 0.0: enabled 1
800 12:54:30.642295 GENERIC: 1.0: enabled 1
801 12:54:30.642409 PCI: 00:1f.3: enabled 1
802 12:54:30.642678 PCI: 00:1f.4: enabled 0
803 12:54:30.642748 PCI: 00:1f.5: enabled 1
804 12:54:30.643037 PCI: 00:1f.6: enabled 0
805 12:54:30.643119 PCI: 00:1f.7: enabled 0
806 12:54:30.643194 CPU_CLUSTER: 0: enabled 1
807 12:54:30.643251 APIC: 00: enabled 1
808 12:54:30.643307 APIC: 05: enabled 1
809 12:54:30.643375 APIC: 02: enabled 1
810 12:54:30.643433 APIC: 06: enabled 1
811 12:54:30.643489 APIC: 07: enabled 1
812 12:54:30.643544 APIC: 04: enabled 1
813 12:54:30.643599 APIC: 01: enabled 1
814 12:54:30.643654 APIC: 03: enabled 1
815 12:54:30.646431 Root Device scanning...
816 12:54:30.646514 scan_static_bus for Root Device
817 12:54:30.649726 DOMAIN: 0000 enabled
818 12:54:30.653208 CPU_CLUSTER: 0 enabled
819 12:54:30.653329 DOMAIN: 0000 scanning...
820 12:54:30.656637 PCI: pci_scan_bus for bus 00
821 12:54:30.660202 PCI: 00:00.0 [8086/0000] ops
822 12:54:30.663075 PCI: 00:00.0 [8086/9a12] enabled
823 12:54:30.666936 PCI: 00:02.0 [8086/0000] bus ops
824 12:54:30.671048 PCI: 00:02.0 [8086/9a40] enabled
825 12:54:30.674331 PCI: 00:04.0 [8086/0000] bus ops
826 12:54:30.677498 PCI: 00:04.0 [8086/9a03] enabled
827 12:54:30.680875 PCI: 00:05.0 [8086/9a19] enabled
828 12:54:30.684240 PCI: 00:07.0 [0000/0000] hidden
829 12:54:30.687138 PCI: 00:08.0 [8086/9a11] enabled
830 12:54:30.690663 PCI: 00:0a.0 [8086/9a0d] disabled
831 12:54:30.693965 PCI: 00:0d.0 [8086/0000] bus ops
832 12:54:30.697445 PCI: 00:0d.0 [8086/9a13] enabled
833 12:54:30.700436 PCI: 00:14.0 [8086/0000] bus ops
834 12:54:30.703908 PCI: 00:14.0 [8086/a0ed] enabled
835 12:54:30.707375 PCI: 00:14.2 [8086/a0ef] enabled
836 12:54:30.710181 PCI: 00:14.3 [8086/0000] bus ops
837 12:54:30.713713 PCI: 00:14.3 [8086/a0f0] enabled
838 12:54:30.717327 PCI: 00:15.0 [8086/0000] bus ops
839 12:54:30.720160 PCI: 00:15.0 [8086/a0e8] enabled
840 12:54:30.723625 PCI: 00:15.1 [8086/0000] bus ops
841 12:54:30.727132 PCI: 00:15.1 [8086/a0e9] enabled
842 12:54:30.730053 PCI: 00:15.2 [8086/0000] bus ops
843 12:54:30.733469 PCI: 00:15.2 [8086/a0ea] enabled
844 12:54:30.736975 PCI: 00:15.3 [8086/0000] bus ops
845 12:54:30.740383 PCI: 00:15.3 [8086/a0eb] enabled
846 12:54:30.743285 PCI: 00:16.0 [8086/0000] ops
847 12:54:30.746638 PCI: 00:16.0 [8086/a0e0] enabled
848 12:54:30.753178 PCI: Static device PCI: 00:17.0 not found, disabling it.
849 12:54:30.756528 PCI: 00:19.0 [8086/0000] bus ops
850 12:54:30.760077 PCI: 00:19.0 [8086/a0c5] disabled
851 12:54:30.762940 PCI: 00:19.1 [8086/0000] bus ops
852 12:54:30.766463 PCI: 00:19.1 [8086/a0c6] enabled
853 12:54:30.769975 PCI: 00:1d.0 [8086/0000] bus ops
854 12:54:30.773292 PCI: 00:1d.0 [8086/a0b0] enabled
855 12:54:30.776633 PCI: 00:1e.0 [8086/0000] ops
856 12:54:30.780017 PCI: 00:1e.0 [8086/a0a8] enabled
857 12:54:30.783346 PCI: 00:1e.2 [8086/0000] bus ops
858 12:54:30.786768 PCI: 00:1e.2 [8086/a0aa] enabled
859 12:54:30.790024 PCI: 00:1e.3 [8086/0000] bus ops
860 12:54:30.793296 PCI: 00:1e.3 [8086/a0ab] enabled
861 12:54:30.796661 PCI: 00:1f.0 [8086/0000] bus ops
862 12:54:30.800016 PCI: 00:1f.0 [8086/a087] enabled
863 12:54:30.800099 RTC Init
864 12:54:30.802812 Set power on after power failure.
865 12:54:30.806269 Disabling Deep S3
866 12:54:30.806353 Disabling Deep S3
867 12:54:30.809673 Disabling Deep S4
868 12:54:30.813074 Disabling Deep S4
869 12:54:30.813157 Disabling Deep S5
870 12:54:30.816621 Disabling Deep S5
871 12:54:30.819335 PCI: 00:1f.2 [0000/0000] hidden
872 12:54:30.822780 PCI: 00:1f.3 [8086/0000] bus ops
873 12:54:30.826383 PCI: 00:1f.3 [8086/a0c8] enabled
874 12:54:30.829235 PCI: 00:1f.5 [8086/0000] bus ops
875 12:54:30.832928 PCI: 00:1f.5 [8086/a0a4] enabled
876 12:54:30.835706 PCI: Leftover static devices:
877 12:54:30.835783 PCI: 00:10.2
878 12:54:30.835864 PCI: 00:10.6
879 12:54:30.839216 PCI: 00:10.7
880 12:54:30.839299 PCI: 00:06.0
881 12:54:30.842708 PCI: 00:07.1
882 12:54:30.842792 PCI: 00:07.2
883 12:54:30.842858 PCI: 00:07.3
884 12:54:30.846311 PCI: 00:09.0
885 12:54:30.846394 PCI: 00:0d.1
886 12:54:30.849670 PCI: 00:0d.2
887 12:54:30.849754 PCI: 00:0d.3
888 12:54:30.852262 PCI: 00:0e.0
889 12:54:30.852379 PCI: 00:12.0
890 12:54:30.852488 PCI: 00:12.6
891 12:54:30.855733 PCI: 00:13.0
892 12:54:30.855845 PCI: 00:14.1
893 12:54:30.859321 PCI: 00:16.1
894 12:54:30.859423 PCI: 00:16.2
895 12:54:30.859532 PCI: 00:16.3
896 12:54:30.862237 PCI: 00:16.4
897 12:54:30.862336 PCI: 00:16.5
898 12:54:30.865781 PCI: 00:17.0
899 12:54:30.865889 PCI: 00:19.2
900 12:54:30.869395 PCI: 00:1e.1
901 12:54:30.869517 PCI: 00:1f.1
902 12:54:30.869616 PCI: 00:1f.4
903 12:54:30.872266 PCI: 00:1f.6
904 12:54:30.872348 PCI: 00:1f.7
905 12:54:30.875657 PCI: Check your devicetree.cb.
906 12:54:30.879135 PCI: 00:02.0 scanning...
907 12:54:30.882587 scan_generic_bus for PCI: 00:02.0
908 12:54:30.885282 scan_generic_bus for PCI: 00:02.0 done
909 12:54:30.891901 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
910 12:54:30.892023 PCI: 00:04.0 scanning...
911 12:54:30.895351 scan_generic_bus for PCI: 00:04.0
912 12:54:30.899362 GENERIC: 0.0 enabled
913 12:54:30.905177 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
914 12:54:30.908634 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
915 12:54:30.911994 PCI: 00:0d.0 scanning...
916 12:54:30.915381 scan_static_bus for PCI: 00:0d.0
917 12:54:30.918716 USB0 port 0 enabled
918 12:54:30.922093 USB0 port 0 scanning...
919 12:54:30.924964 scan_static_bus for USB0 port 0
920 12:54:30.925071 USB3 port 0 enabled
921 12:54:30.928367 USB3 port 1 enabled
922 12:54:30.931907 USB3 port 2 disabled
923 12:54:30.932009 USB3 port 3 disabled
924 12:54:30.935521 USB3 port 0 scanning...
925 12:54:30.938328 scan_static_bus for USB3 port 0
926 12:54:30.941989 scan_static_bus for USB3 port 0 done
927 12:54:30.944888 scan_bus: bus USB3 port 0 finished in 6 msecs
928 12:54:30.948361 USB3 port 1 scanning...
929 12:54:30.951752 scan_static_bus for USB3 port 1
930 12:54:30.955333 scan_static_bus for USB3 port 1 done
931 12:54:30.961368 scan_bus: bus USB3 port 1 finished in 6 msecs
932 12:54:30.964931 scan_static_bus for USB0 port 0 done
933 12:54:30.968598 scan_bus: bus USB0 port 0 finished in 43 msecs
934 12:54:30.971383 scan_static_bus for PCI: 00:0d.0 done
935 12:54:30.978435 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
936 12:54:30.981379 PCI: 00:14.0 scanning...
937 12:54:30.984843 scan_static_bus for PCI: 00:14.0
938 12:54:30.984959 USB0 port 0 enabled
939 12:54:30.988278 USB0 port 0 scanning...
940 12:54:30.991771 scan_static_bus for USB0 port 0
941 12:54:30.994685 USB2 port 0 disabled
942 12:54:30.994819 USB2 port 1 enabled
943 12:54:30.998147 USB2 port 2 enabled
944 12:54:31.001469 USB2 port 3 disabled
945 12:54:31.001666 USB2 port 4 enabled
946 12:54:31.005073 USB2 port 5 disabled
947 12:54:31.008377 USB2 port 6 disabled
948 12:54:31.008577 USB2 port 7 disabled
949 12:54:31.011148 USB2 port 8 disabled
950 12:54:31.014613 USB2 port 9 disabled
951 12:54:31.014736 USB3 port 0 disabled
952 12:54:31.017955 USB3 port 1 enabled
953 12:54:31.018033 USB3 port 2 disabled
954 12:54:31.021305 USB3 port 3 disabled
955 12:54:31.024506 USB2 port 1 scanning...
956 12:54:31.027911 scan_static_bus for USB2 port 1
957 12:54:31.030887 scan_static_bus for USB2 port 1 done
958 12:54:31.034420 scan_bus: bus USB2 port 1 finished in 6 msecs
959 12:54:31.038056 USB2 port 2 scanning...
960 12:54:31.040965 scan_static_bus for USB2 port 2
961 12:54:31.044348 scan_static_bus for USB2 port 2 done
962 12:54:31.050751 scan_bus: bus USB2 port 2 finished in 6 msecs
963 12:54:31.050835 USB2 port 4 scanning...
964 12:54:31.054145 scan_static_bus for USB2 port 4
965 12:54:31.061192 scan_static_bus for USB2 port 4 done
966 12:54:31.064598 scan_bus: bus USB2 port 4 finished in 6 msecs
967 12:54:31.068056 USB3 port 1 scanning...
968 12:54:31.071387 scan_static_bus for USB3 port 1
969 12:54:31.074205 scan_static_bus for USB3 port 1 done
970 12:54:31.077752 scan_bus: bus USB3 port 1 finished in 6 msecs
971 12:54:31.081180 scan_static_bus for USB0 port 0 done
972 12:54:31.087588 scan_bus: bus USB0 port 0 finished in 93 msecs
973 12:54:31.091116 scan_static_bus for PCI: 00:14.0 done
974 12:54:31.093879 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
975 12:54:31.097384 PCI: 00:14.3 scanning...
976 12:54:31.100978 scan_static_bus for PCI: 00:14.3
977 12:54:31.104268 GENERIC: 0.0 enabled
978 12:54:31.107656 scan_static_bus for PCI: 00:14.3 done
979 12:54:31.110334 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 12:54:31.114228 PCI: 00:15.0 scanning...
981 12:54:31.116964 scan_static_bus for PCI: 00:15.0
982 12:54:31.120426 I2C: 00:1a enabled
983 12:54:31.120513 I2C: 00:31 enabled
984 12:54:31.123867 I2C: 00:32 enabled
985 12:54:31.127418 scan_static_bus for PCI: 00:15.0 done
986 12:54:31.133632 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
987 12:54:31.133721 PCI: 00:15.1 scanning...
988 12:54:31.137108 scan_static_bus for PCI: 00:15.1
989 12:54:31.140706 I2C: 00:10 enabled
990 12:54:31.143562 scan_static_bus for PCI: 00:15.1 done
991 12:54:31.150601 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 12:54:31.150692 PCI: 00:15.2 scanning...
993 12:54:31.154063 scan_static_bus for PCI: 00:15.2
994 12:54:31.160429 scan_static_bus for PCI: 00:15.2 done
995 12:54:31.163876 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 12:54:31.166826 PCI: 00:15.3 scanning...
997 12:54:31.170199 scan_static_bus for PCI: 00:15.3
998 12:54:31.173631 scan_static_bus for PCI: 00:15.3 done
999 12:54:31.177046 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 12:54:31.179949 PCI: 00:19.1 scanning...
1001 12:54:31.183429 scan_static_bus for PCI: 00:19.1
1002 12:54:31.186918 I2C: 00:15 enabled
1003 12:54:31.190447 scan_static_bus for PCI: 00:19.1 done
1004 12:54:31.193265 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 12:54:31.196632 PCI: 00:1d.0 scanning...
1006 12:54:31.200271 do_pci_scan_bridge for PCI: 00:1d.0
1007 12:54:31.203047 PCI: pci_scan_bus for bus 01
1008 12:54:31.206662 PCI: 01:00.0 [15b7/5009] enabled
1009 12:54:31.210155 GENERIC: 0.0 enabled
1010 12:54:31.213347 Enabling Common Clock Configuration
1011 12:54:31.216478 L1 Sub-State supported from root port 29
1012 12:54:31.220097 L1 Sub-State Support = 0x5
1013 12:54:31.223479 CommonModeRestoreTime = 0x28
1014 12:54:31.226333 Power On Value = 0x16, Power On Scale = 0x0
1015 12:54:31.229805 ASPM: Enabled L1
1016 12:54:31.233475 PCIe: Max_Payload_Size adjusted to 128
1017 12:54:31.239627 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 12:54:31.239711 PCI: 00:1e.2 scanning...
1019 12:54:31.243095 scan_generic_bus for PCI: 00:1e.2
1020 12:54:31.247252 SPI: 00 enabled
1021 12:54:31.253462 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 12:54:31.256989 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 12:54:31.260363 PCI: 00:1e.3 scanning...
1024 12:54:31.263180 scan_generic_bus for PCI: 00:1e.3
1025 12:54:31.263273 SPI: 00 enabled
1026 12:54:31.270231 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 12:54:31.276699 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 12:54:31.276814 PCI: 00:1f.0 scanning...
1029 12:54:31.280268 scan_static_bus for PCI: 00:1f.0
1030 12:54:31.283741 PNP: 0c09.0 enabled
1031 12:54:31.287163 PNP: 0c09.0 scanning...
1032 12:54:31.289844 scan_static_bus for PNP: 0c09.0
1033 12:54:31.293275 scan_static_bus for PNP: 0c09.0 done
1034 12:54:31.296708 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1035 12:54:31.303619 scan_static_bus for PCI: 00:1f.0 done
1036 12:54:31.306496 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1037 12:54:31.309986 PCI: 00:1f.2 scanning...
1038 12:54:31.313743 scan_static_bus for PCI: 00:1f.2
1039 12:54:31.313826 GENERIC: 0.0 enabled
1040 12:54:31.316599 GENERIC: 0.0 scanning...
1041 12:54:31.320053 scan_static_bus for GENERIC: 0.0
1042 12:54:31.323397 GENERIC: 0.0 enabled
1043 12:54:31.326777 GENERIC: 1.0 enabled
1044 12:54:31.330301 scan_static_bus for GENERIC: 0.0 done
1045 12:54:31.333033 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1046 12:54:31.336529 scan_static_bus for PCI: 00:1f.2 done
1047 12:54:31.342819 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1048 12:54:31.346273 PCI: 00:1f.3 scanning...
1049 12:54:31.349629 scan_static_bus for PCI: 00:1f.3
1050 12:54:31.353208 scan_static_bus for PCI: 00:1f.3 done
1051 12:54:31.356019 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1052 12:54:31.359501 PCI: 00:1f.5 scanning...
1053 12:54:31.363169 scan_generic_bus for PCI: 00:1f.5
1054 12:54:31.366166 scan_generic_bus for PCI: 00:1f.5 done
1055 12:54:31.372665 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1056 12:54:31.376170 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1057 12:54:31.379712 scan_static_bus for Root Device done
1058 12:54:31.386198 scan_bus: bus Root Device finished in 735 msecs
1059 12:54:31.386281 done
1060 12:54:31.392525 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1061 12:54:31.396339 Chrome EC: UHEPI supported
1062 12:54:31.402556 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1063 12:54:31.409439 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1064 12:54:31.412998 SPI flash protection: WPSW=0 SRP0=1
1065 12:54:31.415751 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 12:54:31.422999 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1067 12:54:31.425778 found VGA at PCI: 00:02.0
1068 12:54:31.429263 Setting up VGA for PCI: 00:02.0
1069 12:54:31.432767 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 12:54:31.439345 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 12:54:31.442609 Allocating resources...
1072 12:54:31.443130 Reading resources...
1073 12:54:31.446017 Root Device read_resources bus 0 link: 0
1074 12:54:31.452140 DOMAIN: 0000 read_resources bus 0 link: 0
1075 12:54:31.455471 PCI: 00:04.0 read_resources bus 1 link: 0
1076 12:54:31.462421 PCI: 00:04.0 read_resources bus 1 link: 0 done
1077 12:54:31.465886 PCI: 00:0d.0 read_resources bus 0 link: 0
1078 12:54:31.472375 USB0 port 0 read_resources bus 0 link: 0
1079 12:54:31.475383 USB0 port 0 read_resources bus 0 link: 0 done
1080 12:54:31.482442 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1081 12:54:31.485202 PCI: 00:14.0 read_resources bus 0 link: 0
1082 12:54:31.488573 USB0 port 0 read_resources bus 0 link: 0
1083 12:54:31.496180 USB0 port 0 read_resources bus 0 link: 0 done
1084 12:54:31.499654 PCI: 00:14.0 read_resources bus 0 link: 0 done
1085 12:54:31.506511 PCI: 00:14.3 read_resources bus 0 link: 0
1086 12:54:31.509224 PCI: 00:14.3 read_resources bus 0 link: 0 done
1087 12:54:31.516405 PCI: 00:15.0 read_resources bus 0 link: 0
1088 12:54:31.519135 PCI: 00:15.0 read_resources bus 0 link: 0 done
1089 12:54:31.526279 PCI: 00:15.1 read_resources bus 0 link: 0
1090 12:54:31.528999 PCI: 00:15.1 read_resources bus 0 link: 0 done
1091 12:54:31.536726 PCI: 00:19.1 read_resources bus 0 link: 0
1092 12:54:31.539945 PCI: 00:19.1 read_resources bus 0 link: 0 done
1093 12:54:31.546554 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 12:54:31.550034 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 12:54:31.556325 PCI: 00:1e.2 read_resources bus 2 link: 0
1096 12:54:31.559713 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1097 12:54:31.565888 PCI: 00:1e.3 read_resources bus 3 link: 0
1098 12:54:31.569213 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1099 12:54:31.576063 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 12:54:31.579579 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 12:54:31.585882 PCI: 00:1f.2 read_resources bus 0 link: 0
1102 12:54:31.589485 GENERIC: 0.0 read_resources bus 0 link: 0
1103 12:54:31.595845 GENERIC: 0.0 read_resources bus 0 link: 0 done
1104 12:54:31.599522 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1105 12:54:31.605653 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 12:54:31.609083 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1107 12:54:31.616077 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1108 12:54:31.618780 Root Device read_resources bus 0 link: 0 done
1109 12:54:31.622187 Done reading resources.
1110 12:54:31.629145 Show resources in subtree (Root Device)...After reading.
1111 12:54:31.631984 Root Device child on link 0 DOMAIN: 0000
1112 12:54:31.635596 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 12:54:31.645015 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 12:54:31.655711 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1115 12:54:31.656140 PCI: 00:00.0
1116 12:54:31.665055 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 12:54:31.675028 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 12:54:31.685309 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 12:54:31.695448 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 12:54:31.705292 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 12:54:31.714974 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 12:54:31.721381 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 12:54:31.731867 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 12:54:31.741882 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 12:54:31.751736 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1126 12:54:31.761623 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1127 12:54:31.771240 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1128 12:54:31.778308 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1129 12:54:31.788024 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1130 12:54:31.797595 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1131 12:54:31.807557 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1132 12:54:31.817961 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1133 12:54:31.827619 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1134 12:54:31.834490 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1135 12:54:31.844351 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1136 12:54:31.847799 PCI: 00:02.0
1137 12:54:31.857700 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 12:54:31.867233 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1139 12:54:31.877190 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1140 12:54:31.880772 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1141 12:54:31.890889 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1142 12:54:31.893409 GENERIC: 0.0
1143 12:54:31.893522 PCI: 00:05.0
1144 12:54:31.903678 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 12:54:31.906514 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1146 12:54:31.909965 GENERIC: 0.0
1147 12:54:31.913338 PCI: 00:08.0
1148 12:54:31.923149 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 12:54:31.923264 PCI: 00:0a.0
1150 12:54:31.926603 PCI: 00:0d.0 child on link 0 USB0 port 0
1151 12:54:31.936237 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 12:54:31.943372 USB0 port 0 child on link 0 USB3 port 0
1153 12:54:31.943455 USB3 port 0
1154 12:54:31.946119 USB3 port 1
1155 12:54:31.946200 USB3 port 2
1156 12:54:31.949684 USB3 port 3
1157 12:54:31.953224 PCI: 00:14.0 child on link 0 USB0 port 0
1158 12:54:31.962789 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 12:54:31.969208 USB0 port 0 child on link 0 USB2 port 0
1160 12:54:31.969317 USB2 port 0
1161 12:54:31.972550 USB2 port 1
1162 12:54:31.972632 USB2 port 2
1163 12:54:31.975920 USB2 port 3
1164 12:54:31.976018 USB2 port 4
1165 12:54:31.979271 USB2 port 5
1166 12:54:31.979357 USB2 port 6
1167 12:54:31.982664 USB2 port 7
1168 12:54:31.982752 USB2 port 8
1169 12:54:31.986281 USB2 port 9
1170 12:54:31.986363 USB3 port 0
1171 12:54:31.989031 USB3 port 1
1172 12:54:31.992450 USB3 port 2
1173 12:54:31.992532 USB3 port 3
1174 12:54:31.995737 PCI: 00:14.2
1175 12:54:32.006004 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 12:54:32.016142 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 12:54:32.018972 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1178 12:54:32.029066 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 12:54:32.029151 GENERIC: 0.0
1180 12:54:32.035938 PCI: 00:15.0 child on link 0 I2C: 00:1a
1181 12:54:32.045384 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 12:54:32.045493 I2C: 00:1a
1183 12:54:32.048960 I2C: 00:31
1184 12:54:32.049066 I2C: 00:32
1185 12:54:32.052569 PCI: 00:15.1 child on link 0 I2C: 00:10
1186 12:54:32.061908 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:54:32.065403 I2C: 00:10
1188 12:54:32.065515 PCI: 00:15.2
1189 12:54:32.075393 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:54:32.079005 PCI: 00:15.3
1191 12:54:32.088595 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:54:32.088681 PCI: 00:16.0
1193 12:54:32.098753 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:54:32.102254 PCI: 00:19.0
1195 12:54:32.105478 PCI: 00:19.1 child on link 0 I2C: 00:15
1196 12:54:32.115300 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:54:32.118530 I2C: 00:15
1198 12:54:32.121686 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1199 12:54:32.132016 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 12:54:32.141455 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 12:54:32.148197 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 12:54:32.151586 GENERIC: 0.0
1203 12:54:32.151664 PCI: 01:00.0
1204 12:54:32.165181 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 12:54:32.171537 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1206 12:54:32.175166 PCI: 00:1e.0
1207 12:54:32.184985 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 12:54:32.191345 PCI: 00:1e.2 child on link 0 SPI: 00
1209 12:54:32.201353 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 12:54:32.201494 SPI: 00
1211 12:54:32.204799 PCI: 00:1e.3 child on link 0 SPI: 00
1212 12:54:32.215082 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 12:54:32.218391 SPI: 00
1214 12:54:32.221086 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1215 12:54:32.227881 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1216 12:54:32.231361 PNP: 0c09.0
1217 12:54:32.241458 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1218 12:54:32.244508 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1219 12:54:32.254856 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1220 12:54:32.264728 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1221 12:54:32.267601 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1222 12:54:32.271228 GENERIC: 0.0
1223 12:54:32.271460 GENERIC: 1.0
1224 12:54:32.274590 PCI: 00:1f.3
1225 12:54:32.284811 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 12:54:32.294752 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 12:54:32.295326 PCI: 00:1f.5
1228 12:54:32.304596 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1229 12:54:32.308002 CPU_CLUSTER: 0 child on link 0 APIC: 00
1230 12:54:32.310681 APIC: 00
1231 12:54:32.311097 APIC: 05
1232 12:54:32.311429 APIC: 02
1233 12:54:32.314301 APIC: 06
1234 12:54:32.314710 APIC: 07
1235 12:54:32.317601 APIC: 04
1236 12:54:32.318014 APIC: 01
1237 12:54:32.318340 APIC: 03
1238 12:54:32.327558 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1239 12:54:32.331100 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1240 12:54:32.337818 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1241 12:54:32.344012 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1242 12:54:32.347704 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1243 12:54:32.354117 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1244 12:54:32.361221 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1245 12:54:32.367369 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1246 12:54:32.373949 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1247 12:54:32.380928 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1248 12:54:32.387315 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1249 12:54:32.397081 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 12:54:32.403915 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1251 12:54:32.411201 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1252 12:54:32.414061 DOMAIN: 0000: Resource ranges:
1253 12:54:32.416650 * Base: 1000, Size: 800, Tag: 100
1254 12:54:32.420241 * Base: 1900, Size: e700, Tag: 100
1255 12:54:32.427400 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1256 12:54:32.433672 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1257 12:54:32.440332 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1258 12:54:32.446543 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1259 12:54:32.456951 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1260 12:54:32.463237 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1261 12:54:32.469911 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1262 12:54:32.480297 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1263 12:54:32.486743 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1264 12:54:32.493581 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1265 12:54:32.503095 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1266 12:54:32.510241 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1267 12:54:32.516432 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1268 12:54:32.526826 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1269 12:54:32.532707 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1270 12:54:32.539473 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1271 12:54:32.546630 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1272 12:54:32.556361 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1273 12:54:32.562664 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1274 12:54:32.572582 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1275 12:54:32.579181 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1276 12:54:32.586213 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1277 12:54:32.592470 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1278 12:54:32.602685 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1279 12:54:32.609048 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1280 12:54:32.612556 DOMAIN: 0000: Resource ranges:
1281 12:54:32.616103 * Base: 7fc00000, Size: 40400000, Tag: 200
1282 12:54:32.622366 * Base: d0000000, Size: 28000000, Tag: 200
1283 12:54:32.625815 * Base: fa000000, Size: 1000000, Tag: 200
1284 12:54:32.629465 * Base: fb001000, Size: 2fff000, Tag: 200
1285 12:54:32.635698 * Base: fe010000, Size: 2e000, Tag: 200
1286 12:54:32.638966 * Base: fe03f000, Size: d41000, Tag: 200
1287 12:54:32.642331 * Base: fed88000, Size: 8000, Tag: 200
1288 12:54:32.645634 * Base: fed93000, Size: d000, Tag: 200
1289 12:54:32.648986 * Base: feda2000, Size: 1e000, Tag: 200
1290 12:54:32.655689 * Base: fede0000, Size: 1220000, Tag: 200
1291 12:54:32.659018 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1292 12:54:32.666021 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1293 12:54:32.672389 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1294 12:54:32.678708 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1295 12:54:32.685411 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1296 12:54:32.691859 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1297 12:54:32.698944 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1298 12:54:32.705304 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1299 12:54:32.711765 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1300 12:54:32.718408 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1301 12:54:32.724687 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1302 12:54:32.732025 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1303 12:54:32.738404 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1304 12:54:32.744626 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1305 12:54:32.751323 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1306 12:54:32.758085 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1307 12:54:32.764847 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1308 12:54:32.771632 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1309 12:54:32.777983 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1310 12:54:32.784861 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1311 12:54:32.791036 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1312 12:54:32.798157 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1313 12:54:32.804110 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1314 12:54:32.814681 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1315 12:54:32.820802 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1316 12:54:32.824354 PCI: 00:1d.0: Resource ranges:
1317 12:54:32.827901 * Base: 7fc00000, Size: 100000, Tag: 200
1318 12:54:32.834246 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1319 12:54:32.841229 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1320 12:54:32.850769 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1321 12:54:32.857764 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1322 12:54:32.861161 Root Device assign_resources, bus 0 link: 0
1323 12:54:32.867188 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 12:54:32.874342 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1325 12:54:32.883701 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1326 12:54:32.890515 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1327 12:54:32.900182 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1328 12:54:32.903490 PCI: 00:04.0 assign_resources, bus 1 link: 0
1329 12:54:32.906934 PCI: 00:04.0 assign_resources, bus 1 link: 0
1330 12:54:32.916698 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1331 12:54:32.923577 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1332 12:54:32.933768 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1333 12:54:32.936622 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1334 12:54:32.943145 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1335 12:54:32.950362 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1336 12:54:32.956910 PCI: 00:14.0 assign_resources, bus 0 link: 0
1337 12:54:32.959804 PCI: 00:14.0 assign_resources, bus 0 link: 0
1338 12:54:32.966711 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1339 12:54:32.976321 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1340 12:54:32.983230 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1341 12:54:32.990098 PCI: 00:14.3 assign_resources, bus 0 link: 0
1342 12:54:32.992940 PCI: 00:14.3 assign_resources, bus 0 link: 0
1343 12:54:33.002734 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1344 12:54:33.006109 PCI: 00:15.0 assign_resources, bus 0 link: 0
1345 12:54:33.009447 PCI: 00:15.0 assign_resources, bus 0 link: 0
1346 12:54:33.019307 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1347 12:54:33.022800 PCI: 00:15.1 assign_resources, bus 0 link: 0
1348 12:54:33.029624 PCI: 00:15.1 assign_resources, bus 0 link: 0
1349 12:54:33.035970 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1350 12:54:33.045717 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1351 12:54:33.052658 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1352 12:54:33.062208 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1353 12:54:33.065711 PCI: 00:19.1 assign_resources, bus 0 link: 0
1354 12:54:33.069248 PCI: 00:19.1 assign_resources, bus 0 link: 0
1355 12:54:33.079003 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1356 12:54:33.089195 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1357 12:54:33.098908 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1358 12:54:33.102503 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 12:54:33.108733 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1360 12:54:33.118907 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1361 12:54:33.121667 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 12:54:33.132382 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1363 12:54:33.135315 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1364 12:54:33.142101 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1365 12:54:33.148779 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1366 12:54:33.151602 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1367 12:54:33.158935 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1368 12:54:33.162439 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1369 12:54:33.168847 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1370 12:54:33.172244 LPC: Trying to open IO window from 800 size 1ff
1371 12:54:33.181857 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1372 12:54:33.188945 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1373 12:54:33.198396 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1374 12:54:33.201611 DOMAIN: 0000 assign_resources, bus 0 link: 0
1375 12:54:33.205079 Root Device assign_resources, bus 0 link: 0
1376 12:54:33.208697 Done setting resources.
1377 12:54:33.215001 Show resources in subtree (Root Device)...After assigning values.
1378 12:54:33.218357 Root Device child on link 0 DOMAIN: 0000
1379 12:54:33.225286 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1380 12:54:33.235027 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1381 12:54:33.244941 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1382 12:54:33.245097 PCI: 00:00.0
1383 12:54:33.254414 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1384 12:54:33.264419 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1385 12:54:33.274881 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1386 12:54:33.281187 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1387 12:54:33.291751 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1388 12:54:33.301469 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1389 12:54:33.311674 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1390 12:54:33.321399 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1391 12:54:33.330842 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1392 12:54:33.337827 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1393 12:54:33.347273 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1394 12:54:33.357300 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1395 12:54:33.367317 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1396 12:54:33.377696 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1397 12:54:33.384170 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1398 12:54:33.394119 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1399 12:54:33.403922 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1400 12:54:33.413651 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1401 12:54:33.423767 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1402 12:54:33.434237 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1403 12:54:33.434758 PCI: 00:02.0
1404 12:54:33.447292 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1405 12:54:33.457346 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1406 12:54:33.467201 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1407 12:54:33.470785 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1408 12:54:33.480442 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1409 12:54:33.483893 GENERIC: 0.0
1410 12:54:33.484306 PCI: 00:05.0
1411 12:54:33.493469 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1412 12:54:33.500489 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1413 12:54:33.500904 GENERIC: 0.0
1414 12:54:33.503411 PCI: 00:08.0
1415 12:54:33.513685 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1416 12:54:33.514219 PCI: 00:0a.0
1417 12:54:33.520449 PCI: 00:0d.0 child on link 0 USB0 port 0
1418 12:54:33.530465 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1419 12:54:33.533323 USB0 port 0 child on link 0 USB3 port 0
1420 12:54:33.537070 USB3 port 0
1421 12:54:33.537636 USB3 port 1
1422 12:54:33.540313 USB3 port 2
1423 12:54:33.540836 USB3 port 3
1424 12:54:33.546470 PCI: 00:14.0 child on link 0 USB0 port 0
1425 12:54:33.556635 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1426 12:54:33.560042 USB0 port 0 child on link 0 USB2 port 0
1427 12:54:33.563609 USB2 port 0
1428 12:54:33.564024 USB2 port 1
1429 12:54:33.566414 USB2 port 2
1430 12:54:33.566862 USB2 port 3
1431 12:54:33.569877 USB2 port 4
1432 12:54:33.570300 USB2 port 5
1433 12:54:33.573402 USB2 port 6
1434 12:54:33.573878 USB2 port 7
1435 12:54:33.576566 USB2 port 8
1436 12:54:33.577092 USB2 port 9
1437 12:54:33.580028 USB3 port 0
1438 12:54:33.580444 USB3 port 1
1439 12:54:33.583475 USB3 port 2
1440 12:54:33.583890 USB3 port 3
1441 12:54:33.586356 PCI: 00:14.2
1442 12:54:33.596047 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1443 12:54:33.606636 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1444 12:54:33.612838 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1445 12:54:33.623264 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1446 12:54:33.623694 GENERIC: 0.0
1447 12:54:33.629387 PCI: 00:15.0 child on link 0 I2C: 00:1a
1448 12:54:33.639520 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1449 12:54:33.639992 I2C: 00:1a
1450 12:54:33.642852 I2C: 00:31
1451 12:54:33.643361 I2C: 00:32
1452 12:54:33.646317 PCI: 00:15.1 child on link 0 I2C: 00:10
1453 12:54:33.659830 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1454 12:54:33.660384 I2C: 00:10
1455 12:54:33.660725 PCI: 00:15.2
1456 12:54:33.672997 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1457 12:54:33.673550 PCI: 00:15.3
1458 12:54:33.682185 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1459 12:54:33.685924 PCI: 00:16.0
1460 12:54:33.695506 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1461 12:54:33.695935 PCI: 00:19.0
1462 12:54:33.702405 PCI: 00:19.1 child on link 0 I2C: 00:15
1463 12:54:33.712143 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1464 12:54:33.712647 I2C: 00:15
1465 12:54:33.719117 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1466 12:54:33.725874 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1467 12:54:33.738984 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1468 12:54:33.748830 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1469 12:54:33.752174 GENERIC: 0.0
1470 12:54:33.752594 PCI: 01:00.0
1471 12:54:33.761933 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1472 12:54:33.771413 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1473 12:54:33.774911 PCI: 00:1e.0
1474 12:54:33.784676 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1475 12:54:33.791292 PCI: 00:1e.2 child on link 0 SPI: 00
1476 12:54:33.801709 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1477 12:54:33.802124 SPI: 00
1478 12:54:33.804669 PCI: 00:1e.3 child on link 0 SPI: 00
1479 12:54:33.814841 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1480 12:54:33.818181 SPI: 00
1481 12:54:33.821747 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1482 12:54:33.831176 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1483 12:54:33.831612 PNP: 0c09.0
1484 12:54:33.840981 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1485 12:54:33.844310 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1486 12:54:33.854191 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1487 12:54:33.864512 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1488 12:54:33.867486 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1489 12:54:33.870757 GENERIC: 0.0
1490 12:54:33.871168 GENERIC: 1.0
1491 12:54:33.874370 PCI: 00:1f.3
1492 12:54:33.884270 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1493 12:54:33.894347 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1494 12:54:33.897416 PCI: 00:1f.5
1495 12:54:33.907198 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1496 12:54:33.910688 CPU_CLUSTER: 0 child on link 0 APIC: 00
1497 12:54:33.911133 APIC: 00
1498 12:54:33.914253 APIC: 05
1499 12:54:33.914702 APIC: 02
1500 12:54:33.916954 APIC: 06
1501 12:54:33.917387 APIC: 07
1502 12:54:33.917805 APIC: 04
1503 12:54:33.920542 APIC: 01
1504 12:54:33.920978 APIC: 03
1505 12:54:33.923895 Done allocating resources.
1506 12:54:33.930048 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1507 12:54:33.936991 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1508 12:54:33.940513 Configure GPIOs for I2S audio on UP4.
1509 12:54:33.947244 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1510 12:54:33.950660 Enabling resources...
1511 12:54:33.953430 PCI: 00:00.0 subsystem <- 8086/9a12
1512 12:54:33.953911 PCI: 00:00.0 cmd <- 06
1513 12:54:33.960458 PCI: 00:02.0 subsystem <- 8086/9a40
1514 12:54:33.960989 PCI: 00:02.0 cmd <- 03
1515 12:54:33.963629 PCI: 00:04.0 subsystem <- 8086/9a03
1516 12:54:33.967106 PCI: 00:04.0 cmd <- 02
1517 12:54:33.970562 PCI: 00:05.0 subsystem <- 8086/9a19
1518 12:54:33.973329 PCI: 00:05.0 cmd <- 02
1519 12:54:33.976816 PCI: 00:08.0 subsystem <- 8086/9a11
1520 12:54:33.980365 PCI: 00:08.0 cmd <- 06
1521 12:54:33.983829 PCI: 00:0d.0 subsystem <- 8086/9a13
1522 12:54:33.986722 PCI: 00:0d.0 cmd <- 02
1523 12:54:33.990228 PCI: 00:14.0 subsystem <- 8086/a0ed
1524 12:54:33.993785 PCI: 00:14.0 cmd <- 02
1525 12:54:33.996471 PCI: 00:14.2 subsystem <- 8086/a0ef
1526 12:54:33.999951 PCI: 00:14.2 cmd <- 02
1527 12:54:34.003195 PCI: 00:14.3 subsystem <- 8086/a0f0
1528 12:54:34.003621 PCI: 00:14.3 cmd <- 02
1529 12:54:34.009848 PCI: 00:15.0 subsystem <- 8086/a0e8
1530 12:54:34.010263 PCI: 00:15.0 cmd <- 02
1531 12:54:34.013179 PCI: 00:15.1 subsystem <- 8086/a0e9
1532 12:54:34.016699 PCI: 00:15.1 cmd <- 02
1533 12:54:34.020062 PCI: 00:15.2 subsystem <- 8086/a0ea
1534 12:54:34.023327 PCI: 00:15.2 cmd <- 02
1535 12:54:34.026400 PCI: 00:15.3 subsystem <- 8086/a0eb
1536 12:54:34.029856 PCI: 00:15.3 cmd <- 02
1537 12:54:34.033306 PCI: 00:16.0 subsystem <- 8086/a0e0
1538 12:54:34.036381 PCI: 00:16.0 cmd <- 02
1539 12:54:34.039957 PCI: 00:19.1 subsystem <- 8086/a0c6
1540 12:54:34.042828 PCI: 00:19.1 cmd <- 02
1541 12:54:34.046256 PCI: 00:1d.0 bridge ctrl <- 0013
1542 12:54:34.049925 PCI: 00:1d.0 subsystem <- 8086/a0b0
1543 12:54:34.053336 PCI: 00:1d.0 cmd <- 06
1544 12:54:34.056011 PCI: 00:1e.0 subsystem <- 8086/a0a8
1545 12:54:34.056539 PCI: 00:1e.0 cmd <- 06
1546 12:54:34.062797 PCI: 00:1e.2 subsystem <- 8086/a0aa
1547 12:54:34.063222 PCI: 00:1e.2 cmd <- 06
1548 12:54:34.066371 PCI: 00:1e.3 subsystem <- 8086/a0ab
1549 12:54:34.069764 PCI: 00:1e.3 cmd <- 02
1550 12:54:34.072578 PCI: 00:1f.0 subsystem <- 8086/a087
1551 12:54:34.076137 PCI: 00:1f.0 cmd <- 407
1552 12:54:34.079265 PCI: 00:1f.3 subsystem <- 8086/a0c8
1553 12:54:34.082644 PCI: 00:1f.3 cmd <- 02
1554 12:54:34.085777 PCI: 00:1f.5 subsystem <- 8086/a0a4
1555 12:54:34.089317 PCI: 00:1f.5 cmd <- 406
1556 12:54:34.092886 PCI: 01:00.0 cmd <- 02
1557 12:54:34.097234 done.
1558 12:54:34.100767 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1559 12:54:34.104404 Initializing devices...
1560 12:54:34.107277 Root Device init
1561 12:54:34.110645 Chrome EC: Set SMI mask to 0x0000000000000000
1562 12:54:34.117495 Chrome EC: clear events_b mask to 0x0000000000000000
1563 12:54:34.123884 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1564 12:54:34.127334 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1565 12:54:34.134337 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1566 12:54:34.140648 Chrome EC: Set WAKE mask to 0x0000000000000000
1567 12:54:34.143326 fw_config match found: DB_USB=USB3_ACTIVE
1568 12:54:34.150476 Configure Right Type-C port orientation for retimer
1569 12:54:34.153261 Root Device init finished in 42 msecs
1570 12:54:34.156724 PCI: 00:00.0 init
1571 12:54:34.156812 CPU TDP = 9 Watts
1572 12:54:34.160225 CPU PL1 = 9 Watts
1573 12:54:34.163179 CPU PL2 = 40 Watts
1574 12:54:34.163289 CPU PL4 = 83 Watts
1575 12:54:34.166837 PCI: 00:00.0 init finished in 8 msecs
1576 12:54:34.169857 PCI: 00:02.0 init
1577 12:54:34.173340 GMA: Found VBT in CBFS
1578 12:54:34.176803 GMA: Found valid VBT in CBFS
1579 12:54:34.179730 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1580 12:54:34.189493 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1581 12:54:34.193065 PCI: 00:02.0 init finished in 18 msecs
1582 12:54:34.196688 PCI: 00:05.0 init
1583 12:54:34.199577 PCI: 00:05.0 init finished in 0 msecs
1584 12:54:34.199686 PCI: 00:08.0 init
1585 12:54:34.206081 PCI: 00:08.0 init finished in 0 msecs
1586 12:54:34.206158 PCI: 00:14.0 init
1587 12:54:34.212745 PCI: 00:14.0 init finished in 0 msecs
1588 12:54:34.212822 PCI: 00:14.2 init
1589 12:54:34.216259 PCI: 00:14.2 init finished in 0 msecs
1590 12:54:34.219600 PCI: 00:15.0 init
1591 12:54:34.223160 I2C bus 0 version 0x3230302a
1592 12:54:34.226736 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1593 12:54:34.230203 PCI: 00:15.0 init finished in 6 msecs
1594 12:54:34.233041 PCI: 00:15.1 init
1595 12:54:34.236707 I2C bus 1 version 0x3230302a
1596 12:54:34.239533 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1597 12:54:34.243241 PCI: 00:15.1 init finished in 6 msecs
1598 12:54:34.246809 PCI: 00:15.2 init
1599 12:54:34.249827 I2C bus 2 version 0x3230302a
1600 12:54:34.252663 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1601 12:54:34.256291 PCI: 00:15.2 init finished in 6 msecs
1602 12:54:34.259973 PCI: 00:15.3 init
1603 12:54:34.260083 I2C bus 3 version 0x3230302a
1604 12:54:34.266211 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1605 12:54:34.269866 PCI: 00:15.3 init finished in 6 msecs
1606 12:54:34.269942 PCI: 00:16.0 init
1607 12:54:34.272620 PCI: 00:16.0 init finished in 0 msecs
1608 12:54:34.277048 PCI: 00:19.1 init
1609 12:54:34.279928 I2C bus 5 version 0x3230302a
1610 12:54:34.283442 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1611 12:54:34.286342 PCI: 00:19.1 init finished in 6 msecs
1612 12:54:34.289995 PCI: 00:1d.0 init
1613 12:54:34.292994 Initializing PCH PCIe bridge.
1614 12:54:34.296638 PCI: 00:1d.0 init finished in 3 msecs
1615 12:54:34.299651 PCI: 00:1f.0 init
1616 12:54:34.303272 IOAPIC: Initializing IOAPIC at 0xfec00000
1617 12:54:34.309760 IOAPIC: Bootstrap Processor Local APIC = 0x00
1618 12:54:34.309971 IOAPIC: ID = 0x02
1619 12:54:34.313413 IOAPIC: Dumping registers
1620 12:54:34.316429 reg 0x0000: 0x02000000
1621 12:54:34.316554 reg 0x0001: 0x00770020
1622 12:54:34.319341 reg 0x0002: 0x00000000
1623 12:54:34.322883 PCI: 00:1f.0 init finished in 21 msecs
1624 12:54:34.326295 PCI: 00:1f.2 init
1625 12:54:34.329903 Disabling ACPI via APMC.
1626 12:54:34.332854 APMC done.
1627 12:54:34.336342 PCI: 00:1f.2 init finished in 6 msecs
1628 12:54:34.347989 PCI: 01:00.0 init
1629 12:54:34.351661 PCI: 01:00.0 init finished in 0 msecs
1630 12:54:34.354601 PNP: 0c09.0 init
1631 12:54:34.358141 Google Chrome EC uptime: 8.288 seconds
1632 12:54:34.364712 Google Chrome AP resets since EC boot: 1
1633 12:54:34.368276 Google Chrome most recent AP reset causes:
1634 12:54:34.371157 0.452: 32775 shutdown: entering G3
1635 12:54:34.377938 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1636 12:54:34.381491 PNP: 0c09.0 init finished in 23 msecs
1637 12:54:34.387420 Devices initialized
1638 12:54:34.391030 Show all devs... After init.
1639 12:54:34.394013 Root Device: enabled 1
1640 12:54:34.394122 DOMAIN: 0000: enabled 1
1641 12:54:34.397037 CPU_CLUSTER: 0: enabled 1
1642 12:54:34.400793 PCI: 00:00.0: enabled 1
1643 12:54:34.403668 PCI: 00:02.0: enabled 1
1644 12:54:34.403777 PCI: 00:04.0: enabled 1
1645 12:54:34.407274 PCI: 00:05.0: enabled 1
1646 12:54:34.410085 PCI: 00:06.0: enabled 0
1647 12:54:34.413902 PCI: 00:07.0: enabled 0
1648 12:54:34.414006 PCI: 00:07.1: enabled 0
1649 12:54:34.416866 PCI: 00:07.2: enabled 0
1650 12:54:34.420457 PCI: 00:07.3: enabled 0
1651 12:54:34.423458 PCI: 00:08.0: enabled 1
1652 12:54:34.423540 PCI: 00:09.0: enabled 0
1653 12:54:34.427049 PCI: 00:0a.0: enabled 0
1654 12:54:34.430611 PCI: 00:0d.0: enabled 1
1655 12:54:34.433375 PCI: 00:0d.1: enabled 0
1656 12:54:34.433458 PCI: 00:0d.2: enabled 0
1657 12:54:34.437018 PCI: 00:0d.3: enabled 0
1658 12:54:34.440718 PCI: 00:0e.0: enabled 0
1659 12:54:34.440801 PCI: 00:10.2: enabled 1
1660 12:54:34.443605 PCI: 00:10.6: enabled 0
1661 12:54:34.447317 PCI: 00:10.7: enabled 0
1662 12:54:34.450215 PCI: 00:12.0: enabled 0
1663 12:54:34.450298 PCI: 00:12.6: enabled 0
1664 12:54:34.453758 PCI: 00:13.0: enabled 0
1665 12:54:34.456684 PCI: 00:14.0: enabled 1
1666 12:54:34.460345 PCI: 00:14.1: enabled 0
1667 12:54:34.460429 PCI: 00:14.2: enabled 1
1668 12:54:34.463265 PCI: 00:14.3: enabled 1
1669 12:54:34.466858 PCI: 00:15.0: enabled 1
1670 12:54:34.470536 PCI: 00:15.1: enabled 1
1671 12:54:34.470620 PCI: 00:15.2: enabled 1
1672 12:54:34.473527 PCI: 00:15.3: enabled 1
1673 12:54:34.477003 PCI: 00:16.0: enabled 1
1674 12:54:34.479964 PCI: 00:16.1: enabled 0
1675 12:54:34.480047 PCI: 00:16.2: enabled 0
1676 12:54:34.483675 PCI: 00:16.3: enabled 0
1677 12:54:34.486437 PCI: 00:16.4: enabled 0
1678 12:54:34.486547 PCI: 00:16.5: enabled 0
1679 12:54:34.490059 PCI: 00:17.0: enabled 0
1680 12:54:34.493754 PCI: 00:19.0: enabled 0
1681 12:54:34.496556 PCI: 00:19.1: enabled 1
1682 12:54:34.496665 PCI: 00:19.2: enabled 0
1683 12:54:34.500279 PCI: 00:1c.0: enabled 1
1684 12:54:34.503262 PCI: 00:1c.1: enabled 0
1685 12:54:34.506897 PCI: 00:1c.2: enabled 0
1686 12:54:34.506981 PCI: 00:1c.3: enabled 0
1687 12:54:34.509759 PCI: 00:1c.4: enabled 0
1688 12:54:34.513386 PCI: 00:1c.5: enabled 0
1689 12:54:34.517044 PCI: 00:1c.6: enabled 1
1690 12:54:34.517156 PCI: 00:1c.7: enabled 0
1691 12:54:34.520045 PCI: 00:1d.0: enabled 1
1692 12:54:34.523521 PCI: 00:1d.1: enabled 0
1693 12:54:34.523604 PCI: 00:1d.2: enabled 1
1694 12:54:34.526483 PCI: 00:1d.3: enabled 0
1695 12:54:34.530243 PCI: 00:1e.0: enabled 1
1696 12:54:34.533154 PCI: 00:1e.1: enabled 0
1697 12:54:34.533263 PCI: 00:1e.2: enabled 1
1698 12:54:34.536878 PCI: 00:1e.3: enabled 1
1699 12:54:34.539581 PCI: 00:1f.0: enabled 1
1700 12:54:34.543079 PCI: 00:1f.1: enabled 0
1701 12:54:34.543224 PCI: 00:1f.2: enabled 1
1702 12:54:34.546725 PCI: 00:1f.3: enabled 1
1703 12:54:34.549656 PCI: 00:1f.4: enabled 0
1704 12:54:34.553202 PCI: 00:1f.5: enabled 1
1705 12:54:34.553307 PCI: 00:1f.6: enabled 0
1706 12:54:34.556555 PCI: 00:1f.7: enabled 0
1707 12:54:34.559418 APIC: 00: enabled 1
1708 12:54:34.559527 GENERIC: 0.0: enabled 1
1709 12:54:34.562992 GENERIC: 0.0: enabled 1
1710 12:54:34.566508 GENERIC: 1.0: enabled 1
1711 12:54:34.569871 GENERIC: 0.0: enabled 1
1712 12:54:34.569951 GENERIC: 1.0: enabled 1
1713 12:54:34.572745 USB0 port 0: enabled 1
1714 12:54:34.576361 GENERIC: 0.0: enabled 1
1715 12:54:34.579880 USB0 port 0: enabled 1
1716 12:54:34.579981 GENERIC: 0.0: enabled 1
1717 12:54:34.582756 I2C: 00:1a: enabled 1
1718 12:54:34.586384 I2C: 00:31: enabled 1
1719 12:54:34.586462 I2C: 00:32: enabled 1
1720 12:54:34.589356 I2C: 00:10: enabled 1
1721 12:54:34.593021 I2C: 00:15: enabled 1
1722 12:54:34.593098 GENERIC: 0.0: enabled 0
1723 12:54:34.596004 GENERIC: 1.0: enabled 0
1724 12:54:34.599671 GENERIC: 0.0: enabled 1
1725 12:54:34.599769 SPI: 00: enabled 1
1726 12:54:34.602681 SPI: 00: enabled 1
1727 12:54:34.606304 PNP: 0c09.0: enabled 1
1728 12:54:34.606377 GENERIC: 0.0: enabled 1
1729 12:54:34.609298 USB3 port 0: enabled 1
1730 12:54:34.612876 USB3 port 1: enabled 1
1731 12:54:34.616309 USB3 port 2: enabled 0
1732 12:54:34.616384 USB3 port 3: enabled 0
1733 12:54:34.619243 USB2 port 0: enabled 0
1734 12:54:34.622878 USB2 port 1: enabled 1
1735 12:54:34.622965 USB2 port 2: enabled 1
1736 12:54:34.625997 USB2 port 3: enabled 0
1737 12:54:34.629493 USB2 port 4: enabled 1
1738 12:54:34.632620 USB2 port 5: enabled 0
1739 12:54:34.632722 USB2 port 6: enabled 0
1740 12:54:34.636032 USB2 port 7: enabled 0
1741 12:54:34.638968 USB2 port 8: enabled 0
1742 12:54:34.639045 USB2 port 9: enabled 0
1743 12:54:34.642565 USB3 port 0: enabled 0
1744 12:54:34.646022 USB3 port 1: enabled 1
1745 12:54:34.646097 USB3 port 2: enabled 0
1746 12:54:34.649460 USB3 port 3: enabled 0
1747 12:54:34.652312 GENERIC: 0.0: enabled 1
1748 12:54:34.655742 GENERIC: 1.0: enabled 1
1749 12:54:34.655814 APIC: 05: enabled 1
1750 12:54:34.659342 APIC: 02: enabled 1
1751 12:54:34.662849 APIC: 06: enabled 1
1752 12:54:34.662931 APIC: 07: enabled 1
1753 12:54:34.665640 APIC: 04: enabled 1
1754 12:54:34.665728 APIC: 01: enabled 1
1755 12:54:34.668937 APIC: 03: enabled 1
1756 12:54:34.672328 PCI: 01:00.0: enabled 1
1757 12:54:34.675708 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1758 12:54:34.682651 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1759 12:54:34.685977 ELOG: NV offset 0xf30000 size 0x1000
1760 12:54:34.692418 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1761 12:54:34.699504 ELOG: Event(17) added with size 13 at 2023-04-05 12:54:34 UTC
1762 12:54:34.705644 ELOG: Event(92) added with size 9 at 2023-04-05 12:54:34 UTC
1763 12:54:34.711984 ELOG: Event(93) added with size 9 at 2023-04-05 12:54:34 UTC
1764 12:54:34.719088 ELOG: Event(9E) added with size 10 at 2023-04-05 12:54:34 UTC
1765 12:54:34.725393 ELOG: Event(9F) added with size 14 at 2023-04-05 12:54:34 UTC
1766 12:54:34.732298 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1767 12:54:34.738926 ELOG: Event(A1) added with size 10 at 2023-04-05 12:54:34 UTC
1768 12:54:34.745695 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1769 12:54:34.751720 ELOG: Event(A0) added with size 9 at 2023-04-05 12:54:34 UTC
1770 12:54:34.755395 elog_add_boot_reason: Logged dev mode boot
1771 12:54:34.761654 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1772 12:54:34.761739 Finalize devices...
1773 12:54:34.765086 Devices finalized
1774 12:54:34.771743 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1775 12:54:34.775296 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1776 12:54:34.781879 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1777 12:54:34.785244 ME: HFSTS1 : 0x80030055
1778 12:54:34.791527 ME: HFSTS2 : 0x30280116
1779 12:54:34.794930 ME: HFSTS3 : 0x00000050
1780 12:54:34.798337 ME: HFSTS4 : 0x00004000
1781 12:54:34.805067 ME: HFSTS5 : 0x00000000
1782 12:54:34.808587 ME: HFSTS6 : 0x40400006
1783 12:54:34.811424 ME: Manufacturing Mode : YES
1784 12:54:34.815151 ME: SPI Protection Mode Enabled : NO
1785 12:54:34.821287 ME: FW Partition Table : OK
1786 12:54:34.824881 ME: Bringup Loader Failure : NO
1787 12:54:34.827917 ME: Firmware Init Complete : NO
1788 12:54:34.831667 ME: Boot Options Present : NO
1789 12:54:34.834674 ME: Update In Progress : NO
1790 12:54:34.838317 ME: D0i3 Support : YES
1791 12:54:34.841366 ME: Low Power State Enabled : NO
1792 12:54:34.844444 ME: CPU Replaced : YES
1793 12:54:34.851719 ME: CPU Replacement Valid : YES
1794 12:54:34.854590 ME: Current Working State : 5
1795 12:54:34.858294 ME: Current Operation State : 1
1796 12:54:34.861183 ME: Current Operation Mode : 3
1797 12:54:34.864862 ME: Error Code : 0
1798 12:54:34.867607 ME: Enhanced Debug Mode : NO
1799 12:54:34.871141 ME: CPU Debug Disabled : YES
1800 12:54:34.874823 ME: TXT Support : NO
1801 12:54:34.881268 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1802 12:54:34.887504 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1803 12:54:34.891161 CBFS: 'fallback/slic' not found.
1804 12:54:34.897381 ACPI: Writing ACPI tables at 76b01000.
1805 12:54:34.897493 ACPI: * FACS
1806 12:54:34.900828 ACPI: * DSDT
1807 12:54:34.904277 Ramoops buffer: 0x100000@0x76a00000.
1808 12:54:34.907710 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1809 12:54:34.914421 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1810 12:54:34.917414 Google Chrome EC: version:
1811 12:54:34.921096 ro: voema_v2.0.10114-a447f03e46
1812 12:54:34.924063 rw: voema_v2.0.10132-7b2059e3bc
1813 12:54:34.924169 running image: 2
1814 12:54:34.930647 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1815 12:54:34.935140 ACPI: * FADT
1816 12:54:34.935275 SCI is IRQ9
1817 12:54:34.941947 ACPI: added table 1/32, length now 40
1818 12:54:34.942031 ACPI: * SSDT
1819 12:54:34.945572 Found 1 CPU(s) with 8 core(s) each.
1820 12:54:34.952129 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1821 12:54:34.955080 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1822 12:54:34.958821 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1823 12:54:34.961567 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1824 12:54:34.968407 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1825 12:54:34.975282 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1826 12:54:34.978110 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1827 12:54:34.985213 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1828 12:54:34.991549 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1829 12:54:34.995033 \_SB.PCI0.RP09: Added StorageD3Enable property
1830 12:54:35.001711 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1831 12:54:35.004485 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1832 12:54:35.011718 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1833 12:54:35.014566 PS2K: Passing 80 keymaps to kernel
1834 12:54:35.021607 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1835 12:54:35.028083 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1836 12:54:35.034726 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1837 12:54:35.041438 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1838 12:54:35.048061 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1839 12:54:35.054580 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1840 12:54:35.061356 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1841 12:54:35.067799 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1842 12:54:35.071348 ACPI: added table 2/32, length now 44
1843 12:54:35.074264 ACPI: * MCFG
1844 12:54:35.078063 ACPI: added table 3/32, length now 48
1845 12:54:35.078147 ACPI: * TPM2
1846 12:54:35.080656 TPM2 log created at 0x769f0000
1847 12:54:35.084195 ACPI: added table 4/32, length now 52
1848 12:54:35.087725 ACPI: * MADT
1849 12:54:35.087841 SCI is IRQ9
1850 12:54:35.090668 ACPI: added table 5/32, length now 56
1851 12:54:35.094241 current = 76b09850
1852 12:54:35.094323 ACPI: * DMAR
1853 12:54:35.101009 ACPI: added table 6/32, length now 60
1854 12:54:35.104309 ACPI: added table 7/32, length now 64
1855 12:54:35.104434 ACPI: * HPET
1856 12:54:35.107838 ACPI: added table 8/32, length now 68
1857 12:54:35.110574 ACPI: done.
1858 12:54:35.114084 ACPI tables: 35216 bytes.
1859 12:54:35.117518 smbios_write_tables: 769ef000
1860 12:54:35.120280 EC returned error result code 3
1861 12:54:35.123768 Couldn't obtain OEM name from CBI
1862 12:54:35.127344 Create SMBIOS type 16
1863 12:54:35.127447 Create SMBIOS type 17
1864 12:54:35.130233 GENERIC: 0.0 (WIFI Device)
1865 12:54:35.133832 SMBIOS tables: 1734 bytes.
1866 12:54:35.137146 Writing table forward entry at 0x00000500
1867 12:54:35.143384 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1868 12:54:35.146994 Writing coreboot table at 0x76b25000
1869 12:54:35.153401 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1870 12:54:35.160269 1. 0000000000001000-000000000009ffff: RAM
1871 12:54:35.163180 2. 00000000000a0000-00000000000fffff: RESERVED
1872 12:54:35.166688 3. 0000000000100000-00000000769eefff: RAM
1873 12:54:35.173231 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1874 12:54:35.180225 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1875 12:54:35.183075 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1876 12:54:35.189872 7. 0000000077000000-000000007fbfffff: RESERVED
1877 12:54:35.193390 8. 00000000c0000000-00000000cfffffff: RESERVED
1878 12:54:35.199769 9. 00000000f8000000-00000000f9ffffff: RESERVED
1879 12:54:35.203264 10. 00000000fb000000-00000000fb000fff: RESERVED
1880 12:54:35.210093 11. 00000000fe000000-00000000fe00ffff: RESERVED
1881 12:54:35.213391 12. 00000000fed80000-00000000fed87fff: RESERVED
1882 12:54:35.216337 13. 00000000fed90000-00000000fed92fff: RESERVED
1883 12:54:35.223312 14. 00000000feda0000-00000000feda1fff: RESERVED
1884 12:54:35.226141 15. 00000000fedc0000-00000000feddffff: RESERVED
1885 12:54:35.233158 16. 0000000100000000-00000004803fffff: RAM
1886 12:54:35.233289 Passing 4 GPIOs to payload:
1887 12:54:35.239607 NAME | PORT | POLARITY | VALUE
1888 12:54:35.246134 lid | undefined | high | high
1889 12:54:35.249462 power | undefined | high | low
1890 12:54:35.256019 oprom | undefined | high | low
1891 12:54:35.259396 EC in RW | 0x000000e5 | high | high
1892 12:54:35.265854 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1893 12:54:35.269332 coreboot table: 1576 bytes.
1894 12:54:35.272764 IMD ROOT 0. 0x76fff000 0x00001000
1895 12:54:35.276243 IMD SMALL 1. 0x76ffe000 0x00001000
1896 12:54:35.282494 FSP MEMORY 2. 0x76c4e000 0x003b0000
1897 12:54:35.286030 VPD 3. 0x76c4d000 0x00000367
1898 12:54:35.289517 RO MCACHE 4. 0x76c4c000 0x00000fdc
1899 12:54:35.292424 CONSOLE 5. 0x76c2c000 0x00020000
1900 12:54:35.295767 FMAP 6. 0x76c2b000 0x00000578
1901 12:54:35.299230 TIME STAMP 7. 0x76c2a000 0x00000910
1902 12:54:35.302677 VBOOT WORK 8. 0x76c16000 0x00014000
1903 12:54:35.305434 ROMSTG STCK 9. 0x76c15000 0x00001000
1904 12:54:35.312443 AFTER CAR 10. 0x76c0a000 0x0000b000
1905 12:54:35.315955 RAMSTAGE 11. 0x76b97000 0x00073000
1906 12:54:35.318895 REFCODE 12. 0x76b42000 0x00055000
1907 12:54:35.322324 SMM BACKUP 13. 0x76b32000 0x00010000
1908 12:54:35.325676 4f444749 14. 0x76b30000 0x00002000
1909 12:54:35.329028 EXT VBT15. 0x76b2d000 0x0000219f
1910 12:54:35.332305 COREBOOT 16. 0x76b25000 0x00008000
1911 12:54:35.335636 ACPI 17. 0x76b01000 0x00024000
1912 12:54:35.341941 ACPI GNVS 18. 0x76b00000 0x00001000
1913 12:54:35.345364 RAMOOPS 19. 0x76a00000 0x00100000
1914 12:54:35.348496 TPM2 TCGLOG20. 0x769f0000 0x00010000
1915 12:54:35.352103 SMBIOS 21. 0x769ef000 0x00000800
1916 12:54:35.352189 IMD small region:
1917 12:54:35.358415 IMD ROOT 0. 0x76ffec00 0x00000400
1918 12:54:35.361912 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1919 12:54:35.365429 POWER STATE 2. 0x76ffeb80 0x00000044
1920 12:54:35.368197 ROMSTAGE 3. 0x76ffeb60 0x00000004
1921 12:54:35.371805 MEM INFO 4. 0x76ffe980 0x000001e0
1922 12:54:35.378038 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1923 12:54:35.381600 MTRR: Physical address space:
1924 12:54:35.388537 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1925 12:54:35.395095 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1926 12:54:35.402046 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1927 12:54:35.408247 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1928 12:54:35.415094 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1929 12:54:35.418577 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1930 12:54:35.424812 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1931 12:54:35.431192 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 12:54:35.434542 MTRR: Fixed MSR 0x258 0x0606060606060606
1933 12:54:35.437879 MTRR: Fixed MSR 0x259 0x0000000000000000
1934 12:54:35.441155 MTRR: Fixed MSR 0x268 0x0606060606060606
1935 12:54:35.444720 MTRR: Fixed MSR 0x269 0x0606060606060606
1936 12:54:35.451600 MTRR: Fixed MSR 0x26a 0x0606060606060606
1937 12:54:35.454495 MTRR: Fixed MSR 0x26b 0x0606060606060606
1938 12:54:35.458119 MTRR: Fixed MSR 0x26c 0x0606060606060606
1939 12:54:35.461568 MTRR: Fixed MSR 0x26d 0x0606060606060606
1940 12:54:35.468030 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 12:54:35.470848 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 12:54:35.475033 call enable_fixed_mtrr()
1943 12:54:35.477934 CPU physical address size: 39 bits
1944 12:54:35.484819 MTRR: default type WB/UC MTRR counts: 6/7.
1945 12:54:35.487690 MTRR: WB selected as default type.
1946 12:54:35.494812 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1947 12:54:35.498218 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1948 12:54:35.504560 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1949 12:54:35.511120 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1950 12:54:35.517423 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1951 12:54:35.524177 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1952 12:54:35.531599 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 12:54:35.534397 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 12:54:35.537978 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 12:54:35.541271 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 12:54:35.547816 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 12:54:35.551402 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 12:54:35.554178 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 12:54:35.557558 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 12:54:35.564717 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 12:54:35.567436 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 12:54:35.570928 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 12:54:35.571027
1964 12:54:35.575163 MTRR check
1965 12:54:35.578604 call enable_fixed_mtrr()
1966 12:54:35.578685 Fixed MTRRs : Enabled
1967 12:54:35.581364 Variable MTRRs: Enabled
1968 12:54:35.581445
1969 12:54:35.584825 CPU physical address size: 39 bits
1970 12:54:35.592444 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
1971 12:54:35.598966 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 12:54:35.602414 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 12:54:35.605979 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 12:54:35.609459 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 12:54:35.612187 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 12:54:35.618926 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 12:54:35.622453 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 12:54:35.625334 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 12:54:35.628957 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 12:54:35.635781 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 12:54:35.639196 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 12:54:35.641995 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 12:54:35.649315 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 12:54:35.652769 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 12:54:35.656183 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 12:54:35.659534 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 12:54:35.665739 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 12:54:35.669454 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 12:54:35.673049 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 12:54:35.676185 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 12:54:35.682653 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 12:54:35.686209 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 12:54:35.689036 call enable_fixed_mtrr()
1994 12:54:35.692404 call enable_fixed_mtrr()
1995 12:54:35.695976 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 12:54:35.699502 MTRR: Fixed MSR 0x250 0x0606060606060606
1997 12:54:35.705883 MTRR: Fixed MSR 0x258 0x0606060606060606
1998 12:54:35.709437 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 12:54:35.712884 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 12:54:35.715683 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 12:54:35.719516 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 12:54:35.725546 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 12:54:35.729063 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 12:54:35.732604 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 12:54:35.735530 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 12:54:35.742594 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 12:54:35.745472 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 12:54:35.748957 call enable_fixed_mtrr()
2009 12:54:35.752287 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 12:54:35.759007 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 12:54:35.762487 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 12:54:35.765272 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 12:54:35.768935 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 12:54:35.775519 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 12:54:35.779113 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 12:54:35.781988 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 12:54:35.785632 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 12:54:35.789980 Checking cr50 for pending updates
2019 12:54:35.793416 CPU physical address size: 39 bits
2020 12:54:35.797038 CPU physical address size: 39 bits
2021 12:54:35.803239 CPU physical address size: 39 bits
2022 12:54:35.806685 call enable_fixed_mtrr()
2023 12:54:35.810878 Reading cr50 TPM mode
2024 12:54:35.814369 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 12:54:35.817133 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 12:54:35.820643 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 12:54:35.824225 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 12:54:35.830888 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 12:54:35.833650 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 12:54:35.837166 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 12:54:35.840566 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 12:54:35.844120 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 12:54:35.850453 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 12:54:35.853938 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 12:54:35.857330 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 12:54:35.865033 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 12:54:35.867834 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 12:54:35.871534 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 12:54:35.874873 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 12:54:35.881324 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 12:54:35.885063 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 12:54:35.887915 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 12:54:35.891561 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 12:54:35.897968 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 12:54:35.901490 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 12:54:35.904377 call enable_fixed_mtrr()
2047 12:54:35.908155 call enable_fixed_mtrr()
2048 12:54:35.911111 CPU physical address size: 39 bits
2049 12:54:35.914807 CPU physical address size: 39 bits
2050 12:54:35.918500 CPU physical address size: 39 bits
2051 12:54:35.924693 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2052 12:54:35.934778 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2053 12:54:35.938010 Checking segment from ROM address 0xffc02b38
2054 12:54:35.941433 Checking segment from ROM address 0xffc02b54
2055 12:54:35.948021 Loading segment from ROM address 0xffc02b38
2056 12:54:35.948105 code (compression=0)
2057 12:54:35.958240 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2058 12:54:35.967925 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2059 12:54:35.968011 it's not compressed!
2060 12:54:36.108382 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2061 12:54:36.115258 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2062 12:54:36.122293 Loading segment from ROM address 0xffc02b54
2063 12:54:36.125764 Entry Point 0x30000000
2064 12:54:36.125845 Loaded segments
2065 12:54:36.132201 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2066 12:54:36.177175 Finalizing chipset.
2067 12:54:36.180606 Finalizing SMM.
2068 12:54:36.180691 APMC done.
2069 12:54:36.187414 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2070 12:54:36.190185 mp_park_aps done after 0 msecs.
2071 12:54:36.193532 Jumping to boot code at 0x30000000(0x76b25000)
2072 12:54:36.203469 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2073 12:54:36.203556
2074 12:54:36.203664
2075 12:54:36.207158
2076 12:54:36.207240 Starting depthcharge on Voema...
2077 12:54:36.207573 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2078 12:54:36.207677 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2079 12:54:36.207761 Setting prompt string to ['volteer:']
2080 12:54:36.207839 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2081 12:54:36.210062
2082 12:54:36.216647 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2083 12:54:36.216734
2084 12:54:36.223639 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2085 12:54:36.223749
2086 12:54:36.229965 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2087 12:54:36.230055
2088 12:54:36.233296 Failed to find eMMC card reader
2089 12:54:36.233380
2090 12:54:36.233445 Wipe memory regions:
2091 12:54:36.236668
2092 12:54:36.240345 [0x00000000001000, 0x000000000a0000)
2093 12:54:36.240447
2094 12:54:36.243315 [0x00000000100000, 0x00000030000000)
2095 12:54:36.277221
2096 12:54:36.280575 [0x00000032662db0, 0x000000769ef000)
2097 12:54:36.328333
2098 12:54:36.331623 [0x00000100000000, 0x00000480400000)
2099 12:54:36.939518
2100 12:54:36.942901 ec_init: CrosEC protocol v3 supported (256, 256)
2101 12:54:37.373966
2102 12:54:37.374106 R8152: Initializing
2103 12:54:37.374200
2104 12:54:37.377156 Version 6 (ocp_data = 5c30)
2105 12:54:37.377271
2106 12:54:37.380457 R8152: Done initializing
2107 12:54:37.380545
2108 12:54:37.383709 Adding net device
2109 12:54:37.686017
2110 12:54:37.689212 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2111 12:54:37.689307
2112 12:54:37.689408
2113 12:54:37.689507
2114 12:54:37.692842 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2116 12:54:37.793539 volteer: tftpboot 192.168.201.1 9879109/tftp-deploy-_lky30fg/kernel/bzImage 9879109/tftp-deploy-_lky30fg/kernel/cmdline 9879109/tftp-deploy-_lky30fg/ramdisk/ramdisk.cpio.gz
2117 12:54:37.793701 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2118 12:54:37.793805 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2119 12:54:37.798447 tftpboot 192.168.201.1 9879109/tftp-deploy-_lky30fg/kernel/bzImagoy-_lky30fg/kernel/cmdline 9879109/tftp-deploy-_lky30fg/ramdisk/ramdisk.cpio.gz
2120 12:54:37.798541
2121 12:54:37.798610 Waiting for link
2122 12:54:38.001651
2123 12:54:38.001806 done.
2124 12:54:38.001903
2125 12:54:38.002001 MAC: 00:24:32:30:7e:22
2126 12:54:38.002089
2127 12:54:38.004358 Sending DHCP discover... done.
2128 12:54:38.004464
2129 12:54:38.007579 Waiting for reply... done.
2130 12:54:38.007678
2131 12:54:38.011476 Sending DHCP request... done.
2132 12:54:38.011576
2133 12:54:38.014613 Waiting for reply... done.
2134 12:54:38.014715
2135 12:54:38.017412 My ip is 192.168.201.21
2136 12:54:38.017532
2137 12:54:38.020738 The DHCP server ip is 192.168.201.1
2138 12:54:38.020843
2139 12:54:38.024003 TFTP server IP predefined by user: 192.168.201.1
2140 12:54:38.024105
2141 12:54:38.030580 Bootfile predefined by user: 9879109/tftp-deploy-_lky30fg/kernel/bzImage
2142 12:54:38.030683
2143 12:54:38.037521 Sending tftp read request... done.
2144 12:54:38.037615
2145 12:54:38.037678 Waiting for the transfer...
2146 12:54:38.037737
2147 12:54:38.581465 00000000 ################################################################
2148 12:54:38.581615
2149 12:54:39.118670 00080000 ################################################################
2150 12:54:39.118802
2151 12:54:39.648837 00100000 ################################################################
2152 12:54:39.648968
2153 12:54:40.192134 00180000 ################################################################
2154 12:54:40.192267
2155 12:54:40.738875 00200000 ################################################################
2156 12:54:40.739054
2157 12:54:41.291796 00280000 ################################################################
2158 12:54:41.291960
2159 12:54:41.825505 00300000 ################################################################
2160 12:54:41.825651
2161 12:54:42.351599 00380000 ################################################################
2162 12:54:42.351753
2163 12:54:42.884086 00400000 ################################################################
2164 12:54:42.884235
2165 12:54:43.405913 00480000 ################################################################
2166 12:54:43.406058
2167 12:54:43.931206 00500000 ################################################################
2168 12:54:43.931359
2169 12:54:44.458438 00580000 ################################################################
2170 12:54:44.458572
2171 12:54:44.988702 00600000 ################################################################
2172 12:54:44.988838
2173 12:54:45.536813 00680000 ################################################################
2174 12:54:45.536952
2175 12:54:46.102908 00700000 ################################################################
2176 12:54:46.103044
2177 12:54:46.642848 00780000 ################################################################
2178 12:54:46.643017
2179 12:54:47.198038 00800000 ################################################################
2180 12:54:47.198193
2181 12:54:47.735153 00880000 ################################################################
2182 12:54:47.735288
2183 12:54:48.272015 00900000 ################################################################
2184 12:54:48.272160
2185 12:54:48.822987 00980000 ################################################################
2186 12:54:48.823209
2187 12:54:49.193829 00a00000 ############################################## done.
2188 12:54:49.193968
2189 12:54:49.197157 The bootfile was 10854400 bytes long.
2190 12:54:49.197297
2191 12:54:49.200464 Sending tftp read request... done.
2192 12:54:49.200547
2193 12:54:49.203950 Waiting for the transfer...
2194 12:54:49.204032
2195 12:54:49.798043 00000000 ################################################################
2196 12:54:49.798604
2197 12:54:50.409506 00080000 ################################################################
2198 12:54:50.410038
2199 12:54:51.081045 00100000 ################################################################
2200 12:54:51.081772
2201 12:54:51.641504 00180000 ################################################################
2202 12:54:51.641648
2203 12:54:52.177088 00200000 ################################################################
2204 12:54:52.177227
2205 12:54:52.710722 00280000 ################################################################
2206 12:54:52.710888
2207 12:54:53.267910 00300000 ################################################################
2208 12:54:53.268042
2209 12:54:53.800581 00380000 ################################################################
2210 12:54:53.800748
2211 12:54:54.356012 00400000 ################################################################
2212 12:54:54.356164
2213 12:54:54.954048 00480000 ################################################################
2214 12:54:54.954222
2215 12:54:55.561788 00500000 ################################################################
2216 12:54:55.561918
2217 12:54:56.159664 00580000 ################################################################
2218 12:54:56.159796
2219 12:54:56.720194 00600000 ################################################################
2220 12:54:56.720331
2221 12:54:57.311241 00680000 ################################################################
2222 12:54:57.311394
2223 12:54:57.876000 00700000 ################################################################
2224 12:54:57.876138
2225 12:54:58.430595 00780000 ################################################################
2226 12:54:58.430725
2227 12:54:58.992980 00800000 ################################################################
2228 12:54:58.993153
2229 12:54:59.558255 00880000 ################################################################
2230 12:54:59.558397
2231 12:55:00.149478 00900000 ################################################################
2232 12:55:00.149628
2233 12:55:00.742833 00980000 ################################################################
2234 12:55:00.743413
2235 12:55:01.396330 00a00000 ################################################################
2236 12:55:01.396794
2237 12:55:01.991826 00a80000 ################################################################
2238 12:55:01.991984
2239 12:55:02.563971 00b00000 ################################################################
2240 12:55:02.564107
2241 12:55:03.130459 00b80000 ################################################################
2242 12:55:03.130594
2243 12:55:03.663361 00c00000 ################################################################
2244 12:55:03.663496
2245 12:55:04.229450 00c80000 ################################################################
2246 12:55:04.229620
2247 12:55:04.904923 00d00000 ################################################################
2248 12:55:04.905068
2249 12:55:05.559760 00d80000 ################################################################
2250 12:55:05.559895
2251 12:55:06.119343 00e00000 ################################################################
2252 12:55:06.119496
2253 12:55:06.681285 00e80000 ################################################################
2254 12:55:06.681444
2255 12:55:07.222717 00f00000 ################################################################
2256 12:55:07.222858
2257 12:55:07.785966 00f80000 ################################################################
2258 12:55:07.786135
2259 12:55:08.346642 01000000 ################################################################
2260 12:55:08.346786
2261 12:55:08.915010 01080000 ################################################################
2262 12:55:08.915143
2263 12:55:09.443428 01100000 ################################################################
2264 12:55:09.443570
2265 12:55:09.988126 01180000 ################################################################
2266 12:55:09.988316
2267 12:55:10.518041 01200000 ################################################################
2268 12:55:10.518211
2269 12:55:11.049447 01280000 ################################################################
2270 12:55:11.049632
2271 12:55:11.575609 01300000 ################################################################
2272 12:55:11.575751
2273 12:55:12.107710 01380000 ################################################################
2274 12:55:12.107882
2275 12:55:12.661773 01400000 ################################################################
2276 12:55:12.661910
2277 12:55:13.250176 01480000 ################################################################
2278 12:55:13.250311
2279 12:55:13.804054 01500000 ################################################################
2280 12:55:13.804229
2281 12:55:14.379490 01580000 ################################################################
2282 12:55:14.379626
2283 12:55:14.954452 01600000 ################################################################
2284 12:55:14.954606
2285 12:55:15.507794 01680000 ################################################################
2286 12:55:15.507945
2287 12:55:16.053942 01700000 ################################################################
2288 12:55:16.054081
2289 12:55:16.613628 01780000 ################################################################
2290 12:55:16.613765
2291 12:55:17.146421 01800000 ################################################################
2292 12:55:17.146589
2293 12:55:17.676331 01880000 ################################################################
2294 12:55:17.676474
2295 12:55:18.215108 01900000 ################################################################
2296 12:55:18.215240
2297 12:55:18.744813 01980000 ################################################################
2298 12:55:18.744953
2299 12:55:19.281377 01a00000 ################################################################
2300 12:55:19.281584
2301 12:55:19.810893 01a80000 ################################################################
2302 12:55:19.811041
2303 12:55:20.342066 01b00000 ################################################################
2304 12:55:20.342204
2305 12:55:20.886351 01b80000 ################################################################
2306 12:55:20.886498
2307 12:55:21.418967 01c00000 ################################################################
2308 12:55:21.419141
2309 12:55:21.959083 01c80000 ################################################################
2310 12:55:21.959245
2311 12:55:22.498755 01d00000 ################################################################
2312 12:55:22.498914
2313 12:55:23.029929 01d80000 ################################################################
2314 12:55:23.030096
2315 12:55:23.555624 01e00000 ################################################################
2316 12:55:23.555770
2317 12:55:24.086665 01e80000 ################################################################
2318 12:55:24.086805
2319 12:55:24.634254 01f00000 ################################################################
2320 12:55:24.634418
2321 12:55:25.186651 01f80000 ################################################################
2322 12:55:25.186817
2323 12:55:25.722252 02000000 ################################################################
2324 12:55:25.722388
2325 12:55:26.258935 02080000 ################################################################
2326 12:55:26.259081
2327 12:55:26.792403 02100000 ################################################################
2328 12:55:26.792560
2329 12:55:27.318694 02180000 ################################################################
2330 12:55:27.318860
2331 12:55:27.843630 02200000 ################################################################
2332 12:55:27.843792
2333 12:55:28.142583 02280000 ##################################### done.
2334 12:55:28.142751
2335 12:55:28.146162 Sending tftp read request... done.
2336 12:55:28.146273
2337 12:55:28.148934 Waiting for the transfer...
2338 12:55:28.149038
2339 12:55:28.149130 00000000 # done.
2340 12:55:28.149228
2341 12:55:28.159027 Command line loaded dynamically from TFTP file: 9879109/tftp-deploy-_lky30fg/kernel/cmdline
2342 12:55:28.159135
2343 12:55:28.172406 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2344 12:55:28.178927
2345 12:55:28.182207 Shutting down all USB controllers.
2346 12:55:28.182330
2347 12:55:28.182435 Removing current net device
2348 12:55:28.182539
2349 12:55:28.185018 Finalizing coreboot
2350 12:55:28.185136
2351 12:55:28.191978 Exiting depthcharge with code 4 at timestamp: 60555501
2352 12:55:28.192085
2353 12:55:28.192191
2354 12:55:28.192285 Starting kernel ...
2355 12:55:28.192379
2356 12:55:28.192466
2357 12:55:28.192911 end: 2.2.4 bootloader-commands (duration 00:00:52) [common]
2358 12:55:28.193043 start: 2.2.5 auto-login-action (timeout 00:03:53) [common]
2359 12:55:28.193153 Setting prompt string to ['Linux version [0-9]']
2360 12:55:28.193251 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2361 12:55:28.193360 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2363 12:59:21.193298 end: 2.2.5 auto-login-action (duration 00:03:53) [common]
2365 12:59:21.193613 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 233 seconds'
2367 12:59:21.193788 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2370 12:59:21.194086 end: 2 depthcharge-action (duration 00:05:00) [common]
2372 12:59:21.194419 Cleaning after the job
2373 12:59:21.194536 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879109/tftp-deploy-_lky30fg/ramdisk
2374 12:59:21.197387 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879109/tftp-deploy-_lky30fg/kernel
2375 12:59:21.198376 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879109/tftp-deploy-_lky30fg/modules
2376 12:59:21.198847 start: 4.1 power-off (timeout 00:00:30) [common]
2377 12:59:21.199143 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2378 12:59:21.276209 >> Command sent successfully.
2379 12:59:21.278619 Returned 0 in 0 seconds
2380 12:59:21.379418 end: 4.1 power-off (duration 00:00:00) [common]
2382 12:59:21.379862 start: 4.2 read-feedback (timeout 00:10:00) [common]
2383 12:59:21.380181 Listened to connection for namespace 'common' for up to 1s
2384 12:59:22.381605 Finalising connection for namespace 'common'
2385 12:59:22.381783 Disconnecting from shell: Finalise
2386 12:59:22.381916
2387 12:59:22.482601 end: 4.2 read-feedback (duration 00:00:01) [common]
2388 12:59:22.482778 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9879109
2389 12:59:22.518810 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9879109
2390 12:59:22.519001 JobError: Your job cannot terminate cleanly.