Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:54:16.393815 lava-dispatcher, installed at version: 2023.01
2 12:54:16.394026 start: 0 validate
3 12:54:16.394159 Start time: 2023-04-05 12:54:16.394152+00:00 (UTC)
4 12:54:16.394284 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:54:16.394415 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230331.0%2Famd64%2Finitrd.cpio.gz exists
6 12:54:16.691308 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:54:16.691499 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:54:16.977059 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:54:16.977271 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230331.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:54:17.270713 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:54:17.270936 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:54:17.566824 validate duration: 1.17
14 12:54:17.567115 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:54:17.567212 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:54:17.567329 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:54:17.567428 Not decompressing ramdisk as can be used compressed.
18 12:54:17.567509 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230331.0/amd64/initrd.cpio.gz
19 12:54:17.567573 saving as /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/ramdisk/initrd.cpio.gz
20 12:54:17.567633 total size: 6132284 (5MB)
21 12:54:17.568868 progress 0% (0MB)
22 12:54:17.570724 progress 5% (0MB)
23 12:54:17.572247 progress 10% (0MB)
24 12:54:17.573929 progress 15% (0MB)
25 12:54:17.575412 progress 20% (1MB)
26 12:54:17.576884 progress 25% (1MB)
27 12:54:17.578557 progress 30% (1MB)
28 12:54:17.580094 progress 35% (2MB)
29 12:54:17.581638 progress 40% (2MB)
30 12:54:17.583239 progress 45% (2MB)
31 12:54:17.584805 progress 50% (2MB)
32 12:54:17.586362 progress 55% (3MB)
33 12:54:17.588190 progress 60% (3MB)
34 12:54:17.589778 progress 65% (3MB)
35 12:54:17.591300 progress 70% (4MB)
36 12:54:17.592954 progress 75% (4MB)
37 12:54:17.594472 progress 80% (4MB)
38 12:54:17.596197 progress 85% (5MB)
39 12:54:17.597722 progress 90% (5MB)
40 12:54:17.599161 progress 95% (5MB)
41 12:54:17.600828 progress 100% (5MB)
42 12:54:17.600949 5MB downloaded in 0.03s (175.56MB/s)
43 12:54:17.601104 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:54:17.601384 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:54:17.601492 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:54:17.601590 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:54:17.601765 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:54:17.601833 saving as /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/kernel/bzImage
50 12:54:17.601894 total size: 10854400 (10MB)
51 12:54:17.601954 No compression specified
52 12:54:17.603176 progress 0% (0MB)
53 12:54:17.605905 progress 5% (0MB)
54 12:54:17.608671 progress 10% (1MB)
55 12:54:17.611404 progress 15% (1MB)
56 12:54:17.614227 progress 20% (2MB)
57 12:54:17.616841 progress 25% (2MB)
58 12:54:17.619602 progress 30% (3MB)
59 12:54:17.622283 progress 35% (3MB)
60 12:54:17.625396 progress 40% (4MB)
61 12:54:17.628153 progress 45% (4MB)
62 12:54:17.630755 progress 50% (5MB)
63 12:54:17.633515 progress 55% (5MB)
64 12:54:17.636166 progress 60% (6MB)
65 12:54:17.638955 progress 65% (6MB)
66 12:54:17.641537 progress 70% (7MB)
67 12:54:17.644254 progress 75% (7MB)
68 12:54:17.646823 progress 80% (8MB)
69 12:54:17.649562 progress 85% (8MB)
70 12:54:17.652286 progress 90% (9MB)
71 12:54:17.654882 progress 95% (9MB)
72 12:54:17.657673 progress 100% (10MB)
73 12:54:17.657831 10MB downloaded in 0.06s (185.07MB/s)
74 12:54:17.657990 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:54:17.658225 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:54:17.658314 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:54:17.658404 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:54:17.658517 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230331.0/amd64/full.rootfs.tar.xz
80 12:54:17.658584 saving as /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/nfsrootfs/full.rootfs.tar
81 12:54:17.658647 total size: 202956308 (193MB)
82 12:54:17.658709 Using unxz to decompress xz
83 12:54:17.662469 progress 0% (0MB)
84 12:54:18.245733 progress 5% (9MB)
85 12:54:18.779423 progress 10% (19MB)
86 12:54:19.329272 progress 15% (29MB)
87 12:54:19.618902 progress 20% (38MB)
88 12:54:20.158548 progress 25% (48MB)
89 12:54:20.724559 progress 30% (58MB)
90 12:54:21.304244 progress 35% (67MB)
91 12:54:21.866992 progress 40% (77MB)
92 12:54:22.436370 progress 45% (87MB)
93 12:54:23.029886 progress 50% (96MB)
94 12:54:23.623152 progress 55% (106MB)
95 12:54:24.307061 progress 60% (116MB)
96 12:54:24.736845 progress 65% (125MB)
97 12:54:24.833821 progress 70% (135MB)
98 12:54:24.971453 progress 75% (145MB)
99 12:54:25.058038 progress 80% (154MB)
100 12:54:25.111654 progress 85% (164MB)
101 12:54:25.208547 progress 90% (174MB)
102 12:54:25.571051 progress 95% (183MB)
103 12:54:26.159003 progress 100% (193MB)
104 12:54:26.165010 193MB downloaded in 8.51s (22.75MB/s)
105 12:54:26.165335 end: 1.3.1 http-download (duration 00:00:09) [common]
107 12:54:26.165684 end: 1.3 download-retry (duration 00:00:09) [common]
108 12:54:26.165779 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:54:26.165873 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:54:26.165990 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:54:26.166064 saving as /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/modules/modules.tar
112 12:54:26.166127 total size: 484468 (0MB)
113 12:54:26.166192 Using unxz to decompress xz
114 12:54:26.170343 progress 6% (0MB)
115 12:54:26.170775 progress 13% (0MB)
116 12:54:26.171014 progress 20% (0MB)
117 12:54:26.172552 progress 27% (0MB)
118 12:54:26.174796 progress 33% (0MB)
119 12:54:26.177136 progress 40% (0MB)
120 12:54:26.179764 progress 47% (0MB)
121 12:54:26.182046 progress 54% (0MB)
122 12:54:26.183991 progress 60% (0MB)
123 12:54:26.186077 progress 67% (0MB)
124 12:54:26.188324 progress 74% (0MB)
125 12:54:26.190703 progress 81% (0MB)
126 12:54:26.192692 progress 87% (0MB)
127 12:54:26.194842 progress 94% (0MB)
128 12:54:26.196752 progress 100% (0MB)
129 12:54:26.203251 0MB downloaded in 0.04s (12.45MB/s)
130 12:54:26.203519 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:54:26.203783 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:54:26.203881 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 12:54:26.203979 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 12:54:28.173329 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9879110/extract-nfsrootfs-tiy93161
136 12:54:28.173533 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:54:28.173631 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 12:54:28.173767 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j
139 12:54:28.173868 makedir: /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin
140 12:54:28.173953 makedir: /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/tests
141 12:54:28.174033 makedir: /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/results
142 12:54:28.174132 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-add-keys
143 12:54:28.174259 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-add-sources
144 12:54:28.174374 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-background-process-start
145 12:54:28.174484 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-background-process-stop
146 12:54:28.174593 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-common-functions
147 12:54:28.174699 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-echo-ipv4
148 12:54:28.174805 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-install-packages
149 12:54:28.174912 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-installed-packages
150 12:54:28.175018 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-os-build
151 12:54:28.175125 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-probe-channel
152 12:54:28.175231 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-probe-ip
153 12:54:28.175337 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-target-ip
154 12:54:28.175443 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-target-mac
155 12:54:28.175549 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-target-storage
156 12:54:28.175657 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-test-case
157 12:54:28.175766 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-test-event
158 12:54:28.175871 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-test-feedback
159 12:54:28.175977 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-test-raise
160 12:54:28.176082 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-test-reference
161 12:54:28.176192 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-test-runner
162 12:54:28.176298 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-test-set
163 12:54:28.176403 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-test-shell
164 12:54:28.176511 Updating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-add-keys (debian)
165 12:54:28.176626 Updating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-add-sources (debian)
166 12:54:28.176739 Updating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-install-packages (debian)
167 12:54:28.176848 Updating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-installed-packages (debian)
168 12:54:28.176956 Updating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/bin/lava-os-build (debian)
169 12:54:28.177050 Creating /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/environment
170 12:54:28.177135 LAVA metadata
171 12:54:28.177350 - LAVA_JOB_ID=9879110
172 12:54:28.177417 - LAVA_DISPATCHER_IP=192.168.201.1
173 12:54:28.177513 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
174 12:54:28.177578 skipped lava-vland-overlay
175 12:54:28.177652 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 12:54:28.177732 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
177 12:54:28.177793 skipped lava-multinode-overlay
178 12:54:28.177864 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 12:54:28.177940 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
180 12:54:28.178012 Loading test definitions
181 12:54:28.178100 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
182 12:54:28.178170 Using /lava-9879110 at stage 0
183 12:54:28.178394 uuid=9879110_1.5.2.3.1 testdef=None
184 12:54:28.178479 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 12:54:28.178562 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
186 12:54:28.178964 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 12:54:28.179179 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
189 12:54:28.179646 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 12:54:28.179877 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
192 12:54:28.180323 runner path: /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/0/tests/0_timesync-off test_uuid 9879110_1.5.2.3.1
193 12:54:28.180463 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 12:54:28.180686 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
196 12:54:28.180759 Using /lava-9879110 at stage 0
197 12:54:28.180855 Fetching tests from https://github.com/kernelci/test-definitions.git
198 12:54:28.180932 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/0/tests/1_kselftest-alsa'
199 12:54:33.872683 Running '/usr/bin/git checkout kernelci.org
200 12:54:34.016307 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
201 12:54:34.017017 uuid=9879110_1.5.2.3.5 testdef=None
202 12:54:34.017171 end: 1.5.2.3.5 git-repo-action (duration 00:00:06) [common]
204 12:54:34.017458 start: 1.5.2.3.6 test-overlay (timeout 00:09:44) [common]
205 12:54:34.018150 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 12:54:34.018385 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:44) [common]
208 12:54:34.019240 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 12:54:34.019474 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
211 12:54:34.020307 runner path: /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/0/tests/1_kselftest-alsa test_uuid 9879110_1.5.2.3.5
212 12:54:34.020399 BOARD='asus-cx9400-volteer'
213 12:54:34.020465 BRANCH='cip-gitlab'
214 12:54:34.020527 SKIPFILE='skipfile-lkft.yaml'
215 12:54:34.020584 SKIP_INSTALL='True'
216 12:54:34.020640 TESTPROG_URL='None'
217 12:54:34.020695 TST_CASENAME=''
218 12:54:34.020751 TST_CMDFILES='alsa'
219 12:54:34.020876 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 12:54:34.021079 Creating lava-test-runner.conf files
222 12:54:34.021142 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879110/lava-overlay-tdx46l4j/lava-9879110/0 for stage 0
223 12:54:34.021263 - 0_timesync-off
224 12:54:34.021332 - 1_kselftest-alsa
225 12:54:34.021424 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
226 12:54:34.021515 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
227 12:54:41.625733 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 12:54:41.625884 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
229 12:54:41.625992 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 12:54:41.626117 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
231 12:54:41.626224 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
232 12:54:41.763940 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 12:54:41.764320 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
234 12:54:41.764434 extracting modules file /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879110/extract-nfsrootfs-tiy93161
235 12:54:41.775448 extracting modules file /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879110/extract-overlay-ramdisk-yfwum_h2/ramdisk
236 12:54:41.786008 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 12:54:41.786159 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
238 12:54:41.786258 [common] Applying overlay to NFS
239 12:54:41.786332 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9879110/compress-overlay-mf10sb34/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9879110/extract-nfsrootfs-tiy93161
240 12:54:42.611210 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 12:54:42.611383 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
242 12:54:42.611480 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 12:54:42.611571 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
244 12:54:42.611656 Building ramdisk /var/lib/lava/dispatcher/tmp/9879110/extract-overlay-ramdisk-yfwum_h2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9879110/extract-overlay-ramdisk-yfwum_h2/ramdisk
245 12:54:42.674812 >> 34832 blocks
246 12:54:43.358545 rename /var/lib/lava/dispatcher/tmp/9879110/extract-overlay-ramdisk-yfwum_h2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/ramdisk/ramdisk.cpio.gz
247 12:54:43.358976 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 12:54:43.359102 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
249 12:54:43.359205 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
250 12:54:43.359322 No mkimage arch provided, not using FIT.
251 12:54:43.359456 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 12:54:43.359609 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 12:54:43.359721 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
254 12:54:43.359817 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
255 12:54:43.359907 No LXC device requested
256 12:54:43.359991 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 12:54:43.360085 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
258 12:54:43.360183 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 12:54:43.360258 Checking files for TFTP limit of 4294967296 bytes.
260 12:54:43.360682 end: 1 tftp-deploy (duration 00:00:26) [common]
261 12:54:43.360820 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 12:54:43.360946 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 12:54:43.361108 substitutions:
264 12:54:43.361255 - {DTB}: None
265 12:54:43.361350 - {INITRD}: 9879110/tftp-deploy-t_cxqma4/ramdisk/ramdisk.cpio.gz
266 12:54:43.361449 - {KERNEL}: 9879110/tftp-deploy-t_cxqma4/kernel/bzImage
267 12:54:43.361594 - {LAVA_MAC}: None
268 12:54:43.361692 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9879110/extract-nfsrootfs-tiy93161
269 12:54:43.361786 - {NFS_SERVER_IP}: 192.168.201.1
270 12:54:43.361874 - {PRESEED_CONFIG}: None
271 12:54:43.361962 - {PRESEED_LOCAL}: None
272 12:54:43.362049 - {RAMDISK}: 9879110/tftp-deploy-t_cxqma4/ramdisk/ramdisk.cpio.gz
273 12:54:43.362135 - {ROOT_PART}: None
274 12:54:43.362221 - {ROOT}: None
275 12:54:43.362306 - {SERVER_IP}: 192.168.201.1
276 12:54:43.362391 - {TEE}: None
277 12:54:43.362479 Parsed boot commands:
278 12:54:43.362564 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 12:54:43.362767 Parsed boot commands: tftpboot 192.168.201.1 9879110/tftp-deploy-t_cxqma4/kernel/bzImage 9879110/tftp-deploy-t_cxqma4/kernel/cmdline 9879110/tftp-deploy-t_cxqma4/ramdisk/ramdisk.cpio.gz
280 12:54:43.362884 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 12:54:43.362988 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 12:54:43.363085 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 12:54:43.363173 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 12:54:43.363243 Not connected, no need to disconnect.
285 12:54:43.363318 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 12:54:43.363397 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 12:54:43.363465 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
288 12:54:43.367183 Setting prompt string to ['lava-test: # ']
289 12:54:43.367590 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 12:54:43.367725 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 12:54:43.367828 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 12:54:43.367957 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 12:54:43.368325 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
294 12:54:48.520280 >> Command sent successfully.
295 12:54:48.523613 Returned 0 in 5 seconds
296 12:54:48.624442 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 12:54:48.624771 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 12:54:48.624877 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 12:54:48.624970 Setting prompt string to 'Starting depthcharge on Voema...'
301 12:54:48.625041 Changing prompt to 'Starting depthcharge on Voema...'
302 12:54:48.625115 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
303 12:54:48.625390 [Enter `^Ec?' for help]
304 12:54:50.226978
305 12:54:50.227174
306 12:54:50.236683 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
307 12:54:50.242891 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
308 12:54:50.245922 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
309 12:54:50.252600 CPU: AES supported, TXT NOT supported, VT supported
310 12:54:50.255936 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
311 12:54:50.262468 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
312 12:54:50.266177 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
313 12:54:50.269175 VBOOT: Loading verstage.
314 12:54:50.275987 FMAP: Found "FLASH" version 1.1 at 0x1804000.
315 12:54:50.279363 FMAP: base = 0x0 size = 0x2000000 #areas = 32
316 12:54:50.286063 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
317 12:54:50.291994 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
318 12:54:50.298972 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
319 12:54:50.302920
320 12:54:50.303009
321 12:54:50.312587 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
322 12:54:50.327289 Probing TPM: . done!
323 12:54:50.330356 TPM ready after 0 ms
324 12:54:50.334093 Connected to device vid:did:rid of 1ae0:0028:00
325 12:54:50.344975 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
326 12:54:50.351844 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
327 12:54:50.354845 Initialized TPM device CR50 revision 0
328 12:54:50.406599 tlcl_send_startup: Startup return code is 0
329 12:54:50.406755 TPM: setup succeeded
330 12:54:50.422530 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
331 12:54:50.436087 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
332 12:54:50.449480 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
333 12:54:50.459176 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
334 12:54:50.462724 Chrome EC: UHEPI supported
335 12:54:50.465809 Phase 1
336 12:54:50.469625 FMAP: area GBB found @ 1805000 (458752 bytes)
337 12:54:50.479348 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 12:54:50.485979 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 12:54:50.492532 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
340 12:54:50.498948 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
341 12:54:50.502822 Recovery requested (1009000e)
342 12:54:50.505858 TPM: Extending digest for VBOOT: boot mode into PCR 0
343 12:54:50.517606 tlcl_extend: response is 0
344 12:54:50.523901 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
345 12:54:50.534018 tlcl_extend: response is 0
346 12:54:50.540188 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
347 12:54:50.547152 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
348 12:54:50.553885 BS: verstage times (exec / console): total (unknown) / 142 ms
349 12:54:50.553970
350 12:54:50.554045
351 12:54:50.567203 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
352 12:54:50.573867 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
353 12:54:50.576972 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
354 12:54:50.580231 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
355 12:54:50.586578 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
356 12:54:50.590278 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
357 12:54:50.593283 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
358 12:54:50.596880 TCO_STS: 0000 0000
359 12:54:50.600019 GEN_PMCON: d0015038 00002200
360 12:54:50.603714 GBLRST_CAUSE: 00000000 00000000
361 12:54:50.606858 HPR_CAUSE0: 00000000
362 12:54:50.606952 prev_sleep_state 5
363 12:54:50.610180 Boot Count incremented to 19062
364 12:54:50.616988 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
365 12:54:50.623143 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
366 12:54:50.633519 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
367 12:54:50.639626 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
368 12:54:50.643320 Chrome EC: UHEPI supported
369 12:54:50.649394 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
370 12:54:50.660849 Probing TPM: done!
371 12:54:50.667527 Connected to device vid:did:rid of 1ae0:0028:00
372 12:54:50.678313 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
373 12:54:50.686575 Initialized TPM device CR50 revision 0
374 12:54:50.695981 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
375 12:54:50.702702 MRC: Hash idx 0x100b comparison successful.
376 12:54:50.705870 MRC cache found, size faa8
377 12:54:50.705958 bootmode is set to: 2
378 12:54:50.709085 SPD index = 0
379 12:54:50.716294 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
380 12:54:50.719399 SPD: module type is LPDDR4X
381 12:54:50.722531 SPD: module part number is MT53E512M64D4NW-046
382 12:54:50.729043 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
383 12:54:50.732808 SPD: device width 16 bits, bus width 16 bits
384 12:54:50.739028 SPD: module size is 1024 MB (per channel)
385 12:54:51.171005 CBMEM:
386 12:54:51.174106 IMD: root @ 0x76fff000 254 entries.
387 12:54:51.177131 IMD: root @ 0x76ffec00 62 entries.
388 12:54:51.180328 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
389 12:54:51.187019 FMAP: area RW_VPD found @ f35000 (8192 bytes)
390 12:54:51.190191 External stage cache:
391 12:54:51.193395 IMD: root @ 0x7b3ff000 254 entries.
392 12:54:51.196588 IMD: root @ 0x7b3fec00 62 entries.
393 12:54:51.212048 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
394 12:54:51.219128 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
395 12:54:51.225126 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
396 12:54:51.239277 MRC: 'RECOVERY_MRC_CACHE' does not need update.
397 12:54:51.245687 cse_lite: Skip switching to RW in the recovery path
398 12:54:51.245779 8 DIMMs found
399 12:54:51.249231 SMM Memory Map
400 12:54:51.252595 SMRAM : 0x7b000000 0x800000
401 12:54:51.256535 Subregion 0: 0x7b000000 0x200000
402 12:54:51.256617 Subregion 1: 0x7b200000 0x200000
403 12:54:51.259613 Subregion 2: 0x7b400000 0x400000
404 12:54:51.263486 top_of_ram = 0x77000000
405 12:54:51.270250 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
406 12:54:51.273476 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
407 12:54:51.280134 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
408 12:54:51.283566 MTRR Range: Start=ff000000 End=0 (Size 1000000)
409 12:54:51.293513 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
410 12:54:51.300189 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
411 12:54:51.310087 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
412 12:54:51.313460 Processing 211 relocs. Offset value of 0x74c0b000
413 12:54:51.322537 BS: romstage times (exec / console): total (unknown) / 277 ms
414 12:54:51.328382
415 12:54:51.328505
416 12:54:51.338588 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
417 12:54:51.341678 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
418 12:54:51.351722 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
419 12:54:51.358321 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
420 12:54:51.364621 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
421 12:54:51.371625 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
422 12:54:51.417988 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
423 12:54:51.424989 Processing 5008 relocs. Offset value of 0x75d98000
424 12:54:51.431906 BS: postcar times (exec / console): total (unknown) / 59 ms
425 12:54:51.432001
426 12:54:51.432071
427 12:54:51.441164 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
428 12:54:51.441281 Normal boot
429 12:54:51.444384 FW_CONFIG value is 0x804c02
430 12:54:51.448176 PCI: 00:07.0 disabled by fw_config
431 12:54:51.451234 PCI: 00:07.1 disabled by fw_config
432 12:54:51.455012 PCI: 00:0d.2 disabled by fw_config
433 12:54:51.461112 PCI: 00:1c.7 disabled by fw_config
434 12:54:51.464824 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
435 12:54:51.471254 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
436 12:54:51.474442 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
437 12:54:51.481404 GENERIC: 0.0 disabled by fw_config
438 12:54:51.484354 GENERIC: 1.0 disabled by fw_config
439 12:54:51.487847 fw_config match found: DB_USB=USB3_ACTIVE
440 12:54:51.491469 fw_config match found: DB_USB=USB3_ACTIVE
441 12:54:51.494423 fw_config match found: DB_USB=USB3_ACTIVE
442 12:54:51.501056 fw_config match found: DB_USB=USB3_ACTIVE
443 12:54:51.504635 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
444 12:54:51.510833 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
445 12:54:51.520919 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
446 12:54:51.527962 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
447 12:54:51.531165 microcode: sig=0x806c1 pf=0x80 revision=0x86
448 12:54:51.537589 microcode: Update skipped, already up-to-date
449 12:54:51.543823 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
450 12:54:51.572408 Detected 4 core, 8 thread CPU.
451 12:54:51.575530 Setting up SMI for CPU
452 12:54:51.578675 IED base = 0x7b400000
453 12:54:51.578793 IED size = 0x00400000
454 12:54:51.582350 Will perform SMM setup.
455 12:54:51.588480 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
456 12:54:51.595117 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
457 12:54:51.601838 Processing 16 relocs. Offset value of 0x00030000
458 12:54:51.604903 Attempting to start 7 APs
459 12:54:51.608532 Waiting for 10ms after sending INIT.
460 12:54:51.624319 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
461 12:54:51.627483 AP: slot 3 apic_id 2.
462 12:54:51.630938 AP: slot 7 apic_id 5.
463 12:54:51.631027 AP: slot 2 apic_id 7.
464 12:54:51.631116 done.
465 12:54:51.634110 AP: slot 6 apic_id 3.
466 12:54:51.637050 AP: slot 5 apic_id 6.
467 12:54:51.637159 AP: slot 4 apic_id 4.
468 12:54:51.643754 Waiting for 2nd SIPI to complete...done.
469 12:54:51.650959 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
470 12:54:51.657161 Processing 13 relocs. Offset value of 0x00038000
471 12:54:51.657260 Unable to locate Global NVS
472 12:54:51.667464 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
473 12:54:51.670510 Installing permanent SMM handler to 0x7b000000
474 12:54:51.680706 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
475 12:54:51.683803 Processing 794 relocs. Offset value of 0x7b010000
476 12:54:51.694021 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
477 12:54:51.697061 Processing 13 relocs. Offset value of 0x7b008000
478 12:54:51.703841 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
479 12:54:51.710733 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
480 12:54:51.713549 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
481 12:54:51.720266 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
482 12:54:51.727159 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
483 12:54:51.733672 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
484 12:54:51.740196 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
485 12:54:51.740312 Unable to locate Global NVS
486 12:54:51.750359 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
487 12:54:51.753444 Clearing SMI status registers
488 12:54:51.753530 SMI_STS: PM1
489 12:54:51.756489 PM1_STS: PWRBTN
490 12:54:51.763420 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
491 12:54:51.766627 In relocation handler: CPU 0
492 12:54:51.769794 New SMBASE=0x7b000000 IEDBASE=0x7b400000
493 12:54:51.776291 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 12:54:51.776376 Relocation complete.
495 12:54:51.786462 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
496 12:54:51.789566 In relocation handler: CPU 1
497 12:54:51.793243 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
498 12:54:51.793328 Relocation complete.
499 12:54:51.802871 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
500 12:54:51.806422 In relocation handler: CPU 7
501 12:54:51.809363 New SMBASE=0x7affe400 IEDBASE=0x7b400000
502 12:54:51.809476 Relocation complete.
503 12:54:51.819415 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
504 12:54:51.819507 In relocation handler: CPU 4
505 12:54:51.825966 New SMBASE=0x7afff000 IEDBASE=0x7b400000
506 12:54:51.829618 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 12:54:51.832751 Relocation complete.
508 12:54:51.839777 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
509 12:54:51.842798 In relocation handler: CPU 5
510 12:54:51.846141 New SMBASE=0x7affec00 IEDBASE=0x7b400000
511 12:54:51.852753 Writing SMRR. base = 0x7b000006, mask=0xff800c00
512 12:54:51.852836 Relocation complete.
513 12:54:51.862346 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
514 12:54:51.862461 In relocation handler: CPU 2
515 12:54:51.869258 New SMBASE=0x7afff800 IEDBASE=0x7b400000
516 12:54:51.869342 Relocation complete.
517 12:54:51.875595 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
518 12:54:51.878836 In relocation handler: CPU 6
519 12:54:51.885840 New SMBASE=0x7affe800 IEDBASE=0x7b400000
520 12:54:51.885956 Relocation complete.
521 12:54:51.892022 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
522 12:54:51.895590 In relocation handler: CPU 3
523 12:54:51.902382 New SMBASE=0x7afff400 IEDBASE=0x7b400000
524 12:54:51.905374 Writing SMRR. base = 0x7b000006, mask=0xff800c00
525 12:54:51.909033 Relocation complete.
526 12:54:51.909143 Initializing CPU #0
527 12:54:51.912157 CPU: vendor Intel device 806c1
528 12:54:51.918945 CPU: family 06, model 8c, stepping 01
529 12:54:51.919064 Clearing out pending MCEs
530 12:54:51.922024 Setting up local APIC...
531 12:54:51.925493 apic_id: 0x00 done.
532 12:54:51.929065 Turbo is available but hidden
533 12:54:51.932954 Turbo is available and visible
534 12:54:51.936305 microcode: Update skipped, already up-to-date
535 12:54:51.936410 CPU #0 initialized
536 12:54:51.939593 Initializing CPU #7
537 12:54:51.942626 Initializing CPU #4
538 12:54:51.945851 CPU: vendor Intel device 806c1
539 12:54:51.949020 CPU: family 06, model 8c, stepping 01
540 12:54:51.952746 CPU: vendor Intel device 806c1
541 12:54:51.955729 CPU: family 06, model 8c, stepping 01
542 12:54:51.959477 Clearing out pending MCEs
543 12:54:51.959589 Initializing CPU #3
544 12:54:51.962883 Initializing CPU #6
545 12:54:51.965787 CPU: vendor Intel device 806c1
546 12:54:51.969158 CPU: family 06, model 8c, stepping 01
547 12:54:51.972244 CPU: vendor Intel device 806c1
548 12:54:51.975980 CPU: family 06, model 8c, stepping 01
549 12:54:51.979199 Clearing out pending MCEs
550 12:54:51.982466 Clearing out pending MCEs
551 12:54:51.982579 Setting up local APIC...
552 12:54:51.986091 Clearing out pending MCEs
553 12:54:51.988956 Setting up local APIC...
554 12:54:51.992380 Setting up local APIC...
555 12:54:51.992491 apic_id: 0x05 done.
556 12:54:51.995688 apic_id: 0x02 done.
557 12:54:51.999195 apic_id: 0x03 done.
558 12:54:52.002368 microcode: Update skipped, already up-to-date
559 12:54:52.005791 microcode: Update skipped, already up-to-date
560 12:54:52.009654 CPU #3 initialized
561 12:54:52.012319 CPU #6 initialized
562 12:54:52.012428 Initializing CPU #5
563 12:54:52.015913 Initializing CPU #2
564 12:54:52.018849 CPU: vendor Intel device 806c1
565 12:54:52.022367 CPU: family 06, model 8c, stepping 01
566 12:54:52.025917 CPU: vendor Intel device 806c1
567 12:54:52.028750 CPU: family 06, model 8c, stepping 01
568 12:54:52.032187 Clearing out pending MCEs
569 12:54:52.035499 Clearing out pending MCEs
570 12:54:52.035609 Setting up local APIC...
571 12:54:52.038996 Setting up local APIC...
572 12:54:52.045478 microcode: Update skipped, already up-to-date
573 12:54:52.045579 apic_id: 0x04 done.
574 12:54:52.049124 CPU #7 initialized
575 12:54:52.052551 microcode: Update skipped, already up-to-date
576 12:54:52.055310 Initializing CPU #1
577 12:54:52.058978 Setting up local APIC...
578 12:54:52.059086 CPU #4 initialized
579 12:54:52.062112 apic_id: 0x06 done.
580 12:54:52.062219 apic_id: 0x07 done.
581 12:54:52.068598 microcode: Update skipped, already up-to-date
582 12:54:52.072446 CPU: vendor Intel device 806c1
583 12:54:52.075416 CPU: family 06, model 8c, stepping 01
584 12:54:52.078660 Clearing out pending MCEs
585 12:54:52.081812 microcode: Update skipped, already up-to-date
586 12:54:52.085037 CPU #5 initialized
587 12:54:52.085152 CPU #2 initialized
588 12:54:52.088459 Setting up local APIC...
589 12:54:52.091716 apic_id: 0x01 done.
590 12:54:52.094922 microcode: Update skipped, already up-to-date
591 12:54:52.098735 CPU #1 initialized
592 12:54:52.101727 bsp_do_flight_plan done after 455 msecs.
593 12:54:52.105077 CPU: frequency set to 4000 MHz
594 12:54:52.108139 Enabling SMIs.
595 12:54:52.111594 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
596 12:54:52.128938 SATAXPCIE1 indicates PCIe NVMe is present
597 12:54:52.132405 Probing TPM: done!
598 12:54:52.135972 Connected to device vid:did:rid of 1ae0:0028:00
599 12:54:52.146446 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
600 12:54:52.149676 Initialized TPM device CR50 revision 0
601 12:54:52.152920 Enabling S0i3.4
602 12:54:52.159302 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
603 12:54:52.162981 Found a VBT of 8704 bytes after decompression
604 12:54:52.169158 cse_lite: CSE RO boot. HybridStorageMode disabled
605 12:54:52.176193 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
606 12:54:52.251742 FSPS returned 0
607 12:54:52.255572 Executing Phase 1 of FspMultiPhaseSiInit
608 12:54:52.264980 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
609 12:54:52.268604 port C0 DISC req: usage 1 usb3 1 usb2 5
610 12:54:52.271837 Raw Buffer output 0 00000511
611 12:54:52.274974 Raw Buffer output 1 00000000
612 12:54:52.278869 pmc_send_ipc_cmd succeeded
613 12:54:52.285893 port C1 DISC req: usage 1 usb3 2 usb2 3
614 12:54:52.285989 Raw Buffer output 0 00000321
615 12:54:52.289082 Raw Buffer output 1 00000000
616 12:54:52.292791 pmc_send_ipc_cmd succeeded
617 12:54:52.298660 Detected 4 core, 8 thread CPU.
618 12:54:52.301775 Detected 4 core, 8 thread CPU.
619 12:54:52.535786 Display FSP Version Info HOB
620 12:54:52.538637 Reference Code - CPU = a.0.4c.31
621 12:54:52.542558 uCode Version = 0.0.0.86
622 12:54:52.545314 TXT ACM version = ff.ff.ff.ffff
623 12:54:52.548783 Reference Code - ME = a.0.4c.31
624 12:54:52.552005 MEBx version = 0.0.0.0
625 12:54:52.555461 ME Firmware Version = Consumer SKU
626 12:54:52.558644 Reference Code - PCH = a.0.4c.31
627 12:54:52.561801 PCH-CRID Status = Disabled
628 12:54:52.565136 PCH-CRID Original Value = ff.ff.ff.ffff
629 12:54:52.568670 PCH-CRID New Value = ff.ff.ff.ffff
630 12:54:52.571735 OPROM - RST - RAID = ff.ff.ff.ffff
631 12:54:52.575715 PCH Hsio Version = 4.0.0.0
632 12:54:52.578886 Reference Code - SA - System Agent = a.0.4c.31
633 12:54:52.581868 Reference Code - MRC = 2.0.0.1
634 12:54:52.585799 SA - PCIe Version = a.0.4c.31
635 12:54:52.588338 SA-CRID Status = Disabled
636 12:54:52.591679 SA-CRID Original Value = 0.0.0.1
637 12:54:52.595603 SA-CRID New Value = 0.0.0.1
638 12:54:52.598746 OPROM - VBIOS = ff.ff.ff.ffff
639 12:54:52.601756 IO Manageability Engine FW Version = 11.1.4.0
640 12:54:52.604970 PHY Build Version = 0.0.0.e0
641 12:54:52.608429 Thunderbolt(TM) FW Version = 0.0.0.0
642 12:54:52.615315 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
643 12:54:52.618427 ITSS IRQ Polarities Before:
644 12:54:52.618519 IPC0: 0xffffffff
645 12:54:52.621623 IPC1: 0xffffffff
646 12:54:52.621704 IPC2: 0xffffffff
647 12:54:52.625058 IPC3: 0xffffffff
648 12:54:52.628046 ITSS IRQ Polarities After:
649 12:54:52.628128 IPC0: 0xffffffff
650 12:54:52.631690 IPC1: 0xffffffff
651 12:54:52.631773 IPC2: 0xffffffff
652 12:54:52.635006 IPC3: 0xffffffff
653 12:54:52.638004 Found PCIe Root Port #9 at PCI: 00:1d.0.
654 12:54:52.651695 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
655 12:54:52.661596 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
656 12:54:52.674331 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
657 12:54:52.681293 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
658 12:54:52.684283 Enumerating buses...
659 12:54:52.687968 Show all devs... Before device enumeration.
660 12:54:52.691032 Root Device: enabled 1
661 12:54:52.691114 DOMAIN: 0000: enabled 1
662 12:54:52.694438 CPU_CLUSTER: 0: enabled 1
663 12:54:52.698340 PCI: 00:00.0: enabled 1
664 12:54:52.701381 PCI: 00:02.0: enabled 1
665 12:54:52.701461 PCI: 00:04.0: enabled 1
666 12:54:52.704465 PCI: 00:05.0: enabled 1
667 12:54:52.707609 PCI: 00:06.0: enabled 0
668 12:54:52.710862 PCI: 00:07.0: enabled 0
669 12:54:52.710942 PCI: 00:07.1: enabled 0
670 12:54:52.714707 PCI: 00:07.2: enabled 0
671 12:54:52.717800 PCI: 00:07.3: enabled 0
672 12:54:52.721251 PCI: 00:08.0: enabled 1
673 12:54:52.721335 PCI: 00:09.0: enabled 0
674 12:54:52.724423 PCI: 00:0a.0: enabled 0
675 12:54:52.727561 PCI: 00:0d.0: enabled 1
676 12:54:52.727647 PCI: 00:0d.1: enabled 0
677 12:54:52.731374 PCI: 00:0d.2: enabled 0
678 12:54:52.734608 PCI: 00:0d.3: enabled 0
679 12:54:52.737680 PCI: 00:0e.0: enabled 0
680 12:54:52.737759 PCI: 00:10.2: enabled 1
681 12:54:52.740808 PCI: 00:10.6: enabled 0
682 12:54:52.744431 PCI: 00:10.7: enabled 0
683 12:54:52.747434 PCI: 00:12.0: enabled 0
684 12:54:52.747515 PCI: 00:12.6: enabled 0
685 12:54:52.751104 PCI: 00:13.0: enabled 0
686 12:54:52.754741 PCI: 00:14.0: enabled 1
687 12:54:52.757771 PCI: 00:14.1: enabled 0
688 12:54:52.757859 PCI: 00:14.2: enabled 1
689 12:54:52.760740 PCI: 00:14.3: enabled 1
690 12:54:52.764387 PCI: 00:15.0: enabled 1
691 12:54:52.764474 PCI: 00:15.1: enabled 1
692 12:54:52.767316 PCI: 00:15.2: enabled 1
693 12:54:52.770872 PCI: 00:15.3: enabled 1
694 12:54:52.774401 PCI: 00:16.0: enabled 1
695 12:54:52.774488 PCI: 00:16.1: enabled 0
696 12:54:52.777545 PCI: 00:16.2: enabled 0
697 12:54:52.781016 PCI: 00:16.3: enabled 0
698 12:54:52.784094 PCI: 00:16.4: enabled 0
699 12:54:52.784183 PCI: 00:16.5: enabled 0
700 12:54:52.787276 PCI: 00:17.0: enabled 1
701 12:54:52.790837 PCI: 00:19.0: enabled 0
702 12:54:52.793998 PCI: 00:19.1: enabled 1
703 12:54:52.794084 PCI: 00:19.2: enabled 0
704 12:54:52.797701 PCI: 00:1c.0: enabled 1
705 12:54:52.800918 PCI: 00:1c.1: enabled 0
706 12:54:52.804065 PCI: 00:1c.2: enabled 0
707 12:54:52.804154 PCI: 00:1c.3: enabled 0
708 12:54:52.807893 PCI: 00:1c.4: enabled 0
709 12:54:52.811019 PCI: 00:1c.5: enabled 0
710 12:54:52.811109 PCI: 00:1c.6: enabled 1
711 12:54:52.814158 PCI: 00:1c.7: enabled 0
712 12:54:52.817573 PCI: 00:1d.0: enabled 1
713 12:54:52.820693 PCI: 00:1d.1: enabled 0
714 12:54:52.820781 PCI: 00:1d.2: enabled 1
715 12:54:52.824514 PCI: 00:1d.3: enabled 0
716 12:54:52.827595 PCI: 00:1e.0: enabled 1
717 12:54:52.830715 PCI: 00:1e.1: enabled 0
718 12:54:52.830843 PCI: 00:1e.2: enabled 1
719 12:54:52.833899 PCI: 00:1e.3: enabled 1
720 12:54:52.837125 PCI: 00:1f.0: enabled 1
721 12:54:52.840579 PCI: 00:1f.1: enabled 0
722 12:54:52.840662 PCI: 00:1f.2: enabled 1
723 12:54:52.844295 PCI: 00:1f.3: enabled 1
724 12:54:52.847366 PCI: 00:1f.4: enabled 0
725 12:54:52.847455 PCI: 00:1f.5: enabled 1
726 12:54:52.850938 PCI: 00:1f.6: enabled 0
727 12:54:52.853810 PCI: 00:1f.7: enabled 0
728 12:54:52.857412 APIC: 00: enabled 1
729 12:54:52.857499 GENERIC: 0.0: enabled 1
730 12:54:52.860405 GENERIC: 0.0: enabled 1
731 12:54:52.864074 GENERIC: 1.0: enabled 1
732 12:54:52.867035 GENERIC: 0.0: enabled 1
733 12:54:52.867123 GENERIC: 1.0: enabled 1
734 12:54:52.870630 USB0 port 0: enabled 1
735 12:54:52.873585 GENERIC: 0.0: enabled 1
736 12:54:52.873672 USB0 port 0: enabled 1
737 12:54:52.877158 GENERIC: 0.0: enabled 1
738 12:54:52.880227 I2C: 00:1a: enabled 1
739 12:54:52.883840 I2C: 00:31: enabled 1
740 12:54:52.883967 I2C: 00:32: enabled 1
741 12:54:52.886672 I2C: 00:10: enabled 1
742 12:54:52.890399 I2C: 00:15: enabled 1
743 12:54:52.890509 GENERIC: 0.0: enabled 0
744 12:54:52.893583 GENERIC: 1.0: enabled 0
745 12:54:52.896574 GENERIC: 0.0: enabled 1
746 12:54:52.896674 SPI: 00: enabled 1
747 12:54:52.900315 SPI: 00: enabled 1
748 12:54:52.903654 PNP: 0c09.0: enabled 1
749 12:54:52.903740 GENERIC: 0.0: enabled 1
750 12:54:52.906627 USB3 port 0: enabled 1
751 12:54:52.909965 USB3 port 1: enabled 1
752 12:54:52.913711 USB3 port 2: enabled 0
753 12:54:52.913799 USB3 port 3: enabled 0
754 12:54:52.916856 USB2 port 0: enabled 0
755 12:54:52.919858 USB2 port 1: enabled 1
756 12:54:52.919945 USB2 port 2: enabled 1
757 12:54:52.923672 USB2 port 3: enabled 0
758 12:54:52.926633 USB2 port 4: enabled 1
759 12:54:52.926721 USB2 port 5: enabled 0
760 12:54:52.929731 USB2 port 6: enabled 0
761 12:54:52.933600 USB2 port 7: enabled 0
762 12:54:52.936705 USB2 port 8: enabled 0
763 12:54:52.936792 USB2 port 9: enabled 0
764 12:54:52.939924 USB3 port 0: enabled 0
765 12:54:52.942998 USB3 port 1: enabled 1
766 12:54:52.943088 USB3 port 2: enabled 0
767 12:54:52.946289 USB3 port 3: enabled 0
768 12:54:52.949848 GENERIC: 0.0: enabled 1
769 12:54:52.953096 GENERIC: 1.0: enabled 1
770 12:54:52.953190 APIC: 01: enabled 1
771 12:54:52.956813 APIC: 07: enabled 1
772 12:54:52.956901 APIC: 02: enabled 1
773 12:54:52.959688 APIC: 04: enabled 1
774 12:54:52.963280 APIC: 06: enabled 1
775 12:54:52.963367 APIC: 03: enabled 1
776 12:54:52.966367 APIC: 05: enabled 1
777 12:54:52.969422 Compare with tree...
778 12:54:52.969510 Root Device: enabled 1
779 12:54:52.972959 DOMAIN: 0000: enabled 1
780 12:54:52.976431 PCI: 00:00.0: enabled 1
781 12:54:52.979486 PCI: 00:02.0: enabled 1
782 12:54:52.982963 PCI: 00:04.0: enabled 1
783 12:54:52.983073 GENERIC: 0.0: enabled 1
784 12:54:52.986118 PCI: 00:05.0: enabled 1
785 12:54:52.989773 PCI: 00:06.0: enabled 0
786 12:54:52.992639 PCI: 00:07.0: enabled 0
787 12:54:52.996286 GENERIC: 0.0: enabled 1
788 12:54:52.996406 PCI: 00:07.1: enabled 0
789 12:54:52.999588 GENERIC: 1.0: enabled 1
790 12:54:53.002702 PCI: 00:07.2: enabled 0
791 12:54:53.005704 GENERIC: 0.0: enabled 1
792 12:54:53.009608 PCI: 00:07.3: enabled 0
793 12:54:53.009721 GENERIC: 1.0: enabled 1
794 12:54:53.012793 PCI: 00:08.0: enabled 1
795 12:54:53.016043 PCI: 00:09.0: enabled 0
796 12:54:53.019164 PCI: 00:0a.0: enabled 0
797 12:54:53.022379 PCI: 00:0d.0: enabled 1
798 12:54:53.022458 USB0 port 0: enabled 1
799 12:54:53.025659 USB3 port 0: enabled 1
800 12:54:53.029158 USB3 port 1: enabled 1
801 12:54:53.032485 USB3 port 2: enabled 0
802 12:54:53.035610 USB3 port 3: enabled 0
803 12:54:53.038850 PCI: 00:0d.1: enabled 0
804 12:54:53.038926 PCI: 00:0d.2: enabled 0
805 12:54:53.042587 GENERIC: 0.0: enabled 1
806 12:54:53.045715 PCI: 00:0d.3: enabled 0
807 12:54:53.048953 PCI: 00:0e.0: enabled 0
808 12:54:53.052134 PCI: 00:10.2: enabled 1
809 12:54:53.052235 PCI: 00:10.6: enabled 0
810 12:54:53.056034 PCI: 00:10.7: enabled 0
811 12:54:53.059008 PCI: 00:12.0: enabled 0
812 12:54:53.062081 PCI: 00:12.6: enabled 0
813 12:54:53.065641 PCI: 00:13.0: enabled 0
814 12:54:53.065721 PCI: 00:14.0: enabled 1
815 12:54:53.068558 USB0 port 0: enabled 1
816 12:54:53.072108 USB2 port 0: enabled 0
817 12:54:53.075178 USB2 port 1: enabled 1
818 12:54:53.078694 USB2 port 2: enabled 1
819 12:54:53.078775 USB2 port 3: enabled 0
820 12:54:53.081967 USB2 port 4: enabled 1
821 12:54:53.085627 USB2 port 5: enabled 0
822 12:54:53.088631 USB2 port 6: enabled 0
823 12:54:53.092069 USB2 port 7: enabled 0
824 12:54:53.095571 USB2 port 8: enabled 0
825 12:54:53.095660 USB2 port 9: enabled 0
826 12:54:53.098771 USB3 port 0: enabled 0
827 12:54:53.101746 USB3 port 1: enabled 1
828 12:54:53.105298 USB3 port 2: enabled 0
829 12:54:53.108552 USB3 port 3: enabled 0
830 12:54:53.111690 PCI: 00:14.1: enabled 0
831 12:54:53.111809 PCI: 00:14.2: enabled 1
832 12:54:53.115372 PCI: 00:14.3: enabled 1
833 12:54:53.118510 GENERIC: 0.0: enabled 1
834 12:54:53.121663 PCI: 00:15.0: enabled 1
835 12:54:53.125345 I2C: 00:1a: enabled 1
836 12:54:53.125421 I2C: 00:31: enabled 1
837 12:54:53.128581 I2C: 00:32: enabled 1
838 12:54:53.131280 PCI: 00:15.1: enabled 1
839 12:54:53.135086 I2C: 00:10: enabled 1
840 12:54:53.135160 PCI: 00:15.2: enabled 1
841 12:54:53.138171 PCI: 00:15.3: enabled 1
842 12:54:53.141456 PCI: 00:16.0: enabled 1
843 12:54:53.144707 PCI: 00:16.1: enabled 0
844 12:54:53.147928 PCI: 00:16.2: enabled 0
845 12:54:53.148031 PCI: 00:16.3: enabled 0
846 12:54:53.151480 PCI: 00:16.4: enabled 0
847 12:54:53.154882 PCI: 00:16.5: enabled 0
848 12:54:53.158110 PCI: 00:17.0: enabled 1
849 12:54:53.161216 PCI: 00:19.0: enabled 0
850 12:54:53.161293 PCI: 00:19.1: enabled 1
851 12:54:53.164994 I2C: 00:15: enabled 1
852 12:54:53.167778 PCI: 00:19.2: enabled 0
853 12:54:53.170877 PCI: 00:1d.0: enabled 1
854 12:54:53.174533 GENERIC: 0.0: enabled 1
855 12:54:53.174617 PCI: 00:1e.0: enabled 1
856 12:54:53.224634 PCI: 00:1e.1: enabled 0
857 12:54:53.224763 PCI: 00:1e.2: enabled 1
858 12:54:53.224834 SPI: 00: enabled 1
859 12:54:53.224899 PCI: 00:1e.3: enabled 1
860 12:54:53.224961 SPI: 00: enabled 1
861 12:54:53.225221 PCI: 00:1f.0: enabled 1
862 12:54:53.225289 PNP: 0c09.0: enabled 1
863 12:54:53.225351 PCI: 00:1f.1: enabled 0
864 12:54:53.225410 PCI: 00:1f.2: enabled 1
865 12:54:53.225469 GENERIC: 0.0: enabled 1
866 12:54:53.225527 GENERIC: 0.0: enabled 1
867 12:54:53.225585 GENERIC: 1.0: enabled 1
868 12:54:53.225657 PCI: 00:1f.3: enabled 1
869 12:54:53.225716 PCI: 00:1f.4: enabled 0
870 12:54:53.225773 PCI: 00:1f.5: enabled 1
871 12:54:53.225830 PCI: 00:1f.6: enabled 0
872 12:54:53.225885 PCI: 00:1f.7: enabled 0
873 12:54:53.225941 CPU_CLUSTER: 0: enabled 1
874 12:54:53.225996 APIC: 00: enabled 1
875 12:54:53.276486 APIC: 01: enabled 1
876 12:54:53.276592 APIC: 07: enabled 1
877 12:54:53.276662 APIC: 02: enabled 1
878 12:54:53.276935 APIC: 04: enabled 1
879 12:54:53.277035 APIC: 06: enabled 1
880 12:54:53.277146 APIC: 03: enabled 1
881 12:54:53.277247 APIC: 05: enabled 1
882 12:54:53.277312 Root Device scanning...
883 12:54:53.277412 scan_static_bus for Root Device
884 12:54:53.277502 DOMAIN: 0000 enabled
885 12:54:53.277604 CPU_CLUSTER: 0 enabled
886 12:54:53.277694 DOMAIN: 0000 scanning...
887 12:54:53.277784 PCI: pci_scan_bus for bus 00
888 12:54:53.277884 PCI: 00:00.0 [8086/0000] ops
889 12:54:53.277984 PCI: 00:00.0 [8086/9a12] enabled
890 12:54:53.278089 PCI: 00:02.0 [8086/0000] bus ops
891 12:54:53.278198 PCI: 00:02.0 [8086/9a40] enabled
892 12:54:53.278305 PCI: 00:04.0 [8086/0000] bus ops
893 12:54:53.326818 PCI: 00:04.0 [8086/9a03] enabled
894 12:54:53.326977 PCI: 00:05.0 [8086/9a19] enabled
895 12:54:53.327267 PCI: 00:07.0 [0000/0000] hidden
896 12:54:53.327366 PCI: 00:08.0 [8086/9a11] enabled
897 12:54:53.327462 PCI: 00:0a.0 [8086/9a0d] disabled
898 12:54:53.327553 PCI: 00:0d.0 [8086/0000] bus ops
899 12:54:53.327642 PCI: 00:0d.0 [8086/9a13] enabled
900 12:54:53.327730 PCI: 00:14.0 [8086/0000] bus ops
901 12:54:53.327822 PCI: 00:14.0 [8086/a0ed] enabled
902 12:54:53.327914 PCI: 00:14.2 [8086/a0ef] enabled
903 12:54:53.328016 PCI: 00:14.3 [8086/0000] bus ops
904 12:54:53.328104 PCI: 00:14.3 [8086/a0f0] enabled
905 12:54:53.328191 PCI: 00:15.0 [8086/0000] bus ops
906 12:54:53.328277 PCI: 00:15.0 [8086/a0e8] enabled
907 12:54:53.328363 PCI: 00:15.1 [8086/0000] bus ops
908 12:54:53.328448 PCI: 00:15.1 [8086/a0e9] enabled
909 12:54:53.332739 PCI: 00:15.2 [8086/0000] bus ops
910 12:54:53.335701 PCI: 00:15.2 [8086/a0ea] enabled
911 12:54:53.339066 PCI: 00:15.3 [8086/0000] bus ops
912 12:54:53.342295 PCI: 00:15.3 [8086/a0eb] enabled
913 12:54:53.345494 PCI: 00:16.0 [8086/0000] ops
914 12:54:53.349445 PCI: 00:16.0 [8086/a0e0] enabled
915 12:54:53.352079 PCI: Static device PCI: 00:17.0 not found, disabling it.
916 12:54:53.355691 PCI: 00:19.0 [8086/0000] bus ops
917 12:54:53.358940 PCI: 00:19.0 [8086/a0c5] disabled
918 12:54:53.362000 PCI: 00:19.1 [8086/0000] bus ops
919 12:54:53.365135 PCI: 00:19.1 [8086/a0c6] enabled
920 12:54:53.369111 PCI: 00:1d.0 [8086/0000] bus ops
921 12:54:53.372103 PCI: 00:1d.0 [8086/a0b0] enabled
922 12:54:53.375405 PCI: 00:1e.0 [8086/0000] ops
923 12:54:53.378524 PCI: 00:1e.0 [8086/a0a8] enabled
924 12:54:53.382206 PCI: 00:1e.2 [8086/0000] bus ops
925 12:54:53.385346 PCI: 00:1e.2 [8086/a0aa] enabled
926 12:54:53.388757 PCI: 00:1e.3 [8086/0000] bus ops
927 12:54:53.391719 PCI: 00:1e.3 [8086/a0ab] enabled
928 12:54:53.395449 PCI: 00:1f.0 [8086/0000] bus ops
929 12:54:53.398513 PCI: 00:1f.0 [8086/a087] enabled
930 12:54:53.401976 RTC Init
931 12:54:53.404864 Set power on after power failure.
932 12:54:53.404966 Disabling Deep S3
933 12:54:53.408409 Disabling Deep S3
934 12:54:53.411748 Disabling Deep S4
935 12:54:53.411855 Disabling Deep S4
936 12:54:53.414786 Disabling Deep S5
937 12:54:53.414898 Disabling Deep S5
938 12:54:53.418180 PCI: 00:1f.2 [0000/0000] hidden
939 12:54:53.421733 PCI: 00:1f.3 [8086/0000] bus ops
940 12:54:53.424813 PCI: 00:1f.3 [8086/a0c8] enabled
941 12:54:53.427871 PCI: 00:1f.5 [8086/0000] bus ops
942 12:54:53.431718 PCI: 00:1f.5 [8086/a0a4] enabled
943 12:54:53.434745 PCI: Leftover static devices:
944 12:54:53.438183 PCI: 00:10.2
945 12:54:53.438269 PCI: 00:10.6
946 12:54:53.441108 PCI: 00:10.7
947 12:54:53.441215 PCI: 00:06.0
948 12:54:53.441282 PCI: 00:07.1
949 12:54:53.444307 PCI: 00:07.2
950 12:54:53.444409 PCI: 00:07.3
951 12:54:53.448003 PCI: 00:09.0
952 12:54:53.448115 PCI: 00:0d.1
953 12:54:53.448209 PCI: 00:0d.2
954 12:54:53.451429 PCI: 00:0d.3
955 12:54:53.451502 PCI: 00:0e.0
956 12:54:53.454573 PCI: 00:12.0
957 12:54:53.454657 PCI: 00:12.6
958 12:54:53.457656 PCI: 00:13.0
959 12:54:53.457740 PCI: 00:14.1
960 12:54:53.457807 PCI: 00:16.1
961 12:54:53.461523 PCI: 00:16.2
962 12:54:53.461607 PCI: 00:16.3
963 12:54:53.464422 PCI: 00:16.4
964 12:54:53.464520 PCI: 00:16.5
965 12:54:53.464587 PCI: 00:17.0
966 12:54:53.467472 PCI: 00:19.2
967 12:54:53.467547 PCI: 00:1e.1
968 12:54:53.470741 PCI: 00:1f.1
969 12:54:53.470817 PCI: 00:1f.4
970 12:54:53.474504 PCI: 00:1f.6
971 12:54:53.474590 PCI: 00:1f.7
972 12:54:53.477545 PCI: Check your devicetree.cb.
973 12:54:53.481102 PCI: 00:02.0 scanning...
974 12:54:53.484251 scan_generic_bus for PCI: 00:02.0
975 12:54:53.487538 scan_generic_bus for PCI: 00:02.0 done
976 12:54:53.490988 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
977 12:54:53.494337 PCI: 00:04.0 scanning...
978 12:54:53.497096 scan_generic_bus for PCI: 00:04.0
979 12:54:53.500825 GENERIC: 0.0 enabled
980 12:54:53.507035 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
981 12:54:53.510492 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
982 12:54:53.513978 PCI: 00:0d.0 scanning...
983 12:54:53.516970 scan_static_bus for PCI: 00:0d.0
984 12:54:53.520612 USB0 port 0 enabled
985 12:54:53.520690 USB0 port 0 scanning...
986 12:54:53.523723 scan_static_bus for USB0 port 0
987 12:54:53.526679 USB3 port 0 enabled
988 12:54:53.530351 USB3 port 1 enabled
989 12:54:53.530440 USB3 port 2 disabled
990 12:54:53.533147 USB3 port 3 disabled
991 12:54:53.537087 USB3 port 0 scanning...
992 12:54:53.540047 scan_static_bus for USB3 port 0
993 12:54:53.543582 scan_static_bus for USB3 port 0 done
994 12:54:53.546458 scan_bus: bus USB3 port 0 finished in 6 msecs
995 12:54:53.550558 USB3 port 1 scanning...
996 12:54:53.553405 scan_static_bus for USB3 port 1
997 12:54:53.556585 scan_static_bus for USB3 port 1 done
998 12:54:53.562931 scan_bus: bus USB3 port 1 finished in 6 msecs
999 12:54:53.566293 scan_static_bus for USB0 port 0 done
1000 12:54:53.570002 scan_bus: bus USB0 port 0 finished in 43 msecs
1001 12:54:53.573104 scan_static_bus for PCI: 00:0d.0 done
1002 12:54:53.579528 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
1003 12:54:53.582838 PCI: 00:14.0 scanning...
1004 12:54:53.585917 scan_static_bus for PCI: 00:14.0
1005 12:54:53.586002 USB0 port 0 enabled
1006 12:54:53.589658 USB0 port 0 scanning...
1007 12:54:53.592676 scan_static_bus for USB0 port 0
1008 12:54:53.595859 USB2 port 0 disabled
1009 12:54:53.595939 USB2 port 1 enabled
1010 12:54:53.599478 USB2 port 2 enabled
1011 12:54:53.602431 USB2 port 3 disabled
1012 12:54:53.602513 USB2 port 4 enabled
1013 12:54:53.606030 USB2 port 5 disabled
1014 12:54:53.609106 USB2 port 6 disabled
1015 12:54:53.609198 USB2 port 7 disabled
1016 12:54:53.612863 USB2 port 8 disabled
1017 12:54:53.616080 USB2 port 9 disabled
1018 12:54:53.616190 USB3 port 0 disabled
1019 12:54:53.619095 USB3 port 1 enabled
1020 12:54:53.619200 USB3 port 2 disabled
1021 12:54:53.622392 USB3 port 3 disabled
1022 12:54:53.625998 USB2 port 1 scanning...
1023 12:54:53.629033 scan_static_bus for USB2 port 1
1024 12:54:53.632028 scan_static_bus for USB2 port 1 done
1025 12:54:53.635628 scan_bus: bus USB2 port 1 finished in 6 msecs
1026 12:54:53.638807 USB2 port 2 scanning...
1027 12:54:53.642272 scan_static_bus for USB2 port 2
1028 12:54:53.645698 scan_static_bus for USB2 port 2 done
1029 12:54:53.652045 scan_bus: bus USB2 port 2 finished in 6 msecs
1030 12:54:53.652124 USB2 port 4 scanning...
1031 12:54:53.655722 scan_static_bus for USB2 port 4
1032 12:54:53.662111 scan_static_bus for USB2 port 4 done
1033 12:54:53.665322 scan_bus: bus USB2 port 4 finished in 6 msecs
1034 12:54:53.668987 USB3 port 1 scanning...
1035 12:54:53.672252 scan_static_bus for USB3 port 1
1036 12:54:53.675379 scan_static_bus for USB3 port 1 done
1037 12:54:53.678709 scan_bus: bus USB3 port 1 finished in 6 msecs
1038 12:54:53.682266 scan_static_bus for USB0 port 0 done
1039 12:54:53.688649 scan_bus: bus USB0 port 0 finished in 93 msecs
1040 12:54:53.691813 scan_static_bus for PCI: 00:14.0 done
1041 12:54:53.695696 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1042 12:54:53.698564 PCI: 00:14.3 scanning...
1043 12:54:53.702263 scan_static_bus for PCI: 00:14.3
1044 12:54:53.705300 GENERIC: 0.0 enabled
1045 12:54:53.708865 scan_static_bus for PCI: 00:14.3 done
1046 12:54:53.711843 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1047 12:54:53.715595 PCI: 00:15.0 scanning...
1048 12:54:53.718546 scan_static_bus for PCI: 00:15.0
1049 12:54:53.722307 I2C: 00:1a enabled
1050 12:54:53.722392 I2C: 00:31 enabled
1051 12:54:53.724985 I2C: 00:32 enabled
1052 12:54:53.728322 scan_static_bus for PCI: 00:15.0 done
1053 12:54:53.735383 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1054 12:54:53.735468 PCI: 00:15.1 scanning...
1055 12:54:53.738614 scan_static_bus for PCI: 00:15.1
1056 12:54:53.741549 I2C: 00:10 enabled
1057 12:54:53.745094 scan_static_bus for PCI: 00:15.1 done
1058 12:54:53.751832 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1059 12:54:53.751921 PCI: 00:15.2 scanning...
1060 12:54:53.755039 scan_static_bus for PCI: 00:15.2
1061 12:54:53.762024 scan_static_bus for PCI: 00:15.2 done
1062 12:54:53.765147 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1063 12:54:53.768464 PCI: 00:15.3 scanning...
1064 12:54:53.772311 scan_static_bus for PCI: 00:15.3
1065 12:54:53.775556 scan_static_bus for PCI: 00:15.3 done
1066 12:54:53.778572 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1067 12:54:53.781803 PCI: 00:19.1 scanning...
1068 12:54:53.785027 scan_static_bus for PCI: 00:19.1
1069 12:54:53.788701 I2C: 00:15 enabled
1070 12:54:53.791776 scan_static_bus for PCI: 00:19.1 done
1071 12:54:53.794970 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1072 12:54:53.798275 PCI: 00:1d.0 scanning...
1073 12:54:53.801880 do_pci_scan_bridge for PCI: 00:1d.0
1074 12:54:53.804991 PCI: pci_scan_bus for bus 01
1075 12:54:53.808229 PCI: 01:00.0 [1c5c/174a] enabled
1076 12:54:53.811776 GENERIC: 0.0 enabled
1077 12:54:53.814706 Enabling Common Clock Configuration
1078 12:54:53.818134 L1 Sub-State supported from root port 29
1079 12:54:53.821751 L1 Sub-State Support = 0xf
1080 12:54:53.824773 CommonModeRestoreTime = 0x28
1081 12:54:53.827779 Power On Value = 0x16, Power On Scale = 0x0
1082 12:54:53.831243 ASPM: Enabled L1
1083 12:54:53.834595 PCIe: Max_Payload_Size adjusted to 128
1084 12:54:53.841004 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1085 12:54:53.841113 PCI: 00:1e.2 scanning...
1086 12:54:53.844440 scan_generic_bus for PCI: 00:1e.2
1087 12:54:53.848058 SPI: 00 enabled
1088 12:54:53.854333 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1089 12:54:53.858315 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1090 12:54:53.861367 PCI: 00:1e.3 scanning...
1091 12:54:53.864531 scan_generic_bus for PCI: 00:1e.3
1092 12:54:53.867678 SPI: 00 enabled
1093 12:54:53.871046 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1094 12:54:53.878050 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1095 12:54:53.881106 PCI: 00:1f.0 scanning...
1096 12:54:53.884282 scan_static_bus for PCI: 00:1f.0
1097 12:54:53.884360 PNP: 0c09.0 enabled
1098 12:54:53.887469 PNP: 0c09.0 scanning...
1099 12:54:53.890657 scan_static_bus for PNP: 0c09.0
1100 12:54:53.893938 scan_static_bus for PNP: 0c09.0 done
1101 12:54:53.900863 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1102 12:54:53.904075 scan_static_bus for PCI: 00:1f.0 done
1103 12:54:53.907855 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1104 12:54:53.910497 PCI: 00:1f.2 scanning...
1105 12:54:53.914322 scan_static_bus for PCI: 00:1f.2
1106 12:54:53.917443 GENERIC: 0.0 enabled
1107 12:54:53.917520 GENERIC: 0.0 scanning...
1108 12:54:53.921023 scan_static_bus for GENERIC: 0.0
1109 12:54:53.924521 GENERIC: 0.0 enabled
1110 12:54:53.927483 GENERIC: 1.0 enabled
1111 12:54:53.931103 scan_static_bus for GENERIC: 0.0 done
1112 12:54:53.934212 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1113 12:54:53.941327 scan_static_bus for PCI: 00:1f.2 done
1114 12:54:53.944246 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1115 12:54:53.947623 PCI: 00:1f.3 scanning...
1116 12:54:53.950525 scan_static_bus for PCI: 00:1f.3
1117 12:54:53.954283 scan_static_bus for PCI: 00:1f.3 done
1118 12:54:53.957648 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1119 12:54:53.961364 PCI: 00:1f.5 scanning...
1120 12:54:53.963837 scan_generic_bus for PCI: 00:1f.5
1121 12:54:53.967614 scan_generic_bus for PCI: 00:1f.5 done
1122 12:54:53.973772 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1123 12:54:53.977737 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1124 12:54:53.980342 scan_static_bus for Root Device done
1125 12:54:53.987181 scan_bus: bus Root Device finished in 737 msecs
1126 12:54:53.987291 done
1127 12:54:53.993469 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1128 12:54:53.997384 Chrome EC: UHEPI supported
1129 12:54:54.003862 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1130 12:54:54.010503 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1131 12:54:54.013659 SPI flash protection: WPSW=0 SRP0=0
1132 12:54:54.016890 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1133 12:54:54.023164 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1134 12:54:54.026819 found VGA at PCI: 00:02.0
1135 12:54:54.029920 Setting up VGA for PCI: 00:02.0
1136 12:54:54.033460 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1137 12:54:54.039780 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1138 12:54:54.043557 Allocating resources...
1139 12:54:54.043670 Reading resources...
1140 12:54:54.046457 Root Device read_resources bus 0 link: 0
1141 12:54:54.053554 DOMAIN: 0000 read_resources bus 0 link: 0
1142 12:54:54.056475 PCI: 00:04.0 read_resources bus 1 link: 0
1143 12:54:54.063645 PCI: 00:04.0 read_resources bus 1 link: 0 done
1144 12:54:54.066391 PCI: 00:0d.0 read_resources bus 0 link: 0
1145 12:54:54.073379 USB0 port 0 read_resources bus 0 link: 0
1146 12:54:54.076659 USB0 port 0 read_resources bus 0 link: 0 done
1147 12:54:54.083147 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1148 12:54:54.086458 PCI: 00:14.0 read_resources bus 0 link: 0
1149 12:54:54.089477 USB0 port 0 read_resources bus 0 link: 0
1150 12:54:54.097648 USB0 port 0 read_resources bus 0 link: 0 done
1151 12:54:54.100799 PCI: 00:14.0 read_resources bus 0 link: 0 done
1152 12:54:54.107355 PCI: 00:14.3 read_resources bus 0 link: 0
1153 12:54:54.110951 PCI: 00:14.3 read_resources bus 0 link: 0 done
1154 12:54:54.117288 PCI: 00:15.0 read_resources bus 0 link: 0
1155 12:54:54.120507 PCI: 00:15.0 read_resources bus 0 link: 0 done
1156 12:54:54.127349 PCI: 00:15.1 read_resources bus 0 link: 0
1157 12:54:54.130364 PCI: 00:15.1 read_resources bus 0 link: 0 done
1158 12:54:54.137787 PCI: 00:19.1 read_resources bus 0 link: 0
1159 12:54:54.141524 PCI: 00:19.1 read_resources bus 0 link: 0 done
1160 12:54:54.148333 PCI: 00:1d.0 read_resources bus 1 link: 0
1161 12:54:54.151101 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1162 12:54:54.158246 PCI: 00:1e.2 read_resources bus 2 link: 0
1163 12:54:54.161115 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1164 12:54:54.167849 PCI: 00:1e.3 read_resources bus 3 link: 0
1165 12:54:54.171481 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1166 12:54:54.177624 PCI: 00:1f.0 read_resources bus 0 link: 0
1167 12:54:54.180867 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1168 12:54:54.187819 PCI: 00:1f.2 read_resources bus 0 link: 0
1169 12:54:54.191008 GENERIC: 0.0 read_resources bus 0 link: 0
1170 12:54:54.197142 GENERIC: 0.0 read_resources bus 0 link: 0 done
1171 12:54:54.201011 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1172 12:54:54.207422 DOMAIN: 0000 read_resources bus 0 link: 0 done
1173 12:54:54.210503 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1174 12:54:54.217593 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1175 12:54:54.220698 Root Device read_resources bus 0 link: 0 done
1176 12:54:54.223796 Done reading resources.
1177 12:54:54.230712 Show resources in subtree (Root Device)...After reading.
1178 12:54:54.234005 Root Device child on link 0 DOMAIN: 0000
1179 12:54:54.237039 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1180 12:54:54.247285 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1181 12:54:54.256829 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1182 12:54:54.256914 PCI: 00:00.0
1183 12:54:54.267048 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1184 12:54:54.276625 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1185 12:54:54.286876 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1186 12:54:54.297030 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1187 12:54:54.306613 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1188 12:54:54.316725 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1189 12:54:54.323056 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1190 12:54:54.333227 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1191 12:54:54.343162 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1192 12:54:54.353439 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1193 12:54:54.363062 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1194 12:54:54.373310 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1195 12:54:54.379806 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1196 12:54:54.389356 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1197 12:54:54.399552 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1198 12:54:54.409644 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1199 12:54:54.419309 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1200 12:54:54.429510 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1201 12:54:54.436127 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1202 12:54:54.446563 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1203 12:54:54.449557 PCI: 00:02.0
1204 12:54:54.459430 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 12:54:54.469030 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1206 12:54:54.479065 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1207 12:54:54.482587 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1208 12:54:54.492114 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1209 12:54:54.492213 GENERIC: 0.0
1210 12:54:54.495619 PCI: 00:05.0
1211 12:54:54.505901 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1212 12:54:54.508982 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1213 12:54:54.512394 GENERIC: 0.0
1214 12:54:54.512500 PCI: 00:08.0
1215 12:54:54.522516 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 12:54:54.525531 PCI: 00:0a.0
1217 12:54:54.528816 PCI: 00:0d.0 child on link 0 USB0 port 0
1218 12:54:54.538945 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 12:54:54.545333 USB0 port 0 child on link 0 USB3 port 0
1220 12:54:54.545410 USB3 port 0
1221 12:54:54.549134 USB3 port 1
1222 12:54:54.549232 USB3 port 2
1223 12:54:54.551810 USB3 port 3
1224 12:54:54.556023 PCI: 00:14.0 child on link 0 USB0 port 0
1225 12:54:54.565305 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1226 12:54:54.568767 USB0 port 0 child on link 0 USB2 port 0
1227 12:54:54.572157 USB2 port 0
1228 12:54:54.575203 USB2 port 1
1229 12:54:54.575277 USB2 port 2
1230 12:54:54.578763 USB2 port 3
1231 12:54:54.578868 USB2 port 4
1232 12:54:54.581825 USB2 port 5
1233 12:54:54.581928 USB2 port 6
1234 12:54:54.585256 USB2 port 7
1235 12:54:54.585357 USB2 port 8
1236 12:54:54.588567 USB2 port 9
1237 12:54:54.588673 USB3 port 0
1238 12:54:54.591869 USB3 port 1
1239 12:54:54.591968 USB3 port 2
1240 12:54:54.594756 USB3 port 3
1241 12:54:54.594867 PCI: 00:14.2
1242 12:54:54.604713 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 12:54:54.614756 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1244 12:54:54.621768 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1245 12:54:54.631330 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1246 12:54:54.631418 GENERIC: 0.0
1247 12:54:54.638210 PCI: 00:15.0 child on link 0 I2C: 00:1a
1248 12:54:54.647786 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 12:54:54.647895 I2C: 00:1a
1250 12:54:54.650968 I2C: 00:31
1251 12:54:54.651073 I2C: 00:32
1252 12:54:54.654740 PCI: 00:15.1 child on link 0 I2C: 00:10
1253 12:54:54.664383 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 12:54:54.668070 I2C: 00:10
1255 12:54:54.668176 PCI: 00:15.2
1256 12:54:54.677583 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:54:54.681343 PCI: 00:15.3
1258 12:54:54.690876 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 12:54:54.690993 PCI: 00:16.0
1260 12:54:54.700882 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 12:54:54.704184 PCI: 00:19.0
1262 12:54:54.707214 PCI: 00:19.1 child on link 0 I2C: 00:15
1263 12:54:54.717682 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 12:54:54.720800 I2C: 00:15
1265 12:54:54.724092 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1266 12:54:54.734193 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1267 12:54:54.743797 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1268 12:54:54.750688 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1269 12:54:54.753853 GENERIC: 0.0
1270 12:54:54.757093 PCI: 01:00.0
1271 12:54:54.767203 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 12:54:54.773526 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1273 12:54:54.783364 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1274 12:54:54.786950 PCI: 00:1e.0
1275 12:54:54.796987 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1276 12:54:54.799832 PCI: 00:1e.2 child on link 0 SPI: 00
1277 12:54:54.809631 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1278 12:54:54.813105 SPI: 00
1279 12:54:54.816636 PCI: 00:1e.3 child on link 0 SPI: 00
1280 12:54:54.826733 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1281 12:54:54.826821 SPI: 00
1282 12:54:54.833016 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1283 12:54:54.840282 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1284 12:54:54.843351 PNP: 0c09.0
1285 12:54:54.849872 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1286 12:54:54.855978 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1287 12:54:54.866375 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1288 12:54:54.872726 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1289 12:54:54.879475 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1290 12:54:54.879588 GENERIC: 0.0
1291 12:54:54.882581 GENERIC: 1.0
1292 12:54:54.882690 PCI: 00:1f.3
1293 12:54:54.892781 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1294 12:54:54.902343 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1295 12:54:54.905923 PCI: 00:1f.5
1296 12:54:54.915858 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1297 12:54:54.919380 CPU_CLUSTER: 0 child on link 0 APIC: 00
1298 12:54:54.919468 APIC: 00
1299 12:54:54.922509 APIC: 01
1300 12:54:54.922594 APIC: 07
1301 12:54:54.925407 APIC: 02
1302 12:54:54.925501 APIC: 04
1303 12:54:54.925573 APIC: 06
1304 12:54:54.929079 APIC: 03
1305 12:54:54.929151 APIC: 05
1306 12:54:54.935652 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1307 12:54:54.942439 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1308 12:54:54.948862 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1309 12:54:54.955267 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1310 12:54:54.958619 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1311 12:54:54.961827 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1312 12:54:54.968745 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1313 12:54:54.975909 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1314 12:54:54.982271 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1315 12:54:54.988314 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1316 12:54:54.998879 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1317 12:54:55.001853 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1318 12:54:55.011720 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1319 12:54:55.018496 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1320 12:54:55.024933 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1321 12:54:55.028001 DOMAIN: 0000: Resource ranges:
1322 12:54:55.031371 * Base: 1000, Size: 800, Tag: 100
1323 12:54:55.035234 * Base: 1900, Size: e700, Tag: 100
1324 12:54:55.041360 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1325 12:54:55.047760 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1326 12:54:55.054998 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1327 12:54:55.061639 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1328 12:54:55.071186 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1329 12:54:55.077666 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1330 12:54:55.084748 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1331 12:54:55.094740 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1332 12:54:55.101018 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1333 12:54:55.108067 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1334 12:54:55.117699 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1335 12:54:55.124371 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1336 12:54:55.130671 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1337 12:54:55.140967 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1338 12:54:55.147181 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1339 12:54:55.153502 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1340 12:54:55.164226 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1341 12:54:55.170357 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1342 12:54:55.177132 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1343 12:54:55.187025 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1344 12:54:55.193470 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1345 12:54:55.199876 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1346 12:54:55.210202 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1347 12:54:55.216614 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1348 12:54:55.223027 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1349 12:54:55.226464 DOMAIN: 0000: Resource ranges:
1350 12:54:55.233497 * Base: 7fc00000, Size: 40400000, Tag: 200
1351 12:54:55.236468 * Base: d0000000, Size: 28000000, Tag: 200
1352 12:54:55.239914 * Base: fa000000, Size: 1000000, Tag: 200
1353 12:54:55.246373 * Base: fb001000, Size: 2fff000, Tag: 200
1354 12:54:55.249528 * Base: fe010000, Size: 2e000, Tag: 200
1355 12:54:55.253103 * Base: fe03f000, Size: d41000, Tag: 200
1356 12:54:55.256599 * Base: fed88000, Size: 8000, Tag: 200
1357 12:54:55.262852 * Base: fed93000, Size: d000, Tag: 200
1358 12:54:55.266756 * Base: feda2000, Size: 1e000, Tag: 200
1359 12:54:55.269701 * Base: fede0000, Size: 1220000, Tag: 200
1360 12:54:55.276059 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1361 12:54:55.283215 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1362 12:54:55.289380 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1363 12:54:55.296424 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1364 12:54:55.302676 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1365 12:54:55.309261 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1366 12:54:55.315569 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1367 12:54:55.322803 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1368 12:54:55.329164 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1369 12:54:55.335363 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1370 12:54:55.342457 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1371 12:54:55.348674 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1372 12:54:55.355646 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1373 12:54:55.362065 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1374 12:54:55.368733 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1375 12:54:55.375261 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1376 12:54:55.382005 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1377 12:54:55.389052 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1378 12:54:55.395185 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1379 12:54:55.401844 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1380 12:54:55.408374 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1381 12:54:55.415030 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1382 12:54:55.421553 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1383 12:54:55.428411 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1384 12:54:55.437959 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1385 12:54:55.441367 PCI: 00:1d.0: Resource ranges:
1386 12:54:55.444710 * Base: 7fc00000, Size: 100000, Tag: 200
1387 12:54:55.451280 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1388 12:54:55.458263 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1389 12:54:55.464516 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1390 12:54:55.471436 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1391 12:54:55.481223 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1392 12:54:55.484527 Root Device assign_resources, bus 0 link: 0
1393 12:54:55.487529 DOMAIN: 0000 assign_resources, bus 0 link: 0
1394 12:54:55.497421 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1395 12:54:55.504226 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1396 12:54:55.514418 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1397 12:54:55.520994 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1398 12:54:55.527134 PCI: 00:04.0 assign_resources, bus 1 link: 0
1399 12:54:55.530579 PCI: 00:04.0 assign_resources, bus 1 link: 0
1400 12:54:55.540779 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1401 12:54:55.547208 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1402 12:54:55.557053 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1403 12:54:55.560019 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1404 12:54:55.563662 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1405 12:54:55.573715 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1406 12:54:55.576814 PCI: 00:14.0 assign_resources, bus 0 link: 0
1407 12:54:55.583175 PCI: 00:14.0 assign_resources, bus 0 link: 0
1408 12:54:55.590060 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1409 12:54:55.599867 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1410 12:54:55.606498 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1411 12:54:55.609770 PCI: 00:14.3 assign_resources, bus 0 link: 0
1412 12:54:55.616823 PCI: 00:14.3 assign_resources, bus 0 link: 0
1413 12:54:55.622852 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1414 12:54:55.629457 PCI: 00:15.0 assign_resources, bus 0 link: 0
1415 12:54:55.632710 PCI: 00:15.0 assign_resources, bus 0 link: 0
1416 12:54:55.643189 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1417 12:54:55.646116 PCI: 00:15.1 assign_resources, bus 0 link: 0
1418 12:54:55.649456 PCI: 00:15.1 assign_resources, bus 0 link: 0
1419 12:54:55.659252 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1420 12:54:55.665909 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1421 12:54:55.675666 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1422 12:54:55.682497 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1423 12:54:55.689087 PCI: 00:19.1 assign_resources, bus 0 link: 0
1424 12:54:55.692150 PCI: 00:19.1 assign_resources, bus 0 link: 0
1425 12:54:55.702595 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1426 12:54:55.712004 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1427 12:54:55.718982 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1428 12:54:55.725194 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1429 12:54:55.731789 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1430 12:54:55.741787 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1431 12:54:55.748295 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1432 12:54:55.751732 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1433 12:54:55.762098 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1434 12:54:55.765164 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1435 12:54:55.772309 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1436 12:54:55.778844 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1437 12:54:55.784883 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1438 12:54:55.788664 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1439 12:54:55.791970 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1440 12:54:55.798698 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1441 12:54:55.801785 LPC: Trying to open IO window from 800 size 1ff
1442 12:54:55.811469 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1443 12:54:55.818449 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1444 12:54:55.828216 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1445 12:54:55.831256 DOMAIN: 0000 assign_resources, bus 0 link: 0
1446 12:54:55.838032 Root Device assign_resources, bus 0 link: 0
1447 12:54:55.838116 Done setting resources.
1448 12:54:55.844908 Show resources in subtree (Root Device)...After assigning values.
1449 12:54:55.851532 Root Device child on link 0 DOMAIN: 0000
1450 12:54:55.854618 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1451 12:54:55.864530 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1452 12:54:55.874451 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1453 12:54:55.874539 PCI: 00:00.0
1454 12:54:55.883923 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1455 12:54:55.894602 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1456 12:54:55.904282 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1457 12:54:55.914306 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1458 12:54:55.924243 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1459 12:54:55.930838 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1460 12:54:55.940576 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1461 12:54:55.950736 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1462 12:54:55.960551 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1463 12:54:55.970058 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1464 12:54:55.979674 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1465 12:54:55.986304 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1466 12:54:55.996561 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1467 12:54:56.006389 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1468 12:54:56.016298 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1469 12:54:56.026315 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1470 12:54:56.036194 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1471 12:54:56.045983 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1472 12:54:56.052092 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1473 12:54:56.062385 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1474 12:54:56.065660 PCI: 00:02.0
1475 12:54:56.075748 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1476 12:54:56.085525 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1477 12:54:56.095405 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1478 12:54:56.098961 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1479 12:54:56.111961 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1480 12:54:56.112050 GENERIC: 0.0
1481 12:54:56.115050 PCI: 00:05.0
1482 12:54:56.125549 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1483 12:54:56.128649 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1484 12:54:56.131656 GENERIC: 0.0
1485 12:54:56.131742 PCI: 00:08.0
1486 12:54:56.141572 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1487 12:54:56.145382 PCI: 00:0a.0
1488 12:54:56.148384 PCI: 00:0d.0 child on link 0 USB0 port 0
1489 12:54:56.158275 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1490 12:54:56.165011 USB0 port 0 child on link 0 USB3 port 0
1491 12:54:56.165102 USB3 port 0
1492 12:54:56.167870 USB3 port 1
1493 12:54:56.167970 USB3 port 2
1494 12:54:56.171587 USB3 port 3
1495 12:54:56.175085 PCI: 00:14.0 child on link 0 USB0 port 0
1496 12:54:56.184527 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1497 12:54:56.191438 USB0 port 0 child on link 0 USB2 port 0
1498 12:54:56.191544 USB2 port 0
1499 12:54:56.194435 USB2 port 1
1500 12:54:56.194515 USB2 port 2
1501 12:54:56.197811 USB2 port 3
1502 12:54:56.197898 USB2 port 4
1503 12:54:56.201380 USB2 port 5
1504 12:54:56.201492 USB2 port 6
1505 12:54:56.204759 USB2 port 7
1506 12:54:56.204860 USB2 port 8
1507 12:54:56.208133 USB2 port 9
1508 12:54:56.208236 USB3 port 0
1509 12:54:56.211501 USB3 port 1
1510 12:54:56.214545 USB3 port 2
1511 12:54:56.214621 USB3 port 3
1512 12:54:56.217659 PCI: 00:14.2
1513 12:54:56.227560 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1514 12:54:56.238079 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1515 12:54:56.241212 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1516 12:54:56.251139 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1517 12:54:56.254019 GENERIC: 0.0
1518 12:54:56.257599 PCI: 00:15.0 child on link 0 I2C: 00:1a
1519 12:54:56.267565 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1520 12:54:56.270540 I2C: 00:1a
1521 12:54:56.270626 I2C: 00:31
1522 12:54:56.274332 I2C: 00:32
1523 12:54:56.277168 PCI: 00:15.1 child on link 0 I2C: 00:10
1524 12:54:56.287360 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1525 12:54:56.290292 I2C: 00:10
1526 12:54:56.290408 PCI: 00:15.2
1527 12:54:56.300631 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1528 12:54:56.303717 PCI: 00:15.3
1529 12:54:56.313511 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1530 12:54:56.313714 PCI: 00:16.0
1531 12:54:56.323934 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1532 12:54:56.327043 PCI: 00:19.0
1533 12:54:56.330224 PCI: 00:19.1 child on link 0 I2C: 00:15
1534 12:54:56.340177 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1535 12:54:56.343369 I2C: 00:15
1536 12:54:56.347244 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1537 12:54:56.357058 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1538 12:54:56.369901 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1539 12:54:56.379906 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1540 12:54:56.380047 GENERIC: 0.0
1541 12:54:56.383412 PCI: 01:00.0
1542 12:54:56.393046 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1543 12:54:56.403014 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1544 12:54:56.413270 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1545 12:54:56.416755 PCI: 00:1e.0
1546 12:54:56.426017 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1547 12:54:56.429622 PCI: 00:1e.2 child on link 0 SPI: 00
1548 12:54:56.439637 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1549 12:54:56.442956 SPI: 00
1550 12:54:56.446422 PCI: 00:1e.3 child on link 0 SPI: 00
1551 12:54:56.456419 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1552 12:54:56.459503 SPI: 00
1553 12:54:56.462552 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1554 12:54:56.472960 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1555 12:54:56.473132 PNP: 0c09.0
1556 12:54:56.482278 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1557 12:54:56.485723 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1558 12:54:56.495875 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1559 12:54:56.505578 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1560 12:54:56.508974 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1561 12:54:56.512141 GENERIC: 0.0
1562 12:54:56.512304 GENERIC: 1.0
1563 12:54:56.515500 PCI: 00:1f.3
1564 12:54:56.525664 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1565 12:54:56.535665 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1566 12:54:56.535812 PCI: 00:1f.5
1567 12:54:56.549051 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1568 12:54:56.552127 CPU_CLUSTER: 0 child on link 0 APIC: 00
1569 12:54:56.552268 APIC: 00
1570 12:54:56.555260 APIC: 01
1571 12:54:56.555350 APIC: 07
1572 12:54:56.555416 APIC: 02
1573 12:54:56.558885 APIC: 04
1574 12:54:56.558963 APIC: 06
1575 12:54:56.562074 APIC: 03
1576 12:54:56.562188 APIC: 05
1577 12:54:56.565055 Done allocating resources.
1578 12:54:56.571828 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1579 12:54:56.575524 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1580 12:54:56.581928 Configure GPIOs for I2S audio on UP4.
1581 12:54:56.588142 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1582 12:54:56.588263 Enabling resources...
1583 12:54:56.594921 PCI: 00:00.0 subsystem <- 8086/9a12
1584 12:54:56.595090 PCI: 00:00.0 cmd <- 06
1585 12:54:56.598740 PCI: 00:02.0 subsystem <- 8086/9a40
1586 12:54:56.601461 PCI: 00:02.0 cmd <- 03
1587 12:54:56.604912 PCI: 00:04.0 subsystem <- 8086/9a03
1588 12:54:56.608450 PCI: 00:04.0 cmd <- 02
1589 12:54:56.611871 PCI: 00:05.0 subsystem <- 8086/9a19
1590 12:54:56.614771 PCI: 00:05.0 cmd <- 02
1591 12:54:56.618622 PCI: 00:08.0 subsystem <- 8086/9a11
1592 12:54:56.621326 PCI: 00:08.0 cmd <- 06
1593 12:54:56.624669 PCI: 00:0d.0 subsystem <- 8086/9a13
1594 12:54:56.628414 PCI: 00:0d.0 cmd <- 02
1595 12:54:56.631355 PCI: 00:14.0 subsystem <- 8086/a0ed
1596 12:54:56.635048 PCI: 00:14.0 cmd <- 02
1597 12:54:56.637760 PCI: 00:14.2 subsystem <- 8086/a0ef
1598 12:54:56.637846 PCI: 00:14.2 cmd <- 02
1599 12:54:56.645039 PCI: 00:14.3 subsystem <- 8086/a0f0
1600 12:54:56.645159 PCI: 00:14.3 cmd <- 02
1601 12:54:56.648130 PCI: 00:15.0 subsystem <- 8086/a0e8
1602 12:54:56.651201 PCI: 00:15.0 cmd <- 02
1603 12:54:56.654894 PCI: 00:15.1 subsystem <- 8086/a0e9
1604 12:54:56.657910 PCI: 00:15.1 cmd <- 02
1605 12:54:56.661800 PCI: 00:15.2 subsystem <- 8086/a0ea
1606 12:54:56.664794 PCI: 00:15.2 cmd <- 02
1607 12:54:56.667820 PCI: 00:15.3 subsystem <- 8086/a0eb
1608 12:54:56.670980 PCI: 00:15.3 cmd <- 02
1609 12:54:56.674548 PCI: 00:16.0 subsystem <- 8086/a0e0
1610 12:54:56.677706 PCI: 00:16.0 cmd <- 02
1611 12:54:56.681369 PCI: 00:19.1 subsystem <- 8086/a0c6
1612 12:54:56.684463 PCI: 00:19.1 cmd <- 02
1613 12:54:56.687605 PCI: 00:1d.0 bridge ctrl <- 0013
1614 12:54:56.690705 PCI: 00:1d.0 subsystem <- 8086/a0b0
1615 12:54:56.690797 PCI: 00:1d.0 cmd <- 06
1616 12:54:56.697628 PCI: 00:1e.0 subsystem <- 8086/a0a8
1617 12:54:56.697740 PCI: 00:1e.0 cmd <- 06
1618 12:54:56.700951 PCI: 00:1e.2 subsystem <- 8086/a0aa
1619 12:54:56.704516 PCI: 00:1e.2 cmd <- 06
1620 12:54:56.708107 PCI: 00:1e.3 subsystem <- 8086/a0ab
1621 12:54:56.711059 PCI: 00:1e.3 cmd <- 02
1622 12:54:56.714632 PCI: 00:1f.0 subsystem <- 8086/a087
1623 12:54:56.717888 PCI: 00:1f.0 cmd <- 407
1624 12:54:56.720837 PCI: 00:1f.3 subsystem <- 8086/a0c8
1625 12:54:56.724414 PCI: 00:1f.3 cmd <- 02
1626 12:54:56.727800 PCI: 00:1f.5 subsystem <- 8086/a0a4
1627 12:54:56.730551 PCI: 00:1f.5 cmd <- 406
1628 12:54:56.733948 PCI: 01:00.0 cmd <- 02
1629 12:54:56.738650 done.
1630 12:54:56.741999 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1631 12:54:56.745331 Initializing devices...
1632 12:54:56.748848 Root Device init
1633 12:54:56.751787 Chrome EC: Set SMI mask to 0x0000000000000000
1634 12:54:56.758739 Chrome EC: clear events_b mask to 0x0000000000000000
1635 12:54:56.764997 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1636 12:54:56.768509 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1637 12:54:56.775206 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1638 12:54:56.781919 Chrome EC: Set WAKE mask to 0x0000000000000000
1639 12:54:56.785672 fw_config match found: DB_USB=USB3_ACTIVE
1640 12:54:56.791784 Configure Right Type-C port orientation for retimer
1641 12:54:56.794849 Root Device init finished in 43 msecs
1642 12:54:56.798774 PCI: 00:00.0 init
1643 12:54:56.801705 CPU TDP = 9 Watts
1644 12:54:56.801790 CPU PL1 = 9 Watts
1645 12:54:56.805055 CPU PL2 = 40 Watts
1646 12:54:56.805170 CPU PL4 = 83 Watts
1647 12:54:56.811412 PCI: 00:00.0 init finished in 8 msecs
1648 12:54:56.811501 PCI: 00:02.0 init
1649 12:54:56.814791 GMA: Found VBT in CBFS
1650 12:54:56.818468 GMA: Found valid VBT in CBFS
1651 12:54:56.824945 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1652 12:54:56.831577 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1653 12:54:56.835011 PCI: 00:02.0 init finished in 18 msecs
1654 12:54:56.837891 PCI: 00:05.0 init
1655 12:54:56.841096 PCI: 00:05.0 init finished in 0 msecs
1656 12:54:56.844468 PCI: 00:08.0 init
1657 12:54:56.847916 PCI: 00:08.0 init finished in 0 msecs
1658 12:54:56.851496 PCI: 00:14.0 init
1659 12:54:56.854081 PCI: 00:14.0 init finished in 0 msecs
1660 12:54:56.857622 PCI: 00:14.2 init
1661 12:54:56.861042 PCI: 00:14.2 init finished in 0 msecs
1662 12:54:56.864307 PCI: 00:15.0 init
1663 12:54:56.864412 I2C bus 0 version 0x3230302a
1664 12:54:56.870856 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1665 12:54:56.873972 PCI: 00:15.0 init finished in 6 msecs
1666 12:54:56.874069 PCI: 00:15.1 init
1667 12:54:56.877459 I2C bus 1 version 0x3230302a
1668 12:54:56.880504 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1669 12:54:56.887393 PCI: 00:15.1 init finished in 6 msecs
1670 12:54:56.887504 PCI: 00:15.2 init
1671 12:54:56.890929 I2C bus 2 version 0x3230302a
1672 12:54:56.894227 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1673 12:54:56.897142 PCI: 00:15.2 init finished in 6 msecs
1674 12:54:56.900817 PCI: 00:15.3 init
1675 12:54:56.904048 I2C bus 3 version 0x3230302a
1676 12:54:56.907068 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1677 12:54:56.910915 PCI: 00:15.3 init finished in 6 msecs
1678 12:54:56.914136 PCI: 00:16.0 init
1679 12:54:56.917090 PCI: 00:16.0 init finished in 0 msecs
1680 12:54:56.920811 PCI: 00:19.1 init
1681 12:54:56.923843 I2C bus 5 version 0x3230302a
1682 12:54:56.927447 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1683 12:54:56.930539 PCI: 00:19.1 init finished in 6 msecs
1684 12:54:56.933881 PCI: 00:1d.0 init
1685 12:54:56.933974 Initializing PCH PCIe bridge.
1686 12:54:56.940212 PCI: 00:1d.0 init finished in 3 msecs
1687 12:54:56.943835 PCI: 00:1f.0 init
1688 12:54:56.946967 IOAPIC: Initializing IOAPIC at 0xfec00000
1689 12:54:56.950288 IOAPIC: Bootstrap Processor Local APIC = 0x00
1690 12:54:56.953249 IOAPIC: ID = 0x02
1691 12:54:56.957010 IOAPIC: Dumping registers
1692 12:54:56.957118 reg 0x0000: 0x02000000
1693 12:54:56.959771 reg 0x0001: 0x00770020
1694 12:54:56.963364 reg 0x0002: 0x00000000
1695 12:54:56.966762 PCI: 00:1f.0 init finished in 21 msecs
1696 12:54:56.969985 PCI: 00:1f.2 init
1697 12:54:56.973205 Disabling ACPI via APMC.
1698 12:54:56.973297 APMC done.
1699 12:54:56.980010 PCI: 00:1f.2 init finished in 5 msecs
1700 12:54:56.990622 PCI: 01:00.0 init
1701 12:54:56.993549 PCI: 01:00.0 init finished in 0 msecs
1702 12:54:56.997184 PNP: 0c09.0 init
1703 12:54:57.000437 Google Chrome EC uptime: 8.360 seconds
1704 12:54:57.007248 Google Chrome AP resets since EC boot: 1
1705 12:54:57.010375 Google Chrome most recent AP reset causes:
1706 12:54:57.013909 0.346: 32775 shutdown: entering G3
1707 12:54:57.020136 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1708 12:54:57.023510 PNP: 0c09.0 init finished in 22 msecs
1709 12:54:57.029021 Devices initialized
1710 12:54:57.032839 Show all devs... After init.
1711 12:54:57.035746 Root Device: enabled 1
1712 12:54:57.035837 DOMAIN: 0000: enabled 1
1713 12:54:57.039379 CPU_CLUSTER: 0: enabled 1
1714 12:54:57.042943 PCI: 00:00.0: enabled 1
1715 12:54:57.045950 PCI: 00:02.0: enabled 1
1716 12:54:57.046036 PCI: 00:04.0: enabled 1
1717 12:54:57.048832 PCI: 00:05.0: enabled 1
1718 12:54:57.052230 PCI: 00:06.0: enabled 0
1719 12:54:57.055762 PCI: 00:07.0: enabled 0
1720 12:54:57.055860 PCI: 00:07.1: enabled 0
1721 12:54:57.058732 PCI: 00:07.2: enabled 0
1722 12:54:57.062143 PCI: 00:07.3: enabled 0
1723 12:54:57.065642 PCI: 00:08.0: enabled 1
1724 12:54:57.065761 PCI: 00:09.0: enabled 0
1725 12:54:57.069111 PCI: 00:0a.0: enabled 0
1726 12:54:57.072432 PCI: 00:0d.0: enabled 1
1727 12:54:57.075574 PCI: 00:0d.1: enabled 0
1728 12:54:57.075684 PCI: 00:0d.2: enabled 0
1729 12:54:57.079106 PCI: 00:0d.3: enabled 0
1730 12:54:57.082238 PCI: 00:0e.0: enabled 0
1731 12:54:57.082334 PCI: 00:10.2: enabled 1
1732 12:54:57.085653 PCI: 00:10.6: enabled 0
1733 12:54:57.089251 PCI: 00:10.7: enabled 0
1734 12:54:57.092015 PCI: 00:12.0: enabled 0
1735 12:54:57.092148 PCI: 00:12.6: enabled 0
1736 12:54:57.095513 PCI: 00:13.0: enabled 0
1737 12:54:57.099411 PCI: 00:14.0: enabled 1
1738 12:54:57.102411 PCI: 00:14.1: enabled 0
1739 12:54:57.102520 PCI: 00:14.2: enabled 1
1740 12:54:57.105614 PCI: 00:14.3: enabled 1
1741 12:54:57.108681 PCI: 00:15.0: enabled 1
1742 12:54:57.111903 PCI: 00:15.1: enabled 1
1743 12:54:57.112028 PCI: 00:15.2: enabled 1
1744 12:54:57.115508 PCI: 00:15.3: enabled 1
1745 12:54:57.118702 PCI: 00:16.0: enabled 1
1746 12:54:57.121872 PCI: 00:16.1: enabled 0
1747 12:54:57.121986 PCI: 00:16.2: enabled 0
1748 12:54:57.125526 PCI: 00:16.3: enabled 0
1749 12:54:57.128749 PCI: 00:16.4: enabled 0
1750 12:54:57.128881 PCI: 00:16.5: enabled 0
1751 12:54:57.131770 PCI: 00:17.0: enabled 0
1752 12:54:57.135575 PCI: 00:19.0: enabled 0
1753 12:54:57.138752 PCI: 00:19.1: enabled 1
1754 12:54:57.138866 PCI: 00:19.2: enabled 0
1755 12:54:57.141956 PCI: 00:1c.0: enabled 1
1756 12:54:57.145270 PCI: 00:1c.1: enabled 0
1757 12:54:57.148584 PCI: 00:1c.2: enabled 0
1758 12:54:57.148727 PCI: 00:1c.3: enabled 0
1759 12:54:57.151639 PCI: 00:1c.4: enabled 0
1760 12:54:57.155175 PCI: 00:1c.5: enabled 0
1761 12:54:57.158589 PCI: 00:1c.6: enabled 1
1762 12:54:57.158741 PCI: 00:1c.7: enabled 0
1763 12:54:57.161568 PCI: 00:1d.0: enabled 1
1764 12:54:57.164865 PCI: 00:1d.1: enabled 0
1765 12:54:57.168400 PCI: 00:1d.2: enabled 1
1766 12:54:57.168521 PCI: 00:1d.3: enabled 0
1767 12:54:57.171955 PCI: 00:1e.0: enabled 1
1768 12:54:57.175320 PCI: 00:1e.1: enabled 0
1769 12:54:57.175440 PCI: 00:1e.2: enabled 1
1770 12:54:57.178316 PCI: 00:1e.3: enabled 1
1771 12:54:57.181403 PCI: 00:1f.0: enabled 1
1772 12:54:57.184803 PCI: 00:1f.1: enabled 0
1773 12:54:57.184972 PCI: 00:1f.2: enabled 1
1774 12:54:57.188538 PCI: 00:1f.3: enabled 1
1775 12:54:57.191419 PCI: 00:1f.4: enabled 0
1776 12:54:57.195251 PCI: 00:1f.5: enabled 1
1777 12:54:57.195400 PCI: 00:1f.6: enabled 0
1778 12:54:57.198355 PCI: 00:1f.7: enabled 0
1779 12:54:57.202117 APIC: 00: enabled 1
1780 12:54:57.202250 GENERIC: 0.0: enabled 1
1781 12:54:57.205305 GENERIC: 0.0: enabled 1
1782 12:54:57.208241 GENERIC: 1.0: enabled 1
1783 12:54:57.211402 GENERIC: 0.0: enabled 1
1784 12:54:57.211509 GENERIC: 1.0: enabled 1
1785 12:54:57.215059 USB0 port 0: enabled 1
1786 12:54:57.218369 GENERIC: 0.0: enabled 1
1787 12:54:57.221896 USB0 port 0: enabled 1
1788 12:54:57.222036 GENERIC: 0.0: enabled 1
1789 12:54:57.224929 I2C: 00:1a: enabled 1
1790 12:54:57.228087 I2C: 00:31: enabled 1
1791 12:54:57.228228 I2C: 00:32: enabled 1
1792 12:54:57.231816 I2C: 00:10: enabled 1
1793 12:54:57.234887 I2C: 00:15: enabled 1
1794 12:54:57.235026 GENERIC: 0.0: enabled 0
1795 12:54:57.237990 GENERIC: 1.0: enabled 0
1796 12:54:57.241295 GENERIC: 0.0: enabled 1
1797 12:54:57.241418 SPI: 00: enabled 1
1798 12:54:57.244804 SPI: 00: enabled 1
1799 12:54:57.248387 PNP: 0c09.0: enabled 1
1800 12:54:57.248507 GENERIC: 0.0: enabled 1
1801 12:54:57.251485 USB3 port 0: enabled 1
1802 12:54:57.254525 USB3 port 1: enabled 1
1803 12:54:57.258067 USB3 port 2: enabled 0
1804 12:54:57.258218 USB3 port 3: enabled 0
1805 12:54:57.260958 USB2 port 0: enabled 0
1806 12:54:57.264460 USB2 port 1: enabled 1
1807 12:54:57.264589 USB2 port 2: enabled 1
1808 12:54:57.268017 USB2 port 3: enabled 0
1809 12:54:57.271161 USB2 port 4: enabled 1
1810 12:54:57.274480 USB2 port 5: enabled 0
1811 12:54:57.274607 USB2 port 6: enabled 0
1812 12:54:57.278008 USB2 port 7: enabled 0
1813 12:54:57.281084 USB2 port 8: enabled 0
1814 12:54:57.281217 USB2 port 9: enabled 0
1815 12:54:57.284450 USB3 port 0: enabled 0
1816 12:54:57.287977 USB3 port 1: enabled 1
1817 12:54:57.291003 USB3 port 2: enabled 0
1818 12:54:57.291144 USB3 port 3: enabled 0
1819 12:54:57.294604 GENERIC: 0.0: enabled 1
1820 12:54:57.297578 GENERIC: 1.0: enabled 1
1821 12:54:57.297708 APIC: 01: enabled 1
1822 12:54:57.301311 APIC: 07: enabled 1
1823 12:54:57.304423 APIC: 02: enabled 1
1824 12:54:57.304546 APIC: 04: enabled 1
1825 12:54:57.307646 APIC: 06: enabled 1
1826 12:54:57.307768 APIC: 03: enabled 1
1827 12:54:57.311300 APIC: 05: enabled 1
1828 12:54:57.314443 PCI: 01:00.0: enabled 1
1829 12:54:57.317355 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1830 12:54:57.324311 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1831 12:54:57.327307 ELOG: NV offset 0xf30000 size 0x1000
1832 12:54:57.334346 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1833 12:54:57.341223 ELOG: Event(17) added with size 13 at 2023-04-05 12:54:57 UTC
1834 12:54:57.347975 ELOG: Event(92) added with size 9 at 2023-04-05 12:54:57 UTC
1835 12:54:57.354207 ELOG: Event(93) added with size 9 at 2023-04-05 12:54:57 UTC
1836 12:54:57.360665 ELOG: Event(9E) added with size 10 at 2023-04-05 12:54:57 UTC
1837 12:54:57.367190 ELOG: Event(9F) added with size 14 at 2023-04-05 12:54:57 UTC
1838 12:54:57.373731 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1839 12:54:57.380231 ELOG: Event(A1) added with size 10 at 2023-04-05 12:54:57 UTC
1840 12:54:57.386803 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1841 12:54:57.393583 ELOG: Event(A0) added with size 9 at 2023-04-05 12:54:57 UTC
1842 12:54:57.397092 elog_add_boot_reason: Logged dev mode boot
1843 12:54:57.403769 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1844 12:54:57.406769 Finalize devices...
1845 12:54:57.406912 Devices finalized
1846 12:54:57.413607 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1847 12:54:57.416709 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1848 12:54:57.423873 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1849 12:54:57.426839 ME: HFSTS1 : 0x80030055
1850 12:54:57.433025 ME: HFSTS2 : 0x30280116
1851 12:54:57.436385 ME: HFSTS3 : 0x00000050
1852 12:54:57.443186 ME: HFSTS4 : 0x00004000
1853 12:54:57.446436 ME: HFSTS5 : 0x00000000
1854 12:54:57.450172 ME: HFSTS6 : 0x00400006
1855 12:54:57.453075 ME: Manufacturing Mode : YES
1856 12:54:57.459854 ME: SPI Protection Mode Enabled : NO
1857 12:54:57.463569 ME: FW Partition Table : OK
1858 12:54:57.466662 ME: Bringup Loader Failure : NO
1859 12:54:57.469579 ME: Firmware Init Complete : NO
1860 12:54:57.473110 ME: Boot Options Present : NO
1861 12:54:57.476610 ME: Update In Progress : NO
1862 12:54:57.479915 ME: D0i3 Support : YES
1863 12:54:57.483476 ME: Low Power State Enabled : NO
1864 12:54:57.489853 ME: CPU Replaced : YES
1865 12:54:57.492632 ME: CPU Replacement Valid : YES
1866 12:54:57.496013 ME: Current Working State : 5
1867 12:54:57.499346 ME: Current Operation State : 1
1868 12:54:57.502695 ME: Current Operation Mode : 3
1869 12:54:57.506164 ME: Error Code : 0
1870 12:54:57.509545 ME: Enhanced Debug Mode : NO
1871 12:54:57.512532 ME: CPU Debug Disabled : YES
1872 12:54:57.516148 ME: TXT Support : NO
1873 12:54:57.522952 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1874 12:54:57.532530 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1875 12:54:57.536176 CBFS: 'fallback/slic' not found.
1876 12:54:57.539278 ACPI: Writing ACPI tables at 76b01000.
1877 12:54:57.539377 ACPI: * FACS
1878 12:54:57.542609 ACPI: * DSDT
1879 12:54:57.545570 Ramoops buffer: 0x100000@0x76a00000.
1880 12:54:57.549296 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1881 12:54:57.556294 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1882 12:54:57.559315 Google Chrome EC: version:
1883 12:54:57.562389 ro: voema_v2.0.7540-147f8d37d1
1884 12:54:57.566103 rw: voema_v2.0.7540-147f8d37d1
1885 12:54:57.566207 running image: 2
1886 12:54:57.572070 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1887 12:54:57.577193 ACPI: * FADT
1888 12:54:57.577315 SCI is IRQ9
1889 12:54:57.583753 ACPI: added table 1/32, length now 40
1890 12:54:57.583868 ACPI: * SSDT
1891 12:54:57.587040 Found 1 CPU(s) with 8 core(s) each.
1892 12:54:57.593735 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1893 12:54:57.597045 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1894 12:54:57.600060 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1895 12:54:57.603527 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1896 12:54:57.610240 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1897 12:54:57.616639 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1898 12:54:57.619938 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1899 12:54:57.626674 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1900 12:54:57.633398 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1901 12:54:57.636551 \_SB.PCI0.RP09: Added StorageD3Enable property
1902 12:54:57.643425 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1903 12:54:57.646566 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1904 12:54:57.653382 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1905 12:54:57.656310 PS2K: Passing 80 keymaps to kernel
1906 12:54:57.663188 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1907 12:54:57.669905 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1908 12:54:57.676108 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1909 12:54:57.682827 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1910 12:54:57.689657 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1911 12:54:57.695995 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1912 12:54:57.703163 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1913 12:54:57.709577 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1914 12:54:57.712901 ACPI: added table 2/32, length now 44
1915 12:54:57.715803 ACPI: * MCFG
1916 12:54:57.719453 ACPI: added table 3/32, length now 48
1917 12:54:57.719565 ACPI: * TPM2
1918 12:54:57.722900 TPM2 log created at 0x769f0000
1919 12:54:57.725771 ACPI: added table 4/32, length now 52
1920 12:54:57.729050 ACPI: * MADT
1921 12:54:57.729174 SCI is IRQ9
1922 12:54:57.732667 ACPI: added table 5/32, length now 56
1923 12:54:57.735947 current = 76b09850
1924 12:54:57.736067 ACPI: * DMAR
1925 12:54:57.742868 ACPI: added table 6/32, length now 60
1926 12:54:57.745851 ACPI: added table 7/32, length now 64
1927 12:54:57.745958 ACPI: * HPET
1928 12:54:57.749032 ACPI: added table 8/32, length now 68
1929 12:54:57.752871 ACPI: done.
1930 12:54:57.755986 ACPI tables: 35216 bytes.
1931 12:54:57.756132 smbios_write_tables: 769ef000
1932 12:54:57.759575 EC returned error result code 3
1933 12:54:57.762600 Couldn't obtain OEM name from CBI
1934 12:54:57.766370 Create SMBIOS type 16
1935 12:54:57.769911 Create SMBIOS type 17
1936 12:54:57.773078 GENERIC: 0.0 (WIFI Device)
1937 12:54:57.776743 SMBIOS tables: 1750 bytes.
1938 12:54:57.779390 Writing table forward entry at 0x00000500
1939 12:54:57.786052 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1940 12:54:57.789207 Writing coreboot table at 0x76b25000
1941 12:54:57.796250 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1942 12:54:57.799125 1. 0000000000001000-000000000009ffff: RAM
1943 12:54:57.802462 2. 00000000000a0000-00000000000fffff: RESERVED
1944 12:54:57.809510 3. 0000000000100000-00000000769eefff: RAM
1945 12:54:57.812428 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1946 12:54:57.819270 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1947 12:54:57.825771 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1948 12:54:57.829024 7. 0000000077000000-000000007fbfffff: RESERVED
1949 12:54:57.835769 8. 00000000c0000000-00000000cfffffff: RESERVED
1950 12:54:57.839135 9. 00000000f8000000-00000000f9ffffff: RESERVED
1951 12:54:57.842844 10. 00000000fb000000-00000000fb000fff: RESERVED
1952 12:54:57.849154 11. 00000000fe000000-00000000fe00ffff: RESERVED
1953 12:54:57.852420 12. 00000000fed80000-00000000fed87fff: RESERVED
1954 12:54:57.859165 13. 00000000fed90000-00000000fed92fff: RESERVED
1955 12:54:57.862323 14. 00000000feda0000-00000000feda1fff: RESERVED
1956 12:54:57.869009 15. 00000000fedc0000-00000000feddffff: RESERVED
1957 12:54:57.872106 16. 0000000100000000-00000002803fffff: RAM
1958 12:54:57.875816 Passing 4 GPIOs to payload:
1959 12:54:57.878806 NAME | PORT | POLARITY | VALUE
1960 12:54:57.885742 lid | undefined | high | high
1961 12:54:57.892329 power | undefined | high | low
1962 12:54:57.895439 oprom | undefined | high | low
1963 12:54:57.902032 EC in RW | 0x000000e5 | high | high
1964 12:54:57.908801 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f751
1965 12:54:57.911959 coreboot table: 1576 bytes.
1966 12:54:57.915536 IMD ROOT 0. 0x76fff000 0x00001000
1967 12:54:57.918502 IMD SMALL 1. 0x76ffe000 0x00001000
1968 12:54:57.921549 FSP MEMORY 2. 0x76c4e000 0x003b0000
1969 12:54:57.924973 VPD 3. 0x76c4d000 0x00000367
1970 12:54:57.928759 RO MCACHE 4. 0x76c4c000 0x00000fdc
1971 12:54:57.931634 CONSOLE 5. 0x76c2c000 0x00020000
1972 12:54:57.938391 FMAP 6. 0x76c2b000 0x00000578
1973 12:54:57.941829 TIME STAMP 7. 0x76c2a000 0x00000910
1974 12:54:57.944732 VBOOT WORK 8. 0x76c16000 0x00014000
1975 12:54:57.947931 ROMSTG STCK 9. 0x76c15000 0x00001000
1976 12:54:57.951503 AFTER CAR 10. 0x76c0a000 0x0000b000
1977 12:54:57.954543 RAMSTAGE 11. 0x76b97000 0x00073000
1978 12:54:57.957833 REFCODE 12. 0x76b42000 0x00055000
1979 12:54:57.961586 SMM BACKUP 13. 0x76b32000 0x00010000
1980 12:54:57.968377 4f444749 14. 0x76b30000 0x00002000
1981 12:54:57.971404 EXT VBT15. 0x76b2d000 0x0000219f
1982 12:54:57.974537 COREBOOT 16. 0x76b25000 0x00008000
1983 12:54:57.977752 ACPI 17. 0x76b01000 0x00024000
1984 12:54:57.981184 ACPI GNVS 18. 0x76b00000 0x00001000
1985 12:54:57.984461 RAMOOPS 19. 0x76a00000 0x00100000
1986 12:54:57.987611 TPM2 TCGLOG20. 0x769f0000 0x00010000
1987 12:54:57.991352 SMBIOS 21. 0x769ef000 0x00000800
1988 12:54:57.994335 IMD small region:
1989 12:54:57.997497 IMD ROOT 0. 0x76ffec00 0x00000400
1990 12:54:58.001190 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1991 12:54:58.004277 POWER STATE 2. 0x76ffeb80 0x00000044
1992 12:54:58.010905 ROMSTAGE 3. 0x76ffeb60 0x00000004
1993 12:54:58.014502 MEM INFO 4. 0x76ffe980 0x000001e0
1994 12:54:58.020964 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1995 12:54:58.024565 MTRR: Physical address space:
1996 12:54:58.027452 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1997 12:54:58.033836 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1998 12:54:58.040464 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1999 12:54:58.047277 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2000 12:54:58.053625 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2001 12:54:58.060254 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2002 12:54:58.066978 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2003 12:54:58.070845 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 12:54:58.073814 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 12:54:58.080611 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 12:54:58.083616 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 12:54:58.086681 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 12:54:58.090642 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 12:54:58.093592 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 12:54:58.100290 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 12:54:58.103212 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 12:54:58.106966 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 12:54:58.109985 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 12:54:58.114869 call enable_fixed_mtrr()
2015 12:54:58.117854 CPU physical address size: 39 bits
2016 12:54:58.124687 MTRR: default type WB/UC MTRR counts: 6/6.
2017 12:54:58.127819 MTRR: UC selected as default type.
2018 12:54:58.134317 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2019 12:54:58.137837 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2020 12:54:58.144293 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2021 12:54:58.151017 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2022 12:54:58.157492 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2023 12:54:58.164481 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2024 12:54:58.171350 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 12:54:58.174514 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 12:54:58.177610 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 12:54:58.180718 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 12:54:58.187497 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 12:54:58.191022 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 12:54:58.194317 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 12:54:58.197287 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 12:54:58.200885 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 12:54:58.207493 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 12:54:58.210764 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 12:54:58.217344 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 12:54:58.217489 call enable_fixed_mtrr()
2037 12:54:58.223729 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 12:54:58.227376 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 12:54:58.230619 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 12:54:58.234266 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 12:54:58.236980 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 12:54:58.243520 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 12:54:58.247022 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 12:54:58.250236 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 12:54:58.253652 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 12:54:58.260489 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 12:54:58.263410 CPU physical address size: 39 bits
2048 12:54:58.266915 call enable_fixed_mtrr()
2049 12:54:58.267010
2050 12:54:58.270245 MTRR check
2051 12:54:58.273187 MTRR: Fixed MSR 0x250 0x0606060606060606
2052 12:54:58.276713 Fixed MTRRs : Enabled
2053 12:54:58.276805 Variable MTRRs: Enabled
2054 12:54:58.276872
2055 12:54:58.283115 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 12:54:58.286745 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 12:54:58.289916 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 12:54:58.293467 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 12:54:58.300047 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 12:54:58.303027 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 12:54:58.306482 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 12:54:58.309481 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 12:54:58.316455 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 12:54:58.319880 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 12:54:58.326709 BS: BS_WRITE_TABLES exit times (exec / console): 109 / 150 ms
2066 12:54:58.329692 call enable_fixed_mtrr()
2067 12:54:58.333319 Checking cr50 for pending updates
2068 12:54:58.337016 CPU physical address size: 39 bits
2069 12:54:58.340851 MTRR: Fixed MSR 0x250 0x0606060606060606
2070 12:54:58.343543 MTRR: Fixed MSR 0x250 0x0606060606060606
2071 12:54:58.347430 MTRR: Fixed MSR 0x258 0x0606060606060606
2072 12:54:58.350255 MTRR: Fixed MSR 0x259 0x0000000000000000
2073 12:54:58.357429 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 12:54:58.360352 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 12:54:58.363631 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 12:54:58.367082 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 12:54:58.373442 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 12:54:58.377061 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 12:54:58.380115 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 12:54:58.383749 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 12:54:58.390809 MTRR: Fixed MSR 0x258 0x0606060606060606
2082 12:54:58.394340 MTRR: Fixed MSR 0x259 0x0000000000000000
2083 12:54:58.397564 MTRR: Fixed MSR 0x268 0x0606060606060606
2084 12:54:58.401036 MTRR: Fixed MSR 0x269 0x0606060606060606
2085 12:54:58.408055 MTRR: Fixed MSR 0x26a 0x0606060606060606
2086 12:54:58.411155 MTRR: Fixed MSR 0x26b 0x0606060606060606
2087 12:54:58.414086 MTRR: Fixed MSR 0x26c 0x0606060606060606
2088 12:54:58.417745 MTRR: Fixed MSR 0x26d 0x0606060606060606
2089 12:54:58.424432 MTRR: Fixed MSR 0x26e 0x0606060606060606
2090 12:54:58.427558 MTRR: Fixed MSR 0x26f 0x0606060606060606
2091 12:54:58.431184 call enable_fixed_mtrr()
2092 12:54:58.434133 call enable_fixed_mtrr()
2093 12:54:58.437250 CPU physical address size: 39 bits
2094 12:54:58.441048 MTRR: Fixed MSR 0x250 0x0606060606060606
2095 12:54:58.444070 MTRR: Fixed MSR 0x250 0x0606060606060606
2096 12:54:58.447264 MTRR: Fixed MSR 0x258 0x0606060606060606
2097 12:54:58.453739 MTRR: Fixed MSR 0x259 0x0000000000000000
2098 12:54:58.457334 MTRR: Fixed MSR 0x268 0x0606060606060606
2099 12:54:58.460886 MTRR: Fixed MSR 0x269 0x0606060606060606
2100 12:54:58.464262 MTRR: Fixed MSR 0x26a 0x0606060606060606
2101 12:54:58.470782 MTRR: Fixed MSR 0x26b 0x0606060606060606
2102 12:54:58.474201 MTRR: Fixed MSR 0x26c 0x0606060606060606
2103 12:54:58.477349 MTRR: Fixed MSR 0x26d 0x0606060606060606
2104 12:54:58.480246 MTRR: Fixed MSR 0x26e 0x0606060606060606
2105 12:54:58.487364 MTRR: Fixed MSR 0x26f 0x0606060606060606
2106 12:54:58.490448 MTRR: Fixed MSR 0x258 0x0606060606060606
2107 12:54:58.493582 MTRR: Fixed MSR 0x259 0x0000000000000000
2108 12:54:58.500325 MTRR: Fixed MSR 0x268 0x0606060606060606
2109 12:54:58.503996 MTRR: Fixed MSR 0x269 0x0606060606060606
2110 12:54:58.507133 MTRR: Fixed MSR 0x26a 0x0606060606060606
2111 12:54:58.510284 MTRR: Fixed MSR 0x26b 0x0606060606060606
2112 12:54:58.517089 MTRR: Fixed MSR 0x26c 0x0606060606060606
2113 12:54:58.520195 MTRR: Fixed MSR 0x26d 0x0606060606060606
2114 12:54:58.523802 MTRR: Fixed MSR 0x26e 0x0606060606060606
2115 12:54:58.526786 MTRR: Fixed MSR 0x26f 0x0606060606060606
2116 12:54:58.530382 call enable_fixed_mtrr()
2117 12:54:58.534213 call enable_fixed_mtrr()
2118 12:54:58.537830 Reading cr50 TPM mode
2119 12:54:58.540922 CPU physical address size: 39 bits
2120 12:54:58.544258 CPU physical address size: 39 bits
2121 12:54:58.550968 BS: BS_PAYLOAD_LOAD entry times (exec / console): 209 / 6 ms
2122 12:54:58.554757 CPU physical address size: 39 bits
2123 12:54:58.557708 CPU physical address size: 39 bits
2124 12:54:58.564180 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2125 12:54:58.571129 Checking segment from ROM address 0xffc02b38
2126 12:54:58.574261 Checking segment from ROM address 0xffc02b54
2127 12:54:58.577523 Loading segment from ROM address 0xffc02b38
2128 12:54:58.580916 code (compression=0)
2129 12:54:58.590888 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2130 12:54:58.597856 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2131 12:54:58.600939 it's not compressed!
2132 12:54:58.739870 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2133 12:54:58.746654 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2134 12:54:58.753312 Loading segment from ROM address 0xffc02b54
2135 12:54:58.756299 Entry Point 0x30000000
2136 12:54:58.756436 Loaded segments
2137 12:54:58.763257 BS: BS_PAYLOAD_LOAD run times (exec / console): 143 / 63 ms
2138 12:54:58.806081 Finalizing chipset.
2139 12:54:58.809186 Finalizing SMM.
2140 12:54:58.809322 APMC done.
2141 12:54:58.815902 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2142 12:54:58.819589 mp_park_aps done after 0 msecs.
2143 12:54:58.822426 Jumping to boot code at 0x30000000(0x76b25000)
2144 12:54:58.832101 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2145 12:54:58.832246
2146 12:54:58.832318
2147 12:54:58.835500
2148 12:54:58.835596 Starting depthcharge on Voema...
2149 12:54:58.835964 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2150 12:54:58.836069 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2151 12:54:58.836159 Setting prompt string to ['volteer:']
2152 12:54:58.836248 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2153 12:54:58.839021
2154 12:54:58.845730 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2155 12:54:58.845875
2156 12:54:58.852728 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2157 12:54:58.852860
2158 12:54:58.858730 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2159 12:54:58.858891
2160 12:54:58.861790 Failed to find eMMC card reader
2161 12:54:58.861891
2162 12:54:58.861961 Wipe memory regions:
2163 12:54:58.865477
2164 12:54:58.868753 [0x00000000001000, 0x000000000a0000)
2165 12:54:58.868886
2166 12:54:58.871790 [0x00000000100000, 0x00000030000000)
2167 12:54:58.897323
2168 12:54:58.900611 [0x00000032662db0, 0x000000769ef000)
2169 12:54:58.936342
2170 12:54:58.939383 [0x00000100000000, 0x00000280400000)
2171 12:54:59.141524
2172 12:54:59.145107 ec_init: CrosEC protocol v3 supported (256, 256)
2173 12:54:59.145287
2174 12:54:59.151961 update_port_state: port C0 state: usb enable 1 mux conn 0
2175 12:54:59.152112
2176 12:54:59.161431 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2177 12:54:59.161558
2178 12:54:59.168440 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2179 12:54:59.168598
2180 12:54:59.171259 send_conn_disc_msg: pmc_send_cmd succeeded
2181 12:54:59.602957
2182 12:54:59.603133 R8152: Initializing
2183 12:54:59.603232
2184 12:54:59.605969 Version 6 (ocp_data = 5c30)
2185 12:54:59.606072
2186 12:54:59.609094 R8152: Done initializing
2187 12:54:59.609199
2188 12:54:59.612795 Adding net device
2189 12:54:59.915437
2190 12:54:59.919161 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2191 12:54:59.919252
2192 12:54:59.919319
2193 12:54:59.919387
2194 12:54:59.922583 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2196 12:55:00.023337 volteer: tftpboot 192.168.201.1 9879110/tftp-deploy-t_cxqma4/kernel/bzImage 9879110/tftp-deploy-t_cxqma4/kernel/cmdline 9879110/tftp-deploy-t_cxqma4/ramdisk/ramdisk.cpio.gz
2197 12:55:00.023533 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2198 12:55:00.023657 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2199 12:55:00.027894 tftpboot 192.168.201.1 9879110/tftp-deploy-t_cxqma4/kernel/bzImay-t_cxqma4/kernel/cmdline 9879110/tftp-deploy-t_cxqma4/ramdisk/ramdisk.cpio.gz
2200 12:55:00.027982
2201 12:55:00.028049 Waiting for link
2202 12:55:00.231854
2203 12:55:00.232030 done.
2204 12:55:00.232108
2205 12:55:00.232174 MAC: 00:24:32:30:79:06
2206 12:55:00.232236
2207 12:55:00.235024 Sending DHCP discover... done.
2208 12:55:00.235110
2209 12:55:00.238956 Waiting for reply... done.
2210 12:55:00.239033
2211 12:55:00.242147 Sending DHCP request... done.
2212 12:55:00.242243
2213 12:55:00.245000 Waiting for reply... done.
2214 12:55:00.245106
2215 12:55:00.248820 My ip is 192.168.201.23
2216 12:55:00.248900
2217 12:55:00.251816 The DHCP server ip is 192.168.201.1
2218 12:55:00.251895
2219 12:55:00.254899 TFTP server IP predefined by user: 192.168.201.1
2220 12:55:00.254979
2221 12:55:00.261446 Bootfile predefined by user: 9879110/tftp-deploy-t_cxqma4/kernel/bzImage
2222 12:55:00.261525
2223 12:55:00.265112 Sending tftp read request... done.
2224 12:55:00.265219
2225 12:55:00.272166 Waiting for the transfer...
2226 12:55:00.272252
2227 12:55:00.798896 00000000 ################################################################
2228 12:55:00.799057
2229 12:55:01.328993 00080000 ################################################################
2230 12:55:01.329204
2231 12:55:01.858631 00100000 ################################################################
2232 12:55:01.858811
2233 12:55:02.421758 00180000 ################################################################
2234 12:55:02.421929
2235 12:55:02.957975 00200000 ################################################################
2236 12:55:02.958139
2237 12:55:03.490590 00280000 ################################################################
2238 12:55:03.490745
2239 12:55:04.032812 00300000 ################################################################
2240 12:55:04.033009
2241 12:55:04.593609 00380000 ################################################################
2242 12:55:04.593767
2243 12:55:05.154731 00400000 ################################################################
2244 12:55:05.154890
2245 12:55:05.754240 00480000 ################################################################
2246 12:55:05.754391
2247 12:55:06.321729 00500000 ################################################################
2248 12:55:06.321892
2249 12:55:06.880016 00580000 ################################################################
2250 12:55:06.880170
2251 12:55:07.415932 00600000 ################################################################
2252 12:55:07.416111
2253 12:55:07.941869 00680000 ################################################################
2254 12:55:07.942045
2255 12:55:08.469289 00700000 ################################################################
2256 12:55:08.469444
2257 12:55:08.998241 00780000 ################################################################
2258 12:55:08.998386
2259 12:55:09.562473 00800000 ################################################################
2260 12:55:09.562651
2261 12:55:10.127951 00880000 ################################################################
2262 12:55:10.128131
2263 12:55:10.675134 00900000 ################################################################
2264 12:55:10.675309
2265 12:55:11.225729 00980000 ################################################################
2266 12:55:11.225883
2267 12:55:11.603756 00a00000 ############################################## done.
2268 12:55:11.603935
2269 12:55:11.606848 The bootfile was 10854400 bytes long.
2270 12:55:11.606959
2271 12:55:11.610508 Sending tftp read request... done.
2272 12:55:11.610629
2273 12:55:11.613402 Waiting for the transfer...
2274 12:55:11.613514
2275 12:55:12.155813 00000000 ################################################################
2276 12:55:12.155977
2277 12:55:12.701905 00080000 ################################################################
2278 12:55:12.702054
2279 12:55:13.251597 00100000 ################################################################
2280 12:55:13.251764
2281 12:55:13.803290 00180000 ################################################################
2282 12:55:13.803453
2283 12:55:14.356060 00200000 ################################################################
2284 12:55:14.356231
2285 12:55:14.926098 00280000 ################################################################
2286 12:55:14.926241
2287 12:55:15.512238 00300000 ################################################################
2288 12:55:15.512405
2289 12:55:16.076968 00380000 ################################################################
2290 12:55:16.077157
2291 12:55:16.627829 00400000 ################################################################
2292 12:55:16.628036
2293 12:55:17.221026 00480000 ################################################################
2294 12:55:17.221251
2295 12:55:17.764050 00500000 ################################################################
2296 12:55:17.764219
2297 12:55:18.328158 00580000 ################################################################
2298 12:55:18.328334
2299 12:55:18.887020 00600000 ################################################################
2300 12:55:18.887185
2301 12:55:18.931963 00680000 ##### done.
2302 12:55:18.932152
2303 12:55:18.934649 Sending tftp read request... done.
2304 12:55:18.934736
2305 12:55:18.937911 Waiting for the transfer...
2306 12:55:18.938008
2307 12:55:18.938077 00000000 # done.
2308 12:55:18.938194
2309 12:55:18.948401 Command line loaded dynamically from TFTP file: 9879110/tftp-deploy-t_cxqma4/kernel/cmdline
2310 12:55:18.948540
2311 12:55:18.970885 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9879110/extract-nfsrootfs-tiy93161,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2312 12:55:18.975166
2313 12:55:18.978456 Shutting down all USB controllers.
2314 12:55:18.978554
2315 12:55:18.978621 Removing current net device
2316 12:55:18.978688
2317 12:55:18.981557 Finalizing coreboot
2318 12:55:18.981675
2319 12:55:18.988583 Exiting depthcharge with code 4 at timestamp: 28801041
2320 12:55:18.988694
2321 12:55:18.988762
2322 12:55:18.988844 Starting kernel ...
2323 12:55:18.988934
2324 12:55:18.989021
2325 12:55:18.989641 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2326 12:55:18.989841 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2327 12:55:18.989951 Setting prompt string to ['Linux version [0-9]']
2328 12:55:18.990049 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2329 12:55:18.990151 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2331 12:59:42.990100 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2333 12:59:42.990427 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2335 12:59:42.990661 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2338 12:59:42.991097 end: 2 depthcharge-action (duration 00:05:00) [common]
2340 12:59:42.991451 Cleaning after the job
2341 12:59:42.991577 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/ramdisk
2342 12:59:42.992313 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/kernel
2343 12:59:42.993300 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/nfsrootfs
2344 12:59:43.042732 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879110/tftp-deploy-t_cxqma4/modules
2345 12:59:43.043267 start: 4.1 power-off (timeout 00:00:30) [common]
2346 12:59:43.043565 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2347 12:59:43.119955 >> Command sent successfully.
2348 12:59:43.122398 Returned 0 in 0 seconds
2349 12:59:43.223178 end: 4.1 power-off (duration 00:00:00) [common]
2351 12:59:43.223663 start: 4.2 read-feedback (timeout 00:10:00) [common]
2352 12:59:43.223994 Listened to connection for namespace 'common' for up to 1s
2353 12:59:44.225283 Finalising connection for namespace 'common'
2354 12:59:44.225493 Disconnecting from shell: Finalise
2355 12:59:44.225587
2356 12:59:44.326298 end: 4.2 read-feedback (duration 00:00:01) [common]
2357 12:59:44.326456 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9879110
2358 12:59:44.528396 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9879110
2359 12:59:44.528587 JobError: Your job cannot terminate cleanly.