Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:53:50.502714 lava-dispatcher, installed at version: 2023.01
2 12:53:50.502916 start: 0 validate
3 12:53:50.503041 Start time: 2023-04-05 12:53:50.503034+00:00 (UTC)
4 12:53:50.503204 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:53:50.503334 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230331.0%2Famd64%2Finitrd.cpio.gz exists
6 12:53:50.792936 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:53:50.793706 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:53:54.307801 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:53:54.308560 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230331.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:53:54.603237 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:53:54.604025 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.279-cip95-86-g16c082d0be46%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:53:55.610934 validate duration: 5.11
14 12:53:55.611245 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:53:55.611343 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:53:55.611432 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:53:55.611532 Not decompressing ramdisk as can be used compressed.
18 12:53:55.611612 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230331.0/amd64/initrd.cpio.gz
19 12:53:55.611677 saving as /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/ramdisk/initrd.cpio.gz
20 12:53:55.611737 total size: 5672859 (5MB)
21 12:53:55.612737 progress 0% (0MB)
22 12:53:55.614279 progress 5% (0MB)
23 12:53:55.615878 progress 10% (0MB)
24 12:53:55.617220 progress 15% (0MB)
25 12:53:55.618707 progress 20% (1MB)
26 12:53:55.620196 progress 25% (1MB)
27 12:53:55.621479 progress 30% (1MB)
28 12:53:55.622908 progress 35% (1MB)
29 12:53:55.624423 progress 40% (2MB)
30 12:53:55.625736 progress 45% (2MB)
31 12:53:55.627205 progress 50% (2MB)
32 12:53:55.628693 progress 55% (3MB)
33 12:53:55.630001 progress 60% (3MB)
34 12:53:55.631509 progress 65% (3MB)
35 12:53:55.632941 progress 70% (3MB)
36 12:53:55.634253 progress 75% (4MB)
37 12:53:55.635751 progress 80% (4MB)
38 12:53:55.637200 progress 85% (4MB)
39 12:53:55.638550 progress 90% (4MB)
40 12:53:55.640194 progress 95% (5MB)
41 12:53:55.641654 progress 100% (5MB)
42 12:53:55.641767 5MB downloaded in 0.03s (180.17MB/s)
43 12:53:55.641913 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:53:55.642145 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:53:55.642228 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:53:55.642309 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:53:55.642407 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:53:55.642474 saving as /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/kernel/bzImage
50 12:53:55.642532 total size: 10854400 (10MB)
51 12:53:55.642590 No compression specified
52 12:53:55.643719 progress 0% (0MB)
53 12:53:55.646387 progress 5% (0MB)
54 12:53:55.649129 progress 10% (1MB)
55 12:53:55.651775 progress 15% (1MB)
56 12:53:55.654593 progress 20% (2MB)
57 12:53:55.657194 progress 25% (2MB)
58 12:53:55.659941 progress 30% (3MB)
59 12:53:55.662496 progress 35% (3MB)
60 12:53:55.665275 progress 40% (4MB)
61 12:53:55.668014 progress 45% (4MB)
62 12:53:55.670530 progress 50% (5MB)
63 12:53:55.673250 progress 55% (5MB)
64 12:53:55.675803 progress 60% (6MB)
65 12:53:55.678417 progress 65% (6MB)
66 12:53:55.680928 progress 70% (7MB)
67 12:53:55.683574 progress 75% (7MB)
68 12:53:55.686037 progress 80% (8MB)
69 12:53:55.688700 progress 85% (8MB)
70 12:53:55.691335 progress 90% (9MB)
71 12:53:55.693842 progress 95% (9MB)
72 12:53:55.696558 progress 100% (10MB)
73 12:53:55.696690 10MB downloaded in 0.05s (191.15MB/s)
74 12:53:55.696830 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:53:55.697063 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:53:55.697149 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:53:55.697235 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:53:55.697342 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230331.0/amd64/full.rootfs.tar.xz
80 12:53:55.697410 saving as /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/nfsrootfs/full.rootfs.tar
81 12:53:55.697470 total size: 125987112 (120MB)
82 12:53:55.697530 Using unxz to decompress xz
83 12:53:55.700919 progress 0% (0MB)
84 12:53:56.145321 progress 5% (6MB)
85 12:53:56.597730 progress 10% (12MB)
86 12:53:57.055054 progress 15% (18MB)
87 12:53:57.520312 progress 20% (24MB)
88 12:53:57.855417 progress 25% (30MB)
89 12:53:58.182048 progress 30% (36MB)
90 12:53:58.448632 progress 35% (42MB)
91 12:53:58.638026 progress 40% (48MB)
92 12:53:58.990359 progress 45% (54MB)
93 12:53:59.345098 progress 50% (60MB)
94 12:53:59.680739 progress 55% (66MB)
95 12:54:00.032306 progress 60% (72MB)
96 12:54:00.376500 progress 65% (78MB)
97 12:54:00.768638 progress 70% (84MB)
98 12:54:01.188058 progress 75% (90MB)
99 12:54:01.623491 progress 80% (96MB)
100 12:54:01.723631 progress 85% (102MB)
101 12:54:01.879781 progress 90% (108MB)
102 12:54:02.224974 progress 95% (114MB)
103 12:54:02.588648 progress 100% (120MB)
104 12:54:02.594491 120MB downloaded in 6.90s (17.42MB/s)
105 12:54:02.594770 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:54:02.595026 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:54:02.595160 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:54:02.595250 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:54:02.595367 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.279-cip95-86-g16c082d0be46/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:54:02.595437 saving as /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/modules/modules.tar
112 12:54:02.595498 total size: 484468 (0MB)
113 12:54:02.595559 Using unxz to decompress xz
114 12:54:02.598798 progress 6% (0MB)
115 12:54:02.599242 progress 13% (0MB)
116 12:54:02.599477 progress 20% (0MB)
117 12:54:02.600849 progress 27% (0MB)
118 12:54:02.602975 progress 33% (0MB)
119 12:54:02.605055 progress 40% (0MB)
120 12:54:02.607298 progress 47% (0MB)
121 12:54:02.609305 progress 54% (0MB)
122 12:54:02.610979 progress 60% (0MB)
123 12:54:02.612878 progress 67% (0MB)
124 12:54:02.614856 progress 74% (0MB)
125 12:54:02.616823 progress 81% (0MB)
126 12:54:02.618633 progress 87% (0MB)
127 12:54:02.620715 progress 94% (0MB)
128 12:54:02.622560 progress 100% (0MB)
129 12:54:02.628553 0MB downloaded in 0.03s (13.98MB/s)
130 12:54:02.628828 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:54:02.629090 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:54:02.629186 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 12:54:02.629285 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 12:54:04.260707 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9879088/extract-nfsrootfs-fzkufjh9
136 12:54:04.260905 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:54:04.261007 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 12:54:04.261148 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw
139 12:54:04.261251 makedir: /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin
140 12:54:04.261344 makedir: /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/tests
141 12:54:04.261427 makedir: /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/results
142 12:54:04.261529 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-add-keys
143 12:54:04.261659 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-add-sources
144 12:54:04.261775 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-background-process-start
145 12:54:04.261891 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-background-process-stop
146 12:54:04.262007 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-common-functions
147 12:54:04.262118 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-echo-ipv4
148 12:54:04.262230 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-install-packages
149 12:54:04.262341 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-installed-packages
150 12:54:04.262452 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-os-build
151 12:54:04.262563 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-probe-channel
152 12:54:04.262674 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-probe-ip
153 12:54:04.262785 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-target-ip
154 12:54:04.262895 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-target-mac
155 12:54:04.263005 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-target-storage
156 12:54:04.263162 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-test-case
157 12:54:04.263274 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-test-event
158 12:54:04.263383 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-test-feedback
159 12:54:04.263493 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-test-raise
160 12:54:04.263601 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-test-reference
161 12:54:04.263713 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-test-runner
162 12:54:04.263822 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-test-set
163 12:54:04.263932 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-test-shell
164 12:54:04.264042 Updating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-install-packages (oe)
165 12:54:04.264160 Updating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/bin/lava-installed-packages (oe)
166 12:54:04.264258 Creating /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/environment
167 12:54:04.264343 LAVA metadata
168 12:54:04.264412 - LAVA_JOB_ID=9879088
169 12:54:04.264476 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:54:04.264571 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 12:54:04.264638 skipped lava-vland-overlay
172 12:54:04.264713 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:54:04.264794 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 12:54:04.264859 skipped lava-multinode-overlay
175 12:54:04.264934 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:54:04.265014 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 12:54:04.265088 Loading test definitions
178 12:54:04.265176 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
179 12:54:04.265246 Using /lava-9879088 at stage 0
180 12:54:04.265344 Fetching tests from https://github.com/kernelci/test-definitions
181 12:54:04.265421 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/0/tests/0_ltp-ipc'
182 12:54:11.622297 Running '/usr/bin/git checkout kernelci.org
183 12:54:11.768504 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 12:54:11.769430 uuid=9879088_1.5.2.3.1 testdef=None
185 12:54:11.769586 end: 1.5.2.3.1 git-repo-action (duration 00:00:08) [common]
187 12:54:11.769842 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
188 12:54:11.770643 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 12:54:11.770971 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
191 12:54:11.772023 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 12:54:11.772271 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
194 12:54:11.773311 runner path: /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/0/tests/0_ltp-ipc test_uuid 9879088_1.5.2.3.1
195 12:54:11.773515 SKIPFILE='skipfile-lkft.yaml'
196 12:54:11.773606 SKIP_INSTALL='true'
197 12:54:11.773706 TST_CMDFILES='ipc'
198 12:54:11.773884 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 12:54:11.774101 Creating lava-test-runner.conf files
201 12:54:11.774181 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9879088/lava-overlay-4sdhtwpw/lava-9879088/0 for stage 0
202 12:54:11.774272 - 0_ltp-ipc
203 12:54:11.774373 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
204 12:54:11.774463 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
205 12:54:19.305333 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 12:54:19.305482 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
207 12:54:19.305606 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 12:54:19.305711 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
209 12:54:19.305804 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
210 12:54:19.423905 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 12:54:19.424294 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
212 12:54:19.424411 extracting modules file /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879088/extract-nfsrootfs-fzkufjh9
213 12:54:19.435253 extracting modules file /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9879088/extract-overlay-ramdisk-v_w6ufog/ramdisk
214 12:54:19.445689 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 12:54:19.445838 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
216 12:54:19.445938 [common] Applying overlay to NFS
217 12:54:19.446015 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9879088/compress-overlay-xs981mzj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9879088/extract-nfsrootfs-fzkufjh9
218 12:54:20.256977 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 12:54:20.257149 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
220 12:54:20.257248 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 12:54:20.257341 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
222 12:54:20.257425 Building ramdisk /var/lib/lava/dispatcher/tmp/9879088/extract-overlay-ramdisk-v_w6ufog/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9879088/extract-overlay-ramdisk-v_w6ufog/ramdisk
223 12:54:20.311707 >> 31365 blocks
224 12:54:20.913871 rename /var/lib/lava/dispatcher/tmp/9879088/extract-overlay-ramdisk-v_w6ufog/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/ramdisk/ramdisk.cpio.gz
225 12:54:20.914325 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 12:54:20.914445 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
227 12:54:20.914548 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
228 12:54:20.914641 No mkimage arch provided, not using FIT.
229 12:54:20.914732 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 12:54:20.914816 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 12:54:20.914918 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
232 12:54:20.915011 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
233 12:54:20.915102 No LXC device requested
234 12:54:20.915181 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 12:54:20.915273 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
236 12:54:20.915358 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 12:54:20.915434 Checking files for TFTP limit of 4294967296 bytes.
238 12:54:20.915832 end: 1 tftp-deploy (duration 00:00:25) [common]
239 12:54:20.915939 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 12:54:20.916037 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 12:54:20.916157 substitutions:
242 12:54:20.916226 - {DTB}: None
243 12:54:20.916291 - {INITRD}: 9879088/tftp-deploy-d_ev1f4z/ramdisk/ramdisk.cpio.gz
244 12:54:20.916352 - {KERNEL}: 9879088/tftp-deploy-d_ev1f4z/kernel/bzImage
245 12:54:20.916412 - {LAVA_MAC}: None
246 12:54:20.916469 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9879088/extract-nfsrootfs-fzkufjh9
247 12:54:20.916528 - {NFS_SERVER_IP}: 192.168.201.1
248 12:54:20.916583 - {PRESEED_CONFIG}: None
249 12:54:20.916638 - {PRESEED_LOCAL}: None
250 12:54:20.916693 - {RAMDISK}: 9879088/tftp-deploy-d_ev1f4z/ramdisk/ramdisk.cpio.gz
251 12:54:20.916748 - {ROOT_PART}: None
252 12:54:20.916802 - {ROOT}: None
253 12:54:20.916859 - {SERVER_IP}: 192.168.201.1
254 12:54:20.916914 - {TEE}: None
255 12:54:20.916970 Parsed boot commands:
256 12:54:20.917026 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 12:54:20.917188 Parsed boot commands: tftpboot 192.168.201.1 9879088/tftp-deploy-d_ev1f4z/kernel/bzImage 9879088/tftp-deploy-d_ev1f4z/kernel/cmdline 9879088/tftp-deploy-d_ev1f4z/ramdisk/ramdisk.cpio.gz
258 12:54:20.917277 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 12:54:20.917364 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 12:54:20.917457 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 12:54:20.917547 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 12:54:20.917616 Not connected, no need to disconnect.
263 12:54:20.917692 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 12:54:20.917770 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 12:54:20.917839 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
266 12:54:20.921050 Setting prompt string to ['lava-test: # ']
267 12:54:20.921389 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 12:54:20.921500 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 12:54:20.921604 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 12:54:20.921692 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 12:54:20.921876 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
272 12:54:26.048359 >> Command sent successfully.
273 12:54:26.051099 Returned 0 in 5 seconds
274 12:54:26.152164 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 12:54:26.153707 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 12:54:26.154244 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 12:54:26.154690 Setting prompt string to 'Starting depthcharge on Voema...'
279 12:54:26.155225 Changing prompt to 'Starting depthcharge on Voema...'
280 12:54:26.155693 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
281 12:54:26.157027 [Enter `^Ec?' for help]
282 12:54:27.784968
283 12:54:27.785159
284 12:54:27.792186 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
285 12:54:27.799609 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
286 12:54:27.803772 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
287 12:54:27.807285 CPU: AES supported, TXT NOT supported, VT supported
288 12:54:27.814887 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
289 12:54:27.818174 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
290 12:54:27.822370 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
291 12:54:27.827098 VBOOT: Loading verstage.
292 12:54:27.834410 FMAP: Found "FLASH" version 1.1 at 0x1804000.
293 12:54:27.837346 FMAP: base = 0x0 size = 0x2000000 #areas = 32
294 12:54:27.841527 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 12:54:27.851573 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
296 12:54:27.858063 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
297 12:54:27.858178
298 12:54:27.858258
299 12:54:27.871475 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
300 12:54:27.885558 Probing TPM: . done!
301 12:54:27.888335 TPM ready after 0 ms
302 12:54:27.891473 Connected to device vid:did:rid of 1ae0:0028:00
303 12:54:27.903102 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
304 12:54:27.909673 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 12:54:27.913365 Initialized TPM device CR50 revision 0
306 12:54:27.965807 tlcl_send_startup: Startup return code is 0
307 12:54:27.966404 TPM: setup succeeded
308 12:54:27.981818 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 12:54:27.995444 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 12:54:28.008667 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 12:54:28.018195 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 12:54:28.022368 Chrome EC: UHEPI supported
313 12:54:28.025202 Phase 1
314 12:54:28.028519 FMAP: area GBB found @ 1805000 (458752 bytes)
315 12:54:28.038834 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 12:54:28.045390 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 12:54:28.051756 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
318 12:54:28.058741 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
319 12:54:28.061766 Recovery requested (1009000e)
320 12:54:28.065014 TPM: Extending digest for VBOOT: boot mode into PCR 0
321 12:54:28.076903 tlcl_extend: response is 0
322 12:54:28.083462 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
323 12:54:28.093222 tlcl_extend: response is 0
324 12:54:28.099832 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
325 12:54:28.106448 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
326 12:54:28.112848 BS: verstage times (exec / console): total (unknown) / 142 ms
327 12:54:28.113571
328 12:54:28.114224
329 12:54:28.126259 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
330 12:54:28.132472 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
331 12:54:28.136081 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
332 12:54:28.139501 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
333 12:54:28.145805 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 12:54:28.148855 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
335 12:54:28.152385 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
336 12:54:28.155971 TCO_STS: 0000 0000
337 12:54:28.159066 GEN_PMCON: d0015038 00002200
338 12:54:28.162001 GBLRST_CAUSE: 00000000 00000000
339 12:54:28.165325 HPR_CAUSE0: 00000000
340 12:54:28.165421 prev_sleep_state 5
341 12:54:28.168776 Boot Count incremented to 17751
342 12:54:28.175170 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
343 12:54:28.182022 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
344 12:54:28.191509 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
345 12:54:28.198339 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 12:54:28.201923 Chrome EC: UHEPI supported
347 12:54:28.208354 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 12:54:28.220686 Probing TPM: done!
349 12:54:28.224231 Connected to device vid:did:rid of 1ae0:0028:00
350 12:54:28.236249 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
351 12:54:28.239175 Initialized TPM device CR50 revision 0
352 12:54:28.255241 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 12:54:28.261688 MRC: Hash idx 0x100b comparison successful.
354 12:54:28.265149 MRC cache found, size faa8
355 12:54:28.265240 bootmode is set to: 2
356 12:54:28.268449 SPD index = 0
357 12:54:28.274689 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 12:54:28.278202 SPD: module type is LPDDR4X
359 12:54:28.284825 SPD: module part number is MT53E512M64D4NW-046
360 12:54:28.287844 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
361 12:54:28.294939 SPD: device width 16 bits, bus width 16 bits
362 12:54:28.297771 SPD: module size is 1024 MB (per channel)
363 12:54:28.731471 CBMEM:
364 12:54:28.735009 IMD: root @ 0x76fff000 254 entries.
365 12:54:28.738089 IMD: root @ 0x76ffec00 62 entries.
366 12:54:28.741264 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 12:54:28.747557 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 12:54:28.751074 External stage cache:
369 12:54:28.754586 IMD: root @ 0x7b3ff000 254 entries.
370 12:54:28.757344 IMD: root @ 0x7b3fec00 62 entries.
371 12:54:28.773350 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 12:54:28.779702 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 12:54:28.786341 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 12:54:28.800817 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 12:54:28.804336 cse_lite: Skip switching to RW in the recovery path
376 12:54:28.807817 8 DIMMs found
377 12:54:28.807892 SMM Memory Map
378 12:54:28.811169 SMRAM : 0x7b000000 0x800000
379 12:54:28.814799 Subregion 0: 0x7b000000 0x200000
380 12:54:28.818157 Subregion 1: 0x7b200000 0x200000
381 12:54:28.821153 Subregion 2: 0x7b400000 0x400000
382 12:54:28.824695 top_of_ram = 0x77000000
383 12:54:28.831028 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
384 12:54:28.834971 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
385 12:54:28.841343 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
386 12:54:28.844858 MTRR Range: Start=ff000000 End=0 (Size 1000000)
387 12:54:28.854754 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
388 12:54:28.861068 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
389 12:54:28.870714 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
390 12:54:28.874183 Processing 211 relocs. Offset value of 0x74c0b000
391 12:54:28.883114 BS: romstage times (exec / console): total (unknown) / 277 ms
392 12:54:28.889152
393 12:54:28.889418
394 12:54:28.899392 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 12:54:28.902964 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 12:54:28.912453 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 12:54:28.919259 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 12:54:28.925655 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 12:54:28.932178 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 12:54:28.979999 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 12:54:28.986356 Processing 5008 relocs. Offset value of 0x75d98000
402 12:54:28.989362 BS: postcar times (exec / console): total (unknown) / 59 ms
403 12:54:28.992844
404 12:54:28.993277
405 12:54:29.003239 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 12:54:29.003691 Normal boot
407 12:54:29.006674 FW_CONFIG value is 0x804c02
408 12:54:29.009761 PCI: 00:07.0 disabled by fw_config
409 12:54:29.013237 PCI: 00:07.1 disabled by fw_config
410 12:54:29.016736 PCI: 00:0d.2 disabled by fw_config
411 12:54:29.020072 PCI: 00:1c.7 disabled by fw_config
412 12:54:29.026486 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 12:54:29.033433 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:54:29.036432 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 12:54:29.040049 GENERIC: 0.0 disabled by fw_config
416 12:54:29.043113 GENERIC: 1.0 disabled by fw_config
417 12:54:29.050076 fw_config match found: DB_USB=USB3_ACTIVE
418 12:54:29.053489 fw_config match found: DB_USB=USB3_ACTIVE
419 12:54:29.056438 fw_config match found: DB_USB=USB3_ACTIVE
420 12:54:29.059939 fw_config match found: DB_USB=USB3_ACTIVE
421 12:54:29.066210 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 12:54:29.073027 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 12:54:29.079504 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 12:54:29.089536 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 12:54:29.092602 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 12:54:29.099569 microcode: Update skipped, already up-to-date
427 12:54:29.105876 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 12:54:29.132957 Detected 4 core, 8 thread CPU.
429 12:54:29.136605 Setting up SMI for CPU
430 12:54:29.140073 IED base = 0x7b400000
431 12:54:29.140600 IED size = 0x00400000
432 12:54:29.142858 Will perform SMM setup.
433 12:54:29.149452 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
434 12:54:29.156022 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 12:54:29.163010 Processing 16 relocs. Offset value of 0x00030000
436 12:54:29.165842 Attempting to start 7 APs
437 12:54:29.169384 Waiting for 10ms after sending INIT.
438 12:54:29.185327 Waiting for 1st SIPI to complete...done.
439 12:54:29.185953 AP: slot 1 apic_id 1.
440 12:54:29.188601 AP: slot 4 apic_id 3.
441 12:54:29.191753 AP: slot 5 apic_id 2.
442 12:54:29.192422 AP: slot 2 apic_id 5.
443 12:54:29.195329 AP: slot 6 apic_id 4.
444 12:54:29.198513 Waiting for 2nd SIPI to complete...done.
445 12:54:29.202001 AP: slot 3 apic_id 6.
446 12:54:29.205533 AP: slot 7 apic_id 7.
447 12:54:29.211696 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 12:54:29.217812 Processing 13 relocs. Offset value of 0x00038000
449 12:54:29.221374 Unable to locate Global NVS
450 12:54:29.227967 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 12:54:29.231447 Installing permanent SMM handler to 0x7b000000
452 12:54:29.241068 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 12:54:29.244734 Processing 794 relocs. Offset value of 0x7b010000
454 12:54:29.254083 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 12:54:29.257702 Processing 13 relocs. Offset value of 0x7b008000
456 12:54:29.264435 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 12:54:29.270774 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 12:54:29.277403 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 12:54:29.281011 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 12:54:29.287362 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 12:54:29.294866 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 12:54:29.300719 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 12:54:29.304433 Unable to locate Global NVS
464 12:54:29.310273 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 12:54:29.313662 Clearing SMI status registers
466 12:54:29.316990 SMI_STS: PM1
467 12:54:29.317483 PM1_STS: PWRBTN
468 12:54:29.323902 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 12:54:29.327167 In relocation handler: CPU 0
470 12:54:29.330274 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 12:54:29.337117 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 12:54:29.340448 Relocation complete.
473 12:54:29.346810 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 12:54:29.350576 In relocation handler: CPU 1
475 12:54:29.353376 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 12:54:29.356951 Relocation complete.
477 12:54:29.363436 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
478 12:54:29.366663 In relocation handler: CPU 4
479 12:54:29.370142 New SMBASE=0x7afff000 IEDBASE=0x7b400000
480 12:54:29.373179 Relocation complete.
481 12:54:29.379916 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
482 12:54:29.382845 In relocation handler: CPU 5
483 12:54:29.386558 New SMBASE=0x7affec00 IEDBASE=0x7b400000
484 12:54:29.389417 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 12:54:29.392885 Relocation complete.
486 12:54:29.399915 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
487 12:54:29.402778 In relocation handler: CPU 7
488 12:54:29.406080 New SMBASE=0x7affe400 IEDBASE=0x7b400000
489 12:54:29.409752 Relocation complete.
490 12:54:29.415974 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
491 12:54:29.419569 In relocation handler: CPU 3
492 12:54:29.423176 New SMBASE=0x7afff400 IEDBASE=0x7b400000
493 12:54:29.429377 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 12:54:29.432675 Relocation complete.
495 12:54:29.439036 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
496 12:54:29.442263 In relocation handler: CPU 2
497 12:54:29.445663 New SMBASE=0x7afff800 IEDBASE=0x7b400000
498 12:54:29.448720 Relocation complete.
499 12:54:29.455869 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
500 12:54:29.458810 In relocation handler: CPU 6
501 12:54:29.462858 New SMBASE=0x7affe800 IEDBASE=0x7b400000
502 12:54:29.466481 Writing SMRR. base = 0x7b000006, mask=0xff800c00
503 12:54:29.469843 Relocation complete.
504 12:54:29.470303 Initializing CPU #0
505 12:54:29.473334 CPU: vendor Intel device 806c1
506 12:54:29.477124 CPU: family 06, model 8c, stepping 01
507 12:54:29.479750 Clearing out pending MCEs
508 12:54:29.483419 Setting up local APIC...
509 12:54:29.486883 apic_id: 0x00 done.
510 12:54:29.489979 Turbo is available but hidden
511 12:54:29.493408 Turbo is available and visible
512 12:54:29.496202 microcode: Update skipped, already up-to-date
513 12:54:29.499741 CPU #0 initialized
514 12:54:29.500192 Initializing CPU #4
515 12:54:29.503355 Initializing CPU #5
516 12:54:29.506747 CPU: vendor Intel device 806c1
517 12:54:29.509517 CPU: family 06, model 8c, stepping 01
518 12:54:29.512948 CPU: vendor Intel device 806c1
519 12:54:29.516449 CPU: family 06, model 8c, stepping 01
520 12:54:29.519652 Clearing out pending MCEs
521 12:54:29.522420 Initializing CPU #7
522 12:54:29.522508 Initializing CPU #3
523 12:54:29.525860 CPU: vendor Intel device 806c1
524 12:54:29.528969 CPU: family 06, model 8c, stepping 01
525 12:54:29.532574 CPU: vendor Intel device 806c1
526 12:54:29.535716 CPU: family 06, model 8c, stepping 01
527 12:54:29.539207 Clearing out pending MCEs
528 12:54:29.542532 Clearing out pending MCEs
529 12:54:29.545918 Setting up local APIC...
530 12:54:29.546006 Initializing CPU #2
531 12:54:29.549235 Initializing CPU #6
532 12:54:29.552234 CPU: vendor Intel device 806c1
533 12:54:29.555803 CPU: family 06, model 8c, stepping 01
534 12:54:29.558696 CPU: vendor Intel device 806c1
535 12:54:29.562207 CPU: family 06, model 8c, stepping 01
536 12:54:29.565733 Clearing out pending MCEs
537 12:54:29.568802 Clearing out pending MCEs
538 12:54:29.568893 Setting up local APIC...
539 12:54:29.572481 Setting up local APIC...
540 12:54:29.575524 Initializing CPU #1
541 12:54:29.578963 apic_id: 0x03 done.
542 12:54:29.579089 Clearing out pending MCEs
543 12:54:29.585275 microcode: Update skipped, already up-to-date
544 12:54:29.585365 Setting up local APIC...
545 12:54:29.588976 CPU: vendor Intel device 806c1
546 12:54:29.595551 CPU: family 06, model 8c, stepping 01
547 12:54:29.595643 apic_id: 0x07 done.
548 12:54:29.599118 apic_id: 0x06 done.
549 12:54:29.601888 microcode: Update skipped, already up-to-date
550 12:54:29.608746 microcode: Update skipped, already up-to-date
551 12:54:29.608836 CPU #7 initialized
552 12:54:29.612147 CPU #3 initialized
553 12:54:29.615152 Setting up local APIC...
554 12:54:29.615241 Clearing out pending MCEs
555 12:54:29.618708 CPU #4 initialized
556 12:54:29.621995 apic_id: 0x02 done.
557 12:54:29.622086 apic_id: 0x05 done.
558 12:54:29.625244 Setting up local APIC...
559 12:54:29.628952 microcode: Update skipped, already up-to-date
560 12:54:29.631738 apic_id: 0x04 done.
561 12:54:29.635456 microcode: Update skipped, already up-to-date
562 12:54:29.642110 microcode: Update skipped, already up-to-date
563 12:54:29.642201 CPU #2 initialized
564 12:54:29.645003 CPU #6 initialized
565 12:54:29.648305 CPU #5 initialized
566 12:54:29.648395 Setting up local APIC...
567 12:54:29.651889 apic_id: 0x01 done.
568 12:54:29.655111 microcode: Update skipped, already up-to-date
569 12:54:29.658365 CPU #1 initialized
570 12:54:29.661840 bsp_do_flight_plan done after 459 msecs.
571 12:54:29.665358 CPU: frequency set to 4000 MHz
572 12:54:29.668479 Enabling SMIs.
573 12:54:29.674678 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
574 12:54:29.689754 SATAXPCIE1 indicates PCIe NVMe is present
575 12:54:29.693355 Probing TPM: done!
576 12:54:29.696862 Connected to device vid:did:rid of 1ae0:0028:00
577 12:54:29.707381 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
578 12:54:29.710316 Initialized TPM device CR50 revision 0
579 12:54:29.713994 Enabling S0i3.4
580 12:54:29.720540 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
581 12:54:29.724009 Found a VBT of 8704 bytes after decompression
582 12:54:29.730333 cse_lite: CSE RO boot. HybridStorageMode disabled
583 12:54:29.736913 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
584 12:54:29.812973 FSPS returned 0
585 12:54:29.816607 Executing Phase 1 of FspMultiPhaseSiInit
586 12:54:29.826170 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
587 12:54:29.829634 port C0 DISC req: usage 1 usb3 1 usb2 5
588 12:54:29.832517 Raw Buffer output 0 00000511
589 12:54:29.835999 Raw Buffer output 1 00000000
590 12:54:29.840012 pmc_send_ipc_cmd succeeded
591 12:54:29.846197 port C1 DISC req: usage 1 usb3 2 usb2 3
592 12:54:29.846282 Raw Buffer output 0 00000321
593 12:54:29.849500 Raw Buffer output 1 00000000
594 12:54:29.853465 pmc_send_ipc_cmd succeeded
595 12:54:29.858850 Detected 4 core, 8 thread CPU.
596 12:54:29.862101 Detected 4 core, 8 thread CPU.
597 12:54:30.095938 Display FSP Version Info HOB
598 12:54:30.099419 Reference Code - CPU = a.0.4c.31
599 12:54:30.102894 uCode Version = 0.0.0.86
600 12:54:30.105742 TXT ACM version = ff.ff.ff.ffff
601 12:54:30.109390 Reference Code - ME = a.0.4c.31
602 12:54:30.112452 MEBx version = 0.0.0.0
603 12:54:30.115869 ME Firmware Version = Consumer SKU
604 12:54:30.119427 Reference Code - PCH = a.0.4c.31
605 12:54:30.122908 PCH-CRID Status = Disabled
606 12:54:30.126107 PCH-CRID Original Value = ff.ff.ff.ffff
607 12:54:30.129124 PCH-CRID New Value = ff.ff.ff.ffff
608 12:54:30.132665 OPROM - RST - RAID = ff.ff.ff.ffff
609 12:54:30.135618 PCH Hsio Version = 4.0.0.0
610 12:54:30.139171 Reference Code - SA - System Agent = a.0.4c.31
611 12:54:30.142676 Reference Code - MRC = 2.0.0.1
612 12:54:30.145727 SA - PCIe Version = a.0.4c.31
613 12:54:30.149307 SA-CRID Status = Disabled
614 12:54:30.152369 SA-CRID Original Value = 0.0.0.1
615 12:54:30.155853 SA-CRID New Value = 0.0.0.1
616 12:54:30.158905 OPROM - VBIOS = ff.ff.ff.ffff
617 12:54:30.162347 IO Manageability Engine FW Version = 11.1.4.0
618 12:54:30.166074 PHY Build Version = 0.0.0.e0
619 12:54:30.168778 Thunderbolt(TM) FW Version = 0.0.0.0
620 12:54:30.175907 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 12:54:30.179215 ITSS IRQ Polarities Before:
622 12:54:30.179294 IPC0: 0xffffffff
623 12:54:30.182097 IPC1: 0xffffffff
624 12:54:30.182207 IPC2: 0xffffffff
625 12:54:30.185642 IPC3: 0xffffffff
626 12:54:30.188791 ITSS IRQ Polarities After:
627 12:54:30.188879 IPC0: 0xffffffff
628 12:54:30.192060 IPC1: 0xffffffff
629 12:54:30.192172 IPC2: 0xffffffff
630 12:54:30.195306 IPC3: 0xffffffff
631 12:54:30.198900 Found PCIe Root Port #9 at PCI: 00:1d.0.
632 12:54:30.212138 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
633 12:54:30.222259 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
634 12:54:30.234898 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
635 12:54:30.241388 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
636 12:54:30.245050 Enumerating buses...
637 12:54:30.248000 Show all devs... Before device enumeration.
638 12:54:30.251430 Root Device: enabled 1
639 12:54:30.251528 DOMAIN: 0000: enabled 1
640 12:54:30.254624 CPU_CLUSTER: 0: enabled 1
641 12:54:30.257904 PCI: 00:00.0: enabled 1
642 12:54:30.261428 PCI: 00:02.0: enabled 1
643 12:54:30.261507 PCI: 00:04.0: enabled 1
644 12:54:30.264886 PCI: 00:05.0: enabled 1
645 12:54:30.267852 PCI: 00:06.0: enabled 0
646 12:54:30.271304 PCI: 00:07.0: enabled 0
647 12:54:30.271379 PCI: 00:07.1: enabled 0
648 12:54:30.274393 PCI: 00:07.2: enabled 0
649 12:54:30.277727 PCI: 00:07.3: enabled 0
650 12:54:30.281185 PCI: 00:08.0: enabled 1
651 12:54:30.281260 PCI: 00:09.0: enabled 0
652 12:54:30.284526 PCI: 00:0a.0: enabled 0
653 12:54:30.287814 PCI: 00:0d.0: enabled 1
654 12:54:30.291130 PCI: 00:0d.1: enabled 0
655 12:54:30.291240 PCI: 00:0d.2: enabled 0
656 12:54:30.294214 PCI: 00:0d.3: enabled 0
657 12:54:30.297484 PCI: 00:0e.0: enabled 0
658 12:54:30.300675 PCI: 00:10.2: enabled 1
659 12:54:30.300756 PCI: 00:10.6: enabled 0
660 12:54:30.303885 PCI: 00:10.7: enabled 0
661 12:54:30.307255 PCI: 00:12.0: enabled 0
662 12:54:30.310740 PCI: 00:12.6: enabled 0
663 12:54:30.310819 PCI: 00:13.0: enabled 0
664 12:54:30.314219 PCI: 00:14.0: enabled 1
665 12:54:30.317725 PCI: 00:14.1: enabled 0
666 12:54:30.320666 PCI: 00:14.2: enabled 1
667 12:54:30.320744 PCI: 00:14.3: enabled 1
668 12:54:30.324260 PCI: 00:15.0: enabled 1
669 12:54:30.327210 PCI: 00:15.1: enabled 1
670 12:54:30.327289 PCI: 00:15.2: enabled 1
671 12:54:30.330633 PCI: 00:15.3: enabled 1
672 12:54:30.334031 PCI: 00:16.0: enabled 1
673 12:54:30.337641 PCI: 00:16.1: enabled 0
674 12:54:30.337719 PCI: 00:16.2: enabled 0
675 12:54:30.340521 PCI: 00:16.3: enabled 0
676 12:54:30.344064 PCI: 00:16.4: enabled 0
677 12:54:30.346974 PCI: 00:16.5: enabled 0
678 12:54:30.347117 PCI: 00:17.0: enabled 1
679 12:54:30.350471 PCI: 00:19.0: enabled 0
680 12:54:30.353941 PCI: 00:19.1: enabled 1
681 12:54:30.357498 PCI: 00:19.2: enabled 0
682 12:54:30.357574 PCI: 00:1c.0: enabled 1
683 12:54:30.360329 PCI: 00:1c.1: enabled 0
684 12:54:30.363687 PCI: 00:1c.2: enabled 0
685 12:54:30.367193 PCI: 00:1c.3: enabled 0
686 12:54:30.367278 PCI: 00:1c.4: enabled 0
687 12:54:30.370158 PCI: 00:1c.5: enabled 0
688 12:54:30.373525 PCI: 00:1c.6: enabled 1
689 12:54:30.377184 PCI: 00:1c.7: enabled 0
690 12:54:30.377276 PCI: 00:1d.0: enabled 1
691 12:54:30.380700 PCI: 00:1d.1: enabled 0
692 12:54:30.383840 PCI: 00:1d.2: enabled 1
693 12:54:30.383920 PCI: 00:1d.3: enabled 0
694 12:54:30.387176 PCI: 00:1e.0: enabled 1
695 12:54:30.389989 PCI: 00:1e.1: enabled 0
696 12:54:30.393685 PCI: 00:1e.2: enabled 1
697 12:54:30.393767 PCI: 00:1e.3: enabled 1
698 12:54:30.396998 PCI: 00:1f.0: enabled 1
699 12:54:30.400245 PCI: 00:1f.1: enabled 0
700 12:54:30.403346 PCI: 00:1f.2: enabled 1
701 12:54:30.403425 PCI: 00:1f.3: enabled 1
702 12:54:30.406656 PCI: 00:1f.4: enabled 0
703 12:54:30.410190 PCI: 00:1f.5: enabled 1
704 12:54:30.413312 PCI: 00:1f.6: enabled 0
705 12:54:30.413447 PCI: 00:1f.7: enabled 0
706 12:54:30.416627 APIC: 00: enabled 1
707 12:54:30.420007 GENERIC: 0.0: enabled 1
708 12:54:30.420092 GENERIC: 0.0: enabled 1
709 12:54:30.422977 GENERIC: 1.0: enabled 1
710 12:54:30.426436 GENERIC: 0.0: enabled 1
711 12:54:30.430011 GENERIC: 1.0: enabled 1
712 12:54:30.430140 USB0 port 0: enabled 1
713 12:54:30.433005 GENERIC: 0.0: enabled 1
714 12:54:30.436383 USB0 port 0: enabled 1
715 12:54:30.439900 GENERIC: 0.0: enabled 1
716 12:54:30.439986 I2C: 00:1a: enabled 1
717 12:54:30.443258 I2C: 00:31: enabled 1
718 12:54:30.446419 I2C: 00:32: enabled 1
719 12:54:30.446498 I2C: 00:10: enabled 1
720 12:54:30.449812 I2C: 00:15: enabled 1
721 12:54:30.453554 GENERIC: 0.0: enabled 0
722 12:54:30.453637 GENERIC: 1.0: enabled 0
723 12:54:30.456238 GENERIC: 0.0: enabled 1
724 12:54:30.459630 SPI: 00: enabled 1
725 12:54:30.459719 SPI: 00: enabled 1
726 12:54:30.462890 PNP: 0c09.0: enabled 1
727 12:54:30.466057 GENERIC: 0.0: enabled 1
728 12:54:30.469524 USB3 port 0: enabled 1
729 12:54:30.469603 USB3 port 1: enabled 1
730 12:54:30.472505 USB3 port 2: enabled 0
731 12:54:30.475978 USB3 port 3: enabled 0
732 12:54:30.476099 USB2 port 0: enabled 0
733 12:54:30.479512 USB2 port 1: enabled 1
734 12:54:30.482649 USB2 port 2: enabled 1
735 12:54:30.482759 USB2 port 3: enabled 0
736 12:54:30.486255 USB2 port 4: enabled 1
737 12:54:30.489316 USB2 port 5: enabled 0
738 12:54:30.492531 USB2 port 6: enabled 0
739 12:54:30.492623 USB2 port 7: enabled 0
740 12:54:30.496086 USB2 port 8: enabled 0
741 12:54:30.499079 USB2 port 9: enabled 0
742 12:54:30.499168 USB3 port 0: enabled 0
743 12:54:30.502738 USB3 port 1: enabled 1
744 12:54:30.505824 USB3 port 2: enabled 0
745 12:54:30.509036 USB3 port 3: enabled 0
746 12:54:30.509115 GENERIC: 0.0: enabled 1
747 12:54:30.512228 GENERIC: 1.0: enabled 1
748 12:54:30.515608 APIC: 01: enabled 1
749 12:54:30.515685 APIC: 05: enabled 1
750 12:54:30.518865 APIC: 06: enabled 1
751 12:54:30.522596 APIC: 03: enabled 1
752 12:54:30.522682 APIC: 02: enabled 1
753 12:54:30.525702 APIC: 04: enabled 1
754 12:54:30.525777 APIC: 07: enabled 1
755 12:54:30.528979 Compare with tree...
756 12:54:30.532038 Root Device: enabled 1
757 12:54:30.535684 DOMAIN: 0000: enabled 1
758 12:54:30.535767 PCI: 00:00.0: enabled 1
759 12:54:30.538592 PCI: 00:02.0: enabled 1
760 12:54:30.541934 PCI: 00:04.0: enabled 1
761 12:54:30.545343 GENERIC: 0.0: enabled 1
762 12:54:30.548890 PCI: 00:05.0: enabled 1
763 12:54:30.548992 PCI: 00:06.0: enabled 0
764 12:54:30.551928 PCI: 00:07.0: enabled 0
765 12:54:30.555456 GENERIC: 0.0: enabled 1
766 12:54:30.558716 PCI: 00:07.1: enabled 0
767 12:54:30.562271 GENERIC: 1.0: enabled 1
768 12:54:30.562355 PCI: 00:07.2: enabled 0
769 12:54:30.565244 GENERIC: 0.0: enabled 1
770 12:54:30.568590 PCI: 00:07.3: enabled 0
771 12:54:30.572103 GENERIC: 1.0: enabled 1
772 12:54:30.575554 PCI: 00:08.0: enabled 1
773 12:54:30.575655 PCI: 00:09.0: enabled 0
774 12:54:30.578523 PCI: 00:0a.0: enabled 0
775 12:54:30.581973 PCI: 00:0d.0: enabled 1
776 12:54:30.585314 USB0 port 0: enabled 1
777 12:54:30.588241 USB3 port 0: enabled 1
778 12:54:30.588327 USB3 port 1: enabled 1
779 12:54:30.591708 USB3 port 2: enabled 0
780 12:54:30.594671 USB3 port 3: enabled 0
781 12:54:30.598428 PCI: 00:0d.1: enabled 0
782 12:54:30.601402 PCI: 00:0d.2: enabled 0
783 12:54:30.605014 GENERIC: 0.0: enabled 1
784 12:54:30.605099 PCI: 00:0d.3: enabled 0
785 12:54:30.608025 PCI: 00:0e.0: enabled 0
786 12:54:30.611622 PCI: 00:10.2: enabled 1
787 12:54:30.614808 PCI: 00:10.6: enabled 0
788 12:54:30.618084 PCI: 00:10.7: enabled 0
789 12:54:30.618164 PCI: 00:12.0: enabled 0
790 12:54:30.621318 PCI: 00:12.6: enabled 0
791 12:54:30.624649 PCI: 00:13.0: enabled 0
792 12:54:30.627856 PCI: 00:14.0: enabled 1
793 12:54:30.631017 USB0 port 0: enabled 1
794 12:54:30.631127 USB2 port 0: enabled 0
795 12:54:30.634708 USB2 port 1: enabled 1
796 12:54:30.637797 USB2 port 2: enabled 1
797 12:54:30.641307 USB2 port 3: enabled 0
798 12:54:30.644594 USB2 port 4: enabled 1
799 12:54:30.648114 USB2 port 5: enabled 0
800 12:54:30.648193 USB2 port 6: enabled 0
801 12:54:30.651099 USB2 port 7: enabled 0
802 12:54:30.654699 USB2 port 8: enabled 0
803 12:54:30.657602 USB2 port 9: enabled 0
804 12:54:30.661156 USB3 port 0: enabled 0
805 12:54:30.664137 USB3 port 1: enabled 1
806 12:54:30.664225 USB3 port 2: enabled 0
807 12:54:30.667463 USB3 port 3: enabled 0
808 12:54:30.671148 PCI: 00:14.1: enabled 0
809 12:54:30.674051 PCI: 00:14.2: enabled 1
810 12:54:30.677417 PCI: 00:14.3: enabled 1
811 12:54:30.677502 GENERIC: 0.0: enabled 1
812 12:54:30.680903 PCI: 00:15.0: enabled 1
813 12:54:30.683832 I2C: 00:1a: enabled 1
814 12:54:30.687679 I2C: 00:31: enabled 1
815 12:54:30.690661 I2C: 00:32: enabled 1
816 12:54:30.690752 PCI: 00:15.1: enabled 1
817 12:54:30.693769 I2C: 00:10: enabled 1
818 12:54:30.697164 PCI: 00:15.2: enabled 1
819 12:54:30.700527 PCI: 00:15.3: enabled 1
820 12:54:30.704655 PCI: 00:16.0: enabled 1
821 12:54:30.704742 PCI: 00:16.1: enabled 0
822 12:54:30.708216 PCI: 00:16.2: enabled 0
823 12:54:30.711755 PCI: 00:16.3: enabled 0
824 12:54:30.711834 PCI: 00:16.4: enabled 0
825 12:54:30.715450 PCI: 00:16.5: enabled 0
826 12:54:30.718192 PCI: 00:17.0: enabled 1
827 12:54:30.721596 PCI: 00:19.0: enabled 0
828 12:54:30.724877 PCI: 00:19.1: enabled 1
829 12:54:30.724955 I2C: 00:15: enabled 1
830 12:54:30.728185 PCI: 00:19.2: enabled 0
831 12:54:30.731340 PCI: 00:1d.0: enabled 1
832 12:54:30.734993 GENERIC: 0.0: enabled 1
833 12:54:30.738338 PCI: 00:1e.0: enabled 1
834 12:54:30.738421 PCI: 00:1e.1: enabled 0
835 12:54:30.741513 PCI: 00:1e.2: enabled 1
836 12:54:30.791579 SPI: 00: enabled 1
837 12:54:30.791706 PCI: 00:1e.3: enabled 1
838 12:54:30.791779 SPI: 00: enabled 1
839 12:54:30.792113 PCI: 00:1f.0: enabled 1
840 12:54:30.792252 PNP: 0c09.0: enabled 1
841 12:54:30.792519 PCI: 00:1f.1: enabled 0
842 12:54:30.792589 PCI: 00:1f.2: enabled 1
843 12:54:30.792704 GENERIC: 0.0: enabled 1
844 12:54:30.792771 GENERIC: 0.0: enabled 1
845 12:54:30.792833 GENERIC: 1.0: enabled 1
846 12:54:30.792899 PCI: 00:1f.3: enabled 1
847 12:54:30.792962 PCI: 00:1f.4: enabled 0
848 12:54:30.793335 PCI: 00:1f.5: enabled 1
849 12:54:30.793425 PCI: 00:1f.6: enabled 0
850 12:54:30.793932 PCI: 00:1f.7: enabled 0
851 12:54:30.794011 CPU_CLUSTER: 0: enabled 1
852 12:54:30.794072 APIC: 00: enabled 1
853 12:54:30.794715 APIC: 01: enabled 1
854 12:54:30.794810 APIC: 05: enabled 1
855 12:54:30.794873 APIC: 06: enabled 1
856 12:54:30.811218 APIC: 03: enabled 1
857 12:54:30.811303 APIC: 02: enabled 1
858 12:54:30.811552 APIC: 04: enabled 1
859 12:54:30.811623 APIC: 07: enabled 1
860 12:54:30.811686 Root Device scanning...
861 12:54:30.814418 scan_static_bus for Root Device
862 12:54:30.814495 DOMAIN: 0000 enabled
863 12:54:30.817758 CPU_CLUSTER: 0 enabled
864 12:54:30.817836 DOMAIN: 0000 scanning...
865 12:54:30.817900 PCI: pci_scan_bus for bus 00
866 12:54:30.821193 PCI: 00:00.0 [8086/0000] ops
867 12:54:30.824612 PCI: 00:00.0 [8086/9a12] enabled
868 12:54:30.827471 PCI: 00:02.0 [8086/0000] bus ops
869 12:54:30.831003 PCI: 00:02.0 [8086/9a40] enabled
870 12:54:30.834353 PCI: 00:04.0 [8086/0000] bus ops
871 12:54:30.837596 PCI: 00:04.0 [8086/9a03] enabled
872 12:54:30.840821 PCI: 00:05.0 [8086/9a19] enabled
873 12:54:30.844210 PCI: 00:07.0 [0000/0000] hidden
874 12:54:30.847044 PCI: 00:08.0 [8086/9a11] enabled
875 12:54:30.853767 PCI: 00:0a.0 [8086/9a0d] disabled
876 12:54:30.857041 PCI: 00:0d.0 [8086/0000] bus ops
877 12:54:30.860503 PCI: 00:0d.0 [8086/9a13] enabled
878 12:54:30.864062 PCI: 00:14.0 [8086/0000] bus ops
879 12:54:30.867033 PCI: 00:14.0 [8086/a0ed] enabled
880 12:54:30.870610 PCI: 00:14.2 [8086/a0ef] enabled
881 12:54:30.873635 PCI: 00:14.3 [8086/0000] bus ops
882 12:54:30.877226 PCI: 00:14.3 [8086/a0f0] enabled
883 12:54:30.880184 PCI: 00:15.0 [8086/0000] bus ops
884 12:54:30.883650 PCI: 00:15.0 [8086/a0e8] enabled
885 12:54:30.887045 PCI: 00:15.1 [8086/0000] bus ops
886 12:54:30.890495 PCI: 00:15.1 [8086/a0e9] enabled
887 12:54:30.893753 PCI: 00:15.2 [8086/0000] bus ops
888 12:54:30.896702 PCI: 00:15.2 [8086/a0ea] enabled
889 12:54:30.900191 PCI: 00:15.3 [8086/0000] bus ops
890 12:54:30.903076 PCI: 00:15.3 [8086/a0eb] enabled
891 12:54:30.906672 PCI: 00:16.0 [8086/0000] ops
892 12:54:30.910062 PCI: 00:16.0 [8086/a0e0] enabled
893 12:54:30.912907 PCI: Static device PCI: 00:17.0 not found, disabling it.
894 12:54:30.916432 PCI: 00:19.0 [8086/0000] bus ops
895 12:54:30.920024 PCI: 00:19.0 [8086/a0c5] disabled
896 12:54:30.922969 PCI: 00:19.1 [8086/0000] bus ops
897 12:54:30.926505 PCI: 00:19.1 [8086/a0c6] enabled
898 12:54:30.929945 PCI: 00:1d.0 [8086/0000] bus ops
899 12:54:30.932845 PCI: 00:1d.0 [8086/a0b0] enabled
900 12:54:30.936400 PCI: 00:1e.0 [8086/0000] ops
901 12:54:30.939448 PCI: 00:1e.0 [8086/a0a8] enabled
902 12:54:30.942629 PCI: 00:1e.2 [8086/0000] bus ops
903 12:54:30.946346 PCI: 00:1e.2 [8086/a0aa] enabled
904 12:54:30.949401 PCI: 00:1e.3 [8086/0000] bus ops
905 12:54:30.952692 PCI: 00:1e.3 [8086/a0ab] enabled
906 12:54:30.955936 PCI: 00:1f.0 [8086/0000] bus ops
907 12:54:30.959112 PCI: 00:1f.0 [8086/a087] enabled
908 12:54:30.962761 RTC Init
909 12:54:30.965570 Set power on after power failure.
910 12:54:30.965660 Disabling Deep S3
911 12:54:30.969465 Disabling Deep S3
912 12:54:30.972370 Disabling Deep S4
913 12:54:30.972454 Disabling Deep S4
914 12:54:30.975945 Disabling Deep S5
915 12:54:30.976032 Disabling Deep S5
916 12:54:30.978884 PCI: 00:1f.2 [0000/0000] hidden
917 12:54:30.982361 PCI: 00:1f.3 [8086/0000] bus ops
918 12:54:30.985757 PCI: 00:1f.3 [8086/a0c8] enabled
919 12:54:30.989229 PCI: 00:1f.5 [8086/0000] bus ops
920 12:54:30.992653 PCI: 00:1f.5 [8086/a0a4] enabled
921 12:54:30.995726 PCI: Leftover static devices:
922 12:54:30.999208 PCI: 00:10.2
923 12:54:30.999291 PCI: 00:10.6
924 12:54:30.999358 PCI: 00:10.7
925 12:54:31.002125 PCI: 00:06.0
926 12:54:31.002199 PCI: 00:07.1
927 12:54:31.005738 PCI: 00:07.2
928 12:54:31.005848 PCI: 00:07.3
929 12:54:31.008647 PCI: 00:09.0
930 12:54:31.008735 PCI: 00:0d.1
931 12:54:31.008801 PCI: 00:0d.2
932 12:54:31.012326 PCI: 00:0d.3
933 12:54:31.012413 PCI: 00:0e.0
934 12:54:31.015679 PCI: 00:12.0
935 12:54:31.015760 PCI: 00:12.6
936 12:54:31.015834 PCI: 00:13.0
937 12:54:31.018522 PCI: 00:14.1
938 12:54:31.018605 PCI: 00:16.1
939 12:54:31.022158 PCI: 00:16.2
940 12:54:31.022245 PCI: 00:16.3
941 12:54:31.025218 PCI: 00:16.4
942 12:54:31.025301 PCI: 00:16.5
943 12:54:31.025375 PCI: 00:17.0
944 12:54:31.028800 PCI: 00:19.2
945 12:54:31.028874 PCI: 00:1e.1
946 12:54:31.032181 PCI: 00:1f.1
947 12:54:31.032262 PCI: 00:1f.4
948 12:54:31.032324 PCI: 00:1f.6
949 12:54:31.035666 PCI: 00:1f.7
950 12:54:31.038609 PCI: Check your devicetree.cb.
951 12:54:31.042152 PCI: 00:02.0 scanning...
952 12:54:31.045134 scan_generic_bus for PCI: 00:02.0
953 12:54:31.048618 scan_generic_bus for PCI: 00:02.0 done
954 12:54:31.051934 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 12:54:31.055338 PCI: 00:04.0 scanning...
956 12:54:31.058504 scan_generic_bus for PCI: 00:04.0
957 12:54:31.061870 GENERIC: 0.0 enabled
958 12:54:31.068212 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 12:54:31.072015 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 12:54:31.075261 PCI: 00:0d.0 scanning...
961 12:54:31.078547 scan_static_bus for PCI: 00:0d.0
962 12:54:31.081550 USB0 port 0 enabled
963 12:54:31.081626 USB0 port 0 scanning...
964 12:54:31.084992 scan_static_bus for USB0 port 0
965 12:54:31.088466 USB3 port 0 enabled
966 12:54:31.091454 USB3 port 1 enabled
967 12:54:31.091567 USB3 port 2 disabled
968 12:54:31.094829 USB3 port 3 disabled
969 12:54:31.098165 USB3 port 0 scanning...
970 12:54:31.101680 scan_static_bus for USB3 port 0
971 12:54:31.104654 scan_static_bus for USB3 port 0 done
972 12:54:31.108236 scan_bus: bus USB3 port 0 finished in 6 msecs
973 12:54:31.111046 USB3 port 1 scanning...
974 12:54:31.114584 scan_static_bus for USB3 port 1
975 12:54:31.117829 scan_static_bus for USB3 port 1 done
976 12:54:31.121206 scan_bus: bus USB3 port 1 finished in 6 msecs
977 12:54:31.127766 scan_static_bus for USB0 port 0 done
978 12:54:31.131197 scan_bus: bus USB0 port 0 finished in 43 msecs
979 12:54:31.134748 scan_static_bus for PCI: 00:0d.0 done
980 12:54:31.140987 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 12:54:31.141096 PCI: 00:14.0 scanning...
982 12:54:31.144531 scan_static_bus for PCI: 00:14.0
983 12:54:31.148077 USB0 port 0 enabled
984 12:54:31.150931 USB0 port 0 scanning...
985 12:54:31.154334 scan_static_bus for USB0 port 0
986 12:54:31.157908 USB2 port 0 disabled
987 12:54:31.158013 USB2 port 1 enabled
988 12:54:31.160672 USB2 port 2 enabled
989 12:54:31.160778 USB2 port 3 disabled
990 12:54:31.164510 USB2 port 4 enabled
991 12:54:31.167805 USB2 port 5 disabled
992 12:54:31.167911 USB2 port 6 disabled
993 12:54:31.170990 USB2 port 7 disabled
994 12:54:31.174232 USB2 port 8 disabled
995 12:54:31.174338 USB2 port 9 disabled
996 12:54:31.177533 USB3 port 0 disabled
997 12:54:31.180594 USB3 port 1 enabled
998 12:54:31.180706 USB3 port 2 disabled
999 12:54:31.183938 USB3 port 3 disabled
1000 12:54:31.187198 USB2 port 1 scanning...
1001 12:54:31.190516 scan_static_bus for USB2 port 1
1002 12:54:31.194349 scan_static_bus for USB2 port 1 done
1003 12:54:31.197174 scan_bus: bus USB2 port 1 finished in 6 msecs
1004 12:54:31.200587 USB2 port 2 scanning...
1005 12:54:31.204119 scan_static_bus for USB2 port 2
1006 12:54:31.207123 scan_static_bus for USB2 port 2 done
1007 12:54:31.210685 scan_bus: bus USB2 port 2 finished in 6 msecs
1008 12:54:31.213692 USB2 port 4 scanning...
1009 12:54:31.217394 scan_static_bus for USB2 port 4
1010 12:54:31.220492 scan_static_bus for USB2 port 4 done
1011 12:54:31.227213 scan_bus: bus USB2 port 4 finished in 6 msecs
1012 12:54:31.227309 USB3 port 1 scanning...
1013 12:54:31.230734 scan_static_bus for USB3 port 1
1014 12:54:31.237244 scan_static_bus for USB3 port 1 done
1015 12:54:31.240216 scan_bus: bus USB3 port 1 finished in 6 msecs
1016 12:54:31.243505 scan_static_bus for USB0 port 0 done
1017 12:54:31.250089 scan_bus: bus USB0 port 0 finished in 93 msecs
1018 12:54:31.253646 scan_static_bus for PCI: 00:14.0 done
1019 12:54:31.257041 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1020 12:54:31.260468 PCI: 00:14.3 scanning...
1021 12:54:31.263342 scan_static_bus for PCI: 00:14.3
1022 12:54:31.266899 GENERIC: 0.0 enabled
1023 12:54:31.270273 scan_static_bus for PCI: 00:14.3 done
1024 12:54:31.273827 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1025 12:54:31.277334 PCI: 00:15.0 scanning...
1026 12:54:31.280562 scan_static_bus for PCI: 00:15.0
1027 12:54:31.283979 I2C: 00:1a enabled
1028 12:54:31.284065 I2C: 00:31 enabled
1029 12:54:31.287513 I2C: 00:32 enabled
1030 12:54:31.290763 scan_static_bus for PCI: 00:15.0 done
1031 12:54:31.293881 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1032 12:54:31.297273 PCI: 00:15.1 scanning...
1033 12:54:31.300501 scan_static_bus for PCI: 00:15.1
1034 12:54:31.304053 I2C: 00:10 enabled
1035 12:54:31.306775 scan_static_bus for PCI: 00:15.1 done
1036 12:54:31.310339 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1037 12:54:31.313952 PCI: 00:15.2 scanning...
1038 12:54:31.316848 scan_static_bus for PCI: 00:15.2
1039 12:54:31.320460 scan_static_bus for PCI: 00:15.2 done
1040 12:54:31.326723 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1041 12:54:31.326809 PCI: 00:15.3 scanning...
1042 12:54:31.330203 scan_static_bus for PCI: 00:15.3
1043 12:54:31.337367 scan_static_bus for PCI: 00:15.3 done
1044 12:54:31.340535 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1045 12:54:31.343763 PCI: 00:19.1 scanning...
1046 12:54:31.347039 scan_static_bus for PCI: 00:19.1
1047 12:54:31.350049 I2C: 00:15 enabled
1048 12:54:31.353546 scan_static_bus for PCI: 00:19.1 done
1049 12:54:31.357024 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1050 12:54:31.360398 PCI: 00:1d.0 scanning...
1051 12:54:31.363239 do_pci_scan_bridge for PCI: 00:1d.0
1052 12:54:31.366836 PCI: pci_scan_bus for bus 01
1053 12:54:31.369782 PCI: 01:00.0 [1c5c/174a] enabled
1054 12:54:31.373230 GENERIC: 0.0 enabled
1055 12:54:31.376315 Enabling Common Clock Configuration
1056 12:54:31.379787 L1 Sub-State supported from root port 29
1057 12:54:31.383218 L1 Sub-State Support = 0xf
1058 12:54:31.386569 CommonModeRestoreTime = 0x28
1059 12:54:31.389660 Power On Value = 0x16, Power On Scale = 0x0
1060 12:54:31.393725 ASPM: Enabled L1
1061 12:54:31.396538 PCIe: Max_Payload_Size adjusted to 128
1062 12:54:31.399870 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1063 12:54:31.402575 PCI: 00:1e.2 scanning...
1064 12:54:31.405985 scan_generic_bus for PCI: 00:1e.2
1065 12:54:31.409560 SPI: 00 enabled
1066 12:54:31.416087 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1067 12:54:31.419107 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1068 12:54:31.422793 PCI: 00:1e.3 scanning...
1069 12:54:31.426107 scan_generic_bus for PCI: 00:1e.3
1070 12:54:31.426199 SPI: 00 enabled
1071 12:54:31.432739 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1072 12:54:31.439201 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1073 12:54:31.439282 PCI: 00:1f.0 scanning...
1074 12:54:31.442778 scan_static_bus for PCI: 00:1f.0
1075 12:54:31.445795 PNP: 0c09.0 enabled
1076 12:54:31.449197 PNP: 0c09.0 scanning...
1077 12:54:31.452638 scan_static_bus for PNP: 0c09.0
1078 12:54:31.455640 scan_static_bus for PNP: 0c09.0 done
1079 12:54:31.459152 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1080 12:54:31.465513 scan_static_bus for PCI: 00:1f.0 done
1081 12:54:31.468986 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1082 12:54:31.471932 PCI: 00:1f.2 scanning...
1083 12:54:31.475552 scan_static_bus for PCI: 00:1f.2
1084 12:54:31.478427 GENERIC: 0.0 enabled
1085 12:54:31.478505 GENERIC: 0.0 scanning...
1086 12:54:31.481883 scan_static_bus for GENERIC: 0.0
1087 12:54:31.485402 GENERIC: 0.0 enabled
1088 12:54:31.488930 GENERIC: 1.0 enabled
1089 12:54:31.491717 scan_static_bus for GENERIC: 0.0 done
1090 12:54:31.495047 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1091 12:54:31.498418 scan_static_bus for PCI: 00:1f.2 done
1092 12:54:31.505314 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1093 12:54:31.508130 PCI: 00:1f.3 scanning...
1094 12:54:31.511605 scan_static_bus for PCI: 00:1f.3
1095 12:54:31.514873 scan_static_bus for PCI: 00:1f.3 done
1096 12:54:31.518137 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1097 12:54:31.521846 PCI: 00:1f.5 scanning...
1098 12:54:31.525111 scan_generic_bus for PCI: 00:1f.5
1099 12:54:31.527856 scan_generic_bus for PCI: 00:1f.5 done
1100 12:54:31.535072 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1101 12:54:31.537794 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1102 12:54:31.541557 scan_static_bus for Root Device done
1103 12:54:31.548079 scan_bus: bus Root Device finished in 737 msecs
1104 12:54:31.548167 done
1105 12:54:31.554445 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1106 12:54:31.557998 Chrome EC: UHEPI supported
1107 12:54:31.564456 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1108 12:54:31.570799 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1109 12:54:31.574307 SPI flash protection: WPSW=0 SRP0=0
1110 12:54:31.577252 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1111 12:54:31.584098 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1112 12:54:31.587098 found VGA at PCI: 00:02.0
1113 12:54:31.590662 Setting up VGA for PCI: 00:02.0
1114 12:54:31.594208 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1115 12:54:31.601074 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1116 12:54:31.603695 Allocating resources...
1117 12:54:31.603776 Reading resources...
1118 12:54:31.610668 Root Device read_resources bus 0 link: 0
1119 12:54:31.613640 DOMAIN: 0000 read_resources bus 0 link: 0
1120 12:54:31.617290 PCI: 00:04.0 read_resources bus 1 link: 0
1121 12:54:31.624136 PCI: 00:04.0 read_resources bus 1 link: 0 done
1122 12:54:31.627544 PCI: 00:0d.0 read_resources bus 0 link: 0
1123 12:54:31.634220 USB0 port 0 read_resources bus 0 link: 0
1124 12:54:31.637108 USB0 port 0 read_resources bus 0 link: 0 done
1125 12:54:31.644117 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1126 12:54:31.647182 PCI: 00:14.0 read_resources bus 0 link: 0
1127 12:54:31.653542 USB0 port 0 read_resources bus 0 link: 0
1128 12:54:31.657164 USB0 port 0 read_resources bus 0 link: 0 done
1129 12:54:31.663589 PCI: 00:14.0 read_resources bus 0 link: 0 done
1130 12:54:31.667095 PCI: 00:14.3 read_resources bus 0 link: 0
1131 12:54:31.673531 PCI: 00:14.3 read_resources bus 0 link: 0 done
1132 12:54:31.677104 PCI: 00:15.0 read_resources bus 0 link: 0
1133 12:54:31.683544 PCI: 00:15.0 read_resources bus 0 link: 0 done
1134 12:54:31.686584 PCI: 00:15.1 read_resources bus 0 link: 0
1135 12:54:31.693445 PCI: 00:15.1 read_resources bus 0 link: 0 done
1136 12:54:31.696915 PCI: 00:19.1 read_resources bus 0 link: 0
1137 12:54:31.703567 PCI: 00:19.1 read_resources bus 0 link: 0 done
1138 12:54:31.706929 PCI: 00:1d.0 read_resources bus 1 link: 0
1139 12:54:31.713618 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1140 12:54:31.717133 PCI: 00:1e.2 read_resources bus 2 link: 0
1141 12:54:31.723858 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1142 12:54:31.727237 PCI: 00:1e.3 read_resources bus 3 link: 0
1143 12:54:31.733402 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1144 12:54:31.736714 PCI: 00:1f.0 read_resources bus 0 link: 0
1145 12:54:31.743358 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1146 12:54:31.746734 PCI: 00:1f.2 read_resources bus 0 link: 0
1147 12:54:31.750279 GENERIC: 0.0 read_resources bus 0 link: 0
1148 12:54:31.757289 GENERIC: 0.0 read_resources bus 0 link: 0 done
1149 12:54:31.760274 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1150 12:54:31.767803 DOMAIN: 0000 read_resources bus 0 link: 0 done
1151 12:54:31.770839 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1152 12:54:31.777290 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1153 12:54:31.780796 Root Device read_resources bus 0 link: 0 done
1154 12:54:31.784333 Done reading resources.
1155 12:54:31.790909 Show resources in subtree (Root Device)...After reading.
1156 12:54:31.794261 Root Device child on link 0 DOMAIN: 0000
1157 12:54:31.797328 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1158 12:54:31.807514 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1159 12:54:31.817200 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1160 12:54:31.820551 PCI: 00:00.0
1161 12:54:31.830309 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1162 12:54:31.840740 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1163 12:54:31.846911 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1164 12:54:31.856597 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1165 12:54:31.866622 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1166 12:54:31.876669 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1167 12:54:31.886528 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1168 12:54:31.896278 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1169 12:54:31.903257 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1170 12:54:31.913104 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1171 12:54:31.922955 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1172 12:54:31.933020 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1173 12:54:31.943092 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1174 12:54:31.949132 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1175 12:54:31.959272 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1176 12:54:31.969259 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1177 12:54:31.979235 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1178 12:54:31.989287 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1179 12:54:31.998795 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1180 12:54:32.008506 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1181 12:54:32.008667 PCI: 00:02.0
1182 12:54:32.018398 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 12:54:32.031855 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1184 12:54:32.038393 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1185 12:54:32.041899 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1186 12:54:32.051576 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1187 12:54:32.054962 GENERIC: 0.0
1188 12:54:32.058314 PCI: 00:05.0
1189 12:54:32.068351 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 12:54:32.071458 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1191 12:54:32.071570 GENERIC: 0.0
1192 12:54:32.074779 PCI: 00:08.0
1193 12:54:32.084847 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:54:32.088327 PCI: 00:0a.0
1195 12:54:32.091337 PCI: 00:0d.0 child on link 0 USB0 port 0
1196 12:54:32.101202 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 12:54:32.104483 USB0 port 0 child on link 0 USB3 port 0
1198 12:54:32.107825 USB3 port 0
1199 12:54:32.107933 USB3 port 1
1200 12:54:32.111366 USB3 port 2
1201 12:54:32.111443 USB3 port 3
1202 12:54:32.117727 PCI: 00:14.0 child on link 0 USB0 port 0
1203 12:54:32.127938 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 12:54:32.130809 USB0 port 0 child on link 0 USB2 port 0
1205 12:54:32.134277 USB2 port 0
1206 12:54:32.134359 USB2 port 1
1207 12:54:32.137259 USB2 port 2
1208 12:54:32.137364 USB2 port 3
1209 12:54:32.140751 USB2 port 4
1210 12:54:32.140850 USB2 port 5
1211 12:54:32.144258 USB2 port 6
1212 12:54:32.144362 USB2 port 7
1213 12:54:32.147219 USB2 port 8
1214 12:54:32.147322 USB2 port 9
1215 12:54:32.151048 USB3 port 0
1216 12:54:32.153830 USB3 port 1
1217 12:54:32.153944 USB3 port 2
1218 12:54:32.157413 USB3 port 3
1219 12:54:32.157540 PCI: 00:14.2
1220 12:54:32.167453 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 12:54:32.177359 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 12:54:32.180121 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1223 12:54:32.190343 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 12:54:32.193904 GENERIC: 0.0
1225 12:54:32.196680 PCI: 00:15.0 child on link 0 I2C: 00:1a
1226 12:54:32.206659 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 12:54:32.209937 I2C: 00:1a
1228 12:54:32.210025 I2C: 00:31
1229 12:54:32.213269 I2C: 00:32
1230 12:54:32.216581 PCI: 00:15.1 child on link 0 I2C: 00:10
1231 12:54:32.226903 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 12:54:32.229739 I2C: 00:10
1233 12:54:32.229823 PCI: 00:15.2
1234 12:54:32.239902 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 12:54:32.243114 PCI: 00:15.3
1236 12:54:32.253069 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 12:54:32.253169 PCI: 00:16.0
1238 12:54:32.263364 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 12:54:32.266167 PCI: 00:19.0
1240 12:54:32.269449 PCI: 00:19.1 child on link 0 I2C: 00:15
1241 12:54:32.279581 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 12:54:32.279694 I2C: 00:15
1243 12:54:32.286330 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1244 12:54:32.292685 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1245 12:54:32.302459 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1246 12:54:32.312299 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1247 12:54:32.315680 GENERIC: 0.0
1248 12:54:32.315767 PCI: 01:00.0
1249 12:54:32.325828 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 12:54:32.335703 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1251 12:54:32.345576 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1252 12:54:32.345665 PCI: 00:1e.0
1253 12:54:32.358809 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 12:54:32.362331 PCI: 00:1e.2 child on link 0 SPI: 00
1255 12:54:32.371866 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 12:54:32.371967 SPI: 00
1257 12:54:32.375199 PCI: 00:1e.3 child on link 0 SPI: 00
1258 12:54:32.385428 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 12:54:32.388648 SPI: 00
1260 12:54:32.391785 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 12:54:32.401735 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 12:54:32.401825 PNP: 0c09.0
1263 12:54:32.411652 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 12:54:32.415055 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 12:54:32.424988 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 12:54:32.434935 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 12:54:32.437990 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 12:54:32.441298 GENERIC: 0.0
1269 12:54:32.444944 GENERIC: 1.0
1270 12:54:32.445028 PCI: 00:1f.3
1271 12:54:32.455192 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 12:54:32.464327 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 12:54:32.467979 PCI: 00:1f.5
1274 12:54:32.474433 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 12:54:32.480914 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 12:54:32.481012 APIC: 00
1277 12:54:32.481097 APIC: 01
1278 12:54:32.484765 APIC: 05
1279 12:54:32.484848 APIC: 06
1280 12:54:32.487516 APIC: 03
1281 12:54:32.487600 APIC: 02
1282 12:54:32.487681 APIC: 04
1283 12:54:32.491306 APIC: 07
1284 12:54:32.497882 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 12:54:32.504146 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 12:54:32.511141 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 12:54:32.514146 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 12:54:32.521090 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 12:54:32.524055 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1290 12:54:32.527573 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1291 12:54:32.534204 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1292 12:54:32.544122 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1293 12:54:32.550902 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1294 12:54:32.557235 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1295 12:54:32.563850 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1296 12:54:32.570697 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1297 12:54:32.580226 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1298 12:54:32.587140 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1299 12:54:32.590559 DOMAIN: 0000: Resource ranges:
1300 12:54:32.593361 * Base: 1000, Size: 800, Tag: 100
1301 12:54:32.596652 * Base: 1900, Size: e700, Tag: 100
1302 12:54:32.603702 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1303 12:54:32.610063 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1304 12:54:32.616779 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1305 12:54:32.623182 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1306 12:54:32.630169 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1307 12:54:32.640187 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1308 12:54:32.646780 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1309 12:54:32.653217 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1310 12:54:32.663188 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1311 12:54:32.669683 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1312 12:54:32.676030 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1313 12:54:32.685923 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1314 12:54:32.692823 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1315 12:54:32.699376 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1316 12:54:32.709451 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1317 12:54:32.716008 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1318 12:54:32.722438 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1319 12:54:32.732453 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1320 12:54:32.739008 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1321 12:54:32.745938 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1322 12:54:32.755720 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1323 12:54:32.762209 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1324 12:54:32.768671 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1325 12:54:32.778579 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1326 12:54:32.785637 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1327 12:54:32.788612 DOMAIN: 0000: Resource ranges:
1328 12:54:32.792081 * Base: 7fc00000, Size: 40400000, Tag: 200
1329 12:54:32.798390 * Base: d0000000, Size: 28000000, Tag: 200
1330 12:54:32.801919 * Base: fa000000, Size: 1000000, Tag: 200
1331 12:54:32.805396 * Base: fb001000, Size: 2fff000, Tag: 200
1332 12:54:32.811694 * Base: fe010000, Size: 2e000, Tag: 200
1333 12:54:32.815048 * Base: fe03f000, Size: d41000, Tag: 200
1334 12:54:32.818461 * Base: fed88000, Size: 8000, Tag: 200
1335 12:54:32.822083 * Base: fed93000, Size: d000, Tag: 200
1336 12:54:32.825010 * Base: feda2000, Size: 1e000, Tag: 200
1337 12:54:32.831791 * Base: fede0000, Size: 1220000, Tag: 200
1338 12:54:32.835414 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1339 12:54:32.841494 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1340 12:54:32.848255 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1341 12:54:32.854910 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1342 12:54:32.861735 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1343 12:54:32.868173 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1344 12:54:32.874623 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1345 12:54:32.881488 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1346 12:54:32.888111 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1347 12:54:32.894645 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1348 12:54:32.900925 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1349 12:54:32.907485 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1350 12:54:32.914201 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1351 12:54:32.921153 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1352 12:54:32.928007 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1353 12:54:32.934540 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1354 12:54:32.940612 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1355 12:54:32.947428 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1356 12:54:32.954124 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1357 12:54:32.963669 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1358 12:54:32.970510 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1359 12:54:32.977071 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1360 12:54:32.984011 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1361 12:54:32.990106 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1362 12:54:32.996791 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1363 12:54:33.000301 PCI: 00:1d.0: Resource ranges:
1364 12:54:33.003715 * Base: 7fc00000, Size: 100000, Tag: 200
1365 12:54:33.010184 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1366 12:54:33.016476 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1367 12:54:33.023473 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1368 12:54:33.033394 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1369 12:54:33.040045 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1370 12:54:33.042990 Root Device assign_resources, bus 0 link: 0
1371 12:54:33.049901 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 12:54:33.056638 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1373 12:54:33.066806 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1374 12:54:33.073108 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1375 12:54:33.082692 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1376 12:54:33.086181 PCI: 00:04.0 assign_resources, bus 1 link: 0
1377 12:54:33.092635 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 12:54:33.099177 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1379 12:54:33.109088 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1380 12:54:33.116076 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1381 12:54:33.118952 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1382 12:54:33.125703 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 12:54:33.132125 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1384 12:54:33.139030 PCI: 00:14.0 assign_resources, bus 0 link: 0
1385 12:54:33.141974 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 12:54:33.151881 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1387 12:54:33.158395 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1388 12:54:33.168382 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1389 12:54:33.171791 PCI: 00:14.3 assign_resources, bus 0 link: 0
1390 12:54:33.174948 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 12:54:33.185023 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1392 12:54:33.188612 PCI: 00:15.0 assign_resources, bus 0 link: 0
1393 12:54:33.194943 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 12:54:33.201608 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1395 12:54:33.207931 PCI: 00:15.1 assign_resources, bus 0 link: 0
1396 12:54:33.211418 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 12:54:33.221597 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1398 12:54:33.227941 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1399 12:54:33.238109 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1400 12:54:33.244511 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1401 12:54:33.247878 PCI: 00:19.1 assign_resources, bus 0 link: 0
1402 12:54:33.254493 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 12:54:33.260807 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1404 12:54:33.270956 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1405 12:54:33.280970 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1406 12:54:33.284044 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1407 12:54:33.293756 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1408 12:54:33.300864 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1409 12:54:33.310322 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1410 12:54:33.313727 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1411 12:54:33.324118 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1412 12:54:33.327152 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1413 12:54:33.330631 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 12:54:33.340731 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1415 12:54:33.343604 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1416 12:54:33.350290 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 12:54:33.353717 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1418 12:54:33.359936 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 12:54:33.363558 LPC: Trying to open IO window from 800 size 1ff
1420 12:54:33.373602 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1421 12:54:33.379913 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1422 12:54:33.389856 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1423 12:54:33.392876 DOMAIN: 0000 assign_resources, bus 0 link: 0
1424 12:54:33.396399 Root Device assign_resources, bus 0 link: 0
1425 12:54:33.399779 Done setting resources.
1426 12:54:33.406379 Show resources in subtree (Root Device)...After assigning values.
1427 12:54:33.409853 Root Device child on link 0 DOMAIN: 0000
1428 12:54:33.416303 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1429 12:54:33.423219 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1430 12:54:33.432861 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1431 12:54:33.436177 PCI: 00:00.0
1432 12:54:33.446293 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1433 12:54:33.456231 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1434 12:54:33.465769 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1435 12:54:33.472623 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1436 12:54:33.482754 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1437 12:54:33.492421 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1438 12:54:33.502467 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1439 12:54:33.512441 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1440 12:54:33.522588 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1441 12:54:33.528647 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1442 12:54:33.538791 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1443 12:54:33.548596 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1444 12:54:33.558954 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1445 12:54:33.565275 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1446 12:54:33.575375 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1447 12:54:33.585269 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1448 12:54:33.595024 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1449 12:54:33.604994 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1450 12:54:33.614891 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1451 12:54:33.625260 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1452 12:54:33.625353 PCI: 00:02.0
1453 12:54:33.638415 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1454 12:54:33.648259 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1455 12:54:33.658239 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1456 12:54:33.661234 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1457 12:54:33.671228 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1458 12:54:33.674670 GENERIC: 0.0
1459 12:54:33.674758 PCI: 00:05.0
1460 12:54:33.684325 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1461 12:54:33.690947 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1462 12:54:33.691069 GENERIC: 0.0
1463 12:54:33.694333 PCI: 00:08.0
1464 12:54:33.704242 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1465 12:54:33.704351 PCI: 00:0a.0
1466 12:54:33.711223 PCI: 00:0d.0 child on link 0 USB0 port 0
1467 12:54:33.721296 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1468 12:54:33.724359 USB0 port 0 child on link 0 USB3 port 0
1469 12:54:33.727976 USB3 port 0
1470 12:54:33.728063 USB3 port 1
1471 12:54:33.730965 USB3 port 2
1472 12:54:33.731096 USB3 port 3
1473 12:54:33.737678 PCI: 00:14.0 child on link 0 USB0 port 0
1474 12:54:33.747756 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1475 12:54:33.751040 USB0 port 0 child on link 0 USB2 port 0
1476 12:54:33.753907 USB2 port 0
1477 12:54:33.753985 USB2 port 1
1478 12:54:33.757395 USB2 port 2
1479 12:54:33.757469 USB2 port 3
1480 12:54:33.760957 USB2 port 4
1481 12:54:33.761031 USB2 port 5
1482 12:54:33.763845 USB2 port 6
1483 12:54:33.763945 USB2 port 7
1484 12:54:33.767373 USB2 port 8
1485 12:54:33.767447 USB2 port 9
1486 12:54:33.770968 USB3 port 0
1487 12:54:33.771091 USB3 port 1
1488 12:54:33.773870 USB3 port 2
1489 12:54:33.777353 USB3 port 3
1490 12:54:33.777425 PCI: 00:14.2
1491 12:54:33.787011 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1492 12:54:33.797116 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1493 12:54:33.803653 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1494 12:54:33.813842 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1495 12:54:33.813934 GENERIC: 0.0
1496 12:54:33.820122 PCI: 00:15.0 child on link 0 I2C: 00:1a
1497 12:54:33.830377 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1498 12:54:33.830464 I2C: 00:1a
1499 12:54:33.833285 I2C: 00:31
1500 12:54:33.833369 I2C: 00:32
1501 12:54:33.840112 PCI: 00:15.1 child on link 0 I2C: 00:10
1502 12:54:33.850110 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1503 12:54:33.850195 I2C: 00:10
1504 12:54:33.853384 PCI: 00:15.2
1505 12:54:33.863074 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1506 12:54:33.863181 PCI: 00:15.3
1507 12:54:33.873135 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1508 12:54:33.876343 PCI: 00:16.0
1509 12:54:33.886289 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1510 12:54:33.889698 PCI: 00:19.0
1511 12:54:33.892534 PCI: 00:19.1 child on link 0 I2C: 00:15
1512 12:54:33.902612 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1513 12:54:33.902707 I2C: 00:15
1514 12:54:33.909462 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1515 12:54:33.919402 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1516 12:54:33.929476 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1517 12:54:33.938983 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1518 12:54:33.942363 GENERIC: 0.0
1519 12:54:33.942449 PCI: 01:00.0
1520 12:54:33.955733 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1521 12:54:33.965707 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1522 12:54:33.975650 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1523 12:54:33.975735 PCI: 00:1e.0
1524 12:54:33.988371 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1525 12:54:33.991917 PCI: 00:1e.2 child on link 0 SPI: 00
1526 12:54:34.001934 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1527 12:54:34.002027 SPI: 00
1528 12:54:34.008688 PCI: 00:1e.3 child on link 0 SPI: 00
1529 12:54:34.018564 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1530 12:54:34.018653 SPI: 00
1531 12:54:34.024650 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1532 12:54:34.031684 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1533 12:54:34.034604 PNP: 0c09.0
1534 12:54:34.041205 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1535 12:54:34.048126 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1536 12:54:34.057726 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1537 12:54:34.064260 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1538 12:54:34.070965 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1539 12:54:34.071111 GENERIC: 0.0
1540 12:54:34.074636 GENERIC: 1.0
1541 12:54:34.074737 PCI: 00:1f.3
1542 12:54:34.084565 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1543 12:54:34.097689 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1544 12:54:34.097824 PCI: 00:1f.5
1545 12:54:34.107756 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1546 12:54:34.113776 CPU_CLUSTER: 0 child on link 0 APIC: 00
1547 12:54:34.113866 APIC: 00
1548 12:54:34.113934 APIC: 01
1549 12:54:34.117115 APIC: 05
1550 12:54:34.117196 APIC: 06
1551 12:54:34.120814 APIC: 03
1552 12:54:34.120890 APIC: 02
1553 12:54:34.120955 APIC: 04
1554 12:54:34.124197 APIC: 07
1555 12:54:34.124282 Done allocating resources.
1556 12:54:34.130790 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1557 12:54:34.137065 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1558 12:54:34.140559 Configure GPIOs for I2S audio on UP4.
1559 12:54:34.148213 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1560 12:54:34.151511 Enabling resources...
1561 12:54:34.154488 PCI: 00:00.0 subsystem <- 8086/9a12
1562 12:54:34.158049 PCI: 00:00.0 cmd <- 06
1563 12:54:34.161589 PCI: 00:02.0 subsystem <- 8086/9a40
1564 12:54:34.164423 PCI: 00:02.0 cmd <- 03
1565 12:54:34.167649 PCI: 00:04.0 subsystem <- 8086/9a03
1566 12:54:34.170981 PCI: 00:04.0 cmd <- 02
1567 12:54:34.174212 PCI: 00:05.0 subsystem <- 8086/9a19
1568 12:54:34.174291 PCI: 00:05.0 cmd <- 02
1569 12:54:34.181265 PCI: 00:08.0 subsystem <- 8086/9a11
1570 12:54:34.181342 PCI: 00:08.0 cmd <- 06
1571 12:54:34.184142 PCI: 00:0d.0 subsystem <- 8086/9a13
1572 12:54:34.187831 PCI: 00:0d.0 cmd <- 02
1573 12:54:34.191268 PCI: 00:14.0 subsystem <- 8086/a0ed
1574 12:54:34.194220 PCI: 00:14.0 cmd <- 02
1575 12:54:34.197768 PCI: 00:14.2 subsystem <- 8086/a0ef
1576 12:54:34.200666 PCI: 00:14.2 cmd <- 02
1577 12:54:34.204277 PCI: 00:14.3 subsystem <- 8086/a0f0
1578 12:54:34.207255 PCI: 00:14.3 cmd <- 02
1579 12:54:34.210770 PCI: 00:15.0 subsystem <- 8086/a0e8
1580 12:54:34.214303 PCI: 00:15.0 cmd <- 02
1581 12:54:34.217254 PCI: 00:15.1 subsystem <- 8086/a0e9
1582 12:54:34.220497 PCI: 00:15.1 cmd <- 02
1583 12:54:34.224069 PCI: 00:15.2 subsystem <- 8086/a0ea
1584 12:54:34.224146 PCI: 00:15.2 cmd <- 02
1585 12:54:34.230856 PCI: 00:15.3 subsystem <- 8086/a0eb
1586 12:54:34.230936 PCI: 00:15.3 cmd <- 02
1587 12:54:34.233990 PCI: 00:16.0 subsystem <- 8086/a0e0
1588 12:54:34.237178 PCI: 00:16.0 cmd <- 02
1589 12:54:34.240792 PCI: 00:19.1 subsystem <- 8086/a0c6
1590 12:54:34.243768 PCI: 00:19.1 cmd <- 02
1591 12:54:34.247225 PCI: 00:1d.0 bridge ctrl <- 0013
1592 12:54:34.250845 PCI: 00:1d.0 subsystem <- 8086/a0b0
1593 12:54:34.253791 PCI: 00:1d.0 cmd <- 06
1594 12:54:34.257239 PCI: 00:1e.0 subsystem <- 8086/a0a8
1595 12:54:34.260237 PCI: 00:1e.0 cmd <- 06
1596 12:54:34.263849 PCI: 00:1e.2 subsystem <- 8086/a0aa
1597 12:54:34.266797 PCI: 00:1e.2 cmd <- 06
1598 12:54:34.270191 PCI: 00:1e.3 subsystem <- 8086/a0ab
1599 12:54:34.273501 PCI: 00:1e.3 cmd <- 02
1600 12:54:34.277007 PCI: 00:1f.0 subsystem <- 8086/a087
1601 12:54:34.280073 PCI: 00:1f.0 cmd <- 407
1602 12:54:34.283573 PCI: 00:1f.3 subsystem <- 8086/a0c8
1603 12:54:34.283693 PCI: 00:1f.3 cmd <- 02
1604 12:54:34.290155 PCI: 00:1f.5 subsystem <- 8086/a0a4
1605 12:54:34.290233 PCI: 00:1f.5 cmd <- 406
1606 12:54:34.295376 PCI: 01:00.0 cmd <- 02
1607 12:54:34.300111 done.
1608 12:54:34.303623 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1609 12:54:34.306435 Initializing devices...
1610 12:54:34.309917 Root Device init
1611 12:54:34.313333 Chrome EC: Set SMI mask to 0x0000000000000000
1612 12:54:34.319852 Chrome EC: clear events_b mask to 0x0000000000000000
1613 12:54:34.326552 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1614 12:54:34.329367 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1615 12:54:34.336424 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1616 12:54:34.342763 Chrome EC: Set WAKE mask to 0x0000000000000000
1617 12:54:34.346561 fw_config match found: DB_USB=USB3_ACTIVE
1618 12:54:34.353101 Configure Right Type-C port orientation for retimer
1619 12:54:34.356196 Root Device init finished in 44 msecs
1620 12:54:34.359558 PCI: 00:00.0 init
1621 12:54:34.362950 CPU TDP = 9 Watts
1622 12:54:34.363068 CPU PL1 = 9 Watts
1623 12:54:34.365929 CPU PL2 = 40 Watts
1624 12:54:34.369590 CPU PL4 = 83 Watts
1625 12:54:34.372482 PCI: 00:00.0 init finished in 8 msecs
1626 12:54:34.372583 PCI: 00:02.0 init
1627 12:54:34.375981 GMA: Found VBT in CBFS
1628 12:54:34.379194 GMA: Found valid VBT in CBFS
1629 12:54:34.385995 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1630 12:54:34.392378 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1631 12:54:34.395837 PCI: 00:02.0 init finished in 18 msecs
1632 12:54:34.399454 PCI: 00:05.0 init
1633 12:54:34.402351 PCI: 00:05.0 init finished in 0 msecs
1634 12:54:34.405900 PCI: 00:08.0 init
1635 12:54:34.408793 PCI: 00:08.0 init finished in 0 msecs
1636 12:54:34.412453 PCI: 00:14.0 init
1637 12:54:34.415473 PCI: 00:14.0 init finished in 0 msecs
1638 12:54:34.418979 PCI: 00:14.2 init
1639 12:54:34.422700 PCI: 00:14.2 init finished in 0 msecs
1640 12:54:34.425576 PCI: 00:15.0 init
1641 12:54:34.429085 I2C bus 0 version 0x3230302a
1642 12:54:34.432479 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1643 12:54:34.435791 PCI: 00:15.0 init finished in 6 msecs
1644 12:54:34.435907 PCI: 00:15.1 init
1645 12:54:34.438888 I2C bus 1 version 0x3230302a
1646 12:54:34.442207 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1647 12:54:34.448589 PCI: 00:15.1 init finished in 6 msecs
1648 12:54:34.448702 PCI: 00:15.2 init
1649 12:54:34.451838 I2C bus 2 version 0x3230302a
1650 12:54:34.455091 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1651 12:54:34.458482 PCI: 00:15.2 init finished in 6 msecs
1652 12:54:34.461921 PCI: 00:15.3 init
1653 12:54:34.465420 I2C bus 3 version 0x3230302a
1654 12:54:34.468893 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1655 12:54:34.472349 PCI: 00:15.3 init finished in 6 msecs
1656 12:54:34.475379 PCI: 00:16.0 init
1657 12:54:34.478794 PCI: 00:16.0 init finished in 0 msecs
1658 12:54:34.482140 PCI: 00:19.1 init
1659 12:54:34.485571 I2C bus 5 version 0x3230302a
1660 12:54:34.488862 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1661 12:54:34.492171 PCI: 00:19.1 init finished in 6 msecs
1662 12:54:34.495280 PCI: 00:1d.0 init
1663 12:54:34.495395 Initializing PCH PCIe bridge.
1664 12:54:34.501710 PCI: 00:1d.0 init finished in 3 msecs
1665 12:54:34.505291 PCI: 00:1f.0 init
1666 12:54:34.508413 IOAPIC: Initializing IOAPIC at 0xfec00000
1667 12:54:34.511694 IOAPIC: Bootstrap Processor Local APIC = 0x00
1668 12:54:34.515221 IOAPIC: ID = 0x02
1669 12:54:34.518147 IOAPIC: Dumping registers
1670 12:54:34.518256 reg 0x0000: 0x02000000
1671 12:54:34.521750 reg 0x0001: 0x00770020
1672 12:54:34.524703 reg 0x0002: 0x00000000
1673 12:54:34.528117 PCI: 00:1f.0 init finished in 21 msecs
1674 12:54:34.531715 PCI: 00:1f.2 init
1675 12:54:34.535110 Disabling ACPI via APMC.
1676 12:54:34.535218 APMC done.
1677 12:54:34.541878 PCI: 00:1f.2 init finished in 5 msecs
1678 12:54:34.552228 PCI: 01:00.0 init
1679 12:54:34.555359 PCI: 01:00.0 init finished in 0 msecs
1680 12:54:34.558846 PNP: 0c09.0 init
1681 12:54:34.561914 Google Chrome EC uptime: 8.457 seconds
1682 12:54:34.569035 Google Chrome AP resets since EC boot: 1
1683 12:54:34.571848 Google Chrome most recent AP reset causes:
1684 12:54:34.575332 0.381: 32775 shutdown: entering G3
1685 12:54:34.581753 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1686 12:54:34.585147 PNP: 0c09.0 init finished in 22 msecs
1687 12:54:34.591210 Devices initialized
1688 12:54:34.594493 Show all devs... After init.
1689 12:54:34.597575 Root Device: enabled 1
1690 12:54:34.597684 DOMAIN: 0000: enabled 1
1691 12:54:34.601039 CPU_CLUSTER: 0: enabled 1
1692 12:54:34.604644 PCI: 00:00.0: enabled 1
1693 12:54:34.607666 PCI: 00:02.0: enabled 1
1694 12:54:34.607769 PCI: 00:04.0: enabled 1
1695 12:54:34.610717 PCI: 00:05.0: enabled 1
1696 12:54:34.614208 PCI: 00:06.0: enabled 0
1697 12:54:34.617738 PCI: 00:07.0: enabled 0
1698 12:54:34.617843 PCI: 00:07.1: enabled 0
1699 12:54:34.620734 PCI: 00:07.2: enabled 0
1700 12:54:34.624251 PCI: 00:07.3: enabled 0
1701 12:54:34.627222 PCI: 00:08.0: enabled 1
1702 12:54:34.627300 PCI: 00:09.0: enabled 0
1703 12:54:34.630790 PCI: 00:0a.0: enabled 0
1704 12:54:34.634210 PCI: 00:0d.0: enabled 1
1705 12:54:34.637286 PCI: 00:0d.1: enabled 0
1706 12:54:34.637391 PCI: 00:0d.2: enabled 0
1707 12:54:34.640783 PCI: 00:0d.3: enabled 0
1708 12:54:34.643807 PCI: 00:0e.0: enabled 0
1709 12:54:34.647175 PCI: 00:10.2: enabled 1
1710 12:54:34.647292 PCI: 00:10.6: enabled 0
1711 12:54:34.650576 PCI: 00:10.7: enabled 0
1712 12:54:34.653591 PCI: 00:12.0: enabled 0
1713 12:54:34.653732 PCI: 00:12.6: enabled 0
1714 12:54:34.657241 PCI: 00:13.0: enabled 0
1715 12:54:34.660463 PCI: 00:14.0: enabled 1
1716 12:54:34.663657 PCI: 00:14.1: enabled 0
1717 12:54:34.663781 PCI: 00:14.2: enabled 1
1718 12:54:34.666978 PCI: 00:14.3: enabled 1
1719 12:54:34.670203 PCI: 00:15.0: enabled 1
1720 12:54:34.673887 PCI: 00:15.1: enabled 1
1721 12:54:34.674000 PCI: 00:15.2: enabled 1
1722 12:54:34.677102 PCI: 00:15.3: enabled 1
1723 12:54:34.680284 PCI: 00:16.0: enabled 1
1724 12:54:34.683832 PCI: 00:16.1: enabled 0
1725 12:54:34.683909 PCI: 00:16.2: enabled 0
1726 12:54:34.687273 PCI: 00:16.3: enabled 0
1727 12:54:34.690191 PCI: 00:16.4: enabled 0
1728 12:54:34.693618 PCI: 00:16.5: enabled 0
1729 12:54:34.693730 PCI: 00:17.0: enabled 0
1730 12:54:34.697379 PCI: 00:19.0: enabled 0
1731 12:54:34.700187 PCI: 00:19.1: enabled 1
1732 12:54:34.700312 PCI: 00:19.2: enabled 0
1733 12:54:34.703199 PCI: 00:1c.0: enabled 1
1734 12:54:34.706707 PCI: 00:1c.1: enabled 0
1735 12:54:34.710247 PCI: 00:1c.2: enabled 0
1736 12:54:34.710327 PCI: 00:1c.3: enabled 0
1737 12:54:34.713166 PCI: 00:1c.4: enabled 0
1738 12:54:34.716805 PCI: 00:1c.5: enabled 0
1739 12:54:34.719867 PCI: 00:1c.6: enabled 1
1740 12:54:34.719972 PCI: 00:1c.7: enabled 0
1741 12:54:34.723441 PCI: 00:1d.0: enabled 1
1742 12:54:34.726433 PCI: 00:1d.1: enabled 0
1743 12:54:34.729956 PCI: 00:1d.2: enabled 1
1744 12:54:34.730082 PCI: 00:1d.3: enabled 0
1745 12:54:34.732877 PCI: 00:1e.0: enabled 1
1746 12:54:34.736350 PCI: 00:1e.1: enabled 0
1747 12:54:34.739876 PCI: 00:1e.2: enabled 1
1748 12:54:34.739980 PCI: 00:1e.3: enabled 1
1749 12:54:34.743188 PCI: 00:1f.0: enabled 1
1750 12:54:34.746181 PCI: 00:1f.1: enabled 0
1751 12:54:34.749624 PCI: 00:1f.2: enabled 1
1752 12:54:34.749757 PCI: 00:1f.3: enabled 1
1753 12:54:34.753019 PCI: 00:1f.4: enabled 0
1754 12:54:34.756660 PCI: 00:1f.5: enabled 1
1755 12:54:34.759613 PCI: 00:1f.6: enabled 0
1756 12:54:34.759693 PCI: 00:1f.7: enabled 0
1757 12:54:34.762976 APIC: 00: enabled 1
1758 12:54:34.766199 GENERIC: 0.0: enabled 1
1759 12:54:34.766310 GENERIC: 0.0: enabled 1
1760 12:54:34.769355 GENERIC: 1.0: enabled 1
1761 12:54:34.772625 GENERIC: 0.0: enabled 1
1762 12:54:34.775950 GENERIC: 1.0: enabled 1
1763 12:54:34.776077 USB0 port 0: enabled 1
1764 12:54:34.779353 GENERIC: 0.0: enabled 1
1765 12:54:34.782598 USB0 port 0: enabled 1
1766 12:54:34.782704 GENERIC: 0.0: enabled 1
1767 12:54:34.786115 I2C: 00:1a: enabled 1
1768 12:54:34.789233 I2C: 00:31: enabled 1
1769 12:54:34.792746 I2C: 00:32: enabled 1
1770 12:54:34.792853 I2C: 00:10: enabled 1
1771 12:54:34.796301 I2C: 00:15: enabled 1
1772 12:54:34.799041 GENERIC: 0.0: enabled 0
1773 12:54:34.799135 GENERIC: 1.0: enabled 0
1774 12:54:34.802634 GENERIC: 0.0: enabled 1
1775 12:54:34.806009 SPI: 00: enabled 1
1776 12:54:34.806112 SPI: 00: enabled 1
1777 12:54:34.808956 PNP: 0c09.0: enabled 1
1778 12:54:34.812471 GENERIC: 0.0: enabled 1
1779 12:54:34.812585 USB3 port 0: enabled 1
1780 12:54:34.815878 USB3 port 1: enabled 1
1781 12:54:34.819421 USB3 port 2: enabled 0
1782 12:54:34.822372 USB3 port 3: enabled 0
1783 12:54:34.822450 USB2 port 0: enabled 0
1784 12:54:34.825910 USB2 port 1: enabled 1
1785 12:54:34.828849 USB2 port 2: enabled 1
1786 12:54:34.828954 USB2 port 3: enabled 0
1787 12:54:34.832443 USB2 port 4: enabled 1
1788 12:54:34.835449 USB2 port 5: enabled 0
1789 12:54:34.838986 USB2 port 6: enabled 0
1790 12:54:34.839096 USB2 port 7: enabled 0
1791 12:54:34.841909 USB2 port 8: enabled 0
1792 12:54:34.845246 USB2 port 9: enabled 0
1793 12:54:34.845350 USB3 port 0: enabled 0
1794 12:54:34.848815 USB3 port 1: enabled 1
1795 12:54:34.852293 USB3 port 2: enabled 0
1796 12:54:34.852402 USB3 port 3: enabled 0
1797 12:54:34.855229 GENERIC: 0.0: enabled 1
1798 12:54:34.858623 GENERIC: 1.0: enabled 1
1799 12:54:34.862305 APIC: 01: enabled 1
1800 12:54:34.862408 APIC: 05: enabled 1
1801 12:54:34.865352 APIC: 06: enabled 1
1802 12:54:34.865457 APIC: 03: enabled 1
1803 12:54:34.868630 APIC: 02: enabled 1
1804 12:54:34.872252 APIC: 04: enabled 1
1805 12:54:34.872385 APIC: 07: enabled 1
1806 12:54:34.875260 PCI: 01:00.0: enabled 1
1807 12:54:34.881701 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1808 12:54:34.885014 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1809 12:54:34.888243 ELOG: NV offset 0xf30000 size 0x1000
1810 12:54:34.896282 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1811 12:54:34.902606 ELOG: Event(17) added with size 13 at 2023-04-05 12:54:34 UTC
1812 12:54:34.909254 ELOG: Event(92) added with size 9 at 2023-04-05 12:54:34 UTC
1813 12:54:34.916320 ELOG: Event(93) added with size 9 at 2023-04-05 12:54:34 UTC
1814 12:54:34.922791 ELOG: Event(9E) added with size 10 at 2023-04-05 12:54:34 UTC
1815 12:54:34.929309 ELOG: Event(9F) added with size 14 at 2023-04-05 12:54:34 UTC
1816 12:54:34.935769 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1817 12:54:34.942199 ELOG: Event(A1) added with size 10 at 2023-04-05 12:54:34 UTC
1818 12:54:34.946039 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1819 12:54:34.952693 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1820 12:54:34.955671 Finalize devices...
1821 12:54:34.955760 Devices finalized
1822 12:54:34.962493 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1823 12:54:34.969083 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1824 12:54:34.971955 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1825 12:54:34.978892 ME: HFSTS1 : 0x80030055
1826 12:54:34.982319 ME: HFSTS2 : 0x30280116
1827 12:54:34.985145 ME: HFSTS3 : 0x00000050
1828 12:54:34.992388 ME: HFSTS4 : 0x00004000
1829 12:54:34.995287 ME: HFSTS5 : 0x00000000
1830 12:54:35.001716 ME: HFSTS6 : 0x00400006
1831 12:54:35.005154 ME: Manufacturing Mode : YES
1832 12:54:35.008489 ME: SPI Protection Mode Enabled : NO
1833 12:54:35.012020 ME: FW Partition Table : OK
1834 12:54:35.015248 ME: Bringup Loader Failure : NO
1835 12:54:35.018212 ME: Firmware Init Complete : NO
1836 12:54:35.021646 ME: Boot Options Present : NO
1837 12:54:35.025304 ME: Update In Progress : NO
1838 12:54:35.031840 ME: D0i3 Support : YES
1839 12:54:35.034840 ME: Low Power State Enabled : NO
1840 12:54:35.038441 ME: CPU Replaced : YES
1841 12:54:35.042011 ME: CPU Replacement Valid : YES
1842 12:54:35.044929 ME: Current Working State : 5
1843 12:54:35.048507 ME: Current Operation State : 1
1844 12:54:35.051746 ME: Current Operation Mode : 3
1845 12:54:35.055296 ME: Error Code : 0
1846 12:54:35.058277 ME: Enhanced Debug Mode : NO
1847 12:54:35.065101 ME: CPU Debug Disabled : YES
1848 12:54:35.068039 ME: TXT Support : NO
1849 12:54:35.075013 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1850 12:54:35.081577 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1851 12:54:35.084422 CBFS: 'fallback/slic' not found.
1852 12:54:35.088055 ACPI: Writing ACPI tables at 76b01000.
1853 12:54:35.091498 ACPI: * FACS
1854 12:54:35.091588 ACPI: * DSDT
1855 12:54:35.094846 Ramoops buffer: 0x100000@0x76a00000.
1856 12:54:35.101254 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1857 12:54:35.104417 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1858 12:54:35.107876 Google Chrome EC: version:
1859 12:54:35.111095 ro: voema_v2.0.7540-147f8d37d1
1860 12:54:35.114551 rw: voema_v2.0.7540-147f8d37d1
1861 12:54:35.118037 running image: 2
1862 12:54:35.124218 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1863 12:54:35.127794 ACPI: * FADT
1864 12:54:35.127880 SCI is IRQ9
1865 12:54:35.131165 ACPI: added table 1/32, length now 40
1866 12:54:35.134733 ACPI: * SSDT
1867 12:54:35.137673 Found 1 CPU(s) with 8 core(s) each.
1868 12:54:35.140700 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1869 12:54:35.147653 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1870 12:54:35.150630 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1871 12:54:35.154173 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1872 12:54:35.160633 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1873 12:54:35.167620 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1874 12:54:35.170990 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1875 12:54:35.177469 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1876 12:54:35.183951 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1877 12:54:35.187309 \_SB.PCI0.RP09: Added StorageD3Enable property
1878 12:54:35.190950 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1879 12:54:35.197332 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1880 12:54:35.204006 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1881 12:54:35.207013 PS2K: Passing 80 keymaps to kernel
1882 12:54:35.213769 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1883 12:54:35.220260 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1884 12:54:35.227252 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1885 12:54:35.233549 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1886 12:54:35.240269 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1887 12:54:35.246749 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1888 12:54:35.253812 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1889 12:54:35.260123 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1890 12:54:35.263586 ACPI: added table 2/32, length now 44
1891 12:54:35.263700 ACPI: * MCFG
1892 12:54:35.270013 ACPI: added table 3/32, length now 48
1893 12:54:35.270120 ACPI: * TPM2
1894 12:54:35.273387 TPM2 log created at 0x769f0000
1895 12:54:35.276846 ACPI: added table 4/32, length now 52
1896 12:54:35.279934 ACPI: * MADT
1897 12:54:35.280044 SCI is IRQ9
1898 12:54:35.283521 ACPI: added table 5/32, length now 56
1899 12:54:35.286430 current = 76b09850
1900 12:54:35.286511 ACPI: * DMAR
1901 12:54:35.290026 ACPI: added table 6/32, length now 60
1902 12:54:35.296292 ACPI: added table 7/32, length now 64
1903 12:54:35.296380 ACPI: * HPET
1904 12:54:35.299895 ACPI: added table 8/32, length now 68
1905 12:54:35.302918 ACPI: done.
1906 12:54:35.303033 ACPI tables: 35216 bytes.
1907 12:54:35.306277 smbios_write_tables: 769ef000
1908 12:54:35.310867 EC returned error result code 3
1909 12:54:35.313950 Couldn't obtain OEM name from CBI
1910 12:54:35.317742 Create SMBIOS type 16
1911 12:54:35.321091 Create SMBIOS type 17
1912 12:54:35.324727 GENERIC: 0.0 (WIFI Device)
1913 12:54:35.328121 SMBIOS tables: 1750 bytes.
1914 12:54:35.331186 Writing table forward entry at 0x00000500
1915 12:54:35.338033 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1916 12:54:35.341311 Writing coreboot table at 0x76b25000
1917 12:54:35.347543 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1918 12:54:35.351034 1. 0000000000001000-000000000009ffff: RAM
1919 12:54:35.354632 2. 00000000000a0000-00000000000fffff: RESERVED
1920 12:54:35.361200 3. 0000000000100000-00000000769eefff: RAM
1921 12:54:35.364459 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1922 12:54:35.371185 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1923 12:54:35.377744 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1924 12:54:35.381161 7. 0000000077000000-000000007fbfffff: RESERVED
1925 12:54:35.387711 8. 00000000c0000000-00000000cfffffff: RESERVED
1926 12:54:35.390658 9. 00000000f8000000-00000000f9ffffff: RESERVED
1927 12:54:35.394216 10. 00000000fb000000-00000000fb000fff: RESERVED
1928 12:54:35.400712 11. 00000000fe000000-00000000fe00ffff: RESERVED
1929 12:54:35.404156 12. 00000000fed80000-00000000fed87fff: RESERVED
1930 12:54:35.410650 13. 00000000fed90000-00000000fed92fff: RESERVED
1931 12:54:35.414296 14. 00000000feda0000-00000000feda1fff: RESERVED
1932 12:54:35.421310 15. 00000000fedc0000-00000000feddffff: RESERVED
1933 12:54:35.424026 16. 0000000100000000-00000002803fffff: RAM
1934 12:54:35.427474 Passing 4 GPIOs to payload:
1935 12:54:35.430659 NAME | PORT | POLARITY | VALUE
1936 12:54:35.437306 lid | undefined | high | high
1937 12:54:35.443614 power | undefined | high | low
1938 12:54:35.447359 oprom | undefined | high | low
1939 12:54:35.453711 EC in RW | 0x000000e5 | high | high
1940 12:54:35.460719 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7c2a
1941 12:54:35.460835 coreboot table: 1576 bytes.
1942 12:54:35.467263 IMD ROOT 0. 0x76fff000 0x00001000
1943 12:54:35.470190 IMD SMALL 1. 0x76ffe000 0x00001000
1944 12:54:35.473712 FSP MEMORY 2. 0x76c4e000 0x003b0000
1945 12:54:35.476710 VPD 3. 0x76c4d000 0x00000367
1946 12:54:35.480086 RO MCACHE 4. 0x76c4c000 0x00000fdc
1947 12:54:35.483325 CONSOLE 5. 0x76c2c000 0x00020000
1948 12:54:35.486792 FMAP 6. 0x76c2b000 0x00000578
1949 12:54:35.493278 TIME STAMP 7. 0x76c2a000 0x00000910
1950 12:54:35.496952 VBOOT WORK 8. 0x76c16000 0x00014000
1951 12:54:35.499857 ROMSTG STCK 9. 0x76c15000 0x00001000
1952 12:54:35.503283 AFTER CAR 10. 0x76c0a000 0x0000b000
1953 12:54:35.506268 RAMSTAGE 11. 0x76b97000 0x00073000
1954 12:54:35.509840 REFCODE 12. 0x76b42000 0x00055000
1955 12:54:35.513482 SMM BACKUP 13. 0x76b32000 0x00010000
1956 12:54:35.516352 4f444749 14. 0x76b30000 0x00002000
1957 12:54:35.519953 EXT VBT15. 0x76b2d000 0x0000219f
1958 12:54:35.526405 COREBOOT 16. 0x76b25000 0x00008000
1959 12:54:35.529923 ACPI 17. 0x76b01000 0x00024000
1960 12:54:35.533271 ACPI GNVS 18. 0x76b00000 0x00001000
1961 12:54:35.536226 RAMOOPS 19. 0x76a00000 0x00100000
1962 12:54:35.539917 TPM2 TCGLOG20. 0x769f0000 0x00010000
1963 12:54:35.543255 SMBIOS 21. 0x769ef000 0x00000800
1964 12:54:35.546345 IMD small region:
1965 12:54:35.549320 IMD ROOT 0. 0x76ffec00 0x00000400
1966 12:54:35.552571 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1967 12:54:35.555832 POWER STATE 2. 0x76ffeb80 0x00000044
1968 12:54:35.562735 ROMSTAGE 3. 0x76ffeb60 0x00000004
1969 12:54:35.565671 MEM INFO 4. 0x76ffe980 0x000001e0
1970 12:54:35.572558 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1971 12:54:35.575452 MTRR: Physical address space:
1972 12:54:35.578982 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1973 12:54:35.585659 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1974 12:54:35.592173 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1975 12:54:35.598753 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1976 12:54:35.605723 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1977 12:54:35.612127 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1978 12:54:35.618468 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1979 12:54:35.622019 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 12:54:35.625551 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 12:54:35.628458 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 12:54:35.635037 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 12:54:35.638752 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 12:54:35.641624 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 12:54:35.645083 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 12:54:35.651593 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 12:54:35.655184 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 12:54:35.658389 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 12:54:35.661674 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 12:54:35.666122 call enable_fixed_mtrr()
1991 12:54:35.669279 CPU physical address size: 39 bits
1992 12:54:35.675985 MTRR: default type WB/UC MTRR counts: 6/6.
1993 12:54:35.679415 MTRR: UC selected as default type.
1994 12:54:35.686006 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1995 12:54:35.688898 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1996 12:54:35.695756 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1997 12:54:35.702346 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1998 12:54:35.708694 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1999 12:54:35.715715 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2000 12:54:35.715834
2001 12:54:35.719198 MTRR check
2002 12:54:35.722155 Fixed MTRRs : Enabled
2003 12:54:35.722266 Variable MTRRs: Enabled
2004 12:54:35.722373
2005 12:54:35.728799 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 12:54:35.731749 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 12:54:35.735221 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 12:54:35.738777 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 12:54:35.745337 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 12:54:35.748875 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 12:54:35.751662 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 12:54:35.755161 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 12:54:35.762133 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 12:54:35.765313 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 12:54:35.768165 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 12:54:35.774786 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2017 12:54:35.778482 call enable_fixed_mtrr()
2018 12:54:35.782038 Checking cr50 for pending updates
2019 12:54:35.786060 CPU physical address size: 39 bits
2020 12:54:35.789382 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 12:54:35.792370 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 12:54:35.795844 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 12:54:35.802798 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 12:54:35.805730 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 12:54:35.809286 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 12:54:35.812220 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 12:54:35.819008 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 12:54:35.822399 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 12:54:35.825345 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 12:54:35.829059 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 12:54:35.835384 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 12:54:35.838771 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 12:54:35.841833 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 12:54:35.849089 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 12:54:35.851875 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 12:54:35.855479 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 12:54:35.859020 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 12:54:35.865134 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 12:54:35.868557 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 12:54:35.871701 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 12:54:35.875721 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 12:54:35.879228 call enable_fixed_mtrr()
2043 12:54:35.882432 call enable_fixed_mtrr()
2044 12:54:35.885671 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 12:54:35.889114 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 12:54:35.895848 MTRR: Fixed MSR 0x258 0x0606060606060606
2047 12:54:35.899078 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 12:54:35.902655 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 12:54:35.905636 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 12:54:35.912209 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 12:54:35.915661 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 12:54:35.918872 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 12:54:35.922276 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 12:54:35.928733 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 12:54:35.932264 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 12:54:35.935306 MTRR: Fixed MSR 0x258 0x0606060606060606
2057 12:54:35.938721 call enable_fixed_mtrr()
2058 12:54:35.942257 MTRR: Fixed MSR 0x259 0x0000000000000000
2059 12:54:35.948760 MTRR: Fixed MSR 0x268 0x0606060606060606
2060 12:54:35.952369 MTRR: Fixed MSR 0x269 0x0606060606060606
2061 12:54:35.955243 MTRR: Fixed MSR 0x26a 0x0606060606060606
2062 12:54:35.958804 MTRR: Fixed MSR 0x26b 0x0606060606060606
2063 12:54:35.965227 MTRR: Fixed MSR 0x26c 0x0606060606060606
2064 12:54:35.968636 MTRR: Fixed MSR 0x26d 0x0606060606060606
2065 12:54:35.972142 MTRR: Fixed MSR 0x26e 0x0606060606060606
2066 12:54:35.974924 MTRR: Fixed MSR 0x26f 0x0606060606060606
2067 12:54:35.978734 CPU physical address size: 39 bits
2068 12:54:35.985998 call enable_fixed_mtrr()
2069 12:54:35.986084 Reading cr50 TPM mode
2070 12:54:35.990253 CPU physical address size: 39 bits
2071 12:54:35.993322 CPU physical address size: 39 bits
2072 12:54:35.996814 CPU physical address size: 39 bits
2073 12:54:36.003268 BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms
2074 12:54:36.006491 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 12:54:36.013823 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 12:54:36.016526 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 12:54:36.020110 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 12:54:36.023309 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 12:54:36.030032 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 12:54:36.032986 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 12:54:36.036443 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 12:54:36.039942 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 12:54:36.046245 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 12:54:36.049852 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 12:54:36.053394 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 12:54:36.059881 MTRR: Fixed MSR 0x258 0x0606060606060606
2087 12:54:36.059955 call enable_fixed_mtrr()
2088 12:54:36.066431 MTRR: Fixed MSR 0x259 0x0000000000000000
2089 12:54:36.069394 MTRR: Fixed MSR 0x268 0x0606060606060606
2090 12:54:36.072811 MTRR: Fixed MSR 0x269 0x0606060606060606
2091 12:54:36.076152 MTRR: Fixed MSR 0x26a 0x0606060606060606
2092 12:54:36.083222 MTRR: Fixed MSR 0x26b 0x0606060606060606
2093 12:54:36.086047 MTRR: Fixed MSR 0x26c 0x0606060606060606
2094 12:54:36.089466 MTRR: Fixed MSR 0x26d 0x0606060606060606
2095 12:54:36.092669 MTRR: Fixed MSR 0x26e 0x0606060606060606
2096 12:54:36.099272 MTRR: Fixed MSR 0x26f 0x0606060606060606
2097 12:54:36.102835 CPU physical address size: 39 bits
2098 12:54:36.106157 call enable_fixed_mtrr()
2099 12:54:36.112933 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2100 12:54:36.115669 CPU physical address size: 39 bits
2101 12:54:36.122672 Checking segment from ROM address 0xffc02b38
2102 12:54:36.125666 Checking segment from ROM address 0xffc02b54
2103 12:54:36.128988 Loading segment from ROM address 0xffc02b38
2104 12:54:36.132352 code (compression=0)
2105 12:54:36.142362 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2106 12:54:36.148999 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2107 12:54:36.151889 it's not compressed!
2108 12:54:36.291197 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2109 12:54:36.297722 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2110 12:54:36.304498 Loading segment from ROM address 0xffc02b54
2111 12:54:36.308082 Entry Point 0x30000000
2112 12:54:36.308183 Loaded segments
2113 12:54:36.314167 BS: BS_PAYLOAD_LOAD run times (exec / console): 241 / 63 ms
2114 12:54:36.357466 Finalizing chipset.
2115 12:54:36.360266 Finalizing SMM.
2116 12:54:36.360356 APMC done.
2117 12:54:36.366696 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2118 12:54:36.370236 mp_park_aps done after 0 msecs.
2119 12:54:36.373670 Jumping to boot code at 0x30000000(0x76b25000)
2120 12:54:36.383239 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2121 12:54:36.383326
2122 12:54:36.386599
2123 12:54:36.386693
2124 12:54:36.387147 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2125 12:54:36.387265 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2126 12:54:36.387355 Setting prompt string to ['volteer:']
2127 12:54:36.387490 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2128 12:54:36.390123 Starting depthcharge on Voema...
2129 12:54:36.390217
2130 12:54:36.396716 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2131 12:54:36.396836
2132 12:54:36.403213 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2133 12:54:36.403307
2134 12:54:36.409798 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2135 12:54:36.409901
2136 12:54:36.413234 Failed to find eMMC card reader
2137 12:54:36.413361
2138 12:54:36.416866 Wipe memory regions:
2139 12:54:36.416980
2140 12:54:36.419600 [0x00000000001000, 0x000000000a0000)
2141 12:54:36.419684
2142 12:54:36.422880 [0x00000000100000, 0x00000030000000)
2143 12:54:36.448727
2144 12:54:36.451582 [0x00000032662db0, 0x000000769ef000)
2145 12:54:36.487630
2146 12:54:36.490846 [0x00000100000000, 0x00000280400000)
2147 12:54:36.691375
2148 12:54:36.694901 ec_init: CrosEC protocol v3 supported (256, 256)
2149 12:54:36.695006
2150 12:54:36.701466 update_port_state: port C0 state: usb enable 1 mux conn 0
2151 12:54:36.701560
2152 12:54:36.711649 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2153 12:54:36.711748
2154 12:54:36.718051 pmc_check_ipc_sts: STS_BUSY done after 1512 us
2155 12:54:36.718132
2156 12:54:36.721390 send_conn_disc_msg: pmc_send_cmd succeeded
2157 12:54:37.152353
2158 12:54:37.152532 R8152: Initializing
2159 12:54:37.152626
2160 12:54:37.155393 Version 6 (ocp_data = 5c30)
2161 12:54:37.155470
2162 12:54:37.158872 R8152: Done initializing
2163 12:54:37.158964
2164 12:54:37.162109 Adding net device
2165 12:54:37.464703
2166 12:54:37.467587 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2167 12:54:37.467674
2168 12:54:37.467771
2169 12:54:37.467864
2170 12:54:37.470836 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 12:54:37.571580 volteer: tftpboot 192.168.201.1 9879088/tftp-deploy-d_ev1f4z/kernel/bzImage 9879088/tftp-deploy-d_ev1f4z/kernel/cmdline 9879088/tftp-deploy-d_ev1f4z/ramdisk/ramdisk.cpio.gz
2173 12:54:37.571743 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 12:54:37.571842 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2175 12:54:37.575935 tftpboot 192.168.201.1 9879088/tftp-deploy-d_ev1f4z/kernel/bzImoy-d_ev1f4z/kernel/cmdline 9879088/tftp-deploy-d_ev1f4z/ramdisk/ramdisk.cpio.gz
2176 12:54:37.576024
2177 12:54:37.576093 Waiting for link
2178 12:54:37.778455
2179 12:54:37.778608 done.
2180 12:54:37.778678
2181 12:54:37.778743 MAC: 00:24:32:30:79:42
2182 12:54:37.778805
2183 12:54:37.781954 Sending DHCP discover... done.
2184 12:54:37.782034
2185 12:54:37.784892 Waiting for reply... done.
2186 12:54:37.784971
2187 12:54:37.788288 Sending DHCP request... done.
2188 12:54:37.788366
2189 12:54:37.791862 Waiting for reply... done.
2190 12:54:37.791941
2191 12:54:37.794789 My ip is 192.168.201.13
2192 12:54:37.794890
2193 12:54:37.798246 The DHCP server ip is 192.168.201.1
2194 12:54:37.798323
2195 12:54:37.801664 TFTP server IP predefined by user: 192.168.201.1
2196 12:54:37.801785
2197 12:54:37.808106 Bootfile predefined by user: 9879088/tftp-deploy-d_ev1f4z/kernel/bzImage
2198 12:54:37.808192
2199 12:54:37.811268 Sending tftp read request... done.
2200 12:54:37.814843
2201 12:54:37.818715 Waiting for the transfer...
2202 12:54:37.818828
2203 12:54:38.351619 00000000 ################################################################
2204 12:54:38.351755
2205 12:54:38.880884 00080000 ################################################################
2206 12:54:38.881038
2207 12:54:39.405553 00100000 ################################################################
2208 12:54:39.405710
2209 12:54:39.925468 00180000 ################################################################
2210 12:54:39.925617
2211 12:54:40.443469 00200000 ################################################################
2212 12:54:40.443625
2213 12:54:40.968863 00280000 ################################################################
2214 12:54:40.969036
2215 12:54:41.515104 00300000 ################################################################
2216 12:54:41.515256
2217 12:54:42.032168 00380000 ################################################################
2218 12:54:42.032340
2219 12:54:42.575707 00400000 ################################################################
2220 12:54:42.575861
2221 12:54:43.107745 00480000 ################################################################
2222 12:54:43.107892
2223 12:54:43.643824 00500000 ################################################################
2224 12:54:43.643983
2225 12:54:44.183450 00580000 ################################################################
2226 12:54:44.183635
2227 12:54:44.856669 00600000 ################################################################
2228 12:54:44.857225
2229 12:54:45.540821 00680000 ################################################################
2230 12:54:45.541378
2231 12:54:46.163973 00700000 ################################################################
2232 12:54:46.164118
2233 12:54:46.708690 00780000 ################################################################
2234 12:54:46.708834
2235 12:54:47.252003 00800000 ################################################################
2236 12:54:47.252142
2237 12:54:47.797265 00880000 ################################################################
2238 12:54:47.797418
2239 12:54:48.349696 00900000 ################################################################
2240 12:54:48.349878
2241 12:54:48.885741 00980000 ################################################################
2242 12:54:48.885937
2243 12:54:49.274714 00a00000 ############################################## done.
2244 12:54:49.274873
2245 12:54:49.278283 The bootfile was 10854400 bytes long.
2246 12:54:49.278370
2247 12:54:49.281765 Sending tftp read request... done.
2248 12:54:49.281851
2249 12:54:49.284606 Waiting for the transfer...
2250 12:54:49.284695
2251 12:54:49.824329 00000000 ################################################################
2252 12:54:49.824490
2253 12:54:50.374054 00080000 ################################################################
2254 12:54:50.374235
2255 12:54:50.924905 00100000 ################################################################
2256 12:54:50.925087
2257 12:54:51.492736 00180000 ################################################################
2258 12:54:51.492878
2259 12:54:52.042335 00200000 ################################################################
2260 12:54:52.042481
2261 12:54:52.597445 00280000 ################################################################
2262 12:54:52.597592
2263 12:54:53.179588 00300000 ################################################################
2264 12:54:53.180161
2265 12:54:53.802546 00380000 ################################################################
2266 12:54:53.802699
2267 12:54:54.439171 00400000 ################################################################
2268 12:54:54.439896
2269 12:54:55.136054 00480000 ################################################################
2270 12:54:55.136648
2271 12:54:55.758059 00500000 ################################################################
2272 12:54:55.758236
2273 12:54:56.358853 00580000 ################################################################
2274 12:54:56.359450
2275 12:54:56.499177 00600000 ############# done.
2276 12:54:56.499702
2277 12:54:56.502230 Sending tftp read request... done.
2278 12:54:56.502665
2279 12:54:56.505782 Waiting for the transfer...
2280 12:54:56.506215
2281 12:54:56.506555 00000000 # done.
2282 12:54:56.506887
2283 12:54:56.515291 Command line loaded dynamically from TFTP file: 9879088/tftp-deploy-d_ev1f4z/kernel/cmdline
2284 12:54:56.515857
2285 12:54:56.538228 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9879088/extract-nfsrootfs-fzkufjh9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2286 12:54:56.542284
2287 12:54:56.545322 Shutting down all USB controllers.
2288 12:54:56.545923
2289 12:54:56.546471 Removing current net device
2290 12:54:56.546811
2291 12:54:56.548708 Finalizing coreboot
2292 12:54:56.549213
2293 12:54:56.555774 Exiting depthcharge with code 4 at timestamp: 28809964
2294 12:54:56.556240
2295 12:54:56.556578
2296 12:54:56.556893 Starting kernel ...
2297 12:54:56.557290
2298 12:54:56.558562 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2299 12:54:56.559047 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2300 12:54:56.559478 Setting prompt string to ['Linux version [0-9]']
2301 12:54:56.559826 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2302 12:54:56.560187 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2303 12:54:56.560997
2305 12:59:20.559326 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2307 12:59:20.559535 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2309 12:59:20.559693 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2312 12:59:20.559950 end: 2 depthcharge-action (duration 00:05:00) [common]
2314 12:59:20.560169 Cleaning after the job
2315 12:59:20.560256 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/ramdisk
2316 12:59:20.560878 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/kernel
2317 12:59:20.561760 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/nfsrootfs
2318 12:59:20.620964 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9879088/tftp-deploy-d_ev1f4z/modules
2319 12:59:20.621489 start: 4.1 power-off (timeout 00:00:30) [common]
2320 12:59:20.621655 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2321 12:59:20.696830 >> Command sent successfully.
2322 12:59:20.699438 Returned 0 in 0 seconds
2323 12:59:20.800554 end: 4.1 power-off (duration 00:00:00) [common]
2325 12:59:20.801926 start: 4.2 read-feedback (timeout 00:10:00) [common]
2326 12:59:20.803113 Listened to connection for namespace 'common' for up to 1s
2327 12:59:21.807292 Finalising connection for namespace 'common'
2328 12:59:21.807490 Disconnecting from shell: Finalise
2329 12:59:21.807612
2330 12:59:21.908662 end: 4.2 read-feedback (duration 00:00:01) [common]
2331 12:59:21.909293 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9879088
2332 12:59:22.120634 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9879088
2333 12:59:22.120837 JobError: Your job cannot terminate cleanly.