Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 13:51:04.747250 lava-dispatcher, installed at version: 2023.01
2 13:51:04.747477 start: 0 validate
3 13:51:04.747644 Start time: 2023-04-20 13:51:04.747636+00:00 (UTC)
4 13:51:04.747775 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:51:04.747911 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230414.0%2Fx86%2Frootfs.cpio.gz exists
6 13:51:05.040541 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:51:05.040799 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:51:05.333382 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:51:05.333630 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:51:16.562602 validate duration: 11.82
12 13:51:16.562882 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:51:16.562979 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:51:16.563064 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:51:16.563192 Not decompressing ramdisk as can be used compressed.
16 13:51:16.563289 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230414.0/x86/rootfs.cpio.gz
17 13:51:16.563382 saving as /var/lib/lava/dispatcher/tmp/10062353/tftp-deploy-axcp_yu4/ramdisk/rootfs.cpio.gz
18 13:51:16.563442 total size: 8429655 (8MB)
19 13:51:17.585830 progress 0% (0MB)
20 13:51:17.588384 progress 5% (0MB)
21 13:51:17.590701 progress 10% (0MB)
22 13:51:17.593008 progress 15% (1MB)
23 13:51:17.595269 progress 20% (1MB)
24 13:51:17.597675 progress 25% (2MB)
25 13:51:17.600021 progress 30% (2MB)
26 13:51:17.602373 progress 35% (2MB)
27 13:51:17.604565 progress 40% (3MB)
28 13:51:17.606837 progress 45% (3MB)
29 13:51:17.609110 progress 50% (4MB)
30 13:51:17.611343 progress 55% (4MB)
31 13:51:17.613652 progress 60% (4MB)
32 13:51:17.615997 progress 65% (5MB)
33 13:51:17.618355 progress 70% (5MB)
34 13:51:17.620502 progress 75% (6MB)
35 13:51:17.622805 progress 80% (6MB)
36 13:51:17.625149 progress 85% (6MB)
37 13:51:17.627496 progress 90% (7MB)
38 13:51:17.629844 progress 95% (7MB)
39 13:51:17.632240 progress 100% (8MB)
40 13:51:17.632381 8MB downloaded in 1.07s (7.52MB/s)
41 13:51:17.632539 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:51:17.632803 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:51:17.632890 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:51:17.632976 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:51:17.633118 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:51:17.633189 saving as /var/lib/lava/dispatcher/tmp/10062353/tftp-deploy-axcp_yu4/kernel/bzImage
48 13:51:17.633252 total size: 10854400 (10MB)
49 13:51:17.633312 No compression specified
50 13:51:17.634940 progress 0% (0MB)
51 13:51:17.637901 progress 5% (0MB)
52 13:51:17.641023 progress 10% (1MB)
53 13:51:17.643969 progress 15% (1MB)
54 13:51:17.647281 progress 20% (2MB)
55 13:51:17.650184 progress 25% (2MB)
56 13:51:17.653156 progress 30% (3MB)
57 13:51:17.656008 progress 35% (3MB)
58 13:51:17.659427 progress 40% (4MB)
59 13:51:17.662839 progress 45% (4MB)
60 13:51:17.666075 progress 50% (5MB)
61 13:51:17.669358 progress 55% (5MB)
62 13:51:17.672451 progress 60% (6MB)
63 13:51:17.675930 progress 65% (6MB)
64 13:51:17.678836 progress 70% (7MB)
65 13:51:17.682034 progress 75% (7MB)
66 13:51:17.684948 progress 80% (8MB)
67 13:51:17.688037 progress 85% (8MB)
68 13:51:17.691018 progress 90% (9MB)
69 13:51:17.694199 progress 95% (9MB)
70 13:51:17.697209 progress 100% (10MB)
71 13:51:17.697409 10MB downloaded in 0.06s (161.36MB/s)
72 13:51:17.697562 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:51:17.697854 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:51:17.697993 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:51:17.698081 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:51:17.698217 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:51:17.698287 saving as /var/lib/lava/dispatcher/tmp/10062353/tftp-deploy-axcp_yu4/modules/modules.tar
79 13:51:17.698350 total size: 483736 (0MB)
80 13:51:17.698412 Using unxz to decompress xz
81 13:51:17.702602 progress 6% (0MB)
82 13:51:17.703032 progress 13% (0MB)
83 13:51:17.703388 progress 20% (0MB)
84 13:51:17.704789 progress 27% (0MB)
85 13:51:17.707214 progress 33% (0MB)
86 13:51:17.709476 progress 40% (0MB)
87 13:51:17.711362 progress 47% (0MB)
88 13:51:17.713709 progress 54% (0MB)
89 13:51:17.715738 progress 60% (0MB)
90 13:51:17.717756 progress 67% (0MB)
91 13:51:17.719699 progress 74% (0MB)
92 13:51:17.721598 progress 81% (0MB)
93 13:51:17.723487 progress 88% (0MB)
94 13:51:17.725811 progress 94% (0MB)
95 13:51:17.727965 progress 100% (0MB)
96 13:51:17.734814 0MB downloaded in 0.04s (12.65MB/s)
97 13:51:17.735102 end: 1.3.1 http-download (duration 00:00:00) [common]
99 13:51:17.735374 end: 1.3 download-retry (duration 00:00:00) [common]
100 13:51:17.735472 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 13:51:17.735568 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 13:51:17.735676 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 13:51:17.735765 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 13:51:17.735985 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg
105 13:51:17.736120 makedir: /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin
106 13:51:17.736244 makedir: /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/tests
107 13:51:17.736344 makedir: /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/results
108 13:51:17.736461 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-add-keys
109 13:51:17.736608 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-add-sources
110 13:51:17.736739 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-background-process-start
111 13:51:17.736869 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-background-process-stop
112 13:51:17.736994 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-common-functions
113 13:51:17.737119 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-echo-ipv4
114 13:51:17.737244 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-install-packages
115 13:51:17.737368 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-installed-packages
116 13:51:17.737492 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-os-build
117 13:51:17.737616 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-probe-channel
118 13:51:17.737744 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-probe-ip
119 13:51:17.737868 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-target-ip
120 13:51:17.737992 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-target-mac
121 13:51:17.738115 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-target-storage
122 13:51:17.738260 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-test-case
123 13:51:17.738392 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-test-event
124 13:51:17.738516 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-test-feedback
125 13:51:17.738651 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-test-raise
126 13:51:17.738776 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-test-reference
127 13:51:17.738903 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-test-runner
128 13:51:17.739025 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-test-set
129 13:51:17.739151 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-test-shell
130 13:51:17.739278 Updating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-install-packages (oe)
131 13:51:17.739427 Updating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/bin/lava-installed-packages (oe)
132 13:51:17.739549 Creating /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/environment
133 13:51:17.739666 LAVA metadata
134 13:51:17.739748 - LAVA_JOB_ID=10062353
135 13:51:17.739817 - LAVA_DISPATCHER_IP=192.168.201.1
136 13:51:17.739925 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 13:51:17.739995 skipped lava-vland-overlay
138 13:51:17.740075 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 13:51:17.740159 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 13:51:17.740241 skipped lava-multinode-overlay
141 13:51:17.740317 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 13:51:17.740408 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 13:51:17.740515 Loading test definitions
144 13:51:17.740646 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 13:51:17.740751 Using /lava-10062353 at stage 0
146 13:51:17.741106 uuid=10062353_1.4.2.3.1 testdef=None
147 13:51:17.741201 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 13:51:17.741293 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 13:51:17.741825 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 13:51:17.742056 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 13:51:17.742714 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 13:51:17.742955 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 13:51:17.743583 runner path: /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/0/tests/0_dmesg test_uuid 10062353_1.4.2.3.1
156 13:51:17.743741 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 13:51:17.743977 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 13:51:17.744052 Using /lava-10062353 at stage 1
160 13:51:17.744371 uuid=10062353_1.4.2.3.5 testdef=None
161 13:51:17.744464 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 13:51:17.744552 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 13:51:17.745023 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 13:51:17.745245 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 13:51:17.745885 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 13:51:17.746126 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 13:51:17.746774 runner path: /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/1/tests/1_bootrr test_uuid 10062353_1.4.2.3.5
170 13:51:17.746924 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 13:51:17.747147 Creating lava-test-runner.conf files
173 13:51:17.747213 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/0 for stage 0
174 13:51:17.747305 - 0_dmesg
175 13:51:17.747388 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062353/lava-overlay-m1xg3vdg/lava-10062353/1 for stage 1
176 13:51:17.747480 - 1_bootrr
177 13:51:17.747576 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 13:51:17.747674 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 13:51:17.756363 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 13:51:17.756490 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 13:51:17.756579 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 13:51:17.756666 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 13:51:17.756753 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 13:51:18.006487 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 13:51:18.006969 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 13:51:18.007147 extracting modules file /var/lib/lava/dispatcher/tmp/10062353/tftp-deploy-axcp_yu4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062353/extract-overlay-ramdisk-2upr6np_/ramdisk
187 13:51:18.029128 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 13:51:18.029349 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 13:51:18.029502 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062353/compress-overlay-_e_uauaw/overlay-1.4.2.4.tar.gz to ramdisk
190 13:51:18.029629 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062353/compress-overlay-_e_uauaw/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062353/extract-overlay-ramdisk-2upr6np_/ramdisk
191 13:51:18.040633 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 13:51:18.040832 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 13:51:18.040983 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 13:51:18.041126 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 13:51:18.041260 Building ramdisk /var/lib/lava/dispatcher/tmp/10062353/extract-overlay-ramdisk-2upr6np_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062353/extract-overlay-ramdisk-2upr6np_/ramdisk
196 13:51:18.177421 >> 53976 blocks
197 13:51:19.082314 rename /var/lib/lava/dispatcher/tmp/10062353/extract-overlay-ramdisk-2upr6np_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062353/tftp-deploy-axcp_yu4/ramdisk/ramdisk.cpio.gz
198 13:51:19.082782 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 13:51:19.082946 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
200 13:51:19.083058 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
201 13:51:19.083159 No mkimage arch provided, not using FIT.
202 13:51:19.083256 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 13:51:19.083342 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 13:51:19.083453 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 13:51:19.083549 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
206 13:51:19.083657 No LXC device requested
207 13:51:19.083748 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 13:51:19.083843 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
209 13:51:19.083933 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 13:51:19.084007 Checking files for TFTP limit of 4294967296 bytes.
211 13:51:19.084415 end: 1 tftp-deploy (duration 00:00:03) [common]
212 13:51:19.084522 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 13:51:19.084615 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 13:51:19.084733 substitutions:
215 13:51:19.084800 - {DTB}: None
216 13:51:19.084877 - {INITRD}: 10062353/tftp-deploy-axcp_yu4/ramdisk/ramdisk.cpio.gz
217 13:51:19.084942 - {KERNEL}: 10062353/tftp-deploy-axcp_yu4/kernel/bzImage
218 13:51:19.085002 - {LAVA_MAC}: None
219 13:51:19.085064 - {PRESEED_CONFIG}: None
220 13:51:19.085121 - {PRESEED_LOCAL}: None
221 13:51:19.085178 - {RAMDISK}: 10062353/tftp-deploy-axcp_yu4/ramdisk/ramdisk.cpio.gz
222 13:51:19.085234 - {ROOT_PART}: None
223 13:51:19.085289 - {ROOT}: None
224 13:51:19.085345 - {SERVER_IP}: 192.168.201.1
225 13:51:19.085400 - {TEE}: None
226 13:51:19.085455 Parsed boot commands:
227 13:51:19.085528 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 13:51:19.085704 Parsed boot commands: tftpboot 192.168.201.1 10062353/tftp-deploy-axcp_yu4/kernel/bzImage 10062353/tftp-deploy-axcp_yu4/kernel/cmdline 10062353/tftp-deploy-axcp_yu4/ramdisk/ramdisk.cpio.gz
229 13:51:19.085827 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 13:51:19.085950 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 13:51:19.086069 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 13:51:19.086170 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 13:51:19.086274 Not connected, no need to disconnect.
234 13:51:19.086385 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 13:51:19.086500 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 13:51:19.086606 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
237 13:51:19.089855 Setting prompt string to ['lava-test: # ']
238 13:51:19.090472 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 13:51:19.090610 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 13:51:19.090744 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 13:51:19.090842 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 13:51:19.091037 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
243 13:51:24.212819 >> Command sent successfully.
244 13:51:24.215585 Returned 0 in 5 seconds
245 13:51:24.316407 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 13:51:24.316850 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 13:51:24.317014 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 13:51:24.317153 Setting prompt string to 'Starting depthcharge on Helios...'
250 13:51:24.317266 Changing prompt to 'Starting depthcharge on Helios...'
251 13:51:24.317368 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 13:51:24.317730 [Enter `^Ec?' for help]
253 13:51:24.935980
254 13:51:24.936142
255 13:51:24.945674 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 13:51:24.949622 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 13:51:24.955927 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 13:51:24.958993 CPU: AES supported, TXT NOT supported, VT supported
259 13:51:24.965744 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 13:51:24.969432 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 13:51:24.975790 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 13:51:24.978914 VBOOT: Loading verstage.
263 13:51:24.982056 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 13:51:24.989101 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 13:51:24.992223 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 13:51:24.995451 CBFS @ c08000 size 3f8000
267 13:51:25.001956 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 13:51:25.005201 CBFS: Locating 'fallback/verstage'
269 13:51:25.008470 CBFS: Found @ offset 10fb80 size 1072c
270 13:51:25.012255
271 13:51:25.012352
272 13:51:25.022607 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 13:51:25.036656 Probing TPM: . done!
274 13:51:25.040483 TPM ready after 0 ms
275 13:51:25.043799 Connected to device vid:did:rid of 1ae0:0028:00
276 13:51:25.053488 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
277 13:51:25.056789 Initialized TPM device CR50 revision 0
278 13:51:25.099275 tlcl_send_startup: Startup return code is 0
279 13:51:25.099419 TPM: setup succeeded
280 13:51:25.112485 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 13:51:25.115776 Chrome EC: UHEPI supported
282 13:51:25.119071 Phase 1
283 13:51:25.122223 FMAP: area GBB found @ c05000 (12288 bytes)
284 13:51:25.128854 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 13:51:25.132086 Phase 2
286 13:51:25.132212 Phase 3
287 13:51:25.135248 FMAP: area GBB found @ c05000 (12288 bytes)
288 13:51:25.142236 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 13:51:25.148796 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 13:51:25.152026 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 13:51:25.158570 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 13:51:25.174316 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 13:51:25.178104 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 13:51:25.184652 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 13:51:25.188589 Phase 4
296 13:51:25.191848 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 13:51:25.201937 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 13:51:25.378461 VB2:vb2_rsa_verify_digest() Digest check failed!
299 13:51:25.384982 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 13:51:25.385086 Saving nvdata
301 13:51:25.388116 Reboot requested (10020007)
302 13:51:25.391229 board_reset() called!
303 13:51:25.391320 full_reset() called!
304 13:51:29.902317
305 13:51:29.902467
306 13:51:29.911929 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 13:51:29.915461 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 13:51:29.922035 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 13:51:29.925006 CPU: AES supported, TXT NOT supported, VT supported
310 13:51:29.932034 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 13:51:29.935040 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 13:51:29.941985 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 13:51:29.945051 VBOOT: Loading verstage.
314 13:51:29.948091 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 13:51:29.954983 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 13:51:29.961184 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 13:51:29.961301 CBFS @ c08000 size 3f8000
318 13:51:29.967979 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 13:51:29.971697 CBFS: Locating 'fallback/verstage'
320 13:51:29.974797 CBFS: Found @ offset 10fb80 size 1072c
321 13:51:29.978737
322 13:51:29.978820
323 13:51:29.988833 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 13:51:30.003247 Probing TPM: . done!
325 13:51:30.006366 TPM ready after 0 ms
326 13:51:30.010061 Connected to device vid:did:rid of 1ae0:0028:00
327 13:51:30.020245 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
328 13:51:30.023320 Initialized TPM device CR50 revision 0
329 13:51:30.065895 tlcl_send_startup: Startup return code is 0
330 13:51:30.066021 TPM: setup succeeded
331 13:51:30.078272 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 13:51:30.082486 Chrome EC: UHEPI supported
333 13:51:30.085479 Phase 1
334 13:51:30.088683 FMAP: area GBB found @ c05000 (12288 bytes)
335 13:51:30.095534 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 13:51:30.101811 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 13:51:30.105430 Recovery requested (1009000e)
338 13:51:30.111408 Saving nvdata
339 13:51:30.117156 tlcl_extend: response is 0
340 13:51:30.126183 tlcl_extend: response is 0
341 13:51:30.132910 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 13:51:30.136306 CBFS @ c08000 size 3f8000
343 13:51:30.142887 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 13:51:30.146027 CBFS: Locating 'fallback/romstage'
345 13:51:30.149182 CBFS: Found @ offset 80 size 145fc
346 13:51:30.152359 Accumulated console time in verstage 99 ms
347 13:51:30.152451
348 13:51:30.155998
349 13:51:30.165769 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 13:51:30.172636 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 13:51:30.175727 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 13:51:30.178867 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 13:51:30.185702 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 13:51:30.188685 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 13:51:30.192278 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 13:51:30.195469 TCO_STS: 0000 0000
357 13:51:30.198565 GEN_PMCON: e0015238 00000200
358 13:51:30.202334 GBLRST_CAUSE: 00000000 00000000
359 13:51:30.202417 prev_sleep_state 5
360 13:51:30.206012 Boot Count incremented to 52406
361 13:51:30.212779 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 13:51:30.215800 CBFS @ c08000 size 3f8000
363 13:51:30.222780 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 13:51:30.222869 CBFS: Locating 'fspm.bin'
365 13:51:30.229028 CBFS: Found @ offset 5ffc0 size 71000
366 13:51:30.232640 Chrome EC: UHEPI supported
367 13:51:30.239135 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 13:51:30.242723 Probing TPM: done!
369 13:51:30.249225 Connected to device vid:did:rid of 1ae0:0028:00
370 13:51:30.259228 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
371 13:51:30.264985 Initialized TPM device CR50 revision 0
372 13:51:30.273851 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 13:51:30.284115 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 13:51:30.284220 MRC cache found, size 1948
375 13:51:30.287282 bootmode is set to: 2
376 13:51:30.290402 PRMRR disabled by config.
377 13:51:30.294288 SPD INDEX = 1
378 13:51:30.297139 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 13:51:30.300206 CBFS @ c08000 size 3f8000
380 13:51:30.307011 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 13:51:30.307096 CBFS: Locating 'spd.bin'
382 13:51:30.313780 CBFS: Found @ offset 5fb80 size 400
383 13:51:30.313867 SPD: module type is LPDDR3
384 13:51:30.316782 SPD: module part is
385 13:51:30.323688 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 13:51:30.326900 SPD: device width 4 bits, bus width 8 bits
387 13:51:30.330133 SPD: module size is 4096 MB (per channel)
388 13:51:30.336855 memory slot: 0 configuration done.
389 13:51:30.339892 memory slot: 2 configuration done.
390 13:51:30.388882 CBMEM:
391 13:51:30.392633 IMD: root @ 99fff000 254 entries.
392 13:51:30.395812 IMD: root @ 99ffec00 62 entries.
393 13:51:30.398821 External stage cache:
394 13:51:30.401910 IMD: root @ 9abff000 254 entries.
395 13:51:30.405500 IMD: root @ 9abfec00 62 entries.
396 13:51:30.412031 Chrome EC: clear events_b mask to 0x0000000020004000
397 13:51:30.424991 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 13:51:30.434984 tlcl_write: response is 0
399 13:51:30.447192 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 13:51:30.453765 MRC: TPM MRC hash updated successfully.
401 13:51:30.453856 2 DIMMs found
402 13:51:30.457154 SMM Memory Map
403 13:51:30.460205 SMRAM : 0x9a000000 0x1000000
404 13:51:30.463952 Subregion 0: 0x9a000000 0xa00000
405 13:51:30.466684 Subregion 1: 0x9aa00000 0x200000
406 13:51:30.470425 Subregion 2: 0x9ac00000 0x400000
407 13:51:30.473649 top_of_ram = 0x9a000000
408 13:51:30.476704 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 13:51:30.483545 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 13:51:30.486492 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 13:51:30.493145 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 13:51:30.496792 CBFS @ c08000 size 3f8000
413 13:51:30.499887 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 13:51:30.503083 CBFS: Locating 'fallback/postcar'
415 13:51:30.509677 CBFS: Found @ offset 107000 size 4b44
416 13:51:30.516315 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 13:51:30.525985 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 13:51:30.529167 Processing 180 relocs. Offset value of 0x97c0c000
419 13:51:30.537872 Accumulated console time in romstage 286 ms
420 13:51:30.537990
421 13:51:30.538062
422 13:51:30.547844 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 13:51:30.554445 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 13:51:30.557443 CBFS @ c08000 size 3f8000
425 13:51:30.564569 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 13:51:30.567512 CBFS: Locating 'fallback/ramstage'
427 13:51:30.570805 CBFS: Found @ offset 43380 size 1b9e8
428 13:51:30.577036 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 13:51:30.609313 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 13:51:30.615997 Processing 3976 relocs. Offset value of 0x98db0000
431 13:51:30.619656 Accumulated console time in postcar 52 ms
432 13:51:30.619748
433 13:51:30.619817
434 13:51:30.629698 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 13:51:30.635493 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 13:51:30.639324 WARNING: RO_VPD is uninitialized or empty.
437 13:51:30.642447 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 13:51:30.648743 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 13:51:30.648837 Normal boot.
440 13:51:30.655652 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 13:51:30.658994 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 13:51:30.661981 CBFS @ c08000 size 3f8000
443 13:51:30.668510 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 13:51:30.672289 CBFS: Locating 'cpu_microcode_blob.bin'
445 13:51:30.675177 CBFS: Found @ offset 14700 size 2ec00
446 13:51:30.682083 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 13:51:30.682178 Skip microcode update
448 13:51:30.688484 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 13:51:30.691610 CBFS @ c08000 size 3f8000
450 13:51:30.695269 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 13:51:30.698364 CBFS: Locating 'fsps.bin'
452 13:51:30.701257 CBFS: Found @ offset d1fc0 size 35000
453 13:51:30.727765 Detected 4 core, 8 thread CPU.
454 13:51:30.731031 Setting up SMI for CPU
455 13:51:30.734600 IED base = 0x9ac00000
456 13:51:30.737458 IED size = 0x00400000
457 13:51:30.737544 Will perform SMM setup.
458 13:51:30.744374 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 13:51:30.750423 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 13:51:30.757280 Processing 16 relocs. Offset value of 0x00030000
461 13:51:30.760528 Attempting to start 7 APs
462 13:51:30.764027 Waiting for 10ms after sending INIT.
463 13:51:30.777385 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
464 13:51:30.777483 done.
465 13:51:30.780811 AP: slot 2 apic_id 6.
466 13:51:30.784253 AP: slot 5 apic_id 7.
467 13:51:30.784349 AP: slot 1 apic_id 2.
468 13:51:30.787319 AP: slot 7 apic_id 4.
469 13:51:30.791008 AP: slot 6 apic_id 5.
470 13:51:30.791121 AP: slot 4 apic_id 3.
471 13:51:30.797171 Waiting for 2nd SIPI to complete...done.
472 13:51:30.804070 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 13:51:30.810435 Processing 13 relocs. Offset value of 0x00038000
474 13:51:30.816675 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 13:51:30.820399 Installing SMM handler to 0x9a000000
476 13:51:30.827165 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 13:51:30.833562 Processing 658 relocs. Offset value of 0x9a010000
478 13:51:30.839832 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 13:51:30.846365 Processing 13 relocs. Offset value of 0x9a008000
480 13:51:30.849968 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 13:51:30.856214 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 13:51:30.863002 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 13:51:30.866175 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 13:51:30.873012 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 13:51:30.879492 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 13:51:30.886023 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 13:51:30.892315 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 13:51:30.895989 Clearing SMI status registers
489 13:51:30.896102 SMI_STS: PM1
490 13:51:30.899095 PM1_STS: PWRBTN
491 13:51:30.899178 TCO_STS: SECOND_TO
492 13:51:30.902202 New SMBASE 0x9a000000
493 13:51:30.905395 In relocation handler: CPU 0
494 13:51:30.909130 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 13:51:30.915771 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 13:51:30.915871 Relocation complete.
497 13:51:30.918925 New SMBASE 0x99fff400
498 13:51:30.922019 In relocation handler: CPU 3
499 13:51:30.925592 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
500 13:51:30.931538 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 13:51:30.931654 Relocation complete.
502 13:51:30.935281 New SMBASE 0x99fffc00
503 13:51:30.938351 In relocation handler: CPU 1
504 13:51:30.941888 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
505 13:51:30.948083 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 13:51:30.948172 Relocation complete.
507 13:51:30.951776 New SMBASE 0x99fff000
508 13:51:30.954742 In relocation handler: CPU 4
509 13:51:30.958417 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
510 13:51:30.964667 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 13:51:30.964764 Relocation complete.
512 13:51:30.967880 New SMBASE 0x99ffe400
513 13:51:30.971598 In relocation handler: CPU 7
514 13:51:30.974591 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
515 13:51:30.980943 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 13:51:30.981045 Relocation complete.
517 13:51:30.984578 New SMBASE 0x99ffe800
518 13:51:30.987443 In relocation handler: CPU 6
519 13:51:30.991022 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
520 13:51:30.997602 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 13:51:30.997725 Relocation complete.
522 13:51:31.001049 New SMBASE 0x99fff800
523 13:51:31.004025 In relocation handler: CPU 2
524 13:51:31.007140 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
525 13:51:31.014113 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 13:51:31.014237 Relocation complete.
527 13:51:31.017109 New SMBASE 0x99ffec00
528 13:51:31.020653 In relocation handler: CPU 5
529 13:51:31.023666 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
530 13:51:31.030496 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 13:51:31.030627 Relocation complete.
532 13:51:31.033477 Initializing CPU #0
533 13:51:31.037252 CPU: vendor Intel device 806ec
534 13:51:31.040347 CPU: family 06, model 8e, stepping 0c
535 13:51:31.043980 Clearing out pending MCEs
536 13:51:31.046989 Setting up local APIC...
537 13:51:31.047078 apic_id: 0x00 done.
538 13:51:31.050045 Turbo is available but hidden
539 13:51:31.053770 Turbo is available and visible
540 13:51:31.056726 VMX status: enabled
541 13:51:31.059935 IA32_FEATURE_CONTROL status: locked
542 13:51:31.062945 Skip microcode update
543 13:51:31.063034 CPU #0 initialized
544 13:51:31.066620 Initializing CPU #3
545 13:51:31.066733 Initializing CPU #6
546 13:51:31.069725 Initializing CPU #7
547 13:51:31.072887 CPU: vendor Intel device 806ec
548 13:51:31.076704 CPU: family 06, model 8e, stepping 0c
549 13:51:31.079767 CPU: vendor Intel device 806ec
550 13:51:31.082807 CPU: family 06, model 8e, stepping 0c
551 13:51:31.086097 Clearing out pending MCEs
552 13:51:31.089755 Clearing out pending MCEs
553 13:51:31.092872 Setting up local APIC...
554 13:51:31.096473 CPU: vendor Intel device 806ec
555 13:51:31.099355 CPU: family 06, model 8e, stepping 0c
556 13:51:31.102718 Clearing out pending MCEs
557 13:51:31.102840 Initializing CPU #5
558 13:51:31.106181 Initializing CPU #2
559 13:51:31.109681 CPU: vendor Intel device 806ec
560 13:51:31.112926 CPU: family 06, model 8e, stepping 0c
561 13:51:31.116129 CPU: vendor Intel device 806ec
562 13:51:31.119216 CPU: family 06, model 8e, stepping 0c
563 13:51:31.122257 Clearing out pending MCEs
564 13:51:31.125926 Clearing out pending MCEs
565 13:51:31.126045 Setting up local APIC...
566 13:51:31.128992 Setting up local APIC...
567 13:51:31.132071 Setting up local APIC...
568 13:51:31.135682 Initializing CPU #1
569 13:51:31.135768 Initializing CPU #4
570 13:51:31.138674 CPU: vendor Intel device 806ec
571 13:51:31.142426 CPU: family 06, model 8e, stepping 0c
572 13:51:31.145516 CPU: vendor Intel device 806ec
573 13:51:31.148683 CPU: family 06, model 8e, stepping 0c
574 13:51:31.151867 Clearing out pending MCEs
575 13:51:31.155490 Clearing out pending MCEs
576 13:51:31.158517 Setting up local APIC...
577 13:51:31.162109 Setting up local APIC...
578 13:51:31.162223 apic_id: 0x06 done.
579 13:51:31.165401 apic_id: 0x07 done.
580 13:51:31.165490 VMX status: enabled
581 13:51:31.168544 VMX status: enabled
582 13:51:31.172164 IA32_FEATURE_CONTROL status: locked
583 13:51:31.175281 IA32_FEATURE_CONTROL status: locked
584 13:51:31.178380 Skip microcode update
585 13:51:31.181495 Skip microcode update
586 13:51:31.181585 CPU #2 initialized
587 13:51:31.184770 CPU #5 initialized
588 13:51:31.184859 apic_id: 0x01 done.
589 13:51:31.188512 apic_id: 0x03 done.
590 13:51:31.191748 Setting up local APIC...
591 13:51:31.194865 apic_id: 0x05 done.
592 13:51:31.194955 apic_id: 0x04 done.
593 13:51:31.198092 VMX status: enabled
594 13:51:31.198176 VMX status: enabled
595 13:51:31.204604 IA32_FEATURE_CONTROL status: locked
596 13:51:31.208180 IA32_FEATURE_CONTROL status: locked
597 13:51:31.208270 Skip microcode update
598 13:51:31.211145 Skip microcode update
599 13:51:31.214713 CPU #6 initialized
600 13:51:31.214798 CPU #7 initialized
601 13:51:31.217588 VMX status: enabled
602 13:51:31.217669 apic_id: 0x02 done.
603 13:51:31.220999 VMX status: enabled
604 13:51:31.224176 VMX status: enabled
605 13:51:31.227971 IA32_FEATURE_CONTROL status: locked
606 13:51:31.231039 IA32_FEATURE_CONTROL status: locked
607 13:51:31.234105 Skip microcode update
608 13:51:31.234208 Skip microcode update
609 13:51:31.237815 CPU #4 initialized
610 13:51:31.237900 CPU #1 initialized
611 13:51:31.244318 IA32_FEATURE_CONTROL status: locked
612 13:51:31.244410 Skip microcode update
613 13:51:31.247411 CPU #3 initialized
614 13:51:31.250615 bsp_do_flight_plan done after 453 msecs.
615 13:51:31.253726 CPU: frequency set to 4200 MHz
616 13:51:31.257413 Enabling SMIs.
617 13:51:31.257495 Locking SMM.
618 13:51:31.272341 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 13:51:31.275417 CBFS @ c08000 size 3f8000
620 13:51:31.282172 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 13:51:31.282298 CBFS: Locating 'vbt.bin'
622 13:51:31.288358 CBFS: Found @ offset 5f5c0 size 499
623 13:51:31.291430 Found a VBT of 4608 bytes after decompression
624 13:51:31.476794 Display FSP Version Info HOB
625 13:51:31.480569 Reference Code - CPU = 9.0.1e.30
626 13:51:31.483680 uCode Version = 0.0.0.ca
627 13:51:31.486655 TXT ACM version = ff.ff.ff.ffff
628 13:51:31.490425 Display FSP Version Info HOB
629 13:51:31.493401 Reference Code - ME = 9.0.1e.30
630 13:51:31.496425 MEBx version = 0.0.0.0
631 13:51:31.499649 ME Firmware Version = Consumer SKU
632 13:51:31.503272 Display FSP Version Info HOB
633 13:51:31.506414 Reference Code - CML PCH = 9.0.1e.30
634 13:51:31.509528 PCH-CRID Status = Disabled
635 13:51:31.512557 PCH-CRID Original Value = ff.ff.ff.ffff
636 13:51:31.515802 PCH-CRID New Value = ff.ff.ff.ffff
637 13:51:31.519540 OPROM - RST - RAID = ff.ff.ff.ffff
638 13:51:31.522664 ChipsetInit Base Version = ff.ff.ff.ffff
639 13:51:31.529276 ChipsetInit Oem Version = ff.ff.ff.ffff
640 13:51:31.529756 Display FSP Version Info HOB
641 13:51:31.535158 Reference Code - SA - System Agent = 9.0.1e.30
642 13:51:31.538599 Reference Code - MRC = 0.7.1.6c
643 13:51:31.542029 SA - PCIe Version = 9.0.1e.30
644 13:51:31.545437 SA-CRID Status = Disabled
645 13:51:31.548785 SA-CRID Original Value = 0.0.0.c
646 13:51:31.549197 SA-CRID New Value = 0.0.0.c
647 13:51:31.551675 OPROM - VBIOS = ff.ff.ff.ffff
648 13:51:31.555358 RTC Init
649 13:51:31.558327 Set power on after power failure.
650 13:51:31.562002 Disabling Deep S3
651 13:51:31.562339 Disabling Deep S3
652 13:51:31.565593 Disabling Deep S4
653 13:51:31.565976 Disabling Deep S4
654 13:51:31.568515 Disabling Deep S5
655 13:51:31.568870 Disabling Deep S5
656 13:51:31.575189 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
657 13:51:31.578061 Enumerating buses...
658 13:51:31.581139 Show all devs... Before device enumeration.
659 13:51:31.584871 Root Device: enabled 1
660 13:51:31.588181 CPU_CLUSTER: 0: enabled 1
661 13:51:31.588553 DOMAIN: 0000: enabled 1
662 13:51:31.591185 APIC: 00: enabled 1
663 13:51:31.594323 PCI: 00:00.0: enabled 1
664 13:51:31.598080 PCI: 00:02.0: enabled 1
665 13:51:31.598433 PCI: 00:04.0: enabled 0
666 13:51:31.600990 PCI: 00:05.0: enabled 0
667 13:51:31.604084 PCI: 00:12.0: enabled 1
668 13:51:31.607214 PCI: 00:12.5: enabled 0
669 13:51:31.607561 PCI: 00:12.6: enabled 0
670 13:51:31.610912 PCI: 00:14.0: enabled 1
671 13:51:31.613976 PCI: 00:14.1: enabled 0
672 13:51:31.617128 PCI: 00:14.3: enabled 1
673 13:51:31.617463 PCI: 00:14.5: enabled 0
674 13:51:31.620264 PCI: 00:15.0: enabled 1
675 13:51:31.623338 PCI: 00:15.1: enabled 1
676 13:51:31.627092 PCI: 00:15.2: enabled 0
677 13:51:31.627394 PCI: 00:15.3: enabled 0
678 13:51:31.630071 PCI: 00:16.0: enabled 1
679 13:51:31.633132 PCI: 00:16.1: enabled 0
680 13:51:31.636314 PCI: 00:16.2: enabled 0
681 13:51:31.636403 PCI: 00:16.3: enabled 0
682 13:51:31.640051 PCI: 00:16.4: enabled 0
683 13:51:31.642980 PCI: 00:16.5: enabled 0
684 13:51:31.643066 PCI: 00:17.0: enabled 1
685 13:51:31.646327 PCI: 00:19.0: enabled 1
686 13:51:31.649325 PCI: 00:19.1: enabled 0
687 13:51:31.652784 PCI: 00:19.2: enabled 0
688 13:51:31.652873 PCI: 00:1a.0: enabled 0
689 13:51:31.656354 PCI: 00:1c.0: enabled 0
690 13:51:31.659097 PCI: 00:1c.1: enabled 0
691 13:51:31.662704 PCI: 00:1c.2: enabled 0
692 13:51:31.662788 PCI: 00:1c.3: enabled 0
693 13:51:31.665696 PCI: 00:1c.4: enabled 0
694 13:51:31.669171 PCI: 00:1c.5: enabled 0
695 13:51:31.672153 PCI: 00:1c.6: enabled 0
696 13:51:31.672234 PCI: 00:1c.7: enabled 0
697 13:51:31.675908 PCI: 00:1d.0: enabled 1
698 13:51:31.678986 PCI: 00:1d.1: enabled 0
699 13:51:31.682056 PCI: 00:1d.2: enabled 0
700 13:51:31.682144 PCI: 00:1d.3: enabled 0
701 13:51:31.685801 PCI: 00:1d.4: enabled 0
702 13:51:31.688903 PCI: 00:1d.5: enabled 1
703 13:51:31.691971 PCI: 00:1e.0: enabled 1
704 13:51:31.692058 PCI: 00:1e.1: enabled 0
705 13:51:31.695096 PCI: 00:1e.2: enabled 1
706 13:51:31.698775 PCI: 00:1e.3: enabled 1
707 13:51:31.701958 PCI: 00:1f.0: enabled 1
708 13:51:31.702045 PCI: 00:1f.1: enabled 1
709 13:51:31.705044 PCI: 00:1f.2: enabled 1
710 13:51:31.708684 PCI: 00:1f.3: enabled 1
711 13:51:31.711832 PCI: 00:1f.4: enabled 1
712 13:51:31.711942 PCI: 00:1f.5: enabled 1
713 13:51:31.714900 PCI: 00:1f.6: enabled 0
714 13:51:31.717993 USB0 port 0: enabled 1
715 13:51:31.718096 I2C: 00:15: enabled 1
716 13:51:31.721201 I2C: 00:5d: enabled 1
717 13:51:31.724976 GENERIC: 0.0: enabled 1
718 13:51:31.728099 I2C: 00:1a: enabled 1
719 13:51:31.728198 I2C: 00:38: enabled 1
720 13:51:31.731230 I2C: 00:39: enabled 1
721 13:51:31.734243 I2C: 00:3a: enabled 1
722 13:51:31.734353 I2C: 00:3b: enabled 1
723 13:51:31.737948 PCI: 00:00.0: enabled 1
724 13:51:31.741007 SPI: 00: enabled 1
725 13:51:31.741094 SPI: 01: enabled 1
726 13:51:31.744170 PNP: 0c09.0: enabled 1
727 13:51:31.747301 USB2 port 0: enabled 1
728 13:51:31.747388 USB2 port 1: enabled 1
729 13:51:31.750925 USB2 port 2: enabled 0
730 13:51:31.753889 USB2 port 3: enabled 0
731 13:51:31.757276 USB2 port 5: enabled 0
732 13:51:31.757394 USB2 port 6: enabled 1
733 13:51:31.760875 USB2 port 9: enabled 1
734 13:51:31.763991 USB3 port 0: enabled 1
735 13:51:31.764103 USB3 port 1: enabled 1
736 13:51:31.767333 USB3 port 2: enabled 1
737 13:51:31.770315 USB3 port 3: enabled 1
738 13:51:31.773344 USB3 port 4: enabled 0
739 13:51:31.773458 APIC: 02: enabled 1
740 13:51:31.776858 APIC: 06: enabled 1
741 13:51:31.776968 APIC: 01: enabled 1
742 13:51:31.780205 APIC: 03: enabled 1
743 13:51:31.783312 APIC: 07: enabled 1
744 13:51:31.783389 APIC: 05: enabled 1
745 13:51:31.786836 APIC: 04: enabled 1
746 13:51:31.789910 Compare with tree...
747 13:51:31.790017 Root Device: enabled 1
748 13:51:31.793062 CPU_CLUSTER: 0: enabled 1
749 13:51:31.796152 APIC: 00: enabled 1
750 13:51:31.799872 APIC: 02: enabled 1
751 13:51:31.799983 APIC: 06: enabled 1
752 13:51:31.802885 APIC: 01: enabled 1
753 13:51:31.805941 APIC: 03: enabled 1
754 13:51:31.806049 APIC: 07: enabled 1
755 13:51:31.809707 APIC: 05: enabled 1
756 13:51:31.812741 APIC: 04: enabled 1
757 13:51:31.812833 DOMAIN: 0000: enabled 1
758 13:51:31.816297 PCI: 00:00.0: enabled 1
759 13:51:31.819359 PCI: 00:02.0: enabled 1
760 13:51:31.822414 PCI: 00:04.0: enabled 0
761 13:51:31.825566 PCI: 00:05.0: enabled 0
762 13:51:31.825656 PCI: 00:12.0: enabled 1
763 13:51:31.829264 PCI: 00:12.5: enabled 0
764 13:51:31.832395 PCI: 00:12.6: enabled 0
765 13:51:31.835464 PCI: 00:14.0: enabled 1
766 13:51:31.838995 USB0 port 0: enabled 1
767 13:51:31.842081 USB2 port 0: enabled 1
768 13:51:31.842170 USB2 port 1: enabled 1
769 13:51:31.845092 USB2 port 2: enabled 0
770 13:51:31.848770 USB2 port 3: enabled 0
771 13:51:31.851948 USB2 port 5: enabled 0
772 13:51:31.854862 USB2 port 6: enabled 1
773 13:51:31.858523 USB2 port 9: enabled 1
774 13:51:31.858603 USB3 port 0: enabled 1
775 13:51:31.861655 USB3 port 1: enabled 1
776 13:51:31.864648 USB3 port 2: enabled 1
777 13:51:31.867998 USB3 port 3: enabled 1
778 13:51:31.871446 USB3 port 4: enabled 0
779 13:51:31.874511 PCI: 00:14.1: enabled 0
780 13:51:31.874595 PCI: 00:14.3: enabled 1
781 13:51:31.878171 PCI: 00:14.5: enabled 0
782 13:51:31.881189 PCI: 00:15.0: enabled 1
783 13:51:31.884276 I2C: 00:15: enabled 1
784 13:51:31.887848 PCI: 00:15.1: enabled 1
785 13:51:31.887937 I2C: 00:5d: enabled 1
786 13:51:31.890824 GENERIC: 0.0: enabled 1
787 13:51:31.894380 PCI: 00:15.2: enabled 0
788 13:51:31.897460 PCI: 00:15.3: enabled 0
789 13:51:31.900646 PCI: 00:16.0: enabled 1
790 13:51:31.900727 PCI: 00:16.1: enabled 0
791 13:51:31.903778 PCI: 00:16.2: enabled 0
792 13:51:31.907514 PCI: 00:16.3: enabled 0
793 13:51:31.910702 PCI: 00:16.4: enabled 0
794 13:51:31.913789 PCI: 00:16.5: enabled 0
795 13:51:31.913867 PCI: 00:17.0: enabled 1
796 13:51:31.917023 PCI: 00:19.0: enabled 1
797 13:51:31.920536 I2C: 00:1a: enabled 1
798 13:51:31.923501 I2C: 00:38: enabled 1
799 13:51:31.923604 I2C: 00:39: enabled 1
800 13:51:31.927152 I2C: 00:3a: enabled 1
801 13:51:31.930170 I2C: 00:3b: enabled 1
802 13:51:31.933366 PCI: 00:19.1: enabled 0
803 13:51:31.937069 PCI: 00:19.2: enabled 0
804 13:51:31.937156 PCI: 00:1a.0: enabled 0
805 13:51:31.940130 PCI: 00:1c.0: enabled 0
806 13:51:31.943532 PCI: 00:1c.1: enabled 0
807 13:51:31.946695 PCI: 00:1c.2: enabled 0
808 13:51:31.949839 PCI: 00:1c.3: enabled 0
809 13:51:31.949927 PCI: 00:1c.4: enabled 0
810 13:51:31.952972 PCI: 00:1c.5: enabled 0
811 13:51:31.956714 PCI: 00:1c.6: enabled 0
812 13:51:31.959830 PCI: 00:1c.7: enabled 0
813 13:51:31.962849 PCI: 00:1d.0: enabled 1
814 13:51:31.962936 PCI: 00:1d.1: enabled 0
815 13:51:31.965911 PCI: 00:1d.2: enabled 0
816 13:51:31.969694 PCI: 00:1d.3: enabled 0
817 13:51:31.972575 PCI: 00:1d.4: enabled 0
818 13:51:31.975963 PCI: 00:1d.5: enabled 1
819 13:51:31.979253 PCI: 00:00.0: enabled 1
820 13:51:31.979361 PCI: 00:1e.0: enabled 1
821 13:51:31.982581 PCI: 00:1e.1: enabled 0
822 13:51:31.985510 PCI: 00:1e.2: enabled 1
823 13:51:31.988996 SPI: 00: enabled 1
824 13:51:31.989075 PCI: 00:1e.3: enabled 1
825 13:51:31.992089 SPI: 01: enabled 1
826 13:51:31.995502 PCI: 00:1f.0: enabled 1
827 13:51:31.998951 PNP: 0c09.0: enabled 1
828 13:51:32.002054 PCI: 00:1f.1: enabled 1
829 13:51:32.002163 PCI: 00:1f.2: enabled 1
830 13:51:32.005097 PCI: 00:1f.3: enabled 1
831 13:51:32.008898 PCI: 00:1f.4: enabled 1
832 13:51:32.011965 PCI: 00:1f.5: enabled 1
833 13:51:32.015093 PCI: 00:1f.6: enabled 0
834 13:51:32.015172 Root Device scanning...
835 13:51:32.018821 scan_static_bus for Root Device
836 13:51:32.021898 CPU_CLUSTER: 0 enabled
837 13:51:32.025015 DOMAIN: 0000 enabled
838 13:51:32.028077 DOMAIN: 0000 scanning...
839 13:51:32.031499 PCI: pci_scan_bus for bus 00
840 13:51:32.031640 PCI: 00:00.0 [8086/0000] ops
841 13:51:32.034587 PCI: 00:00.0 [8086/9b61] enabled
842 13:51:32.037646 PCI: 00:02.0 [8086/0000] bus ops
843 13:51:32.041354 PCI: 00:02.0 [8086/9b41] enabled
844 13:51:32.047504 PCI: 00:04.0 [8086/1903] disabled
845 13:51:32.051029 PCI: 00:08.0 [8086/1911] enabled
846 13:51:32.054055 PCI: 00:12.0 [8086/02f9] enabled
847 13:51:32.057810 PCI: 00:14.0 [8086/0000] bus ops
848 13:51:32.060853 PCI: 00:14.0 [8086/02ed] enabled
849 13:51:32.064021 PCI: 00:14.2 [8086/02ef] enabled
850 13:51:32.067023 PCI: 00:14.3 [8086/02f0] enabled
851 13:51:32.070678 PCI: 00:15.0 [8086/0000] bus ops
852 13:51:32.073784 PCI: 00:15.0 [8086/02e8] enabled
853 13:51:32.077319 PCI: 00:15.1 [8086/0000] bus ops
854 13:51:32.080433 PCI: 00:15.1 [8086/02e9] enabled
855 13:51:32.083513 PCI: 00:16.0 [8086/0000] ops
856 13:51:32.087083 PCI: 00:16.0 [8086/02e0] enabled
857 13:51:32.089903 PCI: 00:17.0 [8086/0000] ops
858 13:51:32.093174 PCI: 00:17.0 [8086/02d3] enabled
859 13:51:32.096688 PCI: 00:19.0 [8086/0000] bus ops
860 13:51:32.099750 PCI: 00:19.0 [8086/02c5] enabled
861 13:51:32.103305 PCI: 00:1d.0 [8086/0000] bus ops
862 13:51:32.106597 PCI: 00:1d.0 [8086/02b0] enabled
863 13:51:32.110115 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 13:51:32.113163 PCI: 00:1e.0 [8086/0000] ops
865 13:51:32.116234 PCI: 00:1e.0 [8086/02a8] enabled
866 13:51:32.119381 PCI: 00:1e.2 [8086/0000] bus ops
867 13:51:32.123045 PCI: 00:1e.2 [8086/02aa] enabled
868 13:51:32.126155 PCI: 00:1e.3 [8086/0000] bus ops
869 13:51:32.129154 PCI: 00:1e.3 [8086/02ab] enabled
870 13:51:32.132758 PCI: 00:1f.0 [8086/0000] bus ops
871 13:51:32.135802 PCI: 00:1f.0 [8086/0284] enabled
872 13:51:32.142574 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 13:51:32.148702 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 13:51:32.152389 PCI: 00:1f.3 [8086/0000] bus ops
875 13:51:32.155353 PCI: 00:1f.3 [8086/02c8] enabled
876 13:51:32.158977 PCI: 00:1f.4 [8086/0000] bus ops
877 13:51:32.161932 PCI: 00:1f.4 [8086/02a3] enabled
878 13:51:32.165025 PCI: 00:1f.5 [8086/0000] bus ops
879 13:51:32.168808 PCI: 00:1f.5 [8086/02a4] enabled
880 13:51:32.171933 PCI: Leftover static devices:
881 13:51:32.172011 PCI: 00:05.0
882 13:51:32.175095 PCI: 00:12.5
883 13:51:32.175204 PCI: 00:12.6
884 13:51:32.178230 PCI: 00:14.1
885 13:51:32.178331 PCI: 00:14.5
886 13:51:32.178429 PCI: 00:15.2
887 13:51:32.181807 PCI: 00:15.3
888 13:51:32.181881 PCI: 00:16.1
889 13:51:32.184917 PCI: 00:16.2
890 13:51:32.185024 PCI: 00:16.3
891 13:51:32.185121 PCI: 00:16.4
892 13:51:32.188017 PCI: 00:16.5
893 13:51:32.188090 PCI: 00:19.1
894 13:51:32.191114 PCI: 00:19.2
895 13:51:32.191196 PCI: 00:1a.0
896 13:51:32.194655 PCI: 00:1c.0
897 13:51:32.194772 PCI: 00:1c.1
898 13:51:32.194853 PCI: 00:1c.2
899 13:51:32.197634 PCI: 00:1c.3
900 13:51:32.197769 PCI: 00:1c.4
901 13:51:32.200964 PCI: 00:1c.5
902 13:51:32.201071 PCI: 00:1c.6
903 13:51:32.201167 PCI: 00:1c.7
904 13:51:32.204918 PCI: 00:1d.1
905 13:51:32.205039 PCI: 00:1d.2
906 13:51:32.207706 PCI: 00:1d.3
907 13:51:32.207782 PCI: 00:1d.4
908 13:51:32.210679 PCI: 00:1d.5
909 13:51:32.210759 PCI: 00:1e.1
910 13:51:32.210829 PCI: 00:1f.1
911 13:51:32.214218 PCI: 00:1f.2
912 13:51:32.214322 PCI: 00:1f.6
913 13:51:32.217245 PCI: Check your devicetree.cb.
914 13:51:32.220754 PCI: 00:02.0 scanning...
915 13:51:32.223709 scan_generic_bus for PCI: 00:02.0
916 13:51:32.227443 scan_generic_bus for PCI: 00:02.0 done
917 13:51:32.233744 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
918 13:51:32.236852 PCI: 00:14.0 scanning...
919 13:51:32.240511 scan_static_bus for PCI: 00:14.0
920 13:51:32.243459 USB0 port 0 enabled
921 13:51:32.243566 USB0 port 0 scanning...
922 13:51:32.246548 scan_static_bus for USB0 port 0
923 13:51:32.250268 USB2 port 0 enabled
924 13:51:32.253391 USB2 port 1 enabled
925 13:51:32.253513 USB2 port 2 disabled
926 13:51:32.256516 USB2 port 3 disabled
927 13:51:32.260185 USB2 port 5 disabled
928 13:51:32.260272 USB2 port 6 enabled
929 13:51:32.263283 USB2 port 9 enabled
930 13:51:32.263429 USB3 port 0 enabled
931 13:51:32.266458 USB3 port 1 enabled
932 13:51:32.269710 USB3 port 2 enabled
933 13:51:32.269827 USB3 port 3 enabled
934 13:51:32.272785 USB3 port 4 disabled
935 13:51:32.276578 USB2 port 0 scanning...
936 13:51:32.279694 scan_static_bus for USB2 port 0
937 13:51:32.282731 scan_static_bus for USB2 port 0 done
938 13:51:32.289295 scan_bus: scanning of bus USB2 port 0 took 9705 usecs
939 13:51:32.289406 USB2 port 1 scanning...
940 13:51:32.292406 scan_static_bus for USB2 port 1
941 13:51:32.299329 scan_static_bus for USB2 port 1 done
942 13:51:32.302362 scan_bus: scanning of bus USB2 port 1 took 9706 usecs
943 13:51:32.305760 USB2 port 6 scanning...
944 13:51:32.309169 scan_static_bus for USB2 port 6
945 13:51:32.311931 scan_static_bus for USB2 port 6 done
946 13:51:32.319066 scan_bus: scanning of bus USB2 port 6 took 9693 usecs
947 13:51:32.319154 USB2 port 9 scanning...
948 13:51:32.322140 scan_static_bus for USB2 port 9
949 13:51:32.329004 scan_static_bus for USB2 port 9 done
950 13:51:32.331996 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
951 13:51:32.335516 USB3 port 0 scanning...
952 13:51:32.338651 scan_static_bus for USB3 port 0
953 13:51:32.341854 scan_static_bus for USB3 port 0 done
954 13:51:32.348533 scan_bus: scanning of bus USB3 port 0 took 9687 usecs
955 13:51:32.351757 USB3 port 1 scanning...
956 13:51:32.354723 scan_static_bus for USB3 port 1
957 13:51:32.358458 scan_static_bus for USB3 port 1 done
958 13:51:32.361443 scan_bus: scanning of bus USB3 port 1 took 9695 usecs
959 13:51:32.364945 USB3 port 2 scanning...
960 13:51:32.368097 scan_static_bus for USB3 port 2
961 13:51:32.371225 scan_static_bus for USB3 port 2 done
962 13:51:32.377989 scan_bus: scanning of bus USB3 port 2 took 9687 usecs
963 13:51:32.381122 USB3 port 3 scanning...
964 13:51:32.384737 scan_static_bus for USB3 port 3
965 13:51:32.387845 scan_static_bus for USB3 port 3 done
966 13:51:32.394198 scan_bus: scanning of bus USB3 port 3 took 9705 usecs
967 13:51:32.397448 scan_static_bus for USB0 port 0 done
968 13:51:32.401001 scan_bus: scanning of bus USB0 port 0 took 155298 usecs
969 13:51:32.407038 scan_static_bus for PCI: 00:14.0 done
970 13:51:32.410591 scan_bus: scanning of bus PCI: 00:14.0 took 172925 usecs
971 13:51:32.413580 PCI: 00:15.0 scanning...
972 13:51:32.416980 scan_generic_bus for PCI: 00:15.0
973 13:51:32.420430 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 13:51:32.426931 scan_generic_bus for PCI: 00:15.0 done
975 13:51:32.429785 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
976 13:51:32.433231 PCI: 00:15.1 scanning...
977 13:51:32.436803 scan_generic_bus for PCI: 00:15.1
978 13:51:32.442910 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 13:51:32.446542 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 13:51:32.449633 scan_generic_bus for PCI: 00:15.1 done
981 13:51:32.456142 scan_bus: scanning of bus PCI: 00:15.1 took 18603 usecs
982 13:51:32.459246 PCI: 00:19.0 scanning...
983 13:51:32.462383 scan_generic_bus for PCI: 00:19.0
984 13:51:32.465944 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 13:51:32.468997 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 13:51:32.472694 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 13:51:32.478905 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 13:51:32.481994 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 13:51:32.485607 scan_generic_bus for PCI: 00:19.0 done
990 13:51:32.491888 scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs
991 13:51:32.494797 PCI: 00:1d.0 scanning...
992 13:51:32.498537 do_pci_scan_bridge for PCI: 00:1d.0
993 13:51:32.501626 PCI: pci_scan_bus for bus 01
994 13:51:32.504767 PCI: 01:00.0 [1c5c/1327] enabled
995 13:51:32.507908 Enabling Common Clock Configuration
996 13:51:32.511491 L1 Sub-State supported from root port 29
997 13:51:32.514448 L1 Sub-State Support = 0xf
998 13:51:32.518006 CommonModeRestoreTime = 0x28
999 13:51:32.521148 Power On Value = 0x16, Power On Scale = 0x0
1000 13:51:32.524752 ASPM: Enabled L1
1001 13:51:32.531155 scan_bus: scanning of bus PCI: 00:1d.0 took 32778 usecs
1002 13:51:32.531247 PCI: 00:1e.2 scanning...
1003 13:51:32.534514 scan_generic_bus for PCI: 00:1e.2
1004 13:51:32.540666 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 13:51:32.544340 scan_generic_bus for PCI: 00:1e.2 done
1006 13:51:32.547338 scan_bus: scanning of bus PCI: 00:1e.2 took 13994 usecs
1007 13:51:32.550347 PCI: 00:1e.3 scanning...
1008 13:51:32.553664 scan_generic_bus for PCI: 00:1e.3
1009 13:51:32.560273 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 13:51:32.563937 scan_generic_bus for PCI: 00:1e.3 done
1011 13:51:32.567037 scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs
1012 13:51:32.570721 PCI: 00:1f.0 scanning...
1013 13:51:32.573606 scan_static_bus for PCI: 00:1f.0
1014 13:51:32.576658 PNP: 0c09.0 enabled
1015 13:51:32.580512 scan_static_bus for PCI: 00:1f.0 done
1016 13:51:32.586789 scan_bus: scanning of bus PCI: 00:1f.0 took 12092 usecs
1017 13:51:32.589831 PCI: 00:1f.3 scanning...
1018 13:51:32.593017 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1019 13:51:32.596724 PCI: 00:1f.4 scanning...
1020 13:51:32.599728 scan_generic_bus for PCI: 00:1f.4
1021 13:51:32.602664 scan_generic_bus for PCI: 00:1f.4 done
1022 13:51:32.609261 scan_bus: scanning of bus PCI: 00:1f.4 took 10174 usecs
1023 13:51:32.612990 PCI: 00:1f.5 scanning...
1024 13:51:32.616102 scan_generic_bus for PCI: 00:1f.5
1025 13:51:32.619226 scan_generic_bus for PCI: 00:1f.5 done
1026 13:51:32.625705 scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs
1027 13:51:32.632117 scan_bus: scanning of bus DOMAIN: 0000 took 604825 usecs
1028 13:51:32.635709 scan_static_bus for Root Device done
1029 13:51:32.642006 scan_bus: scanning of bus Root Device took 624689 usecs
1030 13:51:32.642120 done
1031 13:51:32.645621 Chrome EC: UHEPI supported
1032 13:51:32.651483 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 13:51:32.655166 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 13:51:32.661632 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 13:51:32.668905 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 13:51:32.671856 SPI flash protection: WPSW=0 SRP0=0
1037 13:51:32.678332 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 13:51:32.682150 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1039 13:51:32.685270 found VGA at PCI: 00:02.0
1040 13:51:32.688404 Setting up VGA for PCI: 00:02.0
1041 13:51:32.694736 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 13:51:32.698244 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 13:51:32.701375 Allocating resources...
1044 13:51:32.705068 Reading resources...
1045 13:51:32.707991 Root Device read_resources bus 0 link: 0
1046 13:51:32.711036 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 13:51:32.717879 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 13:51:32.720928 DOMAIN: 0000 read_resources bus 0 link: 0
1049 13:51:32.729005 PCI: 00:14.0 read_resources bus 0 link: 0
1050 13:51:32.731972 USB0 port 0 read_resources bus 0 link: 0
1051 13:51:32.740724 USB0 port 0 read_resources bus 0 link: 0 done
1052 13:51:32.743619 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 13:51:32.750870 PCI: 00:15.0 read_resources bus 1 link: 0
1054 13:51:32.753952 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 13:51:32.760689 PCI: 00:15.1 read_resources bus 2 link: 0
1056 13:51:32.764358 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 13:51:32.771921 PCI: 00:19.0 read_resources bus 3 link: 0
1058 13:51:32.777949 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 13:51:32.781438 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 13:51:32.788036 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 13:51:32.791114 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 13:51:32.798137 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 13:51:32.801199 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 13:51:32.807955 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 13:51:32.810947 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 13:51:32.817714 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 13:51:32.823867 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 13:51:32.827664 Root Device read_resources bus 0 link: 0 done
1069 13:51:32.830661 Done reading resources.
1070 13:51:32.837277 Show resources in subtree (Root Device)...After reading.
1071 13:51:32.840167 Root Device child on link 0 CPU_CLUSTER: 0
1072 13:51:32.843567 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 13:51:32.847048 APIC: 00
1074 13:51:32.847134 APIC: 02
1075 13:51:32.850436 APIC: 06
1076 13:51:32.850542 APIC: 01
1077 13:51:32.850668 APIC: 03
1078 13:51:32.853459 APIC: 07
1079 13:51:32.853571 APIC: 05
1080 13:51:32.853666 APIC: 04
1081 13:51:32.906428 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 13:51:32.906871 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 13:51:32.907033 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 13:51:32.907152 PCI: 00:00.0
1085 13:51:32.907265 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 13:51:32.907432 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 13:51:32.921074 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 13:51:32.921382 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 13:51:32.927872 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 13:51:32.937275 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 13:51:32.947133 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 13:51:32.953795 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 13:51:32.963691 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 13:51:32.973055 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 13:51:32.983044 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 13:51:32.992671 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 13:51:33.003025 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 13:51:33.012148 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 13:51:33.022015 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 13:51:33.028688 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 13:51:33.032400 PCI: 00:02.0
1102 13:51:33.041849 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 13:51:33.051697 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 13:51:33.061355 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 13:51:33.061449 PCI: 00:04.0
1106 13:51:33.064366 PCI: 00:08.0
1107 13:51:33.074444 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 13:51:33.074567 PCI: 00:12.0
1109 13:51:33.084278 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 13:51:33.090988 PCI: 00:14.0 child on link 0 USB0 port 0
1111 13:51:33.100776 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 13:51:33.104131 USB0 port 0 child on link 0 USB2 port 0
1113 13:51:33.107249 USB2 port 0
1114 13:51:33.107336 USB2 port 1
1115 13:51:33.110431 USB2 port 2
1116 13:51:33.110516 USB2 port 3
1117 13:51:33.113463 USB2 port 5
1118 13:51:33.113542 USB2 port 6
1119 13:51:33.117129 USB2 port 9
1120 13:51:33.117210 USB3 port 0
1121 13:51:33.120199 USB3 port 1
1122 13:51:33.120279 USB3 port 2
1123 13:51:33.123759 USB3 port 3
1124 13:51:33.126957 USB3 port 4
1125 13:51:33.127056 PCI: 00:14.2
1126 13:51:33.136677 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 13:51:33.146295 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 13:51:33.149446 PCI: 00:14.3
1129 13:51:33.159320 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 13:51:33.162887 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 13:51:33.172107 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 13:51:33.175435 I2C: 01:15
1133 13:51:33.179149 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 13:51:33.188638 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 13:51:33.188730 I2C: 02:5d
1136 13:51:33.191655 GENERIC: 0.0
1137 13:51:33.191733 PCI: 00:16.0
1138 13:51:33.201653 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 13:51:33.204711 PCI: 00:17.0
1140 13:51:33.214912 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 13:51:33.221098 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 13:51:33.231157 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 13:51:33.240917 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 13:51:33.247162 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 13:51:33.257199 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 13:51:33.260191 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 13:51:33.270302 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 13:51:33.273614 I2C: 03:1a
1149 13:51:33.273704 I2C: 03:38
1150 13:51:33.276413 I2C: 03:39
1151 13:51:33.276497 I2C: 03:3a
1152 13:51:33.280030 I2C: 03:3b
1153 13:51:33.282955 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 13:51:33.292665 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 13:51:33.302815 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 13:51:33.309418 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 13:51:33.312463 PCI: 01:00.0
1158 13:51:33.322164 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 13:51:33.325918 PCI: 00:1e.0
1160 13:51:33.335483 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 13:51:33.344712 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 13:51:33.348343 PCI: 00:1e.2 child on link 0 SPI: 00
1163 13:51:33.358197 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 13:51:33.361264 SPI: 00
1165 13:51:33.364267 PCI: 00:1e.3 child on link 0 SPI: 01
1166 13:51:33.374268 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 13:51:33.374390 SPI: 01
1168 13:51:33.380831 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 13:51:33.387454 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 13:51:33.397113 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 13:51:33.400238 PNP: 0c09.0
1172 13:51:33.406861 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 13:51:33.409948 PCI: 00:1f.3
1174 13:51:33.419929 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 13:51:33.429578 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 13:51:33.429721 PCI: 00:1f.4
1177 13:51:33.439259 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 13:51:33.449233 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 13:51:33.452418 PCI: 00:1f.5
1180 13:51:33.462402 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 13:51:33.465424 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 13:51:33.472255 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 13:51:33.478523 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 13:51:33.485500 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 13:51:33.488567 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 13:51:33.491607 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 13:51:33.495225 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 13:51:33.501565 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 13:51:33.508251 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 13:51:33.514354 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 13:51:33.524151 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 13:51:33.530763 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 13:51:33.534285 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 13:51:33.543868 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 13:51:33.546909 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 13:51:33.553754 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 13:51:33.556853 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 13:51:33.563781 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 13:51:33.566761 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 13:51:33.573060 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 13:51:33.576719 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 13:51:33.583345 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 13:51:33.586217 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 13:51:33.592820 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 13:51:33.596246 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 13:51:33.602900 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 13:51:33.605834 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 13:51:33.609265 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 13:51:33.615989 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 13:51:33.619052 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 13:51:33.625821 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 13:51:33.628978 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 13:51:33.635541 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 13:51:33.638862 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 13:51:33.645338 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 13:51:33.648288 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 13:51:33.655114 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 13:51:33.664859 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 13:51:33.667973 avoid_fixed_resources: DOMAIN: 0000
1220 13:51:33.671071 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 13:51:33.678051 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 13:51:33.687410 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 13:51:33.693943 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 13:51:33.700619 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 13:51:33.710466 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 13:51:33.717238 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 13:51:33.723649 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 13:51:33.733350 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 13:51:33.739771 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 13:51:33.746581 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 13:51:33.753094 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 13:51:33.756124 Setting resources...
1233 13:51:33.762930 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 13:51:33.765977 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 13:51:33.769248 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 13:51:33.776074 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 13:51:33.779151 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 13:51:33.785287 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 13:51:33.792208 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 13:51:33.798798 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 13:51:33.805051 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 13:51:33.811767 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 13:51:33.814762 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 13:51:33.821186 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 13:51:33.824818 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 13:51:33.831279 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 13:51:33.834893 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 13:51:33.841009 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 13:51:33.844205 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 13:51:33.850889 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 13:51:33.853949 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 13:51:33.857463 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 13:51:33.863942 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 13:51:33.867140 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 13:51:33.873970 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 13:51:33.876899 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 13:51:33.883651 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 13:51:33.886666 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 13:51:33.893455 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 13:51:33.896602 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 13:51:33.903274 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 13:51:33.906376 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 13:51:33.913088 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 13:51:33.916053 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 13:51:33.926183 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 13:51:33.932622 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 13:51:33.938937 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 13:51:33.945466 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 13:51:33.952299 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 13:51:33.959031 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 13:51:33.961634 Root Device assign_resources, bus 0 link: 0
1272 13:51:33.968597 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 13:51:33.978436 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 13:51:33.985179 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 13:51:33.991254 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 13:51:34.001235 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 13:51:34.007818 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 13:51:34.018325 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 13:51:34.021263 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 13:51:34.027854 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 13:51:34.034453 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 13:51:34.044005 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 13:51:34.050585 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 13:51:34.060523 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 13:51:34.063617 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 13:51:34.070314 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 13:51:34.076582 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 13:51:34.083389 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 13:51:34.086545 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 13:51:34.096389 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 13:51:34.102620 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 13:51:34.109026 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 13:51:34.118997 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 13:51:34.125250 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 13:51:34.135385 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 13:51:34.141904 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 13:51:34.148547 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 13:51:34.154909 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 13:51:34.158296 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 13:51:34.167956 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 13:51:34.177723 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 13:51:34.184217 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 13:51:34.190801 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 13:51:34.197763 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 13:51:34.204141 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 13:51:34.210789 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 13:51:34.220543 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 13:51:34.223701 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 13:51:34.227158 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 13:51:34.236879 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 13:51:34.240306 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 13:51:34.246744 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 13:51:34.249841 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 13:51:34.256616 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 13:51:34.259485 LPC: Trying to open IO window from 800 size 1ff
1316 13:51:34.269642 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 13:51:34.275701 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 13:51:34.285454 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 13:51:34.292025 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 13:51:34.298626 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 13:51:34.302279 Root Device assign_resources, bus 0 link: 0
1322 13:51:34.305414 Done setting resources.
1323 13:51:34.311668 Show resources in subtree (Root Device)...After assigning values.
1324 13:51:34.315208 Root Device child on link 0 CPU_CLUSTER: 0
1325 13:51:34.321853 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 13:51:34.321964 APIC: 00
1327 13:51:34.322064 APIC: 02
1328 13:51:34.325035 APIC: 06
1329 13:51:34.325119 APIC: 01
1330 13:51:34.328055 APIC: 03
1331 13:51:34.328139 APIC: 07
1332 13:51:34.328205 APIC: 05
1333 13:51:34.331693 APIC: 04
1334 13:51:34.334783 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 13:51:34.344433 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 13:51:34.354307 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 13:51:34.357540 PCI: 00:00.0
1338 13:51:34.367166 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 13:51:34.377007 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 13:51:34.386871 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 13:51:34.393652 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 13:51:34.403404 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 13:51:34.413145 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 13:51:34.422771 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 13:51:34.432830 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 13:51:34.442090 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 13:51:34.448769 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 13:51:34.458812 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 13:51:34.468814 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 13:51:34.478484 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 13:51:34.488118 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 13:51:34.498266 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 13:51:34.507886 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 13:51:34.507992 PCI: 00:02.0
1355 13:51:34.520888 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 13:51:34.530515 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 13:51:34.540296 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 13:51:34.540387 PCI: 00:04.0
1359 13:51:34.543390 PCI: 00:08.0
1360 13:51:34.553341 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 13:51:34.553438 PCI: 00:12.0
1362 13:51:34.563332 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 13:51:34.569797 PCI: 00:14.0 child on link 0 USB0 port 0
1364 13:51:34.579716 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 13:51:34.582779 USB0 port 0 child on link 0 USB2 port 0
1366 13:51:34.586345 USB2 port 0
1367 13:51:34.586429 USB2 port 1
1368 13:51:34.589355 USB2 port 2
1369 13:51:34.589436 USB2 port 3
1370 13:51:34.592831 USB2 port 5
1371 13:51:34.595907 USB2 port 6
1372 13:51:34.595986 USB2 port 9
1373 13:51:34.599081 USB3 port 0
1374 13:51:34.599164 USB3 port 1
1375 13:51:34.602750 USB3 port 2
1376 13:51:34.602855 USB3 port 3
1377 13:51:34.605828 USB3 port 4
1378 13:51:34.605913 PCI: 00:14.2
1379 13:51:34.615492 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 13:51:34.628857 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 13:51:34.628950 PCI: 00:14.3
1382 13:51:34.638324 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 13:51:34.645151 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 13:51:34.654445 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 13:51:34.654565 I2C: 01:15
1386 13:51:34.661217 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 13:51:34.670855 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 13:51:34.670971 I2C: 02:5d
1389 13:51:34.673766 GENERIC: 0.0
1390 13:51:34.673876 PCI: 00:16.0
1391 13:51:34.683673 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 13:51:34.687213 PCI: 00:17.0
1393 13:51:34.697007 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 13:51:34.706606 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 13:51:34.716865 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 13:51:34.726537 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 13:51:34.732620 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 13:51:34.746123 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 13:51:34.749230 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 13:51:34.759059 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 13:51:34.762221 I2C: 03:1a
1402 13:51:34.762318 I2C: 03:38
1403 13:51:34.762392 I2C: 03:39
1404 13:51:34.765401 I2C: 03:3a
1405 13:51:34.765474 I2C: 03:3b
1406 13:51:34.772098 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 13:51:34.782041 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 13:51:34.792096 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 13:51:34.801858 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 13:51:34.801960 PCI: 01:00.0
1411 13:51:34.814544 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 13:51:34.814635 PCI: 00:1e.0
1413 13:51:34.824818 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 13:51:34.837387 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 13:51:34.841052 PCI: 00:1e.2 child on link 0 SPI: 00
1416 13:51:34.850410 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 13:51:34.850505 SPI: 00
1418 13:51:34.857110 PCI: 00:1e.3 child on link 0 SPI: 01
1419 13:51:34.866950 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 13:51:34.867068 SPI: 01
1421 13:51:34.870055 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 13:51:34.879923 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 13:51:34.889820 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 13:51:34.889940 PNP: 0c09.0
1425 13:51:34.899423 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 13:51:34.902926 PCI: 00:1f.3
1427 13:51:34.912501 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 13:51:34.922895 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 13:51:34.923019 PCI: 00:1f.4
1430 13:51:34.932742 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 13:51:34.942281 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 13:51:34.945162 PCI: 00:1f.5
1433 13:51:34.955011 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 13:51:34.958191 Done allocating resources.
1435 13:51:34.964987 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 13:51:34.965080 Enabling resources...
1437 13:51:34.971747 PCI: 00:00.0 subsystem <- 8086/9b61
1438 13:51:34.971839 PCI: 00:00.0 cmd <- 06
1439 13:51:34.974995 PCI: 00:02.0 subsystem <- 8086/9b41
1440 13:51:34.978641 PCI: 00:02.0 cmd <- 03
1441 13:51:34.981591 PCI: 00:08.0 cmd <- 06
1442 13:51:34.985320 PCI: 00:12.0 subsystem <- 8086/02f9
1443 13:51:34.988349 PCI: 00:12.0 cmd <- 02
1444 13:51:34.991820 PCI: 00:14.0 subsystem <- 8086/02ed
1445 13:51:34.994726 PCI: 00:14.0 cmd <- 02
1446 13:51:34.998205 PCI: 00:14.2 cmd <- 02
1447 13:51:35.001171 PCI: 00:14.3 subsystem <- 8086/02f0
1448 13:51:35.004765 PCI: 00:14.3 cmd <- 02
1449 13:51:35.008174 PCI: 00:15.0 subsystem <- 8086/02e8
1450 13:51:35.008285 PCI: 00:15.0 cmd <- 02
1451 13:51:35.014840 PCI: 00:15.1 subsystem <- 8086/02e9
1452 13:51:35.014954 PCI: 00:15.1 cmd <- 02
1453 13:51:35.021349 PCI: 00:16.0 subsystem <- 8086/02e0
1454 13:51:35.021437 PCI: 00:16.0 cmd <- 02
1455 13:51:35.024340 PCI: 00:17.0 subsystem <- 8086/02d3
1456 13:51:35.028042 PCI: 00:17.0 cmd <- 03
1457 13:51:35.031097 PCI: 00:19.0 subsystem <- 8086/02c5
1458 13:51:35.034285 PCI: 00:19.0 cmd <- 02
1459 13:51:35.037347 PCI: 00:1d.0 bridge ctrl <- 0013
1460 13:51:35.040927 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 13:51:35.043902 PCI: 00:1d.0 cmd <- 06
1462 13:51:35.047457 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 13:51:35.050388 PCI: 00:1e.0 cmd <- 06
1464 13:51:35.054133 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 13:51:35.057200 PCI: 00:1e.2 cmd <- 06
1466 13:51:35.060261 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 13:51:35.063405 PCI: 00:1e.3 cmd <- 02
1468 13:51:35.067119 PCI: 00:1f.0 subsystem <- 8086/0284
1469 13:51:35.070200 PCI: 00:1f.0 cmd <- 407
1470 13:51:35.073341 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 13:51:35.076423 PCI: 00:1f.3 cmd <- 02
1472 13:51:35.079648 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 13:51:35.083260 PCI: 00:1f.4 cmd <- 03
1474 13:51:35.086364 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 13:51:35.089400 PCI: 00:1f.5 cmd <- 406
1476 13:51:35.097145 PCI: 01:00.0 cmd <- 02
1477 13:51:35.102093 done.
1478 13:51:35.111686 ME: Version: 14.0.39.1367
1479 13:51:35.118637 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1480 13:51:35.121707 Initializing devices...
1481 13:51:35.121793 Root Device init ...
1482 13:51:35.128256 Chrome EC: Set SMI mask to 0x0000000000000000
1483 13:51:35.134960 Chrome EC: clear events_b mask to 0x0000000000000000
1484 13:51:35.138138 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 13:51:35.144450 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 13:51:35.150929 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 13:51:35.154438 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 13:51:35.160441 Root Device init finished in 35222 usecs
1489 13:51:35.163681 CPU_CLUSTER: 0 init ...
1490 13:51:35.167199 CPU_CLUSTER: 0 init finished in 2439 usecs
1491 13:51:35.172767 PCI: 00:00.0 init ...
1492 13:51:35.175891 CPU TDP: 15 Watts
1493 13:51:35.179320 CPU PL2 = 64 Watts
1494 13:51:35.182566 PCI: 00:00.0 init finished in 7079 usecs
1495 13:51:35.185637 PCI: 00:02.0 init ...
1496 13:51:35.188709 PCI: 00:02.0 init finished in 2253 usecs
1497 13:51:35.192324 PCI: 00:08.0 init ...
1498 13:51:35.195448 PCI: 00:08.0 init finished in 2251 usecs
1499 13:51:35.198500 PCI: 00:12.0 init ...
1500 13:51:35.202026 PCI: 00:12.0 init finished in 2252 usecs
1501 13:51:35.204987 PCI: 00:14.0 init ...
1502 13:51:35.208673 PCI: 00:14.0 init finished in 2253 usecs
1503 13:51:35.211680 PCI: 00:14.2 init ...
1504 13:51:35.215121 PCI: 00:14.2 init finished in 2252 usecs
1505 13:51:35.218149 PCI: 00:14.3 init ...
1506 13:51:35.221588 PCI: 00:14.3 init finished in 2268 usecs
1507 13:51:35.225105 PCI: 00:15.0 init ...
1508 13:51:35.228140 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 13:51:35.234707 PCI: 00:15.0 init finished in 5976 usecs
1510 13:51:35.234796 PCI: 00:15.1 init ...
1511 13:51:35.241552 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 13:51:35.244616 PCI: 00:15.1 init finished in 5977 usecs
1513 13:51:35.247603 PCI: 00:16.0 init ...
1514 13:51:35.251202 PCI: 00:16.0 init finished in 2244 usecs
1515 13:51:35.254252 PCI: 00:19.0 init ...
1516 13:51:35.257753 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 13:51:35.260687 PCI: 00:19.0 init finished in 5975 usecs
1518 13:51:35.264212 PCI: 00:1d.0 init ...
1519 13:51:35.267364 Initializing PCH PCIe bridge.
1520 13:51:35.270466 PCI: 00:1d.0 init finished in 5286 usecs
1521 13:51:35.274229 PCI: 00:1f.0 init ...
1522 13:51:35.277861 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 13:51:35.284276 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 13:51:35.284364 IOAPIC: ID = 0x02
1525 13:51:35.287320 IOAPIC: Dumping registers
1526 13:51:35.290887 reg 0x0000: 0x02000000
1527 13:51:35.293886 reg 0x0001: 0x00770020
1528 13:51:35.296986 reg 0x0002: 0x00000000
1529 13:51:35.300859 PCI: 00:1f.0 init finished in 23539 usecs
1530 13:51:35.303873 PCI: 00:1f.4 init ...
1531 13:51:35.306780 PCI: 00:1f.4 init finished in 2262 usecs
1532 13:51:35.318468 PCI: 01:00.0 init ...
1533 13:51:35.321961 PCI: 01:00.0 init finished in 2254 usecs
1534 13:51:35.325989 PNP: 0c09.0 init ...
1535 13:51:35.329590 Google Chrome EC uptime: 11.142 seconds
1536 13:51:35.335965 Google Chrome AP resets since EC boot: 0
1537 13:51:35.338961 Google Chrome most recent AP reset causes:
1538 13:51:35.345458 Google Chrome EC reset flags at last EC boot: reset-pin
1539 13:51:35.349246 PNP: 0c09.0 init finished in 20620 usecs
1540 13:51:35.352257 Devices initialized
1541 13:51:35.355398 Show all devs... After init.
1542 13:51:35.355512 Root Device: enabled 1
1543 13:51:35.359075 CPU_CLUSTER: 0: enabled 1
1544 13:51:35.362153 DOMAIN: 0000: enabled 1
1545 13:51:35.365046 APIC: 00: enabled 1
1546 13:51:35.365137 PCI: 00:00.0: enabled 1
1547 13:51:35.368583 PCI: 00:02.0: enabled 1
1548 13:51:35.371706 PCI: 00:04.0: enabled 0
1549 13:51:35.374863 PCI: 00:05.0: enabled 0
1550 13:51:35.374941 PCI: 00:12.0: enabled 1
1551 13:51:35.378439 PCI: 00:12.5: enabled 0
1552 13:51:35.381525 PCI: 00:12.6: enabled 0
1553 13:51:35.385172 PCI: 00:14.0: enabled 1
1554 13:51:35.385255 PCI: 00:14.1: enabled 0
1555 13:51:35.388283 PCI: 00:14.3: enabled 1
1556 13:51:35.391378 PCI: 00:14.5: enabled 0
1557 13:51:35.391453 PCI: 00:15.0: enabled 1
1558 13:51:35.394387 PCI: 00:15.1: enabled 1
1559 13:51:35.398075 PCI: 00:15.2: enabled 0
1560 13:51:35.401149 PCI: 00:15.3: enabled 0
1561 13:51:35.401230 PCI: 00:16.0: enabled 1
1562 13:51:35.404169 PCI: 00:16.1: enabled 0
1563 13:51:35.407835 PCI: 00:16.2: enabled 0
1564 13:51:35.410845 PCI: 00:16.3: enabled 0
1565 13:51:35.410923 PCI: 00:16.4: enabled 0
1566 13:51:35.414030 PCI: 00:16.5: enabled 0
1567 13:51:35.417779 PCI: 00:17.0: enabled 1
1568 13:51:35.420884 PCI: 00:19.0: enabled 1
1569 13:51:35.420971 PCI: 00:19.1: enabled 0
1570 13:51:35.423908 PCI: 00:19.2: enabled 0
1571 13:51:35.427513 PCI: 00:1a.0: enabled 0
1572 13:51:35.430360 PCI: 00:1c.0: enabled 0
1573 13:51:35.430445 PCI: 00:1c.1: enabled 0
1574 13:51:35.433909 PCI: 00:1c.2: enabled 0
1575 13:51:35.437206 PCI: 00:1c.3: enabled 0
1576 13:51:35.440156 PCI: 00:1c.4: enabled 0
1577 13:51:35.440237 PCI: 00:1c.5: enabled 0
1578 13:51:35.443662 PCI: 00:1c.6: enabled 0
1579 13:51:35.447089 PCI: 00:1c.7: enabled 0
1580 13:51:35.450087 PCI: 00:1d.0: enabled 1
1581 13:51:35.450168 PCI: 00:1d.1: enabled 0
1582 13:51:35.453133 PCI: 00:1d.2: enabled 0
1583 13:51:35.456725 PCI: 00:1d.3: enabled 0
1584 13:51:35.459821 PCI: 00:1d.4: enabled 0
1585 13:51:35.459902 PCI: 00:1d.5: enabled 0
1586 13:51:35.462873 PCI: 00:1e.0: enabled 1
1587 13:51:35.466564 PCI: 00:1e.1: enabled 0
1588 13:51:35.469579 PCI: 00:1e.2: enabled 1
1589 13:51:35.469660 PCI: 00:1e.3: enabled 1
1590 13:51:35.473149 PCI: 00:1f.0: enabled 1
1591 13:51:35.475910 PCI: 00:1f.1: enabled 0
1592 13:51:35.479471 PCI: 00:1f.2: enabled 0
1593 13:51:35.479559 PCI: 00:1f.3: enabled 1
1594 13:51:35.482675 PCI: 00:1f.4: enabled 1
1595 13:51:35.485774 PCI: 00:1f.5: enabled 1
1596 13:51:35.489484 PCI: 00:1f.6: enabled 0
1597 13:51:35.489579 USB0 port 0: enabled 1
1598 13:51:35.492596 I2C: 01:15: enabled 1
1599 13:51:35.495597 I2C: 02:5d: enabled 1
1600 13:51:35.495712 GENERIC: 0.0: enabled 1
1601 13:51:35.499195 I2C: 03:1a: enabled 1
1602 13:51:35.502300 I2C: 03:38: enabled 1
1603 13:51:35.502410 I2C: 03:39: enabled 1
1604 13:51:35.505361 I2C: 03:3a: enabled 1
1605 13:51:35.509028 I2C: 03:3b: enabled 1
1606 13:51:35.512186 PCI: 00:00.0: enabled 1
1607 13:51:35.512293 SPI: 00: enabled 1
1608 13:51:35.515139 SPI: 01: enabled 1
1609 13:51:35.515218 PNP: 0c09.0: enabled 1
1610 13:51:35.518804 USB2 port 0: enabled 1
1611 13:51:35.521991 USB2 port 1: enabled 1
1612 13:51:35.524998 USB2 port 2: enabled 0
1613 13:51:35.525082 USB2 port 3: enabled 0
1614 13:51:35.528137 USB2 port 5: enabled 0
1615 13:51:35.531809 USB2 port 6: enabled 1
1616 13:51:35.534798 USB2 port 9: enabled 1
1617 13:51:35.534913 USB3 port 0: enabled 1
1618 13:51:35.538180 USB3 port 1: enabled 1
1619 13:51:35.541267 USB3 port 2: enabled 1
1620 13:51:35.541357 USB3 port 3: enabled 1
1621 13:51:35.544908 USB3 port 4: enabled 0
1622 13:51:35.547808 APIC: 02: enabled 1
1623 13:51:35.547897 APIC: 06: enabled 1
1624 13:51:35.551439 APIC: 01: enabled 1
1625 13:51:35.554396 APIC: 03: enabled 1
1626 13:51:35.554511 APIC: 07: enabled 1
1627 13:51:35.557730 APIC: 05: enabled 1
1628 13:51:35.557844 APIC: 04: enabled 1
1629 13:51:35.560754 PCI: 00:08.0: enabled 1
1630 13:51:35.564389 PCI: 00:14.2: enabled 1
1631 13:51:35.567422 PCI: 01:00.0: enabled 1
1632 13:51:35.571155 Disabling ACPI via APMC:
1633 13:51:35.574281 done.
1634 13:51:35.577333 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 13:51:35.580913 ELOG: NV offset 0xaf0000 size 0x4000
1636 13:51:35.587927 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 13:51:35.594214 ELOG: Event(17) added with size 13 at 2023-04-20 13:51:35 UTC
1638 13:51:35.600974 ELOG: Event(92) added with size 9 at 2023-04-20 13:51:35 UTC
1639 13:51:35.607586 ELOG: Event(93) added with size 9 at 2023-04-20 13:51:35 UTC
1640 13:51:35.613831 ELOG: Event(9A) added with size 9 at 2023-04-20 13:51:35 UTC
1641 13:51:35.620329 ELOG: Event(9E) added with size 10 at 2023-04-20 13:51:35 UTC
1642 13:51:35.626940 ELOG: Event(9F) added with size 14 at 2023-04-20 13:51:35 UTC
1643 13:51:35.633160 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1644 13:51:35.639898 ELOG: Event(A1) added with size 10 at 2023-04-20 13:51:35 UTC
1645 13:51:35.646569 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 13:51:35.653085 ELOG: Event(A0) added with size 9 at 2023-04-20 13:51:35 UTC
1647 13:51:35.655988 elog_add_boot_reason: Logged dev mode boot
1648 13:51:35.659451 Finalize devices...
1649 13:51:35.662523 PCI: 00:17.0 final
1650 13:51:35.662612 Devices finalized
1651 13:51:35.669125 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 13:51:35.672164 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 13:51:35.678949 ME: HFSTS1 : 0x90000245
1654 13:51:35.682008 ME: HFSTS2 : 0x3B850126
1655 13:51:35.685706 ME: HFSTS3 : 0x00000020
1656 13:51:35.692405 ME: HFSTS4 : 0x00004800
1657 13:51:35.695021 ME: HFSTS5 : 0x00000000
1658 13:51:35.698492 ME: HFSTS6 : 0x40400006
1659 13:51:35.701442 ME: Manufacturing Mode : NO
1660 13:51:35.705148 ME: FW Partition Table : OK
1661 13:51:35.708216 ME: Bringup Loader Failure : NO
1662 13:51:35.711403 ME: Firmware Init Complete : YES
1663 13:51:35.714493 ME: Boot Options Present : NO
1664 13:51:35.717758 ME: Update In Progress : NO
1665 13:51:35.721319 ME: D0i3 Support : YES
1666 13:51:35.724313 ME: Low Power State Enabled : NO
1667 13:51:35.727939 ME: CPU Replaced : NO
1668 13:51:35.730990 ME: CPU Replacement Valid : YES
1669 13:51:35.734128 ME: Current Working State : 5
1670 13:51:35.737303 ME: Current Operation State : 1
1671 13:51:35.740991 ME: Current Operation Mode : 0
1672 13:51:35.744096 ME: Error Code : 0
1673 13:51:35.747146 ME: CPU Debug Disabled : YES
1674 13:51:35.750324 ME: TXT Support : NO
1675 13:51:35.757056 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 13:51:35.763644 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 13:51:35.763769 CBFS @ c08000 size 3f8000
1678 13:51:35.769865 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 13:51:35.773506 CBFS: Locating 'fallback/dsdt.aml'
1680 13:51:35.780083 CBFS: Found @ offset 10bb80 size 3fa5
1681 13:51:35.783117 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 13:51:35.786206 CBFS @ c08000 size 3f8000
1683 13:51:35.793025 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 13:51:35.796108 CBFS: Locating 'fallback/slic'
1685 13:51:35.799727 CBFS: 'fallback/slic' not found.
1686 13:51:35.802747 ACPI: Writing ACPI tables at 99b3e000.
1687 13:51:35.806238 ACPI: * FACS
1688 13:51:35.806352 ACPI: * DSDT
1689 13:51:35.812420 Ramoops buffer: 0x100000@0x99a3d000.
1690 13:51:35.815956 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 13:51:35.819187 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 13:51:35.823065 Google Chrome EC: version:
1693 13:51:35.826186 ro: helios_v2.0.2659-56403530b
1694 13:51:35.829153 rw: helios_v2.0.2849-c41de27e7d
1695 13:51:35.832695 running image: 1
1696 13:51:35.835831 ACPI: * FADT
1697 13:51:35.835930 SCI is IRQ9
1698 13:51:35.842452 ACPI: added table 1/32, length now 40
1699 13:51:35.842569 ACPI: * SSDT
1700 13:51:35.845562 Found 1 CPU(s) with 8 core(s) each.
1701 13:51:35.852200 Error: Could not locate 'wifi_sar' in VPD.
1702 13:51:35.855404 Checking CBFS for default SAR values
1703 13:51:35.858478 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 13:51:35.862109 CBFS @ c08000 size 3f8000
1705 13:51:35.868987 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 13:51:35.872102 CBFS: Locating 'wifi_sar_defaults.hex'
1707 13:51:35.874998 CBFS: Found @ offset 5fac0 size 77
1708 13:51:35.878497 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 13:51:35.885159 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 13:51:35.888071 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 13:51:35.894821 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 13:51:35.898031 failed to find key in VPD: dsm_calib_r0_0
1713 13:51:35.907866 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 13:51:35.914126 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 13:51:35.917568 failed to find key in VPD: dsm_calib_r0_1
1716 13:51:35.924431 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 13:51:35.930685 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 13:51:35.933679 failed to find key in VPD: dsm_calib_r0_2
1719 13:51:35.943569 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 13:51:35.950454 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 13:51:35.953374 failed to find key in VPD: dsm_calib_r0_3
1722 13:51:35.963195 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 13:51:35.966900 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 13:51:35.973121 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 13:51:35.976267 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 13:51:35.979872 EC returned error result code 1
1727 13:51:35.982954 EC returned error result code 1
1728 13:51:35.989626 EC returned error result code 1
1729 13:51:35.992684 PS2K: Bad resp from EC. Vivaldi disabled!
1730 13:51:35.999459 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 13:51:36.002625 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 13:51:36.009325 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 13:51:36.012356 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 13:51:36.019247 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 13:51:36.025769 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 13:51:36.032024 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 13:51:36.038609 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 13:51:36.041782 ACPI: added table 2/32, length now 44
1739 13:51:36.041871 ACPI: * MCFG
1740 13:51:36.045521 ACPI: added table 3/32, length now 48
1741 13:51:36.048513 ACPI: * TPM2
1742 13:51:36.051767 TPM2 log created at 99a2d000
1743 13:51:36.054868 ACPI: added table 4/32, length now 52
1744 13:51:36.054984 ACPI: * MADT
1745 13:51:36.058231 SCI is IRQ9
1746 13:51:36.061879 ACPI: added table 5/32, length now 56
1747 13:51:36.064883 current = 99b43ac0
1748 13:51:36.064997 ACPI: * DMAR
1749 13:51:36.067877 ACPI: added table 6/32, length now 60
1750 13:51:36.071478 ACPI: * IGD OpRegion
1751 13:51:36.074634 GMA: Found VBT in CBFS
1752 13:51:36.077745 GMA: Found valid VBT in CBFS
1753 13:51:36.080874 ACPI: added table 7/32, length now 64
1754 13:51:36.080982 ACPI: * HPET
1755 13:51:36.084526 ACPI: added table 8/32, length now 68
1756 13:51:36.087723 ACPI: done.
1757 13:51:36.090692 ACPI tables: 31744 bytes.
1758 13:51:36.094341 smbios_write_tables: 99a2c000
1759 13:51:36.097263 EC returned error result code 3
1760 13:51:36.100876 Couldn't obtain OEM name from CBI
1761 13:51:36.103874 Create SMBIOS type 17
1762 13:51:36.107421 PCI: 00:00.0 (Intel Cannonlake)
1763 13:51:36.107534 PCI: 00:14.3 (Intel WiFi)
1764 13:51:36.110335 SMBIOS tables: 939 bytes.
1765 13:51:36.117248 Writing table forward entry at 0x00000500
1766 13:51:36.120377 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 13:51:36.127058 Writing coreboot table at 0x99b62000
1768 13:51:36.130037 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 13:51:36.136804 1. 0000000000001000-000000000009ffff: RAM
1770 13:51:36.140355 2. 00000000000a0000-00000000000fffff: RESERVED
1771 13:51:36.143288 3. 0000000000100000-0000000099a2bfff: RAM
1772 13:51:36.150177 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 13:51:36.156340 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 13:51:36.159448 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 13:51:36.166155 7. 000000009a000000-000000009f7fffff: RESERVED
1776 13:51:36.169279 8. 00000000e0000000-00000000efffffff: RESERVED
1777 13:51:36.175943 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 13:51:36.179277 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 13:51:36.185403 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 13:51:36.189015 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 13:51:36.195272 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 13:51:36.198964 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 13:51:36.205408 15. 0000000100000000-000000045e7fffff: RAM
1784 13:51:36.208397 Graphics framebuffer located at 0xc0000000
1785 13:51:36.211446 Passing 5 GPIOs to payload:
1786 13:51:36.215127 NAME | PORT | POLARITY | VALUE
1787 13:51:36.221531 write protect | undefined | high | low
1788 13:51:36.227639 lid | undefined | high | high
1789 13:51:36.231346 power | undefined | high | low
1790 13:51:36.237439 oprom | undefined | high | low
1791 13:51:36.241187 EC in RW | 0x000000cb | high | low
1792 13:51:36.244210 Board ID: 4
1793 13:51:36.247702 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 13:51:36.250759 CBFS @ c08000 size 3f8000
1795 13:51:36.257452 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 13:51:36.264164 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56
1797 13:51:36.267176 coreboot table: 1492 bytes.
1798 13:51:36.270238 IMD ROOT 0. 99fff000 00001000
1799 13:51:36.273391 IMD SMALL 1. 99ffe000 00001000
1800 13:51:36.277195 FSP MEMORY 2. 99c4e000 003b0000
1801 13:51:36.280154 CONSOLE 3. 99c2e000 00020000
1802 13:51:36.283192 FMAP 4. 99c2d000 0000054e
1803 13:51:36.286937 TIME STAMP 5. 99c2c000 00000910
1804 13:51:36.289898 VBOOT WORK 6. 99c18000 00014000
1805 13:51:36.292992 MRC DATA 7. 99c16000 00001958
1806 13:51:36.296129 ROMSTG STCK 8. 99c15000 00001000
1807 13:51:36.299879 AFTER CAR 9. 99c0b000 0000a000
1808 13:51:36.302991 RAMSTAGE 10. 99baf000 0005c000
1809 13:51:36.306099 REFCODE 11. 99b7a000 00035000
1810 13:51:36.309857 SMM BACKUP 12. 99b6a000 00010000
1811 13:51:36.312883 COREBOOT 13. 99b62000 00008000
1812 13:51:36.315910 ACPI 14. 99b3e000 00024000
1813 13:51:36.319351 ACPI GNVS 15. 99b3d000 00001000
1814 13:51:36.322295 RAMOOPS 16. 99a3d000 00100000
1815 13:51:36.325479 TPM2 TCGLOG17. 99a2d000 00010000
1816 13:51:36.328965 SMBIOS 18. 99a2c000 00000800
1817 13:51:36.332633 IMD small region:
1818 13:51:36.335656 IMD ROOT 0. 99ffec00 00000400
1819 13:51:36.338777 FSP RUNTIME 1. 99ffebe0 00000004
1820 13:51:36.341901 EC HOSTEVENT 2. 99ffebc0 00000008
1821 13:51:36.345407 POWER STATE 3. 99ffeb80 00000040
1822 13:51:36.348447 ROMSTAGE 4. 99ffeb60 00000004
1823 13:51:36.352028 MEM INFO 5. 99ffe9a0 000001b9
1824 13:51:36.355077 VPD 6. 99ffe920 0000006c
1825 13:51:36.358742 MTRR: Physical address space:
1826 13:51:36.364857 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 13:51:36.371380 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 13:51:36.378247 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 13:51:36.384337 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 13:51:36.391050 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 13:51:36.397604 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 13:51:36.403954 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 13:51:36.407606 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 13:51:36.410695 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 13:51:36.413837 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 13:51:36.420355 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 13:51:36.423969 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 13:51:36.426947 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 13:51:36.430455 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 13:51:36.437115 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 13:51:36.440256 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 13:51:36.443276 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 13:51:36.446353 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 13:51:36.450034 call enable_fixed_mtrr()
1845 13:51:36.453126 CPU physical address size: 39 bits
1846 13:51:36.459728 MTRR: default type WB/UC MTRR counts: 6/8.
1847 13:51:36.463440 MTRR: WB selected as default type.
1848 13:51:36.469694 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 13:51:36.476064 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 13:51:36.479197 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 13:51:36.485766 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 13:51:36.492379 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 13:51:36.499023 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 13:51:36.505582 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 13:51:36.508688 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 13:51:36.512288 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 13:51:36.515358 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 13:51:36.521968 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 13:51:36.524885 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 13:51:36.528642 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 13:51:36.534690 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 13:51:36.537881 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 13:51:36.541357 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 13:51:36.544406 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 13:51:36.544493
1866 13:51:36.548095 MTRR check
1867 13:51:36.551303 Fixed MTRRs : Enabled
1868 13:51:36.551390 Variable MTRRs: Enabled
1869 13:51:36.551460
1870 13:51:36.554943 call enable_fixed_mtrr()
1871 13:51:36.561348 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1872 13:51:36.564378 CPU physical address size: 39 bits
1873 13:51:36.567494 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1874 13:51:36.574311 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 13:51:36.577378 MTRR: Fixed MSR 0x258 0x0606060606060606
1876 13:51:36.580411 MTRR: Fixed MSR 0x259 0x0000000000000000
1877 13:51:36.584105 MTRR: Fixed MSR 0x268 0x0606060606060606
1878 13:51:36.590174 MTRR: Fixed MSR 0x269 0x0606060606060606
1879 13:51:36.593751 MTRR: Fixed MSR 0x26a 0x0606060606060606
1880 13:51:36.596833 MTRR: Fixed MSR 0x26b 0x0606060606060606
1881 13:51:36.600313 MTRR: Fixed MSR 0x26c 0x0606060606060606
1882 13:51:36.606512 MTRR: Fixed MSR 0x26d 0x0606060606060606
1883 13:51:36.610277 MTRR: Fixed MSR 0x26e 0x0606060606060606
1884 13:51:36.613374 MTRR: Fixed MSR 0x26f 0x0606060606060606
1885 13:51:36.619699 MTRR: Fixed MSR 0x250 0x0606060606060606
1886 13:51:36.619812 call enable_fixed_mtrr()
1887 13:51:36.626553 MTRR: Fixed MSR 0x258 0x0606060606060606
1888 13:51:36.629670 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 13:51:36.632620 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 13:51:36.636145 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 13:51:36.642617 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 13:51:36.646064 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 13:51:36.648992 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 13:51:36.652602 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 13:51:36.658758 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 13:51:36.662456 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 13:51:36.665337 CPU physical address size: 39 bits
1898 13:51:36.668981 call enable_fixed_mtrr()
1899 13:51:36.672086 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 13:51:36.675190 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 13:51:36.681932 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 13:51:36.684979 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 13:51:36.688184 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 13:51:36.691319 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 13:51:36.698065 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 13:51:36.701024 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 13:51:36.704713 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 13:51:36.707748 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 13:51:36.714289 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 13:51:36.718004 MTRR: Fixed MSR 0x250 0x0606060606060606
1911 13:51:36.721117 call enable_fixed_mtrr()
1912 13:51:36.724201 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 13:51:36.727334 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 13:51:36.734104 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 13:51:36.737151 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 13:51:36.740857 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 13:51:36.743763 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 13:51:36.750401 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 13:51:36.753386 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 13:51:36.756831 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 13:51:36.760424 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 13:51:36.766589 CPU physical address size: 39 bits
1923 13:51:36.766676 call enable_fixed_mtrr()
1924 13:51:36.773154 CPU physical address size: 39 bits
1925 13:51:36.776812 CPU physical address size: 39 bits
1926 13:51:36.776898 CBFS @ c08000 size 3f8000
1927 13:51:36.782879 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1928 13:51:36.786462 CBFS: Locating 'fallback/payload'
1929 13:51:36.789614 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 13:51:36.795673 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 13:51:36.799398 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 13:51:36.802345 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 13:51:36.805573 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 13:51:36.812094 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 13:51:36.815856 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 13:51:36.818897 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 13:51:36.822051 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 13:51:36.828915 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 13:51:36.831938 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 13:51:36.835083 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 13:51:36.838256 call enable_fixed_mtrr()
1942 13:51:36.841942 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 13:51:36.848115 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 13:51:36.851694 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 13:51:36.854764 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 13:51:36.857864 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 13:51:36.864266 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 13:51:36.867759 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 13:51:36.870943 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 13:51:36.874536 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 13:51:36.881145 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 13:51:36.884186 CPU physical address size: 39 bits
1953 13:51:36.887223 call enable_fixed_mtrr()
1954 13:51:36.890739 CBFS: Found @ offset 1c96c0 size 3f798
1955 13:51:36.893818 CPU physical address size: 39 bits
1956 13:51:36.896869 Checking segment from ROM address 0xffdd16f8
1957 13:51:36.903699 Checking segment from ROM address 0xffdd1714
1958 13:51:36.907219 Loading segment from ROM address 0xffdd16f8
1959 13:51:36.910356 code (compression=0)
1960 13:51:36.916897 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 13:51:36.926727 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 13:51:36.929794 it's not compressed!
1963 13:51:37.021032 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 13:51:37.027783 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 13:51:37.033819 Loading segment from ROM address 0xffdd1714
1966 13:51:37.033918 Entry Point 0x30000000
1967 13:51:37.036936 Loaded segments
1968 13:51:37.043055 Finalizing chipset.
1969 13:51:37.046109 Finalizing SMM.
1970 13:51:37.049865 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1971 13:51:37.052942 mp_park_aps done after 0 msecs.
1972 13:51:37.059047 Jumping to boot code at 30000000(99b62000)
1973 13:51:37.065783 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 13:51:37.065894
1975 13:51:37.066003
1976 13:51:37.066099
1977 13:51:37.068884 Starting depthcharge on Helios...
1978 13:51:37.068996
1979 13:51:37.069411 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 13:51:37.069555 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 13:51:37.069684 Setting prompt string to ['hatch:']
1982 13:51:37.069802 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 13:51:37.079278 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 13:51:37.079392
1985 13:51:37.085846 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 13:51:37.085960
1987 13:51:37.091892 board_setup: Info: eMMC controller not present; skipping
1988 13:51:37.092003
1989 13:51:37.095377 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 13:51:37.095491
1991 13:51:37.101912 board_setup: Info: SDHCI controller not present; skipping
1992 13:51:37.102030
1993 13:51:37.108560 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 13:51:37.108656
1995 13:51:37.108723 Wipe memory regions:
1996 13:51:37.108785
1997 13:51:37.115165 [0x00000000001000, 0x000000000a0000)
1998 13:51:37.115254
1999 13:51:37.118116 [0x00000000100000, 0x00000030000000)
2000 13:51:37.179195
2001 13:51:37.182271 [0x00000030657430, 0x00000099a2c000)
2002 13:51:37.312224
2003 13:51:37.315701 [0x00000100000000, 0x0000045e800000)
2004 13:51:38.634411
2005 13:51:38.634548 R8152: Initializing
2006 13:51:38.634620
2007 13:51:38.637521 Version 9 (ocp_data = 6010)
2008 13:51:38.641854
2009 13:51:38.641939 R8152: Done initializing
2010 13:51:38.642044
2011 13:51:38.644979 Adding net device
2012 13:51:39.248905
2013 13:51:39.249049 R8152: Initializing
2014 13:51:39.249123
2015 13:51:39.252667 Version 6 (ocp_data = 5c30)
2016 13:51:39.252753
2017 13:51:39.255720 R8152: Done initializing
2018 13:51:39.255805
2019 13:51:39.262417 net_add_device: Attemp to include the same device
2020 13:51:39.262505
2021 13:51:39.269423 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 13:51:39.269537
2023 13:51:39.269637
2024 13:51:39.269732
2025 13:51:39.270055 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 13:51:39.370818 hatch: tftpboot 192.168.201.1 10062353/tftp-deploy-axcp_yu4/kernel/bzImage 10062353/tftp-deploy-axcp_yu4/kernel/cmdline 10062353/tftp-deploy-axcp_yu4/ramdisk/ramdisk.cpio.gz
2028 13:51:39.370988 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 13:51:39.371076 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 13:51:39.375276 tftpboot 192.168.201.1 10062353/tftp-deploy-axcp_yu4/kernel/bzIploy-axcp_yu4/kernel/cmdline 10062353/tftp-deploy-axcp_yu4/ramdisk/ramdisk.cpio.gz
2031 13:51:39.375367
2032 13:51:39.375433 Waiting for link
2033 13:51:39.576373
2034 13:51:39.576522 done.
2035 13:51:39.576593
2036 13:51:39.576657 MAC: 00:24:32:50:21:91
2037 13:51:39.576720
2038 13:51:39.579381 Sending DHCP discover... done.
2039 13:51:39.579458
2040 13:51:39.583094 Waiting for reply... done.
2041 13:51:39.583170
2042 13:51:39.586124 Sending DHCP request... done.
2043 13:51:39.586261
2044 13:51:39.589485 Waiting for reply... done.
2045 13:51:39.589596
2046 13:51:39.592432 My ip is 192.168.201.14
2047 13:51:39.592548
2048 13:51:39.595972 The DHCP server ip is 192.168.201.1
2049 13:51:39.596056
2050 13:51:39.598884 TFTP server IP predefined by user: 192.168.201.1
2051 13:51:39.598991
2052 13:51:39.609137 Bootfile predefined by user: 10062353/tftp-deploy-axcp_yu4/kernel/bzImage
2053 13:51:39.609254
2054 13:51:39.612240 Sending tftp read request... done.
2055 13:51:39.612359
2056 13:51:39.616554 Waiting for the transfer...
2057 13:51:39.616661
2058 13:51:40.128842 00000000 ################################################################
2059 13:51:40.128982
2060 13:51:40.644828 00080000 ################################################################
2061 13:51:40.644975
2062 13:51:41.174599 00100000 ################################################################
2063 13:51:41.174752
2064 13:51:41.689330 00180000 ################################################################
2065 13:51:41.689514
2066 13:51:42.198147 00200000 ################################################################
2067 13:51:42.198324
2068 13:51:42.705365 00280000 ################################################################
2069 13:51:42.705507
2070 13:51:43.220088 00300000 ################################################################
2071 13:51:43.220247
2072 13:51:43.733412 00380000 ################################################################
2073 13:51:43.733592
2074 13:51:44.247142 00400000 ################################################################
2075 13:51:44.247324
2076 13:51:44.769886 00480000 ################################################################
2077 13:51:44.770059
2078 13:51:45.293473 00500000 ################################################################
2079 13:51:45.293609
2080 13:51:45.815530 00580000 ################################################################
2081 13:51:45.815691
2082 13:51:46.334064 00600000 ################################################################
2083 13:51:46.334200
2084 13:51:46.846392 00680000 ################################################################
2085 13:51:46.846557
2086 13:51:47.391340 00700000 ################################################################
2087 13:51:47.391505
2088 13:51:47.912430 00780000 ################################################################
2089 13:51:47.912604
2090 13:51:48.431102 00800000 ################################################################
2091 13:51:48.431270
2092 13:51:48.945153 00880000 ################################################################
2093 13:51:48.945290
2094 13:51:49.482101 00900000 ################################################################
2095 13:51:49.482238
2096 13:51:50.027823 00980000 ################################################################
2097 13:51:50.027961
2098 13:51:50.407992 00a00000 ############################################## done.
2099 13:51:50.408165
2100 13:51:50.411397 The bootfile was 10854400 bytes long.
2101 13:51:50.411505
2102 13:51:50.414819 Sending tftp read request... done.
2103 13:51:50.414930
2104 13:51:50.417744 Waiting for the transfer...
2105 13:51:50.417853
2106 13:51:50.942514 00000000 ################################################################
2107 13:51:50.942691
2108 13:51:51.473838 00080000 ################################################################
2109 13:51:51.474011
2110 13:51:52.007646 00100000 ################################################################
2111 13:51:52.007786
2112 13:51:52.549524 00180000 ################################################################
2113 13:51:52.549698
2114 13:51:53.125675 00200000 ################################################################
2115 13:51:53.125844
2116 13:51:53.691589 00280000 ################################################################
2117 13:51:53.691777
2118 13:51:54.236580 00300000 ################################################################
2119 13:51:54.236749
2120 13:51:54.777267 00380000 ################################################################
2121 13:51:54.777444
2122 13:51:55.353379 00400000 ################################################################
2123 13:51:55.353520
2124 13:51:55.896678 00480000 ################################################################
2125 13:51:55.896853
2126 13:51:56.454986 00500000 ################################################################
2127 13:51:56.455123
2128 13:51:56.986356 00580000 ################################################################
2129 13:51:56.986515
2130 13:51:57.509904 00600000 ################################################################
2131 13:51:57.510078
2132 13:51:58.027411 00680000 ################################################################
2133 13:51:58.027599
2134 13:51:58.553837 00700000 ################################################################
2135 13:51:58.554000
2136 13:51:59.087094 00780000 ################################################################
2137 13:51:59.087236
2138 13:51:59.610842 00800000 ################################################################
2139 13:51:59.611044
2140 13:51:59.912963 00880000 ###################################### done.
2141 13:51:59.916054
2142 13:51:59.919205 Sending tftp read request... done.
2143 13:51:59.919312
2144 13:51:59.919411 Waiting for the transfer...
2145 13:51:59.919506
2146 13:51:59.922779 00000000 # done.
2147 13:51:59.922892
2148 13:51:59.932573 Command line loaded dynamically from TFTP file: 10062353/tftp-deploy-axcp_yu4/kernel/cmdline
2149 13:51:59.932693
2150 13:51:59.948459 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2151 13:51:59.948594
2152 13:51:59.955104 ec_init(0): CrosEC protocol v3 supported (256, 256)
2153 13:51:59.960017
2154 13:51:59.963116 Shutting down all USB controllers.
2155 13:51:59.963242
2156 13:51:59.963348 Removing current net device
2157 13:51:59.970556
2158 13:51:59.970728 Finalizing coreboot
2159 13:51:59.970841
2160 13:51:59.977301 Exiting depthcharge with code 4 at timestamp: 30260840
2161 13:51:59.977452
2162 13:51:59.977554
2163 13:51:59.977650 Starting kernel ...
2164 13:51:59.978304 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2165 13:51:59.978437 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2166 13:51:59.978546 Setting prompt string to ['Linux version [0-9]']
2167 13:51:59.978654 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2168 13:51:59.978755 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2169 13:51:59.980512
2170 13:51:59.980604
2172 13:56:18.978701 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2174 13:56:18.978905 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2176 13:56:18.979071 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2179 13:56:18.979321 end: 2 depthcharge-action (duration 00:05:00) [common]
2181 13:56:18.979540 Cleaning after the job
2182 13:56:18.979719 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062353/tftp-deploy-axcp_yu4/ramdisk
2183 13:56:18.980853 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062353/tftp-deploy-axcp_yu4/kernel
2184 13:56:18.982019 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062353/tftp-deploy-axcp_yu4/modules
2185 13:56:18.982533 start: 5.1 power-off (timeout 00:00:30) [common]
2186 13:56:18.982691 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2187 13:56:19.052388 >> Command sent successfully.
2188 13:56:19.054712 Returned 0 in 0 seconds
2189 13:56:19.155504 end: 5.1 power-off (duration 00:00:00) [common]
2191 13:56:19.155884 start: 5.2 read-feedback (timeout 00:10:00) [common]
2192 13:56:19.156135 Listened to connection for namespace 'common' for up to 1s
2194 13:56:19.156517 Listened to connection for namespace 'common' for up to 1s
2195 13:56:19.156882 Listened to connection for namespace 'common' for up to 1s
2196 13:56:19.160328 Listened to connection for namespace 'common' for up to 1s
2197 13:56:19.163656 Listened to connection for namespace 'common' for up to 1s
2198 13:56:19.167335 Listened to connection for namespace 'common' for up to 1s
2199 13:56:19.170310 Listened to connection for namespace 'common' for up to 1s
2200 13:56:19.173664 Listened to connection for namespace 'common' for up to 1s
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2270 13:56:19.402700 Listened to connection for namespace 'common' for up to 1s
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2279 13:56:19.431756 Listened to connection for namespace 'common' for up to 1s
2280 13:56:19.435049 Listened to connection for namespace 'common' for up to 1s
2281 13:56:19.438654 Listened to connection for namespace 'common' for up to 1s
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2299 13:56:19.497241 Listened to connection for namespace 'common' for up to 1s
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2447 13:56:19.982573 Listened to connection for namespace 'common' for up to 1s
2448 13:56:19.985941 Listened to connection for namespace 'common' for up to 1s
2449 13:56:19.989393 Listened to connection for namespace 'common' for up to 1s
2450 13:56:19.992764 Listened to connection for namespace 'common' for up to 1s
2451 13:56:19.995767 Listened to connection for namespace 'common' for up to 1s
2452 13:56:19.999130 Listened to connection for namespace 'common' for up to 1s
2453 13:56:20.002670 Listened to connection for namespace 'common' for up to 1s
2454 13:56:20.005646 Listened to connection for namespace 'common' for up to 1s
2455 13:56:20.009069 Listened to connection for namespace 'common' for up to 1s
2456 13:56:20.012485 Listened to connection for namespace 'common' for up to 1s
2457 13:56:20.015912 Listened to connection for namespace 'common' for up to 1s
2458 13:56:20.018886 Listened to connection for namespace 'common' for up to 1s
2459 13:56:20.022150 Listened to connection for namespace 'common' for up to 1s
2460 13:56:20.025607 Listened to connection for namespace 'common' for up to 1s
2461 13:56:20.028990 Listened to connection for namespace 'common' for up to 1s
2462 13:56:20.032359 Listened to connection for namespace 'common' for up to 1s
2463 13:56:20.035321 Listened to connection for namespace 'common' for up to 1s
2464 13:56:20.038732 Listened to connection for namespace 'common' for up to 1s
2465 13:56:20.041911 Listened to connection for namespace 'common' for up to 1s
2466 13:56:20.045129 Listened to connection for namespace 'common' for up to 1s
2467 13:56:20.048312 Listened to connection for namespace 'common' for up to 1s
2468 13:56:20.051690 Listened to connection for namespace 'common' for up to 1s
2469 13:56:20.054880 Listened to connection for namespace 'common' for up to 1s
2470 13:56:20.058465 Listened to connection for namespace 'common' for up to 1s
2471 13:56:20.061224 Listened to connection for namespace 'common' for up to 1s
2472 13:56:20.064659 Listened to connection for namespace 'common' for up to 1s
2473 13:56:20.067998 Listened to connection for namespace 'common' for up to 1s
2474 13:56:20.071101 Listened to connection for namespace 'common' for up to 1s
2475 13:56:20.074916 Listened to connection for namespace 'common' for up to 1s
2476 13:56:20.078419 Listened to connection for namespace 'common' for up to 1s
2477 13:56:20.156458 Finalising connection for namespace 'common'
2478 13:56:20.156579 Disconnecting from shell: Finalise
2479 13:56:20.156655
2480 13:56:20.257498 end: 5.2 read-feedback (duration 00:00:01) [common]
2481 13:56:20.257633 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062353
2482 13:56:20.271565 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062353
2483 13:56:20.271780 JobError: Your job cannot terminate cleanly.