Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 13:51:29.946507 lava-dispatcher, installed at version: 2023.01
2 13:51:29.946748 start: 0 validate
3 13:51:29.946898 Start time: 2023-04-20 13:51:29.946890+00:00 (UTC)
4 13:51:29.947044 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:51:29.947191 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230414.0%2Fx86%2Frootfs.cpio.gz exists
6 13:51:30.240596 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:51:30.240812 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:51:30.530081 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:51:30.530345 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:51:34.187670 validate duration: 4.24
12 13:51:34.188114 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:51:34.188277 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:51:34.188435 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:51:34.188622 Not decompressing ramdisk as can be used compressed.
16 13:51:34.188762 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230414.0/x86/rootfs.cpio.gz
17 13:51:34.188880 saving as /var/lib/lava/dispatcher/tmp/10062372/tftp-deploy-5imxjk_j/ramdisk/rootfs.cpio.gz
18 13:51:34.188990 total size: 8429655 (8MB)
19 13:51:34.909598 progress 0% (0MB)
20 13:51:34.920529 progress 5% (0MB)
21 13:51:34.931056 progress 10% (0MB)
22 13:51:34.939869 progress 15% (1MB)
23 13:51:34.945797 progress 20% (1MB)
24 13:51:34.950524 progress 25% (2MB)
25 13:51:34.954611 progress 30% (2MB)
26 13:51:34.958204 progress 35% (2MB)
27 13:51:34.961340 progress 40% (3MB)
28 13:51:34.964351 progress 45% (3MB)
29 13:51:34.967225 progress 50% (4MB)
30 13:51:34.969914 progress 55% (4MB)
31 13:51:34.972509 progress 60% (4MB)
32 13:51:34.975085 progress 65% (5MB)
33 13:51:34.977678 progress 70% (5MB)
34 13:51:34.980001 progress 75% (6MB)
35 13:51:34.982590 progress 80% (6MB)
36 13:51:34.985153 progress 85% (6MB)
37 13:51:34.987611 progress 90% (7MB)
38 13:51:34.990035 progress 95% (7MB)
39 13:51:34.992485 progress 100% (8MB)
40 13:51:34.992636 8MB downloaded in 0.80s (10.00MB/s)
41 13:51:34.992802 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:51:34.993077 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:51:34.993176 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:51:34.993269 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:51:34.993412 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:51:34.993489 saving as /var/lib/lava/dispatcher/tmp/10062372/tftp-deploy-5imxjk_j/kernel/bzImage
48 13:51:34.993556 total size: 10854400 (10MB)
49 13:51:34.993621 No compression specified
50 13:51:34.994841 progress 0% (0MB)
51 13:51:34.997989 progress 5% (0MB)
52 13:51:35.001289 progress 10% (1MB)
53 13:51:35.004332 progress 15% (1MB)
54 13:51:35.007523 progress 20% (2MB)
55 13:51:35.010525 progress 25% (2MB)
56 13:51:35.014006 progress 30% (3MB)
57 13:51:35.017054 progress 35% (3MB)
58 13:51:35.020236 progress 40% (4MB)
59 13:51:35.023489 progress 45% (4MB)
60 13:51:35.026504 progress 50% (5MB)
61 13:51:35.029726 progress 55% (5MB)
62 13:51:35.032736 progress 60% (6MB)
63 13:51:35.035886 progress 65% (6MB)
64 13:51:35.038876 progress 70% (7MB)
65 13:51:35.042088 progress 75% (7MB)
66 13:51:35.045101 progress 80% (8MB)
67 13:51:35.048326 progress 85% (8MB)
68 13:51:35.051679 progress 90% (9MB)
69 13:51:35.054834 progress 95% (9MB)
70 13:51:35.058176 progress 100% (10MB)
71 13:51:35.058363 10MB downloaded in 0.06s (159.74MB/s)
72 13:51:35.058535 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:51:35.058808 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:51:35.058907 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:51:35.059014 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:51:35.059176 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:51:35.059267 saving as /var/lib/lava/dispatcher/tmp/10062372/tftp-deploy-5imxjk_j/modules/modules.tar
79 13:51:35.059344 total size: 483736 (0MB)
80 13:51:35.059421 Using unxz to decompress xz
81 13:51:35.063128 progress 6% (0MB)
82 13:51:35.063590 progress 13% (0MB)
83 13:51:35.063865 progress 20% (0MB)
84 13:51:35.065388 progress 27% (0MB)
85 13:51:35.067738 progress 33% (0MB)
86 13:51:35.070111 progress 40% (0MB)
87 13:51:35.072251 progress 47% (0MB)
88 13:51:35.074687 progress 54% (0MB)
89 13:51:35.076893 progress 60% (0MB)
90 13:51:35.079069 progress 67% (0MB)
91 13:51:35.081198 progress 74% (0MB)
92 13:51:35.083261 progress 81% (0MB)
93 13:51:35.085318 progress 88% (0MB)
94 13:51:35.087849 progress 94% (0MB)
95 13:51:35.090204 progress 100% (0MB)
96 13:51:35.098089 0MB downloaded in 0.04s (11.91MB/s)
97 13:51:35.098381 end: 1.3.1 http-download (duration 00:00:00) [common]
99 13:51:35.098674 end: 1.3 download-retry (duration 00:00:00) [common]
100 13:51:35.098777 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 13:51:35.098886 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 13:51:35.098977 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 13:51:35.099072 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 13:51:35.099310 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8
105 13:51:35.099457 makedir: /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin
106 13:51:35.099578 makedir: /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/tests
107 13:51:35.099689 makedir: /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/results
108 13:51:35.099818 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-add-keys
109 13:51:35.099981 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-add-sources
110 13:51:35.100128 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-background-process-start
111 13:51:35.100272 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-background-process-stop
112 13:51:35.100417 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-common-functions
113 13:51:35.100592 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-echo-ipv4
114 13:51:35.100767 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-install-packages
115 13:51:35.100939 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-installed-packages
116 13:51:35.101111 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-os-build
117 13:51:35.101284 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-probe-channel
118 13:51:35.101467 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-probe-ip
119 13:51:35.101639 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-target-ip
120 13:51:35.101809 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-target-mac
121 13:51:35.101980 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-target-storage
122 13:51:35.102152 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-test-case
123 13:51:35.102325 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-test-event
124 13:51:35.102493 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-test-feedback
125 13:51:35.102664 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-test-raise
126 13:51:35.102838 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-test-reference
127 13:51:35.103013 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-test-runner
128 13:51:35.103184 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-test-set
129 13:51:35.103358 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-test-shell
130 13:51:35.103535 Updating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-install-packages (oe)
131 13:51:35.171287 Updating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/bin/lava-installed-packages (oe)
132 13:51:35.173752 Creating /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/environment
133 13:51:35.174432 LAVA metadata
134 13:51:35.174870 - LAVA_JOB_ID=10062372
135 13:51:35.175232 - LAVA_DISPATCHER_IP=192.168.201.1
136 13:51:35.175851 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 13:51:35.176246 skipped lava-vland-overlay
138 13:51:35.176748 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 13:51:35.177232 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 13:51:35.177563 skipped lava-multinode-overlay
141 13:51:35.177989 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 13:51:35.178423 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 13:51:35.178834 Loading test definitions
144 13:51:35.179354 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 13:51:35.179763 Using /lava-10062372 at stage 0
146 13:51:35.181518 uuid=10062372_1.4.2.3.1 testdef=None
147 13:51:35.182026 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 13:51:35.182575 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 13:51:35.185606 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 13:51:35.186894 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 13:51:35.195495 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 13:51:35.196785 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 13:51:35.201499 runner path: /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/0/tests/0_dmesg test_uuid 10062372_1.4.2.3.1
156 13:51:35.202330 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 13:51:35.203522 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 13:51:35.203895 Using /lava-10062372 at stage 1
160 13:51:35.205457 uuid=10062372_1.4.2.3.5 testdef=None
161 13:51:35.205950 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 13:51:35.206441 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 13:51:35.208793 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 13:51:35.209801 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 13:51:35.218486 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 13:51:35.219300 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 13:51:35.230480 runner path: /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/1/tests/1_bootrr test_uuid 10062372_1.4.2.3.5
170 13:51:35.231695 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 13:51:35.233483 Creating lava-test-runner.conf files
173 13:51:35.234128 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/0 for stage 0
174 13:51:35.234755 - 0_dmesg
175 13:51:35.235306 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062372/lava-overlay-l6kthvg8/lava-10062372/1 for stage 1
176 13:51:35.235799 - 1_bootrr
177 13:51:35.236620 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 13:51:35.237309 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 13:51:35.260693 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 13:51:35.260942 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 13:51:35.261132 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 13:51:35.261323 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 13:51:35.261508 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 13:51:35.547817 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 13:51:35.548254 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 13:51:35.548426 extracting modules file /var/lib/lava/dispatcher/tmp/10062372/tftp-deploy-5imxjk_j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062372/extract-overlay-ramdisk-639tcaug/ramdisk
187 13:51:35.569287 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 13:51:35.569451 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 13:51:35.569556 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062372/compress-overlay-j11mlcu8/overlay-1.4.2.4.tar.gz to ramdisk
190 13:51:35.569641 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062372/compress-overlay-j11mlcu8/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062372/extract-overlay-ramdisk-639tcaug/ramdisk
191 13:51:35.578474 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 13:51:35.578634 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 13:51:35.578775 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 13:51:35.578915 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 13:51:35.579042 Building ramdisk /var/lib/lava/dispatcher/tmp/10062372/extract-overlay-ramdisk-639tcaug/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062372/extract-overlay-ramdisk-639tcaug/ramdisk
196 13:51:35.827163 >> 53976 blocks
197 13:51:36.848230 rename /var/lib/lava/dispatcher/tmp/10062372/extract-overlay-ramdisk-639tcaug/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062372/tftp-deploy-5imxjk_j/ramdisk/ramdisk.cpio.gz
198 13:51:36.848737 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 13:51:36.848914 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
200 13:51:36.849064 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
201 13:51:36.849207 No mkimage arch provided, not using FIT.
202 13:51:36.849346 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 13:51:36.849480 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 13:51:36.849634 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
205 13:51:36.849771 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
206 13:51:36.849899 No LXC device requested
207 13:51:36.850027 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 13:51:36.850185 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
209 13:51:36.850322 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 13:51:36.850442 Checking files for TFTP limit of 4294967296 bytes.
211 13:51:36.851018 end: 1 tftp-deploy (duration 00:00:03) [common]
212 13:51:36.851169 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 13:51:36.851303 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 13:51:36.851479 substitutions:
215 13:51:36.851587 - {DTB}: None
216 13:51:36.851689 - {INITRD}: 10062372/tftp-deploy-5imxjk_j/ramdisk/ramdisk.cpio.gz
217 13:51:36.851790 - {KERNEL}: 10062372/tftp-deploy-5imxjk_j/kernel/bzImage
218 13:51:36.851888 - {LAVA_MAC}: None
219 13:51:36.851988 - {PRESEED_CONFIG}: None
220 13:51:36.852094 - {PRESEED_LOCAL}: None
221 13:51:36.852203 - {RAMDISK}: 10062372/tftp-deploy-5imxjk_j/ramdisk/ramdisk.cpio.gz
222 13:51:36.852313 - {ROOT_PART}: None
223 13:51:36.852439 - {ROOT}: None
224 13:51:36.852550 - {SERVER_IP}: 192.168.201.1
225 13:51:36.852658 - {TEE}: None
226 13:51:36.852767 Parsed boot commands:
227 13:51:36.852873 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 13:51:36.853126 Parsed boot commands: tftpboot 192.168.201.1 10062372/tftp-deploy-5imxjk_j/kernel/bzImage 10062372/tftp-deploy-5imxjk_j/kernel/cmdline 10062372/tftp-deploy-5imxjk_j/ramdisk/ramdisk.cpio.gz
229 13:51:36.853270 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 13:51:36.853414 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 13:51:36.853574 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 13:51:36.853719 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 13:51:36.853839 Not connected, no need to disconnect.
234 13:51:36.853975 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 13:51:36.854115 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 13:51:36.854234 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
237 13:51:36.857734 Setting prompt string to ['lava-test: # ']
238 13:51:36.858377 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 13:51:36.858546 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 13:51:36.858702 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 13:51:36.858848 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 13:51:36.859204 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
243 13:51:42.005490 >> Command sent successfully.
244 13:51:42.015849 Returned 0 in 5 seconds
245 13:51:42.117590 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 13:51:42.119783 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 13:51:42.120619 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 13:51:42.121258 Setting prompt string to 'Starting depthcharge on Voema...'
250 13:51:42.121831 Changing prompt to 'Starting depthcharge on Voema...'
251 13:51:42.122341 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 13:51:42.124179 [Enter `^Ec?' for help]
253 13:51:43.673256
254 13:51:43.674037
255 13:51:43.683005 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 13:51:43.686165 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
257 13:51:43.693027 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 13:51:43.695779 CPU: AES supported, TXT NOT supported, VT supported
259 13:51:43.702637 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 13:51:43.706088 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 13:51:43.712989 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 13:51:43.716296 VBOOT: Loading verstage.
263 13:51:43.719789 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 13:51:43.725808 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 13:51:43.729068 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 13:51:43.739927 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 13:51:43.746743 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 13:51:43.747049
269 13:51:43.747296
270 13:51:43.757080 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 13:51:43.773350 Probing TPM: . done!
272 13:51:43.776792 TPM ready after 0 ms
273 13:51:43.780154 Connected to device vid:did:rid of 1ae0:0028:00
274 13:51:43.791294 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
275 13:51:43.797983 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 13:51:43.801463 Initialized TPM device CR50 revision 0
277 13:51:43.859067 tlcl_send_startup: Startup return code is 0
278 13:51:43.859723 TPM: setup succeeded
279 13:51:43.874643 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 13:51:43.888407 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 13:51:43.901250 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 13:51:43.910841 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 13:51:43.914363 Chrome EC: UHEPI supported
284 13:51:43.918209 Phase 1
285 13:51:43.920881 FMAP: area GBB found @ 1805000 (458752 bytes)
286 13:51:43.931424 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 13:51:43.937533 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 13:51:43.944310 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 13:51:43.950739 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 13:51:43.954452 Recovery requested (1009000e)
291 13:51:43.958412 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 13:51:43.969822 tlcl_extend: response is 0
293 13:51:43.976052 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 13:51:43.986022 tlcl_extend: response is 0
295 13:51:43.992383 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 13:51:43.999238 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 13:51:44.006054 BS: verstage times (exec / console): total (unknown) / 142 ms
298 13:51:44.006659
299 13:51:44.007030
300 13:51:44.019268 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 13:51:44.025773 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 13:51:44.029137 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 13:51:44.031863 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 13:51:44.038791 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 13:51:44.042027 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 13:51:44.045581 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 13:51:44.048344 TCO_STS: 0000 0000
308 13:51:44.051776 GEN_PMCON: d0015038 00002200
309 13:51:44.055090 GBLRST_CAUSE: 00000000 00000000
310 13:51:44.058284 HPR_CAUSE0: 00000000
311 13:51:44.058594 prev_sleep_state 5
312 13:51:44.061517 Boot Count incremented to 16408
313 13:51:44.068644 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 13:51:44.075067 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 13:51:44.084681 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 13:51:44.091417 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 13:51:44.094882 Chrome EC: UHEPI supported
318 13:51:44.101089 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 13:51:44.112853 Probing TPM: done!
320 13:51:44.119054 Connected to device vid:did:rid of 1ae0:0028:00
321 13:51:44.129012 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
322 13:51:44.132389 Initialized TPM device CR50 revision 0
323 13:51:44.147949 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 13:51:44.153968 MRC: Hash idx 0x100b comparison successful.
325 13:51:44.157566 MRC cache found, size faa8
326 13:51:44.157882 bootmode is set to: 2
327 13:51:44.160969 SPD index = 2
328 13:51:44.167576 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 13:51:44.170905 SPD: module type is LPDDR4X
330 13:51:44.174123 SPD: module part number is MT53D1G64D4NW-046
331 13:51:44.180870 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
332 13:51:44.184029 SPD: device width 16 bits, bus width 16 bits
333 13:51:44.190642 SPD: module size is 2048 MB (per channel)
334 13:51:44.620033 CBMEM:
335 13:51:44.623455 IMD: root @ 0x76fff000 254 entries.
336 13:51:44.627293 IMD: root @ 0x76ffec00 62 entries.
337 13:51:44.629989 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 13:51:44.637065 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 13:51:44.640363 External stage cache:
340 13:51:44.643117 IMD: root @ 0x7b3ff000 254 entries.
341 13:51:44.646556 IMD: root @ 0x7b3fec00 62 entries.
342 13:51:44.661754 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 13:51:44.668504 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 13:51:44.674652 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 13:51:44.688658 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 13:51:44.695223 cse_lite: Skip switching to RW in the recovery path
347 13:51:44.695903 8 DIMMs found
348 13:51:44.696543 SMM Memory Map
349 13:51:44.702070 SMRAM : 0x7b000000 0x800000
350 13:51:44.705411 Subregion 0: 0x7b000000 0x200000
351 13:51:44.708291 Subregion 1: 0x7b200000 0x200000
352 13:51:44.711707 Subregion 2: 0x7b400000 0x400000
353 13:51:44.712172 top_of_ram = 0x77000000
354 13:51:44.718319 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 13:51:44.725293 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 13:51:44.728619 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 13:51:44.735103 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 13:51:44.741833 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 13:51:44.748241 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 13:51:44.758458 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 13:51:44.764552 Processing 211 relocs. Offset value of 0x74c0b000
362 13:51:44.771556 BS: romstage times (exec / console): total (unknown) / 277 ms
363 13:51:44.777309
364 13:51:44.777715
365 13:51:44.787047 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 13:51:44.790645 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 13:51:44.799850 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 13:51:44.806651 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 13:51:44.813496 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 13:51:44.819909 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 13:51:44.864314 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 13:51:44.870290 Processing 5008 relocs. Offset value of 0x75d98000
373 13:51:44.873666 BS: postcar times (exec / console): total (unknown) / 59 ms
374 13:51:44.877082
375 13:51:44.877552
376 13:51:44.886744 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 13:51:44.887248 Normal boot
378 13:51:44.890345 FW_CONFIG value is 0x804c02
379 13:51:44.893624 PCI: 00:07.0 disabled by fw_config
380 13:51:44.897215 PCI: 00:07.1 disabled by fw_config
381 13:51:44.899901 PCI: 00:0d.2 disabled by fw_config
382 13:51:44.906916 PCI: 00:1c.7 disabled by fw_config
383 13:51:44.910196 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 13:51:44.916878 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 13:51:44.920280 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 13:51:44.926614 GENERIC: 0.0 disabled by fw_config
387 13:51:44.929920 GENERIC: 1.0 disabled by fw_config
388 13:51:44.933419 fw_config match found: DB_USB=USB3_ACTIVE
389 13:51:44.936564 fw_config match found: DB_USB=USB3_ACTIVE
390 13:51:44.940004 fw_config match found: DB_USB=USB3_ACTIVE
391 13:51:44.946508 fw_config match found: DB_USB=USB3_ACTIVE
392 13:51:44.949898 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 13:51:44.956451 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 13:51:44.966605 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 13:51:44.973448 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 13:51:44.976176 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 13:51:44.983245 microcode: Update skipped, already up-to-date
398 13:51:44.989684 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 13:51:45.017511 Detected 4 core, 8 thread CPU.
400 13:51:45.020958 Setting up SMI for CPU
401 13:51:45.024380 IED base = 0x7b400000
402 13:51:45.024937 IED size = 0x00400000
403 13:51:45.027254 Will perform SMM setup.
404 13:51:45.034218 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
405 13:51:45.040531 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 13:51:45.047112 Processing 16 relocs. Offset value of 0x00030000
407 13:51:45.051076 Attempting to start 7 APs
408 13:51:45.053517 Waiting for 10ms after sending INIT.
409 13:51:45.069373 Waiting for 1st SIPI to complete...done.
410 13:51:45.069822 AP: slot 2 apic_id 5.
411 13:51:45.072836 AP: slot 6 apic_id 4.
412 13:51:45.076249 AP: slot 7 apic_id 2.
413 13:51:45.076782 AP: slot 3 apic_id 3.
414 13:51:45.082938 Waiting for 2nd SIPI to complete...done.
415 13:51:45.083376 AP: slot 1 apic_id 1.
416 13:51:45.086326 AP: slot 4 apic_id 7.
417 13:51:45.089126 AP: slot 5 apic_id 6.
418 13:51:45.096016 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 13:51:45.102797 Processing 13 relocs. Offset value of 0x00038000
420 13:51:45.106064 Unable to locate Global NVS
421 13:51:45.112244 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 13:51:45.115789 Installing permanent SMM handler to 0x7b000000
423 13:51:45.125700 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 13:51:45.129254 Processing 794 relocs. Offset value of 0x7b010000
425 13:51:45.139371 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 13:51:45.142186 Processing 13 relocs. Offset value of 0x7b008000
427 13:51:45.149230 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 13:51:45.156030 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 13:51:45.159225 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 13:51:45.165709 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 13:51:45.172232 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 13:51:45.178688 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 13:51:45.185457 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 13:51:45.185919 Unable to locate Global NVS
435 13:51:45.195728 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 13:51:45.198560 Clearing SMI status registers
437 13:51:45.199122 SMI_STS: PM1
438 13:51:45.201966 PM1_STS: PWRBTN
439 13:51:45.209254 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 13:51:45.211983 In relocation handler: CPU 0
441 13:51:45.215504 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 13:51:45.225496 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 13:51:45.225952 Relocation complete.
444 13:51:45.232011 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 13:51:45.232577 In relocation handler: CPU 1
446 13:51:45.238752 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 13:51:45.239352 Relocation complete.
448 13:51:45.248251 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
449 13:51:45.248826 In relocation handler: CPU 2
450 13:51:45.255462 New SMBASE=0x7afff800 IEDBASE=0x7b400000
451 13:51:45.256021 Relocation complete.
452 13:51:45.264778 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
453 13:51:45.265313 In relocation handler: CPU 6
454 13:51:45.271367 New SMBASE=0x7affe800 IEDBASE=0x7b400000
455 13:51:45.275233 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 13:51:45.278493 Relocation complete.
457 13:51:45.284705 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
458 13:51:45.287955 In relocation handler: CPU 7
459 13:51:45.291178 New SMBASE=0x7affe400 IEDBASE=0x7b400000
460 13:51:45.298378 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 13:51:45.298825 Relocation complete.
462 13:51:45.304599 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
463 13:51:45.307926 In relocation handler: CPU 3
464 13:51:45.314642 New SMBASE=0x7afff400 IEDBASE=0x7b400000
465 13:51:45.315195 Relocation complete.
466 13:51:45.320835 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
467 13:51:45.324346 In relocation handler: CPU 4
468 13:51:45.331104 New SMBASE=0x7afff000 IEDBASE=0x7b400000
469 13:51:45.331672 Relocation complete.
470 13:51:45.337718 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
471 13:51:45.340937 In relocation handler: CPU 5
472 13:51:45.344285 New SMBASE=0x7affec00 IEDBASE=0x7b400000
473 13:51:45.350407 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 13:51:45.353840 Relocation complete.
475 13:51:45.353966 Initializing CPU #0
476 13:51:45.357230 CPU: vendor Intel device 806c1
477 13:51:45.360614 CPU: family 06, model 8c, stepping 01
478 13:51:45.364014 Clearing out pending MCEs
479 13:51:45.367403 Setting up local APIC...
480 13:51:45.370671 apic_id: 0x00 done.
481 13:51:45.373992 Turbo is available but hidden
482 13:51:45.377376 Turbo is available and visible
483 13:51:45.380730 microcode: Update skipped, already up-to-date
484 13:51:45.383862 CPU #0 initialized
485 13:51:45.383959 Initializing CPU #5
486 13:51:45.387129 Initializing CPU #4
487 13:51:45.387243 Initializing CPU #3
488 13:51:45.390447 Initializing CPU #1
489 13:51:45.393802 CPU: vendor Intel device 806c1
490 13:51:45.396974 CPU: family 06, model 8c, stepping 01
491 13:51:45.400351 CPU: vendor Intel device 806c1
492 13:51:45.403656 CPU: family 06, model 8c, stepping 01
493 13:51:45.407058 Clearing out pending MCEs
494 13:51:45.410600 Clearing out pending MCEs
495 13:51:45.414085 Setting up local APIC...
496 13:51:45.417034 CPU: vendor Intel device 806c1
497 13:51:45.420555 CPU: family 06, model 8c, stepping 01
498 13:51:45.420681 Initializing CPU #7
499 13:51:45.423859 Clearing out pending MCEs
500 13:51:45.426827 CPU: vendor Intel device 806c1
501 13:51:45.430363 CPU: family 06, model 8c, stepping 01
502 13:51:45.433926 Setting up local APIC...
503 13:51:45.437217 Initializing CPU #2
504 13:51:45.437335 Initializing CPU #6
505 13:51:45.440740 apic_id: 0x06 done.
506 13:51:45.444183 CPU: vendor Intel device 806c1
507 13:51:45.447787 CPU: family 06, model 8c, stepping 01
508 13:51:45.451278 CPU: vendor Intel device 806c1
509 13:51:45.454857 CPU: family 06, model 8c, stepping 01
510 13:51:45.458199 CPU: vendor Intel device 806c1
511 13:51:45.460983 CPU: family 06, model 8c, stepping 01
512 13:51:45.464362 Clearing out pending MCEs
513 13:51:45.464471 Clearing out pending MCEs
514 13:51:45.467906 Setting up local APIC...
515 13:51:45.471280 Setting up local APIC...
516 13:51:45.474758 Clearing out pending MCEs
517 13:51:45.474853 apic_id: 0x03 done.
518 13:51:45.477911 Setting up local APIC...
519 13:51:45.481351 microcode: Update skipped, already up-to-date
520 13:51:45.484773 apic_id: 0x07 done.
521 13:51:45.488175 CPU #5 initialized
522 13:51:45.491221 microcode: Update skipped, already up-to-date
523 13:51:45.494460 Setting up local APIC...
524 13:51:45.497798 microcode: Update skipped, already up-to-date
525 13:51:45.501021 apic_id: 0x02 done.
526 13:51:45.501143 CPU #4 initialized
527 13:51:45.504376 Clearing out pending MCEs
528 13:51:45.507680 apic_id: 0x05 done.
529 13:51:45.511025 apic_id: 0x04 done.
530 13:51:45.514398 microcode: Update skipped, already up-to-date
531 13:51:45.517865 microcode: Update skipped, already up-to-date
532 13:51:45.521385 CPU #2 initialized
533 13:51:45.521509 CPU #6 initialized
534 13:51:45.524109 Setting up local APIC...
535 13:51:45.530872 microcode: Update skipped, already up-to-date
536 13:51:45.530999 CPU #3 initialized
537 13:51:45.534373 CPU #7 initialized
538 13:51:45.534500 apic_id: 0x01 done.
539 13:51:45.541228 microcode: Update skipped, already up-to-date
540 13:51:45.544593 CPU #1 initialized
541 13:51:45.547359 bsp_do_flight_plan done after 461 msecs.
542 13:51:45.550820 CPU: frequency set to 4400 MHz
543 13:51:45.550950 Enabling SMIs.
544 13:51:45.557595 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 13:51:45.573510 SATAXPCIE1 indicates PCIe NVMe is present
546 13:51:45.576909 Probing TPM: done!
547 13:51:45.580493 Connected to device vid:did:rid of 1ae0:0028:00
548 13:51:45.591246 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
549 13:51:45.594702 Initialized TPM device CR50 revision 0
550 13:51:45.598086 Enabling S0i3.4
551 13:51:45.604521 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 13:51:45.607985 Found a VBT of 8704 bytes after decompression
553 13:51:45.614536 cse_lite: CSE RO boot. HybridStorageMode disabled
554 13:51:45.620747 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 13:51:45.696215 FSPS returned 0
556 13:51:45.699835 Executing Phase 1 of FspMultiPhaseSiInit
557 13:51:45.710074 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 13:51:45.713217 port C0 DISC req: usage 1 usb3 1 usb2 5
559 13:51:45.716377 Raw Buffer output 0 00000511
560 13:51:45.719859 Raw Buffer output 1 00000000
561 13:51:45.723094 pmc_send_ipc_cmd succeeded
562 13:51:45.730033 port C1 DISC req: usage 1 usb3 2 usb2 3
563 13:51:45.730545 Raw Buffer output 0 00000321
564 13:51:45.732804 Raw Buffer output 1 00000000
565 13:51:45.737010 pmc_send_ipc_cmd succeeded
566 13:51:45.742767 Detected 4 core, 8 thread CPU.
567 13:51:45.745461 Detected 4 core, 8 thread CPU.
568 13:51:45.945866 Display FSP Version Info HOB
569 13:51:45.949270 Reference Code - CPU = a.0.4c.31
570 13:51:45.952881 uCode Version = 0.0.0.86
571 13:51:45.956288 TXT ACM version = ff.ff.ff.ffff
572 13:51:45.959703 Reference Code - ME = a.0.4c.31
573 13:51:45.962913 MEBx version = 0.0.0.0
574 13:51:45.965642 ME Firmware Version = Consumer SKU
575 13:51:45.969237 Reference Code - PCH = a.0.4c.31
576 13:51:45.972543 PCH-CRID Status = Disabled
577 13:51:45.975808 PCH-CRID Original Value = ff.ff.ff.ffff
578 13:51:45.979276 PCH-CRID New Value = ff.ff.ff.ffff
579 13:51:45.982714 OPROM - RST - RAID = ff.ff.ff.ffff
580 13:51:45.986101 PCH Hsio Version = 4.0.0.0
581 13:51:45.989586 Reference Code - SA - System Agent = a.0.4c.31
582 13:51:45.992288 Reference Code - MRC = 2.0.0.1
583 13:51:45.995668 SA - PCIe Version = a.0.4c.31
584 13:51:45.999066 SA-CRID Status = Disabled
585 13:51:46.002413 SA-CRID Original Value = 0.0.0.1
586 13:51:46.005805 SA-CRID New Value = 0.0.0.1
587 13:51:46.009308 OPROM - VBIOS = ff.ff.ff.ffff
588 13:51:46.012589 IO Manageability Engine FW Version = 11.1.4.0
589 13:51:46.015854 PHY Build Version = 0.0.0.e0
590 13:51:46.019397 Thunderbolt(TM) FW Version = 0.0.0.0
591 13:51:46.027125 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 13:51:46.027807 ITSS IRQ Polarities Before:
593 13:51:46.030340 IPC0: 0xffffffff
594 13:51:46.030784 IPC1: 0xffffffff
595 13:51:46.033717 IPC2: 0xffffffff
596 13:51:46.034189 IPC3: 0xffffffff
597 13:51:46.036917 ITSS IRQ Polarities After:
598 13:51:46.040046 IPC0: 0xffffffff
599 13:51:46.040468 IPC1: 0xffffffff
600 13:51:46.043245 IPC2: 0xffffffff
601 13:51:46.043723 IPC3: 0xffffffff
602 13:51:46.049816 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 13:51:46.060137 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 13:51:46.073249 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 13:51:46.086346 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 13:51:46.089810 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
607 13:51:46.093127 Enumerating buses...
608 13:51:46.096600 Show all devs... Before device enumeration.
609 13:51:46.100059 Root Device: enabled 1
610 13:51:46.102911 DOMAIN: 0000: enabled 1
611 13:51:46.106372 CPU_CLUSTER: 0: enabled 1
612 13:51:46.106804 PCI: 00:00.0: enabled 1
613 13:51:46.109850 PCI: 00:02.0: enabled 1
614 13:51:46.113272 PCI: 00:04.0: enabled 1
615 13:51:46.116430 PCI: 00:05.0: enabled 1
616 13:51:46.116870 PCI: 00:06.0: enabled 0
617 13:51:46.119832 PCI: 00:07.0: enabled 0
618 13:51:46.123387 PCI: 00:07.1: enabled 0
619 13:51:46.126271 PCI: 00:07.2: enabled 0
620 13:51:46.126714 PCI: 00:07.3: enabled 0
621 13:51:46.129629 PCI: 00:08.0: enabled 1
622 13:51:46.132956 PCI: 00:09.0: enabled 0
623 13:51:46.136180 PCI: 00:0a.0: enabled 0
624 13:51:46.136596 PCI: 00:0d.0: enabled 1
625 13:51:46.139375 PCI: 00:0d.1: enabled 0
626 13:51:46.143273 PCI: 00:0d.2: enabled 0
627 13:51:46.143684 PCI: 00:0d.3: enabled 0
628 13:51:46.146194 PCI: 00:0e.0: enabled 0
629 13:51:46.149493 PCI: 00:10.2: enabled 1
630 13:51:46.152689 PCI: 00:10.6: enabled 0
631 13:51:46.153008 PCI: 00:10.7: enabled 0
632 13:51:46.156736 PCI: 00:12.0: enabled 0
633 13:51:46.159445 PCI: 00:12.6: enabled 0
634 13:51:46.163090 PCI: 00:13.0: enabled 0
635 13:51:46.163482 PCI: 00:14.0: enabled 1
636 13:51:46.166558 PCI: 00:14.1: enabled 0
637 13:51:46.170000 PCI: 00:14.2: enabled 1
638 13:51:46.173030 PCI: 00:14.3: enabled 1
639 13:51:46.173387 PCI: 00:15.0: enabled 1
640 13:51:46.176010 PCI: 00:15.1: enabled 1
641 13:51:46.179501 PCI: 00:15.2: enabled 1
642 13:51:46.179826 PCI: 00:15.3: enabled 1
643 13:51:46.182970 PCI: 00:16.0: enabled 1
644 13:51:46.186335 PCI: 00:16.1: enabled 0
645 13:51:46.189858 PCI: 00:16.2: enabled 0
646 13:51:46.190267 PCI: 00:16.3: enabled 0
647 13:51:46.193187 PCI: 00:16.4: enabled 0
648 13:51:46.195929 PCI: 00:16.5: enabled 0
649 13:51:46.199286 PCI: 00:17.0: enabled 1
650 13:51:46.199597 PCI: 00:19.0: enabled 0
651 13:51:46.202473 PCI: 00:19.1: enabled 1
652 13:51:46.206135 PCI: 00:19.2: enabled 0
653 13:51:46.209596 PCI: 00:1c.0: enabled 1
654 13:51:46.209919 PCI: 00:1c.1: enabled 0
655 13:51:46.213055 PCI: 00:1c.2: enabled 0
656 13:51:46.215953 PCI: 00:1c.3: enabled 0
657 13:51:46.219259 PCI: 00:1c.4: enabled 0
658 13:51:46.219581 PCI: 00:1c.5: enabled 0
659 13:51:46.222591 PCI: 00:1c.6: enabled 1
660 13:51:46.226100 PCI: 00:1c.7: enabled 0
661 13:51:46.226478 PCI: 00:1d.0: enabled 1
662 13:51:46.229671 PCI: 00:1d.1: enabled 0
663 13:51:46.232471 PCI: 00:1d.2: enabled 1
664 13:51:46.235989 PCI: 00:1d.3: enabled 0
665 13:51:46.236491 PCI: 00:1e.0: enabled 1
666 13:51:46.239273 PCI: 00:1e.1: enabled 0
667 13:51:46.242467 PCI: 00:1e.2: enabled 1
668 13:51:46.245928 PCI: 00:1e.3: enabled 1
669 13:51:46.246378 PCI: 00:1f.0: enabled 1
670 13:51:46.249062 PCI: 00:1f.1: enabled 0
671 13:51:46.252995 PCI: 00:1f.2: enabled 1
672 13:51:46.255616 PCI: 00:1f.3: enabled 1
673 13:51:46.256070 PCI: 00:1f.4: enabled 0
674 13:51:46.259569 PCI: 00:1f.5: enabled 1
675 13:51:46.262848 PCI: 00:1f.6: enabled 0
676 13:51:46.263302 PCI: 00:1f.7: enabled 0
677 13:51:46.266129 APIC: 00: enabled 1
678 13:51:46.269043 GENERIC: 0.0: enabled 1
679 13:51:46.272318 GENERIC: 0.0: enabled 1
680 13:51:46.272689 GENERIC: 1.0: enabled 1
681 13:51:46.275911 GENERIC: 0.0: enabled 1
682 13:51:46.279401 GENERIC: 1.0: enabled 1
683 13:51:46.279981 USB0 port 0: enabled 1
684 13:51:46.282726 GENERIC: 0.0: enabled 1
685 13:51:46.286196 USB0 port 0: enabled 1
686 13:51:46.289019 GENERIC: 0.0: enabled 1
687 13:51:46.289482 I2C: 00:1a: enabled 1
688 13:51:46.292274 I2C: 00:31: enabled 1
689 13:51:46.295660 I2C: 00:32: enabled 1
690 13:51:46.296252 I2C: 00:10: enabled 1
691 13:51:46.298962 I2C: 00:15: enabled 1
692 13:51:46.302375 GENERIC: 0.0: enabled 0
693 13:51:46.305671 GENERIC: 1.0: enabled 0
694 13:51:46.306252 GENERIC: 0.0: enabled 1
695 13:51:46.309197 SPI: 00: enabled 1
696 13:51:46.309778 SPI: 00: enabled 1
697 13:51:46.312705 PNP: 0c09.0: enabled 1
698 13:51:46.315931 GENERIC: 0.0: enabled 1
699 13:51:46.319408 USB3 port 0: enabled 1
700 13:51:46.320024 USB3 port 1: enabled 1
701 13:51:46.322180 USB3 port 2: enabled 0
702 13:51:46.325498 USB3 port 3: enabled 0
703 13:51:46.326076 USB2 port 0: enabled 0
704 13:51:46.329000 USB2 port 1: enabled 1
705 13:51:46.332584 USB2 port 2: enabled 1
706 13:51:46.336107 USB2 port 3: enabled 0
707 13:51:46.336673 USB2 port 4: enabled 1
708 13:51:46.338884 USB2 port 5: enabled 0
709 13:51:46.342329 USB2 port 6: enabled 0
710 13:51:46.342927 USB2 port 7: enabled 0
711 13:51:46.345837 USB2 port 8: enabled 0
712 13:51:46.349071 USB2 port 9: enabled 0
713 13:51:46.349588 USB3 port 0: enabled 0
714 13:51:46.351836 USB3 port 1: enabled 1
715 13:51:46.355372 USB3 port 2: enabled 0
716 13:51:46.358694 USB3 port 3: enabled 0
717 13:51:46.359198 GENERIC: 0.0: enabled 1
718 13:51:46.361967 GENERIC: 1.0: enabled 1
719 13:51:46.365596 APIC: 01: enabled 1
720 13:51:46.366014 APIC: 05: enabled 1
721 13:51:46.368830 APIC: 03: enabled 1
722 13:51:46.372061 APIC: 07: enabled 1
723 13:51:46.372616 APIC: 06: enabled 1
724 13:51:46.375364 APIC: 04: enabled 1
725 13:51:46.375875 APIC: 02: enabled 1
726 13:51:46.378553 Compare with tree...
727 13:51:46.381959 Root Device: enabled 1
728 13:51:46.382375 DOMAIN: 0000: enabled 1
729 13:51:46.385336 PCI: 00:00.0: enabled 1
730 13:51:46.388721 PCI: 00:02.0: enabled 1
731 13:51:46.392038 PCI: 00:04.0: enabled 1
732 13:51:46.395409 GENERIC: 0.0: enabled 1
733 13:51:46.396043 PCI: 00:05.0: enabled 1
734 13:51:46.398750 PCI: 00:06.0: enabled 0
735 13:51:46.401991 PCI: 00:07.0: enabled 0
736 13:51:46.405594 GENERIC: 0.0: enabled 1
737 13:51:46.408902 PCI: 00:07.1: enabled 0
738 13:51:46.412331 GENERIC: 1.0: enabled 1
739 13:51:46.412754 PCI: 00:07.2: enabled 0
740 13:51:46.415126 GENERIC: 0.0: enabled 1
741 13:51:46.418511 PCI: 00:07.3: enabled 0
742 13:51:46.421937 GENERIC: 1.0: enabled 1
743 13:51:46.425352 PCI: 00:08.0: enabled 1
744 13:51:46.425803 PCI: 00:09.0: enabled 0
745 13:51:46.428666 PCI: 00:0a.0: enabled 0
746 13:51:46.431965 PCI: 00:0d.0: enabled 1
747 13:51:46.434881 USB0 port 0: enabled 1
748 13:51:46.438473 USB3 port 0: enabled 1
749 13:51:46.438941 USB3 port 1: enabled 1
750 13:51:46.441972 USB3 port 2: enabled 0
751 13:51:46.445527 USB3 port 3: enabled 0
752 13:51:46.448937 PCI: 00:0d.1: enabled 0
753 13:51:46.451964 PCI: 00:0d.2: enabled 0
754 13:51:46.452529 GENERIC: 0.0: enabled 1
755 13:51:46.455471 PCI: 00:0d.3: enabled 0
756 13:51:46.458277 PCI: 00:0e.0: enabled 0
757 13:51:46.461838 PCI: 00:10.2: enabled 1
758 13:51:46.465313 PCI: 00:10.6: enabled 0
759 13:51:46.465868 PCI: 00:10.7: enabled 0
760 13:51:46.468888 PCI: 00:12.0: enabled 0
761 13:51:46.471852 PCI: 00:12.6: enabled 0
762 13:51:46.475105 PCI: 00:13.0: enabled 0
763 13:51:46.478471 PCI: 00:14.0: enabled 1
764 13:51:46.478993 USB0 port 0: enabled 1
765 13:51:46.481447 USB2 port 0: enabled 0
766 13:51:46.485336 USB2 port 1: enabled 1
767 13:51:46.488592 USB2 port 2: enabled 1
768 13:51:46.491979 USB2 port 3: enabled 0
769 13:51:46.492495 USB2 port 4: enabled 1
770 13:51:46.494876 USB2 port 5: enabled 0
771 13:51:46.498275 USB2 port 6: enabled 0
772 13:51:46.501632 USB2 port 7: enabled 0
773 13:51:46.505079 USB2 port 8: enabled 0
774 13:51:46.508718 USB2 port 9: enabled 0
775 13:51:46.509241 USB3 port 0: enabled 0
776 13:51:46.511311 USB3 port 1: enabled 1
777 13:51:46.514943 USB3 port 2: enabled 0
778 13:51:46.518446 USB3 port 3: enabled 0
779 13:51:46.521835 PCI: 00:14.1: enabled 0
780 13:51:46.522521 PCI: 00:14.2: enabled 1
781 13:51:46.524541 PCI: 00:14.3: enabled 1
782 13:51:46.528121 GENERIC: 0.0: enabled 1
783 13:51:46.531550 PCI: 00:15.0: enabled 1
784 13:51:46.534806 I2C: 00:1a: enabled 1
785 13:51:46.535203 I2C: 00:31: enabled 1
786 13:51:46.538426 I2C: 00:32: enabled 1
787 13:51:46.541258 PCI: 00:15.1: enabled 1
788 13:51:46.544724 I2C: 00:10: enabled 1
789 13:51:46.548226 PCI: 00:15.2: enabled 1
790 13:51:46.548677 PCI: 00:15.3: enabled 1
791 13:51:46.551667 PCI: 00:16.0: enabled 1
792 13:51:46.555057 PCI: 00:16.1: enabled 0
793 13:51:46.558475 PCI: 00:16.2: enabled 0
794 13:51:46.561158 PCI: 00:16.3: enabled 0
795 13:51:46.561673 PCI: 00:16.4: enabled 0
796 13:51:46.564592 PCI: 00:16.5: enabled 0
797 13:51:46.568167 PCI: 00:17.0: enabled 1
798 13:51:46.571663 PCI: 00:19.0: enabled 0
799 13:51:46.572030 PCI: 00:19.1: enabled 1
800 13:51:46.574541 I2C: 00:15: enabled 1
801 13:51:46.577849 PCI: 00:19.2: enabled 0
802 13:51:46.581034 PCI: 00:1d.0: enabled 1
803 13:51:46.584315 GENERIC: 0.0: enabled 1
804 13:51:46.584770 PCI: 00:1e.0: enabled 1
805 13:51:46.588089 PCI: 00:1e.1: enabled 0
806 13:51:46.591257 PCI: 00:1e.2: enabled 1
807 13:51:46.594355 SPI: 00: enabled 1
808 13:51:46.597687 PCI: 00:1e.3: enabled 1
809 13:51:46.598095 SPI: 00: enabled 1
810 13:51:46.601610 PCI: 00:1f.0: enabled 1
811 13:51:46.604996 PNP: 0c09.0: enabled 1
812 13:51:46.608050 PCI: 00:1f.1: enabled 0
813 13:51:46.608714 PCI: 00:1f.2: enabled 1
814 13:51:46.611352 GENERIC: 0.0: enabled 1
815 13:51:46.614697 GENERIC: 0.0: enabled 1
816 13:51:46.617660 GENERIC: 1.0: enabled 1
817 13:51:46.620929 PCI: 00:1f.3: enabled 1
818 13:51:46.621324 PCI: 00:1f.4: enabled 0
819 13:51:46.624369 PCI: 00:1f.5: enabled 1
820 13:51:46.627772 PCI: 00:1f.6: enabled 0
821 13:51:46.631377 PCI: 00:1f.7: enabled 0
822 13:51:46.634248 CPU_CLUSTER: 0: enabled 1
823 13:51:46.634663 APIC: 00: enabled 1
824 13:51:46.637826 APIC: 01: enabled 1
825 13:51:46.641188 APIC: 05: enabled 1
826 13:51:46.641679 APIC: 03: enabled 1
827 13:51:46.693211 APIC: 07: enabled 1
828 13:51:46.693758 APIC: 06: enabled 1
829 13:51:46.694118 APIC: 04: enabled 1
830 13:51:46.694447 APIC: 02: enabled 1
831 13:51:46.694761 Root Device scanning...
832 13:51:46.695070 scan_static_bus for Root Device
833 13:51:46.695543 DOMAIN: 0000 enabled
834 13:51:46.696243 CPU_CLUSTER: 0 enabled
835 13:51:46.696720 DOMAIN: 0000 scanning...
836 13:51:46.697054 PCI: pci_scan_bus for bus 00
837 13:51:46.697367 PCI: 00:00.0 [8086/0000] ops
838 13:51:46.697677 PCI: 00:00.0 [8086/9a12] enabled
839 13:51:46.697975 PCI: 00:02.0 [8086/0000] bus ops
840 13:51:46.698272 PCI: 00:02.0 [8086/9a40] enabled
841 13:51:46.698568 PCI: 00:04.0 [8086/0000] bus ops
842 13:51:46.698865 PCI: 00:04.0 [8086/9a03] enabled
843 13:51:46.699154 PCI: 00:05.0 [8086/9a19] enabled
844 13:51:46.732538 PCI: 00:07.0 [0000/0000] hidden
845 13:51:46.733198 PCI: 00:08.0 [8086/9a11] enabled
846 13:51:46.733657 PCI: 00:0a.0 [8086/9a0d] disabled
847 13:51:46.734032 PCI: 00:0d.0 [8086/0000] bus ops
848 13:51:46.734729 PCI: 00:0d.0 [8086/9a13] enabled
849 13:51:46.735201 PCI: 00:14.0 [8086/0000] bus ops
850 13:51:46.735565 PCI: 00:14.0 [8086/a0ed] enabled
851 13:51:46.735887 PCI: 00:14.2 [8086/a0ef] enabled
852 13:51:46.736234 PCI: 00:14.3 [8086/0000] bus ops
853 13:51:46.736636 PCI: 00:14.3 [8086/a0f0] enabled
854 13:51:46.736996 PCI: 00:15.0 [8086/0000] bus ops
855 13:51:46.737318 PCI: 00:15.0 [8086/a0e8] enabled
856 13:51:46.737723 PCI: 00:15.1 [8086/0000] bus ops
857 13:51:46.739605 PCI: 00:15.1 [8086/a0e9] enabled
858 13:51:46.742994 PCI: 00:15.2 [8086/0000] bus ops
859 13:51:46.746370 PCI: 00:15.2 [8086/a0ea] enabled
860 13:51:46.749655 PCI: 00:15.3 [8086/0000] bus ops
861 13:51:46.753137 PCI: 00:15.3 [8086/a0eb] enabled
862 13:51:46.753628 PCI: 00:16.0 [8086/0000] ops
863 13:51:46.756651 PCI: 00:16.0 [8086/a0e0] enabled
864 13:51:46.762815 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 13:51:46.766436 PCI: 00:19.0 [8086/0000] bus ops
866 13:51:46.769938 PCI: 00:19.0 [8086/a0c5] disabled
867 13:51:46.772656 PCI: 00:19.1 [8086/0000] bus ops
868 13:51:46.776246 PCI: 00:19.1 [8086/a0c6] enabled
869 13:51:46.779660 PCI: 00:1d.0 [8086/0000] bus ops
870 13:51:46.783061 PCI: 00:1d.0 [8086/a0b0] enabled
871 13:51:46.785921 PCI: 00:1e.0 [8086/0000] ops
872 13:51:46.789306 PCI: 00:1e.0 [8086/a0a8] enabled
873 13:51:46.792737 PCI: 00:1e.2 [8086/0000] bus ops
874 13:51:46.796195 PCI: 00:1e.2 [8086/a0aa] enabled
875 13:51:46.799488 PCI: 00:1e.3 [8086/0000] bus ops
876 13:51:46.802726 PCI: 00:1e.3 [8086/a0ab] enabled
877 13:51:46.806240 PCI: 00:1f.0 [8086/0000] bus ops
878 13:51:46.809682 PCI: 00:1f.0 [8086/a087] enabled
879 13:51:46.812865 RTC Init
880 13:51:46.816145 Set power on after power failure.
881 13:51:46.816731 Disabling Deep S3
882 13:51:46.819406 Disabling Deep S3
883 13:51:46.819886 Disabling Deep S4
884 13:51:46.822779 Disabling Deep S4
885 13:51:46.823215 Disabling Deep S5
886 13:51:46.826061 Disabling Deep S5
887 13:51:46.829276 PCI: 00:1f.2 [0000/0000] hidden
888 13:51:46.832382 PCI: 00:1f.3 [8086/0000] bus ops
889 13:51:46.835584 PCI: 00:1f.3 [8086/a0c8] enabled
890 13:51:46.839005 PCI: 00:1f.5 [8086/0000] bus ops
891 13:51:46.842467 PCI: 00:1f.5 [8086/a0a4] enabled
892 13:51:46.845922 PCI: Leftover static devices:
893 13:51:46.846465 PCI: 00:10.2
894 13:51:46.849420 PCI: 00:10.6
895 13:51:46.849856 PCI: 00:10.7
896 13:51:46.852294 PCI: 00:06.0
897 13:51:46.852806 PCI: 00:07.1
898 13:51:46.853158 PCI: 00:07.2
899 13:51:46.855610 PCI: 00:07.3
900 13:51:46.856051 PCI: 00:09.0
901 13:51:46.859244 PCI: 00:0d.1
902 13:51:46.859761 PCI: 00:0d.2
903 13:51:46.860165 PCI: 00:0d.3
904 13:51:46.862512 PCI: 00:0e.0
905 13:51:46.863124 PCI: 00:12.0
906 13:51:46.866070 PCI: 00:12.6
907 13:51:46.866638 PCI: 00:13.0
908 13:51:46.868955 PCI: 00:14.1
909 13:51:46.869386 PCI: 00:16.1
910 13:51:46.869761 PCI: 00:16.2
911 13:51:46.872255 PCI: 00:16.3
912 13:51:46.872712 PCI: 00:16.4
913 13:51:46.875798 PCI: 00:16.5
914 13:51:46.876233 PCI: 00:17.0
915 13:51:46.876628 PCI: 00:19.2
916 13:51:46.879153 PCI: 00:1e.1
917 13:51:46.879727 PCI: 00:1f.1
918 13:51:46.882555 PCI: 00:1f.4
919 13:51:46.883091 PCI: 00:1f.6
920 13:51:46.883584 PCI: 00:1f.7
921 13:51:46.885972 PCI: Check your devicetree.cb.
922 13:51:46.888751 PCI: 00:02.0 scanning...
923 13:51:46.892013 scan_generic_bus for PCI: 00:02.0
924 13:51:46.895449 scan_generic_bus for PCI: 00:02.0 done
925 13:51:46.902314 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 13:51:46.905641 PCI: 00:04.0 scanning...
927 13:51:46.909050 scan_generic_bus for PCI: 00:04.0
928 13:51:46.909423 GENERIC: 0.0 enabled
929 13:51:46.915380 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 13:51:46.922263 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 13:51:46.922639 PCI: 00:0d.0 scanning...
932 13:51:46.925408 scan_static_bus for PCI: 00:0d.0
933 13:51:46.928621 USB0 port 0 enabled
934 13:51:46.931871 USB0 port 0 scanning...
935 13:51:46.934950 scan_static_bus for USB0 port 0
936 13:51:46.938959 USB3 port 0 enabled
937 13:51:46.939259 USB3 port 1 enabled
938 13:51:46.942024 USB3 port 2 disabled
939 13:51:46.942322 USB3 port 3 disabled
940 13:51:46.945137 USB3 port 0 scanning...
941 13:51:46.948389 scan_static_bus for USB3 port 0
942 13:51:46.951826 scan_static_bus for USB3 port 0 done
943 13:51:46.958553 scan_bus: bus USB3 port 0 finished in 6 msecs
944 13:51:46.958986 USB3 port 1 scanning...
945 13:51:46.962069 scan_static_bus for USB3 port 1
946 13:51:46.968903 scan_static_bus for USB3 port 1 done
947 13:51:46.971560 scan_bus: bus USB3 port 1 finished in 6 msecs
948 13:51:46.975195 scan_static_bus for USB0 port 0 done
949 13:51:46.978574 scan_bus: bus USB0 port 0 finished in 43 msecs
950 13:51:46.985030 scan_static_bus for PCI: 00:0d.0 done
951 13:51:46.988308 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 13:51:46.991791 PCI: 00:14.0 scanning...
953 13:51:46.995258 scan_static_bus for PCI: 00:14.0
954 13:51:46.998184 USB0 port 0 enabled
955 13:51:46.998520 USB0 port 0 scanning...
956 13:51:47.001634 scan_static_bus for USB0 port 0
957 13:51:47.005163 USB2 port 0 disabled
958 13:51:47.008544 USB2 port 1 enabled
959 13:51:47.008843 USB2 port 2 enabled
960 13:51:47.012083 USB2 port 3 disabled
961 13:51:47.012496 USB2 port 4 enabled
962 13:51:47.015380 USB2 port 5 disabled
963 13:51:47.018660 USB2 port 6 disabled
964 13:51:47.019157 USB2 port 7 disabled
965 13:51:47.021717 USB2 port 8 disabled
966 13:51:47.025158 USB2 port 9 disabled
967 13:51:47.025580 USB3 port 0 disabled
968 13:51:47.028367 USB3 port 1 enabled
969 13:51:47.031397 USB3 port 2 disabled
970 13:51:47.031946 USB3 port 3 disabled
971 13:51:47.034714 USB2 port 1 scanning...
972 13:51:47.037950 scan_static_bus for USB2 port 1
973 13:51:47.041786 scan_static_bus for USB2 port 1 done
974 13:51:47.047699 scan_bus: bus USB2 port 1 finished in 6 msecs
975 13:51:47.048250 USB2 port 2 scanning...
976 13:51:47.051494 scan_static_bus for USB2 port 2
977 13:51:47.054801 scan_static_bus for USB2 port 2 done
978 13:51:47.061516 scan_bus: bus USB2 port 2 finished in 6 msecs
979 13:51:47.064933 USB2 port 4 scanning...
980 13:51:47.068166 scan_static_bus for USB2 port 4
981 13:51:47.071035 scan_static_bus for USB2 port 4 done
982 13:51:47.074487 scan_bus: bus USB2 port 4 finished in 6 msecs
983 13:51:47.077982 USB3 port 1 scanning...
984 13:51:47.081506 scan_static_bus for USB3 port 1
985 13:51:47.084264 scan_static_bus for USB3 port 1 done
986 13:51:47.087975 scan_bus: bus USB3 port 1 finished in 6 msecs
987 13:51:47.094272 scan_static_bus for USB0 port 0 done
988 13:51:47.097913 scan_bus: bus USB0 port 0 finished in 93 msecs
989 13:51:47.101395 scan_static_bus for PCI: 00:14.0 done
990 13:51:47.108237 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
991 13:51:47.108764 PCI: 00:14.3 scanning...
992 13:51:47.110933 scan_static_bus for PCI: 00:14.3
993 13:51:47.114424 GENERIC: 0.0 enabled
994 13:51:47.117937 scan_static_bus for PCI: 00:14.3 done
995 13:51:47.124459 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 13:51:47.124908 PCI: 00:15.0 scanning...
997 13:51:47.127987 scan_static_bus for PCI: 00:15.0
998 13:51:47.130801 I2C: 00:1a enabled
999 13:51:47.134266 I2C: 00:31 enabled
1000 13:51:47.134702 I2C: 00:32 enabled
1001 13:51:47.137434 scan_static_bus for PCI: 00:15.0 done
1002 13:51:47.144127 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 13:51:47.147579 PCI: 00:15.1 scanning...
1004 13:51:47.150917 scan_static_bus for PCI: 00:15.1
1005 13:51:47.151563 I2C: 00:10 enabled
1006 13:51:47.154341 scan_static_bus for PCI: 00:15.1 done
1007 13:51:47.160844 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 13:51:47.164098 PCI: 00:15.2 scanning...
1009 13:51:47.167386 scan_static_bus for PCI: 00:15.2
1010 13:51:47.170689 scan_static_bus for PCI: 00:15.2 done
1011 13:51:47.173600 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 13:51:47.177098 PCI: 00:15.3 scanning...
1013 13:51:47.180630 scan_static_bus for PCI: 00:15.3
1014 13:51:47.183906 scan_static_bus for PCI: 00:15.3 done
1015 13:51:47.190136 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 13:51:47.190867 PCI: 00:19.1 scanning...
1017 13:51:47.193541 scan_static_bus for PCI: 00:19.1
1018 13:51:47.197026 I2C: 00:15 enabled
1019 13:51:47.200456 scan_static_bus for PCI: 00:19.1 done
1020 13:51:47.207224 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 13:51:47.207641 PCI: 00:1d.0 scanning...
1022 13:51:47.213347 do_pci_scan_bridge for PCI: 00:1d.0
1023 13:51:47.213759 PCI: pci_scan_bus for bus 01
1024 13:51:47.216886 PCI: 01:00.0 [15b7/5009] enabled
1025 13:51:47.220333 GENERIC: 0.0 enabled
1026 13:51:47.223773 Enabling Common Clock Configuration
1027 13:51:47.230466 L1 Sub-State supported from root port 29
1028 13:51:47.230920 L1 Sub-State Support = 0x5
1029 13:51:47.233962 CommonModeRestoreTime = 0x28
1030 13:51:47.240175 Power On Value = 0x16, Power On Scale = 0x0
1031 13:51:47.240592 ASPM: Enabled L1
1032 13:51:47.243615 PCIe: Max_Payload_Size adjusted to 128
1033 13:51:47.250135 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 13:51:47.250584 PCI: 00:1e.2 scanning...
1035 13:51:47.256951 scan_generic_bus for PCI: 00:1e.2
1036 13:51:47.257393 SPI: 00 enabled
1037 13:51:47.263255 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 13:51:47.266495 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 13:51:47.270216 PCI: 00:1e.3 scanning...
1040 13:51:47.273579 scan_generic_bus for PCI: 00:1e.3
1041 13:51:47.277514 SPI: 00 enabled
1042 13:51:47.280679 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 13:51:47.286896 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 13:51:47.290319 PCI: 00:1f.0 scanning...
1045 13:51:47.293802 scan_static_bus for PCI: 00:1f.0
1046 13:51:47.294274 PNP: 0c09.0 enabled
1047 13:51:47.297331 PNP: 0c09.0 scanning...
1048 13:51:47.299898 scan_static_bus for PNP: 0c09.0
1049 13:51:47.303469 scan_static_bus for PNP: 0c09.0 done
1050 13:51:47.310287 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 13:51:47.313433 scan_static_bus for PCI: 00:1f.0 done
1052 13:51:47.316914 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 13:51:47.319679 PCI: 00:1f.2 scanning...
1054 13:51:47.323207 scan_static_bus for PCI: 00:1f.2
1055 13:51:47.326705 GENERIC: 0.0 enabled
1056 13:51:47.326911 GENERIC: 0.0 scanning...
1057 13:51:47.333561 scan_static_bus for GENERIC: 0.0
1058 13:51:47.333768 GENERIC: 0.0 enabled
1059 13:51:47.336899 GENERIC: 1.0 enabled
1060 13:51:47.339671 scan_static_bus for GENERIC: 0.0 done
1061 13:51:47.342899 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 13:51:47.349889 scan_static_bus for PCI: 00:1f.2 done
1063 13:51:47.353269 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 13:51:47.356498 PCI: 00:1f.3 scanning...
1065 13:51:47.359837 scan_static_bus for PCI: 00:1f.3
1066 13:51:47.362945 scan_static_bus for PCI: 00:1f.3 done
1067 13:51:47.366088 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 13:51:47.369961 PCI: 00:1f.5 scanning...
1069 13:51:47.373191 scan_generic_bus for PCI: 00:1f.5
1070 13:51:47.376276 scan_generic_bus for PCI: 00:1f.5 done
1071 13:51:47.382809 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 13:51:47.386006 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1073 13:51:47.389878 scan_static_bus for Root Device done
1074 13:51:47.396486 scan_bus: bus Root Device finished in 735 msecs
1075 13:51:47.396691 done
1076 13:51:47.402756 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1077 13:51:47.406236 Chrome EC: UHEPI supported
1078 13:51:47.413150 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 13:51:47.419424 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 13:51:47.423015 SPI flash protection: WPSW=0 SRP0=1
1081 13:51:47.425708 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 13:51:47.432405 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 13:51:47.436002 found VGA at PCI: 00:02.0
1084 13:51:47.439280 Setting up VGA for PCI: 00:02.0
1085 13:51:47.442495 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 13:51:47.449505 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 13:51:47.452299 Allocating resources...
1088 13:51:47.452403 Reading resources...
1089 13:51:47.455657 Root Device read_resources bus 0 link: 0
1090 13:51:47.462575 DOMAIN: 0000 read_resources bus 0 link: 0
1091 13:51:47.465249 PCI: 00:04.0 read_resources bus 1 link: 0
1092 13:51:47.472113 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 13:51:47.475290 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 13:51:47.481885 USB0 port 0 read_resources bus 0 link: 0
1095 13:51:47.485212 USB0 port 0 read_resources bus 0 link: 0 done
1096 13:51:47.491926 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 13:51:47.495166 PCI: 00:14.0 read_resources bus 0 link: 0
1098 13:51:47.498356 USB0 port 0 read_resources bus 0 link: 0
1099 13:51:47.506027 USB0 port 0 read_resources bus 0 link: 0 done
1100 13:51:47.509587 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 13:51:47.516472 PCI: 00:14.3 read_resources bus 0 link: 0
1102 13:51:47.519932 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 13:51:47.526819 PCI: 00:15.0 read_resources bus 0 link: 0
1104 13:51:47.529564 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 13:51:47.536418 PCI: 00:15.1 read_resources bus 0 link: 0
1106 13:51:47.539779 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 13:51:47.547076 PCI: 00:19.1 read_resources bus 0 link: 0
1108 13:51:47.550436 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 13:51:47.556439 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 13:51:47.559880 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 13:51:47.566655 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 13:51:47.570243 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 13:51:47.576584 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 13:51:47.580238 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 13:51:47.586742 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 13:51:47.589998 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 13:51:47.593289 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 13:51:47.599752 GENERIC: 0.0 read_resources bus 0 link: 0
1119 13:51:47.603088 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 13:51:47.610020 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 13:51:47.616247 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 13:51:47.619530 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 13:51:47.626274 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 13:51:47.629892 Root Device read_resources bus 0 link: 0 done
1125 13:51:47.633354 Done reading resources.
1126 13:51:47.636126 Show resources in subtree (Root Device)...After reading.
1127 13:51:47.643067 Root Device child on link 0 DOMAIN: 0000
1128 13:51:47.646526 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 13:51:47.656023 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 13:51:47.666324 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 13:51:47.666743 PCI: 00:00.0
1132 13:51:47.676082 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 13:51:47.685931 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 13:51:47.696056 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 13:51:47.705602 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 13:51:47.715407 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 13:51:47.722278 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 13:51:47.732307 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 13:51:47.741940 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 13:51:47.752139 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 13:51:47.762243 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 13:51:47.768453 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 13:51:47.778932 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 13:51:47.788931 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 13:51:47.798780 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 13:51:47.808760 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 13:51:47.818373 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 13:51:47.828556 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 13:51:47.835245 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 13:51:47.844865 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 13:51:47.855299 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 13:51:47.858597 PCI: 00:02.0
1153 13:51:47.868223 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 13:51:47.878675 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 13:51:47.884833 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 13:51:47.891770 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 13:51:47.902076 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 13:51:47.902694 GENERIC: 0.0
1159 13:51:47.905213 PCI: 00:05.0
1160 13:51:47.914919 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 13:51:47.918076 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 13:51:47.921865 GENERIC: 0.0
1163 13:51:47.922301 PCI: 00:08.0
1164 13:51:47.931595 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 13:51:47.935168 PCI: 00:0a.0
1166 13:51:47.938362 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 13:51:47.948656 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 13:51:47.951301 USB0 port 0 child on link 0 USB3 port 0
1169 13:51:47.954757 USB3 port 0
1170 13:51:47.955191 USB3 port 1
1171 13:51:47.958190 USB3 port 2
1172 13:51:47.961608 USB3 port 3
1173 13:51:47.964794 PCI: 00:14.0 child on link 0 USB0 port 0
1174 13:51:47.974796 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 13:51:47.978236 USB0 port 0 child on link 0 USB2 port 0
1176 13:51:47.981673 USB2 port 0
1177 13:51:47.982048 USB2 port 1
1178 13:51:47.984616 USB2 port 2
1179 13:51:47.985044 USB2 port 3
1180 13:51:47.988084 USB2 port 4
1181 13:51:47.988543 USB2 port 5
1182 13:51:47.991693 USB2 port 6
1183 13:51:47.992119 USB2 port 7
1184 13:51:47.994365 USB2 port 8
1185 13:51:47.997771 USB2 port 9
1186 13:51:47.998265 USB3 port 0
1187 13:51:48.001156 USB3 port 1
1188 13:51:48.001578 USB3 port 2
1189 13:51:48.004442 USB3 port 3
1190 13:51:48.004867 PCI: 00:14.2
1191 13:51:48.015111 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 13:51:48.024209 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 13:51:48.031284 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 13:51:48.041297 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 13:51:48.041882 GENERIC: 0.0
1196 13:51:48.044588 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 13:51:48.054225 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 13:51:48.057833 I2C: 00:1a
1199 13:51:48.058288 I2C: 00:31
1200 13:51:48.061248 I2C: 00:32
1201 13:51:48.064531 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 13:51:48.074702 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 13:51:48.077555 I2C: 00:10
1204 13:51:48.078050 PCI: 00:15.2
1205 13:51:48.087791 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 13:51:48.091231 PCI: 00:15.3
1207 13:51:48.100803 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 13:51:48.101316 PCI: 00:16.0
1209 13:51:48.111090 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 13:51:48.114325 PCI: 00:19.0
1211 13:51:48.117611 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 13:51:48.127405 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 13:51:48.127525 I2C: 00:15
1214 13:51:48.133496 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 13:51:48.140687 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 13:51:48.150290 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 13:51:48.160370 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 13:51:48.160561 GENERIC: 0.0
1219 13:51:48.164057 PCI: 01:00.0
1220 13:51:48.173754 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 13:51:48.183997 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1222 13:51:48.187371 PCI: 00:1e.0
1223 13:51:48.197282 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 13:51:48.200766 PCI: 00:1e.2 child on link 0 SPI: 00
1225 13:51:48.210473 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 13:51:48.210908 SPI: 00
1227 13:51:48.217281 PCI: 00:1e.3 child on link 0 SPI: 00
1228 13:51:48.227179 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 13:51:48.227670 SPI: 00
1230 13:51:48.230607 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 13:51:48.240202 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 13:51:48.240759 PNP: 0c09.0
1233 13:51:48.250278 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 13:51:48.253552 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 13:51:48.263190 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 13:51:48.273735 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 13:51:48.277169 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 13:51:48.280015 GENERIC: 0.0
1239 13:51:48.283215 GENERIC: 1.0
1240 13:51:48.283781 PCI: 00:1f.3
1241 13:51:48.293312 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 13:51:48.303620 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 13:51:48.306358 PCI: 00:1f.5
1244 13:51:48.313238 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 13:51:48.319608 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 13:51:48.320034 APIC: 00
1247 13:51:48.320374 APIC: 01
1248 13:51:48.323300 APIC: 05
1249 13:51:48.323723 APIC: 03
1250 13:51:48.326670 APIC: 07
1251 13:51:48.327131 APIC: 06
1252 13:51:48.327474 APIC: 04
1253 13:51:48.330157 APIC: 02
1254 13:51:48.336531 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 13:51:48.343108 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 13:51:48.349924 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 13:51:48.372879 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 13:51:48.373399 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 13:51:48.373836 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1260 13:51:48.374298 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1261 13:51:48.376087 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1262 13:51:48.385892 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1263 13:51:48.392660 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1264 13:51:48.398837 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1265 13:51:48.405817 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 13:51:48.412691 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1267 13:51:48.422526 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1268 13:51:48.425321 DOMAIN: 0000: Resource ranges:
1269 13:51:48.428736 * Base: 1000, Size: 800, Tag: 100
1270 13:51:48.432214 * Base: 1900, Size: e700, Tag: 100
1271 13:51:48.435663 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1272 13:51:48.442108 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1273 13:51:48.448873 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1274 13:51:48.458739 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1275 13:51:48.466008 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1276 13:51:48.472468 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1277 13:51:48.482067 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1278 13:51:48.489150 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1279 13:51:48.495748 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1280 13:51:48.505253 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1281 13:51:48.512015 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1282 13:51:48.518653 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1283 13:51:48.528495 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1284 13:51:48.535539 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1285 13:51:48.541805 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1286 13:51:48.551603 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1287 13:51:48.558293 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 13:51:48.565553 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 13:51:48.575285 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 13:51:48.581811 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1291 13:51:48.588202 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 13:51:48.598410 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 13:51:48.604870 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1294 13:51:48.611575 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1295 13:51:48.621301 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1296 13:51:48.624943 DOMAIN: 0000: Resource ranges:
1297 13:51:48.628411 * Base: 7fc00000, Size: 40400000, Tag: 200
1298 13:51:48.631085 * Base: d0000000, Size: 28000000, Tag: 200
1299 13:51:48.638016 * Base: fa000000, Size: 1000000, Tag: 200
1300 13:51:48.641557 * Base: fb001000, Size: 2fff000, Tag: 200
1301 13:51:48.645123 * Base: fe010000, Size: 2e000, Tag: 200
1302 13:51:48.647860 * Base: fe03f000, Size: d41000, Tag: 200
1303 13:51:48.654559 * Base: fed88000, Size: 8000, Tag: 200
1304 13:51:48.657855 * Base: fed93000, Size: d000, Tag: 200
1305 13:51:48.661189 * Base: feda2000, Size: 1e000, Tag: 200
1306 13:51:48.664462 * Base: fede0000, Size: 1220000, Tag: 200
1307 13:51:48.671440 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1308 13:51:48.677523 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1309 13:51:48.684781 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1310 13:51:48.691271 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1311 13:51:48.697679 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1312 13:51:48.704739 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1313 13:51:48.710728 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1314 13:51:48.717649 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1315 13:51:48.724460 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1316 13:51:48.730677 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1317 13:51:48.737660 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1318 13:51:48.744520 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1319 13:51:48.750768 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1320 13:51:48.757440 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1321 13:51:48.763779 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1322 13:51:48.770370 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1323 13:51:48.777357 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1324 13:51:48.783919 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1325 13:51:48.790375 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1326 13:51:48.796979 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1327 13:51:48.804086 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1328 13:51:48.810350 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1329 13:51:48.817105 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1330 13:51:48.823886 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1331 13:51:48.833414 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1332 13:51:48.833954 PCI: 00:1d.0: Resource ranges:
1333 13:51:48.840344 * Base: 7fc00000, Size: 100000, Tag: 200
1334 13:51:48.846648 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1335 13:51:48.853634 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1336 13:51:48.859693 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1337 13:51:48.866721 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1338 13:51:48.873533 Root Device assign_resources, bus 0 link: 0
1339 13:51:48.876958 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 13:51:48.886356 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1341 13:51:48.892801 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1342 13:51:48.903269 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1343 13:51:48.909818 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1344 13:51:48.912944 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 13:51:48.919635 PCI: 00:04.0 assign_resources, bus 1 link: 0
1346 13:51:48.926290 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1347 13:51:48.936275 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1348 13:51:48.942590 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1349 13:51:48.949410 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 13:51:48.952868 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1351 13:51:48.963045 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1352 13:51:48.966024 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 13:51:48.969585 PCI: 00:14.0 assign_resources, bus 0 link: 0
1354 13:51:48.979725 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1355 13:51:48.985790 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1356 13:51:48.995972 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1357 13:51:48.999034 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 13:51:49.005690 PCI: 00:14.3 assign_resources, bus 0 link: 0
1359 13:51:49.012328 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1360 13:51:49.015517 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 13:51:49.022581 PCI: 00:15.0 assign_resources, bus 0 link: 0
1362 13:51:49.028831 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1363 13:51:49.035405 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 13:51:49.038828 PCI: 00:15.1 assign_resources, bus 0 link: 0
1365 13:51:49.049023 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1366 13:51:49.055796 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1367 13:51:49.065383 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1368 13:51:49.072200 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1369 13:51:49.074971 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 13:51:49.081663 PCI: 00:19.1 assign_resources, bus 0 link: 0
1371 13:51:49.088467 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1372 13:51:49.098951 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1373 13:51:49.108769 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1374 13:51:49.111337 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 13:51:49.121965 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1376 13:51:49.128536 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1377 13:51:49.134901 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 13:51:49.141344 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 13:51:49.148253 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 13:51:49.151605 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 13:51:49.161514 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 13:51:49.164876 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 13:51:49.168212 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 13:51:49.175034 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 13:51:49.177735 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 13:51:49.184706 LPC: Trying to open IO window from 800 size 1ff
1387 13:51:49.191177 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 13:51:49.200833 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 13:51:49.207577 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 13:51:49.214264 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 13:51:49.217507 Root Device assign_resources, bus 0 link: 0
1392 13:51:49.221186 Done setting resources.
1393 13:51:49.227671 Show resources in subtree (Root Device)...After assigning values.
1394 13:51:49.230887 Root Device child on link 0 DOMAIN: 0000
1395 13:51:49.234309 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 13:51:49.244016 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 13:51:49.253845 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 13:51:49.257396 PCI: 00:00.0
1399 13:51:49.264244 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 13:51:49.273818 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 13:51:49.284278 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 13:51:49.293819 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 13:51:49.303788 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 13:51:49.313524 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1405 13:51:49.320227 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1406 13:51:49.330054 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1407 13:51:49.339935 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1408 13:51:49.350408 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1409 13:51:49.359709 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1410 13:51:49.369953 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1411 13:51:49.376026 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1412 13:51:49.386251 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1413 13:51:49.396638 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1414 13:51:49.405931 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1415 13:51:49.416138 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1416 13:51:49.425859 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1417 13:51:49.432732 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1418 13:51:49.442659 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1419 13:51:49.445865 PCI: 00:02.0
1420 13:51:49.456193 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1421 13:51:49.466099 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1422 13:51:49.475624 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1423 13:51:49.479227 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1424 13:51:49.492303 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1425 13:51:49.492510 GENERIC: 0.0
1426 13:51:49.495728 PCI: 00:05.0
1427 13:51:49.506050 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1428 13:51:49.508846 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1429 13:51:49.512208 GENERIC: 0.0
1430 13:51:49.512517 PCI: 00:08.0
1431 13:51:49.522635 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1432 13:51:49.525973 PCI: 00:0a.0
1433 13:51:49.529459 PCI: 00:0d.0 child on link 0 USB0 port 0
1434 13:51:49.539079 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1435 13:51:49.545840 USB0 port 0 child on link 0 USB3 port 0
1436 13:51:49.546590 USB3 port 0
1437 13:51:49.549180 USB3 port 1
1438 13:51:49.549855 USB3 port 2
1439 13:51:49.552241 USB3 port 3
1440 13:51:49.556100 PCI: 00:14.0 child on link 0 USB0 port 0
1441 13:51:49.565512 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1442 13:51:49.572848 USB0 port 0 child on link 0 USB2 port 0
1443 13:51:49.573290 USB2 port 0
1444 13:51:49.576043 USB2 port 1
1445 13:51:49.576511 USB2 port 2
1446 13:51:49.579433 USB2 port 3
1447 13:51:49.580043 USB2 port 4
1448 13:51:49.584336 USB2 port 5
1449 13:51:49.584996 USB2 port 6
1450 13:51:49.586012 USB2 port 7
1451 13:51:49.586583 USB2 port 8
1452 13:51:49.588906 USB2 port 9
1453 13:51:49.589476 USB3 port 0
1454 13:51:49.592190 USB3 port 1
1455 13:51:49.592887 USB3 port 2
1456 13:51:49.595558 USB3 port 3
1457 13:51:49.596172 PCI: 00:14.2
1458 13:51:49.609006 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1459 13:51:49.619219 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1460 13:51:49.622499 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1461 13:51:49.632250 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1462 13:51:49.635686 GENERIC: 0.0
1463 13:51:49.639206 PCI: 00:15.0 child on link 0 I2C: 00:1a
1464 13:51:49.648503 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1465 13:51:49.652090 I2C: 00:1a
1466 13:51:49.652778 I2C: 00:31
1467 13:51:49.653350 I2C: 00:32
1468 13:51:49.658542 PCI: 00:15.1 child on link 0 I2C: 00:10
1469 13:51:49.668632 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1470 13:51:49.669248 I2C: 00:10
1471 13:51:49.671953 PCI: 00:15.2
1472 13:51:49.681814 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1473 13:51:49.685212 PCI: 00:15.3
1474 13:51:49.695451 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1475 13:51:49.696150 PCI: 00:16.0
1476 13:51:49.704896 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1477 13:51:49.708243 PCI: 00:19.0
1478 13:51:49.711646 PCI: 00:19.1 child on link 0 I2C: 00:15
1479 13:51:49.721752 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1480 13:51:49.724613 I2C: 00:15
1481 13:51:49.727994 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1482 13:51:49.737738 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1483 13:51:49.748092 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1484 13:51:49.758190 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1485 13:51:49.761572 GENERIC: 0.0
1486 13:51:49.764815 PCI: 01:00.0
1487 13:51:49.774731 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1488 13:51:49.784656 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1489 13:51:49.784937 PCI: 00:1e.0
1490 13:51:49.797555 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1491 13:51:49.800929 PCI: 00:1e.2 child on link 0 SPI: 00
1492 13:51:49.810973 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1493 13:51:49.811197 SPI: 00
1494 13:51:49.818013 PCI: 00:1e.3 child on link 0 SPI: 00
1495 13:51:49.828120 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1496 13:51:49.828618 SPI: 00
1497 13:51:49.830848 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1498 13:51:49.841031 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1499 13:51:49.841472 PNP: 0c09.0
1500 13:51:49.850844 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1501 13:51:49.854310 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1502 13:51:49.864443 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1503 13:51:49.874422 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1504 13:51:49.877621 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1505 13:51:49.881023 GENERIC: 0.0
1506 13:51:49.884138 GENERIC: 1.0
1507 13:51:49.884786 PCI: 00:1f.3
1508 13:51:49.894470 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1509 13:51:49.903946 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1510 13:51:49.907353 PCI: 00:1f.5
1511 13:51:49.917871 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1512 13:51:49.920544 CPU_CLUSTER: 0 child on link 0 APIC: 00
1513 13:51:49.924033 APIC: 00
1514 13:51:49.924523 APIC: 01
1515 13:51:49.924882 APIC: 05
1516 13:51:49.927273 APIC: 03
1517 13:51:49.927702 APIC: 07
1518 13:51:49.930662 APIC: 06
1519 13:51:49.931097 APIC: 04
1520 13:51:49.931487 APIC: 02
1521 13:51:49.934089 Done allocating resources.
1522 13:51:49.940895 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1523 13:51:49.947108 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1524 13:51:49.950567 Configure GPIOs for I2S audio on UP4.
1525 13:51:49.959336 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1526 13:51:49.960790 Enabling resources...
1527 13:51:49.964066 PCI: 00:00.0 subsystem <- 8086/9a12
1528 13:51:49.967206 PCI: 00:00.0 cmd <- 06
1529 13:51:49.970627 PCI: 00:02.0 subsystem <- 8086/9a40
1530 13:51:49.971379 PCI: 00:02.0 cmd <- 03
1531 13:51:49.977230 PCI: 00:04.0 subsystem <- 8086/9a03
1532 13:51:49.977705 PCI: 00:04.0 cmd <- 02
1533 13:51:49.980493 PCI: 00:05.0 subsystem <- 8086/9a19
1534 13:51:49.984386 PCI: 00:05.0 cmd <- 02
1535 13:51:49.987754 PCI: 00:08.0 subsystem <- 8086/9a11
1536 13:51:49.990542 PCI: 00:08.0 cmd <- 06
1537 13:51:49.994434 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 13:51:49.997698 PCI: 00:0d.0 cmd <- 02
1539 13:51:50.001033 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 13:51:50.004321 PCI: 00:14.0 cmd <- 02
1541 13:51:50.007625 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 13:51:50.010239 PCI: 00:14.2 cmd <- 02
1543 13:51:50.013682 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 13:51:50.017152 PCI: 00:14.3 cmd <- 02
1545 13:51:50.020680 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 13:51:50.021213 PCI: 00:15.0 cmd <- 02
1547 13:51:50.027392 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 13:51:50.027990 PCI: 00:15.1 cmd <- 02
1549 13:51:50.030073 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 13:51:50.034116 PCI: 00:15.2 cmd <- 02
1551 13:51:50.036889 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 13:51:50.040189 PCI: 00:15.3 cmd <- 02
1553 13:51:50.043673 PCI: 00:16.0 subsystem <- 8086/a0e0
1554 13:51:50.047056 PCI: 00:16.0 cmd <- 02
1555 13:51:50.049885 PCI: 00:19.1 subsystem <- 8086/a0c6
1556 13:51:50.053457 PCI: 00:19.1 cmd <- 02
1557 13:51:50.056894 PCI: 00:1d.0 bridge ctrl <- 0013
1558 13:51:50.060292 PCI: 00:1d.0 subsystem <- 8086/a0b0
1559 13:51:50.063079 PCI: 00:1d.0 cmd <- 06
1560 13:51:50.066520 PCI: 00:1e.0 subsystem <- 8086/a0a8
1561 13:51:50.069900 PCI: 00:1e.0 cmd <- 06
1562 13:51:50.073133 PCI: 00:1e.2 subsystem <- 8086/a0aa
1563 13:51:50.073762 PCI: 00:1e.2 cmd <- 06
1564 13:51:50.079892 PCI: 00:1e.3 subsystem <- 8086/a0ab
1565 13:51:50.080636 PCI: 00:1e.3 cmd <- 02
1566 13:51:50.083203 PCI: 00:1f.0 subsystem <- 8086/a087
1567 13:51:50.086415 PCI: 00:1f.0 cmd <- 407
1568 13:51:50.089602 PCI: 00:1f.3 subsystem <- 8086/a0c8
1569 13:51:50.092972 PCI: 00:1f.3 cmd <- 02
1570 13:51:50.096182 PCI: 00:1f.5 subsystem <- 8086/a0a4
1571 13:51:50.099347 PCI: 00:1f.5 cmd <- 406
1572 13:51:50.103818 PCI: 01:00.0 cmd <- 02
1573 13:51:50.108330 done.
1574 13:51:50.111580 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1575 13:51:50.114804 Initializing devices...
1576 13:51:50.118188 Root Device init
1577 13:51:50.121708 Chrome EC: Set SMI mask to 0x0000000000000000
1578 13:51:50.127825 Chrome EC: clear events_b mask to 0x0000000000000000
1579 13:51:50.134712 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1580 13:51:50.138009 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1581 13:51:50.144723 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1582 13:51:50.151506 Chrome EC: Set WAKE mask to 0x0000000000000000
1583 13:51:50.154910 fw_config match found: DB_USB=USB3_ACTIVE
1584 13:51:50.161188 Configure Right Type-C port orientation for retimer
1585 13:51:50.164756 Root Device init finished in 43 msecs
1586 13:51:50.168219 PCI: 00:00.0 init
1587 13:51:50.171672 CPU TDP = 9 Watts
1588 13:51:50.171923 CPU PL1 = 9 Watts
1589 13:51:50.174845 CPU PL2 = 40 Watts
1590 13:51:50.175111 CPU PL4 = 83 Watts
1591 13:51:50.181642 PCI: 00:00.0 init finished in 8 msecs
1592 13:51:50.181905 PCI: 00:02.0 init
1593 13:51:50.185112 GMA: Found VBT in CBFS
1594 13:51:50.187857 GMA: Found valid VBT in CBFS
1595 13:51:50.194905 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1596 13:51:50.201158 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1597 13:51:50.204293 PCI: 00:02.0 init finished in 18 msecs
1598 13:51:50.207581 PCI: 00:05.0 init
1599 13:51:50.210883 PCI: 00:05.0 init finished in 0 msecs
1600 13:51:50.214650 PCI: 00:08.0 init
1601 13:51:50.217845 PCI: 00:08.0 init finished in 0 msecs
1602 13:51:50.221060 PCI: 00:14.0 init
1603 13:51:50.224327 PCI: 00:14.0 init finished in 0 msecs
1604 13:51:50.224457 PCI: 00:14.2 init
1605 13:51:50.231084 PCI: 00:14.2 init finished in 0 msecs
1606 13:51:50.231179 PCI: 00:15.0 init
1607 13:51:50.234464 I2C bus 0 version 0x3230302a
1608 13:51:50.237895 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1609 13:51:50.243984 PCI: 00:15.0 init finished in 6 msecs
1610 13:51:50.244113 PCI: 00:15.1 init
1611 13:51:50.247297 I2C bus 1 version 0x3230302a
1612 13:51:50.250895 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1613 13:51:50.254290 PCI: 00:15.1 init finished in 6 msecs
1614 13:51:50.257556 PCI: 00:15.2 init
1615 13:51:50.260364 I2C bus 2 version 0x3230302a
1616 13:51:50.263842 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1617 13:51:50.267396 PCI: 00:15.2 init finished in 6 msecs
1618 13:51:50.270880 PCI: 00:15.3 init
1619 13:51:50.273570 I2C bus 3 version 0x3230302a
1620 13:51:50.277141 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1621 13:51:50.280326 PCI: 00:15.3 init finished in 6 msecs
1622 13:51:50.283635 PCI: 00:16.0 init
1623 13:51:50.286999 PCI: 00:16.0 init finished in 0 msecs
1624 13:51:50.290524 PCI: 00:19.1 init
1625 13:51:50.290615 I2C bus 5 version 0x3230302a
1626 13:51:50.297320 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1627 13:51:50.300760 PCI: 00:19.1 init finished in 6 msecs
1628 13:51:50.300849 PCI: 00:1d.0 init
1629 13:51:50.303881 Initializing PCH PCIe bridge.
1630 13:51:50.307200 PCI: 00:1d.0 init finished in 3 msecs
1631 13:51:50.310932 PCI: 00:1f.0 init
1632 13:51:50.314787 IOAPIC: Initializing IOAPIC at 0xfec00000
1633 13:51:50.321209 IOAPIC: Bootstrap Processor Local APIC = 0x00
1634 13:51:50.321302 IOAPIC: ID = 0x02
1635 13:51:50.324365 IOAPIC: Dumping registers
1636 13:51:50.327507 reg 0x0000: 0x02000000
1637 13:51:50.331354 reg 0x0001: 0x00770020
1638 13:51:50.331449 reg 0x0002: 0x00000000
1639 13:51:50.337929 PCI: 00:1f.0 init finished in 21 msecs
1640 13:51:50.338020 PCI: 00:1f.2 init
1641 13:51:50.340708 Disabling ACPI via APMC.
1642 13:51:50.345997 APMC done.
1643 13:51:50.349134 PCI: 00:1f.2 init finished in 6 msecs
1644 13:51:50.360056 PCI: 01:00.0 init
1645 13:51:50.363550 PCI: 01:00.0 init finished in 0 msecs
1646 13:51:50.367060 PNP: 0c09.0 init
1647 13:51:50.370578 Google Chrome EC uptime: 8.259 seconds
1648 13:51:50.376688 Google Chrome AP resets since EC boot: 1
1649 13:51:50.380198 Google Chrome most recent AP reset causes:
1650 13:51:50.383600 0.451: 32775 shutdown: entering G3
1651 13:51:50.390176 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1652 13:51:50.393726 PNP: 0c09.0 init finished in 23 msecs
1653 13:51:50.399229 Devices initialized
1654 13:51:50.402591 Show all devs... After init.
1655 13:51:50.405905 Root Device: enabled 1
1656 13:51:50.405995 DOMAIN: 0000: enabled 1
1657 13:51:50.409328 CPU_CLUSTER: 0: enabled 1
1658 13:51:50.412682 PCI: 00:00.0: enabled 1
1659 13:51:50.416011 PCI: 00:02.0: enabled 1
1660 13:51:50.416099 PCI: 00:04.0: enabled 1
1661 13:51:50.418723 PCI: 00:05.0: enabled 1
1662 13:51:50.422497 PCI: 00:06.0: enabled 0
1663 13:51:50.425795 PCI: 00:07.0: enabled 0
1664 13:51:50.425883 PCI: 00:07.1: enabled 0
1665 13:51:50.429047 PCI: 00:07.2: enabled 0
1666 13:51:50.432206 PCI: 00:07.3: enabled 0
1667 13:51:50.435494 PCI: 00:08.0: enabled 1
1668 13:51:50.435596 PCI: 00:09.0: enabled 0
1669 13:51:50.438723 PCI: 00:0a.0: enabled 0
1670 13:51:50.441949 PCI: 00:0d.0: enabled 1
1671 13:51:50.445331 PCI: 00:0d.1: enabled 0
1672 13:51:50.445420 PCI: 00:0d.2: enabled 0
1673 13:51:50.448626 PCI: 00:0d.3: enabled 0
1674 13:51:50.451970 PCI: 00:0e.0: enabled 0
1675 13:51:50.452070 PCI: 00:10.2: enabled 1
1676 13:51:50.455357 PCI: 00:10.6: enabled 0
1677 13:51:50.458868 PCI: 00:10.7: enabled 0
1678 13:51:50.462257 PCI: 00:12.0: enabled 0
1679 13:51:50.462351 PCI: 00:12.6: enabled 0
1680 13:51:50.465710 PCI: 00:13.0: enabled 0
1681 13:51:50.468571 PCI: 00:14.0: enabled 1
1682 13:51:50.471954 PCI: 00:14.1: enabled 0
1683 13:51:50.472120 PCI: 00:14.2: enabled 1
1684 13:51:50.475523 PCI: 00:14.3: enabled 1
1685 13:51:50.478835 PCI: 00:15.0: enabled 1
1686 13:51:50.482212 PCI: 00:15.1: enabled 1
1687 13:51:50.482306 PCI: 00:15.2: enabled 1
1688 13:51:50.485661 PCI: 00:15.3: enabled 1
1689 13:51:50.488989 PCI: 00:16.0: enabled 1
1690 13:51:50.489083 PCI: 00:16.1: enabled 0
1691 13:51:50.492277 PCI: 00:16.2: enabled 0
1692 13:51:50.495478 PCI: 00:16.3: enabled 0
1693 13:51:50.498960 PCI: 00:16.4: enabled 0
1694 13:51:50.499055 PCI: 00:16.5: enabled 0
1695 13:51:50.501743 PCI: 00:17.0: enabled 0
1696 13:51:50.505138 PCI: 00:19.0: enabled 0
1697 13:51:50.508531 PCI: 00:19.1: enabled 1
1698 13:51:50.508625 PCI: 00:19.2: enabled 0
1699 13:51:50.511795 PCI: 00:1c.0: enabled 1
1700 13:51:50.515321 PCI: 00:1c.1: enabled 0
1701 13:51:50.518749 PCI: 00:1c.2: enabled 0
1702 13:51:50.518851 PCI: 00:1c.3: enabled 0
1703 13:51:50.522185 PCI: 00:1c.4: enabled 0
1704 13:51:50.525399 PCI: 00:1c.5: enabled 0
1705 13:51:50.528676 PCI: 00:1c.6: enabled 1
1706 13:51:50.528776 PCI: 00:1c.7: enabled 0
1707 13:51:50.531794 PCI: 00:1d.0: enabled 1
1708 13:51:50.535145 PCI: 00:1d.1: enabled 0
1709 13:51:50.535232 PCI: 00:1d.2: enabled 1
1710 13:51:50.538613 PCI: 00:1d.3: enabled 0
1711 13:51:50.541871 PCI: 00:1e.0: enabled 1
1712 13:51:50.545288 PCI: 00:1e.1: enabled 0
1713 13:51:50.545382 PCI: 00:1e.2: enabled 1
1714 13:51:50.548359 PCI: 00:1e.3: enabled 1
1715 13:51:50.551561 PCI: 00:1f.0: enabled 1
1716 13:51:50.555317 PCI: 00:1f.1: enabled 0
1717 13:51:50.555440 PCI: 00:1f.2: enabled 1
1718 13:51:50.558702 PCI: 00:1f.3: enabled 1
1719 13:51:50.561930 PCI: 00:1f.4: enabled 0
1720 13:51:50.565362 PCI: 00:1f.5: enabled 1
1721 13:51:50.565463 PCI: 00:1f.6: enabled 0
1722 13:51:50.568193 PCI: 00:1f.7: enabled 0
1723 13:51:50.571677 APIC: 00: enabled 1
1724 13:51:50.571783 GENERIC: 0.0: enabled 1
1725 13:51:50.575119 GENERIC: 0.0: enabled 1
1726 13:51:50.578571 GENERIC: 1.0: enabled 1
1727 13:51:50.581974 GENERIC: 0.0: enabled 1
1728 13:51:50.582063 GENERIC: 1.0: enabled 1
1729 13:51:50.585256 USB0 port 0: enabled 1
1730 13:51:50.588699 GENERIC: 0.0: enabled 1
1731 13:51:50.588786 USB0 port 0: enabled 1
1732 13:51:50.591344 GENERIC: 0.0: enabled 1
1733 13:51:50.594804 I2C: 00:1a: enabled 1
1734 13:51:50.598106 I2C: 00:31: enabled 1
1735 13:51:50.598200 I2C: 00:32: enabled 1
1736 13:51:50.601548 I2C: 00:10: enabled 1
1737 13:51:50.605021 I2C: 00:15: enabled 1
1738 13:51:50.605117 GENERIC: 0.0: enabled 0
1739 13:51:50.608529 GENERIC: 1.0: enabled 0
1740 13:51:50.611296 GENERIC: 0.0: enabled 1
1741 13:51:50.611421 SPI: 00: enabled 1
1742 13:51:50.614588 SPI: 00: enabled 1
1743 13:51:50.617982 PNP: 0c09.0: enabled 1
1744 13:51:50.618073 GENERIC: 0.0: enabled 1
1745 13:51:50.621158 USB3 port 0: enabled 1
1746 13:51:50.624609 USB3 port 1: enabled 1
1747 13:51:50.627989 USB3 port 2: enabled 0
1748 13:51:50.628129 USB3 port 3: enabled 0
1749 13:51:50.631313 USB2 port 0: enabled 0
1750 13:51:50.634536 USB2 port 1: enabled 1
1751 13:51:50.634677 USB2 port 2: enabled 1
1752 13:51:50.638374 USB2 port 3: enabled 0
1753 13:51:50.641118 USB2 port 4: enabled 1
1754 13:51:50.641218 USB2 port 5: enabled 0
1755 13:51:50.644784 USB2 port 6: enabled 0
1756 13:51:50.648092 USB2 port 7: enabled 0
1757 13:51:50.651419 USB2 port 8: enabled 0
1758 13:51:50.651547 USB2 port 9: enabled 0
1759 13:51:50.654812 USB3 port 0: enabled 0
1760 13:51:50.658090 USB3 port 1: enabled 1
1761 13:51:50.658187 USB3 port 2: enabled 0
1762 13:51:50.661340 USB3 port 3: enabled 0
1763 13:51:50.664522 GENERIC: 0.0: enabled 1
1764 13:51:50.667896 GENERIC: 1.0: enabled 1
1765 13:51:50.667990 APIC: 01: enabled 1
1766 13:51:50.671359 APIC: 05: enabled 1
1767 13:51:50.671497 APIC: 03: enabled 1
1768 13:51:50.674668 APIC: 07: enabled 1
1769 13:51:50.678280 APIC: 06: enabled 1
1770 13:51:50.678379 APIC: 04: enabled 1
1771 13:51:50.680944 APIC: 02: enabled 1
1772 13:51:50.684532 PCI: 01:00.0: enabled 1
1773 13:51:50.687946 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1774 13:51:50.694899 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1775 13:51:50.697590 ELOG: NV offset 0xf30000 size 0x1000
1776 13:51:50.704760 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1777 13:51:50.710747 ELOG: Event(17) added with size 13 at 2023-04-20 13:51:50 UTC
1778 13:51:50.717346 ELOG: Event(92) added with size 9 at 2023-04-20 13:51:50 UTC
1779 13:51:50.723970 ELOG: Event(93) added with size 9 at 2023-04-20 13:51:50 UTC
1780 13:51:50.730591 ELOG: Event(9E) added with size 10 at 2023-04-20 13:51:50 UTC
1781 13:51:50.737219 ELOG: Event(9F) added with size 14 at 2023-04-20 13:51:50 UTC
1782 13:51:50.743979 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1783 13:51:50.747287 ELOG: Event(A1) added with size 10 at 2023-04-20 13:51:50 UTC
1784 13:51:50.757042 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1785 13:51:50.763778 ELOG: Event(A0) added with size 9 at 2023-04-20 13:51:50 UTC
1786 13:51:50.767080 elog_add_boot_reason: Logged dev mode boot
1787 13:51:50.773707 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1788 13:51:50.773837 Finalize devices...
1789 13:51:50.777311 Devices finalized
1790 13:51:50.783535 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1791 13:51:50.786959 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1792 13:51:50.793866 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1793 13:51:50.797339 ME: HFSTS1 : 0x80030055
1794 13:51:50.803543 ME: HFSTS2 : 0x30280116
1795 13:51:50.806812 ME: HFSTS3 : 0x00000050
1796 13:51:50.810235 ME: HFSTS4 : 0x00004000
1797 13:51:50.817074 ME: HFSTS5 : 0x00000000
1798 13:51:50.820512 ME: HFSTS6 : 0x40400006
1799 13:51:50.823789 ME: Manufacturing Mode : YES
1800 13:51:50.827202 ME: SPI Protection Mode Enabled : NO
1801 13:51:50.830351 ME: FW Partition Table : OK
1802 13:51:50.836987 ME: Bringup Loader Failure : NO
1803 13:51:50.840288 ME: Firmware Init Complete : NO
1804 13:51:50.843634 ME: Boot Options Present : NO
1805 13:51:50.846928 ME: Update In Progress : NO
1806 13:51:50.850208 ME: D0i3 Support : YES
1807 13:51:50.853493 ME: Low Power State Enabled : NO
1808 13:51:50.856778 ME: CPU Replaced : YES
1809 13:51:50.859778 ME: CPU Replacement Valid : YES
1810 13:51:50.866949 ME: Current Working State : 5
1811 13:51:50.870263 ME: Current Operation State : 1
1812 13:51:50.873017 ME: Current Operation Mode : 3
1813 13:51:50.877037 ME: Error Code : 0
1814 13:51:50.879632 ME: Enhanced Debug Mode : NO
1815 13:51:50.883110 ME: CPU Debug Disabled : YES
1816 13:51:50.886507 ME: TXT Support : NO
1817 13:51:50.893200 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1818 13:51:50.899985 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1819 13:51:50.902830 CBFS: 'fallback/slic' not found.
1820 13:51:50.909543 ACPI: Writing ACPI tables at 76b01000.
1821 13:51:50.909633 ACPI: * FACS
1822 13:51:50.913011 ACPI: * DSDT
1823 13:51:50.916374 Ramoops buffer: 0x100000@0x76a00000.
1824 13:51:50.919731 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1825 13:51:50.926534 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1826 13:51:50.929262 Google Chrome EC: version:
1827 13:51:50.932486 ro: voema_v2.0.10114-a447f03e46
1828 13:51:50.935945 rw: voema_v2.0.10114-a447f03e46
1829 13:51:50.936033 running image: 2
1830 13:51:50.942800 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1831 13:51:50.946830 ACPI: * FADT
1832 13:51:50.946924 SCI is IRQ9
1833 13:51:50.953684 ACPI: added table 1/32, length now 40
1834 13:51:50.953779 ACPI: * SSDT
1835 13:51:50.957342 Found 1 CPU(s) with 8 core(s) each.
1836 13:51:50.963289 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1837 13:51:50.967241 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1838 13:51:50.970275 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1839 13:51:50.973580 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1840 13:51:50.979927 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1841 13:51:50.986456 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1842 13:51:50.989830 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1843 13:51:50.996715 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1844 13:51:51.003503 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1845 13:51:51.006948 \_SB.PCI0.RP09: Added StorageD3Enable property
1846 13:51:51.013067 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1847 13:51:51.016471 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1848 13:51:51.023297 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1849 13:51:51.026679 PS2K: Passing 80 keymaps to kernel
1850 13:51:51.032742 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1851 13:51:51.039513 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1852 13:51:51.046371 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1853 13:51:51.053144 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1854 13:51:51.059863 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1855 13:51:51.066487 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1856 13:51:51.072972 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1857 13:51:51.126163 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1858 13:51:51.126366 ACPI: added table 2/32, length now 44
1859 13:51:51.126522 ACPI: * MCFG
1860 13:51:51.126617 ACPI: added table 3/32, length now 48
1861 13:51:51.126743 ACPI: * TPM2
1862 13:51:51.126873 TPM2 log created at 0x769f0000
1863 13:51:51.126996 ACPI: added table 4/32, length now 52
1864 13:51:51.127105 ACPI: * MADT
1865 13:51:51.127209 SCI is IRQ9
1866 13:51:51.127310 ACPI: added table 5/32, length now 56
1867 13:51:51.127410 current = 76b09850
1868 13:51:51.127507 ACPI: * DMAR
1869 13:51:51.127603 ACPI: added table 6/32, length now 60
1870 13:51:51.127708 ACPI: added table 7/32, length now 64
1871 13:51:51.127997 ACPI: * HPET
1872 13:51:51.128101 ACPI: added table 8/32, length now 68
1873 13:51:51.128199 ACPI: done.
1874 13:51:51.128297 ACPI tables: 35216 bytes.
1875 13:51:51.128404 smbios_write_tables: 769ef000
1876 13:51:51.129130 EC returned error result code 3
1877 13:51:51.132635 Couldn't obtain OEM name from CBI
1878 13:51:51.136720 Create SMBIOS type 16
1879 13:51:51.140050 Create SMBIOS type 17
1880 13:51:51.142786 GENERIC: 0.0 (WIFI Device)
1881 13:51:51.146142 SMBIOS tables: 1734 bytes.
1882 13:51:51.149515 Writing table forward entry at 0x00000500
1883 13:51:51.156596 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1884 13:51:51.159312 Writing coreboot table at 0x76b25000
1885 13:51:51.166277 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1886 13:51:51.169648 1. 0000000000001000-000000000009ffff: RAM
1887 13:51:51.172837 2. 00000000000a0000-00000000000fffff: RESERVED
1888 13:51:51.179501 3. 0000000000100000-00000000769eefff: RAM
1889 13:51:51.182773 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1890 13:51:51.189454 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1891 13:51:51.195943 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1892 13:51:51.199302 7. 0000000077000000-000000007fbfffff: RESERVED
1893 13:51:51.206181 8. 00000000c0000000-00000000cfffffff: RESERVED
1894 13:51:51.209617 9. 00000000f8000000-00000000f9ffffff: RESERVED
1895 13:51:51.212360 10. 00000000fb000000-00000000fb000fff: RESERVED
1896 13:51:51.219126 11. 00000000fe000000-00000000fe00ffff: RESERVED
1897 13:51:51.222465 12. 00000000fed80000-00000000fed87fff: RESERVED
1898 13:51:51.229263 13. 00000000fed90000-00000000fed92fff: RESERVED
1899 13:51:51.232543 14. 00000000feda0000-00000000feda1fff: RESERVED
1900 13:51:51.238778 15. 00000000fedc0000-00000000feddffff: RESERVED
1901 13:51:51.242078 16. 0000000100000000-00000004803fffff: RAM
1902 13:51:51.245502 Passing 4 GPIOs to payload:
1903 13:51:51.249277 NAME | PORT | POLARITY | VALUE
1904 13:51:51.255547 lid | undefined | high | high
1905 13:51:51.262377 power | undefined | high | low
1906 13:51:51.265784 oprom | undefined | high | low
1907 13:51:51.272584 EC in RW | 0x000000e5 | high | high
1908 13:51:51.279092 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1909 13:51:51.279185 coreboot table: 1576 bytes.
1910 13:51:51.285585 IMD ROOT 0. 0x76fff000 0x00001000
1911 13:51:51.288757 IMD SMALL 1. 0x76ffe000 0x00001000
1912 13:51:51.292127 FSP MEMORY 2. 0x76c4e000 0x003b0000
1913 13:51:51.295518 VPD 3. 0x76c4d000 0x00000367
1914 13:51:51.298620 RO MCACHE 4. 0x76c4c000 0x00000fdc
1915 13:51:51.302462 CONSOLE 5. 0x76c2c000 0x00020000
1916 13:51:51.305796 FMAP 6. 0x76c2b000 0x00000578
1917 13:51:51.309092 TIME STAMP 7. 0x76c2a000 0x00000910
1918 13:51:51.368414 VBOOT WORK 8. 0x76c16000 0x00014000
1919 13:51:51.368593 ROMSTG STCK 9. 0x76c15000 0x00001000
1920 13:51:51.368732 AFTER CAR 10. 0x76c0a000 0x0000b000
1921 13:51:51.368857 RAMSTAGE 11. 0x76b97000 0x00073000
1922 13:51:51.368983 REFCODE 12. 0x76b42000 0x00055000
1923 13:51:51.369084 SMM BACKUP 13. 0x76b32000 0x00010000
1924 13:51:51.369181 4f444749 14. 0x76b30000 0x00002000
1925 13:51:51.369279 EXT VBT15. 0x76b2d000 0x0000219f
1926 13:51:51.369373 COREBOOT 16. 0x76b25000 0x00008000
1927 13:51:51.369467 ACPI 17. 0x76b01000 0x00024000
1928 13:51:51.369560 ACPI GNVS 18. 0x76b00000 0x00001000
1929 13:51:51.369652 RAMOOPS 19. 0x76a00000 0x00100000
1930 13:51:51.369744 TPM2 TCGLOG20. 0x769f0000 0x00010000
1931 13:51:51.369837 SMBIOS 21. 0x769ef000 0x00000800
1932 13:51:51.369928 IMD small region:
1933 13:51:51.370212 IMD ROOT 0. 0x76ffec00 0x00000400
1934 13:51:51.372034 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1935 13:51:51.375448 POWER STATE 2. 0x76ffeb80 0x00000044
1936 13:51:51.378834 ROMSTAGE 3. 0x76ffeb60 0x00000004
1937 13:51:51.382237 MEM INFO 4. 0x76ffe980 0x000001e0
1938 13:51:51.388810 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1939 13:51:51.392095 MTRR: Physical address space:
1940 13:51:51.398705 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1941 13:51:51.405350 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1942 13:51:51.411957 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1943 13:51:51.418632 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1944 13:51:51.424852 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1945 13:51:51.428216 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1946 13:51:51.434790 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1947 13:51:51.441765 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 13:51:51.445373 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 13:51:51.448176 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 13:51:51.451572 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 13:51:51.458167 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 13:51:51.461575 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 13:51:51.464966 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 13:51:51.468299 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 13:51:51.471794 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 13:51:51.477937 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 13:51:51.481317 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 13:51:51.485250 call enable_fixed_mtrr()
1959 13:51:51.488747 CPU physical address size: 39 bits
1960 13:51:51.495571 MTRR: default type WB/UC MTRR counts: 6/7.
1961 13:51:51.498839 MTRR: WB selected as default type.
1962 13:51:51.505427 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1963 13:51:51.508800 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1964 13:51:51.515370 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1965 13:51:51.522052 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1966 13:51:51.528310 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1967 13:51:51.534990 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1968 13:51:51.538867
1969 13:51:51.539033 MTRR check
1970 13:51:51.542291 Fixed MTRRs : Enabled
1971 13:51:51.542461 Variable MTRRs: Enabled
1972 13:51:51.542604
1973 13:51:51.549020 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 13:51:51.552306 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 13:51:51.555733 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 13:51:51.558983 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 13:51:51.565733 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 13:51:51.569130 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 13:51:51.572583 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 13:51:51.576020 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 13:51:51.582077 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 13:51:51.585649 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 13:51:51.588950 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 13:51:51.596327 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1985 13:51:51.599666 call enable_fixed_mtrr()
1986 13:51:51.603606 Checking cr50 for pending updates
1987 13:51:51.607488 CPU physical address size: 39 bits
1988 13:51:51.610840 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 13:51:51.614113 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 13:51:51.617530 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 13:51:51.623975 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 13:51:51.627386 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 13:51:51.630852 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 13:51:51.633618 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 13:51:51.640925 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 13:51:51.644260 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 13:51:51.646899 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 13:51:51.650321 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 13:51:51.657183 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 13:51:51.660632 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 13:51:51.667263 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 13:51:51.670628 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 13:51:51.674040 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 13:51:51.676923 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 13:51:51.683732 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 13:51:51.687108 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 13:51:51.690423 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 13:51:51.693828 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 13:51:51.696706 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 13:51:51.703570 call enable_fixed_mtrr()
2011 13:51:51.706859 call enable_fixed_mtrr()
2012 13:51:51.710261 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 13:51:51.713355 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 13:51:51.716674 CPU physical address size: 39 bits
2015 13:51:51.721203 CPU physical address size: 39 bits
2016 13:51:51.725226 Reading cr50 TPM mode
2017 13:51:51.729172 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 13:51:51.732361 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 13:51:51.739213 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 13:51:51.742506 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 13:51:51.745841 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 13:51:51.749136 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 13:51:51.755725 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 13:51:51.759107 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 13:51:51.761925 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 13:51:51.765336 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 13:51:51.768749 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 13:51:51.775454 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 13:51:51.782213 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 13:51:51.785595 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 13:51:51.788254 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 13:51:51.791604 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 13:51:51.798256 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 13:51:51.801735 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 13:51:51.805119 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 13:51:51.808524 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 13:51:51.815343 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 13:51:51.817939 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 13:51:51.821894 call enable_fixed_mtrr()
2040 13:51:51.825002 call enable_fixed_mtrr()
2041 13:51:51.828361 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 13:51:51.831665 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 13:51:51.838190 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 13:51:51.841966 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 13:51:51.844654 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 13:51:51.848086 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 13:51:51.855082 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 13:51:51.858545 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 13:51:51.861287 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 13:51:51.864623 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 13:51:51.871468 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 13:51:51.874874 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 13:51:51.878241 call enable_fixed_mtrr()
2054 13:51:51.880981 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 13:51:51.887843 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 13:51:51.891243 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 13:51:51.894610 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 13:51:51.897990 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 13:51:51.904241 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 13:51:51.907790 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 13:51:51.911195 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 13:51:51.915290 CPU physical address size: 39 bits
2063 13:51:51.922231 call enable_fixed_mtrr()
2064 13:51:51.925646 CPU physical address size: 39 bits
2065 13:51:51.929650 CPU physical address size: 39 bits
2066 13:51:51.936165 CPU physical address size: 39 bits
2067 13:51:51.939242 BS: BS_PAYLOAD_LOAD entry times (exec / console): 127 / 6 ms
2068 13:51:51.949548 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2069 13:51:51.952779 Checking segment from ROM address 0xffc02b38
2070 13:51:51.955913 Checking segment from ROM address 0xffc02b54
2071 13:51:51.962535 Loading segment from ROM address 0xffc02b38
2072 13:51:51.962638 code (compression=0)
2073 13:51:51.972567 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2074 13:51:51.982113 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2075 13:51:51.982211 it's not compressed!
2076 13:51:52.132851 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2077 13:51:52.139041 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2078 13:51:52.146237 Loading segment from ROM address 0xffc02b54
2079 13:51:52.149598 Entry Point 0x30000000
2080 13:51:52.149692 Loaded segments
2081 13:51:52.156179 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2082 13:51:52.202090 Finalizing chipset.
2083 13:51:52.205400 Finalizing SMM.
2084 13:51:52.205499 APMC done.
2085 13:51:52.212158 BS: BS_PAYLOAD_LOAD exit times (exec / console): 45 / 5 ms
2086 13:51:52.215597 mp_park_aps done after 0 msecs.
2087 13:51:52.218365 Jumping to boot code at 0x30000000(0x76b25000)
2088 13:51:52.228628 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2089 13:51:52.228737
2090 13:51:52.228834
2091 13:51:52.231924
2092 13:51:52.232047 Starting depthcharge on Voema...
2093 13:51:52.232461 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2094 13:51:52.232585 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2095 13:51:52.232690 Setting prompt string to ['volteer:']
2096 13:51:52.232801 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2097 13:51:52.235231
2098 13:51:52.241496 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2099 13:51:52.241592
2100 13:51:52.248129 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2101 13:51:52.248265
2102 13:51:52.254822 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2103 13:51:52.254920
2104 13:51:52.258070 Failed to find eMMC card reader
2105 13:51:52.258166
2106 13:51:52.261402 Wipe memory regions:
2107 13:51:52.261496
2108 13:51:52.264796 [0x00000000001000, 0x000000000a0000)
2109 13:51:52.264890
2110 13:51:52.267949 [0x00000000100000, 0x00000030000000)
2111 13:51:52.307099
2112 13:51:52.310351 [0x00000032662db0, 0x000000769ef000)
2113 13:51:52.363701
2114 13:51:52.367031 [0x00000100000000, 0x00000480400000)
2115 13:51:53.042985
2116 13:51:53.046311 ec_init: CrosEC protocol v3 supported (256, 256)
2117 13:51:53.477796
2118 13:51:53.477981 R8152: Initializing
2119 13:51:53.478089
2120 13:51:53.481211 Version 6 (ocp_data = 5c30)
2121 13:51:53.481322
2122 13:51:53.484568 R8152: Done initializing
2123 13:51:53.484655
2124 13:51:53.487919 Adding net device
2125 13:51:53.789230
2126 13:51:53.792267 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2127 13:51:53.792414
2128 13:51:53.792549
2129 13:51:53.792654
2130 13:51:53.795625 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 13:51:53.896404 volteer: tftpboot 192.168.201.1 10062372/tftp-deploy-5imxjk_j/kernel/bzImage 10062372/tftp-deploy-5imxjk_j/kernel/cmdline 10062372/tftp-deploy-5imxjk_j/ramdisk/ramdisk.cpio.gz
2133 13:51:53.896603 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 13:51:53.896715 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2135 13:51:53.900333 tftpboot 192.168.201.1 10062372/tftp-deploy-5imxjk_j/kernel/bzIploy-5imxjk_j/kernel/cmdline 10062372/tftp-deploy-5imxjk_j/ramdisk/ramdisk.cpio.gz
2136 13:51:53.900453
2137 13:51:53.900528 Waiting for link
2138 13:51:54.103419
2139 13:51:54.103581 done.
2140 13:51:54.103663
2141 13:51:54.103734 MAC: 00:24:32:30:77:d1
2142 13:51:54.103802
2143 13:51:54.107226 Sending DHCP discover... done.
2144 13:51:54.107310
2145 13:51:54.109996 Waiting for reply... done.
2146 13:51:54.110079
2147 13:51:54.113500 Sending DHCP request... done.
2148 13:51:54.113581
2149 13:51:54.136357 Waiting for reply... done.
2150 13:51:54.136490
2151 13:51:54.136567 My ip is 192.168.201.13
2152 13:51:54.136637
2153 13:51:54.139204 The DHCP server ip is 192.168.201.1
2154 13:51:54.142725
2155 13:51:54.146184 TFTP server IP predefined by user: 192.168.201.1
2156 13:51:54.146278
2157 13:51:54.152400 Bootfile predefined by user: 10062372/tftp-deploy-5imxjk_j/kernel/bzImage
2158 13:51:54.152507
2159 13:51:54.155901 Sending tftp read request... done.
2160 13:51:54.155994
2161 13:51:54.159284 Waiting for the transfer...
2162 13:51:54.162744
2163 13:51:54.688658 00000000 ################################################################
2164 13:51:54.688819
2165 13:51:55.214267 00080000 ################################################################
2166 13:51:55.214454
2167 13:51:55.731635 00100000 ################################################################
2168 13:51:55.731820
2169 13:51:56.249210 00180000 ################################################################
2170 13:51:56.249399
2171 13:51:56.766691 00200000 ################################################################
2172 13:51:56.766882
2173 13:51:57.283926 00280000 ################################################################
2174 13:51:57.284094
2175 13:51:57.803721 00300000 ################################################################
2176 13:51:57.803876
2177 13:51:58.321681 00380000 ################################################################
2178 13:51:58.321883
2179 13:51:58.845439 00400000 ################################################################
2180 13:51:58.845630
2181 13:51:59.365230 00480000 ################################################################
2182 13:51:59.365393
2183 13:51:59.884755 00500000 ################################################################
2184 13:51:59.884949
2185 13:52:00.413430 00580000 ################################################################
2186 13:52:00.413657
2187 13:52:00.935848 00600000 ################################################################
2188 13:52:00.936052
2189 13:52:01.461012 00680000 ################################################################
2190 13:52:01.461175
2191 13:52:01.996034 00700000 ################################################################
2192 13:52:01.996197
2193 13:52:02.530293 00780000 ################################################################
2194 13:52:02.530443
2195 13:52:03.114447 00800000 ################################################################
2196 13:52:03.114638
2197 13:52:03.694006 00880000 ################################################################
2198 13:52:03.694190
2199 13:52:04.216405 00900000 ################################################################
2200 13:52:04.216586
2201 13:52:04.795212 00980000 ################################################################
2202 13:52:04.795357
2203 13:52:05.161096 00a00000 ############################################## done.
2204 13:52:05.161254
2205 13:52:05.164555 The bootfile was 10854400 bytes long.
2206 13:52:05.164659
2207 13:52:05.167398 Sending tftp read request... done.
2208 13:52:05.167533
2209 13:52:05.170769 Waiting for the transfer...
2210 13:52:05.170889
2211 13:52:05.693844 00000000 ################################################################
2212 13:52:05.693988
2213 13:52:06.221337 00080000 ################################################################
2214 13:52:06.221515
2215 13:52:06.748347 00100000 ################################################################
2216 13:52:06.748545
2217 13:52:07.280909 00180000 ################################################################
2218 13:52:07.281054
2219 13:52:07.802781 00200000 ################################################################
2220 13:52:07.803011
2221 13:52:08.384401 00280000 ################################################################
2222 13:52:08.384553
2223 13:52:08.915364 00300000 ################################################################
2224 13:52:08.915556
2225 13:52:09.443651 00380000 ################################################################
2226 13:52:09.443803
2227 13:52:10.031455 00400000 ################################################################
2228 13:52:10.031758
2229 13:52:10.569668 00480000 ################################################################
2230 13:52:10.570743
2231 13:52:11.159353 00500000 ################################################################
2232 13:52:11.159908
2233 13:52:11.698044 00580000 ################################################################
2234 13:52:11.698235
2235 13:52:12.234885 00600000 ################################################################
2236 13:52:12.235114
2237 13:52:12.764879 00680000 ################################################################
2238 13:52:12.765071
2239 13:52:13.300353 00700000 ################################################################
2240 13:52:13.300551
2241 13:52:13.831514 00780000 ################################################################
2242 13:52:13.831704
2243 13:52:14.365783 00800000 ################################################################
2244 13:52:14.365947
2245 13:52:14.686604 00880000 ###################################### done.
2246 13:52:14.686820
2247 13:52:14.689983 Sending tftp read request... done.
2248 13:52:14.690104
2249 13:52:14.693341 Waiting for the transfer...
2250 13:52:14.693482
2251 13:52:14.693600 00000000 # done.
2252 13:52:14.693702
2253 13:52:14.702783 Command line loaded dynamically from TFTP file: 10062372/tftp-deploy-5imxjk_j/kernel/cmdline
2254 13:52:14.702891
2255 13:52:14.716403 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2256 13:52:14.720544
2257 13:52:14.724017 Shutting down all USB controllers.
2258 13:52:14.724114
2259 13:52:14.724191 Removing current net device
2260 13:52:14.724263
2261 13:52:14.727516 Finalizing coreboot
2262 13:52:14.727612
2263 13:52:14.733612 Exiting depthcharge with code 4 at timestamp: 31087790
2264 13:52:14.733768
2265 13:52:14.733879
2266 13:52:14.733987 Starting kernel ...
2267 13:52:14.734094
2268 13:52:14.734205
2269 13:52:14.734922 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2270 13:52:14.735082 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2271 13:52:14.735203 Setting prompt string to ['Linux version [0-9]']
2272 13:52:14.735319 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2273 13:52:14.735430 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2275 13:56:36.735408 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2277 13:56:36.735760 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2279 13:56:36.736015 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2282 13:56:36.736460 end: 2 depthcharge-action (duration 00:05:00) [common]
2284 13:56:36.736701 Cleaning after the job
2285 13:56:36.736799 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062372/tftp-deploy-5imxjk_j/ramdisk
2286 13:56:36.738045 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062372/tftp-deploy-5imxjk_j/kernel
2287 13:56:36.739416 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062372/tftp-deploy-5imxjk_j/modules
2288 13:56:36.740011 start: 5.1 power-off (timeout 00:00:30) [common]
2289 13:56:36.740192 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2290 13:56:36.817394 >> Command sent successfully.
2291 13:56:36.819947 Returned 0 in 0 seconds
2292 13:56:36.920537 end: 5.1 power-off (duration 00:00:00) [common]
2294 13:56:36.920976 start: 5.2 read-feedback (timeout 00:10:00) [common]
2295 13:56:36.921335 Listened to connection for namespace 'common' for up to 1s
2296 13:56:37.924456 Finalising connection for namespace 'common'
2297 13:56:37.924643 Disconnecting from shell: Finalise
2298 13:56:37.924735
2299 13:56:38.025439 end: 5.2 read-feedback (duration 00:00:01) [common]
2300 13:56:38.025606 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062372
2301 13:56:38.042078 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062372
2302 13:56:38.042300 JobError: Your job cannot terminate cleanly.