Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 13:51:27.172071 lava-dispatcher, installed at version: 2023.01
2 13:51:27.172316 start: 0 validate
3 13:51:27.172470 Start time: 2023-04-20 13:51:27.172462+00:00 (UTC)
4 13:51:27.172613 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:51:27.172761 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230414.0%2Famd64%2Finitrd.cpio.gz exists
6 13:51:27.464359 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:51:27.464559 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:51:27.753250 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:51:27.753433 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230414.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:51:28.043335 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:51:28.043538 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:51:28.335121 validate duration: 1.16
14 13:51:28.335539 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:51:28.335693 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:51:28.335852 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:51:28.336046 Not decompressing ramdisk as can be used compressed.
18 13:51:28.336198 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230414.0/amd64/initrd.cpio.gz
19 13:51:28.336307 saving as /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/ramdisk/initrd.cpio.gz
20 13:51:28.336437 total size: 5432092 (5MB)
21 13:51:28.337979 progress 0% (0MB)
22 13:51:28.339859 progress 5% (0MB)
23 13:51:28.341548 progress 10% (0MB)
24 13:51:28.343253 progress 15% (0MB)
25 13:51:28.345129 progress 20% (1MB)
26 13:51:28.346706 progress 25% (1MB)
27 13:51:28.348224 progress 30% (1MB)
28 13:51:28.349987 progress 35% (1MB)
29 13:51:28.351528 progress 40% (2MB)
30 13:51:28.353044 progress 45% (2MB)
31 13:51:28.354574 progress 50% (2MB)
32 13:51:28.356280 progress 55% (2MB)
33 13:51:28.357829 progress 60% (3MB)
34 13:51:28.359363 progress 65% (3MB)
35 13:51:28.361059 progress 70% (3MB)
36 13:51:28.362616 progress 75% (3MB)
37 13:51:28.364133 progress 80% (4MB)
38 13:51:28.365674 progress 85% (4MB)
39 13:51:28.367384 progress 90% (4MB)
40 13:51:28.368938 progress 95% (4MB)
41 13:51:28.370493 progress 100% (5MB)
42 13:51:28.370746 5MB downloaded in 0.03s (151.01MB/s)
43 13:51:28.370933 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:51:28.371231 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:51:28.371343 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:51:28.371456 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:51:28.371617 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:51:28.371732 saving as /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/kernel/bzImage
50 13:51:28.371843 total size: 10854400 (10MB)
51 13:51:28.371953 No compression specified
52 13:51:28.373865 progress 0% (0MB)
53 13:51:28.378482 progress 5% (0MB)
54 13:51:28.382294 progress 10% (1MB)
55 13:51:28.385361 progress 15% (1MB)
56 13:51:28.388626 progress 20% (2MB)
57 13:51:28.391651 progress 25% (2MB)
58 13:51:28.395027 progress 30% (3MB)
59 13:51:28.398078 progress 35% (3MB)
60 13:51:28.401249 progress 40% (4MB)
61 13:51:28.404694 progress 45% (4MB)
62 13:51:28.407945 progress 50% (5MB)
63 13:51:28.411306 progress 55% (5MB)
64 13:51:28.414548 progress 60% (6MB)
65 13:51:28.418025 progress 65% (6MB)
66 13:51:28.421040 progress 70% (7MB)
67 13:51:28.424281 progress 75% (7MB)
68 13:51:28.427371 progress 80% (8MB)
69 13:51:28.430612 progress 85% (8MB)
70 13:51:28.433798 progress 90% (9MB)
71 13:51:28.436810 progress 95% (9MB)
72 13:51:28.440120 progress 100% (10MB)
73 13:51:28.440336 10MB downloaded in 0.07s (151.14MB/s)
74 13:51:28.440557 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:51:28.440911 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:51:28.441012 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:51:28.441107 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:51:28.441261 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230414.0/amd64/full.rootfs.tar.xz
80 13:51:28.441369 saving as /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/nfsrootfs/full.rootfs.tar
81 13:51:28.441471 total size: 133384388 (127MB)
82 13:51:28.441572 Using unxz to decompress xz
83 13:51:28.445763 progress 0% (0MB)
84 13:51:28.901826 progress 5% (6MB)
85 13:51:29.308254 progress 10% (12MB)
86 13:51:29.635443 progress 15% (19MB)
87 13:51:29.848808 progress 20% (25MB)
88 13:51:30.140335 progress 25% (31MB)
89 13:51:30.530090 progress 30% (38MB)
90 13:51:30.923416 progress 35% (44MB)
91 13:51:31.379621 progress 40% (50MB)
92 13:51:31.820895 progress 45% (57MB)
93 13:51:32.241544 progress 50% (63MB)
94 13:51:32.661137 progress 55% (69MB)
95 13:51:33.084546 progress 60% (76MB)
96 13:51:33.531867 progress 65% (82MB)
97 13:51:33.992217 progress 70% (89MB)
98 13:51:34.444352 progress 75% (95MB)
99 13:51:34.977116 progress 80% (101MB)
100 13:51:35.497942 progress 85% (108MB)
101 13:51:35.818578 progress 90% (114MB)
102 13:51:36.235589 progress 95% (120MB)
103 13:51:36.701118 progress 100% (127MB)
104 13:51:36.707982 127MB downloaded in 8.27s (15.39MB/s)
105 13:51:36.708347 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:51:36.708650 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:51:36.708753 start: 1.4 download-retry (timeout 00:09:52) [common]
109 13:51:36.708851 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 13:51:36.709018 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:51:36.709102 saving as /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/modules/modules.tar
112 13:51:36.709173 total size: 483736 (0MB)
113 13:51:36.709249 Using unxz to decompress xz
114 13:51:36.712997 progress 6% (0MB)
115 13:51:36.713480 progress 13% (0MB)
116 13:51:36.713773 progress 20% (0MB)
117 13:51:36.715317 progress 27% (0MB)
118 13:51:36.717988 progress 33% (0MB)
119 13:51:36.720382 progress 40% (0MB)
120 13:51:36.722623 progress 47% (0MB)
121 13:51:36.725273 progress 54% (0MB)
122 13:51:36.727623 progress 60% (0MB)
123 13:51:36.729924 progress 67% (0MB)
124 13:51:36.732337 progress 74% (0MB)
125 13:51:36.734651 progress 81% (0MB)
126 13:51:36.736956 progress 88% (0MB)
127 13:51:36.739653 progress 94% (0MB)
128 13:51:36.742375 progress 100% (0MB)
129 13:51:36.750725 0MB downloaded in 0.04s (11.11MB/s)
130 13:51:36.751038 end: 1.4.1 http-download (duration 00:00:00) [common]
132 13:51:36.751341 end: 1.4 download-retry (duration 00:00:00) [common]
133 13:51:36.751445 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 13:51:36.751554 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 13:51:38.450556 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10062394/extract-nfsrootfs-4okmcpn9
136 13:51:38.450786 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 13:51:38.450953 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 13:51:38.451201 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8
139 13:51:38.451409 makedir: /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin
140 13:51:38.451571 makedir: /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/tests
141 13:51:38.451732 makedir: /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/results
142 13:51:38.451897 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-add-keys
143 13:51:38.452124 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-add-sources
144 13:51:38.452332 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-background-process-start
145 13:51:38.452480 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-background-process-stop
146 13:51:38.452621 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-common-functions
147 13:51:38.452755 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-echo-ipv4
148 13:51:38.452889 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-install-packages
149 13:51:38.453023 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-installed-packages
150 13:51:38.453156 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-os-build
151 13:51:38.453288 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-probe-channel
152 13:51:38.453429 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-probe-ip
153 13:51:38.453610 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-target-ip
154 13:51:38.453746 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-target-mac
155 13:51:38.453883 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-target-storage
156 13:51:38.454018 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-test-case
157 13:51:38.454151 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-test-event
158 13:51:38.454288 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-test-feedback
159 13:51:38.454420 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-test-raise
160 13:51:38.454551 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-test-reference
161 13:51:38.454684 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-test-runner
162 13:51:38.454817 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-test-set
163 13:51:38.454948 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-test-shell
164 13:51:38.455084 Updating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-install-packages (oe)
165 13:51:38.455237 Updating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/bin/lava-installed-packages (oe)
166 13:51:38.455374 Creating /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/environment
167 13:51:38.455482 LAVA metadata
168 13:51:38.455558 - LAVA_JOB_ID=10062394
169 13:51:38.455628 - LAVA_DISPATCHER_IP=192.168.201.1
170 13:51:38.455740 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 13:51:38.455813 skipped lava-vland-overlay
172 13:51:38.455898 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 13:51:38.455984 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 13:51:38.456051 skipped lava-multinode-overlay
175 13:51:38.456130 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 13:51:38.456216 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 13:51:38.456297 Loading test definitions
178 13:51:38.456392 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
179 13:51:38.456470 Using /lava-10062394 at stage 0
180 13:51:38.456801 uuid=10062394_1.5.2.3.1 testdef=None
181 13:51:38.456898 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 13:51:38.456991 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
183 13:51:38.457643 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 13:51:38.457981 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
186 13:51:38.458703 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 13:51:38.458954 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
189 13:51:38.459640 runner path: /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/0/tests/0_dmesg test_uuid 10062394_1.5.2.3.1
190 13:51:38.459809 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 13:51:38.460055 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
193 13:51:38.460133 Using /lava-10062394 at stage 1
194 13:51:38.460452 uuid=10062394_1.5.2.3.5 testdef=None
195 13:51:38.460547 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 13:51:38.460639 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
197 13:51:38.461137 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 13:51:38.461372 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
200 13:51:38.462224 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 13:51:38.462481 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
203 13:51:38.463163 runner path: /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/1/tests/1_bootrr test_uuid 10062394_1.5.2.3.5
204 13:51:38.463334 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 13:51:38.463561 Creating lava-test-runner.conf files
207 13:51:38.463630 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/0 for stage 0
208 13:51:38.463726 - 0_dmesg
209 13:51:38.463810 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062394/lava-overlay-pv1cpqs8/lava-10062394/1 for stage 1
210 13:51:38.463905 - 1_bootrr
211 13:51:38.464006 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 13:51:38.464099 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
213 13:51:38.471983 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 13:51:38.472111 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
215 13:51:38.472206 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 13:51:38.472301 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 13:51:38.472396 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
218 13:51:38.635061 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 13:51:38.635513 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
220 13:51:38.635663 extracting modules file /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062394/extract-nfsrootfs-4okmcpn9
221 13:51:38.653062 extracting modules file /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062394/extract-overlay-ramdisk-bi0riegb/ramdisk
222 13:51:38.667972 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 13:51:38.668155 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
224 13:51:38.668305 [common] Applying overlay to NFS
225 13:51:38.668427 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062394/compress-overlay-ty9ssx73/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062394/extract-nfsrootfs-4okmcpn9
226 13:51:38.675557 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 13:51:38.675694 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
228 13:51:38.675800 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 13:51:38.675901 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
230 13:51:38.675991 Building ramdisk /var/lib/lava/dispatcher/tmp/10062394/extract-overlay-ramdisk-bi0riegb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062394/extract-overlay-ramdisk-bi0riegb/ramdisk
231 13:51:38.763634 >> 30347 blocks
232 13:51:39.498948 rename /var/lib/lava/dispatcher/tmp/10062394/extract-overlay-ramdisk-bi0riegb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/ramdisk/ramdisk.cpio.gz
233 13:51:39.499418 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 13:51:39.499553 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
235 13:51:39.499680 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
236 13:51:39.499796 No mkimage arch provided, not using FIT.
237 13:51:39.499895 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 13:51:39.500029 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 13:51:39.500212 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 13:51:39.500334 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
241 13:51:39.500432 No LXC device requested
242 13:51:39.500535 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 13:51:39.500641 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
244 13:51:39.500739 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 13:51:39.500826 Checking files for TFTP limit of 4294967296 bytes.
246 13:51:39.501290 end: 1 tftp-deploy (duration 00:00:11) [common]
247 13:51:39.501452 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 13:51:39.501625 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 13:51:39.501782 substitutions:
250 13:51:39.501862 - {DTB}: None
251 13:51:39.501938 - {INITRD}: 10062394/tftp-deploy-4m_x5y47/ramdisk/ramdisk.cpio.gz
252 13:51:39.502009 - {KERNEL}: 10062394/tftp-deploy-4m_x5y47/kernel/bzImage
253 13:51:39.502084 - {LAVA_MAC}: None
254 13:51:39.502158 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10062394/extract-nfsrootfs-4okmcpn9
255 13:51:39.502230 - {NFS_SERVER_IP}: 192.168.201.1
256 13:51:39.502298 - {PRESEED_CONFIG}: None
257 13:51:39.502362 - {PRESEED_LOCAL}: None
258 13:51:39.502425 - {RAMDISK}: 10062394/tftp-deploy-4m_x5y47/ramdisk/ramdisk.cpio.gz
259 13:51:39.502493 - {ROOT_PART}: None
260 13:51:39.502557 - {ROOT}: None
261 13:51:39.502623 - {SERVER_IP}: 192.168.201.1
262 13:51:39.502692 - {TEE}: None
263 13:51:39.502759 Parsed boot commands:
264 13:51:39.502820 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 13:51:39.503026 Parsed boot commands: tftpboot 192.168.201.1 10062394/tftp-deploy-4m_x5y47/kernel/bzImage 10062394/tftp-deploy-4m_x5y47/kernel/cmdline 10062394/tftp-deploy-4m_x5y47/ramdisk/ramdisk.cpio.gz
266 13:51:39.503131 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 13:51:39.503235 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 13:51:39.503349 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 13:51:39.503448 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 13:51:39.503530 Not connected, no need to disconnect.
271 13:51:39.503617 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 13:51:39.503721 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 13:51:39.503802 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
274 13:51:39.507577 Setting prompt string to ['lava-test: # ']
275 13:51:39.508012 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 13:51:39.508158 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 13:51:39.508277 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 13:51:39.508391 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 13:51:39.508725 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
280 13:51:44.649394 >> Command sent successfully.
281 13:51:44.652018 Returned 0 in 5 seconds
282 13:51:44.752843 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 13:51:44.753300 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 13:51:44.753466 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 13:51:44.753612 Setting prompt string to 'Starting depthcharge on Helios...'
287 13:51:44.753729 Changing prompt to 'Starting depthcharge on Helios...'
288 13:51:44.753851 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 13:51:44.754199 [Enter `^Ec?' for help]
290 13:51:45.374050
291 13:51:45.374275
292 13:51:45.384721 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 13:51:45.387422 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 13:51:45.394413 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 13:51:45.398000 CPU: AES supported, TXT NOT supported, VT supported
296 13:51:45.404273 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 13:51:45.407721 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 13:51:45.414676 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 13:51:45.417473 VBOOT: Loading verstage.
300 13:51:45.421115 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 13:51:45.427383 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 13:51:45.430844 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 13:51:45.434399 CBFS @ c08000 size 3f8000
304 13:51:45.441244 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 13:51:45.443922 CBFS: Locating 'fallback/verstage'
306 13:51:45.447421 CBFS: Found @ offset 10fb80 size 1072c
307 13:51:45.450933
308 13:51:45.451055
309 13:51:45.460730 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 13:51:45.475356 Probing TPM: . done!
311 13:51:45.478974 TPM ready after 0 ms
312 13:51:45.482497 Connected to device vid:did:rid of 1ae0:0028:00
313 13:51:45.492168 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
314 13:51:45.495782 Initialized TPM device CR50 revision 0
315 13:51:45.538129 tlcl_send_startup: Startup return code is 0
316 13:51:45.538313 TPM: setup succeeded
317 13:51:45.550983 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 13:51:45.555037 Chrome EC: UHEPI supported
319 13:51:45.557998 Phase 1
320 13:51:45.561575 FMAP: area GBB found @ c05000 (12288 bytes)
321 13:51:45.567663 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 13:51:45.571206 Phase 2
323 13:51:45.571314 Phase 3
324 13:51:45.574639 FMAP: area GBB found @ c05000 (12288 bytes)
325 13:51:45.581192 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 13:51:45.587632 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
327 13:51:45.591235 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 13:51:45.597419 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 13:51:45.613789 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
330 13:51:45.616657 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 13:51:45.623351 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 13:51:45.627697 Phase 4
333 13:51:45.631276 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
334 13:51:45.637826 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 13:51:45.817287 VB2:vb2_rsa_verify_digest() Digest check failed!
336 13:51:45.823583 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 13:51:45.823690 Saving nvdata
338 13:51:45.827139 Reboot requested (10020007)
339 13:51:45.829973 board_reset() called!
340 13:51:45.830129 full_reset() called!
341 13:51:50.341377
342 13:51:50.341598
343 13:51:50.351377 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 13:51:50.354890 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 13:51:50.361225 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 13:51:50.364601 CPU: AES supported, TXT NOT supported, VT supported
347 13:51:50.371083 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 13:51:50.374411 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 13:51:50.381160 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 13:51:50.384916 VBOOT: Loading verstage.
351 13:51:50.387839 FMAP: Found "FLASH" version 1.1 at 0xc04000.
352 13:51:50.394211 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 13:51:50.397691 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 13:51:50.401166 CBFS @ c08000 size 3f8000
355 13:51:50.407570 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 13:51:50.411144 CBFS: Locating 'fallback/verstage'
357 13:51:50.414590 CBFS: Found @ offset 10fb80 size 1072c
358 13:51:50.418247
359 13:51:50.418393
360 13:51:50.427920 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 13:51:50.442263 Probing TPM: . done!
362 13:51:50.445873 TPM ready after 0 ms
363 13:51:50.449284 Connected to device vid:did:rid of 1ae0:0028:00
364 13:51:50.459428 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
365 13:51:50.462231 Initialized TPM device CR50 revision 0
366 13:51:50.504939 tlcl_send_startup: Startup return code is 0
367 13:51:50.505092 TPM: setup succeeded
368 13:51:50.517817 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 13:51:50.521972 Chrome EC: UHEPI supported
370 13:51:50.525319 Phase 1
371 13:51:50.528093 FMAP: area GBB found @ c05000 (12288 bytes)
372 13:51:50.535130 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 13:51:50.541800 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 13:51:50.544398 Recovery requested (1009000e)
375 13:51:50.550774 Saving nvdata
376 13:51:50.556376 tlcl_extend: response is 0
377 13:51:50.565433 tlcl_extend: response is 0
378 13:51:50.572371 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 13:51:50.575871 CBFS @ c08000 size 3f8000
380 13:51:50.582639 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 13:51:50.585772 CBFS: Locating 'fallback/romstage'
382 13:51:50.589077 CBFS: Found @ offset 80 size 145fc
383 13:51:50.592479 Accumulated console time in verstage 98 ms
384 13:51:50.592617
385 13:51:50.592731
386 13:51:50.605442 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 13:51:50.611848 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 13:51:50.615313 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 13:51:50.618848 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 13:51:50.625218 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 13:51:50.628684 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 13:51:50.632276 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 13:51:50.635113 TCO_STS: 0000 0000
394 13:51:50.638713 GEN_PMCON: e0015238 00000200
395 13:51:50.641558 GBLRST_CAUSE: 00000000 00000000
396 13:51:50.641700 prev_sleep_state 5
397 13:51:50.645665 Boot Count incremented to 51151
398 13:51:50.652227 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 13:51:50.655465 CBFS @ c08000 size 3f8000
400 13:51:50.661906 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 13:51:50.662058 CBFS: Locating 'fspm.bin'
402 13:51:50.668862 CBFS: Found @ offset 5ffc0 size 71000
403 13:51:50.671614 Chrome EC: UHEPI supported
404 13:51:50.678585 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 13:51:50.682233 Probing TPM: done!
406 13:51:50.688487 Connected to device vid:did:rid of 1ae0:0028:00
407 13:51:50.698797 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
408 13:51:50.704989 Initialized TPM device CR50 revision 0
409 13:51:50.714081 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 13:51:50.720341 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 13:51:50.723201 MRC cache found, size 1948
412 13:51:50.726736 bootmode is set to: 2
413 13:51:50.730220 PRMRR disabled by config.
414 13:51:50.733562 SPD INDEX = 1
415 13:51:50.736990 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 13:51:50.739905 CBFS @ c08000 size 3f8000
417 13:51:50.746272 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 13:51:50.746388 CBFS: Locating 'spd.bin'
419 13:51:50.749922 CBFS: Found @ offset 5fb80 size 400
420 13:51:50.753445 SPD: module type is LPDDR3
421 13:51:50.756283 SPD: module part is
422 13:51:50.763273 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
423 13:51:50.766475 SPD: device width 4 bits, bus width 8 bits
424 13:51:50.769819 SPD: module size is 4096 MB (per channel)
425 13:51:50.773245 memory slot: 0 configuration done.
426 13:51:50.776075 memory slot: 2 configuration done.
427 13:51:50.828234 CBMEM:
428 13:51:50.830958 IMD: root @ 99fff000 254 entries.
429 13:51:50.834345 IMD: root @ 99ffec00 62 entries.
430 13:51:50.837680 External stage cache:
431 13:51:50.841318 IMD: root @ 9abff000 254 entries.
432 13:51:50.844104 IMD: root @ 9abfec00 62 entries.
433 13:51:50.851268 Chrome EC: clear events_b mask to 0x0000000020004000
434 13:51:50.863715 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
435 13:51:50.873883 tlcl_write: response is 0
436 13:51:50.886150 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 13:51:50.892362 MRC: TPM MRC hash updated successfully.
438 13:51:50.892509 2 DIMMs found
439 13:51:50.895762 SMM Memory Map
440 13:51:50.899180 SMRAM : 0x9a000000 0x1000000
441 13:51:50.902790 Subregion 0: 0x9a000000 0xa00000
442 13:51:50.905649 Subregion 1: 0x9aa00000 0x200000
443 13:51:50.909138 Subregion 2: 0x9ac00000 0x400000
444 13:51:50.912583 top_of_ram = 0x9a000000
445 13:51:50.915953 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
446 13:51:50.922661 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
447 13:51:50.925488 MTRR Range: Start=ff000000 End=0 (Size 1000000)
448 13:51:50.932561 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 13:51:50.936169 CBFS @ c08000 size 3f8000
450 13:51:50.939050 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 13:51:50.942417 CBFS: Locating 'fallback/postcar'
452 13:51:50.945826 CBFS: Found @ offset 107000 size 4b44
453 13:51:50.952337 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
454 13:51:50.964412 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
455 13:51:50.967764 Processing 180 relocs. Offset value of 0x97c0c000
456 13:51:50.976079 Accumulated console time in romstage 286 ms
457 13:51:50.976196
458 13:51:50.976275
459 13:51:50.986212 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
460 13:51:50.992408 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 13:51:50.995765 CBFS @ c08000 size 3f8000
462 13:51:50.999119 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 13:51:51.006118 CBFS: Locating 'fallback/ramstage'
464 13:51:51.008924 CBFS: Found @ offset 43380 size 1b9e8
465 13:51:51.015873 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
466 13:51:51.047752 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
467 13:51:51.050703 Processing 3976 relocs. Offset value of 0x98db0000
468 13:51:51.057819 Accumulated console time in postcar 52 ms
469 13:51:51.057933
470 13:51:51.058029
471 13:51:51.067857 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
472 13:51:51.074167 FMAP: area RO_VPD found @ c00000 (16384 bytes)
473 13:51:51.077663 WARNING: RO_VPD is uninitialized or empty.
474 13:51:51.080473 FMAP: area RW_VPD found @ af8000 (8192 bytes)
475 13:51:51.087513 FMAP: area RW_VPD found @ af8000 (8192 bytes)
476 13:51:51.087688 Normal boot.
477 13:51:51.094301 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
478 13:51:51.097455 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 13:51:51.100296 CBFS @ c08000 size 3f8000
480 13:51:51.107008 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 13:51:51.110417 CBFS: Locating 'cpu_microcode_blob.bin'
482 13:51:51.114004 CBFS: Found @ offset 14700 size 2ec00
483 13:51:51.116876 microcode: sig=0x806ec pf=0x4 revision=0xc9
484 13:51:51.120472 Skip microcode update
485 13:51:51.126890 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 13:51:51.127042 CBFS @ c08000 size 3f8000
487 13:51:51.133916 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 13:51:51.137335 CBFS: Locating 'fsps.bin'
489 13:51:51.140163 CBFS: Found @ offset d1fc0 size 35000
490 13:51:51.165672 Detected 4 core, 8 thread CPU.
491 13:51:51.169227 Setting up SMI for CPU
492 13:51:51.172065 IED base = 0x9ac00000
493 13:51:51.172205 IED size = 0x00400000
494 13:51:51.175745 Will perform SMM setup.
495 13:51:51.181965 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
496 13:51:51.189211 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
497 13:51:51.192049 Processing 16 relocs. Offset value of 0x00030000
498 13:51:51.196126 Attempting to start 7 APs
499 13:51:51.199390 Waiting for 10ms after sending INIT.
500 13:51:51.215734 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
501 13:51:51.215917 done.
502 13:51:51.219033 AP: slot 4 apic_id 3.
503 13:51:51.221810 AP: slot 5 apic_id 2.
504 13:51:51.221934 AP: slot 3 apic_id 7.
505 13:51:51.225315 AP: slot 2 apic_id 6.
506 13:51:51.228705 AP: slot 6 apic_id 5.
507 13:51:51.228837 AP: slot 7 apic_id 4.
508 13:51:51.235675 Waiting for 2nd SIPI to complete...done.
509 13:51:51.241972 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
510 13:51:51.245556 Processing 13 relocs. Offset value of 0x00038000
511 13:51:51.251943 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
512 13:51:51.258933 Installing SMM handler to 0x9a000000
513 13:51:51.265311 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
514 13:51:51.268858 Processing 658 relocs. Offset value of 0x9a010000
515 13:51:51.278693 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
516 13:51:51.281516 Processing 13 relocs. Offset value of 0x9a008000
517 13:51:51.288606 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
518 13:51:51.295010 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
519 13:51:51.301434 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
520 13:51:51.304913 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
521 13:51:51.311368 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
522 13:51:51.318196 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
523 13:51:51.321701 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
524 13:51:51.327693 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
525 13:51:51.331304 Clearing SMI status registers
526 13:51:51.334771 SMI_STS: PM1
527 13:51:51.334908 PM1_STS: PWRBTN
528 13:51:51.338239 TCO_STS: SECOND_TO
529 13:51:51.341698 New SMBASE 0x9a000000
530 13:51:51.345064 In relocation handler: CPU 0
531 13:51:51.348630 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
532 13:51:51.351354 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 13:51:51.354889 Relocation complete.
534 13:51:51.358276 New SMBASE 0x99fffc00
535 13:51:51.358384 In relocation handler: CPU 1
536 13:51:51.364654 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
537 13:51:51.368241 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 13:51:51.371079 Relocation complete.
539 13:51:51.374762 New SMBASE 0x99ffe800
540 13:51:51.374906 In relocation handler: CPU 6
541 13:51:51.380994 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
542 13:51:51.384438 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 13:51:51.388035 Relocation complete.
544 13:51:51.388181 New SMBASE 0x99ffe400
545 13:51:51.391434 In relocation handler: CPU 7
546 13:51:51.397818 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
547 13:51:51.401280 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 13:51:51.404762 Relocation complete.
549 13:51:51.404874 New SMBASE 0x99fff400
550 13:51:51.407721 In relocation handler: CPU 3
551 13:51:51.414574 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
552 13:51:51.418083 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 13:51:51.420773 Relocation complete.
554 13:51:51.420900 New SMBASE 0x99fff000
555 13:51:51.424195 In relocation handler: CPU 4
556 13:51:51.427713 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
557 13:51:51.434627 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 13:51:51.437281 Relocation complete.
559 13:51:51.437429 New SMBASE 0x99ffec00
560 13:51:51.440918 In relocation handler: CPU 5
561 13:51:51.444280 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
562 13:51:51.450575 Writing SMRR. base = 0x9a000006, mask=0xff000800
563 13:51:51.454137 Relocation complete.
564 13:51:51.454268 New SMBASE 0x99fff800
565 13:51:51.457798 In relocation handler: CPU 2
566 13:51:51.460595 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
567 13:51:51.467648 Writing SMRR. base = 0x9a000006, mask=0xff000800
568 13:51:51.467791 Relocation complete.
569 13:51:51.470468 Initializing CPU #0
570 13:51:51.474024 CPU: vendor Intel device 806ec
571 13:51:51.477705 CPU: family 06, model 8e, stepping 0c
572 13:51:51.481014 Clearing out pending MCEs
573 13:51:51.483849 Setting up local APIC...
574 13:51:51.483989 apic_id: 0x00 done.
575 13:51:51.487395 Turbo is available but hidden
576 13:51:51.490224 Turbo is available and visible
577 13:51:51.493786 VMX status: enabled
578 13:51:51.497284 IA32_FEATURE_CONTROL status: locked
579 13:51:51.500645 Skip microcode update
580 13:51:51.500782 CPU #0 initialized
581 13:51:51.503465 Initializing CPU #1
582 13:51:51.506988 Initializing CPU #7
583 13:51:51.507115 Initializing CPU #6
584 13:51:51.510610 CPU: vendor Intel device 806ec
585 13:51:51.513431 CPU: family 06, model 8e, stepping 0c
586 13:51:51.516984 CPU: vendor Intel device 806ec
587 13:51:51.520483 CPU: family 06, model 8e, stepping 0c
588 13:51:51.523836 Clearing out pending MCEs
589 13:51:51.527306 Clearing out pending MCEs
590 13:51:51.530076 Setting up local APIC...
591 13:51:51.533472 CPU: vendor Intel device 806ec
592 13:51:51.536783 CPU: family 06, model 8e, stepping 0c
593 13:51:51.540190 Clearing out pending MCEs
594 13:51:51.540293 Initializing CPU #2
595 13:51:51.543372 Initializing CPU #3
596 13:51:51.546836 CPU: vendor Intel device 806ec
597 13:51:51.550172 CPU: family 06, model 8e, stepping 0c
598 13:51:51.553686 CPU: vendor Intel device 806ec
599 13:51:51.556406 CPU: family 06, model 8e, stepping 0c
600 13:51:51.560078 Clearing out pending MCEs
601 13:51:51.563658 Clearing out pending MCEs
602 13:51:51.563809 Setting up local APIC...
603 13:51:51.566953 Setting up local APIC...
604 13:51:51.569846 Initializing CPU #4
605 13:51:51.569984 Initializing CPU #5
606 13:51:51.573354 CPU: vendor Intel device 806ec
607 13:51:51.577012 CPU: family 06, model 8e, stepping 0c
608 13:51:51.579809 CPU: vendor Intel device 806ec
609 13:51:51.586940 CPU: family 06, model 8e, stepping 0c
610 13:51:51.587090 Clearing out pending MCEs
611 13:51:51.589826 Clearing out pending MCEs
612 13:51:51.593274 Setting up local APIC...
613 13:51:51.596793 apic_id: 0x06 done.
614 13:51:51.596955 Setting up local APIC...
615 13:51:51.599604 apic_id: 0x01 done.
616 13:51:51.602903 apic_id: 0x07 done.
617 13:51:51.603046 VMX status: enabled
618 13:51:51.606386 VMX status: enabled
619 13:51:51.609968 IA32_FEATURE_CONTROL status: locked
620 13:51:51.613451 IA32_FEATURE_CONTROL status: locked
621 13:51:51.616285 Skip microcode update
622 13:51:51.616431 Skip microcode update
623 13:51:51.619869 CPU #2 initialized
624 13:51:51.623336 CPU #3 initialized
625 13:51:51.623474 VMX status: enabled
626 13:51:51.626130 Setting up local APIC...
627 13:51:51.629499 apic_id: 0x05 done.
628 13:51:51.629640 Setting up local APIC...
629 13:51:51.633023 IA32_FEATURE_CONTROL status: locked
630 13:51:51.636589 VMX status: enabled
631 13:51:51.639379 apic_id: 0x04 done.
632 13:51:51.642819 IA32_FEATURE_CONTROL status: locked
633 13:51:51.642952 VMX status: enabled
634 13:51:51.646255 Skip microcode update
635 13:51:51.649655 IA32_FEATURE_CONTROL status: locked
636 13:51:51.653189 CPU #6 initialized
637 13:51:51.653321 Skip microcode update
638 13:51:51.655897 apic_id: 0x03 done.
639 13:51:51.659708 apic_id: 0x02 done.
640 13:51:51.659836 VMX status: enabled
641 13:51:51.662524 VMX status: enabled
642 13:51:51.666123 IA32_FEATURE_CONTROL status: locked
643 13:51:51.669602 IA32_FEATURE_CONTROL status: locked
644 13:51:51.673127 Skip microcode update
645 13:51:51.673265 Skip microcode update
646 13:51:51.675896 CPU #4 initialized
647 13:51:51.679419 CPU #5 initialized
648 13:51:51.679574 CPU #7 initialized
649 13:51:51.682375 Skip microcode update
650 13:51:51.685959 CPU #1 initialized
651 13:51:51.689300 bsp_do_flight_plan done after 452 msecs.
652 13:51:51.692894 CPU: frequency set to 4200 MHz
653 13:51:51.693000 Enabling SMIs.
654 13:51:51.695641 Locking SMM.
655 13:51:51.709635 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
656 13:51:51.713242 CBFS @ c08000 size 3f8000
657 13:51:51.719706 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
658 13:51:51.719865 CBFS: Locating 'vbt.bin'
659 13:51:51.722548 CBFS: Found @ offset 5f5c0 size 499
660 13:51:51.729451 Found a VBT of 4608 bytes after decompression
661 13:51:51.912974 Display FSP Version Info HOB
662 13:51:51.916278 Reference Code - CPU = 9.0.1e.30
663 13:51:51.920042 uCode Version = 0.0.0.ca
664 13:51:51.923604 TXT ACM version = ff.ff.ff.ffff
665 13:51:51.926478 Display FSP Version Info HOB
666 13:51:51.929995 Reference Code - ME = 9.0.1e.30
667 13:51:51.932821 MEBx version = 0.0.0.0
668 13:51:51.936356 ME Firmware Version = Consumer SKU
669 13:51:51.940003 Display FSP Version Info HOB
670 13:51:51.942772 Reference Code - CML PCH = 9.0.1e.30
671 13:51:51.946323 PCH-CRID Status = Disabled
672 13:51:51.949715 PCH-CRID Original Value = ff.ff.ff.ffff
673 13:51:51.953145 PCH-CRID New Value = ff.ff.ff.ffff
674 13:51:51.955976 OPROM - RST - RAID = ff.ff.ff.ffff
675 13:51:51.959479 ChipsetInit Base Version = ff.ff.ff.ffff
676 13:51:51.962913 ChipsetInit Oem Version = ff.ff.ff.ffff
677 13:51:51.966496 Display FSP Version Info HOB
678 13:51:51.973175 Reference Code - SA - System Agent = 9.0.1e.30
679 13:51:51.976528 Reference Code - MRC = 0.7.1.6c
680 13:51:51.976667 SA - PCIe Version = 9.0.1e.30
681 13:51:51.979298 SA-CRID Status = Disabled
682 13:51:51.982941 SA-CRID Original Value = 0.0.0.c
683 13:51:51.986436 SA-CRID New Value = 0.0.0.c
684 13:51:51.989303 OPROM - VBIOS = ff.ff.ff.ffff
685 13:51:51.992939 RTC Init
686 13:51:51.995893 Set power on after power failure.
687 13:51:51.996044 Disabling Deep S3
688 13:51:51.999312 Disabling Deep S3
689 13:51:51.999450 Disabling Deep S4
690 13:51:52.002867 Disabling Deep S4
691 13:51:52.005758 Disabling Deep S5
692 13:51:52.005897 Disabling Deep S5
693 13:51:52.012863 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
694 13:51:52.013041 Enumerating buses...
695 13:51:52.019284 Show all devs... Before device enumeration.
696 13:51:52.022115 Root Device: enabled 1
697 13:51:52.022258 CPU_CLUSTER: 0: enabled 1
698 13:51:52.025665 DOMAIN: 0000: enabled 1
699 13:51:52.029221 APIC: 00: enabled 1
700 13:51:52.029365 PCI: 00:00.0: enabled 1
701 13:51:52.032092 PCI: 00:02.0: enabled 1
702 13:51:52.035698 PCI: 00:04.0: enabled 0
703 13:51:52.039204 PCI: 00:05.0: enabled 0
704 13:51:52.039348 PCI: 00:12.0: enabled 1
705 13:51:52.042139 PCI: 00:12.5: enabled 0
706 13:51:52.045741 PCI: 00:12.6: enabled 0
707 13:51:52.048535 PCI: 00:14.0: enabled 1
708 13:51:52.048630 PCI: 00:14.1: enabled 0
709 13:51:52.052105 PCI: 00:14.3: enabled 1
710 13:51:52.055607 PCI: 00:14.5: enabled 0
711 13:51:52.055755 PCI: 00:15.0: enabled 1
712 13:51:52.059050 PCI: 00:15.1: enabled 1
713 13:51:52.061842 PCI: 00:15.2: enabled 0
714 13:51:52.065291 PCI: 00:15.3: enabled 0
715 13:51:52.065421 PCI: 00:16.0: enabled 1
716 13:51:52.068745 PCI: 00:16.1: enabled 0
717 13:51:52.072224 PCI: 00:16.2: enabled 0
718 13:51:52.075732 PCI: 00:16.3: enabled 0
719 13:51:52.075877 PCI: 00:16.4: enabled 0
720 13:51:52.078390 PCI: 00:16.5: enabled 0
721 13:51:52.081998 PCI: 00:17.0: enabled 1
722 13:51:52.085289 PCI: 00:19.0: enabled 1
723 13:51:52.085451 PCI: 00:19.1: enabled 0
724 13:51:52.088670 PCI: 00:19.2: enabled 0
725 13:51:52.092102 PCI: 00:1a.0: enabled 0
726 13:51:52.095461 PCI: 00:1c.0: enabled 0
727 13:51:52.095616 PCI: 00:1c.1: enabled 0
728 13:51:52.098305 PCI: 00:1c.2: enabled 0
729 13:51:52.101994 PCI: 00:1c.3: enabled 0
730 13:51:52.102110 PCI: 00:1c.4: enabled 0
731 13:51:52.105604 PCI: 00:1c.5: enabled 0
732 13:51:52.108461 PCI: 00:1c.6: enabled 0
733 13:51:52.112066 PCI: 00:1c.7: enabled 0
734 13:51:52.112219 PCI: 00:1d.0: enabled 1
735 13:51:52.114822 PCI: 00:1d.1: enabled 0
736 13:51:52.118371 PCI: 00:1d.2: enabled 0
737 13:51:52.121674 PCI: 00:1d.3: enabled 0
738 13:51:52.121791 PCI: 00:1d.4: enabled 0
739 13:51:52.125120 PCI: 00:1d.5: enabled 1
740 13:51:52.128573 PCI: 00:1e.0: enabled 1
741 13:51:52.131498 PCI: 00:1e.1: enabled 0
742 13:51:52.131648 PCI: 00:1e.2: enabled 1
743 13:51:52.135005 PCI: 00:1e.3: enabled 1
744 13:51:52.137938 PCI: 00:1f.0: enabled 1
745 13:51:52.138084 PCI: 00:1f.1: enabled 1
746 13:51:52.141369 PCI: 00:1f.2: enabled 1
747 13:51:52.145071 PCI: 00:1f.3: enabled 1
748 13:51:52.148592 PCI: 00:1f.4: enabled 1
749 13:51:52.148734 PCI: 00:1f.5: enabled 1
750 13:51:52.151437 PCI: 00:1f.6: enabled 0
751 13:51:52.155006 USB0 port 0: enabled 1
752 13:51:52.157962 I2C: 00:15: enabled 1
753 13:51:52.158128 I2C: 00:5d: enabled 1
754 13:51:52.161402 GENERIC: 0.0: enabled 1
755 13:51:52.164831 I2C: 00:1a: enabled 1
756 13:51:52.165010 I2C: 00:38: enabled 1
757 13:51:52.168258 I2C: 00:39: enabled 1
758 13:51:52.171149 I2C: 00:3a: enabled 1
759 13:51:52.171258 I2C: 00:3b: enabled 1
760 13:51:52.174454 PCI: 00:00.0: enabled 1
761 13:51:52.177756 SPI: 00: enabled 1
762 13:51:52.177878 SPI: 01: enabled 1
763 13:51:52.181131 PNP: 0c09.0: enabled 1
764 13:51:52.184553 USB2 port 0: enabled 1
765 13:51:52.184685 USB2 port 1: enabled 1
766 13:51:52.187908 USB2 port 2: enabled 0
767 13:51:52.191410 USB2 port 3: enabled 0
768 13:51:52.191538 USB2 port 5: enabled 0
769 13:51:52.194295 USB2 port 6: enabled 1
770 13:51:52.197867 USB2 port 9: enabled 1
771 13:51:52.201221 USB3 port 0: enabled 1
772 13:51:52.201320 USB3 port 1: enabled 1
773 13:51:52.204991 USB3 port 2: enabled 1
774 13:51:52.207682 USB3 port 3: enabled 1
775 13:51:52.207806 USB3 port 4: enabled 0
776 13:51:52.211230 APIC: 01: enabled 1
777 13:51:52.214696 APIC: 06: enabled 1
778 13:51:52.214843 APIC: 07: enabled 1
779 13:51:52.217457 APIC: 03: enabled 1
780 13:51:52.221101 APIC: 02: enabled 1
781 13:51:52.221231 APIC: 05: enabled 1
782 13:51:52.224575 APIC: 04: enabled 1
783 13:51:52.224701 Compare with tree...
784 13:51:52.228182 Root Device: enabled 1
785 13:51:52.230788 CPU_CLUSTER: 0: enabled 1
786 13:51:52.234296 APIC: 00: enabled 1
787 13:51:52.234427 APIC: 01: enabled 1
788 13:51:52.237850 APIC: 06: enabled 1
789 13:51:52.240782 APIC: 07: enabled 1
790 13:51:52.240909 APIC: 03: enabled 1
791 13:51:52.244386 APIC: 02: enabled 1
792 13:51:52.247939 APIC: 05: enabled 1
793 13:51:52.248073 APIC: 04: enabled 1
794 13:51:52.250835 DOMAIN: 0000: enabled 1
795 13:51:52.254342 PCI: 00:00.0: enabled 1
796 13:51:52.257915 PCI: 00:02.0: enabled 1
797 13:51:52.258042 PCI: 00:04.0: enabled 0
798 13:51:52.260783 PCI: 00:05.0: enabled 0
799 13:51:52.264282 PCI: 00:12.0: enabled 1
800 13:51:52.267772 PCI: 00:12.5: enabled 0
801 13:51:52.271101 PCI: 00:12.6: enabled 0
802 13:51:52.271237 PCI: 00:14.0: enabled 1
803 13:51:52.274476 USB0 port 0: enabled 1
804 13:51:52.277287 USB2 port 0: enabled 1
805 13:51:52.280923 USB2 port 1: enabled 1
806 13:51:52.284282 USB2 port 2: enabled 0
807 13:51:52.287889 USB2 port 3: enabled 0
808 13:51:52.288028 USB2 port 5: enabled 0
809 13:51:52.291056 USB2 port 6: enabled 1
810 13:51:52.294354 USB2 port 9: enabled 1
811 13:51:52.297756 USB3 port 0: enabled 1
812 13:51:52.300479 USB3 port 1: enabled 1
813 13:51:52.300599 USB3 port 2: enabled 1
814 13:51:52.303928 USB3 port 3: enabled 1
815 13:51:52.307312 USB3 port 4: enabled 0
816 13:51:52.310944 PCI: 00:14.1: enabled 0
817 13:51:52.313885 PCI: 00:14.3: enabled 1
818 13:51:52.314027 PCI: 00:14.5: enabled 0
819 13:51:52.317403 PCI: 00:15.0: enabled 1
820 13:51:52.320198 I2C: 00:15: enabled 1
821 13:51:52.323653 PCI: 00:15.1: enabled 1
822 13:51:52.327191 I2C: 00:5d: enabled 1
823 13:51:52.327327 GENERIC: 0.0: enabled 1
824 13:51:52.330084 PCI: 00:15.2: enabled 0
825 13:51:52.333587 PCI: 00:15.3: enabled 0
826 13:51:52.337084 PCI: 00:16.0: enabled 1
827 13:51:52.340597 PCI: 00:16.1: enabled 0
828 13:51:52.340731 PCI: 00:16.2: enabled 0
829 13:51:52.343525 PCI: 00:16.3: enabled 0
830 13:51:52.347043 PCI: 00:16.4: enabled 0
831 13:51:52.350593 PCI: 00:16.5: enabled 0
832 13:51:52.353424 PCI: 00:17.0: enabled 1
833 13:51:52.353562 PCI: 00:19.0: enabled 1
834 13:51:52.356793 I2C: 00:1a: enabled 1
835 13:51:52.360312 I2C: 00:38: enabled 1
836 13:51:52.363882 I2C: 00:39: enabled 1
837 13:51:52.364023 I2C: 00:3a: enabled 1
838 13:51:52.366631 I2C: 00:3b: enabled 1
839 13:51:52.370236 PCI: 00:19.1: enabled 0
840 13:51:52.373628 PCI: 00:19.2: enabled 0
841 13:51:52.376959 PCI: 00:1a.0: enabled 0
842 13:51:52.377113 PCI: 00:1c.0: enabled 0
843 13:51:52.380254 PCI: 00:1c.1: enabled 0
844 13:51:52.383065 PCI: 00:1c.2: enabled 0
845 13:51:52.386424 PCI: 00:1c.3: enabled 0
846 13:51:52.389835 PCI: 00:1c.4: enabled 0
847 13:51:52.389974 PCI: 00:1c.5: enabled 0
848 13:51:52.393130 PCI: 00:1c.6: enabled 0
849 13:51:52.396735 PCI: 00:1c.7: enabled 0
850 13:51:52.400153 PCI: 00:1d.0: enabled 1
851 13:51:52.403415 PCI: 00:1d.1: enabled 0
852 13:51:52.403548 PCI: 00:1d.2: enabled 0
853 13:51:52.406150 PCI: 00:1d.3: enabled 0
854 13:51:52.409821 PCI: 00:1d.4: enabled 0
855 13:51:52.413199 PCI: 00:1d.5: enabled 1
856 13:51:52.416574 PCI: 00:00.0: enabled 1
857 13:51:52.416707 PCI: 00:1e.0: enabled 1
858 13:51:52.419418 PCI: 00:1e.1: enabled 0
859 13:51:52.422909 PCI: 00:1e.2: enabled 1
860 13:51:52.426374 SPI: 00: enabled 1
861 13:51:52.426514 PCI: 00:1e.3: enabled 1
862 13:51:52.430008 SPI: 01: enabled 1
863 13:51:52.432906 PCI: 00:1f.0: enabled 1
864 13:51:52.436400 PNP: 0c09.0: enabled 1
865 13:51:52.436531 PCI: 00:1f.1: enabled 1
866 13:51:52.439838 PCI: 00:1f.2: enabled 1
867 13:51:52.442576 PCI: 00:1f.3: enabled 1
868 13:51:52.446135 PCI: 00:1f.4: enabled 1
869 13:51:52.449704 PCI: 00:1f.5: enabled 1
870 13:51:52.449816 PCI: 00:1f.6: enabled 0
871 13:51:52.452491 Root Device scanning...
872 13:51:52.456070 scan_static_bus for Root Device
873 13:51:52.459683 CPU_CLUSTER: 0 enabled
874 13:51:52.462615 DOMAIN: 0000 enabled
875 13:51:52.462759 DOMAIN: 0000 scanning...
876 13:51:52.466058 PCI: pci_scan_bus for bus 00
877 13:51:52.469552 PCI: 00:00.0 [8086/0000] ops
878 13:51:52.473077 PCI: 00:00.0 [8086/9b61] enabled
879 13:51:52.475913 PCI: 00:02.0 [8086/0000] bus ops
880 13:51:52.479450 PCI: 00:02.0 [8086/9b41] enabled
881 13:51:52.482859 PCI: 00:04.0 [8086/1903] disabled
882 13:51:52.486265 PCI: 00:08.0 [8086/1911] enabled
883 13:51:52.489117 PCI: 00:12.0 [8086/02f9] enabled
884 13:51:52.492542 PCI: 00:14.0 [8086/0000] bus ops
885 13:51:52.495921 PCI: 00:14.0 [8086/02ed] enabled
886 13:51:52.499242 PCI: 00:14.2 [8086/02ef] enabled
887 13:51:52.502707 PCI: 00:14.3 [8086/02f0] enabled
888 13:51:52.506066 PCI: 00:15.0 [8086/0000] bus ops
889 13:51:52.509378 PCI: 00:15.0 [8086/02e8] enabled
890 13:51:52.512786 PCI: 00:15.1 [8086/0000] bus ops
891 13:51:52.516270 PCI: 00:15.1 [8086/02e9] enabled
892 13:51:52.519100 PCI: 00:16.0 [8086/0000] ops
893 13:51:52.522533 PCI: 00:16.0 [8086/02e0] enabled
894 13:51:52.525896 PCI: 00:17.0 [8086/0000] ops
895 13:51:52.529379 PCI: 00:17.0 [8086/02d3] enabled
896 13:51:52.532419 PCI: 00:19.0 [8086/0000] bus ops
897 13:51:52.535983 PCI: 00:19.0 [8086/02c5] enabled
898 13:51:52.539591 PCI: 00:1d.0 [8086/0000] bus ops
899 13:51:52.542369 PCI: 00:1d.0 [8086/02b0] enabled
900 13:51:52.549298 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 13:51:52.552230 PCI: 00:1e.0 [8086/0000] ops
902 13:51:52.555766 PCI: 00:1e.0 [8086/02a8] enabled
903 13:51:52.559492 PCI: 00:1e.2 [8086/0000] bus ops
904 13:51:52.562257 PCI: 00:1e.2 [8086/02aa] enabled
905 13:51:52.565975 PCI: 00:1e.3 [8086/0000] bus ops
906 13:51:52.568942 PCI: 00:1e.3 [8086/02ab] enabled
907 13:51:52.572299 PCI: 00:1f.0 [8086/0000] bus ops
908 13:51:52.575826 PCI: 00:1f.0 [8086/0284] enabled
909 13:51:52.578687 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 13:51:52.585846 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 13:51:52.588641 PCI: 00:1f.3 [8086/0000] bus ops
912 13:51:52.592079 PCI: 00:1f.3 [8086/02c8] enabled
913 13:51:52.595475 PCI: 00:1f.4 [8086/0000] bus ops
914 13:51:52.598982 PCI: 00:1f.4 [8086/02a3] enabled
915 13:51:52.602484 PCI: 00:1f.5 [8086/0000] bus ops
916 13:51:52.605297 PCI: 00:1f.5 [8086/02a4] enabled
917 13:51:52.608732 PCI: Leftover static devices:
918 13:51:52.608876 PCI: 00:05.0
919 13:51:52.612333 PCI: 00:12.5
920 13:51:52.612468 PCI: 00:12.6
921 13:51:52.615872 PCI: 00:14.1
922 13:51:52.616003 PCI: 00:14.5
923 13:51:52.616115 PCI: 00:15.2
924 13:51:52.618657 PCI: 00:15.3
925 13:51:52.618782 PCI: 00:16.1
926 13:51:52.622140 PCI: 00:16.2
927 13:51:52.622269 PCI: 00:16.3
928 13:51:52.622381 PCI: 00:16.4
929 13:51:52.625733 PCI: 00:16.5
930 13:51:52.625863 PCI: 00:19.1
931 13:51:52.628570 PCI: 00:19.2
932 13:51:52.628699 PCI: 00:1a.0
933 13:51:52.632632 PCI: 00:1c.0
934 13:51:52.632766 PCI: 00:1c.1
935 13:51:52.632887 PCI: 00:1c.2
936 13:51:52.635402 PCI: 00:1c.3
937 13:51:52.635532 PCI: 00:1c.4
938 13:51:52.639120 PCI: 00:1c.5
939 13:51:52.639250 PCI: 00:1c.6
940 13:51:52.639366 PCI: 00:1c.7
941 13:51:52.641983 PCI: 00:1d.1
942 13:51:52.642112 PCI: 00:1d.2
943 13:51:52.645440 PCI: 00:1d.3
944 13:51:52.645597 PCI: 00:1d.4
945 13:51:52.645722 PCI: 00:1d.5
946 13:51:52.648959 PCI: 00:1e.1
947 13:51:52.649090 PCI: 00:1f.1
948 13:51:52.651719 PCI: 00:1f.2
949 13:51:52.651850 PCI: 00:1f.6
950 13:51:52.655209 PCI: Check your devicetree.cb.
951 13:51:52.658889 PCI: 00:02.0 scanning...
952 13:51:52.662352 scan_generic_bus for PCI: 00:02.0
953 13:51:52.665225 scan_generic_bus for PCI: 00:02.0 done
954 13:51:52.672215 scan_bus: scanning of bus PCI: 00:02.0 took 10199 usecs
955 13:51:52.674962 PCI: 00:14.0 scanning...
956 13:51:52.678570 scan_static_bus for PCI: 00:14.0
957 13:51:52.678704 USB0 port 0 enabled
958 13:51:52.682066 USB0 port 0 scanning...
959 13:51:52.684937 scan_static_bus for USB0 port 0
960 13:51:52.688555 USB2 port 0 enabled
961 13:51:52.688686 USB2 port 1 enabled
962 13:51:52.691528 USB2 port 2 disabled
963 13:51:52.695215 USB2 port 3 disabled
964 13:51:52.695354 USB2 port 5 disabled
965 13:51:52.698768 USB2 port 6 enabled
966 13:51:52.698903 USB2 port 9 enabled
967 13:51:52.701567 USB3 port 0 enabled
968 13:51:52.704958 USB3 port 1 enabled
969 13:51:52.705091 USB3 port 2 enabled
970 13:51:52.708322 USB3 port 3 enabled
971 13:51:52.711561 USB3 port 4 disabled
972 13:51:52.711705 USB2 port 0 scanning...
973 13:51:52.714968 scan_static_bus for USB2 port 0
974 13:51:52.718124 scan_static_bus for USB2 port 0 done
975 13:51:52.725415 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
976 13:51:52.728156 USB2 port 1 scanning...
977 13:51:52.731444 scan_static_bus for USB2 port 1
978 13:51:52.734846 scan_static_bus for USB2 port 1 done
979 13:51:52.741975 scan_bus: scanning of bus USB2 port 1 took 9711 usecs
980 13:51:52.742149 USB2 port 6 scanning...
981 13:51:52.744759 scan_static_bus for USB2 port 6
982 13:51:52.751811 scan_static_bus for USB2 port 6 done
983 13:51:52.754653 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
984 13:51:52.758081 USB2 port 9 scanning...
985 13:51:52.761686 scan_static_bus for USB2 port 9
986 13:51:52.764611 scan_static_bus for USB2 port 9 done
987 13:51:52.771150 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
988 13:51:52.771302 USB3 port 0 scanning...
989 13:51:52.774802 scan_static_bus for USB3 port 0
990 13:51:52.781074 scan_static_bus for USB3 port 0 done
991 13:51:52.784647 scan_bus: scanning of bus USB3 port 0 took 9711 usecs
992 13:51:52.788171 USB3 port 1 scanning...
993 13:51:52.791702 scan_static_bus for USB3 port 1
994 13:51:52.794648 scan_static_bus for USB3 port 1 done
995 13:51:52.801126 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
996 13:51:52.801296 USB3 port 2 scanning...
997 13:51:52.804620 scan_static_bus for USB3 port 2
998 13:51:52.811460 scan_static_bus for USB3 port 2 done
999 13:51:52.814668 scan_bus: scanning of bus USB3 port 2 took 9710 usecs
1000 13:51:52.817722 USB3 port 3 scanning...
1001 13:51:52.821019 scan_static_bus for USB3 port 3
1002 13:51:52.824396 scan_static_bus for USB3 port 3 done
1003 13:51:52.831245 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
1004 13:51:52.834803 scan_static_bus for USB0 port 0 done
1005 13:51:52.840940 scan_bus: scanning of bus USB0 port 0 took 155423 usecs
1006 13:51:52.844357 scan_static_bus for PCI: 00:14.0 done
1007 13:51:52.847921 scan_bus: scanning of bus PCI: 00:14.0 took 173053 usecs
1008 13:51:52.851134 PCI: 00:15.0 scanning...
1009 13:51:52.854675 scan_generic_bus for PCI: 00:15.0
1010 13:51:52.861148 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 13:51:52.863912 scan_generic_bus for PCI: 00:15.0 done
1012 13:51:52.867381 scan_bus: scanning of bus PCI: 00:15.0 took 14277 usecs
1013 13:51:52.870987 PCI: 00:15.1 scanning...
1014 13:51:52.873889 scan_generic_bus for PCI: 00:15.1
1015 13:51:52.877446 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 13:51:52.883878 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 13:51:52.887465 scan_generic_bus for PCI: 00:15.1 done
1018 13:51:52.893925 scan_bus: scanning of bus PCI: 00:15.1 took 18605 usecs
1019 13:51:52.894088 PCI: 00:19.0 scanning...
1020 13:51:52.900374 scan_generic_bus for PCI: 00:19.0
1021 13:51:52.903954 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 13:51:52.906899 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 13:51:52.910411 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 13:51:52.913813 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 13:51:52.920657 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 13:51:52.924251 scan_generic_bus for PCI: 00:19.0 done
1027 13:51:52.930498 scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs
1028 13:51:52.930647 PCI: 00:1d.0 scanning...
1029 13:51:52.933939 do_pci_scan_bridge for PCI: 00:1d.0
1030 13:51:52.936895 PCI: pci_scan_bus for bus 01
1031 13:51:52.940464 PCI: 01:00.0 [1c5c/1327] enabled
1032 13:51:52.946789 Enabling Common Clock Configuration
1033 13:51:52.950317 L1 Sub-State supported from root port 29
1034 13:51:52.953186 L1 Sub-State Support = 0xf
1035 13:51:52.956584 CommonModeRestoreTime = 0x28
1036 13:51:52.960002 Power On Value = 0x16, Power On Scale = 0x0
1037 13:51:52.960142 ASPM: Enabled L1
1038 13:51:52.966817 scan_bus: scanning of bus PCI: 00:1d.0 took 32783 usecs
1039 13:51:52.970205 PCI: 00:1e.2 scanning...
1040 13:51:52.973801 scan_generic_bus for PCI: 00:1e.2
1041 13:51:52.976539 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1042 13:51:52.980122 scan_generic_bus for PCI: 00:1e.2 done
1043 13:51:52.986623 scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs
1044 13:51:52.990143 PCI: 00:1e.3 scanning...
1045 13:51:52.993045 scan_generic_bus for PCI: 00:1e.3
1046 13:51:52.996646 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 13:51:52.999542 scan_generic_bus for PCI: 00:1e.3 done
1048 13:51:53.006650 scan_bus: scanning of bus PCI: 00:1e.3 took 14002 usecs
1049 13:51:53.009572 PCI: 00:1f.0 scanning...
1050 13:51:53.013155 scan_static_bus for PCI: 00:1f.0
1051 13:51:53.013293 PNP: 0c09.0 enabled
1052 13:51:53.016567 scan_static_bus for PCI: 00:1f.0 done
1053 13:51:53.022989 scan_bus: scanning of bus PCI: 00:1f.0 took 12031 usecs
1054 13:51:53.026314 PCI: 00:1f.3 scanning...
1055 13:51:53.032562 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1056 13:51:53.032729 PCI: 00:1f.4 scanning...
1057 13:51:53.039396 scan_generic_bus for PCI: 00:1f.4
1058 13:51:53.042965 scan_generic_bus for PCI: 00:1f.4 done
1059 13:51:53.046480 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1060 13:51:53.049276 PCI: 00:1f.5 scanning...
1061 13:51:53.052692 scan_generic_bus for PCI: 00:1f.5
1062 13:51:53.056189 scan_generic_bus for PCI: 00:1f.5 done
1063 13:51:53.062717 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1064 13:51:53.069598 scan_bus: scanning of bus DOMAIN: 0000 took 605207 usecs
1065 13:51:53.073078 scan_static_bus for Root Device done
1066 13:51:53.079316 scan_bus: scanning of bus Root Device took 625077 usecs
1067 13:51:53.079473 done
1068 13:51:53.082798 Chrome EC: UHEPI supported
1069 13:51:53.089242 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 13:51:53.092765 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 13:51:53.099290 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 13:51:53.106423 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 13:51:53.109988 SPI flash protection: WPSW=0 SRP0=0
1074 13:51:53.116448 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 13:51:53.119925 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1076 13:51:53.122595 found VGA at PCI: 00:02.0
1077 13:51:53.126117 Setting up VGA for PCI: 00:02.0
1078 13:51:53.132951 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 13:51:53.136426 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 13:51:53.139292 Allocating resources...
1081 13:51:53.142714 Reading resources...
1082 13:51:53.146230 Root Device read_resources bus 0 link: 0
1083 13:51:53.149004 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 13:51:53.155783 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 13:51:53.159174 DOMAIN: 0000 read_resources bus 0 link: 0
1086 13:51:53.166923 PCI: 00:14.0 read_resources bus 0 link: 0
1087 13:51:53.169665 USB0 port 0 read_resources bus 0 link: 0
1088 13:51:53.177954 USB0 port 0 read_resources bus 0 link: 0 done
1089 13:51:53.181375 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 13:51:53.188564 PCI: 00:15.0 read_resources bus 1 link: 0
1091 13:51:53.192200 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 13:51:53.198480 PCI: 00:15.1 read_resources bus 2 link: 0
1093 13:51:53.201984 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 13:51:53.209089 PCI: 00:19.0 read_resources bus 3 link: 0
1095 13:51:53.216102 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 13:51:53.219655 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 13:51:53.226081 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 13:51:53.229693 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 13:51:53.236041 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 13:51:53.239501 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 13:51:53.245711 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 13:51:53.249229 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 13:51:53.256084 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 13:51:53.262244 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 13:51:53.265550 Root Device read_resources bus 0 link: 0 done
1106 13:51:53.268947 Done reading resources.
1107 13:51:53.275791 Show resources in subtree (Root Device)...After reading.
1108 13:51:53.278525 Root Device child on link 0 CPU_CLUSTER: 0
1109 13:51:53.281911 CPU_CLUSTER: 0 child on link 0 APIC: 00
1110 13:51:53.285188 APIC: 00
1111 13:51:53.285323 APIC: 01
1112 13:51:53.285432 APIC: 06
1113 13:51:53.288673 APIC: 07
1114 13:51:53.288790 APIC: 03
1115 13:51:53.288869 APIC: 02
1116 13:51:53.292076 APIC: 05
1117 13:51:53.292209 APIC: 04
1118 13:51:53.298479 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 13:51:53.305624 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 13:51:53.357942 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1121 13:51:53.358320 PCI: 00:00.0
1122 13:51:53.358456 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 13:51:53.358584 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 13:51:53.358706 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 13:51:53.358810 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 13:51:53.408173 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 13:51:53.409096 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 13:51:53.409245 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 13:51:53.409374 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 13:51:53.409491 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 13:51:53.457306 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1132 13:51:53.457652 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1133 13:51:53.457790 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1134 13:51:53.457926 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1135 13:51:53.458042 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1136 13:51:53.458179 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1137 13:51:53.478977 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1138 13:51:53.479158 PCI: 00:02.0
1139 13:51:53.482285 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1140 13:51:53.488756 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1141 13:51:53.499128 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1142 13:51:53.499301 PCI: 00:04.0
1143 13:51:53.502006 PCI: 00:08.0
1144 13:51:53.512154 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 13:51:53.512324 PCI: 00:12.0
1146 13:51:53.522287 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 13:51:53.528686 PCI: 00:14.0 child on link 0 USB0 port 0
1148 13:51:53.538660 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1149 13:51:53.542148 USB0 port 0 child on link 0 USB2 port 0
1150 13:51:53.544977 USB2 port 0
1151 13:51:53.545122 USB2 port 1
1152 13:51:53.548632 USB2 port 2
1153 13:51:53.548751 USB2 port 3
1154 13:51:53.551612 USB2 port 5
1155 13:51:53.551751 USB2 port 6
1156 13:51:53.555128 USB2 port 9
1157 13:51:53.555259 USB3 port 0
1158 13:51:53.558782 USB3 port 1
1159 13:51:53.558914 USB3 port 2
1160 13:51:53.561677 USB3 port 3
1161 13:51:53.561788 USB3 port 4
1162 13:51:53.565100 PCI: 00:14.2
1163 13:51:53.575272 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1164 13:51:53.585049 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 13:51:53.585211 PCI: 00:14.3
1166 13:51:53.595206 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 13:51:53.601438 PCI: 00:15.0 child on link 0 I2C: 01:15
1168 13:51:53.611845 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 13:51:53.612031 I2C: 01:15
1170 13:51:53.614896 PCI: 00:15.1 child on link 0 I2C: 02:5d
1171 13:51:53.624794 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 13:51:53.628421 I2C: 02:5d
1173 13:51:53.628566 GENERIC: 0.0
1174 13:51:53.631238 PCI: 00:16.0
1175 13:51:53.641142 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 13:51:53.641300 PCI: 00:17.0
1177 13:51:53.651548 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1178 13:51:53.660974 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1179 13:51:53.668155 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1180 13:51:53.677736 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1181 13:51:53.684076 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1182 13:51:53.694315 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1183 13:51:53.697731 PCI: 00:19.0 child on link 0 I2C: 03:1a
1184 13:51:53.707526 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 13:51:53.710970 I2C: 03:1a
1186 13:51:53.711129 I2C: 03:38
1187 13:51:53.714256 I2C: 03:39
1188 13:51:53.714359 I2C: 03:3a
1189 13:51:53.717717 I2C: 03:3b
1190 13:51:53.720584 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1191 13:51:53.730563 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1192 13:51:53.740632 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1193 13:51:53.746985 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1194 13:51:53.750677 PCI: 01:00.0
1195 13:51:53.760396 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 13:51:53.760571 PCI: 00:1e.0
1197 13:51:53.773364 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1198 13:51:53.783461 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 13:51:53.786888 PCI: 00:1e.2 child on link 0 SPI: 00
1200 13:51:53.796657 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 13:51:53.796793 SPI: 00
1202 13:51:53.803584 PCI: 00:1e.3 child on link 0 SPI: 01
1203 13:51:53.813392 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 13:51:53.813528 SPI: 01
1205 13:51:53.816850 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1206 13:51:53.826753 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1207 13:51:53.836697 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1208 13:51:53.836854 PNP: 0c09.0
1209 13:51:53.846618 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1210 13:51:53.846793 PCI: 00:1f.3
1211 13:51:53.856391 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 13:51:53.866325 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1213 13:51:53.869985 PCI: 00:1f.4
1214 13:51:53.879912 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1215 13:51:53.886198 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1216 13:51:53.889656 PCI: 00:1f.5
1217 13:51:53.899142 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1218 13:51:53.906000 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1219 13:51:53.912553 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1220 13:51:53.919312 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1221 13:51:53.922888 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1222 13:51:53.925573 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1223 13:51:53.929144 PCI: 00:17.0 18 * [0x60 - 0x67] io
1224 13:51:53.932569 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1225 13:51:53.939143 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1226 13:51:53.945608 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1227 13:51:53.952636 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 13:51:53.962399 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 13:51:53.968974 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 13:51:53.972644 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 13:51:53.982400 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 13:51:53.985335 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1233 13:51:53.988895 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1234 13:51:53.995790 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1235 13:51:53.998533 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1236 13:51:54.005412 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1237 13:51:54.008911 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1238 13:51:54.014978 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1239 13:51:54.018602 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1240 13:51:54.024972 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1241 13:51:54.028288 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1242 13:51:54.035269 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1243 13:51:54.038670 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1244 13:51:54.045126 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1245 13:51:54.047982 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1246 13:51:54.055182 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1247 13:51:54.058049 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1248 13:51:54.065137 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1249 13:51:54.067959 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1250 13:51:54.071616 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1251 13:51:54.078052 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1252 13:51:54.081585 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1253 13:51:54.088111 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1254 13:51:54.091653 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1255 13:51:54.101339 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1256 13:51:54.104802 avoid_fixed_resources: DOMAIN: 0000
1257 13:51:54.111078 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1258 13:51:54.117931 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1259 13:51:54.124288 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1260 13:51:54.131330 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1261 13:51:54.140974 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 13:51:54.147887 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 13:51:54.154435 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 13:51:54.164381 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 13:51:54.170761 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 13:51:54.177150 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 13:51:54.184193 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 13:51:54.193553 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 13:51:54.193719 Setting resources...
1270 13:51:54.200774 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 13:51:54.203580 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 13:51:54.207083 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1273 13:51:54.214042 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1274 13:51:54.217301 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1275 13:51:54.223381 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1276 13:51:54.230385 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1277 13:51:54.236681 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1278 13:51:54.243645 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1279 13:51:54.246953 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1280 13:51:54.253386 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1281 13:51:54.256373 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1282 13:51:54.263474 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1283 13:51:54.266298 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1284 13:51:54.273633 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1285 13:51:54.276466 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1286 13:51:54.282901 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1287 13:51:54.286342 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1288 13:51:54.292808 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1289 13:51:54.296385 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1290 13:51:54.303058 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1291 13:51:54.306710 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1292 13:51:54.313161 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1293 13:51:54.315991 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1294 13:51:54.322725 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1295 13:51:54.326175 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1296 13:51:54.329307 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1297 13:51:54.336276 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1298 13:51:54.339069 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 13:51:54.346223 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 13:51:54.349674 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 13:51:54.356015 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 13:51:54.362478 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 13:51:54.368888 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 13:51:54.379115 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 13:51:54.385493 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 13:51:54.388991 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 13:51:54.395280 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 13:51:54.402275 Root Device assign_resources, bus 0 link: 0
1309 13:51:54.405894 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 13:51:54.415189 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 13:51:54.422255 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 13:51:54.431765 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 13:51:54.438563 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 13:51:54.448251 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 13:51:54.455133 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 13:51:54.461556 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 13:51:54.465202 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 13:51:54.475056 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 13:51:54.481454 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 13:51:54.487920 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 13:51:54.498573 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 13:51:54.501421 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 13:51:54.508018 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 13:51:54.514988 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 13:51:54.521443 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 13:51:54.524921 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 13:51:54.534613 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 13:51:54.541428 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 13:51:54.547626 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 13:51:54.557872 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 13:51:54.564090 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 13:51:54.571177 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 13:51:54.580701 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 13:51:54.587240 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 13:51:54.594291 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 13:51:54.597063 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 13:51:54.607735 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 13:51:54.613565 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 13:51:54.623584 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 13:51:54.627178 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 13:51:54.637084 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1342 13:51:54.640530 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1343 13:51:54.650665 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1344 13:51:54.656691 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1345 13:51:54.660599 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1346 13:51:54.667358 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 13:51:54.673697 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1348 13:51:54.680260 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1349 13:51:54.683727 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 13:51:54.690193 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1351 13:51:54.693782 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 13:51:54.700033 LPC: Trying to open IO window from 800 size 1ff
1353 13:51:54.706550 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1354 13:51:54.716342 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1355 13:51:54.723449 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1356 13:51:54.733536 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1357 13:51:54.736422 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 13:51:54.740070 Root Device assign_resources, bus 0 link: 0
1359 13:51:54.742867 Done setting resources.
1360 13:51:54.749747 Show resources in subtree (Root Device)...After assigning values.
1361 13:51:54.753121 Root Device child on link 0 CPU_CLUSTER: 0
1362 13:51:54.759936 CPU_CLUSTER: 0 child on link 0 APIC: 00
1363 13:51:54.760083 APIC: 00
1364 13:51:54.760204 APIC: 01
1365 13:51:54.762746 APIC: 06
1366 13:51:54.762876 APIC: 07
1367 13:51:54.766162 APIC: 03
1368 13:51:54.766291 APIC: 02
1369 13:51:54.766411 APIC: 05
1370 13:51:54.769706 APIC: 04
1371 13:51:54.772626 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1372 13:51:54.782922 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1373 13:51:54.792654 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1374 13:51:54.796109 PCI: 00:00.0
1375 13:51:54.806024 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1376 13:51:54.815941 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1377 13:51:54.822356 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1378 13:51:54.832330 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1379 13:51:54.842225 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1380 13:51:54.852218 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1381 13:51:54.861938 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1382 13:51:54.872040 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1383 13:51:54.878483 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1384 13:51:54.888091 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1385 13:51:54.898536 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1386 13:51:54.908465 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1387 13:51:54.918258 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1388 13:51:54.928262 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1389 13:51:54.937727 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1390 13:51:54.944838 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1391 13:51:54.947685 PCI: 00:02.0
1392 13:51:54.957532 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1393 13:51:54.967854 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1394 13:51:54.977299 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1395 13:51:54.980714 PCI: 00:04.0
1396 13:51:54.980873 PCI: 00:08.0
1397 13:51:54.990680 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1398 13:51:54.994073 PCI: 00:12.0
1399 13:51:55.004359 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1400 13:51:55.007192 PCI: 00:14.0 child on link 0 USB0 port 0
1401 13:51:55.017083 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1402 13:51:55.024098 USB0 port 0 child on link 0 USB2 port 0
1403 13:51:55.024252 USB2 port 0
1404 13:51:55.027071 USB2 port 1
1405 13:51:55.027191 USB2 port 2
1406 13:51:55.030565 USB2 port 3
1407 13:51:55.030662 USB2 port 5
1408 13:51:55.034214 USB2 port 6
1409 13:51:55.034313 USB2 port 9
1410 13:51:55.037042 USB3 port 0
1411 13:51:55.037180 USB3 port 1
1412 13:51:55.040575 USB3 port 2
1413 13:51:55.040698 USB3 port 3
1414 13:51:55.044136 USB3 port 4
1415 13:51:55.044235 PCI: 00:14.2
1416 13:51:55.057206 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 13:51:55.066997 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 13:51:55.067170 PCI: 00:14.3
1419 13:51:55.076648 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 13:51:55.083338 PCI: 00:15.0 child on link 0 I2C: 01:15
1421 13:51:55.093204 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1422 13:51:55.093345 I2C: 01:15
1423 13:51:55.096643 PCI: 00:15.1 child on link 0 I2C: 02:5d
1424 13:51:55.109809 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1425 13:51:55.109943 I2C: 02:5d
1426 13:51:55.113196 GENERIC: 0.0
1427 13:51:55.113313 PCI: 00:16.0
1428 13:51:55.123013 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1429 13:51:55.126661 PCI: 00:17.0
1430 13:51:55.136355 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1431 13:51:55.146364 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1432 13:51:55.155746 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1433 13:51:55.162722 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1434 13:51:55.172848 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1435 13:51:55.182462 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1436 13:51:55.189140 PCI: 00:19.0 child on link 0 I2C: 03:1a
1437 13:51:55.199008 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1438 13:51:55.199160 I2C: 03:1a
1439 13:51:55.202386 I2C: 03:38
1440 13:51:55.202496 I2C: 03:39
1441 13:51:55.205792 I2C: 03:3a
1442 13:51:55.205958 I2C: 03:3b
1443 13:51:55.208665 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1444 13:51:55.218912 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1445 13:51:55.228609 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1446 13:51:55.238665 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1447 13:51:55.242242 PCI: 01:00.0
1448 13:51:55.251664 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1449 13:51:55.255256 PCI: 00:1e.0
1450 13:51:55.265178 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 13:51:55.275136 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1452 13:51:55.278590 PCI: 00:1e.2 child on link 0 SPI: 00
1453 13:51:55.288211 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1454 13:51:55.291662 SPI: 00
1455 13:51:55.295024 PCI: 00:1e.3 child on link 0 SPI: 01
1456 13:51:55.304768 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1457 13:51:55.304914 SPI: 01
1458 13:51:55.311714 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1459 13:51:55.317774 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1460 13:51:55.328071 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1461 13:51:55.331476 PNP: 0c09.0
1462 13:51:55.337778 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1463 13:51:55.341233 PCI: 00:1f.3
1464 13:51:55.351347 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1465 13:51:55.361149 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1466 13:51:55.363948 PCI: 00:1f.4
1467 13:51:55.370988 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1468 13:51:55.380889 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1469 13:51:55.383787 PCI: 00:1f.5
1470 13:51:55.394132 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1471 13:51:55.397627 Done allocating resources.
1472 13:51:55.400242 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1473 13:51:55.404336 Enabling resources...
1474 13:51:55.410654 PCI: 00:00.0 subsystem <- 8086/9b61
1475 13:51:55.410759 PCI: 00:00.0 cmd <- 06
1476 13:51:55.414060 PCI: 00:02.0 subsystem <- 8086/9b41
1477 13:51:55.417616 PCI: 00:02.0 cmd <- 03
1478 13:51:55.420962 PCI: 00:08.0 cmd <- 06
1479 13:51:55.424295 PCI: 00:12.0 subsystem <- 8086/02f9
1480 13:51:55.427619 PCI: 00:12.0 cmd <- 02
1481 13:51:55.431081 PCI: 00:14.0 subsystem <- 8086/02ed
1482 13:51:55.433817 PCI: 00:14.0 cmd <- 02
1483 13:51:55.437327 PCI: 00:14.2 cmd <- 02
1484 13:51:55.440701 PCI: 00:14.3 subsystem <- 8086/02f0
1485 13:51:55.440823 PCI: 00:14.3 cmd <- 02
1486 13:51:55.447766 PCI: 00:15.0 subsystem <- 8086/02e8
1487 13:51:55.447904 PCI: 00:15.0 cmd <- 02
1488 13:51:55.450641 PCI: 00:15.1 subsystem <- 8086/02e9
1489 13:51:55.454067 PCI: 00:15.1 cmd <- 02
1490 13:51:55.457528 PCI: 00:16.0 subsystem <- 8086/02e0
1491 13:51:55.461086 PCI: 00:16.0 cmd <- 02
1492 13:51:55.463981 PCI: 00:17.0 subsystem <- 8086/02d3
1493 13:51:55.466918 PCI: 00:17.0 cmd <- 03
1494 13:51:55.470648 PCI: 00:19.0 subsystem <- 8086/02c5
1495 13:51:55.474049 PCI: 00:19.0 cmd <- 02
1496 13:51:55.477400 PCI: 00:1d.0 bridge ctrl <- 0013
1497 13:51:55.480201 PCI: 00:1d.0 subsystem <- 8086/02b0
1498 13:51:55.483755 PCI: 00:1d.0 cmd <- 06
1499 13:51:55.487364 PCI: 00:1e.0 subsystem <- 8086/02a8
1500 13:51:55.490125 PCI: 00:1e.0 cmd <- 06
1501 13:51:55.493740 PCI: 00:1e.2 subsystem <- 8086/02aa
1502 13:51:55.497242 PCI: 00:1e.2 cmd <- 06
1503 13:51:55.500029 PCI: 00:1e.3 subsystem <- 8086/02ab
1504 13:51:55.500160 PCI: 00:1e.3 cmd <- 02
1505 13:51:55.506780 PCI: 00:1f.0 subsystem <- 8086/0284
1506 13:51:55.506920 PCI: 00:1f.0 cmd <- 407
1507 13:51:55.513659 PCI: 00:1f.3 subsystem <- 8086/02c8
1508 13:51:55.513765 PCI: 00:1f.3 cmd <- 02
1509 13:51:55.517094 PCI: 00:1f.4 subsystem <- 8086/02a3
1510 13:51:55.520557 PCI: 00:1f.4 cmd <- 03
1511 13:51:55.523293 PCI: 00:1f.5 subsystem <- 8086/02a4
1512 13:51:55.526751 PCI: 00:1f.5 cmd <- 406
1513 13:51:55.535692 PCI: 01:00.0 cmd <- 02
1514 13:51:55.541259 done.
1515 13:51:55.551654 ME: Version: 14.0.39.1367
1516 13:51:55.558650 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1517 13:51:55.561500 Initializing devices...
1518 13:51:55.561643 Root Device init ...
1519 13:51:55.568594 Chrome EC: Set SMI mask to 0x0000000000000000
1520 13:51:55.571393 Chrome EC: clear events_b mask to 0x0000000000000000
1521 13:51:55.578471 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1522 13:51:55.584643 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1523 13:51:55.591661 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1524 13:51:55.594580 Chrome EC: Set WAKE mask to 0x0000000000000000
1525 13:51:55.598103 Root Device init finished in 35190 usecs
1526 13:51:55.601509 CPU_CLUSTER: 0 init ...
1527 13:51:55.608220 CPU_CLUSTER: 0 init finished in 2449 usecs
1528 13:51:55.612769 PCI: 00:00.0 init ...
1529 13:51:55.615528 CPU TDP: 15 Watts
1530 13:51:55.618883 CPU PL2 = 64 Watts
1531 13:51:55.622364 PCI: 00:00.0 init finished in 7083 usecs
1532 13:51:55.625905 PCI: 00:02.0 init ...
1533 13:51:55.629281 PCI: 00:02.0 init finished in 2254 usecs
1534 13:51:55.632055 PCI: 00:08.0 init ...
1535 13:51:55.635582 PCI: 00:08.0 init finished in 2252 usecs
1536 13:51:55.639035 PCI: 00:12.0 init ...
1537 13:51:55.642468 PCI: 00:12.0 init finished in 2244 usecs
1538 13:51:55.645931 PCI: 00:14.0 init ...
1539 13:51:55.648728 PCI: 00:14.0 init finished in 2253 usecs
1540 13:51:55.651982 PCI: 00:14.2 init ...
1541 13:51:55.655507 PCI: 00:14.2 init finished in 2254 usecs
1542 13:51:55.658949 PCI: 00:14.3 init ...
1543 13:51:55.662523 PCI: 00:14.3 init finished in 2272 usecs
1544 13:51:55.665406 PCI: 00:15.0 init ...
1545 13:51:55.668824 DW I2C bus 0 at 0xd121f000 (400 KHz)
1546 13:51:55.671759 PCI: 00:15.0 init finished in 5978 usecs
1547 13:51:55.675394 PCI: 00:15.1 init ...
1548 13:51:55.679017 DW I2C bus 1 at 0xd1220000 (400 KHz)
1549 13:51:55.685135 PCI: 00:15.1 init finished in 5979 usecs
1550 13:51:55.685287 PCI: 00:16.0 init ...
1551 13:51:55.692048 PCI: 00:16.0 init finished in 2254 usecs
1552 13:51:55.694844 PCI: 00:19.0 init ...
1553 13:51:55.698449 DW I2C bus 4 at 0xd1222000 (400 KHz)
1554 13:51:55.701940 PCI: 00:19.0 init finished in 5976 usecs
1555 13:51:55.704977 PCI: 00:1d.0 init ...
1556 13:51:55.708290 Initializing PCH PCIe bridge.
1557 13:51:55.711757 PCI: 00:1d.0 init finished in 5285 usecs
1558 13:51:55.715153 PCI: 00:1f.0 init ...
1559 13:51:55.718544 IOAPIC: Initializing IOAPIC at 0xfec00000
1560 13:51:55.725126 IOAPIC: Bootstrap Processor Local APIC = 0x00
1561 13:51:55.725319 IOAPIC: ID = 0x02
1562 13:51:55.727835 IOAPIC: Dumping registers
1563 13:51:55.731160 reg 0x0000: 0x02000000
1564 13:51:55.734717 reg 0x0001: 0x00770020
1565 13:51:55.734843 reg 0x0002: 0x00000000
1566 13:51:55.741664 PCI: 00:1f.0 init finished in 23535 usecs
1567 13:51:55.744517 PCI: 00:1f.4 init ...
1568 13:51:55.747973 PCI: 00:1f.4 init finished in 2263 usecs
1569 13:51:55.759015 PCI: 01:00.0 init ...
1570 13:51:55.761779 PCI: 01:00.0 init finished in 2254 usecs
1571 13:51:55.765945 PNP: 0c09.0 init ...
1572 13:51:55.769587 Google Chrome EC uptime: 11.051 seconds
1573 13:51:55.776050 Google Chrome AP resets since EC boot: 0
1574 13:51:55.779613 Google Chrome most recent AP reset causes:
1575 13:51:55.785998 Google Chrome EC reset flags at last EC boot: reset-pin
1576 13:51:55.789450 PNP: 0c09.0 init finished in 20577 usecs
1577 13:51:55.792850 Devices initialized
1578 13:51:55.792991 Show all devs... After init.
1579 13:51:55.796355 Root Device: enabled 1
1580 13:51:55.799215 CPU_CLUSTER: 0: enabled 1
1581 13:51:55.802883 DOMAIN: 0000: enabled 1
1582 13:51:55.802999 APIC: 00: enabled 1
1583 13:51:55.805796 PCI: 00:00.0: enabled 1
1584 13:51:55.809323 PCI: 00:02.0: enabled 1
1585 13:51:55.812257 PCI: 00:04.0: enabled 0
1586 13:51:55.812349 PCI: 00:05.0: enabled 0
1587 13:51:55.815922 PCI: 00:12.0: enabled 1
1588 13:51:55.819547 PCI: 00:12.5: enabled 0
1589 13:51:55.819693 PCI: 00:12.6: enabled 0
1590 13:51:55.822241 PCI: 00:14.0: enabled 1
1591 13:51:55.825652 PCI: 00:14.1: enabled 0
1592 13:51:55.829055 PCI: 00:14.3: enabled 1
1593 13:51:55.829193 PCI: 00:14.5: enabled 0
1594 13:51:55.832075 PCI: 00:15.0: enabled 1
1595 13:51:55.835931 PCI: 00:15.1: enabled 1
1596 13:51:55.838739 PCI: 00:15.2: enabled 0
1597 13:51:55.838863 PCI: 00:15.3: enabled 0
1598 13:51:55.842256 PCI: 00:16.0: enabled 1
1599 13:51:55.845696 PCI: 00:16.1: enabled 0
1600 13:51:55.849179 PCI: 00:16.2: enabled 0
1601 13:51:55.849302 PCI: 00:16.3: enabled 0
1602 13:51:55.852658 PCI: 00:16.4: enabled 0
1603 13:51:55.855430 PCI: 00:16.5: enabled 0
1604 13:51:55.858801 PCI: 00:17.0: enabled 1
1605 13:51:55.858940 PCI: 00:19.0: enabled 1
1606 13:51:55.862113 PCI: 00:19.1: enabled 0
1607 13:51:55.865532 PCI: 00:19.2: enabled 0
1608 13:51:55.865677 PCI: 00:1a.0: enabled 0
1609 13:51:55.869026 PCI: 00:1c.0: enabled 0
1610 13:51:55.871852 PCI: 00:1c.1: enabled 0
1611 13:51:55.875406 PCI: 00:1c.2: enabled 0
1612 13:51:55.875551 PCI: 00:1c.3: enabled 0
1613 13:51:55.879057 PCI: 00:1c.4: enabled 0
1614 13:51:55.881898 PCI: 00:1c.5: enabled 0
1615 13:51:55.885564 PCI: 00:1c.6: enabled 0
1616 13:51:55.885670 PCI: 00:1c.7: enabled 0
1617 13:51:55.888852 PCI: 00:1d.0: enabled 1
1618 13:51:55.891666 PCI: 00:1d.1: enabled 0
1619 13:51:55.895103 PCI: 00:1d.2: enabled 0
1620 13:51:55.895235 PCI: 00:1d.3: enabled 0
1621 13:51:55.898597 PCI: 00:1d.4: enabled 0
1622 13:51:55.902123 PCI: 00:1d.5: enabled 0
1623 13:51:55.902235 PCI: 00:1e.0: enabled 1
1624 13:51:55.904979 PCI: 00:1e.1: enabled 0
1625 13:51:55.908599 PCI: 00:1e.2: enabled 1
1626 13:51:55.911615 PCI: 00:1e.3: enabled 1
1627 13:51:55.911706 PCI: 00:1f.0: enabled 1
1628 13:51:55.915067 PCI: 00:1f.1: enabled 0
1629 13:51:55.918607 PCI: 00:1f.2: enabled 0
1630 13:51:55.921574 PCI: 00:1f.3: enabled 1
1631 13:51:55.921738 PCI: 00:1f.4: enabled 1
1632 13:51:55.924964 PCI: 00:1f.5: enabled 1
1633 13:51:55.928619 PCI: 00:1f.6: enabled 0
1634 13:51:55.931974 USB0 port 0: enabled 1
1635 13:51:55.932065 I2C: 01:15: enabled 1
1636 13:51:55.934727 I2C: 02:5d: enabled 1
1637 13:51:55.938186 GENERIC: 0.0: enabled 1
1638 13:51:55.938326 I2C: 03:1a: enabled 1
1639 13:51:55.941642 I2C: 03:38: enabled 1
1640 13:51:55.945007 I2C: 03:39: enabled 1
1641 13:51:55.945144 I2C: 03:3a: enabled 1
1642 13:51:55.948048 I2C: 03:3b: enabled 1
1643 13:51:55.951280 PCI: 00:00.0: enabled 1
1644 13:51:55.951413 SPI: 00: enabled 1
1645 13:51:55.954910 SPI: 01: enabled 1
1646 13:51:55.958293 PNP: 0c09.0: enabled 1
1647 13:51:55.958429 USB2 port 0: enabled 1
1648 13:51:55.961780 USB2 port 1: enabled 1
1649 13:51:55.964510 USB2 port 2: enabled 0
1650 13:51:55.964645 USB2 port 3: enabled 0
1651 13:51:55.968000 USB2 port 5: enabled 0
1652 13:51:55.971519 USB2 port 6: enabled 1
1653 13:51:55.974866 USB2 port 9: enabled 1
1654 13:51:55.974974 USB3 port 0: enabled 1
1655 13:51:55.978195 USB3 port 1: enabled 1
1656 13:51:55.981143 USB3 port 2: enabled 1
1657 13:51:55.981276 USB3 port 3: enabled 1
1658 13:51:55.984719 USB3 port 4: enabled 0
1659 13:51:55.988187 APIC: 01: enabled 1
1660 13:51:55.988327 APIC: 06: enabled 1
1661 13:51:55.991101 APIC: 07: enabled 1
1662 13:51:55.994701 APIC: 03: enabled 1
1663 13:51:55.994797 APIC: 02: enabled 1
1664 13:51:55.997572 APIC: 05: enabled 1
1665 13:51:55.997687 APIC: 04: enabled 1
1666 13:51:56.000813 PCI: 00:08.0: enabled 1
1667 13:51:56.004225 PCI: 00:14.2: enabled 1
1668 13:51:56.007796 PCI: 01:00.0: enabled 1
1669 13:51:56.011436 Disabling ACPI via APMC:
1670 13:51:56.011561 done.
1671 13:51:56.018127 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 13:51:56.020939 ELOG: NV offset 0xaf0000 size 0x4000
1673 13:51:56.027344 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 13:51:56.034421 ELOG: Event(17) added with size 13 at 2023-04-20 13:51:56 UTC
1675 13:51:56.041322 ELOG: Event(92) added with size 9 at 2023-04-20 13:51:56 UTC
1676 13:51:56.047382 ELOG: Event(93) added with size 9 at 2023-04-20 13:51:56 UTC
1677 13:51:56.054536 ELOG: Event(9A) added with size 9 at 2023-04-20 13:51:56 UTC
1678 13:51:56.060838 ELOG: Event(9E) added with size 10 at 2023-04-20 13:51:56 UTC
1679 13:51:56.067793 ELOG: Event(9F) added with size 14 at 2023-04-20 13:51:56 UTC
1680 13:51:56.070515 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1681 13:51:56.078013 ELOG: Event(A1) added with size 10 at 2023-04-20 13:51:56 UTC
1682 13:51:56.088316 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1683 13:51:56.094678 ELOG: Event(A0) added with size 9 at 2023-04-20 13:51:56 UTC
1684 13:51:56.098219 elog_add_boot_reason: Logged dev mode boot
1685 13:51:56.100975 Finalize devices...
1686 13:51:56.101075 PCI: 00:17.0 final
1687 13:51:56.104241 Devices finalized
1688 13:51:56.107861 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1689 13:51:56.114245 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1690 13:51:56.117668 ME: HFSTS1 : 0x90000245
1691 13:51:56.121163 ME: HFSTS2 : 0x3B850126
1692 13:51:56.127651 ME: HFSTS3 : 0x00000020
1693 13:51:56.131103 ME: HFSTS4 : 0x00004800
1694 13:51:56.133891 ME: HFSTS5 : 0x00000000
1695 13:51:56.137546 ME: HFSTS6 : 0x40400006
1696 13:51:56.141105 ME: Manufacturing Mode : NO
1697 13:51:56.143903 ME: FW Partition Table : OK
1698 13:51:56.147293 ME: Bringup Loader Failure : NO
1699 13:51:56.150790 ME: Firmware Init Complete : YES
1700 13:51:56.154044 ME: Boot Options Present : NO
1701 13:51:56.157505 ME: Update In Progress : NO
1702 13:51:56.160866 ME: D0i3 Support : YES
1703 13:51:56.164092 ME: Low Power State Enabled : NO
1704 13:51:56.167572 ME: CPU Replaced : NO
1705 13:51:56.170353 ME: CPU Replacement Valid : YES
1706 13:51:56.173869 ME: Current Working State : 5
1707 13:51:56.177382 ME: Current Operation State : 1
1708 13:51:56.180247 ME: Current Operation Mode : 0
1709 13:51:56.183720 ME: Error Code : 0
1710 13:51:56.186951 ME: CPU Debug Disabled : YES
1711 13:51:56.190288 ME: TXT Support : NO
1712 13:51:56.197048 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1713 13:51:56.203935 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1714 13:51:56.204075 CBFS @ c08000 size 3f8000
1715 13:51:56.210191 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1716 13:51:56.213720 CBFS: Locating 'fallback/dsdt.aml'
1717 13:51:56.217166 CBFS: Found @ offset 10bb80 size 3fa5
1718 13:51:56.223505 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1719 13:51:56.226391 CBFS @ c08000 size 3f8000
1720 13:51:56.233351 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1721 13:51:56.236310 CBFS: Locating 'fallback/slic'
1722 13:51:56.239905 CBFS: 'fallback/slic' not found.
1723 13:51:56.242822 ACPI: Writing ACPI tables at 99b3e000.
1724 13:51:56.246371 ACPI: * FACS
1725 13:51:56.246509 ACPI: * DSDT
1726 13:51:56.249858 Ramoops buffer: 0x100000@0x99a3d000.
1727 13:51:56.256249 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1728 13:51:56.259562 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1729 13:51:56.262939 Google Chrome EC: version:
1730 13:51:56.266401 ro: helios_v2.0.2659-56403530b
1731 13:51:56.269680 rw: helios_v2.0.2849-c41de27e7d
1732 13:51:56.273149 running image: 1
1733 13:51:56.275891 ACPI: * FADT
1734 13:51:56.276020 SCI is IRQ9
1735 13:51:56.279448 ACPI: added table 1/32, length now 40
1736 13:51:56.283023 ACPI: * SSDT
1737 13:51:56.285874 Found 1 CPU(s) with 8 core(s) each.
1738 13:51:56.289327 Error: Could not locate 'wifi_sar' in VPD.
1739 13:51:56.296147 Checking CBFS for default SAR values
1740 13:51:56.299663 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1741 13:51:56.302906 CBFS @ c08000 size 3f8000
1742 13:51:56.309203 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1743 13:51:56.312589 CBFS: Locating 'wifi_sar_defaults.hex'
1744 13:51:56.316047 CBFS: Found @ offset 5fac0 size 77
1745 13:51:56.318896 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1746 13:51:56.322401 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1747 13:51:56.328842 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1748 13:51:56.335935 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1749 13:51:56.338804 failed to find key in VPD: dsm_calib_r0_0
1750 13:51:56.348922 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1751 13:51:56.352433 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1752 13:51:56.355211 failed to find key in VPD: dsm_calib_r0_1
1753 13:51:56.365607 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1754 13:51:56.372318 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1755 13:51:56.374999 failed to find key in VPD: dsm_calib_r0_2
1756 13:51:56.385636 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1757 13:51:56.388209 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1758 13:51:56.395297 failed to find key in VPD: dsm_calib_r0_3
1759 13:51:56.401432 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1760 13:51:56.408253 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1761 13:51:56.411632 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1762 13:51:56.415205 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1763 13:51:56.418600 EC returned error result code 1
1764 13:51:56.422813 EC returned error result code 1
1765 13:51:56.426311 EC returned error result code 1
1766 13:51:56.432738 PS2K: Bad resp from EC. Vivaldi disabled!
1767 13:51:56.436301 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1768 13:51:56.442891 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1769 13:51:56.449874 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1770 13:51:56.452639 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1771 13:51:56.459713 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1772 13:51:56.466149 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1773 13:51:56.472447 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1774 13:51:56.475809 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1775 13:51:56.482419 ACPI: added table 2/32, length now 44
1776 13:51:56.482565 ACPI: * MCFG
1777 13:51:56.485760 ACPI: added table 3/32, length now 48
1778 13:51:56.489208 ACPI: * TPM2
1779 13:51:56.492854 TPM2 log created at 99a2d000
1780 13:51:56.495640 ACPI: added table 4/32, length now 52
1781 13:51:56.495812 ACPI: * MADT
1782 13:51:56.499204 SCI is IRQ9
1783 13:51:56.502131 ACPI: added table 5/32, length now 56
1784 13:51:56.502260 current = 99b43ac0
1785 13:51:56.505559 ACPI: * DMAR
1786 13:51:56.508946 ACPI: added table 6/32, length now 60
1787 13:51:56.512293 ACPI: * IGD OpRegion
1788 13:51:56.512398 GMA: Found VBT in CBFS
1789 13:51:56.515854 GMA: Found valid VBT in CBFS
1790 13:51:56.522183 ACPI: added table 7/32, length now 64
1791 13:51:56.522351 ACPI: * HPET
1792 13:51:56.525685 ACPI: added table 8/32, length now 68
1793 13:51:56.528535 ACPI: done.
1794 13:51:56.528669 ACPI tables: 31744 bytes.
1795 13:51:56.532520 smbios_write_tables: 99a2c000
1796 13:51:56.536123 EC returned error result code 3
1797 13:51:56.539050 Couldn't obtain OEM name from CBI
1798 13:51:56.542592 Create SMBIOS type 17
1799 13:51:56.546145 PCI: 00:00.0 (Intel Cannonlake)
1800 13:51:56.548988 PCI: 00:14.3 (Intel WiFi)
1801 13:51:56.552582 SMBIOS tables: 939 bytes.
1802 13:51:56.556090 Writing table forward entry at 0x00000500
1803 13:51:56.562640 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1804 13:51:56.565532 Writing coreboot table at 0x99b62000
1805 13:51:56.571949 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1806 13:51:56.575427 1. 0000000000001000-000000000009ffff: RAM
1807 13:51:56.579032 2. 00000000000a0000-00000000000fffff: RESERVED
1808 13:51:56.585731 3. 0000000000100000-0000000099a2bfff: RAM
1809 13:51:56.591919 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1810 13:51:56.595186 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1811 13:51:56.602053 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1812 13:51:56.604953 7. 000000009a000000-000000009f7fffff: RESERVED
1813 13:51:56.611904 8. 00000000e0000000-00000000efffffff: RESERVED
1814 13:51:56.615237 9. 00000000fc000000-00000000fc000fff: RESERVED
1815 13:51:56.621372 10. 00000000fe000000-00000000fe00ffff: RESERVED
1816 13:51:56.624766 11. 00000000fed10000-00000000fed17fff: RESERVED
1817 13:51:56.628230 12. 00000000fed80000-00000000fed83fff: RESERVED
1818 13:51:56.635139 13. 00000000fed90000-00000000fed91fff: RESERVED
1819 13:51:56.637911 14. 00000000feda0000-00000000feda1fff: RESERVED
1820 13:51:56.645035 15. 0000000100000000-000000045e7fffff: RAM
1821 13:51:56.647805 Graphics framebuffer located at 0xc0000000
1822 13:51:56.651315 Passing 5 GPIOs to payload:
1823 13:51:56.654874 NAME | PORT | POLARITY | VALUE
1824 13:51:56.661220 write protect | undefined | high | low
1825 13:51:56.668266 lid | undefined | high | high
1826 13:51:56.671122 power | undefined | high | low
1827 13:51:56.678057 oprom | undefined | high | low
1828 13:51:56.680928 EC in RW | 0x000000cb | high | low
1829 13:51:56.684619 Board ID: 4
1830 13:51:56.688095 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1831 13:51:56.691530 CBFS @ c08000 size 3f8000
1832 13:51:56.697671 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1833 13:51:56.704405 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1834 13:51:56.704569 coreboot table: 1492 bytes.
1835 13:51:56.708031 IMD ROOT 0. 99fff000 00001000
1836 13:51:56.710895 IMD SMALL 1. 99ffe000 00001000
1837 13:51:56.714519 FSP MEMORY 2. 99c4e000 003b0000
1838 13:51:56.717857 CONSOLE 3. 99c2e000 00020000
1839 13:51:56.721182 FMAP 4. 99c2d000 0000054e
1840 13:51:56.723914 TIME STAMP 5. 99c2c000 00000910
1841 13:51:56.727233 VBOOT WORK 6. 99c18000 00014000
1842 13:51:56.730798 MRC DATA 7. 99c16000 00001958
1843 13:51:56.734113 ROMSTG STCK 8. 99c15000 00001000
1844 13:51:56.737458 AFTER CAR 9. 99c0b000 0000a000
1845 13:51:56.740912 RAMSTAGE 10. 99baf000 0005c000
1846 13:51:56.744233 REFCODE 11. 99b7a000 00035000
1847 13:51:56.747133 SMM BACKUP 12. 99b6a000 00010000
1848 13:51:56.750651 COREBOOT 13. 99b62000 00008000
1849 13:51:56.754162 ACPI 14. 99b3e000 00024000
1850 13:51:56.760596 ACPI GNVS 15. 99b3d000 00001000
1851 13:51:56.764096 RAMOOPS 16. 99a3d000 00100000
1852 13:51:56.767667 TPM2 TCGLOG17. 99a2d000 00010000
1853 13:51:56.770556 SMBIOS 18. 99a2c000 00000800
1854 13:51:56.770670 IMD small region:
1855 13:51:56.774031 IMD ROOT 0. 99ffec00 00000400
1856 13:51:56.777584 FSP RUNTIME 1. 99ffebe0 00000004
1857 13:51:56.780261 EC HOSTEVENT 2. 99ffebc0 00000008
1858 13:51:56.783774 POWER STATE 3. 99ffeb80 00000040
1859 13:51:56.787269 ROMSTAGE 4. 99ffeb60 00000004
1860 13:51:56.793409 MEM INFO 5. 99ffe9a0 000001b9
1861 13:51:56.796900 VPD 6. 99ffe920 0000006c
1862 13:51:56.800074 MTRR: Physical address space:
1863 13:51:56.803459 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1864 13:51:56.810153 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1865 13:51:56.816905 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1866 13:51:56.823181 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1867 13:51:56.830200 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1868 13:51:56.836872 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1869 13:51:56.843278 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1870 13:51:56.846797 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 13:51:56.850010 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 13:51:56.853622 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 13:51:56.860007 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 13:51:56.862844 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 13:51:56.866451 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 13:51:56.869968 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 13:51:56.876332 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 13:51:56.879691 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 13:51:56.883249 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 13:51:56.886146 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 13:51:56.889793 call enable_fixed_mtrr()
1882 13:51:56.893440 CPU physical address size: 39 bits
1883 13:51:56.899743 MTRR: default type WB/UC MTRR counts: 6/8.
1884 13:51:56.903214 MTRR: WB selected as default type.
1885 13:51:56.910225 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1886 13:51:56.913412 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1887 13:51:56.919788 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1888 13:51:56.925947 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1889 13:51:56.933180 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1890 13:51:56.939528 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1891 13:51:56.942850 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 13:51:56.949635 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 13:51:56.953110 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 13:51:56.955762 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 13:51:56.959202 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 13:51:56.966330 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 13:51:56.969190 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 13:51:56.972679 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 13:51:56.975572 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 13:51:56.982604 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 13:51:56.986065 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 13:51:56.986190
1903 13:51:56.986295 MTRR check
1904 13:51:56.989022 Fixed MTRRs : Enabled
1905 13:51:56.992607 Variable MTRRs: Enabled
1906 13:51:56.992735
1907 13:51:56.995535 call enable_fixed_mtrr()
1908 13:51:56.999157 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1909 13:51:57.002059 CPU physical address size: 39 bits
1910 13:51:57.009162 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1911 13:51:57.012590 MTRR: Fixed MSR 0x250 0x0606060606060606
1912 13:51:57.015803 MTRR: Fixed MSR 0x250 0x0606060606060606
1913 13:51:57.022647 MTRR: Fixed MSR 0x258 0x0606060606060606
1914 13:51:57.026001 MTRR: Fixed MSR 0x259 0x0000000000000000
1915 13:51:57.029326 MTRR: Fixed MSR 0x268 0x0606060606060606
1916 13:51:57.032176 MTRR: Fixed MSR 0x269 0x0606060606060606
1917 13:51:57.038610 MTRR: Fixed MSR 0x26a 0x0606060606060606
1918 13:51:57.042051 MTRR: Fixed MSR 0x26b 0x0606060606060606
1919 13:51:57.045618 MTRR: Fixed MSR 0x26c 0x0606060606060606
1920 13:51:57.049087 MTRR: Fixed MSR 0x26d 0x0606060606060606
1921 13:51:57.055247 MTRR: Fixed MSR 0x26e 0x0606060606060606
1922 13:51:57.058461 MTRR: Fixed MSR 0x26f 0x0606060606060606
1923 13:51:57.062112 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 13:51:57.064977 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 13:51:57.071997 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 13:51:57.074892 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 13:51:57.078695 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 13:51:57.081424 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 13:51:57.087928 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 13:51:57.091293 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 13:51:57.094966 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 13:51:57.097950 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 13:51:57.101361 call enable_fixed_mtrr()
1934 13:51:57.104257 call enable_fixed_mtrr()
1935 13:51:57.107811 CBFS @ c08000 size 3f8000
1936 13:51:57.114146 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1937 13:51:57.117690 CBFS: Locating 'fallback/payload'
1938 13:51:57.121037 CPU physical address size: 39 bits
1939 13:51:57.124315 CPU physical address size: 39 bits
1940 13:51:57.127802 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 13:51:57.130575 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 13:51:57.134061 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 13:51:57.141037 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 13:51:57.144339 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 13:51:57.147253 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 13:51:57.150802 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 13:51:57.156956 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 13:51:57.160338 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 13:51:57.163663 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 13:51:57.167016 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 13:51:57.173924 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 13:51:57.177227 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 13:51:57.180627 call enable_fixed_mtrr()
1954 13:51:57.183495 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 13:51:57.187025 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 13:51:57.190573 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 13:51:57.197061 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 13:51:57.199944 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 13:51:57.203450 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 13:51:57.206368 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 13:51:57.213358 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 13:51:57.216256 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 13:51:57.219941 CBFS: Found @ offset 1c96c0 size 3f798
1964 13:51:57.223407 CPU physical address size: 39 bits
1965 13:51:57.226864 call enable_fixed_mtrr()
1966 13:51:57.229575 Checking segment from ROM address 0xffdd16f8
1967 13:51:57.233514 CPU physical address size: 39 bits
1968 13:51:57.239553 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 13:51:57.242899 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 13:51:57.246547 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 13:51:57.249343 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 13:51:57.256394 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 13:51:57.259260 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 13:51:57.262576 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 13:51:57.266231 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 13:51:57.272421 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 13:51:57.276223 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 13:51:57.278912 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 13:51:57.282271 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 13:51:57.285674 call enable_fixed_mtrr()
1981 13:51:57.288960 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 13:51:57.295586 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 13:51:57.299027 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 13:51:57.302026 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 13:51:57.305665 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 13:51:57.312055 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 13:51:57.315707 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 13:51:57.319156 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 13:51:57.321988 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 13:51:57.328562 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 13:51:57.331922 CPU physical address size: 39 bits
1992 13:51:57.335310 call enable_fixed_mtrr()
1993 13:51:57.338768 Checking segment from ROM address 0xffdd1714
1994 13:51:57.342054 CPU physical address size: 39 bits
1995 13:51:57.345393 Loading segment from ROM address 0xffdd16f8
1996 13:51:57.348591 code (compression=0)
1997 13:51:57.358197 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1998 13:51:57.365178 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1999 13:51:57.368627 it's not compressed!
2000 13:51:57.459766 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2001 13:51:57.466853 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2002 13:51:57.469625 Loading segment from ROM address 0xffdd1714
2003 13:51:57.473136 Entry Point 0x30000000
2004 13:51:57.476757 Loaded segments
2005 13:51:57.481833 Finalizing chipset.
2006 13:51:57.485284 Finalizing SMM.
2007 13:51:57.488753 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2008 13:51:57.492124 mp_park_aps done after 0 msecs.
2009 13:51:57.498233 Jumping to boot code at 30000000(99b62000)
2010 13:51:57.505193 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2011 13:51:57.505343
2012 13:51:57.505458
2013 13:51:57.505564
2014 13:51:57.508602 Starting depthcharge on Helios...
2015 13:51:57.508694
2016 13:51:57.509046 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2017 13:51:57.509156 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2018 13:51:57.509253 Setting prompt string to ['hatch:']
2019 13:51:57.509343 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2020 13:51:57.518287 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2021 13:51:57.518447
2022 13:51:57.524684 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2023 13:51:57.524820
2024 13:51:57.531629 board_setup: Info: eMMC controller not present; skipping
2025 13:51:57.531777
2026 13:51:57.534698 New NVMe Controller 0x30053ac0 @ 00:1d:00
2027 13:51:57.534839
2028 13:51:57.541451 board_setup: Info: SDHCI controller not present; skipping
2029 13:51:57.541604
2030 13:51:57.547638 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2031 13:51:57.547813
2032 13:51:57.547950 Wipe memory regions:
2033 13:51:57.548066
2034 13:51:57.551138 [0x00000000001000, 0x000000000a0000)
2035 13:51:57.551257
2036 13:51:57.557398 [0x00000000100000, 0x00000030000000)
2037 13:51:57.621232
2038 13:51:57.624061 [0x00000030657430, 0x00000099a2c000)
2039 13:51:57.770665
2040 13:51:57.774051 [0x00000100000000, 0x0000045e800000)
2041 13:51:59.230082
2042 13:51:59.230255 R8152: Initializing
2043 13:51:59.230338
2044 13:51:59.233326 Version 9 (ocp_data = 6010)
2045 13:51:59.237430
2046 13:51:59.237566 R8152: Done initializing
2047 13:51:59.237696
2048 13:51:59.240990 Adding net device
2049 13:51:59.723966
2050 13:51:59.724121 R8152: Initializing
2051 13:51:59.724218
2052 13:51:59.727177 Version 6 (ocp_data = 5c30)
2053 13:51:59.727291
2054 13:51:59.729994 R8152: Done initializing
2055 13:51:59.730148
2056 13:51:59.733355 net_add_device: Attemp to include the same device
2057 13:51:59.737015
2058 13:51:59.744045 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2059 13:51:59.744169
2060 13:51:59.744277
2061 13:51:59.744378
2062 13:51:59.744709 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2064 13:51:59.845226 hatch: tftpboot 192.168.201.1 10062394/tftp-deploy-4m_x5y47/kernel/bzImage 10062394/tftp-deploy-4m_x5y47/kernel/cmdline 10062394/tftp-deploy-4m_x5y47/ramdisk/ramdisk.cpio.gz
2065 13:51:59.845398 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2066 13:51:59.845492 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2067 13:51:59.850541 tftpboot 192.168.201.1 10062394/tftp-deploy-4m_x5y47/kernel/bzIploy-4m_x5y47/kernel/cmdline 10062394/tftp-deploy-4m_x5y47/ramdisk/ramdisk.cpio.gz
2068 13:51:59.850668
2069 13:51:59.850744 Waiting for link
2070 13:52:00.050764
2071 13:52:00.050953 done.
2072 13:52:00.051061
2073 13:52:00.051169 MAC: 00:24:32:50:1a:59
2074 13:52:00.051281
2075 13:52:00.053953 Sending DHCP discover... done.
2076 13:52:00.054089
2077 13:52:00.057532 Waiting for reply... done.
2078 13:52:00.057687
2079 13:52:00.061084 Sending DHCP request... done.
2080 13:52:00.061253
2081 13:52:00.063763 Waiting for reply... done.
2082 13:52:00.063925
2083 13:52:00.067060 My ip is 192.168.201.14
2084 13:52:00.067210
2085 13:52:00.070746 The DHCP server ip is 192.168.201.1
2086 13:52:00.070896
2087 13:52:00.074087 TFTP server IP predefined by user: 192.168.201.1
2088 13:52:00.074224
2089 13:52:00.080493 Bootfile predefined by user: 10062394/tftp-deploy-4m_x5y47/kernel/bzImage
2090 13:52:00.080655
2091 13:52:00.084061 Sending tftp read request... done.
2092 13:52:00.086950
2093 13:52:00.091215 Waiting for the transfer...
2094 13:52:00.091363
2095 13:52:00.701650 00000000 ################################################################
2096 13:52:00.701827
2097 13:52:01.314242 00080000 ################################################################
2098 13:52:01.314429
2099 13:52:01.942644 00100000 ################################################################
2100 13:52:01.942808
2101 13:52:02.555128 00180000 ################################################################
2102 13:52:02.555293
2103 13:52:03.174397 00200000 ################################################################
2104 13:52:03.174586
2105 13:52:03.804663 00280000 ################################################################
2106 13:52:03.804844
2107 13:52:04.435333 00300000 ################################################################
2108 13:52:04.435494
2109 13:52:05.069176 00380000 ################################################################
2110 13:52:05.069378
2111 13:52:05.721264 00400000 ################################################################
2112 13:52:05.721436
2113 13:52:06.376902 00480000 ################################################################
2114 13:52:06.377083
2115 13:52:07.000078 00500000 ################################################################
2116 13:52:07.000269
2117 13:52:07.615380 00580000 ################################################################
2118 13:52:07.615562
2119 13:52:08.270205 00600000 ################################################################
2120 13:52:08.270390
2121 13:52:08.903671 00680000 ################################################################
2122 13:52:08.903854
2123 13:52:09.531179 00700000 ################################################################
2124 13:52:09.531328
2125 13:52:10.150879 00780000 ################################################################
2126 13:52:10.151080
2127 13:52:10.766113 00800000 ################################################################
2128 13:52:10.766311
2129 13:52:11.394678 00880000 ################################################################
2130 13:52:11.394873
2131 13:52:12.025849 00900000 ################################################################
2132 13:52:12.026007
2133 13:52:12.674505 00980000 ################################################################
2134 13:52:12.674657
2135 13:52:13.112154 00a00000 ############################################## done.
2136 13:52:13.112339
2137 13:52:13.115583 The bootfile was 10854400 bytes long.
2138 13:52:13.115702
2139 13:52:13.119126 Sending tftp read request... done.
2140 13:52:13.119252
2141 13:52:13.121827 Waiting for the transfer...
2142 13:52:13.121958
2143 13:52:13.749163 00000000 ################################################################
2144 13:52:13.749369
2145 13:52:14.381246 00080000 ################################################################
2146 13:52:14.381413
2147 13:52:15.008992 00100000 ################################################################
2148 13:52:15.009145
2149 13:52:15.630669 00180000 ################################################################
2150 13:52:15.630857
2151 13:52:16.260090 00200000 ################################################################
2152 13:52:16.260304
2153 13:52:16.882136 00280000 ################################################################
2154 13:52:16.882321
2155 13:52:17.509095 00300000 ################################################################
2156 13:52:17.509290
2157 13:52:18.133641 00380000 ################################################################
2158 13:52:18.133801
2159 13:52:18.757296 00400000 ################################################################
2160 13:52:18.757521
2161 13:52:19.380233 00480000 ################################################################
2162 13:52:19.380430
2163 13:52:19.995273 00500000 ################################################################
2164 13:52:19.995425
2165 13:52:20.447703 00580000 ################################################ done.
2166 13:52:20.447892
2167 13:52:20.450949 Sending tftp read request... done.
2168 13:52:20.451090
2169 13:52:20.454287 Waiting for the transfer...
2170 13:52:20.454409
2171 13:52:20.457654 00000000 # done.
2172 13:52:20.457804
2173 13:52:20.464403 Command line loaded dynamically from TFTP file: 10062394/tftp-deploy-4m_x5y47/kernel/cmdline
2174 13:52:20.464564
2175 13:52:20.490608 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10062394/extract-nfsrootfs-4okmcpn9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2176 13:52:20.490800
2177 13:52:20.497390 ec_init(0): CrosEC protocol v3 supported (256, 256)
2178 13:52:20.502290
2179 13:52:20.505860 Shutting down all USB controllers.
2180 13:52:20.506021
2181 13:52:20.506136 Removing current net device
2182 13:52:20.509509
2183 13:52:20.509662 Finalizing coreboot
2184 13:52:20.509777
2185 13:52:20.516513 Exiting depthcharge with code 4 at timestamp: 30360944
2186 13:52:20.516654
2187 13:52:20.516731
2188 13:52:20.516799 Starting kernel ...
2189 13:52:20.516864
2190 13:52:20.517259 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2191 13:52:20.517367 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2192 13:52:20.517452 Setting prompt string to ['Linux version [0-9]']
2193 13:52:20.517529 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2194 13:52:20.517619 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2195 13:52:20.519364
2197 13:56:39.518134 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2199 13:56:39.519307 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2201 13:56:39.520301 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2204 13:56:39.521731 end: 2 depthcharge-action (duration 00:05:00) [common]
2206 13:56:39.522703 Cleaning after the job
2207 13:56:39.522800 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/ramdisk
2208 13:56:39.523715 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/kernel
2209 13:56:39.525040 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/nfsrootfs
2210 13:56:39.587034 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062394/tftp-deploy-4m_x5y47/modules
2211 13:56:39.587775 start: 5.1 power-off (timeout 00:00:30) [common]
2212 13:56:39.587972 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2213 13:56:39.671454 >> Command sent successfully.
2214 13:56:39.682452 Returned 0 in 0 seconds
2215 13:56:39.784067 end: 5.1 power-off (duration 00:00:00) [common]
2217 13:56:39.785407 start: 5.2 read-feedback (timeout 00:10:00) [common]
2218 13:56:39.786585 Listened to connection for namespace 'common' for up to 1s
2220 13:56:39.787893 Listened to connection for namespace 'common' for up to 1s
2221 13:56:40.789868 Finalising connection for namespace 'common'
2222 13:56:40.790464 Disconnecting from shell: Finalise
2223 13:56:40.790847
2224 13:56:40.892201 end: 5.2 read-feedback (duration 00:00:01) [common]
2225 13:56:40.892759 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062394
2226 13:56:41.200541 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062394
2227 13:56:41.200731 JobError: Your job cannot terminate cleanly.