Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 13:51:32.057786 lava-dispatcher, installed at version: 2023.01
2 13:51:32.058005 start: 0 validate
3 13:51:32.058153 Start time: 2023-04-20 13:51:32.058145+00:00 (UTC)
4 13:51:32.058366 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:51:32.058538 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230414.0%2Famd64%2Finitrd.cpio.gz exists
6 13:51:32.363367 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:51:32.363556 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:51:32.657690 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:51:32.657867 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230414.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:51:32.942468 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:51:32.942638 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.280-cip96-59-g4b02e7efb967d%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:51:33.235128 validate duration: 1.18
14 13:51:33.235522 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:51:33.235667 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:51:33.235801 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:51:33.235981 Not decompressing ramdisk as can be used compressed.
18 13:51:33.236119 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230414.0/amd64/initrd.cpio.gz
19 13:51:33.236232 saving as /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/ramdisk/initrd.cpio.gz
20 13:51:33.236332 total size: 5432092 (5MB)
21 13:51:33.237994 progress 0% (0MB)
22 13:51:33.239907 progress 5% (0MB)
23 13:51:33.241579 progress 10% (0MB)
24 13:51:33.243291 progress 15% (0MB)
25 13:51:33.245307 progress 20% (1MB)
26 13:51:33.246882 progress 25% (1MB)
27 13:51:33.248473 progress 30% (1MB)
28 13:51:33.250385 progress 35% (1MB)
29 13:51:33.252060 progress 40% (2MB)
30 13:51:33.253660 progress 45% (2MB)
31 13:51:33.255259 progress 50% (2MB)
32 13:51:33.257056 progress 55% (2MB)
33 13:51:33.258642 progress 60% (3MB)
34 13:51:33.260159 progress 65% (3MB)
35 13:51:33.261842 progress 70% (3MB)
36 13:51:33.263491 progress 75% (3MB)
37 13:51:33.265138 progress 80% (4MB)
38 13:51:33.266708 progress 85% (4MB)
39 13:51:33.268521 progress 90% (4MB)
40 13:51:33.270112 progress 95% (4MB)
41 13:51:33.271639 progress 100% (5MB)
42 13:51:33.271879 5MB downloaded in 0.04s (145.75MB/s)
43 13:51:33.272100 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:51:33.272379 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:51:33.272471 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:51:33.272579 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:51:33.272712 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:51:33.272805 saving as /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/kernel/bzImage
50 13:51:33.272898 total size: 10854400 (10MB)
51 13:51:33.272964 No compression specified
52 13:51:33.274588 progress 0% (0MB)
53 13:51:33.277561 progress 5% (0MB)
54 13:51:33.280874 progress 10% (1MB)
55 13:51:33.283868 progress 15% (1MB)
56 13:51:33.287064 progress 20% (2MB)
57 13:51:33.290035 progress 25% (2MB)
58 13:51:33.293146 progress 30% (3MB)
59 13:51:33.296234 progress 35% (3MB)
60 13:51:33.299318 progress 40% (4MB)
61 13:51:33.302674 progress 45% (4MB)
62 13:51:33.305644 progress 50% (5MB)
63 13:51:33.308670 progress 55% (5MB)
64 13:51:33.311753 progress 60% (6MB)
65 13:51:33.314982 progress 65% (6MB)
66 13:51:33.318038 progress 70% (7MB)
67 13:51:33.321226 progress 75% (7MB)
68 13:51:33.324233 progress 80% (8MB)
69 13:51:33.327430 progress 85% (8MB)
70 13:51:33.330617 progress 90% (9MB)
71 13:51:33.333612 progress 95% (9MB)
72 13:51:33.336816 progress 100% (10MB)
73 13:51:33.336986 10MB downloaded in 0.06s (161.53MB/s)
74 13:51:33.337197 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:51:33.337595 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:51:33.337740 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:51:33.337862 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:51:33.338056 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230414.0/amd64/full.rootfs.tar.xz
80 13:51:33.338171 saving as /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/nfsrootfs/full.rootfs.tar
81 13:51:33.338267 total size: 133384388 (127MB)
82 13:51:33.338359 Using unxz to decompress xz
83 13:51:33.342172 progress 0% (0MB)
84 13:51:33.707233 progress 5% (6MB)
85 13:51:34.078339 progress 10% (12MB)
86 13:51:34.386167 progress 15% (19MB)
87 13:51:34.579607 progress 20% (25MB)
88 13:51:34.835980 progress 25% (31MB)
89 13:51:35.197771 progress 30% (38MB)
90 13:51:35.560447 progress 35% (44MB)
91 13:51:35.972161 progress 40% (50MB)
92 13:51:36.370513 progress 45% (57MB)
93 13:51:36.740663 progress 50% (63MB)
94 13:51:37.127302 progress 55% (69MB)
95 13:51:37.509781 progress 60% (76MB)
96 13:51:37.886451 progress 65% (82MB)
97 13:51:38.274930 progress 70% (89MB)
98 13:51:38.661603 progress 75% (95MB)
99 13:51:39.132182 progress 80% (101MB)
100 13:51:39.592764 progress 85% (108MB)
101 13:51:39.895533 progress 90% (114MB)
102 13:51:40.266670 progress 95% (120MB)
103 13:51:40.677107 progress 100% (127MB)
104 13:51:40.683018 127MB downloaded in 7.34s (17.32MB/s)
105 13:51:40.683318 end: 1.3.1 http-download (duration 00:00:07) [common]
107 13:51:40.683585 end: 1.3 download-retry (duration 00:00:07) [common]
108 13:51:40.683677 start: 1.4 download-retry (timeout 00:09:53) [common]
109 13:51:40.683768 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 13:51:40.683915 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.280-cip96-59-g4b02e7efb967d/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:51:40.683989 saving as /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/modules/modules.tar
112 13:51:40.684053 total size: 483736 (0MB)
113 13:51:40.684119 Using unxz to decompress xz
114 13:51:40.687342 progress 6% (0MB)
115 13:51:40.687757 progress 13% (0MB)
116 13:51:40.688007 progress 20% (0MB)
117 13:51:40.689381 progress 27% (0MB)
118 13:51:40.691477 progress 33% (0MB)
119 13:51:40.693542 progress 40% (0MB)
120 13:51:40.695482 progress 47% (0MB)
121 13:51:40.697584 progress 54% (0MB)
122 13:51:40.699461 progress 60% (0MB)
123 13:51:40.701448 progress 67% (0MB)
124 13:51:40.703408 progress 74% (0MB)
125 13:51:40.705314 progress 81% (0MB)
126 13:51:40.707206 progress 88% (0MB)
127 13:51:40.709513 progress 94% (0MB)
128 13:51:40.711680 progress 100% (0MB)
129 13:51:40.718514 0MB downloaded in 0.03s (13.39MB/s)
130 13:51:40.718811 end: 1.4.1 http-download (duration 00:00:00) [common]
132 13:51:40.719093 end: 1.4 download-retry (duration 00:00:00) [common]
133 13:51:40.719194 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 13:51:40.719302 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 13:51:42.571674 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10062419/extract-nfsrootfs-jaslkc54
136 13:51:42.571889 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 13:51:42.572000 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 13:51:42.572170 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi
139 13:51:42.572299 makedir: /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin
140 13:51:42.572407 makedir: /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/tests
141 13:51:42.572512 makedir: /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/results
142 13:51:42.572638 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-add-keys
143 13:51:42.572822 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-add-sources
144 13:51:42.572994 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-background-process-start
145 13:51:42.573161 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-background-process-stop
146 13:51:42.573323 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-common-functions
147 13:51:42.573488 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-echo-ipv4
148 13:51:42.573710 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-install-packages
149 13:51:42.573915 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-installed-packages
150 13:51:42.574079 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-os-build
151 13:51:42.574245 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-probe-channel
152 13:51:42.574407 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-probe-ip
153 13:51:42.574570 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-target-ip
154 13:51:42.574728 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-target-mac
155 13:51:42.574883 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-target-storage
156 13:51:42.575045 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-test-case
157 13:51:42.575206 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-test-event
158 13:51:42.575381 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-test-feedback
159 13:51:42.575646 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-test-raise
160 13:51:42.575842 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-test-reference
161 13:51:42.576031 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-test-runner
162 13:51:42.576207 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-test-set
163 13:51:42.576384 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-test-shell
164 13:51:42.576572 Updating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-install-packages (oe)
165 13:51:42.576791 Updating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/bin/lava-installed-packages (oe)
166 13:51:42.576989 Creating /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/environment
167 13:51:42.577137 LAVA metadata
168 13:51:42.577241 - LAVA_JOB_ID=10062419
169 13:51:42.577336 - LAVA_DISPATCHER_IP=192.168.201.1
170 13:51:42.577506 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 13:51:42.577592 skipped lava-vland-overlay
172 13:51:42.577670 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 13:51:42.577769 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 13:51:42.577877 skipped lava-multinode-overlay
175 13:51:42.578054 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 13:51:42.578187 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 13:51:42.578297 Loading test definitions
178 13:51:42.578420 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
179 13:51:42.578522 Using /lava-10062419 at stage 0
180 13:51:42.579022 uuid=10062419_1.5.2.3.1 testdef=None
181 13:51:42.579186 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 13:51:42.579303 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
183 13:51:42.580081 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 13:51:42.580458 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
186 13:51:42.581433 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 13:51:42.581759 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
189 13:51:42.582395 runner path: /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/0/tests/0_dmesg test_uuid 10062419_1.5.2.3.1
190 13:51:42.582547 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 13:51:42.582772 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
193 13:51:42.582844 Using /lava-10062419 at stage 1
194 13:51:42.583133 uuid=10062419_1.5.2.3.5 testdef=None
195 13:51:42.583221 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 13:51:42.583303 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
197 13:51:42.583803 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 13:51:42.584024 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
200 13:51:42.584660 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 13:51:42.584904 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
203 13:51:42.585608 runner path: /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/1/tests/1_bootrr test_uuid 10062419_1.5.2.3.5
204 13:51:42.585758 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 13:51:42.585961 Creating lava-test-runner.conf files
207 13:51:42.586023 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/0 for stage 0
208 13:51:42.586111 - 0_dmesg
209 13:51:42.586192 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10062419/lava-overlay-ralv4qbi/lava-10062419/1 for stage 1
210 13:51:42.586281 - 1_bootrr
211 13:51:42.586402 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 13:51:42.586508 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
213 13:51:42.594117 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 13:51:42.594315 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
215 13:51:42.594434 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 13:51:42.594581 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 13:51:42.594686 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
218 13:51:42.743348 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 13:51:42.743734 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
220 13:51:42.743850 extracting modules file /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062419/extract-nfsrootfs-jaslkc54
221 13:51:42.757498 extracting modules file /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10062419/extract-overlay-ramdisk-udhnt12z/ramdisk
222 13:51:42.770964 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 13:51:42.771138 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
224 13:51:42.771239 [common] Applying overlay to NFS
225 13:51:42.771315 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10062419/compress-overlay-ha1amqsm/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10062419/extract-nfsrootfs-jaslkc54
226 13:51:42.777736 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 13:51:42.777893 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
228 13:51:42.778003 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 13:51:42.778101 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
230 13:51:42.778187 Building ramdisk /var/lib/lava/dispatcher/tmp/10062419/extract-overlay-ramdisk-udhnt12z/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10062419/extract-overlay-ramdisk-udhnt12z/ramdisk
231 13:51:42.941060 >> 30347 blocks
232 13:51:43.551048 rename /var/lib/lava/dispatcher/tmp/10062419/extract-overlay-ramdisk-udhnt12z/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/ramdisk/ramdisk.cpio.gz
233 13:51:43.551482 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 13:51:43.551608 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
235 13:51:43.551711 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
236 13:51:43.551807 No mkimage arch provided, not using FIT.
237 13:51:43.551901 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 13:51:43.551990 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 13:51:43.552101 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 13:51:43.552196 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
241 13:51:43.552281 No LXC device requested
242 13:51:43.552367 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 13:51:43.552457 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
244 13:51:43.552542 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 13:51:43.552615 Checking files for TFTP limit of 4294967296 bytes.
246 13:51:43.553094 end: 1 tftp-deploy (duration 00:00:10) [common]
247 13:51:43.553212 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 13:51:43.553306 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 13:51:43.553429 substitutions:
250 13:51:43.553521 - {DTB}: None
251 13:51:43.553586 - {INITRD}: 10062419/tftp-deploy-pt7dibw0/ramdisk/ramdisk.cpio.gz
252 13:51:43.553649 - {KERNEL}: 10062419/tftp-deploy-pt7dibw0/kernel/bzImage
253 13:51:43.553709 - {LAVA_MAC}: None
254 13:51:43.553769 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10062419/extract-nfsrootfs-jaslkc54
255 13:51:43.553828 - {NFS_SERVER_IP}: 192.168.201.1
256 13:51:43.553886 - {PRESEED_CONFIG}: None
257 13:51:43.553944 - {PRESEED_LOCAL}: None
258 13:51:43.554003 - {RAMDISK}: 10062419/tftp-deploy-pt7dibw0/ramdisk/ramdisk.cpio.gz
259 13:51:43.554060 - {ROOT_PART}: None
260 13:51:43.554117 - {ROOT}: None
261 13:51:43.554173 - {SERVER_IP}: 192.168.201.1
262 13:51:43.554230 - {TEE}: None
263 13:51:43.554286 Parsed boot commands:
264 13:51:43.554341 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 13:51:43.554518 Parsed boot commands: tftpboot 192.168.201.1 10062419/tftp-deploy-pt7dibw0/kernel/bzImage 10062419/tftp-deploy-pt7dibw0/kernel/cmdline 10062419/tftp-deploy-pt7dibw0/ramdisk/ramdisk.cpio.gz
266 13:51:43.554615 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 13:51:43.554700 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 13:51:43.554794 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 13:51:43.554886 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 13:51:43.554961 Not connected, no need to disconnect.
271 13:51:43.555038 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 13:51:43.555127 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 13:51:43.555198 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
274 13:51:43.558311 Setting prompt string to ['lava-test: # ']
275 13:51:43.558651 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 13:51:43.558764 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 13:51:43.558866 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 13:51:43.558960 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 13:51:43.559151 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
280 13:51:48.696115 >> Command sent successfully.
281 13:51:48.698825 Returned 0 in 5 seconds
282 13:51:48.799599 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 13:51:48.799941 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 13:51:48.800090 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 13:51:48.800223 Setting prompt string to 'Starting depthcharge on Voema...'
287 13:51:48.800334 Changing prompt to 'Starting depthcharge on Voema...'
288 13:51:48.800439 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 13:51:48.800810 [Enter `^Ec?' for help]
290 13:51:50.365422
291 13:51:50.365604
292 13:51:50.375202 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 13:51:50.378581 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
294 13:51:50.385429 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 13:51:50.388505 CPU: AES supported, TXT NOT supported, VT supported
296 13:51:50.394939 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 13:51:50.401929 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 13:51:50.405259 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 13:51:50.408630 VBOOT: Loading verstage.
300 13:51:50.411918 FMAP: Found "FLASH" version 1.1 at 0x1804000.
301 13:51:50.418447 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 13:51:50.421763 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 13:51:50.432389 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 13:51:50.439015 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 13:51:50.439174
306 13:51:50.439255
307 13:51:50.452201 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 13:51:50.465965 Probing TPM: . done!
309 13:51:50.469316 TPM ready after 0 ms
310 13:51:50.472584 Connected to device vid:did:rid of 1ae0:0028:00
311 13:51:50.483979 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
312 13:51:50.490780 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 13:51:50.493977 Initialized TPM device CR50 revision 0
314 13:51:50.545375 tlcl_send_startup: Startup return code is 0
315 13:51:50.545554 TPM: setup succeeded
316 13:51:50.560727 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 13:51:50.576179 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 13:51:50.589870 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 13:51:50.600667 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 13:51:50.603840 Chrome EC: UHEPI supported
321 13:51:50.607038 Phase 1
322 13:51:50.610209 FMAP: area GBB found @ 1805000 (458752 bytes)
323 13:51:50.620305 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 13:51:50.626803 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 13:51:50.633452 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 13:51:50.640253 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 13:51:50.643509 Recovery requested (1009000e)
328 13:51:50.647223 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 13:51:50.658706 tlcl_extend: response is 0
330 13:51:50.665201 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 13:51:50.675088 tlcl_extend: response is 0
332 13:51:50.681792 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 13:51:50.688304 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 13:51:50.694782 BS: verstage times (exec / console): total (unknown) / 142 ms
335 13:51:50.694876
336 13:51:50.694946
337 13:51:50.708194 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 13:51:50.714838 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 13:51:50.717982 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 13:51:50.721610 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 13:51:50.728034 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 13:51:50.731340 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 13:51:50.734843 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 13:51:50.738250 TCO_STS: 0000 0000
345 13:51:50.741749 GEN_PMCON: d0015038 00002200
346 13:51:50.744461 GBLRST_CAUSE: 00000000 00000000
347 13:51:50.744589 HPR_CAUSE0: 00000000
348 13:51:50.747704 prev_sleep_state 5
349 13:51:50.751068 Boot Count incremented to 18810
350 13:51:50.757716 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 13:51:50.764744 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 13:51:50.774093 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 13:51:50.780710 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 13:51:50.784035 Chrome EC: UHEPI supported
355 13:51:50.790686 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 13:51:50.802084 Probing TPM: done!
357 13:51:50.809293 Connected to device vid:did:rid of 1ae0:0028:00
358 13:51:50.819464 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
359 13:51:50.822644 Initialized TPM device CR50 revision 0
360 13:51:50.840305 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 13:51:50.843781 MRC: Hash idx 0x100b comparison successful.
362 13:51:50.846930 MRC cache found, size faa8
363 13:51:50.847052 bootmode is set to: 2
364 13:51:50.850740 SPD index = 0
365 13:51:50.857392 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 13:51:50.860700 SPD: module type is LPDDR4X
367 13:51:50.863554 SPD: module part number is MT53E512M64D4NW-046
368 13:51:50.870289 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
369 13:51:50.873576 SPD: device width 16 bits, bus width 16 bits
370 13:51:50.880136 SPD: module size is 1024 MB (per channel)
371 13:51:51.312885 CBMEM:
372 13:51:51.316329 IMD: root @ 0x76fff000 254 entries.
373 13:51:51.319839 IMD: root @ 0x76ffec00 62 entries.
374 13:51:51.323188 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 13:51:51.329813 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 13:51:51.333202 External stage cache:
377 13:51:51.336064 IMD: root @ 0x7b3ff000 254 entries.
378 13:51:51.339472 IMD: root @ 0x7b3fec00 62 entries.
379 13:51:51.354621 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 13:51:51.361525 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 13:51:51.367977 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 13:51:51.382912 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 13:51:51.386216 cse_lite: Skip switching to RW in the recovery path
384 13:51:51.390121 8 DIMMs found
385 13:51:51.390276 SMM Memory Map
386 13:51:51.393478 SMRAM : 0x7b000000 0x800000
387 13:51:51.396967 Subregion 0: 0x7b000000 0x200000
388 13:51:51.400132 Subregion 1: 0x7b200000 0x200000
389 13:51:51.403564 Subregion 2: 0x7b400000 0x400000
390 13:51:51.406918 top_of_ram = 0x77000000
391 13:51:51.413577 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 13:51:51.416978 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 13:51:51.423558 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 13:51:51.426482 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 13:51:51.436417 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 13:51:51.439905 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 13:51:51.451638 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 13:51:51.458308 Processing 211 relocs. Offset value of 0x74c0b000
399 13:51:51.465034 BS: romstage times (exec / console): total (unknown) / 277 ms
400 13:51:51.471163
401 13:51:51.471307
402 13:51:51.480665 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 13:51:51.484040 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 13:51:51.493988 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 13:51:51.500648 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 13:51:51.507305 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 13:51:51.514103 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 13:51:51.560994 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 13:51:51.567828 Processing 5008 relocs. Offset value of 0x75d98000
410 13:51:51.571131 BS: postcar times (exec / console): total (unknown) / 59 ms
411 13:51:51.574537
412 13:51:51.574653
413 13:51:51.584594 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 13:51:51.584704 Normal boot
415 13:51:51.587949 FW_CONFIG value is 0x804c02
416 13:51:51.591313 PCI: 00:07.0 disabled by fw_config
417 13:51:51.594611 PCI: 00:07.1 disabled by fw_config
418 13:51:51.598177 PCI: 00:0d.2 disabled by fw_config
419 13:51:51.601471 PCI: 00:1c.7 disabled by fw_config
420 13:51:51.608113 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 13:51:51.614665 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 13:51:51.617920 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 13:51:51.621334 GENERIC: 0.0 disabled by fw_config
424 13:51:51.624769 GENERIC: 1.0 disabled by fw_config
425 13:51:51.630830 fw_config match found: DB_USB=USB3_ACTIVE
426 13:51:51.634265 fw_config match found: DB_USB=USB3_ACTIVE
427 13:51:51.637690 fw_config match found: DB_USB=USB3_ACTIVE
428 13:51:51.641245 fw_config match found: DB_USB=USB3_ACTIVE
429 13:51:51.647904 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 13:51:51.654253 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 13:51:51.661107 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 13:51:51.670837 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 13:51:51.674189 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 13:51:51.680920 microcode: Update skipped, already up-to-date
435 13:51:51.687286 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 13:51:51.714501 Detected 4 core, 8 thread CPU.
437 13:51:51.717632 Setting up SMI for CPU
438 13:51:51.721033 IED base = 0x7b400000
439 13:51:51.721141 IED size = 0x00400000
440 13:51:51.724357 Will perform SMM setup.
441 13:51:51.731332 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
442 13:51:51.737562 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 13:51:51.744467 Processing 16 relocs. Offset value of 0x00030000
444 13:51:51.747883 Attempting to start 7 APs
445 13:51:51.751273 Waiting for 10ms after sending INIT.
446 13:51:51.766465 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
447 13:51:51.766585 done.
448 13:51:51.769835 AP: slot 5 apic_id 6.
449 13:51:51.773194 AP: slot 4 apic_id 7.
450 13:51:51.773281 AP: slot 6 apic_id 2.
451 13:51:51.776693 AP: slot 2 apic_id 3.
452 13:51:51.780038 AP: slot 3 apic_id 5.
453 13:51:51.780143 AP: slot 7 apic_id 4.
454 13:51:51.786791 Waiting for 2nd SIPI to complete...done.
455 13:51:51.793287 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 13:51:51.799684 Processing 13 relocs. Offset value of 0x00038000
457 13:51:51.799806 Unable to locate Global NVS
458 13:51:51.809696 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 13:51:51.812861 Installing permanent SMM handler to 0x7b000000
460 13:51:51.823000 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 13:51:51.826671 Processing 794 relocs. Offset value of 0x7b010000
462 13:51:51.836193 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 13:51:51.839679 Processing 13 relocs. Offset value of 0x7b008000
464 13:51:51.846391 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 13:51:51.852788 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 13:51:51.856108 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 13:51:51.862985 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 13:51:51.869281 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 13:51:51.876043 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 13:51:51.882537 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 13:51:51.882629 Unable to locate Global NVS
472 13:51:51.892530 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 13:51:51.895753 Clearing SMI status registers
474 13:51:51.895837 SMI_STS: PM1
475 13:51:51.899176 PM1_STS: PWRBTN
476 13:51:51.905610 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 13:51:51.908934 In relocation handler: CPU 0
478 13:51:51.912308 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 13:51:51.919091 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 13:51:51.919173 Relocation complete.
481 13:51:51.929227 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 13:51:51.929314 In relocation handler: CPU 1
483 13:51:51.935918 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 13:51:51.936002 Relocation complete.
485 13:51:51.945390 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
486 13:51:51.945500 In relocation handler: CPU 7
487 13:51:51.952144 New SMBASE=0x7affe400 IEDBASE=0x7b400000
488 13:51:51.955563 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 13:51:51.958901 Relocation complete.
490 13:51:51.965766 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
491 13:51:51.968595 In relocation handler: CPU 3
492 13:51:51.972082 New SMBASE=0x7afff400 IEDBASE=0x7b400000
493 13:51:51.975439 Relocation complete.
494 13:51:51.982185 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
495 13:51:51.985565 In relocation handler: CPU 6
496 13:51:51.988877 New SMBASE=0x7affe800 IEDBASE=0x7b400000
497 13:51:51.995697 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 13:51:51.995785 Relocation complete.
499 13:51:52.001858 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
500 13:51:52.005216 In relocation handler: CPU 2
501 13:51:52.011996 New SMBASE=0x7afff800 IEDBASE=0x7b400000
502 13:51:52.012077 Relocation complete.
503 13:51:52.018684 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
504 13:51:52.021496 In relocation handler: CPU 4
505 13:51:52.028141 New SMBASE=0x7afff000 IEDBASE=0x7b400000
506 13:51:52.028222 Relocation complete.
507 13:51:52.034710 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
508 13:51:52.038312 In relocation handler: CPU 5
509 13:51:52.044809 New SMBASE=0x7affec00 IEDBASE=0x7b400000
510 13:51:52.048668 Writing SMRR. base = 0x7b000006, mask=0xff800c00
511 13:51:52.052074 Relocation complete.
512 13:51:52.052195 Initializing CPU #0
513 13:51:52.056093 CPU: vendor Intel device 806c1
514 13:51:52.059332 CPU: family 06, model 8c, stepping 01
515 13:51:52.062748 Clearing out pending MCEs
516 13:51:52.066223 Setting up local APIC...
517 13:51:52.066338 apic_id: 0x00 done.
518 13:51:52.069140 Turbo is available but hidden
519 13:51:52.072607 Turbo is available and visible
520 13:51:52.079342 microcode: Update skipped, already up-to-date
521 13:51:52.079433 CPU #0 initialized
522 13:51:52.082760 Initializing CPU #1
523 13:51:52.086105 Initializing CPU #6
524 13:51:52.086195 Initializing CPU #2
525 13:51:52.089410 CPU: vendor Intel device 806c1
526 13:51:52.092740 CPU: family 06, model 8c, stepping 01
527 13:51:52.095663 CPU: vendor Intel device 806c1
528 13:51:52.098996 CPU: family 06, model 8c, stepping 01
529 13:51:52.102456 Clearing out pending MCEs
530 13:51:52.105790 Clearing out pending MCEs
531 13:51:52.108885 Setting up local APIC...
532 13:51:52.112242 CPU: vendor Intel device 806c1
533 13:51:52.115826 CPU: family 06, model 8c, stepping 01
534 13:51:52.115915 Initializing CPU #5
535 13:51:52.119048 Initializing CPU #4
536 13:51:52.122416 CPU: vendor Intel device 806c1
537 13:51:52.125702 CPU: family 06, model 8c, stepping 01
538 13:51:52.129011 CPU: vendor Intel device 806c1
539 13:51:52.132224 CPU: family 06, model 8c, stepping 01
540 13:51:52.135604 Clearing out pending MCEs
541 13:51:52.138948 Clearing out pending MCEs
542 13:51:52.142188 Setting up local APIC...
543 13:51:52.142299 apic_id: 0x02 done.
544 13:51:52.145328 Setting up local APIC...
545 13:51:52.148627 Initializing CPU #7
546 13:51:52.148708 Initializing CPU #3
547 13:51:52.152208 CPU: vendor Intel device 806c1
548 13:51:52.155371 CPU: family 06, model 8c, stepping 01
549 13:51:52.158748 CPU: vendor Intel device 806c1
550 13:51:52.162103 CPU: family 06, model 8c, stepping 01
551 13:51:52.165397 Clearing out pending MCEs
552 13:51:52.168752 Clearing out pending MCEs
553 13:51:52.171754 Setting up local APIC...
554 13:51:52.175164 Clearing out pending MCEs
555 13:51:52.175253 Setting up local APIC...
556 13:51:52.178510 apic_id: 0x06 done.
557 13:51:52.181967 Setting up local APIC...
558 13:51:52.185359 microcode: Update skipped, already up-to-date
559 13:51:52.188247 apic_id: 0x03 done.
560 13:51:52.188353 CPU #6 initialized
561 13:51:52.191685 apic_id: 0x07 done.
562 13:51:52.194989 microcode: Update skipped, already up-to-date
563 13:51:52.201982 microcode: Update skipped, already up-to-date
564 13:51:52.202096 CPU #5 initialized
565 13:51:52.205379 CPU #4 initialized
566 13:51:52.208791 apic_id: 0x05 done.
567 13:51:52.208903 apic_id: 0x04 done.
568 13:51:52.215356 microcode: Update skipped, already up-to-date
569 13:51:52.218677 microcode: Update skipped, already up-to-date
570 13:51:52.221493 CPU #3 initialized
571 13:51:52.221573 CPU #7 initialized
572 13:51:52.228346 microcode: Update skipped, already up-to-date
573 13:51:52.228454 Setting up local APIC...
574 13:51:52.231761 CPU #2 initialized
575 13:51:52.234627 apic_id: 0x01 done.
576 13:51:52.238115 microcode: Update skipped, already up-to-date
577 13:51:52.241564 CPU #1 initialized
578 13:51:52.244513 bsp_do_flight_plan done after 455 msecs.
579 13:51:52.248277 CPU: frequency set to 4000 MHz
580 13:51:52.248392 Enabling SMIs.
581 13:51:52.254901 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
582 13:51:52.271662 SATAXPCIE1 indicates PCIe NVMe is present
583 13:51:52.274904 Probing TPM: done!
584 13:51:52.278311 Connected to device vid:did:rid of 1ae0:0028:00
585 13:51:52.289201 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
586 13:51:52.292061 Initialized TPM device CR50 revision 0
587 13:51:52.295380 Enabling S0i3.4
588 13:51:52.302193 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 13:51:52.305719 Found a VBT of 8704 bytes after decompression
590 13:51:52.312287 cse_lite: CSE RO boot. HybridStorageMode disabled
591 13:51:52.318540 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 13:51:52.394877 FSPS returned 0
593 13:51:52.398065 Executing Phase 1 of FspMultiPhaseSiInit
594 13:51:52.408182 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 13:51:52.411693 port C0 DISC req: usage 1 usb3 1 usb2 5
596 13:51:52.414555 Raw Buffer output 0 00000511
597 13:51:52.417746 Raw Buffer output 1 00000000
598 13:51:52.421723 pmc_send_ipc_cmd succeeded
599 13:51:52.428476 port C1 DISC req: usage 1 usb3 2 usb2 3
600 13:51:52.428572 Raw Buffer output 0 00000321
601 13:51:52.431905 Raw Buffer output 1 00000000
602 13:51:52.435960 pmc_send_ipc_cmd succeeded
603 13:51:52.441097 Detected 4 core, 8 thread CPU.
604 13:51:52.444528 Detected 4 core, 8 thread CPU.
605 13:51:52.678162 Display FSP Version Info HOB
606 13:51:52.681288 Reference Code - CPU = a.0.4c.31
607 13:51:52.684655 uCode Version = 0.0.0.86
608 13:51:52.688120 TXT ACM version = ff.ff.ff.ffff
609 13:51:52.691589 Reference Code - ME = a.0.4c.31
610 13:51:52.694530 MEBx version = 0.0.0.0
611 13:51:52.698288 ME Firmware Version = Consumer SKU
612 13:51:52.701450 Reference Code - PCH = a.0.4c.31
613 13:51:52.704663 PCH-CRID Status = Disabled
614 13:51:52.708256 PCH-CRID Original Value = ff.ff.ff.ffff
615 13:51:52.711514 PCH-CRID New Value = ff.ff.ff.ffff
616 13:51:52.714840 OPROM - RST - RAID = ff.ff.ff.ffff
617 13:51:52.717789 PCH Hsio Version = 4.0.0.0
618 13:51:52.721151 Reference Code - SA - System Agent = a.0.4c.31
619 13:51:52.724567 Reference Code - MRC = 2.0.0.1
620 13:51:52.727883 SA - PCIe Version = a.0.4c.31
621 13:51:52.731120 SA-CRID Status = Disabled
622 13:51:52.734326 SA-CRID Original Value = 0.0.0.1
623 13:51:52.737848 SA-CRID New Value = 0.0.0.1
624 13:51:52.741186 OPROM - VBIOS = ff.ff.ff.ffff
625 13:51:52.744627 IO Manageability Engine FW Version = 11.1.4.0
626 13:51:52.747589 PHY Build Version = 0.0.0.e0
627 13:51:52.750909 Thunderbolt(TM) FW Version = 0.0.0.0
628 13:51:52.757626 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 13:51:52.761187 ITSS IRQ Polarities Before:
630 13:51:52.761273 IPC0: 0xffffffff
631 13:51:52.764570 IPC1: 0xffffffff
632 13:51:52.764685 IPC2: 0xffffffff
633 13:51:52.767918 IPC3: 0xffffffff
634 13:51:52.771197 ITSS IRQ Polarities After:
635 13:51:52.771305 IPC0: 0xffffffff
636 13:51:52.774528 IPC1: 0xffffffff
637 13:51:52.774622 IPC2: 0xffffffff
638 13:51:52.778153 IPC3: 0xffffffff
639 13:51:52.780756 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 13:51:52.794182 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 13:51:52.804415 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 13:51:52.817315 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 13:51:52.823844 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
644 13:51:52.827145 Enumerating buses...
645 13:51:52.830591 Show all devs... Before device enumeration.
646 13:51:52.834003 Root Device: enabled 1
647 13:51:52.834080 DOMAIN: 0000: enabled 1
648 13:51:52.837289 CPU_CLUSTER: 0: enabled 1
649 13:51:52.840563 PCI: 00:00.0: enabled 1
650 13:51:52.843946 PCI: 00:02.0: enabled 1
651 13:51:52.844067 PCI: 00:04.0: enabled 1
652 13:51:52.847409 PCI: 00:05.0: enabled 1
653 13:51:52.850791 PCI: 00:06.0: enabled 0
654 13:51:52.853676 PCI: 00:07.0: enabled 0
655 13:51:52.853764 PCI: 00:07.1: enabled 0
656 13:51:52.857154 PCI: 00:07.2: enabled 0
657 13:51:52.860619 PCI: 00:07.3: enabled 0
658 13:51:52.860706 PCI: 00:08.0: enabled 1
659 13:51:52.863996 PCI: 00:09.0: enabled 0
660 13:51:52.867018 PCI: 00:0a.0: enabled 0
661 13:51:52.870366 PCI: 00:0d.0: enabled 1
662 13:51:52.870453 PCI: 00:0d.1: enabled 0
663 13:51:52.873570 PCI: 00:0d.2: enabled 0
664 13:51:52.877084 PCI: 00:0d.3: enabled 0
665 13:51:52.880393 PCI: 00:0e.0: enabled 0
666 13:51:52.880481 PCI: 00:10.2: enabled 1
667 13:51:52.883868 PCI: 00:10.6: enabled 0
668 13:51:52.887227 PCI: 00:10.7: enabled 0
669 13:51:52.890523 PCI: 00:12.0: enabled 0
670 13:51:52.890610 PCI: 00:12.6: enabled 0
671 13:51:52.893943 PCI: 00:13.0: enabled 0
672 13:51:52.897228 PCI: 00:14.0: enabled 1
673 13:51:52.897315 PCI: 00:14.1: enabled 0
674 13:51:52.900672 PCI: 00:14.2: enabled 1
675 13:51:52.903528 PCI: 00:14.3: enabled 1
676 13:51:52.906871 PCI: 00:15.0: enabled 1
677 13:51:52.906958 PCI: 00:15.1: enabled 1
678 13:51:52.910368 PCI: 00:15.2: enabled 1
679 13:51:52.913892 PCI: 00:15.3: enabled 1
680 13:51:52.917265 PCI: 00:16.0: enabled 1
681 13:51:52.917352 PCI: 00:16.1: enabled 0
682 13:51:52.920117 PCI: 00:16.2: enabled 0
683 13:51:52.923502 PCI: 00:16.3: enabled 0
684 13:51:52.926730 PCI: 00:16.4: enabled 0
685 13:51:52.926818 PCI: 00:16.5: enabled 0
686 13:51:52.930406 PCI: 00:17.0: enabled 1
687 13:51:52.933732 PCI: 00:19.0: enabled 0
688 13:51:52.937138 PCI: 00:19.1: enabled 1
689 13:51:52.937222 PCI: 00:19.2: enabled 0
690 13:51:52.940438 PCI: 00:1c.0: enabled 1
691 13:51:52.943620 PCI: 00:1c.1: enabled 0
692 13:51:52.943741 PCI: 00:1c.2: enabled 0
693 13:51:52.947010 PCI: 00:1c.3: enabled 0
694 13:51:52.950384 PCI: 00:1c.4: enabled 0
695 13:51:52.953710 PCI: 00:1c.5: enabled 0
696 13:51:52.953820 PCI: 00:1c.6: enabled 1
697 13:51:52.956601 PCI: 00:1c.7: enabled 0
698 13:51:52.960612 PCI: 00:1d.0: enabled 1
699 13:51:52.963204 PCI: 00:1d.1: enabled 0
700 13:51:52.963310 PCI: 00:1d.2: enabled 1
701 13:51:52.966632 PCI: 00:1d.3: enabled 0
702 13:51:52.970073 PCI: 00:1e.0: enabled 1
703 13:51:52.973480 PCI: 00:1e.1: enabled 0
704 13:51:52.973591 PCI: 00:1e.2: enabled 1
705 13:51:52.976735 PCI: 00:1e.3: enabled 1
706 13:51:52.979976 PCI: 00:1f.0: enabled 1
707 13:51:52.983483 PCI: 00:1f.1: enabled 0
708 13:51:52.983571 PCI: 00:1f.2: enabled 1
709 13:51:52.986800 PCI: 00:1f.3: enabled 1
710 13:51:52.989714 PCI: 00:1f.4: enabled 0
711 13:51:52.989803 PCI: 00:1f.5: enabled 1
712 13:51:52.993495 PCI: 00:1f.6: enabled 0
713 13:51:52.996334 PCI: 00:1f.7: enabled 0
714 13:51:52.999707 APIC: 00: enabled 1
715 13:51:52.999793 GENERIC: 0.0: enabled 1
716 13:51:53.003201 GENERIC: 0.0: enabled 1
717 13:51:53.006609 GENERIC: 1.0: enabled 1
718 13:51:53.006696 GENERIC: 0.0: enabled 1
719 13:51:53.009988 GENERIC: 1.0: enabled 1
720 13:51:53.012900 USB0 port 0: enabled 1
721 13:51:53.016409 GENERIC: 0.0: enabled 1
722 13:51:53.016495 USB0 port 0: enabled 1
723 13:51:53.019775 GENERIC: 0.0: enabled 1
724 13:51:53.023196 I2C: 00:1a: enabled 1
725 13:51:53.023281 I2C: 00:31: enabled 1
726 13:51:53.026487 I2C: 00:32: enabled 1
727 13:51:53.029862 I2C: 00:10: enabled 1
728 13:51:53.033199 I2C: 00:15: enabled 1
729 13:51:53.033312 GENERIC: 0.0: enabled 0
730 13:51:53.036447 GENERIC: 1.0: enabled 0
731 13:51:53.039581 GENERIC: 0.0: enabled 1
732 13:51:53.039698 SPI: 00: enabled 1
733 13:51:53.042897 SPI: 00: enabled 1
734 13:51:53.046349 PNP: 0c09.0: enabled 1
735 13:51:53.046469 GENERIC: 0.0: enabled 1
736 13:51:53.049405 USB3 port 0: enabled 1
737 13:51:53.052836 USB3 port 1: enabled 1
738 13:51:53.052923 USB3 port 2: enabled 0
739 13:51:53.056305 USB3 port 3: enabled 0
740 13:51:53.059664 USB2 port 0: enabled 0
741 13:51:53.062986 USB2 port 1: enabled 1
742 13:51:53.063072 USB2 port 2: enabled 1
743 13:51:53.066408 USB2 port 3: enabled 0
744 13:51:53.069923 USB2 port 4: enabled 1
745 13:51:53.070010 USB2 port 5: enabled 0
746 13:51:53.072729 USB2 port 6: enabled 0
747 13:51:53.076164 USB2 port 7: enabled 0
748 13:51:53.079695 USB2 port 8: enabled 0
749 13:51:53.079812 USB2 port 9: enabled 0
750 13:51:53.082859 USB3 port 0: enabled 0
751 13:51:53.086181 USB3 port 1: enabled 1
752 13:51:53.086262 USB3 port 2: enabled 0
753 13:51:53.089637 USB3 port 3: enabled 0
754 13:51:53.092930 GENERIC: 0.0: enabled 1
755 13:51:53.096210 GENERIC: 1.0: enabled 1
756 13:51:53.096301 APIC: 01: enabled 1
757 13:51:53.099483 APIC: 03: enabled 1
758 13:51:53.099567 APIC: 05: enabled 1
759 13:51:53.102818 APIC: 07: enabled 1
760 13:51:53.105748 APIC: 06: enabled 1
761 13:51:53.105828 APIC: 02: enabled 1
762 13:51:53.109170 APIC: 04: enabled 1
763 13:51:53.112626 Compare with tree...
764 13:51:53.112722 Root Device: enabled 1
765 13:51:53.116110 DOMAIN: 0000: enabled 1
766 13:51:53.118979 PCI: 00:00.0: enabled 1
767 13:51:53.122506 PCI: 00:02.0: enabled 1
768 13:51:53.122614 PCI: 00:04.0: enabled 1
769 13:51:53.125806 GENERIC: 0.0: enabled 1
770 13:51:53.128990 PCI: 00:05.0: enabled 1
771 13:51:53.132415 PCI: 00:06.0: enabled 0
772 13:51:53.135679 PCI: 00:07.0: enabled 0
773 13:51:53.135759 GENERIC: 0.0: enabled 1
774 13:51:53.139031 PCI: 00:07.1: enabled 0
775 13:51:53.142278 GENERIC: 1.0: enabled 1
776 13:51:53.145560 PCI: 00:07.2: enabled 0
777 13:51:53.148814 GENERIC: 0.0: enabled 1
778 13:51:53.152176 PCI: 00:07.3: enabled 0
779 13:51:53.152263 GENERIC: 1.0: enabled 1
780 13:51:53.155359 PCI: 00:08.0: enabled 1
781 13:51:53.158888 PCI: 00:09.0: enabled 0
782 13:51:53.161999 PCI: 00:0a.0: enabled 0
783 13:51:53.165387 PCI: 00:0d.0: enabled 1
784 13:51:53.165505 USB0 port 0: enabled 1
785 13:51:53.168862 USB3 port 0: enabled 1
786 13:51:53.172166 USB3 port 1: enabled 1
787 13:51:53.175598 USB3 port 2: enabled 0
788 13:51:53.178573 USB3 port 3: enabled 0
789 13:51:53.178659 PCI: 00:0d.1: enabled 0
790 13:51:53.181976 PCI: 00:0d.2: enabled 0
791 13:51:53.185504 GENERIC: 0.0: enabled 1
792 13:51:53.188719 PCI: 00:0d.3: enabled 0
793 13:51:53.192123 PCI: 00:0e.0: enabled 0
794 13:51:53.192209 PCI: 00:10.2: enabled 1
795 13:51:53.195550 PCI: 00:10.6: enabled 0
796 13:51:53.198466 PCI: 00:10.7: enabled 0
797 13:51:53.201779 PCI: 00:12.0: enabled 0
798 13:51:53.205633 PCI: 00:12.6: enabled 0
799 13:51:53.205744 PCI: 00:13.0: enabled 0
800 13:51:53.208533 PCI: 00:14.0: enabled 1
801 13:51:53.211906 USB0 port 0: enabled 1
802 13:51:53.215236 USB2 port 0: enabled 0
803 13:51:53.218872 USB2 port 1: enabled 1
804 13:51:53.218959 USB2 port 2: enabled 1
805 13:51:53.222016 USB2 port 3: enabled 0
806 13:51:53.225258 USB2 port 4: enabled 1
807 13:51:53.228757 USB2 port 5: enabled 0
808 13:51:53.232068 USB2 port 6: enabled 0
809 13:51:53.235388 USB2 port 7: enabled 0
810 13:51:53.235499 USB2 port 8: enabled 0
811 13:51:53.238236 USB2 port 9: enabled 0
812 13:51:53.241627 USB3 port 0: enabled 0
813 13:51:53.245076 USB3 port 1: enabled 1
814 13:51:53.248389 USB3 port 2: enabled 0
815 13:51:53.251635 USB3 port 3: enabled 0
816 13:51:53.251741 PCI: 00:14.1: enabled 0
817 13:51:53.254918 PCI: 00:14.2: enabled 1
818 13:51:53.258631 PCI: 00:14.3: enabled 1
819 13:51:53.261701 GENERIC: 0.0: enabled 1
820 13:51:53.264894 PCI: 00:15.0: enabled 1
821 13:51:53.265009 I2C: 00:1a: enabled 1
822 13:51:53.268207 I2C: 00:31: enabled 1
823 13:51:53.271540 I2C: 00:32: enabled 1
824 13:51:53.275023 PCI: 00:15.1: enabled 1
825 13:51:53.275134 I2C: 00:10: enabled 1
826 13:51:53.278443 PCI: 00:15.2: enabled 1
827 13:51:53.281273 PCI: 00:15.3: enabled 1
828 13:51:53.284658 PCI: 00:16.0: enabled 1
829 13:51:53.288038 PCI: 00:16.1: enabled 0
830 13:51:53.288155 PCI: 00:16.2: enabled 0
831 13:51:53.291942 PCI: 00:16.3: enabled 0
832 13:51:53.295443 PCI: 00:16.4: enabled 0
833 13:51:53.295561 PCI: 00:16.5: enabled 0
834 13:51:53.299327 PCI: 00:17.0: enabled 1
835 13:51:53.302741 PCI: 00:19.0: enabled 0
836 13:51:53.305988 PCI: 00:19.1: enabled 1
837 13:51:53.309204 I2C: 00:15: enabled 1
838 13:51:53.309312 PCI: 00:19.2: enabled 0
839 13:51:53.312541 PCI: 00:1d.0: enabled 1
840 13:51:53.315902 GENERIC: 0.0: enabled 1
841 13:51:53.319265 PCI: 00:1e.0: enabled 1
842 13:51:53.368933 PCI: 00:1e.1: enabled 0
843 13:51:53.369110 PCI: 00:1e.2: enabled 1
844 13:51:53.369222 SPI: 00: enabled 1
845 13:51:53.369319 PCI: 00:1e.3: enabled 1
846 13:51:53.369423 SPI: 00: enabled 1
847 13:51:53.369707 PCI: 00:1f.0: enabled 1
848 13:51:53.369806 PNP: 0c09.0: enabled 1
849 13:51:53.369904 PCI: 00:1f.1: enabled 0
850 13:51:53.370003 PCI: 00:1f.2: enabled 1
851 13:51:53.370097 GENERIC: 0.0: enabled 1
852 13:51:53.370197 GENERIC: 0.0: enabled 1
853 13:51:53.370288 GENERIC: 1.0: enabled 1
854 13:51:53.370375 PCI: 00:1f.3: enabled 1
855 13:51:53.370474 PCI: 00:1f.4: enabled 0
856 13:51:53.370566 PCI: 00:1f.5: enabled 1
857 13:51:53.370657 PCI: 00:1f.6: enabled 0
858 13:51:53.370753 PCI: 00:1f.7: enabled 0
859 13:51:53.370842 CPU_CLUSTER: 0: enabled 1
860 13:51:53.370931 APIC: 00: enabled 1
861 13:51:53.371019 APIC: 01: enabled 1
862 13:51:53.415939 APIC: 03: enabled 1
863 13:51:53.416078 APIC: 05: enabled 1
864 13:51:53.416189 APIC: 07: enabled 1
865 13:51:53.416478 APIC: 06: enabled 1
866 13:51:53.416576 APIC: 02: enabled 1
867 13:51:53.416676 APIC: 04: enabled 1
868 13:51:53.416775 Root Device scanning...
869 13:51:53.416865 scan_static_bus for Root Device
870 13:51:53.416960 DOMAIN: 0000 enabled
871 13:51:53.417059 CPU_CLUSTER: 0 enabled
872 13:51:53.417147 DOMAIN: 0000 scanning...
873 13:51:53.417250 PCI: pci_scan_bus for bus 00
874 13:51:53.417341 PCI: 00:00.0 [8086/0000] ops
875 13:51:53.417429 PCI: 00:00.0 [8086/9a12] enabled
876 13:51:53.417536 PCI: 00:02.0 [8086/0000] bus ops
877 13:51:53.417632 PCI: 00:02.0 [8086/9a40] enabled
878 13:51:53.419981 PCI: 00:04.0 [8086/0000] bus ops
879 13:51:53.420088 PCI: 00:04.0 [8086/9a03] enabled
880 13:51:53.423364 PCI: 00:05.0 [8086/9a19] enabled
881 13:51:53.426762 PCI: 00:07.0 [0000/0000] hidden
882 13:51:53.430213 PCI: 00:08.0 [8086/9a11] enabled
883 13:51:53.433643 PCI: 00:0a.0 [8086/9a0d] disabled
884 13:51:53.436405 PCI: 00:0d.0 [8086/0000] bus ops
885 13:51:53.439866 PCI: 00:0d.0 [8086/9a13] enabled
886 13:51:53.443199 PCI: 00:14.0 [8086/0000] bus ops
887 13:51:53.446440 PCI: 00:14.0 [8086/a0ed] enabled
888 13:51:53.449810 PCI: 00:14.2 [8086/a0ef] enabled
889 13:51:53.453202 PCI: 00:14.3 [8086/0000] bus ops
890 13:51:53.456583 PCI: 00:14.3 [8086/a0f0] enabled
891 13:51:53.459557 PCI: 00:15.0 [8086/0000] bus ops
892 13:51:53.462875 PCI: 00:15.0 [8086/a0e8] enabled
893 13:51:53.466627 PCI: 00:15.1 [8086/0000] bus ops
894 13:51:53.469858 PCI: 00:15.1 [8086/a0e9] enabled
895 13:51:53.473110 PCI: 00:15.2 [8086/0000] bus ops
896 13:51:53.476333 PCI: 00:15.2 [8086/a0ea] enabled
897 13:51:53.479829 PCI: 00:15.3 [8086/0000] bus ops
898 13:51:53.483254 PCI: 00:15.3 [8086/a0eb] enabled
899 13:51:53.486741 PCI: 00:16.0 [8086/0000] ops
900 13:51:53.489599 PCI: 00:16.0 [8086/a0e0] enabled
901 13:51:53.496307 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 13:51:53.499742 PCI: 00:19.0 [8086/0000] bus ops
903 13:51:53.503089 PCI: 00:19.0 [8086/a0c5] disabled
904 13:51:53.506397 PCI: 00:19.1 [8086/0000] bus ops
905 13:51:53.509828 PCI: 00:19.1 [8086/a0c6] enabled
906 13:51:53.512766 PCI: 00:1d.0 [8086/0000] bus ops
907 13:51:53.516030 PCI: 00:1d.0 [8086/a0b0] enabled
908 13:51:53.519863 PCI: 00:1e.0 [8086/0000] ops
909 13:51:53.522675 PCI: 00:1e.0 [8086/a0a8] enabled
910 13:51:53.526009 PCI: 00:1e.2 [8086/0000] bus ops
911 13:51:53.529355 PCI: 00:1e.2 [8086/a0aa] enabled
912 13:51:53.532866 PCI: 00:1e.3 [8086/0000] bus ops
913 13:51:53.536294 PCI: 00:1e.3 [8086/a0ab] enabled
914 13:51:53.539569 PCI: 00:1f.0 [8086/0000] bus ops
915 13:51:53.542567 PCI: 00:1f.0 [8086/a087] enabled
916 13:51:53.542675 RTC Init
917 13:51:53.545901 Set power on after power failure.
918 13:51:53.549121 Disabling Deep S3
919 13:51:53.552948 Disabling Deep S3
920 13:51:53.553033 Disabling Deep S4
921 13:51:53.555758 Disabling Deep S4
922 13:51:53.555842 Disabling Deep S5
923 13:51:53.559148 Disabling Deep S5
924 13:51:53.562687 PCI: 00:1f.2 [0000/0000] hidden
925 13:51:53.566021 PCI: 00:1f.3 [8086/0000] bus ops
926 13:51:53.569428 PCI: 00:1f.3 [8086/a0c8] enabled
927 13:51:53.572728 PCI: 00:1f.5 [8086/0000] bus ops
928 13:51:53.575920 PCI: 00:1f.5 [8086/a0a4] enabled
929 13:51:53.579161 PCI: Leftover static devices:
930 13:51:53.579238 PCI: 00:10.2
931 13:51:53.582411 PCI: 00:10.6
932 13:51:53.582496 PCI: 00:10.7
933 13:51:53.582562 PCI: 00:06.0
934 13:51:53.585750 PCI: 00:07.1
935 13:51:53.585833 PCI: 00:07.2
936 13:51:53.589205 PCI: 00:07.3
937 13:51:53.589288 PCI: 00:09.0
938 13:51:53.589353 PCI: 00:0d.1
939 13:51:53.592577 PCI: 00:0d.2
940 13:51:53.592659 PCI: 00:0d.3
941 13:51:53.595969 PCI: 00:0e.0
942 13:51:53.596050 PCI: 00:12.0
943 13:51:53.599253 PCI: 00:12.6
944 13:51:53.599360 PCI: 00:13.0
945 13:51:53.599453 PCI: 00:14.1
946 13:51:53.602705 PCI: 00:16.1
947 13:51:53.602787 PCI: 00:16.2
948 13:51:53.606072 PCI: 00:16.3
949 13:51:53.606172 PCI: 00:16.4
950 13:51:53.606238 PCI: 00:16.5
951 13:51:53.609216 PCI: 00:17.0
952 13:51:53.609344 PCI: 00:19.2
953 13:51:53.612675 PCI: 00:1e.1
954 13:51:53.612782 PCI: 00:1f.1
955 13:51:53.612875 PCI: 00:1f.4
956 13:51:53.615458 PCI: 00:1f.6
957 13:51:53.615605 PCI: 00:1f.7
958 13:51:53.618872 PCI: Check your devicetree.cb.
959 13:51:53.622154 PCI: 00:02.0 scanning...
960 13:51:53.625812 scan_generic_bus for PCI: 00:02.0
961 13:51:53.628616 scan_generic_bus for PCI: 00:02.0 done
962 13:51:53.635476 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 13:51:53.638932 PCI: 00:04.0 scanning...
964 13:51:53.642352 scan_generic_bus for PCI: 00:04.0
965 13:51:53.642463 GENERIC: 0.0 enabled
966 13:51:53.648531 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 13:51:53.655226 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 13:51:53.655315 PCI: 00:0d.0 scanning...
969 13:51:53.658469 scan_static_bus for PCI: 00:0d.0
970 13:51:53.661930 USB0 port 0 enabled
971 13:51:53.665298 USB0 port 0 scanning...
972 13:51:53.668763 scan_static_bus for USB0 port 0
973 13:51:53.668848 USB3 port 0 enabled
974 13:51:53.672123 USB3 port 1 enabled
975 13:51:53.675071 USB3 port 2 disabled
976 13:51:53.675183 USB3 port 3 disabled
977 13:51:53.678494 USB3 port 0 scanning...
978 13:51:53.681877 scan_static_bus for USB3 port 0
979 13:51:53.685059 scan_static_bus for USB3 port 0 done
980 13:51:53.691574 scan_bus: bus USB3 port 0 finished in 6 msecs
981 13:51:53.691695 USB3 port 1 scanning...
982 13:51:53.695059 scan_static_bus for USB3 port 1
983 13:51:53.701375 scan_static_bus for USB3 port 1 done
984 13:51:53.704831 scan_bus: bus USB3 port 1 finished in 6 msecs
985 13:51:53.708123 scan_static_bus for USB0 port 0 done
986 13:51:53.711639 scan_bus: bus USB0 port 0 finished in 43 msecs
987 13:51:53.718135 scan_static_bus for PCI: 00:0d.0 done
988 13:51:53.721446 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 13:51:53.724944 PCI: 00:14.0 scanning...
990 13:51:53.728221 scan_static_bus for PCI: 00:14.0
991 13:51:53.731622 USB0 port 0 enabled
992 13:51:53.731733 USB0 port 0 scanning...
993 13:51:53.735069 scan_static_bus for USB0 port 0
994 13:51:53.738023 USB2 port 0 disabled
995 13:51:53.741351 USB2 port 1 enabled
996 13:51:53.741435 USB2 port 2 enabled
997 13:51:53.744786 USB2 port 3 disabled
998 13:51:53.744913 USB2 port 4 enabled
999 13:51:53.748108 USB2 port 5 disabled
1000 13:51:53.751655 USB2 port 6 disabled
1001 13:51:53.751786 USB2 port 7 disabled
1002 13:51:53.754367 USB2 port 8 disabled
1003 13:51:53.757815 USB2 port 9 disabled
1004 13:51:53.757946 USB3 port 0 disabled
1005 13:51:53.761100 USB3 port 1 enabled
1006 13:51:53.764399 USB3 port 2 disabled
1007 13:51:53.764528 USB3 port 3 disabled
1008 13:51:53.767784 USB2 port 1 scanning...
1009 13:51:53.771171 scan_static_bus for USB2 port 1
1010 13:51:53.774505 scan_static_bus for USB2 port 1 done
1011 13:51:53.780963 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 13:51:53.781110 USB2 port 2 scanning...
1013 13:51:53.784319 scan_static_bus for USB2 port 2
1014 13:51:53.787637 scan_static_bus for USB2 port 2 done
1015 13:51:53.794163 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 13:51:53.797810 USB2 port 4 scanning...
1017 13:51:53.801148 scan_static_bus for USB2 port 4
1018 13:51:53.804063 scan_static_bus for USB2 port 4 done
1019 13:51:53.807496 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 13:51:53.810881 USB3 port 1 scanning...
1021 13:51:53.814200 scan_static_bus for USB3 port 1
1022 13:51:53.817331 scan_static_bus for USB3 port 1 done
1023 13:51:53.820742 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 13:51:53.827656 scan_static_bus for USB0 port 0 done
1025 13:51:53.830908 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 13:51:53.834203 scan_static_bus for PCI: 00:14.0 done
1027 13:51:53.840917 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1028 13:51:53.841041 PCI: 00:14.3 scanning...
1029 13:51:53.843800 scan_static_bus for PCI: 00:14.3
1030 13:51:53.847236 GENERIC: 0.0 enabled
1031 13:51:53.850596 scan_static_bus for PCI: 00:14.3 done
1032 13:51:53.857426 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 13:51:53.857560 PCI: 00:15.0 scanning...
1034 13:51:53.860862 scan_static_bus for PCI: 00:15.0
1035 13:51:53.863746 I2C: 00:1a enabled
1036 13:51:53.867592 I2C: 00:31 enabled
1037 13:51:53.867720 I2C: 00:32 enabled
1038 13:51:53.870932 scan_static_bus for PCI: 00:15.0 done
1039 13:51:53.878294 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 13:51:53.878425 PCI: 00:15.1 scanning...
1041 13:51:53.881706 scan_static_bus for PCI: 00:15.1
1042 13:51:53.885111 I2C: 00:10 enabled
1043 13:51:53.888436 scan_static_bus for PCI: 00:15.1 done
1044 13:51:53.894600 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 13:51:53.894689 PCI: 00:15.2 scanning...
1046 13:51:53.897868 scan_static_bus for PCI: 00:15.2
1047 13:51:53.904529 scan_static_bus for PCI: 00:15.2 done
1048 13:51:53.907780 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 13:51:53.911204 PCI: 00:15.3 scanning...
1050 13:51:53.914566 scan_static_bus for PCI: 00:15.3
1051 13:51:53.917878 scan_static_bus for PCI: 00:15.3 done
1052 13:51:53.921232 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 13:51:53.924522 PCI: 00:19.1 scanning...
1054 13:51:53.927859 scan_static_bus for PCI: 00:19.1
1055 13:51:53.931385 I2C: 00:15 enabled
1056 13:51:53.934687 scan_static_bus for PCI: 00:19.1 done
1057 13:51:53.937598 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 13:51:53.941182 PCI: 00:1d.0 scanning...
1059 13:51:53.944519 do_pci_scan_bridge for PCI: 00:1d.0
1060 13:51:53.947484 PCI: pci_scan_bus for bus 01
1061 13:51:53.950759 PCI: 01:00.0 [1c5c/174a] enabled
1062 13:51:53.954179 GENERIC: 0.0 enabled
1063 13:51:53.957610 Enabling Common Clock Configuration
1064 13:51:53.960891 L1 Sub-State supported from root port 29
1065 13:51:53.964275 L1 Sub-State Support = 0xf
1066 13:51:53.967725 CommonModeRestoreTime = 0x28
1067 13:51:53.970978 Power On Value = 0x16, Power On Scale = 0x0
1068 13:51:53.974399 ASPM: Enabled L1
1069 13:51:53.977842 PCIe: Max_Payload_Size adjusted to 128
1070 13:51:53.983980 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 13:51:53.984067 PCI: 00:1e.2 scanning...
1072 13:51:53.987358 scan_generic_bus for PCI: 00:1e.2
1073 13:51:53.990707 SPI: 00 enabled
1074 13:51:53.997161 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 13:51:54.000588 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 13:51:54.003811 PCI: 00:1e.3 scanning...
1077 13:51:54.007245 scan_generic_bus for PCI: 00:1e.3
1078 13:51:54.010607 SPI: 00 enabled
1079 13:51:54.013731 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 13:51:54.020361 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 13:51:54.023783 PCI: 00:1f.0 scanning...
1082 13:51:54.027098 scan_static_bus for PCI: 00:1f.0
1083 13:51:54.027211 PNP: 0c09.0 enabled
1084 13:51:54.030506 PNP: 0c09.0 scanning...
1085 13:51:54.033938 scan_static_bus for PNP: 0c09.0
1086 13:51:54.037306 scan_static_bus for PNP: 0c09.0 done
1087 13:51:54.043479 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 13:51:54.047337 scan_static_bus for PCI: 00:1f.0 done
1089 13:51:54.050672 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 13:51:54.053668 PCI: 00:1f.2 scanning...
1091 13:51:54.057021 scan_static_bus for PCI: 00:1f.2
1092 13:51:54.060378 GENERIC: 0.0 enabled
1093 13:51:54.060463 GENERIC: 0.0 scanning...
1094 13:51:54.063756 scan_static_bus for GENERIC: 0.0
1095 13:51:54.067174 GENERIC: 0.0 enabled
1096 13:51:54.070136 GENERIC: 1.0 enabled
1097 13:51:54.073477 scan_static_bus for GENERIC: 0.0 done
1098 13:51:54.076705 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 13:51:54.083593 scan_static_bus for PCI: 00:1f.2 done
1100 13:51:54.086973 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 13:51:54.090339 PCI: 00:1f.3 scanning...
1102 13:51:54.093808 scan_static_bus for PCI: 00:1f.3
1103 13:51:54.096575 scan_static_bus for PCI: 00:1f.3 done
1104 13:51:54.100123 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 13:51:54.103528 PCI: 00:1f.5 scanning...
1106 13:51:54.106852 scan_generic_bus for PCI: 00:1f.5
1107 13:51:54.110112 scan_generic_bus for PCI: 00:1f.5 done
1108 13:51:54.116917 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 13:51:54.120165 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1110 13:51:54.123544 scan_static_bus for Root Device done
1111 13:51:54.129864 scan_bus: bus Root Device finished in 737 msecs
1112 13:51:54.129954 done
1113 13:51:54.136639 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1114 13:51:54.139969 Chrome EC: UHEPI supported
1115 13:51:54.146617 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 13:51:54.153297 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 13:51:54.156779 SPI flash protection: WPSW=0 SRP0=0
1118 13:51:54.160164 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 13:51:54.166565 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1120 13:51:54.169917 found VGA at PCI: 00:02.0
1121 13:51:54.173291 Setting up VGA for PCI: 00:02.0
1122 13:51:54.176670 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 13:51:54.183186 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 13:51:54.186536 Allocating resources...
1125 13:51:54.186621 Reading resources...
1126 13:51:54.192821 Root Device read_resources bus 0 link: 0
1127 13:51:54.196284 DOMAIN: 0000 read_resources bus 0 link: 0
1128 13:51:54.199670 PCI: 00:04.0 read_resources bus 1 link: 0
1129 13:51:54.206463 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 13:51:54.209858 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 13:51:54.216463 USB0 port 0 read_resources bus 0 link: 0
1132 13:51:54.219791 USB0 port 0 read_resources bus 0 link: 0 done
1133 13:51:54.226566 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 13:51:54.229840 PCI: 00:14.0 read_resources bus 0 link: 0
1135 13:51:54.233158 USB0 port 0 read_resources bus 0 link: 0
1136 13:51:54.241132 USB0 port 0 read_resources bus 0 link: 0 done
1137 13:51:54.244337 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 13:51:54.251269 PCI: 00:14.3 read_resources bus 0 link: 0
1139 13:51:54.254724 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 13:51:54.261267 PCI: 00:15.0 read_resources bus 0 link: 0
1141 13:51:54.264551 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 13:51:54.270891 PCI: 00:15.1 read_resources bus 0 link: 0
1143 13:51:54.274330 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 13:51:54.281799 PCI: 00:19.1 read_resources bus 0 link: 0
1145 13:51:54.285106 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 13:51:54.291526 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 13:51:54.294981 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 13:51:54.301757 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 13:51:54.304769 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 13:51:54.311508 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 13:51:54.314888 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 13:51:54.321667 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 13:51:54.324455 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 13:51:54.331149 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 13:51:54.334865 GENERIC: 0.0 read_resources bus 0 link: 0
1156 13:51:54.337966 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 13:51:54.344965 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 13:51:54.351184 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 13:51:54.354565 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 13:51:54.361134 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 13:51:54.364488 Root Device read_resources bus 0 link: 0 done
1162 13:51:54.367878 Done reading resources.
1163 13:51:54.371245 Show resources in subtree (Root Device)...After reading.
1164 13:51:54.377648 Root Device child on link 0 DOMAIN: 0000
1165 13:51:54.381092 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 13:51:54.390878 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 13:51:54.401089 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 13:51:54.401178 PCI: 00:00.0
1169 13:51:54.410667 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 13:51:54.420760 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 13:51:54.431000 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 13:51:54.441095 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 13:51:54.450632 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 13:51:54.457155 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 13:51:54.467525 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 13:51:54.477244 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 13:51:54.486963 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 13:51:54.497272 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 13:51:54.507222 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 13:51:54.513569 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 13:51:54.523784 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 13:51:54.533643 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 13:51:54.543793 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 13:51:54.553774 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 13:51:54.563552 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 13:51:54.570506 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 13:51:54.579900 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 13:51:54.590007 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 13:51:54.593575 PCI: 00:02.0
1190 13:51:54.603232 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 13:51:54.613022 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 13:51:54.619987 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 13:51:54.626818 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 13:51:54.636730 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 13:51:54.636825 GENERIC: 0.0
1196 13:51:54.640068 PCI: 00:05.0
1197 13:51:54.649830 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 13:51:54.653264 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 13:51:54.656142 GENERIC: 0.0
1200 13:51:54.656248 PCI: 00:08.0
1201 13:51:54.666146 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 13:51:54.669808 PCI: 00:0a.0
1203 13:51:54.672897 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 13:51:54.683052 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 13:51:54.689390 USB0 port 0 child on link 0 USB3 port 0
1206 13:51:54.689486 USB3 port 0
1207 13:51:54.692813 USB3 port 1
1208 13:51:54.692888 USB3 port 2
1209 13:51:54.696195 USB3 port 3
1210 13:51:54.699533 PCI: 00:14.0 child on link 0 USB0 port 0
1211 13:51:54.709141 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 13:51:54.712596 USB0 port 0 child on link 0 USB2 port 0
1213 13:51:54.715886 USB2 port 0
1214 13:51:54.715962 USB2 port 1
1215 13:51:54.719241 USB2 port 2
1216 13:51:54.719318 USB2 port 3
1217 13:51:54.722716 USB2 port 4
1218 13:51:54.725588 USB2 port 5
1219 13:51:54.725663 USB2 port 6
1220 13:51:54.728937 USB2 port 7
1221 13:51:54.729020 USB2 port 8
1222 13:51:54.732406 USB2 port 9
1223 13:51:54.732506 USB3 port 0
1224 13:51:54.735520 USB3 port 1
1225 13:51:54.735609 USB3 port 2
1226 13:51:54.738960 USB3 port 3
1227 13:51:54.739034 PCI: 00:14.2
1228 13:51:54.749127 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 13:51:54.758667 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 13:51:54.765370 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 13:51:54.775544 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 13:51:54.775642 GENERIC: 0.0
1233 13:51:54.781970 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 13:51:54.792163 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 13:51:54.792248 I2C: 00:1a
1236 13:51:54.792315 I2C: 00:31
1237 13:51:54.795568 I2C: 00:32
1238 13:51:54.799036 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 13:51:54.808767 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 13:51:54.811875 I2C: 00:10
1241 13:51:54.811983 PCI: 00:15.2
1242 13:51:54.822124 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 13:51:54.824976 PCI: 00:15.3
1244 13:51:54.835167 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 13:51:54.835249 PCI: 00:16.0
1246 13:51:54.845177 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 13:51:54.848597 PCI: 00:19.0
1248 13:51:54.851923 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 13:51:54.861575 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 13:51:54.861664 I2C: 00:15
1251 13:51:54.868301 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 13:51:54.875093 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 13:51:54.884687 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 13:51:54.894876 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 13:51:54.898083 GENERIC: 0.0
1256 13:51:54.898163 PCI: 01:00.0
1257 13:51:54.907812 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 13:51:54.918165 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1259 13:51:54.927810 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1260 13:51:54.927899 PCI: 00:1e.0
1261 13:51:54.940898 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1262 13:51:54.944690 PCI: 00:1e.2 child on link 0 SPI: 00
1263 13:51:54.954384 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 13:51:54.954512 SPI: 00
1265 13:51:54.961066 PCI: 00:1e.3 child on link 0 SPI: 00
1266 13:51:54.970942 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 13:51:54.971032 SPI: 00
1268 13:51:54.974394 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1269 13:51:54.984452 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1270 13:51:54.984546 PNP: 0c09.0
1271 13:51:54.993955 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1272 13:51:54.997347 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1273 13:51:55.006903 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1274 13:51:55.017287 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1275 13:51:55.020584 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1276 13:51:55.023975 GENERIC: 0.0
1277 13:51:55.027421 GENERIC: 1.0
1278 13:51:55.027503 PCI: 00:1f.3
1279 13:51:55.037086 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 13:51:55.046620 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1281 13:51:55.049899 PCI: 00:1f.5
1282 13:51:55.056830 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1283 13:51:55.063529 CPU_CLUSTER: 0 child on link 0 APIC: 00
1284 13:51:55.063648 APIC: 00
1285 13:51:55.066571 APIC: 01
1286 13:51:55.066677 APIC: 03
1287 13:51:55.066771 APIC: 05
1288 13:51:55.069971 APIC: 07
1289 13:51:55.070055 APIC: 06
1290 13:51:55.070122 APIC: 02
1291 13:51:55.073208 APIC: 04
1292 13:51:55.080103 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1293 13:51:55.086329 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1294 13:51:55.093092 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1295 13:51:55.099809 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1296 13:51:55.103351 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1297 13:51:55.106363 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1298 13:51:55.109673 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1299 13:51:55.119804 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1300 13:51:55.126322 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1301 13:51:55.133030 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1302 13:51:55.139777 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1303 13:51:55.146003 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1304 13:51:55.152966 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1305 13:51:55.162595 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1306 13:51:55.169372 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1307 13:51:55.172905 DOMAIN: 0000: Resource ranges:
1308 13:51:55.176216 * Base: 1000, Size: 800, Tag: 100
1309 13:51:55.179634 * Base: 1900, Size: e700, Tag: 100
1310 13:51:55.185835 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1311 13:51:55.192740 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1312 13:51:55.199512 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1313 13:51:55.205670 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1314 13:51:55.212406 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1315 13:51:55.222410 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1316 13:51:55.228782 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1317 13:51:55.235630 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1318 13:51:55.245891 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1319 13:51:55.252284 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1320 13:51:55.258791 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1321 13:51:55.268381 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1322 13:51:55.275245 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1323 13:51:55.282022 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1324 13:51:55.291710 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1325 13:51:55.298551 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1326 13:51:55.305280 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1327 13:51:55.314840 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1328 13:51:55.321678 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1329 13:51:55.328129 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1330 13:51:55.338374 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1331 13:51:55.344780 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1332 13:51:55.351541 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1333 13:51:55.361489 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1334 13:51:55.368061 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1335 13:51:55.371528 DOMAIN: 0000: Resource ranges:
1336 13:51:55.374441 * Base: 7fc00000, Size: 40400000, Tag: 200
1337 13:51:55.381251 * Base: d0000000, Size: 28000000, Tag: 200
1338 13:51:55.384740 * Base: fa000000, Size: 1000000, Tag: 200
1339 13:51:55.388233 * Base: fb001000, Size: 2fff000, Tag: 200
1340 13:51:55.394474 * Base: fe010000, Size: 2e000, Tag: 200
1341 13:51:55.397990 * Base: fe03f000, Size: d41000, Tag: 200
1342 13:51:55.401273 * Base: fed88000, Size: 8000, Tag: 200
1343 13:51:55.404735 * Base: fed93000, Size: d000, Tag: 200
1344 13:51:55.408093 * Base: feda2000, Size: 1e000, Tag: 200
1345 13:51:55.414395 * Base: fede0000, Size: 1220000, Tag: 200
1346 13:51:55.417750 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1347 13:51:55.424571 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1348 13:51:55.430882 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1349 13:51:55.437713 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1350 13:51:55.444211 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1351 13:51:55.451058 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1352 13:51:55.457725 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1353 13:51:55.464596 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1354 13:51:55.470614 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1355 13:51:55.477447 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1356 13:51:55.484300 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1357 13:51:55.490605 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1358 13:51:55.497349 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1359 13:51:55.504172 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1360 13:51:55.510304 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1361 13:51:55.517096 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1362 13:51:55.523544 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1363 13:51:55.530387 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1364 13:51:55.537188 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1365 13:51:55.543784 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1366 13:51:55.550166 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1367 13:51:55.557001 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1368 13:51:55.563380 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1369 13:51:55.573442 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1370 13:51:55.579785 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1371 13:51:55.583145 PCI: 00:1d.0: Resource ranges:
1372 13:51:55.586651 * Base: 7fc00000, Size: 100000, Tag: 200
1373 13:51:55.593267 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1374 13:51:55.600025 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1375 13:51:55.606899 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1376 13:51:55.616427 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1377 13:51:55.623252 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1378 13:51:55.626757 Root Device assign_resources, bus 0 link: 0
1379 13:51:55.633015 DOMAIN: 0000 assign_resources, bus 0 link: 0
1380 13:51:55.639831 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1381 13:51:55.649588 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1382 13:51:55.656517 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1383 13:51:55.666043 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1384 13:51:55.669885 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 13:51:55.672872 PCI: 00:04.0 assign_resources, bus 1 link: 0
1386 13:51:55.683087 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1387 13:51:55.689213 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1388 13:51:55.699414 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1389 13:51:55.702757 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 13:51:55.709121 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1391 13:51:55.715688 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1392 13:51:55.722107 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 13:51:55.725464 PCI: 00:14.0 assign_resources, bus 0 link: 0
1394 13:51:55.732452 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1395 13:51:55.742112 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1396 13:51:55.748947 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1397 13:51:55.755663 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 13:51:55.758742 PCI: 00:14.3 assign_resources, bus 0 link: 0
1399 13:51:55.768626 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1400 13:51:55.771857 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 13:51:55.775040 PCI: 00:15.0 assign_resources, bus 0 link: 0
1402 13:51:55.785518 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1403 13:51:55.788909 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 13:51:55.795496 PCI: 00:15.1 assign_resources, bus 0 link: 0
1405 13:51:55.801745 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1406 13:51:55.811511 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1407 13:51:55.818285 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1408 13:51:55.828121 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1409 13:51:55.831448 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 13:51:55.838198 PCI: 00:19.1 assign_resources, bus 0 link: 0
1411 13:51:55.844575 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1412 13:51:55.854801 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1413 13:51:55.864856 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1414 13:51:55.868127 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 13:51:55.877952 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1416 13:51:55.884515 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1417 13:51:55.890890 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1418 13:51:55.897698 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1419 13:51:55.904004 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1420 13:51:55.910945 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 13:51:55.914389 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1422 13:51:55.924003 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1423 13:51:55.927291 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 13:51:55.930825 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1425 13:51:55.937102 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 13:51:55.940547 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1427 13:51:55.947360 LPC: Trying to open IO window from 800 size 1ff
1428 13:51:55.954131 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1429 13:51:55.963756 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1430 13:51:55.970592 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1431 13:51:55.976828 DOMAIN: 0000 assign_resources, bus 0 link: 0
1432 13:51:55.980185 Root Device assign_resources, bus 0 link: 0
1433 13:51:55.983538 Done setting resources.
1434 13:51:55.989950 Show resources in subtree (Root Device)...After assigning values.
1435 13:51:55.993873 Root Device child on link 0 DOMAIN: 0000
1436 13:51:55.996769 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1437 13:51:56.006874 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1438 13:51:56.016852 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1439 13:51:56.020237 PCI: 00:00.0
1440 13:51:56.029833 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1441 13:51:56.036545 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1442 13:51:56.046794 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1443 13:51:56.056597 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1444 13:51:56.066209 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1445 13:51:56.076349 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1446 13:51:56.083165 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1447 13:51:56.092871 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1448 13:51:56.102605 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1449 13:51:56.112901 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1450 13:51:56.122784 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1451 13:51:56.132791 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1452 13:51:56.139060 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1453 13:51:56.149188 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1454 13:51:56.158912 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1455 13:51:56.168758 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1456 13:51:56.178790 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1457 13:51:56.188937 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1458 13:51:56.198925 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1459 13:51:56.205669 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1460 13:51:56.208959 PCI: 00:02.0
1461 13:51:56.218481 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1462 13:51:56.228620 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1463 13:51:56.238690 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1464 13:51:56.245578 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1465 13:51:56.255173 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1466 13:51:56.255301 GENERIC: 0.0
1467 13:51:56.258560 PCI: 00:05.0
1468 13:51:56.268496 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1469 13:51:56.271831 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1470 13:51:56.275322 GENERIC: 0.0
1471 13:51:56.275434 PCI: 00:08.0
1472 13:51:56.284889 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1473 13:51:56.288069 PCI: 00:0a.0
1474 13:51:56.291519 PCI: 00:0d.0 child on link 0 USB0 port 0
1475 13:51:56.301765 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1476 13:51:56.308597 USB0 port 0 child on link 0 USB3 port 0
1477 13:51:56.308688 USB3 port 0
1478 13:51:56.311517 USB3 port 1
1479 13:51:56.311602 USB3 port 2
1480 13:51:56.314977 USB3 port 3
1481 13:51:56.318181 PCI: 00:14.0 child on link 0 USB0 port 0
1482 13:51:56.328131 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1483 13:51:56.334546 USB0 port 0 child on link 0 USB2 port 0
1484 13:51:56.334646 USB2 port 0
1485 13:51:56.338322 USB2 port 1
1486 13:51:56.338410 USB2 port 2
1487 13:51:56.341250 USB2 port 3
1488 13:51:56.341355 USB2 port 4
1489 13:51:56.344596 USB2 port 5
1490 13:51:56.344685 USB2 port 6
1491 13:51:56.348033 USB2 port 7
1492 13:51:56.348145 USB2 port 8
1493 13:51:56.351352 USB2 port 9
1494 13:51:56.354904 USB3 port 0
1495 13:51:56.354993 USB3 port 1
1496 13:51:56.357929 USB3 port 2
1497 13:51:56.358015 USB3 port 3
1498 13:51:56.361387 PCI: 00:14.2
1499 13:51:56.370991 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1500 13:51:56.381211 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1501 13:51:56.384581 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1502 13:51:56.394137 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1503 13:51:56.397698 GENERIC: 0.0
1504 13:51:56.401028 PCI: 00:15.0 child on link 0 I2C: 00:1a
1505 13:51:56.410609 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1506 13:51:56.414026 I2C: 00:1a
1507 13:51:56.414115 I2C: 00:31
1508 13:51:56.417389 I2C: 00:32
1509 13:51:56.420651 PCI: 00:15.1 child on link 0 I2C: 00:10
1510 13:51:56.430771 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1511 13:51:56.434258 I2C: 00:10
1512 13:51:56.434373 PCI: 00:15.2
1513 13:51:56.443961 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1514 13:51:56.447235 PCI: 00:15.3
1515 13:51:56.457101 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1516 13:51:56.457202 PCI: 00:16.0
1517 13:51:56.470400 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1518 13:51:56.470500 PCI: 00:19.0
1519 13:51:56.473965 PCI: 00:19.1 child on link 0 I2C: 00:15
1520 13:51:56.483559 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1521 13:51:56.486885 I2C: 00:15
1522 13:51:56.490277 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1523 13:51:56.500526 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1524 13:51:56.513588 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1525 13:51:56.523160 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1526 13:51:56.523302 GENERIC: 0.0
1527 13:51:56.526516 PCI: 01:00.0
1528 13:51:56.536578 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1529 13:51:56.546859 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1530 13:51:56.556486 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1531 13:51:56.559781 PCI: 00:1e.0
1532 13:51:56.569974 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1533 13:51:56.573474 PCI: 00:1e.2 child on link 0 SPI: 00
1534 13:51:56.583154 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1535 13:51:56.586575 SPI: 00
1536 13:51:56.589933 PCI: 00:1e.3 child on link 0 SPI: 00
1537 13:51:56.599315 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1538 13:51:56.602737 SPI: 00
1539 13:51:56.606279 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1540 13:51:56.616174 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1541 13:51:56.616294 PNP: 0c09.0
1542 13:51:56.625983 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1543 13:51:56.629249 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1544 13:51:56.639638 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1545 13:51:56.649166 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1546 13:51:56.652801 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1547 13:51:56.656325 GENERIC: 0.0
1548 13:51:56.656455 GENERIC: 1.0
1549 13:51:56.659291 PCI: 00:1f.3
1550 13:51:56.668936 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1551 13:51:56.679253 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1552 13:51:56.679364 PCI: 00:1f.5
1553 13:51:56.692280 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1554 13:51:56.695643 CPU_CLUSTER: 0 child on link 0 APIC: 00
1555 13:51:56.695757 APIC: 00
1556 13:51:56.698768 APIC: 01
1557 13:51:56.698852 APIC: 03
1558 13:51:56.698938 APIC: 05
1559 13:51:56.702241 APIC: 07
1560 13:51:56.702329 APIC: 06
1561 13:51:56.705698 APIC: 02
1562 13:51:56.705813 APIC: 04
1563 13:51:56.708582 Done allocating resources.
1564 13:51:56.715441 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1565 13:51:56.718743 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1566 13:51:56.724961 Configure GPIOs for I2S audio on UP4.
1567 13:51:56.731735 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1568 13:51:56.735101 Enabling resources...
1569 13:51:56.738637 PCI: 00:00.0 subsystem <- 8086/9a12
1570 13:51:56.738750 PCI: 00:00.0 cmd <- 06
1571 13:51:56.745077 PCI: 00:02.0 subsystem <- 8086/9a40
1572 13:51:56.745190 PCI: 00:02.0 cmd <- 03
1573 13:51:56.748638 PCI: 00:04.0 subsystem <- 8086/9a03
1574 13:51:56.751478 PCI: 00:04.0 cmd <- 02
1575 13:51:56.754860 PCI: 00:05.0 subsystem <- 8086/9a19
1576 13:51:56.758332 PCI: 00:05.0 cmd <- 02
1577 13:51:56.761430 PCI: 00:08.0 subsystem <- 8086/9a11
1578 13:51:56.765150 PCI: 00:08.0 cmd <- 06
1579 13:51:56.768384 PCI: 00:0d.0 subsystem <- 8086/9a13
1580 13:51:56.771664 PCI: 00:0d.0 cmd <- 02
1581 13:51:56.774775 PCI: 00:14.0 subsystem <- 8086/a0ed
1582 13:51:56.778319 PCI: 00:14.0 cmd <- 02
1583 13:51:56.781981 PCI: 00:14.2 subsystem <- 8086/a0ef
1584 13:51:56.784583 PCI: 00:14.2 cmd <- 02
1585 13:51:56.788037 PCI: 00:14.3 subsystem <- 8086/a0f0
1586 13:51:56.788162 PCI: 00:14.3 cmd <- 02
1587 13:51:56.794792 PCI: 00:15.0 subsystem <- 8086/a0e8
1588 13:51:56.794918 PCI: 00:15.0 cmd <- 02
1589 13:51:56.798130 PCI: 00:15.1 subsystem <- 8086/a0e9
1590 13:51:56.801310 PCI: 00:15.1 cmd <- 02
1591 13:51:56.804770 PCI: 00:15.2 subsystem <- 8086/a0ea
1592 13:51:56.808150 PCI: 00:15.2 cmd <- 02
1593 13:51:56.811443 PCI: 00:15.3 subsystem <- 8086/a0eb
1594 13:51:56.814324 PCI: 00:15.3 cmd <- 02
1595 13:51:56.817702 PCI: 00:16.0 subsystem <- 8086/a0e0
1596 13:51:56.821084 PCI: 00:16.0 cmd <- 02
1597 13:51:56.824417 PCI: 00:19.1 subsystem <- 8086/a0c6
1598 13:51:56.827716 PCI: 00:19.1 cmd <- 02
1599 13:51:56.831155 PCI: 00:1d.0 bridge ctrl <- 0013
1600 13:51:56.834564 PCI: 00:1d.0 subsystem <- 8086/a0b0
1601 13:51:56.837359 PCI: 00:1d.0 cmd <- 06
1602 13:51:56.840643 PCI: 00:1e.0 subsystem <- 8086/a0a8
1603 13:51:56.840750 PCI: 00:1e.0 cmd <- 06
1604 13:51:56.847477 PCI: 00:1e.2 subsystem <- 8086/a0aa
1605 13:51:56.847585 PCI: 00:1e.2 cmd <- 06
1606 13:51:56.850971 PCI: 00:1e.3 subsystem <- 8086/a0ab
1607 13:51:56.854291 PCI: 00:1e.3 cmd <- 02
1608 13:51:56.857592 PCI: 00:1f.0 subsystem <- 8086/a087
1609 13:51:56.860543 PCI: 00:1f.0 cmd <- 407
1610 13:51:56.863858 PCI: 00:1f.3 subsystem <- 8086/a0c8
1611 13:51:56.867181 PCI: 00:1f.3 cmd <- 02
1612 13:51:56.870639 PCI: 00:1f.5 subsystem <- 8086/a0a4
1613 13:51:56.873934 PCI: 00:1f.5 cmd <- 406
1614 13:51:56.877747 PCI: 01:00.0 cmd <- 02
1615 13:51:56.882364 done.
1616 13:51:56.885673 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1617 13:51:56.889039 Initializing devices...
1618 13:51:56.892570 Root Device init
1619 13:51:56.895486 Chrome EC: Set SMI mask to 0x0000000000000000
1620 13:51:56.902345 Chrome EC: clear events_b mask to 0x0000000000000000
1621 13:51:56.909012 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1622 13:51:56.912433 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1623 13:51:56.918706 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1624 13:51:56.925624 Chrome EC: Set WAKE mask to 0x0000000000000000
1625 13:51:56.929002 fw_config match found: DB_USB=USB3_ACTIVE
1626 13:51:56.935421 Configure Right Type-C port orientation for retimer
1627 13:51:56.938737 Root Device init finished in 43 msecs
1628 13:51:56.942065 PCI: 00:00.0 init
1629 13:51:56.945448 CPU TDP = 9 Watts
1630 13:51:56.945540 CPU PL1 = 9 Watts
1631 13:51:56.948927 CPU PL2 = 40 Watts
1632 13:51:56.952272 CPU PL4 = 83 Watts
1633 13:51:56.955189 PCI: 00:00.0 init finished in 8 msecs
1634 13:51:56.955297 PCI: 00:02.0 init
1635 13:51:56.958728 GMA: Found VBT in CBFS
1636 13:51:56.962142 GMA: Found valid VBT in CBFS
1637 13:51:56.968927 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1638 13:51:56.975390 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1639 13:51:56.978668 PCI: 00:02.0 init finished in 18 msecs
1640 13:51:56.981993 PCI: 00:05.0 init
1641 13:51:56.985105 PCI: 00:05.0 init finished in 0 msecs
1642 13:51:56.988407 PCI: 00:08.0 init
1643 13:51:56.991637 PCI: 00:08.0 init finished in 0 msecs
1644 13:51:56.994929 PCI: 00:14.0 init
1645 13:51:56.998383 PCI: 00:14.0 init finished in 0 msecs
1646 13:51:57.001784 PCI: 00:14.2 init
1647 13:51:57.005069 PCI: 00:14.2 init finished in 0 msecs
1648 13:51:57.008496 PCI: 00:15.0 init
1649 13:51:57.008584 I2C bus 0 version 0x3230302a
1650 13:51:57.015134 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1651 13:51:57.017958 PCI: 00:15.0 init finished in 6 msecs
1652 13:51:57.018047 PCI: 00:15.1 init
1653 13:51:57.021273 I2C bus 1 version 0x3230302a
1654 13:51:57.024814 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1655 13:51:57.031604 PCI: 00:15.1 init finished in 6 msecs
1656 13:51:57.031717 PCI: 00:15.2 init
1657 13:51:57.034556 I2C bus 2 version 0x3230302a
1658 13:51:57.038044 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1659 13:51:57.041533 PCI: 00:15.2 init finished in 6 msecs
1660 13:51:57.044653 PCI: 00:15.3 init
1661 13:51:57.048081 I2C bus 3 version 0x3230302a
1662 13:51:57.051504 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1663 13:51:57.054895 PCI: 00:15.3 init finished in 6 msecs
1664 13:51:57.057675 PCI: 00:16.0 init
1665 13:51:57.061058 PCI: 00:16.0 init finished in 0 msecs
1666 13:51:57.064446 PCI: 00:19.1 init
1667 13:51:57.067895 I2C bus 5 version 0x3230302a
1668 13:51:57.071175 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1669 13:51:57.074589 PCI: 00:19.1 init finished in 6 msecs
1670 13:51:57.078001 PCI: 00:1d.0 init
1671 13:51:57.078089 Initializing PCH PCIe bridge.
1672 13:51:57.084135 PCI: 00:1d.0 init finished in 3 msecs
1673 13:51:57.087817 PCI: 00:1f.0 init
1674 13:51:57.090712 IOAPIC: Initializing IOAPIC at 0xfec00000
1675 13:51:57.094294 IOAPIC: Bootstrap Processor Local APIC = 0x00
1676 13:51:57.097553 IOAPIC: ID = 0x02
1677 13:51:57.100953 IOAPIC: Dumping registers
1678 13:51:57.101036 reg 0x0000: 0x02000000
1679 13:51:57.104215 reg 0x0001: 0x00770020
1680 13:51:57.107679 reg 0x0002: 0x00000000
1681 13:51:57.111010 PCI: 00:1f.0 init finished in 21 msecs
1682 13:51:57.114276 PCI: 00:1f.2 init
1683 13:51:57.117365 Disabling ACPI via APMC.
1684 13:51:57.120919 APMC done.
1685 13:51:57.124198 PCI: 00:1f.2 init finished in 6 msecs
1686 13:51:57.136137 PCI: 01:00.0 init
1687 13:51:57.139087 PCI: 01:00.0 init finished in 0 msecs
1688 13:51:57.142515 PNP: 0c09.0 init
1689 13:51:57.149268 Google Chrome EC uptime: 8.416 seconds
1690 13:51:57.152230 Google Chrome AP resets since EC boot: 0
1691 13:51:57.155577 Google Chrome most recent AP reset causes:
1692 13:51:57.162700 Google Chrome EC reset flags at last EC boot: reset-pin
1693 13:51:57.165491 PNP: 0c09.0 init finished in 19 msecs
1694 13:51:57.171198 Devices initialized
1695 13:51:57.173967 Show all devs... After init.
1696 13:51:57.177352 Root Device: enabled 1
1697 13:51:57.177484 DOMAIN: 0000: enabled 1
1698 13:51:57.180778 CPU_CLUSTER: 0: enabled 1
1699 13:51:57.184248 PCI: 00:00.0: enabled 1
1700 13:51:57.187635 PCI: 00:02.0: enabled 1
1701 13:51:57.187741 PCI: 00:04.0: enabled 1
1702 13:51:57.190910 PCI: 00:05.0: enabled 1
1703 13:51:57.194091 PCI: 00:06.0: enabled 0
1704 13:51:57.197210 PCI: 00:07.0: enabled 0
1705 13:51:57.197298 PCI: 00:07.1: enabled 0
1706 13:51:57.200781 PCI: 00:07.2: enabled 0
1707 13:51:57.204080 PCI: 00:07.3: enabled 0
1708 13:51:57.207412 PCI: 00:08.0: enabled 1
1709 13:51:57.207496 PCI: 00:09.0: enabled 0
1710 13:51:57.210731 PCI: 00:0a.0: enabled 0
1711 13:51:57.214133 PCI: 00:0d.0: enabled 1
1712 13:51:57.217544 PCI: 00:0d.1: enabled 0
1713 13:51:57.217650 PCI: 00:0d.2: enabled 0
1714 13:51:57.220245 PCI: 00:0d.3: enabled 0
1715 13:51:57.223972 PCI: 00:0e.0: enabled 0
1716 13:51:57.227258 PCI: 00:10.2: enabled 1
1717 13:51:57.227340 PCI: 00:10.6: enabled 0
1718 13:51:57.230671 PCI: 00:10.7: enabled 0
1719 13:51:57.233748 PCI: 00:12.0: enabled 0
1720 13:51:57.233834 PCI: 00:12.6: enabled 0
1721 13:51:57.237165 PCI: 00:13.0: enabled 0
1722 13:51:57.240429 PCI: 00:14.0: enabled 1
1723 13:51:57.244005 PCI: 00:14.1: enabled 0
1724 13:51:57.244087 PCI: 00:14.2: enabled 1
1725 13:51:57.246935 PCI: 00:14.3: enabled 1
1726 13:51:57.250260 PCI: 00:15.0: enabled 1
1727 13:51:57.253525 PCI: 00:15.1: enabled 1
1728 13:51:57.253612 PCI: 00:15.2: enabled 1
1729 13:51:57.256899 PCI: 00:15.3: enabled 1
1730 13:51:57.260268 PCI: 00:16.0: enabled 1
1731 13:51:57.263693 PCI: 00:16.1: enabled 0
1732 13:51:57.263776 PCI: 00:16.2: enabled 0
1733 13:51:57.267002 PCI: 00:16.3: enabled 0
1734 13:51:57.270433 PCI: 00:16.4: enabled 0
1735 13:51:57.273241 PCI: 00:16.5: enabled 0
1736 13:51:57.273320 PCI: 00:17.0: enabled 0
1737 13:51:57.276606 PCI: 00:19.0: enabled 0
1738 13:51:57.280050 PCI: 00:19.1: enabled 1
1739 13:51:57.280136 PCI: 00:19.2: enabled 0
1740 13:51:57.283509 PCI: 00:1c.0: enabled 1
1741 13:51:57.286935 PCI: 00:1c.1: enabled 0
1742 13:51:57.289873 PCI: 00:1c.2: enabled 0
1743 13:51:57.289956 PCI: 00:1c.3: enabled 0
1744 13:51:57.293258 PCI: 00:1c.4: enabled 0
1745 13:51:57.296702 PCI: 00:1c.5: enabled 0
1746 13:51:57.300258 PCI: 00:1c.6: enabled 1
1747 13:51:57.300340 PCI: 00:1c.7: enabled 0
1748 13:51:57.303625 PCI: 00:1d.0: enabled 1
1749 13:51:57.306809 PCI: 00:1d.1: enabled 0
1750 13:51:57.309944 PCI: 00:1d.2: enabled 1
1751 13:51:57.310024 PCI: 00:1d.3: enabled 0
1752 13:51:57.313175 PCI: 00:1e.0: enabled 1
1753 13:51:57.316417 PCI: 00:1e.1: enabled 0
1754 13:51:57.319770 PCI: 00:1e.2: enabled 1
1755 13:51:57.319859 PCI: 00:1e.3: enabled 1
1756 13:51:57.323043 PCI: 00:1f.0: enabled 1
1757 13:51:57.326403 PCI: 00:1f.1: enabled 0
1758 13:51:57.326489 PCI: 00:1f.2: enabled 1
1759 13:51:57.329717 PCI: 00:1f.3: enabled 1
1760 13:51:57.332959 PCI: 00:1f.4: enabled 0
1761 13:51:57.336303 PCI: 00:1f.5: enabled 1
1762 13:51:57.336424 PCI: 00:1f.6: enabled 0
1763 13:51:57.339606 PCI: 00:1f.7: enabled 0
1764 13:51:57.342889 APIC: 00: enabled 1
1765 13:51:57.346350 GENERIC: 0.0: enabled 1
1766 13:51:57.346430 GENERIC: 0.0: enabled 1
1767 13:51:57.349850 GENERIC: 1.0: enabled 1
1768 13:51:57.352767 GENERIC: 0.0: enabled 1
1769 13:51:57.352886 GENERIC: 1.0: enabled 1
1770 13:51:57.356098 USB0 port 0: enabled 1
1771 13:51:57.359500 GENERIC: 0.0: enabled 1
1772 13:51:57.362709 USB0 port 0: enabled 1
1773 13:51:57.362802 GENERIC: 0.0: enabled 1
1774 13:51:57.366221 I2C: 00:1a: enabled 1
1775 13:51:57.369718 I2C: 00:31: enabled 1
1776 13:51:57.369794 I2C: 00:32: enabled 1
1777 13:51:57.373175 I2C: 00:10: enabled 1
1778 13:51:57.376018 I2C: 00:15: enabled 1
1779 13:51:57.376109 GENERIC: 0.0: enabled 0
1780 13:51:57.379533 GENERIC: 1.0: enabled 0
1781 13:51:57.382947 GENERIC: 0.0: enabled 1
1782 13:51:57.385858 SPI: 00: enabled 1
1783 13:51:57.385990 SPI: 00: enabled 1
1784 13:51:57.389235 PNP: 0c09.0: enabled 1
1785 13:51:57.392555 GENERIC: 0.0: enabled 1
1786 13:51:57.392676 USB3 port 0: enabled 1
1787 13:51:57.396044 USB3 port 1: enabled 1
1788 13:51:57.399492 USB3 port 2: enabled 0
1789 13:51:57.399579 USB3 port 3: enabled 0
1790 13:51:57.402380 USB2 port 0: enabled 0
1791 13:51:57.405762 USB2 port 1: enabled 1
1792 13:51:57.409311 USB2 port 2: enabled 1
1793 13:51:57.409423 USB2 port 3: enabled 0
1794 13:51:57.412701 USB2 port 4: enabled 1
1795 13:51:57.415997 USB2 port 5: enabled 0
1796 13:51:57.416082 USB2 port 6: enabled 0
1797 13:51:57.419532 USB2 port 7: enabled 0
1798 13:51:57.422656 USB2 port 8: enabled 0
1799 13:51:57.425579 USB2 port 9: enabled 0
1800 13:51:57.425666 USB3 port 0: enabled 0
1801 13:51:57.428893 USB3 port 1: enabled 1
1802 13:51:57.432155 USB3 port 2: enabled 0
1803 13:51:57.432268 USB3 port 3: enabled 0
1804 13:51:57.435460 GENERIC: 0.0: enabled 1
1805 13:51:57.438811 GENERIC: 1.0: enabled 1
1806 13:51:57.438893 APIC: 01: enabled 1
1807 13:51:57.442167 APIC: 03: enabled 1
1808 13:51:57.445705 APIC: 05: enabled 1
1809 13:51:57.445813 APIC: 07: enabled 1
1810 13:51:57.449173 APIC: 06: enabled 1
1811 13:51:57.452102 APIC: 02: enabled 1
1812 13:51:57.452210 APIC: 04: enabled 1
1813 13:51:57.455398 PCI: 01:00.0: enabled 1
1814 13:51:57.462139 BS: BS_DEV_INIT run times (exec / console): 32 / 536 ms
1815 13:51:57.465364 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1816 13:51:57.468934 ELOG: NV offset 0xf30000 size 0x1000
1817 13:51:57.476292 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1818 13:51:57.482552 ELOG: Event(17) added with size 13 at 2023-04-20 13:51:57 UTC
1819 13:51:57.489043 ELOG: Event(92) added with size 9 at 2023-04-20 13:51:57 UTC
1820 13:51:57.495876 ELOG: Event(93) added with size 9 at 2023-04-20 13:51:57 UTC
1821 13:51:57.502689 ELOG: Event(9E) added with size 10 at 2023-04-20 13:51:57 UTC
1822 13:51:57.508780 ELOG: Event(9F) added with size 14 at 2023-04-20 13:51:57 UTC
1823 13:51:57.515716 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1824 13:51:57.522138 ELOG: Event(A1) added with size 10 at 2023-04-20 13:51:57 UTC
1825 13:51:57.528591 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1826 13:51:57.535510 ELOG: Event(A0) added with size 9 at 2023-04-20 13:51:57 UTC
1827 13:51:57.538810 elog_add_boot_reason: Logged dev mode boot
1828 13:51:57.545473 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1829 13:51:57.545566 Finalize devices...
1830 13:51:57.548927 Devices finalized
1831 13:51:57.555496 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1832 13:51:57.558714 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1833 13:51:57.564972 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1834 13:51:57.568229 ME: HFSTS1 : 0x80030055
1835 13:51:57.575154 ME: HFSTS2 : 0x30280116
1836 13:51:57.578221 ME: HFSTS3 : 0x00000050
1837 13:51:57.581703 ME: HFSTS4 : 0x00004000
1838 13:51:57.588044 ME: HFSTS5 : 0x00000000
1839 13:51:57.591224 ME: HFSTS6 : 0x00400006
1840 13:51:57.594644 ME: Manufacturing Mode : YES
1841 13:51:57.601577 ME: SPI Protection Mode Enabled : NO
1842 13:51:57.604771 ME: FW Partition Table : OK
1843 13:51:57.608242 ME: Bringup Loader Failure : NO
1844 13:51:57.611152 ME: Firmware Init Complete : NO
1845 13:51:57.614682 ME: Boot Options Present : NO
1846 13:51:57.618011 ME: Update In Progress : NO
1847 13:51:57.621373 ME: D0i3 Support : YES
1848 13:51:57.624744 ME: Low Power State Enabled : NO
1849 13:51:57.631042 ME: CPU Replaced : YES
1850 13:51:57.634278 ME: CPU Replacement Valid : YES
1851 13:51:57.637698 ME: Current Working State : 5
1852 13:51:57.640944 ME: Current Operation State : 1
1853 13:51:57.644301 ME: Current Operation Mode : 3
1854 13:51:57.648094 ME: Error Code : 0
1855 13:51:57.651301 ME: Enhanced Debug Mode : NO
1856 13:51:57.654336 ME: CPU Debug Disabled : YES
1857 13:51:57.657601 ME: TXT Support : NO
1858 13:51:57.664363 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1859 13:51:57.674003 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1860 13:51:57.677454 CBFS: 'fallback/slic' not found.
1861 13:51:57.680885 ACPI: Writing ACPI tables at 76b01000.
1862 13:51:57.680967 ACPI: * FACS
1863 13:51:57.684158 ACPI: * DSDT
1864 13:51:57.687559 Ramoops buffer: 0x100000@0x76a00000.
1865 13:51:57.690550 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1866 13:51:57.697432 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1867 13:51:57.700860 Google Chrome EC: version:
1868 13:51:57.704223 ro: voema_v2.0.10114-a447f03e46
1869 13:51:57.707109 rw: voema_v2.0.10114-a447f03e46
1870 13:51:57.707233 running image: 1
1871 13:51:57.713875 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1872 13:51:57.718567 ACPI: * FADT
1873 13:51:57.718658 SCI is IRQ9
1874 13:51:57.725258 ACPI: added table 1/32, length now 40
1875 13:51:57.725364 ACPI: * SSDT
1876 13:51:57.728640 Found 1 CPU(s) with 8 core(s) each.
1877 13:51:57.735291 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1878 13:51:57.738573 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1879 13:51:57.742229 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1880 13:51:57.745423 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1881 13:51:57.752103 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1882 13:51:57.758787 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1883 13:51:57.761681 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1884 13:51:57.768532 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1885 13:51:57.775227 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1886 13:51:57.778517 \_SB.PCI0.RP09: Added StorageD3Enable property
1887 13:51:57.785265 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1888 13:51:57.788705 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1889 13:51:57.795019 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1890 13:51:57.798422 PS2K: Passing 80 keymaps to kernel
1891 13:51:57.805127 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1892 13:51:57.811540 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1893 13:51:57.818311 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1894 13:51:57.824966 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1895 13:51:57.831712 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1896 13:51:57.837918 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1897 13:51:57.844636 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1898 13:51:57.851440 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1899 13:51:57.854762 ACPI: added table 2/32, length now 44
1900 13:51:57.854851 ACPI: * MCFG
1901 13:51:57.857961 ACPI: added table 3/32, length now 48
1902 13:51:57.861242 ACPI: * TPM2
1903 13:51:57.864616 TPM2 log created at 0x769f0000
1904 13:51:57.868472 ACPI: added table 4/32, length now 52
1905 13:51:57.868557 ACPI: * MADT
1906 13:51:57.871600 SCI is IRQ9
1907 13:51:57.874470 ACPI: added table 5/32, length now 56
1908 13:51:57.877889 current = 76b09850
1909 13:51:57.877975 ACPI: * DMAR
1910 13:51:57.881248 ACPI: added table 6/32, length now 60
1911 13:51:57.884738 ACPI: added table 7/32, length now 64
1912 13:51:57.887713 ACPI: * HPET
1913 13:51:57.891105 ACPI: added table 8/32, length now 68
1914 13:51:57.891193 ACPI: done.
1915 13:51:57.894621 ACPI tables: 35216 bytes.
1916 13:51:57.897520 smbios_write_tables: 769ef000
1917 13:51:57.901024 EC returned error result code 3
1918 13:51:57.904273 Couldn't obtain OEM name from CBI
1919 13:51:57.907603 Create SMBIOS type 16
1920 13:51:57.911018 Create SMBIOS type 17
1921 13:51:57.914523 GENERIC: 0.0 (WIFI Device)
1922 13:51:57.914609 SMBIOS tables: 1750 bytes.
1923 13:51:57.920908 Writing table forward entry at 0x00000500
1924 13:51:57.927641 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1925 13:51:57.931053 Writing coreboot table at 0x76b25000
1926 13:51:57.937695 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1927 13:51:57.940628 1. 0000000000001000-000000000009ffff: RAM
1928 13:51:57.943951 2. 00000000000a0000-00000000000fffff: RESERVED
1929 13:51:57.950684 3. 0000000000100000-00000000769eefff: RAM
1930 13:51:57.953976 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1931 13:51:57.960900 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1932 13:51:57.967528 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1933 13:51:57.970709 7. 0000000077000000-000000007fbfffff: RESERVED
1934 13:51:57.977210 8. 00000000c0000000-00000000cfffffff: RESERVED
1935 13:51:57.980307 9. 00000000f8000000-00000000f9ffffff: RESERVED
1936 13:51:57.983602 10. 00000000fb000000-00000000fb000fff: RESERVED
1937 13:51:57.990499 11. 00000000fe000000-00000000fe00ffff: RESERVED
1938 13:51:57.994012 12. 00000000fed80000-00000000fed87fff: RESERVED
1939 13:51:58.000764 13. 00000000fed90000-00000000fed92fff: RESERVED
1940 13:51:58.003981 14. 00000000feda0000-00000000feda1fff: RESERVED
1941 13:51:58.010241 15. 00000000fedc0000-00000000feddffff: RESERVED
1942 13:51:58.013611 16. 0000000100000000-00000002803fffff: RAM
1943 13:51:58.016988 Passing 4 GPIOs to payload:
1944 13:51:58.020294 NAME | PORT | POLARITY | VALUE
1945 13:51:58.026679 lid | undefined | high | high
1946 13:51:58.033430 power | undefined | high | low
1947 13:51:58.036791 oprom | undefined | high | low
1948 13:51:58.043527 EC in RW | 0x000000e5 | high | low
1949 13:51:58.049755 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f431
1950 13:51:58.053137 coreboot table: 1576 bytes.
1951 13:51:58.056616 IMD ROOT 0. 0x76fff000 0x00001000
1952 13:51:58.059753 IMD SMALL 1. 0x76ffe000 0x00001000
1953 13:51:58.063511 FSP MEMORY 2. 0x76c4e000 0x003b0000
1954 13:51:58.066873 VPD 3. 0x76c4d000 0x00000367
1955 13:51:58.070247 RO MCACHE 4. 0x76c4c000 0x00000fdc
1956 13:51:58.073160 CONSOLE 5. 0x76c2c000 0x00020000
1957 13:51:58.076392 FMAP 6. 0x76c2b000 0x00000578
1958 13:51:58.082937 TIME STAMP 7. 0x76c2a000 0x00000910
1959 13:51:58.086222 VBOOT WORK 8. 0x76c16000 0x00014000
1960 13:51:58.089552 ROMSTG STCK 9. 0x76c15000 0x00001000
1961 13:51:58.092964 AFTER CAR 10. 0x76c0a000 0x0000b000
1962 13:51:58.096340 RAMSTAGE 11. 0x76b97000 0x00073000
1963 13:51:58.099843 REFCODE 12. 0x76b42000 0x00055000
1964 13:51:58.103097 SMM BACKUP 13. 0x76b32000 0x00010000
1965 13:51:58.106644 4f444749 14. 0x76b30000 0x00002000
1966 13:51:58.109993 EXT VBT15. 0x76b2d000 0x0000219f
1967 13:51:58.116348 COREBOOT 16. 0x76b25000 0x00008000
1968 13:51:58.119931 ACPI 17. 0x76b01000 0x00024000
1969 13:51:58.122764 ACPI GNVS 18. 0x76b00000 0x00001000
1970 13:51:58.126222 RAMOOPS 19. 0x76a00000 0x00100000
1971 13:51:58.129758 TPM2 TCGLOG20. 0x769f0000 0x00010000
1972 13:51:58.133067 SMBIOS 21. 0x769ef000 0x00000800
1973 13:51:58.136481 IMD small region:
1974 13:51:58.139796 IMD ROOT 0. 0x76ffec00 0x00000400
1975 13:51:58.143062 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1976 13:51:58.146430 POWER STATE 2. 0x76ffeb80 0x00000044
1977 13:51:58.149333 ROMSTAGE 3. 0x76ffeb60 0x00000004
1978 13:51:58.156469 MEM INFO 4. 0x76ffe980 0x000001e0
1979 13:51:58.159380 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1980 13:51:58.162695 MTRR: Physical address space:
1981 13:51:58.169254 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1982 13:51:58.176325 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1983 13:51:58.182358 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1984 13:51:58.189206 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1985 13:51:58.195710 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1986 13:51:58.202345 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1987 13:51:58.209168 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1988 13:51:58.212040 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 13:51:58.215386 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 13:51:58.218805 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 13:51:58.225550 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 13:51:58.229048 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 13:51:58.232330 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 13:51:58.235793 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 13:51:58.238669 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 13:51:58.245070 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 13:51:58.248893 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 13:51:58.252101 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 13:51:58.255664 call enable_fixed_mtrr()
2000 13:51:58.259141 CPU physical address size: 39 bits
2001 13:51:58.266150 MTRR: default type WB/UC MTRR counts: 6/6.
2002 13:51:58.268707 MTRR: UC selected as default type.
2003 13:51:58.275597 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2004 13:51:58.278846 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2005 13:51:58.285482 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2006 13:51:58.291957 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2007 13:51:58.299011 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2008 13:51:58.305476 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2009 13:51:58.305569
2010 13:51:58.308852 MTRR check
2011 13:51:58.312293 Fixed MTRRs : Enabled
2012 13:51:58.312372 Variable MTRRs: Enabled
2013 13:51:58.312437
2014 13:51:58.318449 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 13:51:58.322248 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 13:51:58.325063 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 13:51:58.328591 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 13:51:58.331993 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 13:51:58.338486 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 13:51:58.341899 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 13:51:58.345292 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 13:51:58.348745 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 13:51:58.355353 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 13:51:58.358666 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 13:51:58.364967 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2026 13:51:58.368411 call enable_fixed_mtrr()
2027 13:51:58.371843 Checking cr50 for pending updates
2028 13:51:58.375709 CPU physical address size: 39 bits
2029 13:51:58.378600 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 13:51:58.381967 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 13:51:58.385359 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 13:51:58.391914 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 13:51:58.395635 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 13:51:58.398979 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 13:51:58.402298 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 13:51:58.408422 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 13:51:58.412010 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 13:51:58.415583 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 13:51:58.418344 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 13:51:58.424994 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 13:51:58.428320 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 13:51:58.431800 call enable_fixed_mtrr()
2043 13:51:58.435248 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 13:51:58.438750 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 13:51:58.445134 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 13:51:58.448525 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 13:51:58.451912 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 13:51:58.455274 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 13:51:58.461351 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 13:51:58.464856 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 13:51:58.468124 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 13:51:58.471649 CPU physical address size: 39 bits
2053 13:51:58.475698 call enable_fixed_mtrr()
2054 13:51:58.479245 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 13:51:58.486028 MTRR: Fixed MSR 0x250 0x0606060606060606
2056 13:51:58.488963 MTRR: Fixed MSR 0x258 0x0606060606060606
2057 13:51:58.492234 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 13:51:58.495538 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 13:51:58.502468 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 13:51:58.505749 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 13:51:58.508598 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 13:51:58.512569 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 13:51:58.519093 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 13:51:58.522028 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 13:51:58.525369 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 13:51:58.532042 MTRR: Fixed MSR 0x258 0x0606060606060606
2067 13:51:58.532127 call enable_fixed_mtrr()
2068 13:51:58.538978 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 13:51:58.541878 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 13:51:58.545197 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 13:51:58.548662 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 13:51:58.555566 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 13:51:58.558402 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 13:51:58.562145 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 13:51:58.565521 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 13:51:58.568389 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 13:51:58.575157 CPU physical address size: 39 bits
2078 13:51:58.578499 call enable_fixed_mtrr()
2079 13:51:58.581721 MTRR: Fixed MSR 0x250 0x0606060606060606
2080 13:51:58.585066 MTRR: Fixed MSR 0x250 0x0606060606060606
2081 13:51:58.591978 MTRR: Fixed MSR 0x258 0x0606060606060606
2082 13:51:58.594781 MTRR: Fixed MSR 0x259 0x0000000000000000
2083 13:51:58.598069 MTRR: Fixed MSR 0x268 0x0606060606060606
2084 13:51:58.601979 MTRR: Fixed MSR 0x269 0x0606060606060606
2085 13:51:58.607995 MTRR: Fixed MSR 0x26a 0x0606060606060606
2086 13:51:58.612076 MTRR: Fixed MSR 0x26b 0x0606060606060606
2087 13:51:58.615167 MTRR: Fixed MSR 0x26c 0x0606060606060606
2088 13:51:58.618574 MTRR: Fixed MSR 0x26d 0x0606060606060606
2089 13:51:58.625057 MTRR: Fixed MSR 0x26e 0x0606060606060606
2090 13:51:58.628301 MTRR: Fixed MSR 0x26f 0x0606060606060606
2091 13:51:58.631592 MTRR: Fixed MSR 0x258 0x0606060606060606
2092 13:51:58.635017 call enable_fixed_mtrr()
2093 13:51:58.637829 MTRR: Fixed MSR 0x259 0x0000000000000000
2094 13:51:58.644705 MTRR: Fixed MSR 0x268 0x0606060606060606
2095 13:51:58.648117 MTRR: Fixed MSR 0x269 0x0606060606060606
2096 13:51:58.651517 MTRR: Fixed MSR 0x26a 0x0606060606060606
2097 13:51:58.654503 MTRR: Fixed MSR 0x26b 0x0606060606060606
2098 13:51:58.661600 MTRR: Fixed MSR 0x26c 0x0606060606060606
2099 13:51:58.664451 MTRR: Fixed MSR 0x26d 0x0606060606060606
2100 13:51:58.668093 MTRR: Fixed MSR 0x26e 0x0606060606060606
2101 13:51:58.670967 MTRR: Fixed MSR 0x26f 0x0606060606060606
2102 13:51:58.677904 CPU physical address size: 39 bits
2103 13:51:58.681279 call enable_fixed_mtrr()
2104 13:51:58.684549 CPU physical address size: 39 bits
2105 13:51:58.689045 CPU physical address size: 39 bits
2106 13:51:58.689134 Reading cr50 TPM mode
2107 13:51:58.692308 CPU physical address size: 39 bits
2108 13:51:58.699635 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2109 13:51:58.709620 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2110 13:51:58.712923 Checking segment from ROM address 0xffc02b38
2111 13:51:58.716264 Checking segment from ROM address 0xffc02b54
2112 13:51:58.722778 Loading segment from ROM address 0xffc02b38
2113 13:51:58.722874 code (compression=0)
2114 13:51:58.732956 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2115 13:51:58.742986 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2116 13:51:58.743112 it's not compressed!
2117 13:51:58.882307 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2118 13:51:58.888588 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2119 13:51:58.895221 Loading segment from ROM address 0xffc02b54
2120 13:51:58.895330 Entry Point 0x30000000
2121 13:51:58.898697 Loaded segments
2122 13:51:58.905546 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2123 13:51:58.948476 Finalizing chipset.
2124 13:51:58.951299 Finalizing SMM.
2125 13:51:58.951422 APMC done.
2126 13:51:58.958219 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2127 13:51:58.961646 mp_park_aps done after 0 msecs.
2128 13:51:58.964475 Jumping to boot code at 0x30000000(0x76b25000)
2129 13:51:58.974714 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2130 13:51:58.974826
2131 13:51:58.974924
2132 13:51:58.977602
2133 13:51:58.977708 Starting depthcharge on Voema...
2134 13:51:58.978143 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2135 13:51:58.978290 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2136 13:51:58.978405 Setting prompt string to ['volteer:']
2137 13:51:58.978496 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2138 13:51:58.981384
2139 13:51:58.987516 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2140 13:51:58.987621
2141 13:51:58.994402 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2142 13:51:58.994507
2143 13:51:59.001004 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2144 13:51:59.001114
2145 13:51:59.004306 Failed to find eMMC card reader
2146 13:51:59.004406
2147 13:51:59.007678 Wipe memory regions:
2148 13:51:59.007760
2149 13:51:59.010569 [0x00000000001000, 0x000000000a0000)
2150 13:51:59.010671
2151 13:51:59.013926 [0x00000000100000, 0x00000030000000)
2152 13:51:59.039572
2153 13:51:59.042745 [0x00000032662db0, 0x000000769ef000)
2154 13:51:59.078277
2155 13:51:59.081630 [0x00000100000000, 0x00000280400000)
2156 13:51:59.281787
2157 13:51:59.285160 ec_init: CrosEC protocol v3 supported (256, 256)
2158 13:51:59.715554
2159 13:51:59.715717 R8152: Initializing
2160 13:51:59.715830
2161 13:51:59.719036 Version 6 (ocp_data = 5c30)
2162 13:51:59.719125
2163 13:51:59.722450 R8152: Done initializing
2164 13:51:59.722532
2165 13:51:59.725320 Adding net device
2166 13:52:00.026412
2167 13:52:00.030260 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 13:52:00.030349
2169 13:52:00.030416
2170 13:52:00.030478
2171 13:52:00.033006 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 13:52:00.133539 volteer: tftpboot 192.168.201.1 10062419/tftp-deploy-pt7dibw0/kernel/bzImage 10062419/tftp-deploy-pt7dibw0/kernel/cmdline 10062419/tftp-deploy-pt7dibw0/ramdisk/ramdisk.cpio.gz
2174 13:52:00.133707 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 13:52:00.133833 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2176 13:52:00.138003 tftpboot 192.168.201.1 10062419/tftp-deploy-pt7dibw0/kernel/bzIploy-pt7dibw0/kernel/cmdline 10062419/tftp-deploy-pt7dibw0/ramdisk/ramdisk.cpio.gz
2177 13:52:00.138093
2178 13:52:00.138160 Waiting for link
2179 13:52:00.340913
2180 13:52:00.341064 done.
2181 13:52:00.341131
2182 13:52:00.341193 MAC: 00:24:32:30:77:76
2183 13:52:00.341253
2184 13:52:00.344383 Sending DHCP discover... done.
2185 13:52:00.344470
2186 13:52:00.347516 Waiting for reply... done.
2187 13:52:00.347599
2188 13:52:00.350706 Sending DHCP request... done.
2189 13:52:00.350796
2190 13:52:00.354467 Waiting for reply... done.
2191 13:52:00.354551
2192 13:52:00.357732 My ip is 192.168.201.16
2193 13:52:00.357817
2194 13:52:00.361097 The DHCP server ip is 192.168.201.1
2195 13:52:00.361181
2196 13:52:00.364506 TFTP server IP predefined by user: 192.168.201.1
2197 13:52:00.364590
2198 13:52:00.370680 Bootfile predefined by user: 10062419/tftp-deploy-pt7dibw0/kernel/bzImage
2199 13:52:00.370766
2200 13:52:00.374153 Sending tftp read request... done.
2201 13:52:00.374238
2202 13:52:00.380926 Waiting for the transfer...
2203 13:52:00.381021
2204 13:52:00.921704 00000000 ################################################################
2205 13:52:00.921981
2206 13:52:01.440596 00080000 ################################################################
2207 13:52:01.440728
2208 13:52:01.999121 00100000 ################################################################
2209 13:52:01.999728
2210 13:52:02.530562 00180000 ################################################################
2211 13:52:02.530699
2212 13:52:03.088242 00200000 ################################################################
2213 13:52:03.088406
2214 13:52:03.624363 00280000 ################################################################
2215 13:52:03.624525
2216 13:52:04.175979 00300000 ################################################################
2217 13:52:04.176112
2218 13:52:04.719495 00380000 ################################################################
2219 13:52:04.719636
2220 13:52:05.261563 00400000 ################################################################
2221 13:52:05.261694
2222 13:52:05.804694 00480000 ################################################################
2223 13:52:05.804845
2224 13:52:06.374016 00500000 ################################################################
2225 13:52:06.374157
2226 13:52:07.003989 00580000 ################################################################
2227 13:52:07.004491
2228 13:52:07.635753 00600000 ################################################################
2229 13:52:07.635891
2230 13:52:08.197110 00680000 ################################################################
2231 13:52:08.197241
2232 13:52:08.755292 00700000 ################################################################
2233 13:52:08.755430
2234 13:52:09.301779 00780000 ################################################################
2235 13:52:09.301923
2236 13:52:09.850251 00800000 ################################################################
2237 13:52:09.850391
2238 13:52:10.394089 00880000 ################################################################
2239 13:52:10.394228
2240 13:52:10.948454 00900000 ################################################################
2241 13:52:10.948603
2242 13:52:11.490012 00980000 ################################################################
2243 13:52:11.490147
2244 13:52:11.921559 00a00000 ############################################## done.
2245 13:52:11.922067
2246 13:52:11.924213 The bootfile was 10854400 bytes long.
2247 13:52:11.924642
2248 13:52:11.927784 Sending tftp read request... done.
2249 13:52:11.928366
2250 13:52:11.931006 Waiting for the transfer...
2251 13:52:11.931412
2252 13:52:12.492456 00000000 ################################################################
2253 13:52:12.492609
2254 13:52:13.016845 00080000 ################################################################
2255 13:52:13.017006
2256 13:52:13.598974 00100000 ################################################################
2257 13:52:13.599113
2258 13:52:14.229068 00180000 ################################################################
2259 13:52:14.229209
2260 13:52:14.868917 00200000 ################################################################
2261 13:52:14.869055
2262 13:52:15.496183 00280000 ################################################################
2263 13:52:15.496330
2264 13:52:16.116113 00300000 ################################################################
2265 13:52:16.116281
2266 13:52:16.750120 00380000 ################################################################
2267 13:52:16.750253
2268 13:52:17.390019 00400000 ################################################################
2269 13:52:17.390174
2270 13:52:18.037177 00480000 ################################################################
2271 13:52:18.037377
2272 13:52:18.685912 00500000 ################################################################
2273 13:52:18.686064
2274 13:52:19.162917 00580000 ################################################ done.
2275 13:52:19.163104
2276 13:52:19.166047 Sending tftp read request... done.
2277 13:52:19.166159
2278 13:52:19.168991 Waiting for the transfer...
2279 13:52:19.169093
2280 13:52:19.169190 00000000 # done.
2281 13:52:19.169285
2282 13:52:19.179171 Command line loaded dynamically from TFTP file: 10062419/tftp-deploy-pt7dibw0/kernel/cmdline
2283 13:52:19.179279
2284 13:52:19.202408 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10062419/extract-nfsrootfs-jaslkc54,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2285 13:52:19.206238
2286 13:52:19.209488 Shutting down all USB controllers.
2287 13:52:19.209571
2288 13:52:19.209642 Removing current net device
2289 13:52:19.209705
2290 13:52:19.212894 Finalizing coreboot
2291 13:52:19.212966
2292 13:52:19.219528 Exiting depthcharge with code 4 at timestamp: 28893629
2293 13:52:19.219630
2294 13:52:19.219725
2295 13:52:19.219816 Starting kernel ...
2296 13:52:19.219904
2297 13:52:19.219991
2298 13:52:19.220606 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2299 13:52:19.220723 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2300 13:52:19.220803 Setting prompt string to ['Linux version [0-9]']
2301 13:52:19.220875 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2302 13:52:19.220945 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2304 13:56:43.221729 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2306 13:56:43.222852 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2308 13:56:43.223788 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2311 13:56:43.225294 end: 2 depthcharge-action (duration 00:05:00) [common]
2313 13:56:43.226038 Cleaning after the job
2314 13:56:43.226166 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/ramdisk
2315 13:56:43.227040 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/kernel
2316 13:56:43.228173 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/nfsrootfs
2317 13:56:43.280890 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10062419/tftp-deploy-pt7dibw0/modules
2318 13:56:43.281557 start: 5.1 power-off (timeout 00:00:30) [common]
2319 13:56:43.281737 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2320 13:56:43.358070 >> Command sent successfully.
2321 13:56:43.362816 Returned 0 in 0 seconds
2322 13:56:43.464195 end: 5.1 power-off (duration 00:00:00) [common]
2324 13:56:43.466010 start: 5.2 read-feedback (timeout 00:10:00) [common]
2325 13:56:43.467170 Listened to connection for namespace 'common' for up to 1s
2326 13:56:44.471888 Finalising connection for namespace 'common'
2327 13:56:44.472525 Disconnecting from shell: Finalise
2328 13:56:44.472918
2329 13:56:44.574621 end: 5.2 read-feedback (duration 00:00:01) [common]
2330 13:56:44.575273 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10062419
2331 13:56:44.829384 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10062419
2332 13:56:44.829640 JobError: Your job cannot terminate cleanly.